; -------------------------------------------------------------------------------- ; @Title: RCARH2 On-Chip Peripherals ; @Props: Released ; @Author: BUJ ; @Changelog: 2012-05-31 BUJ ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Doc: R-Car_H2_HMVer0-50.pdf ; @Core: Cortex-A15MPCore/Cortex-A7MPCore ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perrcarh2.per 14376 2022-02-24 11:15:06Z kwisniewski $ config 16. 8. width 0xB tree "Core Registers (Cortex-A15/A7)" ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- width 10. tree "ID Registers" group.long c15:0x0++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical" bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,?..." endif rgroup.long c15:0x300++0x0 line.long 0x0 "TLBTR,TLB Type Register" bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,?..." rgroup.long c15:0x500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 31. " MPERF ,Multiprocessing Extensions register format" "Not supported,Supported" bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 24. " MT ,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" textline " " bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "1,2,3,4" rgroup.long c15:0x400++0x0 line.long 0x0 "MIDR2,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x700++0x0 line.long 0x0 "MIDR3,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,PXN,64-bit,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." endif rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. " PMS ,Physical memory size supported by processor caches" "Reserved,Reserved,40-bit,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..." if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Supported,?..." endif rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " EARI ,Exception A and R Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " EXIN ,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLWD,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,LDRD/STRD,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " TEEEI ,Thumb-EE Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,TBB/TBH,?..." bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. " SWP_FRAC ,Memory System Locking Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Supported,?..." textline " " bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,DMB/DSB/ISB,?..." bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb Execution Environment (Thumb-EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Support for Jazelle extension" "Not supported,?..." bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 16.--19. " GT ,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " VE ,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. " PMM ,Performance Monitor Model Support" "Reserved,Reserved,ID_DFR0,?..." bitfld.long 0x00 20.--23. " MDM_MM ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TM_MM ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CTM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." textline " " bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 15. " [15] ,Instruction architecturally executed, condition code check pass, unaligned load or store" "Not implemented,Implemented" textline " " bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed, immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed, condition code check pass, software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" textline " " bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. " [7] ,Instruction architecturally executed, condition code check pass, store" "Not implemented,Implemented" textline " " bitfld.long 0x00 6. " [6] ,Instruction architecturally executed, condition code check pass, load" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. " PMCEID0[31] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 30. " [30] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 29. " [29] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Level 1 data memory access" "Not implemented,Implemented" textline " " bitfld.long 0x00 27. " [27] ,Branches or other change in program flow that could have been predicted by the branch prediction resources of the processor" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Branch mispredicted or not predicted" "Not implemented,Implemented" bitfld.long 0x00 25. " [25] ,Unaligned access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Unaligned access" "Not implemented,Implemented" textline " " bitfld.long 0x00 23. " [23] ,Branch speculatively executed - Procedure return" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Branch speculatively executed - Immediate branch" "Not implemented,Implemented" bitfld.long 0x00 21. " [21] ,Instruction speculatively executed - Software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Write to translation table register (TTBR0 or TTBR1)" "Not implemented,Implemented" textline " " bitfld.long 0x00 19. " [19] ,Change to ContextID retired" "Not implemented,Implemented" bitfld.long 0x00 18. " [18] ,Exception return architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 17. " [17] ,Exception taken. Counts the number of exceptions architecturally taken" "Not implemented,Implemented" bitfld.long 0x00 16. " [16] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 15. " [15] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Store instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Store instruction speculatively executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 7. " [7] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 6. " [6] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Data read or write operation that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 4. " [4] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " [3] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Data read or write operation that causes a refill at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Instruction fetch that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 0. " [0] ,Instruction fetch that causes a refill at (at least) the lowest level of instruction or unified cache" "Not implemented,Implemented" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" textline " " bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" endif tree.end width 12. tree "System Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" textline " " bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" bitfld.long 0x00 3. " ASSE ,ACE STREX Signalling Enable" "Disabled,Enabled" bitfld.long 0x00 2. " L2PF ,Enable L2 prefetch" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " L1PF ,Enable L1 prefetch" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 31. " SDEH ,Snoop-delayed exclusive handling" "Normal,Modified" bitfld.long 0x00 30. " FMCEA ,Force main clock processor enable active" "Not prevented,Prevented" bitfld.long 0x00 29. " FNVCEA ,Force NEON/VFP clock enable active" "Not prevented,Prevented" textline " " bitfld.long 0x00 27.--28. " WSNAT ,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.long 0x00 25.--26. " WSNL1AT ,Write streaming no L1-allocate threshold" "14th,64th,128th,Disabled" bitfld.long 0x00 24. " NCSE ,Non-cacheable streaming enhancement" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FIORRTTSSAW ,Forces in-order requests to the same set and way" "Not forced,Forced" bitfld.long 0x00 22. " FIOLI ,Force in-order load issue" "Not forced,Forced" bitfld.long 0x00 21. " DL2TLBP ,Disabled L2 TLB prefetching" "No,Yes" textline " " bitfld.long 0x00 20. " DL2TBWIPAPAC ,Disable L2 TBW IPA PA cache" "No,Yes" bitfld.long 0x00 19. " DL2TBWS1WC ,Disable L2 TBW Stage 1 walk cache" "No,Yes" bitfld.long 0x00 18. " DL2TBWS1L2PAC ,Disable L2 TBW stage 1 L2 PA cache" "No,Yes" textline " " bitfld.long 0x00 17. " DL2TLBPO ,Disable L2 TLB Performance Optimization" "No,Yes" bitfld.long 0x00 16. " EFSOADLR ,Enables full Strongly-ordered and Device load replay" "Disabled,Enabled" bitfld.long 0x00 15. " FIIBEU ,Force in-order issue in branch execution unit" "Not forced,Forced" textline " " bitfld.long 0x00 14. " FLOIGCDPC ,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Limited" bitfld.long 0x00 13. " FACP14WCP15 ,Flush after CP14 and CP15 writes" "Normal,Flushed" bitfld.long 0x00 12. " FPCP14CP15 ,Force push of CP14 and CP15 registers" "Not forced,Pushed" textline " " bitfld.long 0x00 11. " FOISEG ,Force one instruction to start and end a group" "Not forced,Forced" bitfld.long 0x00 10. " FSAEIG ,Force serialization after each instruction group" "Not forced,Forced" bitfld.long 0x00 9. " DFRO ,Disable flag renaming optimization" "No,Yes" textline " " bitfld.long 0x00 8. " EWFIIANOPI ,Executes WFI instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 7. " EWFEIANOPI ,Executes WFE instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 6. " SMP ,Broadcast of cache and TLB maintenance operations enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EPLDIANOP ,Execute PLD and PLDW instructions as a NOP instruction" "Disabled,Enabled" bitfld.long 0x00 4. " DIP ,Disable indirect predictor" "No,Yes" bitfld.long 0x00 3. " DMBTB ,Disable micro-BTB" "No,Yes" textline " " bitfld.long 0x00 2. " LOLBDPF ,Limits to one loop buffer detect per flush" "Normal,Limited" bitfld.long 0x00 1. " DLB ,Disable loop buffer" "No,Yes" bitfld.long 0x00 0. " EIBTB ,Enable invalidate of BTB" "Disabled,Enabled" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes" bitfld.long 0x00 15. " DDVM ,Disable Distributed Virtual Memory (DVM) transactions" "No,Yes" bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 pre-fetch,2 pre-fetches,3 pre-fetches" textline " " bitfld.long 0x00 12. " L1RADIS ,L1 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 11. " L2RADIS ,L2 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 10. " DODMBS ,Disable optimised data memory barrier behaviour" "No,Yes" textline " " bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x140F++0x00 line.long 0x0 "ACTLR2,Auxiliary Control Register 2" bitfld.long 0x00 31. " ECRCG ,Enable CPU regional clock gates" "Disabled,Enabled" bitfld.long 0x00 0. " EDCCADCCI ,Execute data cache clean as data cache clean/invalidate" "Disabled,Enabled" textline " " else hgroup.long c15:0x140F++0x00 hide.long 0x0 "ACTLR2,Auxiliary Control Register 2" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of registers D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" endif group.long c15:0x11++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 9. " SIF ,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. " HCE ,Hyp Call enable" "Undefined,Enabled" bitfld.long 0x00 7. " SCD ,Secure Monitor Call disable" "No,Yes" textline " " bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" textline " " bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 17. " NS_L2ERR ,L2 internal asynchronous error and AXI asynchronous error writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 17. " NS_L2ERR ,Determines if the L2 Extended Control Register(L2ECTLR), is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 16. " NS_ACTLR_PF_WRITE ,Determines if the ACTLR.L1PF and ACTLR.L2PF registers are writeable in Non-secure state" "Non-writeable,Writeable" textline " " bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" endif group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBADDR ,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " MVBADDR ,Monitor Vector Base Address" textline " " rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. " A ,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. " I ,Interrupt pending flag" "Not pending,Pending" bitfld.long 0x00 6. " F ,Fast interrupt pending flag" "Not pending,Pending" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 1. " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" else hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x1609))&0x3)==0x3) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 30. " PRM3 ,Disable processor 3 retention" "No,Yes" bitfld.long 0x00 28.--29. " PPS3 ,Processor 3 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" textline " " bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 7. " CPSMP[3] ,Copy of the ACTLR.SMP for processor 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x2) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" textline " " bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x1) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" textline " " bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x0) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " endif group.long c15:0x410F++0x00 line.long 0x00 "FILASTARTR,Peripheral port start address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_START_ADDR ,Start address of the peripheral port physical memory region" bitfld.long 0x00 0. " FILT_EN ,FLT_START_ADDR and FLT_END_ADDR are valid" "Invalid,Valid" group.long c15:0x420F++0x00 line.long 0x00 "FILAENDR,Peripheral port end address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_END_ADDR ,End address of the peripheral port physical memory region" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") hgroup.long c15:0x1609++0x00 hide.long 0x00 "SCUCTLR,SCU Control Register" hgroup.long c15:0x410F++0x00 hide.long 0x00 "FILASTARTR,Peripheral port start address register" hgroup.long c15:0x420F++0x00 hide.long 0x00 "FILAENDR,Peripheral port end address register" endif tree.end width 12. tree "Memory Management Unit" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" textline " " endif if (((d.l(c15:0x0002))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0002))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0102))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0102))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. " PD1 ,Translation table walk Disable bit for TTBR1" "No,Yes" bitfld.long 0x00 4. " PD0 ,Translation table walk Disable bit for TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " N ,Indicate the width of the base address held in TTBR0" "16KB,8KB,4KB,2KB,1KB,512 bytes,256 bytes,128 bytes" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 30. " IMP ,IMPLEMENTATION DEFINED" "Low,High" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 23. " EPD1 ,Translation table walk disable for translations using TTBR1" "No,Yes" textline " " bitfld.long 0x00 22. " A1 ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1" bitfld.long 0x00 16.--18. " T1SZ ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 7. " EPD0 ,Translation table walk disable for translations using TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " T0SZ ,The Size offset of the TTBR0 addressed memory region" "0,1,2,3,4,5,6,7" endif textline " " group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lockdown Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Coprocessor Abort,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Fault Status" "Reserved,Alignment fault,Reserved,Reserved,Instruction cache maintenance fault,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort/First level,Permission fault/First level,Synchronous external abort/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/First level,Reserved,Synchronous parity error on translation table walk/Second level,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/synchronous external,Permission/section,L2/synchronous external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." endif endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" else hgroup.long c15:0x0015++0x00 hide.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug event,Access flag fault/First level,Reserved,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Non-translation/synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort on translation table walk/First level,Permission fault/First level,Synchronous external abort on translation table walk/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk,Reserved,Synchronous parity error on translation table walk,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Generated Exception Type" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access fault flag/First level,Access fault flag/Second level,Access fault flag/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif endif group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x0) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" hexmask.quad.byte 0x00 56.--63. 1. " ATTR ,Memory attributes for the returned PA" hexmask.quad 0x00 12.--39. 0x1000 " PA ,Physical Address" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.quad 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.quad 0x00 7.--8. " SH ,Shareability attribute" "Non-shareable,Unpredictable,Outer Shareable,Inner Shareable" bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x1) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.quad 0x00 9. " FSTAGE ,Translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. " S2WLK ,Stage 2 fault during a stage 1 translation table walk" "Not occurred,Occurred" textline " " bitfld.quad 0x00 1.--6. " FS ,Fault status field" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access, Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st lvl,Synchronous parity error on memory access on translation table walk/2nd lvl,Synchronous parity error on memory access on translation table walk/3rd lvl,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Domain fault/1st lvl,Domain fault/2nd lvl,Reserved" textline " " bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x0) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" hexmask.long.tbyte 0x00 12.--31. 0x1000 " PA ,Physical Address" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable" textline " " bitfld.long 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.long 0x00 7. " SH ,Shareability attribute" "Non-shareable,Shareable" bitfld.long 0x00 4.--6. " INNER ,Inner memory attributes" "Non-cacheable,Strongly-ordered,-,Device,-,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate" textline " " bitfld.long 0x00 2.--3. " OUTER ,Outer memory attributes" "Non-cacheable,Write-Back Write-Allocate,Write-Through no Write-Allocate,Write-Back no Write-Allocate" bitfld.long 0x00 1. " SS ,Supersection" "Not a Supersection,Supersection" bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x1) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.long 0x00 1.--6. " FS ,Fault status" "Reserved,Alignment fault,Debug event,Access flag fault/1st lvl,Fault on instruction cache maintenance,Translation fault/1st lvl,Access flag fault/2nd lvl,Translation fault/2nd lvl,Synchronous external abort,Domain fault/1st lvl,Reserved,Domain fault/2nd lvl,Synchronous external abort on translation table walk/1st lvl,Permission fault/1st lvl,Synchronous external abort on translation table walk/2nd lvl,Permission fault/2nd lvl,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,,,Synchronous parity error on translation table walk/1st lvl,Reserved,Synchronous parity error on translation table walk/2nd lvl,Reserved,?..." textline " " bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " endif if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x003A++0x00 hide.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x013A++0x00 hide.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" endif else group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" textline " " bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP" group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " endif if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 0x80 " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif textline " " if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,Process identifier" hexmask.long.byte 0x00 0.--7. 1. " ASID ,Address space identifier" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hyp Software Thread ID Register" tree.end width 15. tree "Virtualization Extensions" group.long c15:0x4000++0x00 line.long 0x0 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x0 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 19. " WXN ,Write permission implies XN" "Not forced,Forced" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,Enable address translation" "Disabled,Enabled" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hyp Configuration Register" bitfld.long 0x00 27. " TGE ,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. " TVM ,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. " TTLB ,Trap TLB maintenance instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TPU ,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. " TPC ,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. " TSW ,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TAC ,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. " TIDCP ,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. " TSC ,Trap SMC" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " TID3 ,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. " TID2 ,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. " TID1 ,Trap ID Group 1" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TID0 ,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. " TWE ,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. " TWI ,Trap WFI" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " DC ,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " BSU ,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full system" bitfld.long 0x00 9. " FB ,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " VA ,Virtual External Asynchronous Abort" "Not aborted,Aborted" bitfld.long 0x00 7. " VI ,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VF ,Virtual FIQ interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AMO ,A-bit Mask Override" "No override,Override" bitfld.long 0x00 4. " IMO ,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. " FMO ,F-bit Mask Override" "No override,Override" textline " " bitfld.long 0x00 2. " PTW ,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. " SWIO ,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. " VM ,Second Stage of Translation Enable" "Disabled,Enabled" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hyp Debug Control Register" bitfld.long 0x00 11. " TDRA ,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. " TDOSA ,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. " TDA ,Trap Debug Access" "No effect,Valid" textline " " bitfld.long 0x00 8. " TDE ,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. " HPME ,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TPM ,Trap Performance Monitors accesses" "No effect,Valid" textline " " bitfld.long 0x00 5. " TPMCR ,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. " HPMN ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hyp Coprocessor Trap Register" bitfld.long 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 15. " TASE ,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. " TCP11 ,Trap coprocessor 11" "Not trapped,Trapped" textline " " bitfld.long 0x0 10. " TCP10 ,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hyp System Trap Register" bitfld.long 0x00 17. " TJDBX ,Trap Jazelle-DBX" "Disabled,Enabled" bitfld.long 0x00 16. " TTEE ,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. " T15 ,Trap to Hyp mode Non-secure priv 15" "Not trapped,Trapped" textline " " bitfld.long 0x00 13. " T13 ,Trap to Hyp mode Non-secure priv 13" "Not trapped,Trapped" bitfld.long 0x00 12. " T12 ,Trap to Hyp mode Non-secure priv 12" "Not trapped,Trapped" bitfld.long 0x00 11. " T11 ,Trap to Hyp mode Non-secure priv 11" "Not trapped,Trapped" textline " " bitfld.long 0x00 10. " T10 ,Trap to Hyp mode Non-secure priv 10" "Not trapped,Trapped" bitfld.long 0x00 9. " T9 ,Trap to Hyp mode Non-secure priv 9" "Not trapped,Trapped" bitfld.long 0x00 8. " T8 ,Trap to Hyp mode Non-secure priv 8" "Not trapped,Trapped" textline " " bitfld.long 0x00 7. " T7 ,Trap to Hyp mode Non-secure priv 7" "Not trapped,Trapped" bitfld.long 0x00 6. " T6 ,Trap to Hyp mode Non-secure priv 6" "Not trapped,Trapped" bitfld.long 0x00 5. " T5 ,Trap to Hyp mode Non-secure priv 5" "Not trapped,Trapped" textline " " bitfld.long 0x00 3. " T3 ,Trap to Hyp mode Non-secure priv 3" "Not trapped,Trapped" bitfld.long 0x00 2. " T2 ,Trap to Hyp mode Non-secure priv 2" "Not trapped,Trapped" bitfld.long 0x00 1. " T1 ,Trap to Hyp mode Non-secure priv 1" "Not trapped,Trapped" textline " " bitfld.long 0x00 0. " T0 ,Trap to Hyp mode Non-secure priv 0" "Not trapped,Trapped" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hyp Translation Table Base Register" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hyp Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. " VMID ,VMID for the translation table" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 6.--7. " SL0 ,Starting Level for VTCR addressed region" "Second level,First level,Reserved,Reserved" bitfld.long 0x00 4. " S ,Sign extension bit" "0,1" bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" endif group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hyp Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,Reserved,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..." textline " " bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hyp IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. " FIPA ,Faulting IPA bits" textline " " hgroup.long c15:0x407++0x00 hide.long 0x00 "NOP,No Operation Register" in wgroup.long c15:0x17++0x00 line.long 0x00 "ICIALLUIS,Invalidate All Instruction Caches To PoU Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x617++0x00 line.long 0x00 "BPIALLIS,Invalidate Entire Branch Predictor Array Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x57++0x00 line.long 0x00 "ICIALLU,Invalidate Entire Instruction Cache Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x157++0x00 line.long 0x00 "ICIMVAU,Invalidate Instruction Cache Line by VA to Point-of-Unification Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x457++0x00 line.long 0x00 "CP15ISB,Instruction Synchronization Barrier Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x657++0x00 line.long 0x00 "BPIALL,Invalidate Entire Branch Predictor Array (NOP) Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x757++0x00 line.long 0x00 "BPIMVA,Invalidate MVA From Branch Predictors Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.word 0x00 5.--15. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x167++0x00 line.long 0x00 "DCIMVAC,Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x267++0x00 line.long 0x00 "DCISW,Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x0087++0x00 line.long 0x00 "ATS1CPR,Stage 1 current state PL1 read" wgroup.long c15:0x0187++0x00 line.long 0x00 "ATS1CPW,Stage 1 current state PL1 write" wgroup.long c15:0x0287++0x00 line.long 0x00 "ATS1CUR,Stage 1 current state unprivileged (PL0) read" wgroup.long c15:0x0387++0x00 line.long 0x00 "ATS1CUW,Stage 1 current state unprivileged (PL0) write" wgroup.long c15:0x0487++0x00 line.long 0x00 "ATS12NSOPR,Stages 1 and 2 Non-secure PL1 read" wgroup.long c15:0x0587++0x00 line.long 0x00 "ATS12NSOPW,Stages 1 and 2 Non-secure PL1 write" wgroup.long c15:0x0687++0x00 line.long 0x00 "ATS12NSOUR,Stages 1 and 2 Non-secure unprivileged (PL0) read" wgroup.long c15:0x0787++0x00 line.long 0x00 "ATS12NSOUW,Stages 1 and 2 Non-secure unprivileged (PL0) write" wgroup.long c15:0x1a7++0x00 line.long 0x00 "DCCMVAC,Clean Data Cache Line to PoC by VA Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x2a7++0x00 line.long 0x00 "DCCSW,Clean Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x4a7++0x00 line.long 0x00 "CP15DSB,Data Synchronization Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x5a7++0x00 line.long 0x00 "CP15DMB,Data Memory Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x1b7++0x00 line.long 0x00 "DCCMVAU,Clean Data Or Unified Cache Line By VA To PoU Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x1e7++0x00 line.long 0x00 "DCCIMVAC,Clean and Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x2e7++0x00 line.long 0x00 "DCCISW,Clean and Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x4087++0x00 line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read" wgroup.long c15:0x4187++0x00 line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write" wgroup.long c15:0x0038++0x00 line.long 0x00 "TLBIALLIS,Invalidate entire TLB Inner Shareable" wgroup.long c15:0x0138++0x00 line.long 0x00 "TLBIMVAIS,Invalidate unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x0238++0x00 line.long 0x00 "TLBIASIDIS,Invalidate unified TLB byASID match Inner Shareable" wgroup.long c15:0x0338++0x00 line.long 0x00 "TLBIMVAAIS,Invalidate unified TLB by MVA all ASID Inner Shareable" wgroup.long c15:0x0058++0x00 line.long 0x00 "ITLBIALL,Invalidate instruction TLB" wgroup.long c15:0x0158++0x00 line.long 0x00 "ITLBIMVA,Invalidate instruction TLB entry by MVA" wgroup.long c15:0x0258++0x00 line.long 0x00 "ITLBIASID,Invalidate instruction TLB by ASID match" wgroup.long c15:0x0068++0x00 line.long 0x00 "DTLBIALL,Invalidate data TLB" wgroup.long c15:0x0168++0x00 line.long 0x00 "DTLBIMVA,Invalidate data TLB entry by MVA" wgroup.long c15:0x0268++0x00 line.long 0x00 "DTLBIASID,Invalidate data TLB by ASID match" wgroup.long c15:0x0078++0x00 line.long 0x00 "TLBIALL,Invalidate unified TLB" wgroup.long c15:0x0178++0x00 line.long 0x00 "TLBIMVA,Invalidate unified TLB entry by MVA" wgroup.long c15:0x0278++0x00 line.long 0x00 "TLBIASID,Invalidate unified TLB byASID match" wgroup.long c15:0x0378++0x00 line.long 0x00 "TLBIMVAA,Invalidate unified TLB by MVA all ASID" wgroup.long c15:0x4038++0x00 line.long 0x00 "TLBIALLHIS,Invalidate entire Hyp unified TLB Inner Shareable" wgroup.long c15:0x4138++0x00 line.long 0x00 "TLBIMVAHIS,Invalidate Hyp unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x4438++0x00 line.long 0x00 "TLBIALLNSNHIS,Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable" wgroup.long c15:0x4078++0x00 line.long 0x00 "TLBIALLH,Invalidate entire Hyp unified TLB" wgroup.long c15:0x4178++0x00 line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA" wgroup.long c15:0x4478++0x00 line.long 0x00 "TLBIALLNSNH,Invalidate entire Non-secure Non-Hyp unified TLB" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" else hgroup.long c15:0x403A++0x00 hide.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x413A++0x00 hide.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" endif group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hyp Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " HVBADDR ,Hyp Vector Base Address" tree.end width 12. tree "Cache Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,?..." textline " " bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,?..." bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Not implemented,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,Reserved,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,8 words,16 words,?..." endif group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/Unified,Instruction" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c15:0x10EF++0x00 line.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" bitfld.long 0x00 1.--2. " LEVEL ,Cache level" "L1,L2,Reserved,Reserved" else hgroup.long c15:0x10EF++0x00 hide.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" endif tree "Level 1 memory system" width 10. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" wgroup.long c15:0x004F++0x00 line.long 0x00 "RAMINDEX,RAM Index Register" hexmask.long.byte 0x00 24.--31. 1. " RAMID ,RAM identifier" bitfld.long 0x00 18.--21. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" textline " " group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 31. " TLB_WAY ,TLB Way" "Low,High" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" bitfld.long 0x00 31. " PMOESID ,Partial MOESI state / Dirty" "Low,High" bitfld.long 0x00 30. " POMA ,Partial Outer memory attribute" "Low,High" bitfld.long 0x00 29. " PMOESIE ,Partial MOESI state / Exclusive" "Low,High" textline " " bitfld.long 0x00 28. " PMOESIV ,Partial MOESI state / Valid" "Low,High" bitfld.long 0x00 27. " NS ,Non-Secure state" "Low,High" hexmask.long 0x00 0.--26. 1. " TA ,Tag Address" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" bitfld.long 0x00 0. " PMOESID ,Partial MOESI state / Globally shared" "Low,High" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long 0x00 6.--30. 1. " SI ,Set index" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" if (((d.l(c15:0x1000))&0xFFFE000)==0x1DE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x1) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--13. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x2) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--15. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--16. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x7FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--17. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0xFFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--18. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--19. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--20. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" else hgroup.long c15:0x314F++0x0 hide.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" endif if (((d.l(c15:0x324F))&0x100)==0x100) wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" else wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 30.--31. " TLB_WAY ,TLB Way" "0,1,2,3" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" endif endif tree.end tree "Level 2 memory system" width 11. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" textline " " bitfld.long 0x00 21. " ECCPE ,ECC and parity enable" "Disabled,Enabled" bitfld.long 0x00 12. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 10.--11. " DRAMSLICE ,Data RAM slice" "0,1,2,Invalid" textline " " bitfld.long 0x00 9. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. " TRAML ,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" bitfld.long 0x00 5. " DRAMS ,L2 Data RAM setup" "0 cycle,1 cycle" textline " " bitfld.long 0x00 0.--2. " DRAML ,L2 Data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. " NCPU ,Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" bitfld.long 0x00 0. " DRAML ,L2 data RAM latency" "2 cycles,3 cycles" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 27.--30. " IWINC ,Controls index incrementation method" "1.,1.,3.,7.,15.,31.,63.,127.,255.,511.,1023.,2047.,4095.,8191.,8191.,8191." rbitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 20. " SFEN , Snoop Filter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " L2ECCD ,L2 ECC Disable" "No,Yes" bitfld.long 0x00 18. " L2CD ,L2 cache disable" "No,Yes" bitfld.long 0x00 15.--17. " TRAMSL ,Tag RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 12.--14. " TRAMRL ,Tag RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 9.--11. " TRAMWL ,Tag RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 6.--8. " DRAMSL ,Data RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 3.--5. " DRAMRL ,Data RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 0.--2. " DRAMWL ,Data RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. " FL2TBCEA ,Forces L2 tag bank clock enable active" "Not forced,Forced" bitfld.long 0x00 27. " FL2LCEA ,Forces L2 logic clock enable active" "Not forced,Forced" bitfld.long 0x00 26. " EL2GTRCG ,Enables L2 GIC and Timer regional clock gates" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ERTSI ,Enables replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. " ECWRM ,Enable CPU WFI retention mode" "Disabled,Enabled" bitfld.long 0x00 14. " EUCE ,Enables UniqueClean evictions with data" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DSCDT ,Disables SharedClean data transfers" "No,Yes" bitfld.long 0x00 12. " DWCWBE ,Disable multiple outstanding WriteClean/WriteBack/Evicts using the same AWID" "No,Yes" bitfld.long 0x00 11. " DDSB ,Disables DSB with no DVM synchronization" "No,Yes" textline " " bitfld.long 0x00 10. " DNSDAR ,Disables non-secure debug array read" "No,Yes" bitfld.long 0x00 9. " EPF ,Enable use of Prefetch bit in L2 cache replacement algorithm" "Disabled,Enabled" bitfld.long 0x00 8. " DDVMCMOMB ,Disables Distributed Virtual Memory (DVM) transactions and cache maintenance operation message broadcast" "No,Yes" textline " " bitfld.long 0x00 7. " EHDT ,Enables hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. " DSTFM ,Disables shared transactions from master" "No,Yes" bitfld.long 0x00 4. " DWUAWLUTFM ,Disables WriteUnique and WriteLineUnique transactions from master" "No,Yes" textline " " bitfld.long 0x00 3. " DCEPTE ,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. " LTORPTB ,Limit to one request per tag bank" "Disabled,Enabled" bitfld.long 0x00 1. " EARTT ,Enable arbitration replay threshold timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DPF ,Disable prefetch forwarding" "No,Yes" group.long c15:0x130F++0x00 line.long 0x00 "L2PFR,L2 Prefetch Control Register" bitfld.long 0x00 12. " DDTOLSPR ,Disable dynamic throttling of load/store prefetch requests" "No,Yes" bitfld.long 0x00 11. " EPRFRUT ,Enable prefetch request from ReadUnique transactions" "Disabled,Enabled" bitfld.long 0x00 10. " DTWDAP ,Disable table walk descriptor access prefetch" "No,Yes" textline " " bitfld.long 0x00 7.--8. " L2IFPD ,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.long 0x00 4.--5. " L2LSDPD ,L2 load/store data prefetch distance" "0 lines,2 lines,4 lines,8 lines" textline " " group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--21. " C/W ,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" hgroup.quad c15:0x110F0++0x01 hide.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " ECCUNERR ,ECC uncorrectable error " "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0. " L2DRC ,Disable L2 retention" "No,Yes" rgroup.long c15:0x1609++0x00 line.long 0x00 "L2MRERRSR,L2 Memory Error Syndrome Register" bitfld.long 0x00 31. " FATAL ,Fatal bit" "0,1" bitfld.long 0x00 25.--30. " OEC ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 19.--24. " REC ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 6.--18. 1. " ERRLIND ,Index Error Location" textline " " bitfld.long 0x00 2.--5. " ERRLWAY ,Way Error Location" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " RAMID ,RAM Identifier" "TAG,DATA" bitfld.long 0x00 0. " VALID ,Valid bit" "Not valid,Valid" endif tree.end tree.end width 12. tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. " X ,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" textline " " bitfld.long 0x00 2. " C ,Clock Counter Reset" "No reset,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled" group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 5. " P5 ,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,Event Counter 3 enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 5. " P5 ,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. " P4 ,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Event Counter 3 clear bit" "Disabled,Enabled" textline " " eventfld.long 0x00 2. " P2 ,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 5. " P5 ,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. " P4 ,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" textline " " bitfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" bitfld.long 0x00 31. " P ,Execution at PL1 events counting disable" "No,Yes" bitfld.long 0x00 30. " U ,Execution at PL0 events counting disable" "No,Yes" bitfld.long 0x00 29. " NSK ,Execution in Non-secure state at PL1 events counting disable" "No,Yes" bitfld.long 0x00 28. " NSU ,Execution in Non-secure state at PL0 events counting disable" "No,Yes" textline " " bitfld.long 0x00 27. " NSH ,Execution in Non-secure state at PL2 events counting enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " EVTCOUNT ,Event to count" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 0. " EN ,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 5. " P5 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " P4 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " P1 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" bitfld.long 0x00 31. " C ,PMCCNTR overflow bit" "Not overflowed,Overflowed" bitfld.long 0x00 30. " P30 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 29. " P29 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 28. " P28 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 26. " P26 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 25. " P25 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 24. " P24 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 22. " P22 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 21. " P21 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 20. " P20 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " P19 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 18. " P18 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 17. " P17 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 16. " P16 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " P15 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 14. " P14 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 13. " P13 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 12. " P12 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " P11 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 10. " P10 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 9. " P9 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 8. " P8 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " P3 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 2. " P2 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter Overflow" "Disabled,Enabled" tree.end width 12. tree "System Timer Register" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. " PL0PTEN ,Controls whether the physical timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. " PL0VTEN ,Controls whether the virtual timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. " PL0VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline " " bitfld.long 0x00 0. " PL0PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline "" group.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Timer Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" textline "" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" textline "" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTPCTis the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PL1VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. " PL1PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" tree.end width 11. width 15. tree "Debug Registers" rgroup.long c14:0.++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version" bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High" bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Supported,Not supported" textline " " bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number" textline " " hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") wgroup.long c14:6.++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." rbitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" rbitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " rbitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" endif group.long c14:0x7++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. " NSF ,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. " NSI ,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. " NSD ,Data Abort vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " NSP ,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. " NSS ,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. " NSU ,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " NSHF ,FIQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 22. " NSHI ,IRQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 21. " NSHE ,Hyp Trap or Hyp mode entry exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " NSHD ,Data Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 19. " NSHP ,Prefetch Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 18. " NSHC ,Hypervisor Call. from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " NSHU ,Undefined Instruction, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " MF ,FIQ vector catch enable, in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. " MI ,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MD ,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 11. " MP ,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. " MS ,SMC vector catch enable in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SF ,FIQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 6. " SI ,IRQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. " SD ,Data Abort vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SP ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 2. " SS ,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. " SU ,Undefined instruction vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " R ,Reset vector catch enable" "Disabled,Enabled" group.long c14:9.++0x0 line.long 0x00 "DBGECR,Debug Event Catch Register" bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled" group.long c14:32.++0x0 line.long 0x00 "DBGDTRRX,Debug Receive Register (External View)" wgroup.long c14:33.++0x0 line.long 0x00 "DBGITR,Debug Instruction Transfer Register" rgroup.long c14:33.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,Reserved,Thumb" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault Status" "Not caused,Caused" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " rbitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif endif wgroup.long c14:35.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit Register (External View)" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" bitfld.long 0x00 1. " RRQ ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HRQ ,Halt request" "No effect,Halt" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 4. " CBRRQ ,CBRRQ" "Low,High" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" textline " " bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" bitfld.long 0x00 2. " DECRR ,Debug extend core reset request" "No request,Request" bitfld.long 0x00 1. " DPDO ,Debug power-down override" "Disabled,Enabled" bitfld.long 0x00 0. " DCSC ,Debug clock stop control" "Stopped,Running" textline " " elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" endif rgroup.long c14:40.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,?..." rgroup.long c14:41.++0x0 line.long 0x00 "DBGCIDSR,DBGCIDSR" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,Virtualization ID Sampling Register" bitfld.long 0x00 31. " NS ,NS state sample" "Secure,Non-secure" bitfld.long 0x00 30. " H ,Hyp mode sample" "Not associated,Associated" hexmask.long.byte 0x00 0.--7. 1. " VMID ,VMID sample" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,DBGVIDSR" endif width 15. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITOCTRL,Debug Integration Output Control Register" bitfld.long 0x00 3. " NPMUIRQ ,Drives the nPMUIRQ output" "Low,High" bitfld.long 0x00 2. " CTI_PMUIRQ ,Drives the internal signal equivalent to PMUIRQ that goes from the Performance Monitor Unit (PMU) to the Cross Trigger Interface (CTI)" "Low,High" bitfld.long 0x00 1. " CTI_DBGRESTARTED ,Drives the internal signal that goes from the Debug unit to the CTI to acknowledge success of a debug restart command" "Low,High" bitfld.long 0x00 0. " CTI_DBGTRIGGER ,Drives the internal signal equivalent to DBGTRIGGER that goes from the Debug unit to the CTI" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITMISCOUT,Integration Miscellaneous Signals Output Register" bitfld.long 0x00 9. " DBGRESTARTED ,Value of the DBGRESTARTED output pin" "Low,High" bitfld.long 0x00 4. " PMUIRQ ,Value of PMUIRQ output pin" "Low,High" bitfld.long 0x00 0. " DBGACK ,Value of the DBGACK output pin" "Low,High" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c14:959.++0x0 line.long 0x00 "DBGITISR,Debug Integration Input Status Register" bitfld.long 0x00 3. " DBGSWENABLE ,Reads the state of the DBGSWENABLE input" "Low,High" bitfld.long 0x00 2. " CTI_DBGRESTART ,CTI debug restart" "Low,High" bitfld.long 0x00 1. " CTI_EDBGRQ ,CTI debug request" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Reads the state of the EDBGRQ input" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " rgroup.long c14:959.++0x0 line.long 0x00 "DBGITMISCIN,Integration Miscellaneous Signals Input Register" bitfld.long 0x00 2. " NFIQ ,Read value of nFIQ input pin" "Low,High" bitfld.long 0x00 1. " NIRQ ,Read value of nIRQ input pin" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Read value of EDBGRQ input pin" "Low,High" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) rgroup.quad c14:128.++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad 0x0 12.--39. 0x1000 " ROMADDR ,ROM physical address" bitfld.quad 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.quad c14:256.++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.quad 0x0 12.--39. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.quad 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" else rgroup.long c14:128.++0x0 line.long 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.long 0x0 12.--31. 0x1000 " ROMADDR ,ROM physical address" bitfld.long 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.long c14:256.++0x0 line.long 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.long 0x0 12.--31. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.long 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" endif group.long c14:195.++0x00 line.long 0x00 "DBGOSDLR,OS Double Lock Register" bitfld.long 0x00 0. " DLK ,OS Double Lock control bit" "Unlocked,Locked" else hgroup.quad c14:128.++0x1 hide.quad 0x0 "DBGDRAR,Debug ROM Address Register" hgroup.quad c14:256.++0x1 hide.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hgroup.long c14:195.++0x00 hide.long 0x00 "DBGOSDLR,OS Double Lock Register" endif wgroup.long c14:192.++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:193.++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 1. " OSLK ,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. " OSLM ,OS Lock Model implemented Bit" "Reserved,Reserved,W/o DBGOSSRR,?..." group.long c14:196.++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 3. " COREPURQ ,Core Power Up Request" "Low,High" bitfld.long 0x00 2. " HCWR ,Hold Core Warm Reset" "No reset,Reset" bitfld.long 0x00 1. " CWRR ,Core Warm Reset Request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " CORENPDRQ ,Core No Power down Request" "Low,High" rgroup.long c14:197.++0x0 line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register" bitfld.long 0x00 6. " DLK ,OS Double Lock status" "Low,High" bitfld.long 0x00 5. " OSLK ,OS Lock status" "Low,High" bitfld.long 0x00 4. " HALTED ,Halted" "Low,High" textline " " bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Low,High" bitfld.long 0x00 2. " RS ,Reset Status" "Low,High" bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Low,High" textline " " bitfld.long 0x00 0. " PU ,Power-up Status" "Low,High" tree "Processor ID registers" rgroup.long c14:(832.+0.)++0x00 line.long 0x00 "PIDR0,Processor ID register 0" rgroup.long c14:(832.+1.)++0x00 line.long 0x00 "PIDR1,Processor ID register 1" rgroup.long c14:(832.+2.)++0x00 line.long 0x00 "PIDR2,Processor ID register 2" rgroup.long c14:(832.+3.)++0x00 line.long 0x00 "PIDR3,Processor ID register 3" rgroup.long c14:(832.+4.)++0x00 line.long 0x00 "PIDR4,Processor ID register 4" rgroup.long c14:(832.+5.)++0x00 line.long 0x00 "PIDR5,Processor ID register 5" rgroup.long c14:(832.+6.)++0x00 line.long 0x00 "PIDR6,Processor ID register 6" rgroup.long c14:(832.+7.)++0x00 line.long 0x00 "PIDR7,Processor ID register 7" rgroup.long c14:(832.+8.)++0x00 line.long 0x00 "PIDR8,Processor ID register 8" rgroup.long c14:(832.+9.)++0x00 line.long 0x00 "PIDR9,Processor ID register 9" rgroup.long c14:(832.+10.)++0x00 line.long 0x00 "PIDR10,Processor ID register 10" rgroup.long c14:(832.+11.)++0x00 line.long 0x00 "PIDR11,Processor ID register 11" rgroup.long c14:(832.+12.)++0x00 line.long 0x00 "PIDR12,Processor ID register 12" rgroup.long c14:(832.+13.)++0x00 line.long 0x00 "PIDR13,Processor ID register 13" rgroup.long c14:(832.+14.)++0x00 line.long 0x00 "PIDR14,Processor ID register 14" rgroup.long c14:(832.+15.)++0x00 line.long 0x00 "PIDR15,Processor ID register 15" rgroup.long c14:(832.+16.)++0x00 line.long 0x00 "PIDR16,Processor ID register 16" rgroup.long c14:(832.+17.)++0x00 line.long 0x00 "PIDR17,Processor ID register 17" rgroup.long c14:(832.+18.)++0x00 line.long 0x00 "PIDR18,Processor ID register 18" rgroup.long c14:(832.+19.)++0x00 line.long 0x00 "PIDR19,Processor ID register 19" rgroup.long c14:(832.+20.)++0x00 line.long 0x00 "PIDR20,Processor ID register 20" rgroup.long c14:(832.+21.)++0x00 line.long 0x00 "PIDR21,Processor ID register 21" rgroup.long c14:(832.+22.)++0x00 line.long 0x00 "PIDR22,Processor ID register 22" rgroup.long c14:(832.+23.)++0x00 line.long 0x00 "PIDR23,Processor ID register 23" rgroup.long c14:(832.+24.)++0x00 line.long 0x00 "PIDR24,Processor ID register 24" rgroup.long c14:(832.+25.)++0x00 line.long 0x00 "PIDR25,Processor ID register 25" rgroup.long c14:(832.+26.)++0x00 line.long 0x00 "PIDR26,Processor ID register 26" rgroup.long c14:(832.+27.)++0x00 line.long 0x00 "PIDR27,Processor ID register 27" rgroup.long c14:(832.+28.)++0x00 line.long 0x00 "PIDR28,Processor ID register 28" rgroup.long c14:(832.+29.)++0x00 line.long 0x00 "PIDR29,Processor ID register 29" rgroup.long c14:(832.+30.)++0x00 line.long 0x00 "PIDR30,Processor ID register 30" rgroup.long c14:(832.+31.)++0x00 line.long 0x00 "PIDR31,Processor ID register 31" rgroup.long c14:(832.+32.)++0x00 line.long 0x00 "PIDR32,Processor ID register 32" rgroup.long c14:(832.+33.)++0x00 line.long 0x00 "PIDR33,Processor ID register 33" rgroup.long c14:(832.+34.)++0x00 line.long 0x00 "PIDR34,Processor ID register 34" rgroup.long c14:(832.+35.)++0x00 line.long 0x00 "PIDR35,Processor ID register 35" rgroup.long c14:(832.+36.)++0x00 line.long 0x00 "PIDR36,Processor ID register 36" rgroup.long c14:(832.+37.)++0x00 line.long 0x00 "PIDR37,Processor ID register 37" rgroup.long c14:(832.+38.)++0x00 line.long 0x00 "PIDR38,Processor ID register 38" rgroup.long c14:(832.+39.)++0x00 line.long 0x00 "PIDR39,Processor ID register 39" rgroup.long c14:(832.+40.)++0x00 line.long 0x00 "PIDR40,Processor ID register 40" rgroup.long c14:(832.+41.)++0x00 line.long 0x00 "PIDR41,Processor ID register 41" rgroup.long c14:(832.+42.)++0x00 line.long 0x00 "PIDR42,Processor ID register 42" rgroup.long c14:(832.+43.)++0x00 line.long 0x00 "PIDR43,Processor ID register 43" rgroup.long c14:(832.+44.)++0x00 line.long 0x00 "PIDR44,Processor ID register 44" rgroup.long c14:(832.+45.)++0x00 line.long 0x00 "PIDR45,Processor ID register 45" rgroup.long c14:(832.+46.)++0x00 line.long 0x00 "PIDR46,Processor ID register 46" rgroup.long c14:(832.+47.)++0x00 line.long 0x00 "PIDR47,Processor ID register 47" rgroup.long c14:(832.+48.)++0x00 line.long 0x00 "PIDR48,Processor ID register 48" rgroup.long c14:(832.+49.)++0x00 line.long 0x00 "PIDR49,Processor ID register 49" rgroup.long c14:(832.+50.)++0x00 line.long 0x00 "PIDR50,Processor ID register 50" rgroup.long c14:(832.+51.)++0x00 line.long 0x00 "PIDR51,Processor ID register 51" rgroup.long c14:(832.+52.)++0x00 line.long 0x00 "PIDR52,Processor ID register 52" rgroup.long c14:(832.+53.)++0x00 line.long 0x00 "PIDR53,Processor ID register 53" rgroup.long c14:(832.+54.)++0x00 line.long 0x00 "PIDR54,Processor ID register 54" rgroup.long c14:(832.+55.)++0x00 line.long 0x00 "PIDR55,Processor ID register 55" rgroup.long c14:(832.+56.)++0x00 line.long 0x00 "PIDR56,Processor ID register 56" rgroup.long c14:(832.+57.)++0x00 line.long 0x00 "PIDR57,Processor ID register 57" rgroup.long c14:(832.+58.)++0x00 line.long 0x00 "PIDR58,Processor ID register 58" rgroup.long c14:(832.+59.)++0x00 line.long 0x00 "PIDR59,Processor ID register 59" rgroup.long c14:(832.+60.)++0x00 line.long 0x00 "PIDR60,Processor ID register 60" rgroup.long c14:(832.+61.)++0x00 line.long 0x00 "PIDR61,Processor ID register 61" rgroup.long c14:(832.+62.)++0x00 line.long 0x00 "PIDR62,Processor ID register 62" rgroup.long c14:(832.+63.)++0x00 line.long 0x00 "PIDR63,Processor ID register 63" tree.end tree "Coresight Management Registers" group.long c14:960.++0x0 line.long 0x00 "DBGITCTRL,Debug Integration Mode Control Register" bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group.long c14:1000.++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Set" "Not set,Set" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Set" "Not set,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Set" "Not set,Set" group.long c14:1001.++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Clear" "Not cleared,Cleared" wgroup.long c14:1004.++0x00 line.long 0x00 "DBGLAR,Lock Access Register" rgroup.long c14:1005.++0x00 line.long 0x00 "DBGLSR,Lock Status Register" bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit" bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked" bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented" textline " " rgroup.long c14:1006.++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled" bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented" textline " " bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled" bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Depends on instr set state,No offset,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Reserved,No offset,?..." endif textline " " rgroup.long c14:1010.++0x0 line.long 0x0 "DBGDEVID0,Debug Device ID Register 0" bitfld.long 0x0 24.--27. " AR ,Debug External Auxiliary Control Register support status" "Reserved,Supported,?..." bitfld.long 0x0 20.--23. " DL ,Support for Debug OS Double Lock Register" "Reserved,Supported,?..." bitfld.long 0x0 16.--19. " VE ,Specifies implementation of Virtualization Extension" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 12.--15. " VC ,Form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x0 8.--11. " BPAM ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.long 0x0 4.--7. " WPAM ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 0.--3. " PCS ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." textline " " rgroup.long c14:1011.++0x00 line.long 0x00 "DBGDEVTYPE,Debug Device Type Register" bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:1016.++0x00 line.long 0x00 "DBGPID0,Debug Peripheral ID 0" hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]" rgroup.long c14:1017.++0x00 line.long 0x00 "DBGPID1,Debug Peripheral ID 1" hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]" hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]" rgroup.long c14:1018.++0x00 line.long 0x00 "DBGPID2,Debug Peripheral ID 2" hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled" hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]" rgroup.long c14:1019.++0x00 line.long 0x00 "DBGPID3,Debug Peripheral ID 3" hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision" hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified" rgroup.long c14:1012.++0x00 line.long 0x00 "DBGPID4,Debug Peripheral ID 4" hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code" rgroup.long c14:1020.++0x00 line.long 0x00 "DBGCID0,Debug Component ID 0" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0" rgroup.long c14:1021.++0x00 line.long 0x00 "DBGCID1,Debug Component ID 1" hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1" rgroup.long c14:1022.++0x00 line.long 0x00 "DBGCID2,Debug Component ID 2" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2" rgroup.long c14:1023.++0x00 line.long 0x00 "DBGCID3,Debug Component ID 3" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3" tree.end tree.end width 10. tree "Breakpoint Registers" if ((d.l(c14:80.+0.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+0.)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+1.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+1.)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+2.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+2.)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+3.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+3.)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+4.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+4.)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+5.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+5.)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" group.long c14:148.++0x0 line.long 0x00 "DBGBXVR0,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" group.long c14:149.++0x0 line.long 0x00 "DBGBXVR1,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" tree.end width 10. tree "Watchpoint Control Registers" group.long c14:(96.+0.)++0x00 line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+1.)++0x00 line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+2.)++0x00 line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+3.)++0x00 line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif tree.end width 0xb base AD:0xf1000000 tree "Interrupt Controller" width 11. group.long 0x1000++0x03 "Interrupt Controller Distributor" line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global Interrupt Enable" "Disabled,Enabled" rgroup.long 0x1004++0x03 line.long 0x00 "GICD_ICTR,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "No effect,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "up to 32/0 external,up to 64/32 external,up to 96/64 external,up to 128/96 external,up to 160/128 external,up to 192/160 external,up to 224/192 external,up to 256/224 external,?..." rgroup.long 0x1008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identfication Register" hexmask.long.byte 0x00 24.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") width 11. group.long 0x1080++0x03 line.long 0x0 "GICD_ISR0,Interrupt Security Register 0" bitfld.long 0x00 31. " SSB31 ,Security Status Bit 31" "Not secured,Secured" bitfld.long 0x00 30. " SSB30 ,Security Status Bit 30" "Not secured,Secured" bitfld.long 0x00 29. " SSB29 ,Security Status Bit 29" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB28 ,Security Status Bit 28" "Not secured,Secured" bitfld.long 0x00 27. " SSB27 ,Security Status Bit 27" "Not secured,Secured" bitfld.long 0x00 26. " SSB26 ,Security Status Bit 26" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB25 ,Security Status Bit 25" "Not secured,Secured" bitfld.long 0x00 24. " SSB24 ,Security Status Bit 24" "Not secured,Secured" bitfld.long 0x00 23. " SSB23 ,Security Status Bit 23" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB22 ,Security Status Bit 22" "Not secured,Secured" bitfld.long 0x00 21. " SSB21 ,Security Status Bit 21" "Not secured,Secured" bitfld.long 0x00 20. " SSB20 ,Security Status Bit 20" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB19 ,Security Status Bit 19" "Not secured,Secured" bitfld.long 0x00 18. " SSB18 ,Security Status Bit 18" "Not secured,Secured" bitfld.long 0x00 17. " SSB17 ,Security Status Bit 17" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB16 ,Security Status Bit 16" "Not secured,Secured" bitfld.long 0x00 15. " SSB15 ,Security Status Bit 15" "Not secured,Secured" bitfld.long 0x00 14. " SSB14 ,Security Status Bit 14" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB13 ,Security Status Bit 13" "Not secured,Secured" bitfld.long 0x00 12. " SSB12 ,Security Status Bit 12" "Not secured,Secured" bitfld.long 0x00 11. " SSB11 ,Security Status Bit 11" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB10 ,Security Status Bit 10" "Not secured,Secured" bitfld.long 0x00 9. " SSB9 ,Security Status Bit 9" "Not secured,Secured" bitfld.long 0x00 8. " SSB8 ,Security Status Bit 8" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB7 ,Security Status Bit 7" "Not secured,Secured" bitfld.long 0x00 6. " SSB6 ,Security Status Bit 6" "Not secured,Secured" bitfld.long 0x00 5. " SSB5 ,Security Status Bit 5" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB4 ,Security Status Bit 4" "Not secured,Secured" bitfld.long 0x00 3. " SSB3 ,Security Status Bit 3" "Not secured,Secured" bitfld.long 0x00 2. " SSB2 ,Security Status Bit 2" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB1 ,Security Status Bit 1" "Not secured,Secured" bitfld.long 0x00 0. " SSB0 ,Security Status Bit 0" "Not secured,Secured" group.long 0x1084++0x03 line.long 0x0 "GICD_ISR1,Interrupt Security Register 1" bitfld.long 0x00 31. " SSB63 ,Security Status Bit 63" "Not secured,Secured" bitfld.long 0x00 30. " SSB62 ,Security Status Bit 62" "Not secured,Secured" bitfld.long 0x00 29. " SSB61 ,Security Status Bit 61" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB60 ,Security Status Bit 60" "Not secured,Secured" bitfld.long 0x00 27. " SSB59 ,Security Status Bit 59" "Not secured,Secured" bitfld.long 0x00 26. " SSB58 ,Security Status Bit 58" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB57 ,Security Status Bit 57" "Not secured,Secured" bitfld.long 0x00 24. " SSB56 ,Security Status Bit 56" "Not secured,Secured" bitfld.long 0x00 23. " SSB55 ,Security Status Bit 55" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB54 ,Security Status Bit 54" "Not secured,Secured" bitfld.long 0x00 21. " SSB53 ,Security Status Bit 53" "Not secured,Secured" bitfld.long 0x00 20. " SSB52 ,Security Status Bit 52" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB51 ,Security Status Bit 51" "Not secured,Secured" bitfld.long 0x00 18. " SSB50 ,Security Status Bit 50" "Not secured,Secured" bitfld.long 0x00 17. " SSB49 ,Security Status Bit 49" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB48 ,Security Status Bit 48" "Not secured,Secured" bitfld.long 0x00 15. " SSB47 ,Security Status Bit 47" "Not secured,Secured" bitfld.long 0x00 14. " SSB46 ,Security Status Bit 46" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB45 ,Security Status Bit 45" "Not secured,Secured" bitfld.long 0x00 12. " SSB44 ,Security Status Bit 44" "Not secured,Secured" bitfld.long 0x00 11. " SSB43 ,Security Status Bit 43" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB42 ,Security Status Bit 42" "Not secured,Secured" bitfld.long 0x00 9. " SSB41 ,Security Status Bit 41" "Not secured,Secured" bitfld.long 0x00 8. " SSB40 ,Security Status Bit 40" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB39 ,Security Status Bit 39" "Not secured,Secured" bitfld.long 0x00 6. " SSB38 ,Security Status Bit 38" "Not secured,Secured" bitfld.long 0x00 5. " SSB37 ,Security Status Bit 37" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB36 ,Security Status Bit 36" "Not secured,Secured" bitfld.long 0x00 3. " SSB35 ,Security Status Bit 35" "Not secured,Secured" bitfld.long 0x00 2. " SSB34 ,Security Status Bit 34" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB33 ,Security Status Bit 33" "Not secured,Secured" bitfld.long 0x00 0. " SSB32 ,Security Status Bit 32" "Not secured,Secured" group.long 0x1088++0x03 line.long 0x0 "GICD_ISR2,Interrupt Security Register 2" bitfld.long 0x00 31. " SSB95 ,Security Status Bit 95" "Not secured,Secured" bitfld.long 0x00 30. " SSB94 ,Security Status Bit 94" "Not secured,Secured" bitfld.long 0x00 29. " SSB93 ,Security Status Bit 93" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB92 ,Security Status Bit 92" "Not secured,Secured" bitfld.long 0x00 27. " SSB91 ,Security Status Bit 91" "Not secured,Secured" bitfld.long 0x00 26. " SSB90 ,Security Status Bit 90" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB89 ,Security Status Bit 89" "Not secured,Secured" bitfld.long 0x00 24. " SSB88 ,Security Status Bit 88" "Not secured,Secured" bitfld.long 0x00 23. " SSB87 ,Security Status Bit 87" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB86 ,Security Status Bit 86" "Not secured,Secured" bitfld.long 0x00 21. " SSB85 ,Security Status Bit 85" "Not secured,Secured" bitfld.long 0x00 20. " SSB84 ,Security Status Bit 84" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB83 ,Security Status Bit 83" "Not secured,Secured" bitfld.long 0x00 18. " SSB82 ,Security Status Bit 82" "Not secured,Secured" bitfld.long 0x00 17. " SSB81 ,Security Status Bit 81" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB80 ,Security Status Bit 80" "Not secured,Secured" bitfld.long 0x00 15. " SSB79 ,Security Status Bit 79" "Not secured,Secured" bitfld.long 0x00 14. " SSB78 ,Security Status Bit 78" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB77 ,Security Status Bit 77" "Not secured,Secured" bitfld.long 0x00 12. " SSB76 ,Security Status Bit 76" "Not secured,Secured" bitfld.long 0x00 11. " SSB75 ,Security Status Bit 75" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB74 ,Security Status Bit 74" "Not secured,Secured" bitfld.long 0x00 9. " SSB73 ,Security Status Bit 73" "Not secured,Secured" bitfld.long 0x00 8. " SSB72 ,Security Status Bit 72" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB71 ,Security Status Bit 71" "Not secured,Secured" bitfld.long 0x00 6. " SSB70 ,Security Status Bit 70" "Not secured,Secured" bitfld.long 0x00 5. " SSB69 ,Security Status Bit 69" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB68 ,Security Status Bit 68" "Not secured,Secured" bitfld.long 0x00 3. " SSB67 ,Security Status Bit 67" "Not secured,Secured" bitfld.long 0x00 2. " SSB66 ,Security Status Bit 66" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB65 ,Security Status Bit 65" "Not secured,Secured" bitfld.long 0x00 0. " SSB64 ,Security Status Bit 64" "Not secured,Secured" group.long 0x108C++0x03 line.long 0x0 "GICD_ISR3,Interrupt Security Register 3" bitfld.long 0x00 31. " SSB127 ,Security Status Bit 127" "Not secured,Secured" bitfld.long 0x00 30. " SSB126 ,Security Status Bit 126" "Not secured,Secured" bitfld.long 0x00 29. " SSB125 ,Security Status Bit 125" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB124 ,Security Status Bit 124" "Not secured,Secured" bitfld.long 0x00 27. " SSB123 ,Security Status Bit 123" "Not secured,Secured" bitfld.long 0x00 26. " SSB122 ,Security Status Bit 122" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB121 ,Security Status Bit 121" "Not secured,Secured" bitfld.long 0x00 24. " SSB120 ,Security Status Bit 120" "Not secured,Secured" bitfld.long 0x00 23. " SSB119 ,Security Status Bit 119" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB118 ,Security Status Bit 118" "Not secured,Secured" bitfld.long 0x00 21. " SSB117 ,Security Status Bit 117" "Not secured,Secured" bitfld.long 0x00 20. " SSB116 ,Security Status Bit 116" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB115 ,Security Status Bit 115" "Not secured,Secured" bitfld.long 0x00 18. " SSB114 ,Security Status Bit 114" "Not secured,Secured" bitfld.long 0x00 17. " SSB113 ,Security Status Bit 113" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB112 ,Security Status Bit 112" "Not secured,Secured" bitfld.long 0x00 15. " SSB111 ,Security Status Bit 111" "Not secured,Secured" bitfld.long 0x00 14. " SSB110 ,Security Status Bit 110" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB109 ,Security Status Bit 109" "Not secured,Secured" bitfld.long 0x00 12. " SSB108 ,Security Status Bit 108" "Not secured,Secured" bitfld.long 0x00 11. " SSB107 ,Security Status Bit 107" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB106 ,Security Status Bit 106" "Not secured,Secured" bitfld.long 0x00 9. " SSB105 ,Security Status Bit 105" "Not secured,Secured" bitfld.long 0x00 8. " SSB104 ,Security Status Bit 104" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB103 ,Security Status Bit 103" "Not secured,Secured" bitfld.long 0x00 6. " SSB102 ,Security Status Bit 102" "Not secured,Secured" bitfld.long 0x00 5. " SSB101 ,Security Status Bit 101" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB100 ,Security Status Bit 100" "Not secured,Secured" bitfld.long 0x00 3. " SSB99 ,Security Status Bit 99" "Not secured,Secured" bitfld.long 0x00 2. " SSB98 ,Security Status Bit 98" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB97 ,Security Status Bit 97" "Not secured,Secured" bitfld.long 0x00 0. " SSB96 ,Security Status Bit 96" "Not secured,Secured" group.long 0x1090++0x03 line.long 0x0 "GICD_ISR4,Interrupt Security Register 4" bitfld.long 0x00 31. " SSB159 ,Security Status Bit 159" "Not secured,Secured" bitfld.long 0x00 30. " SSB158 ,Security Status Bit 158" "Not secured,Secured" bitfld.long 0x00 29. " SSB157 ,Security Status Bit 157" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB156 ,Security Status Bit 156" "Not secured,Secured" bitfld.long 0x00 27. " SSB155 ,Security Status Bit 155" "Not secured,Secured" bitfld.long 0x00 26. " SSB154 ,Security Status Bit 154" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB153 ,Security Status Bit 153" "Not secured,Secured" bitfld.long 0x00 24. " SSB152 ,Security Status Bit 152" "Not secured,Secured" bitfld.long 0x00 23. " SSB151 ,Security Status Bit 151" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB150 ,Security Status Bit 150" "Not secured,Secured" bitfld.long 0x00 21. " SSB149 ,Security Status Bit 149" "Not secured,Secured" bitfld.long 0x00 20. " SSB148 ,Security Status Bit 148" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB147 ,Security Status Bit 147" "Not secured,Secured" bitfld.long 0x00 18. " SSB146 ,Security Status Bit 146" "Not secured,Secured" bitfld.long 0x00 17. " SSB145 ,Security Status Bit 145" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB144 ,Security Status Bit 144" "Not secured,Secured" bitfld.long 0x00 15. " SSB143 ,Security Status Bit 143" "Not secured,Secured" bitfld.long 0x00 14. " SSB142 ,Security Status Bit 142" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB141 ,Security Status Bit 141" "Not secured,Secured" bitfld.long 0x00 12. " SSB140 ,Security Status Bit 140" "Not secured,Secured" bitfld.long 0x00 11. " SSB139 ,Security Status Bit 139" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB138 ,Security Status Bit 138" "Not secured,Secured" bitfld.long 0x00 9. " SSB137 ,Security Status Bit 137" "Not secured,Secured" bitfld.long 0x00 8. " SSB136 ,Security Status Bit 136" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB135 ,Security Status Bit 135" "Not secured,Secured" bitfld.long 0x00 6. " SSB134 ,Security Status Bit 134" "Not secured,Secured" bitfld.long 0x00 5. " SSB133 ,Security Status Bit 133" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB132 ,Security Status Bit 132" "Not secured,Secured" bitfld.long 0x00 3. " SSB131 ,Security Status Bit 131" "Not secured,Secured" bitfld.long 0x00 2. " SSB130 ,Security Status Bit 130" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB129 ,Security Status Bit 129" "Not secured,Secured" bitfld.long 0x00 0. " SSB128 ,Security Status Bit 128" "Not secured,Secured" group.long 0x1094++0x03 line.long 0x0 "GICD_ISR5,Interrupt Security Register 5" bitfld.long 0x00 31. " SSB191 ,Security Status Bit 191" "Not secured,Secured" bitfld.long 0x00 30. " SSB190 ,Security Status Bit 190" "Not secured,Secured" bitfld.long 0x00 29. " SSB189 ,Security Status Bit 189" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB188 ,Security Status Bit 188" "Not secured,Secured" bitfld.long 0x00 27. " SSB187 ,Security Status Bit 187" "Not secured,Secured" bitfld.long 0x00 26. " SSB186 ,Security Status Bit 186" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB185 ,Security Status Bit 185" "Not secured,Secured" bitfld.long 0x00 24. " SSB184 ,Security Status Bit 184" "Not secured,Secured" bitfld.long 0x00 23. " SSB183 ,Security Status Bit 183" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB182 ,Security Status Bit 182" "Not secured,Secured" bitfld.long 0x00 21. " SSB181 ,Security Status Bit 181" "Not secured,Secured" bitfld.long 0x00 20. " SSB180 ,Security Status Bit 180" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB179 ,Security Status Bit 179" "Not secured,Secured" bitfld.long 0x00 18. " SSB178 ,Security Status Bit 178" "Not secured,Secured" bitfld.long 0x00 17. " SSB177 ,Security Status Bit 177" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB176 ,Security Status Bit 176" "Not secured,Secured" bitfld.long 0x00 15. " SSB175 ,Security Status Bit 175" "Not secured,Secured" bitfld.long 0x00 14. " SSB174 ,Security Status Bit 174" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB173 ,Security Status Bit 173" "Not secured,Secured" bitfld.long 0x00 12. " SSB172 ,Security Status Bit 172" "Not secured,Secured" bitfld.long 0x00 11. " SSB171 ,Security Status Bit 171" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB170 ,Security Status Bit 170" "Not secured,Secured" bitfld.long 0x00 9. " SSB169 ,Security Status Bit 169" "Not secured,Secured" bitfld.long 0x00 8. " SSB168 ,Security Status Bit 168" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB167 ,Security Status Bit 167" "Not secured,Secured" bitfld.long 0x00 6. " SSB166 ,Security Status Bit 166" "Not secured,Secured" bitfld.long 0x00 5. " SSB165 ,Security Status Bit 165" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB164 ,Security Status Bit 164" "Not secured,Secured" bitfld.long 0x00 3. " SSB163 ,Security Status Bit 163" "Not secured,Secured" bitfld.long 0x00 2. " SSB162 ,Security Status Bit 162" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB161 ,Security Status Bit 161" "Not secured,Secured" bitfld.long 0x00 0. " SSB160 ,Security Status Bit 160" "Not secured,Secured" group.long 0x1098++0x03 line.long 0x0 "GICD_ISR6,Interrupt Security Register 6" bitfld.long 0x00 31. " SSB223 ,Security Status Bit 223" "Not secured,Secured" bitfld.long 0x00 30. " SSB222 ,Security Status Bit 222" "Not secured,Secured" bitfld.long 0x00 29. " SSB221 ,Security Status Bit 221" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB220 ,Security Status Bit 220" "Not secured,Secured" bitfld.long 0x00 27. " SSB219 ,Security Status Bit 219" "Not secured,Secured" bitfld.long 0x00 26. " SSB218 ,Security Status Bit 218" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB217 ,Security Status Bit 217" "Not secured,Secured" bitfld.long 0x00 24. " SSB216 ,Security Status Bit 216" "Not secured,Secured" bitfld.long 0x00 23. " SSB215 ,Security Status Bit 215" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB214 ,Security Status Bit 214" "Not secured,Secured" bitfld.long 0x00 21. " SSB213 ,Security Status Bit 213" "Not secured,Secured" bitfld.long 0x00 20. " SSB212 ,Security Status Bit 212" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB211 ,Security Status Bit 211" "Not secured,Secured" bitfld.long 0x00 18. " SSB210 ,Security Status Bit 210" "Not secured,Secured" bitfld.long 0x00 17. " SSB209 ,Security Status Bit 209" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB208 ,Security Status Bit 208" "Not secured,Secured" bitfld.long 0x00 15. " SSB207 ,Security Status Bit 207" "Not secured,Secured" bitfld.long 0x00 14. " SSB206 ,Security Status Bit 206" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB205 ,Security Status Bit 205" "Not secured,Secured" bitfld.long 0x00 12. " SSB204 ,Security Status Bit 204" "Not secured,Secured" bitfld.long 0x00 11. " SSB203 ,Security Status Bit 203" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB202 ,Security Status Bit 202" "Not secured,Secured" bitfld.long 0x00 9. " SSB201 ,Security Status Bit 201" "Not secured,Secured" bitfld.long 0x00 8. " SSB200 ,Security Status Bit 200" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB199 ,Security Status Bit 199" "Not secured,Secured" bitfld.long 0x00 6. " SSB198 ,Security Status Bit 198" "Not secured,Secured" bitfld.long 0x00 5. " SSB197 ,Security Status Bit 197" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB196 ,Security Status Bit 196" "Not secured,Secured" bitfld.long 0x00 3. " SSB195 ,Security Status Bit 195" "Not secured,Secured" bitfld.long 0x00 2. " SSB194 ,Security Status Bit 194" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB193 ,Security Status Bit 193" "Not secured,Secured" bitfld.long 0x00 0. " SSB192 ,Security Status Bit 192" "Not secured,Secured" group.long 0x109C++0x03 line.long 0x0 "GICD_ISR7,Interrupt Security Register 7" bitfld.long 0x00 31. " SSB255 ,Security Status Bit 255" "Not secured,Secured" bitfld.long 0x00 30. " SSB254 ,Security Status Bit 254" "Not secured,Secured" bitfld.long 0x00 29. " SSB253 ,Security Status Bit 253" "Not secured,Secured" textline " " bitfld.long 0x00 28. " SSB252 ,Security Status Bit 252" "Not secured,Secured" bitfld.long 0x00 27. " SSB251 ,Security Status Bit 251" "Not secured,Secured" bitfld.long 0x00 26. " SSB250 ,Security Status Bit 250" "Not secured,Secured" textline " " bitfld.long 0x00 25. " SSB249 ,Security Status Bit 249" "Not secured,Secured" bitfld.long 0x00 24. " SSB248 ,Security Status Bit 248" "Not secured,Secured" bitfld.long 0x00 23. " SSB247 ,Security Status Bit 247" "Not secured,Secured" textline " " bitfld.long 0x00 22. " SSB246 ,Security Status Bit 246" "Not secured,Secured" bitfld.long 0x00 21. " SSB245 ,Security Status Bit 245" "Not secured,Secured" bitfld.long 0x00 20. " SSB244 ,Security Status Bit 244" "Not secured,Secured" textline " " bitfld.long 0x00 19. " SSB243 ,Security Status Bit 243" "Not secured,Secured" bitfld.long 0x00 18. " SSB242 ,Security Status Bit 242" "Not secured,Secured" bitfld.long 0x00 17. " SSB241 ,Security Status Bit 241" "Not secured,Secured" textline " " bitfld.long 0x00 16. " SSB240 ,Security Status Bit 240" "Not secured,Secured" bitfld.long 0x00 15. " SSB239 ,Security Status Bit 239" "Not secured,Secured" bitfld.long 0x00 14. " SSB238 ,Security Status Bit 238" "Not secured,Secured" textline " " bitfld.long 0x00 13. " SSB237 ,Security Status Bit 237" "Not secured,Secured" bitfld.long 0x00 12. " SSB236 ,Security Status Bit 236" "Not secured,Secured" bitfld.long 0x00 11. " SSB235 ,Security Status Bit 235" "Not secured,Secured" textline " " bitfld.long 0x00 10. " SSB234 ,Security Status Bit 234" "Not secured,Secured" bitfld.long 0x00 9. " SSB233 ,Security Status Bit 233" "Not secured,Secured" bitfld.long 0x00 8. " SSB232 ,Security Status Bit 232" "Not secured,Secured" textline " " bitfld.long 0x00 7. " SSB231 ,Security Status Bit 231" "Not secured,Secured" bitfld.long 0x00 6. " SSB230 ,Security Status Bit 230" "Not secured,Secured" bitfld.long 0x00 5. " SSB229 ,Security Status Bit 229" "Not secured,Secured" textline " " bitfld.long 0x00 4. " SSB228 ,Security Status Bit 228" "Not secured,Secured" bitfld.long 0x00 3. " SSB227 ,Security Status Bit 227" "Not secured,Secured" bitfld.long 0x00 2. " SSB226 ,Security Status Bit 226" "Not secured,Secured" textline " " bitfld.long 0x00 1. " SSB225 ,Security Status Bit 225" "Not secured,Secured" bitfld.long 0x00 0. " SSB224 ,Security Status Bit 224" "Not secured,Secured" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") width 15. group.long 0x1080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" group.long 0x1084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" group.long 0x1088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" group.long 0x108C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" group.long 0x1090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" group.long 0x1094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" group.long 0x1098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" group.long 0x109c++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" group.long 0x10a0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" group.long 0x10a4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" group.long 0x10a8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" group.long 0x10ac++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" group.long 0x10b0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" group.long 0x10b4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" group.long 0x10b8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 17" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" group.long 0x10bc++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" endif textline " " group.long 0x1100++0x03 line.long 0x0 "GICD_ISER0,Interrupt Set Enable Register 0" bitfld.long 0x00 31. " SEB31 ,Set Enable Bit 31" "Disabled,Enabled" bitfld.long 0x00 30. " SEB30 ,Set Enable Bit 30" "Disabled,Enabled" bitfld.long 0x00 29. " SEB29 ,Set Enable Bit 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB28 ,Set Enable Bit 28" "Disabled,Enabled" bitfld.long 0x00 27. " SEB27 ,Set Enable Bit 27" "Disabled,Enabled" bitfld.long 0x00 26. " SEB26 ,Set Enable Bit 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB25 ,Set Enable Bit 25" "Disabled,Enabled" bitfld.long 0x00 24. " SEB24 ,Set Enable Bit 24" "Disabled,Enabled" bitfld.long 0x00 23. " SEB23 ,Set Enable Bit 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB22 ,Set Enable Bit 22" "Disabled,Enabled" bitfld.long 0x00 21. " SEB21 ,Set Enable Bit 21" "Disabled,Enabled" bitfld.long 0x00 20. " SEB20 ,Set Enable Bit 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB19 ,Set Enable Bit 19" "Disabled,Enabled" bitfld.long 0x00 18. " SEB18 ,Set Enable Bit 18" "Disabled,Enabled" bitfld.long 0x00 17. " SEB17 ,Set Enable Bit 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB16 ,Set Enable Bit 16" "Disabled,Enabled" bitfld.long 0x00 15. " SEB15 ,Set Enable Bit 15" "Disabled,Enabled" bitfld.long 0x00 14. " SEB14 ,Set Enable Bit 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB13 ,Set Enable Bit 13" "Disabled,Enabled" bitfld.long 0x00 12. " SEB12 ,Set Enable Bit 12" "Disabled,Enabled" bitfld.long 0x00 11. " SEB11 ,Set Enable Bit 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB10 ,Set Enable Bit 10" "Disabled,Enabled" bitfld.long 0x00 9. " SEB9 ,Set Enable Bit 9" "Disabled,Enabled" bitfld.long 0x00 8. " SEB8 ,Set Enable Bit 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB7 ,Set Enable Bit 7" "Disabled,Enabled" bitfld.long 0x00 6. " SEB6 ,Set Enable Bit 6" "Disabled,Enabled" bitfld.long 0x00 5. " SEB5 ,Set Enable Bit 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB4 ,Set Enable Bit 4" "Disabled,Enabled" bitfld.long 0x00 3. " SEB3 ,Set Enable Bit 3" "Disabled,Enabled" bitfld.long 0x00 2. " SEB2 ,Set Enable Bit 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB1 ,Set Enable Bit 1" "Disabled,Enabled" bitfld.long 0x00 0. " SEB0 ,Set Enable Bit 0" "Disabled,Enabled" group.long 0x1104++0x03 line.long 0x0 "GICD_ISER1,Interrupt Set Enable Register 1" bitfld.long 0x00 31. " SEB63 ,Set Enable Bit 63" "Disabled,Enabled" bitfld.long 0x00 30. " SEB62 ,Set Enable Bit 62" "Disabled,Enabled" bitfld.long 0x00 29. " SEB61 ,Set Enable Bit 61" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB60 ,Set Enable Bit 60" "Disabled,Enabled" bitfld.long 0x00 27. " SEB59 ,Set Enable Bit 59" "Disabled,Enabled" bitfld.long 0x00 26. " SEB58 ,Set Enable Bit 58" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB57 ,Set Enable Bit 57" "Disabled,Enabled" bitfld.long 0x00 24. " SEB56 ,Set Enable Bit 56" "Disabled,Enabled" bitfld.long 0x00 23. " SEB55 ,Set Enable Bit 55" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB54 ,Set Enable Bit 54" "Disabled,Enabled" bitfld.long 0x00 21. " SEB53 ,Set Enable Bit 53" "Disabled,Enabled" bitfld.long 0x00 20. " SEB52 ,Set Enable Bit 52" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB51 ,Set Enable Bit 51" "Disabled,Enabled" bitfld.long 0x00 18. " SEB50 ,Set Enable Bit 50" "Disabled,Enabled" bitfld.long 0x00 17. " SEB49 ,Set Enable Bit 49" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB48 ,Set Enable Bit 48" "Disabled,Enabled" bitfld.long 0x00 15. " SEB47 ,Set Enable Bit 47" "Disabled,Enabled" bitfld.long 0x00 14. " SEB46 ,Set Enable Bit 46" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB45 ,Set Enable Bit 45" "Disabled,Enabled" bitfld.long 0x00 12. " SEB44 ,Set Enable Bit 44" "Disabled,Enabled" bitfld.long 0x00 11. " SEB43 ,Set Enable Bit 43" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB42 ,Set Enable Bit 42" "Disabled,Enabled" bitfld.long 0x00 9. " SEB41 ,Set Enable Bit 41" "Disabled,Enabled" bitfld.long 0x00 8. " SEB40 ,Set Enable Bit 40" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB39 ,Set Enable Bit 39" "Disabled,Enabled" bitfld.long 0x00 6. " SEB38 ,Set Enable Bit 38" "Disabled,Enabled" bitfld.long 0x00 5. " SEB37 ,Set Enable Bit 37" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB36 ,Set Enable Bit 36" "Disabled,Enabled" bitfld.long 0x00 3. " SEB35 ,Set Enable Bit 35" "Disabled,Enabled" bitfld.long 0x00 2. " SEB34 ,Set Enable Bit 34" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB33 ,Set Enable Bit 33" "Disabled,Enabled" bitfld.long 0x00 0. " SEB32 ,Set Enable Bit 32" "Disabled,Enabled" group.long 0x1108++0x03 line.long 0x0 "GICD_ISER2,Interrupt Set Enable Register 2" bitfld.long 0x00 31. " SEB95 ,Set Enable Bit 95" "Disabled,Enabled" bitfld.long 0x00 30. " SEB94 ,Set Enable Bit 94" "Disabled,Enabled" bitfld.long 0x00 29. " SEB93 ,Set Enable Bit 93" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB92 ,Set Enable Bit 92" "Disabled,Enabled" bitfld.long 0x00 27. " SEB91 ,Set Enable Bit 91" "Disabled,Enabled" bitfld.long 0x00 26. " SEB90 ,Set Enable Bit 90" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB89 ,Set Enable Bit 89" "Disabled,Enabled" bitfld.long 0x00 24. " SEB88 ,Set Enable Bit 88" "Disabled,Enabled" bitfld.long 0x00 23. " SEB87 ,Set Enable Bit 87" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB86 ,Set Enable Bit 86" "Disabled,Enabled" bitfld.long 0x00 21. " SEB85 ,Set Enable Bit 85" "Disabled,Enabled" bitfld.long 0x00 20. " SEB84 ,Set Enable Bit 84" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB83 ,Set Enable Bit 83" "Disabled,Enabled" bitfld.long 0x00 18. " SEB82 ,Set Enable Bit 82" "Disabled,Enabled" bitfld.long 0x00 17. " SEB81 ,Set Enable Bit 81" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB80 ,Set Enable Bit 80" "Disabled,Enabled" bitfld.long 0x00 15. " SEB79 ,Set Enable Bit 79" "Disabled,Enabled" bitfld.long 0x00 14. " SEB78 ,Set Enable Bit 78" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB77 ,Set Enable Bit 77" "Disabled,Enabled" bitfld.long 0x00 12. " SEB76 ,Set Enable Bit 76" "Disabled,Enabled" bitfld.long 0x00 11. " SEB75 ,Set Enable Bit 75" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB74 ,Set Enable Bit 74" "Disabled,Enabled" bitfld.long 0x00 9. " SEB73 ,Set Enable Bit 73" "Disabled,Enabled" bitfld.long 0x00 8. " SEB72 ,Set Enable Bit 72" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB71 ,Set Enable Bit 71" "Disabled,Enabled" bitfld.long 0x00 6. " SEB70 ,Set Enable Bit 70" "Disabled,Enabled" bitfld.long 0x00 5. " SEB69 ,Set Enable Bit 69" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB68 ,Set Enable Bit 68" "Disabled,Enabled" bitfld.long 0x00 3. " SEB67 ,Set Enable Bit 67" "Disabled,Enabled" bitfld.long 0x00 2. " SEB66 ,Set Enable Bit 66" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB65 ,Set Enable Bit 65" "Disabled,Enabled" bitfld.long 0x00 0. " SEB64 ,Set Enable Bit 64" "Disabled,Enabled" group.long 0x110C++0x03 line.long 0x0 "GICD_ISER3,Interrupt Set Enable Register 3" bitfld.long 0x00 31. " SEB127 ,Set Enable Bit 127" "Disabled,Enabled" bitfld.long 0x00 30. " SEB126 ,Set Enable Bit 126" "Disabled,Enabled" bitfld.long 0x00 29. " SEB125 ,Set Enable Bit 125" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB124 ,Set Enable Bit 124" "Disabled,Enabled" bitfld.long 0x00 27. " SEB123 ,Set Enable Bit 123" "Disabled,Enabled" bitfld.long 0x00 26. " SEB122 ,Set Enable Bit 122" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB121 ,Set Enable Bit 121" "Disabled,Enabled" bitfld.long 0x00 24. " SEB120 ,Set Enable Bit 120" "Disabled,Enabled" bitfld.long 0x00 23. " SEB119 ,Set Enable Bit 119" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB118 ,Set Enable Bit 118" "Disabled,Enabled" bitfld.long 0x00 21. " SEB117 ,Set Enable Bit 117" "Disabled,Enabled" bitfld.long 0x00 20. " SEB116 ,Set Enable Bit 116" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB115 ,Set Enable Bit 115" "Disabled,Enabled" bitfld.long 0x00 18. " SEB114 ,Set Enable Bit 114" "Disabled,Enabled" bitfld.long 0x00 17. " SEB113 ,Set Enable Bit 113" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB112 ,Set Enable Bit 112" "Disabled,Enabled" bitfld.long 0x00 15. " SEB111 ,Set Enable Bit 111" "Disabled,Enabled" bitfld.long 0x00 14. " SEB110 ,Set Enable Bit 110" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB109 ,Set Enable Bit 109" "Disabled,Enabled" bitfld.long 0x00 12. " SEB108 ,Set Enable Bit 108" "Disabled,Enabled" bitfld.long 0x00 11. " SEB107 ,Set Enable Bit 107" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB106 ,Set Enable Bit 106" "Disabled,Enabled" bitfld.long 0x00 9. " SEB105 ,Set Enable Bit 105" "Disabled,Enabled" bitfld.long 0x00 8. " SEB104 ,Set Enable Bit 104" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB103 ,Set Enable Bit 103" "Disabled,Enabled" bitfld.long 0x00 6. " SEB102 ,Set Enable Bit 102" "Disabled,Enabled" bitfld.long 0x00 5. " SEB101 ,Set Enable Bit 101" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB100 ,Set Enable Bit 100" "Disabled,Enabled" bitfld.long 0x00 3. " SEB99 ,Set Enable Bit 99" "Disabled,Enabled" bitfld.long 0x00 2. " SEB98 ,Set Enable Bit 98" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB97 ,Set Enable Bit 97" "Disabled,Enabled" bitfld.long 0x00 0. " SEB96 ,Set Enable Bit 96" "Disabled,Enabled" group.long 0x1110++0x03 line.long 0x0 "GICD_ISER4,Interrupt Set Enable Register 4" bitfld.long 0x00 31. " SEB159 ,Set Enable Bit 159" "Disabled,Enabled" bitfld.long 0x00 30. " SEB158 ,Set Enable Bit 158" "Disabled,Enabled" bitfld.long 0x00 29. " SEB157 ,Set Enable Bit 157" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB156 ,Set Enable Bit 156" "Disabled,Enabled" bitfld.long 0x00 27. " SEB155 ,Set Enable Bit 155" "Disabled,Enabled" bitfld.long 0x00 26. " SEB154 ,Set Enable Bit 154" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB153 ,Set Enable Bit 153" "Disabled,Enabled" bitfld.long 0x00 24. " SEB152 ,Set Enable Bit 152" "Disabled,Enabled" bitfld.long 0x00 23. " SEB151 ,Set Enable Bit 151" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB150 ,Set Enable Bit 150" "Disabled,Enabled" bitfld.long 0x00 21. " SEB149 ,Set Enable Bit 149" "Disabled,Enabled" bitfld.long 0x00 20. " SEB148 ,Set Enable Bit 148" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB147 ,Set Enable Bit 147" "Disabled,Enabled" bitfld.long 0x00 18. " SEB146 ,Set Enable Bit 146" "Disabled,Enabled" bitfld.long 0x00 17. " SEB145 ,Set Enable Bit 145" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB144 ,Set Enable Bit 144" "Disabled,Enabled" bitfld.long 0x00 15. " SEB143 ,Set Enable Bit 143" "Disabled,Enabled" bitfld.long 0x00 14. " SEB142 ,Set Enable Bit 142" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB141 ,Set Enable Bit 141" "Disabled,Enabled" bitfld.long 0x00 12. " SEB140 ,Set Enable Bit 140" "Disabled,Enabled" bitfld.long 0x00 11. " SEB139 ,Set Enable Bit 139" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB138 ,Set Enable Bit 138" "Disabled,Enabled" bitfld.long 0x00 9. " SEB137 ,Set Enable Bit 137" "Disabled,Enabled" bitfld.long 0x00 8. " SEB136 ,Set Enable Bit 136" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB135 ,Set Enable Bit 135" "Disabled,Enabled" bitfld.long 0x00 6. " SEB134 ,Set Enable Bit 134" "Disabled,Enabled" bitfld.long 0x00 5. " SEB133 ,Set Enable Bit 133" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB132 ,Set Enable Bit 132" "Disabled,Enabled" bitfld.long 0x00 3. " SEB131 ,Set Enable Bit 131" "Disabled,Enabled" bitfld.long 0x00 2. " SEB130 ,Set Enable Bit 130" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB129 ,Set Enable Bit 129" "Disabled,Enabled" bitfld.long 0x00 0. " SEB128 ,Set Enable Bit 128" "Disabled,Enabled" group.long 0x1114++0x03 line.long 0x0 "GICD_ISER5,Interrupt Set Enable Register 5" bitfld.long 0x00 31. " SEB191 ,Set Enable Bit 191" "Disabled,Enabled" bitfld.long 0x00 30. " SEB190 ,Set Enable Bit 190" "Disabled,Enabled" bitfld.long 0x00 29. " SEB189 ,Set Enable Bit 189" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB188 ,Set Enable Bit 188" "Disabled,Enabled" bitfld.long 0x00 27. " SEB187 ,Set Enable Bit 187" "Disabled,Enabled" bitfld.long 0x00 26. " SEB186 ,Set Enable Bit 186" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB185 ,Set Enable Bit 185" "Disabled,Enabled" bitfld.long 0x00 24. " SEB184 ,Set Enable Bit 184" "Disabled,Enabled" bitfld.long 0x00 23. " SEB183 ,Set Enable Bit 183" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB182 ,Set Enable Bit 182" "Disabled,Enabled" bitfld.long 0x00 21. " SEB181 ,Set Enable Bit 181" "Disabled,Enabled" bitfld.long 0x00 20. " SEB180 ,Set Enable Bit 180" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB179 ,Set Enable Bit 179" "Disabled,Enabled" bitfld.long 0x00 18. " SEB178 ,Set Enable Bit 178" "Disabled,Enabled" bitfld.long 0x00 17. " SEB177 ,Set Enable Bit 177" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB176 ,Set Enable Bit 176" "Disabled,Enabled" bitfld.long 0x00 15. " SEB175 ,Set Enable Bit 175" "Disabled,Enabled" bitfld.long 0x00 14. " SEB174 ,Set Enable Bit 174" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB173 ,Set Enable Bit 173" "Disabled,Enabled" bitfld.long 0x00 12. " SEB172 ,Set Enable Bit 172" "Disabled,Enabled" bitfld.long 0x00 11. " SEB171 ,Set Enable Bit 171" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB170 ,Set Enable Bit 170" "Disabled,Enabled" bitfld.long 0x00 9. " SEB169 ,Set Enable Bit 169" "Disabled,Enabled" bitfld.long 0x00 8. " SEB168 ,Set Enable Bit 168" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB167 ,Set Enable Bit 167" "Disabled,Enabled" bitfld.long 0x00 6. " SEB166 ,Set Enable Bit 166" "Disabled,Enabled" bitfld.long 0x00 5. " SEB165 ,Set Enable Bit 165" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB164 ,Set Enable Bit 164" "Disabled,Enabled" bitfld.long 0x00 3. " SEB163 ,Set Enable Bit 163" "Disabled,Enabled" bitfld.long 0x00 2. " SEB162 ,Set Enable Bit 162" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB161 ,Set Enable Bit 161" "Disabled,Enabled" bitfld.long 0x00 0. " SEB160 ,Set Enable Bit 160" "Disabled,Enabled" group.long 0x1118++0x03 line.long 0x0 "GICD_ISER6,Interrupt Set Enable Register 6" bitfld.long 0x00 31. " SEB223 ,Set Enable Bit 223" "Disabled,Enabled" bitfld.long 0x00 30. " SEB222 ,Set Enable Bit 222" "Disabled,Enabled" bitfld.long 0x00 29. " SEB221 ,Set Enable Bit 221" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB220 ,Set Enable Bit 220" "Disabled,Enabled" bitfld.long 0x00 27. " SEB219 ,Set Enable Bit 219" "Disabled,Enabled" bitfld.long 0x00 26. " SEB218 ,Set Enable Bit 218" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB217 ,Set Enable Bit 217" "Disabled,Enabled" bitfld.long 0x00 24. " SEB216 ,Set Enable Bit 216" "Disabled,Enabled" bitfld.long 0x00 23. " SEB215 ,Set Enable Bit 215" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB214 ,Set Enable Bit 214" "Disabled,Enabled" bitfld.long 0x00 21. " SEB213 ,Set Enable Bit 213" "Disabled,Enabled" bitfld.long 0x00 20. " SEB212 ,Set Enable Bit 212" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB211 ,Set Enable Bit 211" "Disabled,Enabled" bitfld.long 0x00 18. " SEB210 ,Set Enable Bit 210" "Disabled,Enabled" bitfld.long 0x00 17. " SEB209 ,Set Enable Bit 209" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB208 ,Set Enable Bit 208" "Disabled,Enabled" bitfld.long 0x00 15. " SEB207 ,Set Enable Bit 207" "Disabled,Enabled" bitfld.long 0x00 14. " SEB206 ,Set Enable Bit 206" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB205 ,Set Enable Bit 205" "Disabled,Enabled" bitfld.long 0x00 12. " SEB204 ,Set Enable Bit 204" "Disabled,Enabled" bitfld.long 0x00 11. " SEB203 ,Set Enable Bit 203" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB202 ,Set Enable Bit 202" "Disabled,Enabled" bitfld.long 0x00 9. " SEB201 ,Set Enable Bit 201" "Disabled,Enabled" bitfld.long 0x00 8. " SEB200 ,Set Enable Bit 200" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB199 ,Set Enable Bit 199" "Disabled,Enabled" bitfld.long 0x00 6. " SEB198 ,Set Enable Bit 198" "Disabled,Enabled" bitfld.long 0x00 5. " SEB197 ,Set Enable Bit 197" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB196 ,Set Enable Bit 196" "Disabled,Enabled" bitfld.long 0x00 3. " SEB195 ,Set Enable Bit 195" "Disabled,Enabled" bitfld.long 0x00 2. " SEB194 ,Set Enable Bit 194" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB193 ,Set Enable Bit 193" "Disabled,Enabled" bitfld.long 0x00 0. " SEB192 ,Set Enable Bit 192" "Disabled,Enabled" group.long 0x111C++0x03 line.long 0x0 "GICD_ISER7,Interrupt Set Enable Register 7" bitfld.long 0x00 31. " SEB255 ,Set Enable Bit 255" "Disabled,Enabled" bitfld.long 0x00 30. " SEB254 ,Set Enable Bit 254" "Disabled,Enabled" bitfld.long 0x00 29. " SEB253 ,Set Enable Bit 253" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB252 ,Set Enable Bit 252" "Disabled,Enabled" bitfld.long 0x00 27. " SEB251 ,Set Enable Bit 251" "Disabled,Enabled" bitfld.long 0x00 26. " SEB250 ,Set Enable Bit 250" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB249 ,Set Enable Bit 249" "Disabled,Enabled" bitfld.long 0x00 24. " SEB248 ,Set Enable Bit 248" "Disabled,Enabled" bitfld.long 0x00 23. " SEB247 ,Set Enable Bit 247" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB246 ,Set Enable Bit 246" "Disabled,Enabled" bitfld.long 0x00 21. " SEB245 ,Set Enable Bit 245" "Disabled,Enabled" bitfld.long 0x00 20. " SEB244 ,Set Enable Bit 244" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB243 ,Set Enable Bit 243" "Disabled,Enabled" bitfld.long 0x00 18. " SEB242 ,Set Enable Bit 242" "Disabled,Enabled" bitfld.long 0x00 17. " SEB241 ,Set Enable Bit 241" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB240 ,Set Enable Bit 240" "Disabled,Enabled" bitfld.long 0x00 15. " SEB239 ,Set Enable Bit 239" "Disabled,Enabled" bitfld.long 0x00 14. " SEB238 ,Set Enable Bit 238" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB237 ,Set Enable Bit 237" "Disabled,Enabled" bitfld.long 0x00 12. " SEB236 ,Set Enable Bit 236" "Disabled,Enabled" bitfld.long 0x00 11. " SEB235 ,Set Enable Bit 235" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB234 ,Set Enable Bit 234" "Disabled,Enabled" bitfld.long 0x00 9. " SEB233 ,Set Enable Bit 233" "Disabled,Enabled" bitfld.long 0x00 8. " SEB232 ,Set Enable Bit 232" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB231 ,Set Enable Bit 231" "Disabled,Enabled" bitfld.long 0x00 6. " SEB230 ,Set Enable Bit 230" "Disabled,Enabled" bitfld.long 0x00 5. " SEB229 ,Set Enable Bit 229" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB228 ,Set Enable Bit 228" "Disabled,Enabled" bitfld.long 0x00 3. " SEB227 ,Set Enable Bit 227" "Disabled,Enabled" bitfld.long 0x00 2. " SEB226 ,Set Enable Bit 226" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB225 ,Set Enable Bit 225" "Disabled,Enabled" bitfld.long 0x00 0. " SEB224 ,Set Enable Bit 224" "Disabled,Enabled" if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x1120++0x03 line.long 0x0 "GICD_ISER8,Interrupt Set Enable Register 8" bitfld.long 0x00 31. " SEB287 ,Set Enable Bit 287" "Disabled,Enabled" bitfld.long 0x00 30. " SEB286 ,Set Enable Bit 286" "Disabled,Enabled" bitfld.long 0x00 29. " SEB285 ,Set Enable Bit 285" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB284 ,Set Enable Bit 284" "Disabled,Enabled" bitfld.long 0x00 27. " SEB283 ,Set Enable Bit 283" "Disabled,Enabled" bitfld.long 0x00 26. " SEB282 ,Set Enable Bit 282" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB281 ,Set Enable Bit 281" "Disabled,Enabled" bitfld.long 0x00 24. " SEB280 ,Set Enable Bit 280" "Disabled,Enabled" bitfld.long 0x00 23. " SEB279 ,Set Enable Bit 279" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB278 ,Set Enable Bit 278" "Disabled,Enabled" bitfld.long 0x00 21. " SEB277 ,Set Enable Bit 277" "Disabled,Enabled" bitfld.long 0x00 20. " SEB276 ,Set Enable Bit 276" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB275 ,Set Enable Bit 275" "Disabled,Enabled" bitfld.long 0x00 18. " SEB274 ,Set Enable Bit 274" "Disabled,Enabled" bitfld.long 0x00 17. " SEB273 ,Set Enable Bit 273" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB272 ,Set Enable Bit 272" "Disabled,Enabled" bitfld.long 0x00 15. " SEB271 ,Set Enable Bit 271" "Disabled,Enabled" bitfld.long 0x00 14. " SEB270 ,Set Enable Bit 270" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB269 ,Set Enable Bit 269" "Disabled,Enabled" bitfld.long 0x00 12. " SEB268 ,Set Enable Bit 268" "Disabled,Enabled" bitfld.long 0x00 11. " SEB267 ,Set Enable Bit 267" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB266 ,Set Enable Bit 266" "Disabled,Enabled" bitfld.long 0x00 9. " SEB265 ,Set Enable Bit 265" "Disabled,Enabled" bitfld.long 0x00 8. " SEB264 ,Set Enable Bit 264" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB263 ,Set Enable Bit 263" "Disabled,Enabled" bitfld.long 0x00 6. " SEB262 ,Set Enable Bit 262" "Disabled,Enabled" bitfld.long 0x00 5. " SEB261 ,Set Enable Bit 261" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB260 ,Set Enable Bit 260" "Disabled,Enabled" bitfld.long 0x00 3. " SEB259 ,Set Enable Bit 259" "Disabled,Enabled" bitfld.long 0x00 2. " SEB258 ,Set Enable Bit 258" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB257 ,Set Enable Bit 257" "Disabled,Enabled" bitfld.long 0x00 0. " SEB256 ,Set Enable Bit 256" "Disabled,Enabled" group.long 0x1124++0x03 line.long 0x0 "GICD_ISER9,Interrupt Set Enable Register 9" bitfld.long 0x00 31. " SEB319 ,Set Enable Bit 319" "Disabled,Enabled" bitfld.long 0x00 30. " SEB318 ,Set Enable Bit 318" "Disabled,Enabled" bitfld.long 0x00 29. " SEB317 ,Set Enable Bit 317" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB316 ,Set Enable Bit 316" "Disabled,Enabled" bitfld.long 0x00 27. " SEB315 ,Set Enable Bit 315" "Disabled,Enabled" bitfld.long 0x00 26. " SEB314 ,Set Enable Bit 314" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB313 ,Set Enable Bit 313" "Disabled,Enabled" bitfld.long 0x00 24. " SEB312 ,Set Enable Bit 312" "Disabled,Enabled" bitfld.long 0x00 23. " SEB311 ,Set Enable Bit 311" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB310 ,Set Enable Bit 310" "Disabled,Enabled" bitfld.long 0x00 21. " SEB309 ,Set Enable Bit 309" "Disabled,Enabled" bitfld.long 0x00 20. " SEB308 ,Set Enable Bit 308" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB307 ,Set Enable Bit 307" "Disabled,Enabled" bitfld.long 0x00 18. " SEB306 ,Set Enable Bit 306" "Disabled,Enabled" bitfld.long 0x00 17. " SEB305 ,Set Enable Bit 305" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB304 ,Set Enable Bit 304" "Disabled,Enabled" bitfld.long 0x00 15. " SEB303 ,Set Enable Bit 303" "Disabled,Enabled" bitfld.long 0x00 14. " SEB302 ,Set Enable Bit 302" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB301 ,Set Enable Bit 301" "Disabled,Enabled" bitfld.long 0x00 12. " SEB300 ,Set Enable Bit 300" "Disabled,Enabled" bitfld.long 0x00 11. " SEB299 ,Set Enable Bit 299" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB298 ,Set Enable Bit 298" "Disabled,Enabled" bitfld.long 0x00 9. " SEB297 ,Set Enable Bit 297" "Disabled,Enabled" bitfld.long 0x00 8. " SEB296 ,Set Enable Bit 296" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB295 ,Set Enable Bit 295" "Disabled,Enabled" bitfld.long 0x00 6. " SEB294 ,Set Enable Bit 294" "Disabled,Enabled" bitfld.long 0x00 5. " SEB293 ,Set Enable Bit 293" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB292 ,Set Enable Bit 292" "Disabled,Enabled" bitfld.long 0x00 3. " SEB291 ,Set Enable Bit 291" "Disabled,Enabled" bitfld.long 0x00 2. " SEB290 ,Set Enable Bit 290" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB289 ,Set Enable Bit 289" "Disabled,Enabled" bitfld.long 0x00 0. " SEB288 ,Set Enable Bit 288" "Disabled,Enabled" group.long 0x1128++0x03 line.long 0x0 "GICD_ISER10,Interrupt Set Enable Register 10" bitfld.long 0x00 31. " SEB351 ,Set Enable Bit 351" "Disabled,Enabled" bitfld.long 0x00 30. " SEB350 ,Set Enable Bit 350" "Disabled,Enabled" bitfld.long 0x00 29. " SEB349 ,Set Enable Bit 349" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB348 ,Set Enable Bit 348" "Disabled,Enabled" bitfld.long 0x00 27. " SEB347 ,Set Enable Bit 347" "Disabled,Enabled" bitfld.long 0x00 26. " SEB346 ,Set Enable Bit 346" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB345 ,Set Enable Bit 345" "Disabled,Enabled" bitfld.long 0x00 24. " SEB344 ,Set Enable Bit 344" "Disabled,Enabled" bitfld.long 0x00 23. " SEB343 ,Set Enable Bit 343" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB342 ,Set Enable Bit 342" "Disabled,Enabled" bitfld.long 0x00 21. " SEB341 ,Set Enable Bit 341" "Disabled,Enabled" bitfld.long 0x00 20. " SEB340 ,Set Enable Bit 340" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB339 ,Set Enable Bit 339" "Disabled,Enabled" bitfld.long 0x00 18. " SEB338 ,Set Enable Bit 338" "Disabled,Enabled" bitfld.long 0x00 17. " SEB337 ,Set Enable Bit 337" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB336 ,Set Enable Bit 336" "Disabled,Enabled" bitfld.long 0x00 15. " SEB335 ,Set Enable Bit 335" "Disabled,Enabled" bitfld.long 0x00 14. " SEB334 ,Set Enable Bit 334" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB333 ,Set Enable Bit 333" "Disabled,Enabled" bitfld.long 0x00 12. " SEB332 ,Set Enable Bit 332" "Disabled,Enabled" bitfld.long 0x00 11. " SEB331 ,Set Enable Bit 331" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB330 ,Set Enable Bit 330" "Disabled,Enabled" bitfld.long 0x00 9. " SEB329 ,Set Enable Bit 329" "Disabled,Enabled" bitfld.long 0x00 8. " SEB328 ,Set Enable Bit 328" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB327 ,Set Enable Bit 327" "Disabled,Enabled" bitfld.long 0x00 6. " SEB326 ,Set Enable Bit 326" "Disabled,Enabled" bitfld.long 0x00 5. " SEB325 ,Set Enable Bit 325" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB324 ,Set Enable Bit 324" "Disabled,Enabled" bitfld.long 0x00 3. " SEB323 ,Set Enable Bit 323" "Disabled,Enabled" bitfld.long 0x00 2. " SEB322 ,Set Enable Bit 322" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB321 ,Set Enable Bit 321" "Disabled,Enabled" bitfld.long 0x00 0. " SEB320 ,Set Enable Bit 320" "Disabled,Enabled" group.long 0x112c++0x03 line.long 0x0 "GICD_ISER11,Interrupt Set Enable Register 11" bitfld.long 0x00 31. " SEB383 ,Set Enable Bit 383" "Disabled,Enabled" bitfld.long 0x00 30. " SEB382 ,Set Enable Bit 382" "Disabled,Enabled" bitfld.long 0x00 29. " SEB381 ,Set Enable Bit 381" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB380 ,Set Enable Bit 380" "Disabled,Enabled" bitfld.long 0x00 27. " SEB379 ,Set Enable Bit 379" "Disabled,Enabled" bitfld.long 0x00 26. " SEB378 ,Set Enable Bit 378" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB377 ,Set Enable Bit 377" "Disabled,Enabled" bitfld.long 0x00 24. " SEB376 ,Set Enable Bit 376" "Disabled,Enabled" bitfld.long 0x00 23. " SEB375 ,Set Enable Bit 375" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB374 ,Set Enable Bit 374" "Disabled,Enabled" bitfld.long 0x00 21. " SEB373 ,Set Enable Bit 373" "Disabled,Enabled" bitfld.long 0x00 20. " SEB372 ,Set Enable Bit 372" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB371 ,Set Enable Bit 371" "Disabled,Enabled" bitfld.long 0x00 18. " SEB370 ,Set Enable Bit 370" "Disabled,Enabled" bitfld.long 0x00 17. " SEB369 ,Set Enable Bit 369" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB368 ,Set Enable Bit 368" "Disabled,Enabled" bitfld.long 0x00 15. " SEB367 ,Set Enable Bit 367" "Disabled,Enabled" bitfld.long 0x00 14. " SEB366 ,Set Enable Bit 366" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB365 ,Set Enable Bit 365" "Disabled,Enabled" bitfld.long 0x00 12. " SEB364 ,Set Enable Bit 364" "Disabled,Enabled" bitfld.long 0x00 11. " SEB363 ,Set Enable Bit 363" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB362 ,Set Enable Bit 362" "Disabled,Enabled" bitfld.long 0x00 9. " SEB361 ,Set Enable Bit 361" "Disabled,Enabled" bitfld.long 0x00 8. " SEB360 ,Set Enable Bit 360" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB359 ,Set Enable Bit 359" "Disabled,Enabled" bitfld.long 0x00 6. " SEB358 ,Set Enable Bit 358" "Disabled,Enabled" bitfld.long 0x00 5. " SEB357 ,Set Enable Bit 357" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB356 ,Set Enable Bit 356" "Disabled,Enabled" bitfld.long 0x00 3. " SEB355 ,Set Enable Bit 355" "Disabled,Enabled" bitfld.long 0x00 2. " SEB354 ,Set Enable Bit 354" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB353 ,Set Enable Bit 353" "Disabled,Enabled" bitfld.long 0x00 0. " SEB352 ,Set Enable Bit 352" "Disabled,Enabled" group.long 0x1130++0x03 line.long 0x0 "GICD_ISER12,Interrupt Set Enable Register 12" bitfld.long 0x00 31. " SEB415 ,Set Enable Bit 415" "Disabled,Enabled" bitfld.long 0x00 30. " SEB414 ,Set Enable Bit 414" "Disabled,Enabled" bitfld.long 0x00 29. " SEB413 ,Set Enable Bit 413" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB412 ,Set Enable Bit 412" "Disabled,Enabled" bitfld.long 0x00 27. " SEB411 ,Set Enable Bit 411" "Disabled,Enabled" bitfld.long 0x00 26. " SEB410 ,Set Enable Bit 410" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB409 ,Set Enable Bit 409" "Disabled,Enabled" bitfld.long 0x00 24. " SEB408 ,Set Enable Bit 408" "Disabled,Enabled" bitfld.long 0x00 23. " SEB407 ,Set Enable Bit 407" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB406 ,Set Enable Bit 406" "Disabled,Enabled" bitfld.long 0x00 21. " SEB405 ,Set Enable Bit 405" "Disabled,Enabled" bitfld.long 0x00 20. " SEB404 ,Set Enable Bit 404" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB403 ,Set Enable Bit 403" "Disabled,Enabled" bitfld.long 0x00 18. " SEB402 ,Set Enable Bit 402" "Disabled,Enabled" bitfld.long 0x00 17. " SEB401 ,Set Enable Bit 401" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB400 ,Set Enable Bit 400" "Disabled,Enabled" bitfld.long 0x00 15. " SEB399 ,Set Enable Bit 399" "Disabled,Enabled" bitfld.long 0x00 14. " SEB398 ,Set Enable Bit 398" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB397 ,Set Enable Bit 397" "Disabled,Enabled" bitfld.long 0x00 12. " SEB396 ,Set Enable Bit 396" "Disabled,Enabled" bitfld.long 0x00 11. " SEB395 ,Set Enable Bit 395" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB394 ,Set Enable Bit 394" "Disabled,Enabled" bitfld.long 0x00 9. " SEB393 ,Set Enable Bit 393" "Disabled,Enabled" bitfld.long 0x00 8. " SEB392 ,Set Enable Bit 392" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB391 ,Set Enable Bit 391" "Disabled,Enabled" bitfld.long 0x00 6. " SEB390 ,Set Enable Bit 390" "Disabled,Enabled" bitfld.long 0x00 5. " SEB389 ,Set Enable Bit 389" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB388 ,Set Enable Bit 388" "Disabled,Enabled" bitfld.long 0x00 3. " SEB387 ,Set Enable Bit 387" "Disabled,Enabled" bitfld.long 0x00 2. " SEB386 ,Set Enable Bit 386" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB385 ,Set Enable Bit 385" "Disabled,Enabled" bitfld.long 0x00 0. " SEB384 ,Set Enable Bit 384" "Disabled,Enabled" group.long 0x1134++0x03 line.long 0x0 "GICD_ISER13,Interrupt Set Enable Register 13" bitfld.long 0x00 31. " SEB447 ,Set Enable Bit 447" "Disabled,Enabled" bitfld.long 0x00 30. " SEB446 ,Set Enable Bit 446" "Disabled,Enabled" bitfld.long 0x00 29. " SEB445 ,Set Enable Bit 445" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB444 ,Set Enable Bit 444" "Disabled,Enabled" bitfld.long 0x00 27. " SEB443 ,Set Enable Bit 443" "Disabled,Enabled" bitfld.long 0x00 26. " SEB442 ,Set Enable Bit 442" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB441 ,Set Enable Bit 441" "Disabled,Enabled" bitfld.long 0x00 24. " SEB440 ,Set Enable Bit 440" "Disabled,Enabled" bitfld.long 0x00 23. " SEB439 ,Set Enable Bit 439" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB438 ,Set Enable Bit 438" "Disabled,Enabled" bitfld.long 0x00 21. " SEB437 ,Set Enable Bit 437" "Disabled,Enabled" bitfld.long 0x00 20. " SEB436 ,Set Enable Bit 436" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB435 ,Set Enable Bit 435" "Disabled,Enabled" bitfld.long 0x00 18. " SEB434 ,Set Enable Bit 434" "Disabled,Enabled" bitfld.long 0x00 17. " SEB433 ,Set Enable Bit 433" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB432 ,Set Enable Bit 432" "Disabled,Enabled" bitfld.long 0x00 15. " SEB431 ,Set Enable Bit 431" "Disabled,Enabled" bitfld.long 0x00 14. " SEB430 ,Set Enable Bit 430" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB429 ,Set Enable Bit 429" "Disabled,Enabled" bitfld.long 0x00 12. " SEB428 ,Set Enable Bit 428" "Disabled,Enabled" bitfld.long 0x00 11. " SEB427 ,Set Enable Bit 427" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB426 ,Set Enable Bit 426" "Disabled,Enabled" bitfld.long 0x00 9. " SEB425 ,Set Enable Bit 425" "Disabled,Enabled" bitfld.long 0x00 8. " SEB424 ,Set Enable Bit 424" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB423 ,Set Enable Bit 423" "Disabled,Enabled" bitfld.long 0x00 6. " SEB422 ,Set Enable Bit 422" "Disabled,Enabled" bitfld.long 0x00 5. " SEB421 ,Set Enable Bit 421" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB420 ,Set Enable Bit 420" "Disabled,Enabled" bitfld.long 0x00 3. " SEB419 ,Set Enable Bit 419" "Disabled,Enabled" bitfld.long 0x00 2. " SEB418 ,Set Enable Bit 418" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB417 ,Set Enable Bit 417" "Disabled,Enabled" bitfld.long 0x00 0. " SEB416 ,Set Enable Bit 416" "Disabled,Enabled" group.long 0x1138++0x03 line.long 0x0 "GICD_ISER14,Interrupt Set Enable Register 14" bitfld.long 0x00 31. " SEB479 ,Set Enable Bit 479" "Disabled,Enabled" bitfld.long 0x00 30. " SEB478 ,Set Enable Bit 478" "Disabled,Enabled" bitfld.long 0x00 29. " SEB477 ,Set Enable Bit 477" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB476 ,Set Enable Bit 476" "Disabled,Enabled" bitfld.long 0x00 27. " SEB475 ,Set Enable Bit 475" "Disabled,Enabled" bitfld.long 0x00 26. " SEB474 ,Set Enable Bit 474" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB473 ,Set Enable Bit 473" "Disabled,Enabled" bitfld.long 0x00 24. " SEB472 ,Set Enable Bit 472" "Disabled,Enabled" bitfld.long 0x00 23. " SEB471 ,Set Enable Bit 471" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB470 ,Set Enable Bit 470" "Disabled,Enabled" bitfld.long 0x00 21. " SEB469 ,Set Enable Bit 469" "Disabled,Enabled" bitfld.long 0x00 20. " SEB468 ,Set Enable Bit 468" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB467 ,Set Enable Bit 467" "Disabled,Enabled" bitfld.long 0x00 18. " SEB466 ,Set Enable Bit 466" "Disabled,Enabled" bitfld.long 0x00 17. " SEB465 ,Set Enable Bit 465" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB464 ,Set Enable Bit 464" "Disabled,Enabled" bitfld.long 0x00 15. " SEB463 ,Set Enable Bit 463" "Disabled,Enabled" bitfld.long 0x00 14. " SEB462 ,Set Enable Bit 462" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB461 ,Set Enable Bit 461" "Disabled,Enabled" bitfld.long 0x00 12. " SEB460 ,Set Enable Bit 460" "Disabled,Enabled" bitfld.long 0x00 11. " SEB459 ,Set Enable Bit 459" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB458 ,Set Enable Bit 458" "Disabled,Enabled" bitfld.long 0x00 9. " SEB457 ,Set Enable Bit 457" "Disabled,Enabled" bitfld.long 0x00 8. " SEB456 ,Set Enable Bit 456" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB455 ,Set Enable Bit 455" "Disabled,Enabled" bitfld.long 0x00 6. " SEB454 ,Set Enable Bit 454" "Disabled,Enabled" bitfld.long 0x00 5. " SEB453 ,Set Enable Bit 453" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB452 ,Set Enable Bit 452" "Disabled,Enabled" bitfld.long 0x00 3. " SEB451 ,Set Enable Bit 451" "Disabled,Enabled" bitfld.long 0x00 2. " SEB450 ,Set Enable Bit 450" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB449 ,Set Enable Bit 449" "Disabled,Enabled" bitfld.long 0x00 0. " SEB448 ,Set Enable Bit 448" "Disabled,Enabled" group.long 0x113c++0x03 line.long 0x0 "GICD_ISER15,Interrupt Set Enable Register 15" bitfld.long 0x00 31. " SEB511 ,Set Enable Bit 511" "Disabled,Enabled" bitfld.long 0x00 30. " SEB510 ,Set Enable Bit 510" "Disabled,Enabled" bitfld.long 0x00 29. " SEB509 ,Set Enable Bit 509" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SEB508 ,Set Enable Bit 508" "Disabled,Enabled" bitfld.long 0x00 27. " SEB507 ,Set Enable Bit 507" "Disabled,Enabled" bitfld.long 0x00 26. " SEB506 ,Set Enable Bit 506" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " SEB505 ,Set Enable Bit 505" "Disabled,Enabled" bitfld.long 0x00 24. " SEB504 ,Set Enable Bit 504" "Disabled,Enabled" bitfld.long 0x00 23. " SEB503 ,Set Enable Bit 503" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SEB502 ,Set Enable Bit 502" "Disabled,Enabled" bitfld.long 0x00 21. " SEB501 ,Set Enable Bit 501" "Disabled,Enabled" bitfld.long 0x00 20. " SEB500 ,Set Enable Bit 500" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SEB499 ,Set Enable Bit 499" "Disabled,Enabled" bitfld.long 0x00 18. " SEB498 ,Set Enable Bit 498" "Disabled,Enabled" bitfld.long 0x00 17. " SEB497 ,Set Enable Bit 497" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SEB496 ,Set Enable Bit 496" "Disabled,Enabled" bitfld.long 0x00 15. " SEB495 ,Set Enable Bit 495" "Disabled,Enabled" bitfld.long 0x00 14. " SEB494 ,Set Enable Bit 494" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SEB493 ,Set Enable Bit 493" "Disabled,Enabled" bitfld.long 0x00 12. " SEB492 ,Set Enable Bit 492" "Disabled,Enabled" bitfld.long 0x00 11. " SEB491 ,Set Enable Bit 491" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SEB490 ,Set Enable Bit 490" "Disabled,Enabled" bitfld.long 0x00 9. " SEB489 ,Set Enable Bit 489" "Disabled,Enabled" bitfld.long 0x00 8. " SEB488 ,Set Enable Bit 488" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SEB487 ,Set Enable Bit 487" "Disabled,Enabled" bitfld.long 0x00 6. " SEB486 ,Set Enable Bit 486" "Disabled,Enabled" bitfld.long 0x00 5. " SEB485 ,Set Enable Bit 485" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEB484 ,Set Enable Bit 484" "Disabled,Enabled" bitfld.long 0x00 3. " SEB483 ,Set Enable Bit 483" "Disabled,Enabled" bitfld.long 0x00 2. " SEB482 ,Set Enable Bit 482" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SEB481 ,Set Enable Bit 481" "Disabled,Enabled" bitfld.long 0x00 0. " SEB480 ,Set Enable Bit 480" "Disabled,Enabled" endif textline " " group.long 0x1180++0x03 line.long 0x0 "GICD_ICER0,Interrupt Clear Enable Register 0" eventfld.long 0x00 31. " CEB31 ,Clear Enable Bit 31" "Disabled,Enabled" eventfld.long 0x00 30. " CEB30 ,Clear Enable Bit 30" "Disabled,Enabled" eventfld.long 0x00 29. " CEB29 ,Clear Enable Bit 29" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB28 ,Clear Enable Bit 28" "Disabled,Enabled" eventfld.long 0x00 27. " CEB27 ,Clear Enable Bit 27" "Disabled,Enabled" eventfld.long 0x00 26. " CEB26 ,Clear Enable Bit 26" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB25 ,Clear Enable Bit 25" "Disabled,Enabled" eventfld.long 0x00 24. " CEB24 ,Clear Enable Bit 24" "Disabled,Enabled" eventfld.long 0x00 23. " CEB23 ,Clear Enable Bit 23" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB22 ,Clear Enable Bit 22" "Disabled,Enabled" eventfld.long 0x00 21. " CEB21 ,Clear Enable Bit 21" "Disabled,Enabled" eventfld.long 0x00 20. " CEB20 ,Clear Enable Bit 20" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB19 ,Clear Enable Bit 19" "Disabled,Enabled" eventfld.long 0x00 18. " CEB18 ,Clear Enable Bit 18" "Disabled,Enabled" eventfld.long 0x00 17. " CEB17 ,Clear Enable Bit 17" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB16 ,Clear Enable Bit 16" "Disabled,Enabled" eventfld.long 0x00 15. " CEB15 ,Clear Enable Bit 15" "Disabled,Enabled" eventfld.long 0x00 14. " CEB14 ,Clear Enable Bit 14" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB13 ,Clear Enable Bit 13" "Disabled,Enabled" eventfld.long 0x00 12. " CEB12 ,Clear Enable Bit 12" "Disabled,Enabled" eventfld.long 0x00 11. " CEB11 ,Clear Enable Bit 11" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB10 ,Clear Enable Bit 10" "Disabled,Enabled" eventfld.long 0x00 9. " CEB9 ,Clear Enable Bit 9" "Disabled,Enabled" eventfld.long 0x00 8. " CEB8 ,Clear Enable Bit 8" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB7 ,Clear Enable Bit 7" "Disabled,Enabled" eventfld.long 0x00 6. " CEB6 ,Clear Enable Bit 6" "Disabled,Enabled" eventfld.long 0x00 5. " CEB5 ,Clear Enable Bit 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB4 ,Clear Enable Bit 4" "Disabled,Enabled" eventfld.long 0x00 3. " CEB3 ,Clear Enable Bit 3" "Disabled,Enabled" eventfld.long 0x00 2. " CEB2 ,Clear Enable Bit 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB1 ,Clear Enable Bit 1" "Disabled,Enabled" eventfld.long 0x00 0. " CEB0 ,Clear Enable Bit 0" "Disabled,Enabled" group.long 0x1184++0x03 line.long 0x0 "GICD_ICER1,Interrupt Clear Enable Register 1" eventfld.long 0x00 31. " CEB63 ,Clear Enable Bit 63" "Disabled,Enabled" eventfld.long 0x00 30. " CEB62 ,Clear Enable Bit 62" "Disabled,Enabled" eventfld.long 0x00 29. " CEB61 ,Clear Enable Bit 61" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB60 ,Clear Enable Bit 60" "Disabled,Enabled" eventfld.long 0x00 27. " CEB59 ,Clear Enable Bit 59" "Disabled,Enabled" eventfld.long 0x00 26. " CEB58 ,Clear Enable Bit 58" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB57 ,Clear Enable Bit 57" "Disabled,Enabled" eventfld.long 0x00 24. " CEB56 ,Clear Enable Bit 56" "Disabled,Enabled" eventfld.long 0x00 23. " CEB55 ,Clear Enable Bit 55" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB54 ,Clear Enable Bit 54" "Disabled,Enabled" eventfld.long 0x00 21. " CEB53 ,Clear Enable Bit 53" "Disabled,Enabled" eventfld.long 0x00 20. " CEB52 ,Clear Enable Bit 52" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB51 ,Clear Enable Bit 51" "Disabled,Enabled" eventfld.long 0x00 18. " CEB50 ,Clear Enable Bit 50" "Disabled,Enabled" eventfld.long 0x00 17. " CEB49 ,Clear Enable Bit 49" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB48 ,Clear Enable Bit 48" "Disabled,Enabled" eventfld.long 0x00 15. " CEB47 ,Clear Enable Bit 47" "Disabled,Enabled" eventfld.long 0x00 14. " CEB46 ,Clear Enable Bit 46" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB45 ,Clear Enable Bit 45" "Disabled,Enabled" eventfld.long 0x00 12. " CEB44 ,Clear Enable Bit 44" "Disabled,Enabled" eventfld.long 0x00 11. " CEB43 ,Clear Enable Bit 43" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB42 ,Clear Enable Bit 42" "Disabled,Enabled" eventfld.long 0x00 9. " CEB41 ,Clear Enable Bit 41" "Disabled,Enabled" eventfld.long 0x00 8. " CEB40 ,Clear Enable Bit 40" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB39 ,Clear Enable Bit 39" "Disabled,Enabled" eventfld.long 0x00 6. " CEB38 ,Clear Enable Bit 38" "Disabled,Enabled" eventfld.long 0x00 5. " CEB37 ,Clear Enable Bit 37" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB36 ,Clear Enable Bit 36" "Disabled,Enabled" eventfld.long 0x00 3. " CEB35 ,Clear Enable Bit 35" "Disabled,Enabled" eventfld.long 0x00 2. " CEB34 ,Clear Enable Bit 34" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB33 ,Clear Enable Bit 33" "Disabled,Enabled" eventfld.long 0x00 0. " CEB32 ,Clear Enable Bit 32" "Disabled,Enabled" group.long 0x1188++0x03 line.long 0x0 "GICD_ICER2,Interrupt Clear Enable Register 2" eventfld.long 0x00 31. " CEB95 ,Clear Enable Bit 95" "Disabled,Enabled" eventfld.long 0x00 30. " CEB94 ,Clear Enable Bit 94" "Disabled,Enabled" eventfld.long 0x00 29. " CEB93 ,Clear Enable Bit 93" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB92 ,Clear Enable Bit 92" "Disabled,Enabled" eventfld.long 0x00 27. " CEB91 ,Clear Enable Bit 91" "Disabled,Enabled" eventfld.long 0x00 26. " CEB90 ,Clear Enable Bit 90" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB89 ,Clear Enable Bit 89" "Disabled,Enabled" eventfld.long 0x00 24. " CEB88 ,Clear Enable Bit 88" "Disabled,Enabled" eventfld.long 0x00 23. " CEB87 ,Clear Enable Bit 87" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB86 ,Clear Enable Bit 86" "Disabled,Enabled" eventfld.long 0x00 21. " CEB85 ,Clear Enable Bit 85" "Disabled,Enabled" eventfld.long 0x00 20. " CEB84 ,Clear Enable Bit 84" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB83 ,Clear Enable Bit 83" "Disabled,Enabled" eventfld.long 0x00 18. " CEB82 ,Clear Enable Bit 82" "Disabled,Enabled" eventfld.long 0x00 17. " CEB81 ,Clear Enable Bit 81" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB80 ,Clear Enable Bit 80" "Disabled,Enabled" eventfld.long 0x00 15. " CEB79 ,Clear Enable Bit 79" "Disabled,Enabled" eventfld.long 0x00 14. " CEB78 ,Clear Enable Bit 78" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB77 ,Clear Enable Bit 77" "Disabled,Enabled" eventfld.long 0x00 12. " CEB76 ,Clear Enable Bit 76" "Disabled,Enabled" eventfld.long 0x00 11. " CEB75 ,Clear Enable Bit 75" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB74 ,Clear Enable Bit 74" "Disabled,Enabled" eventfld.long 0x00 9. " CEB73 ,Clear Enable Bit 73" "Disabled,Enabled" eventfld.long 0x00 8. " CEB72 ,Clear Enable Bit 72" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB71 ,Clear Enable Bit 71" "Disabled,Enabled" eventfld.long 0x00 6. " CEB70 ,Clear Enable Bit 70" "Disabled,Enabled" eventfld.long 0x00 5. " CEB69 ,Clear Enable Bit 69" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB68 ,Clear Enable Bit 68" "Disabled,Enabled" eventfld.long 0x00 3. " CEB67 ,Clear Enable Bit 67" "Disabled,Enabled" eventfld.long 0x00 2. " CEB66 ,Clear Enable Bit 66" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB65 ,Clear Enable Bit 65" "Disabled,Enabled" eventfld.long 0x00 0. " CEB64 ,Clear Enable Bit 64" "Disabled,Enabled" group.long 0x118C++0x03 line.long 0x0 "GICD_ICER3,Interrupt Clear Enable Register 3" eventfld.long 0x00 31. " CEB127 ,Clear Enable Bit 127" "Disabled,Enabled" eventfld.long 0x00 30. " CEB126 ,Clear Enable Bit 126" "Disabled,Enabled" eventfld.long 0x00 29. " CEB125 ,Clear Enable Bit 125" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB124 ,Clear Enable Bit 124" "Disabled,Enabled" eventfld.long 0x00 27. " CEB123 ,Clear Enable Bit 123" "Disabled,Enabled" eventfld.long 0x00 26. " CEB122 ,Clear Enable Bit 122" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB121 ,Clear Enable Bit 121" "Disabled,Enabled" eventfld.long 0x00 24. " CEB120 ,Clear Enable Bit 120" "Disabled,Enabled" eventfld.long 0x00 23. " CEB119 ,Clear Enable Bit 119" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB118 ,Clear Enable Bit 118" "Disabled,Enabled" eventfld.long 0x00 21. " CEB117 ,Clear Enable Bit 117" "Disabled,Enabled" eventfld.long 0x00 20. " CEB116 ,Clear Enable Bit 116" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB115 ,Clear Enable Bit 115" "Disabled,Enabled" eventfld.long 0x00 18. " CEB114 ,Clear Enable Bit 114" "Disabled,Enabled" eventfld.long 0x00 17. " CEB113 ,Clear Enable Bit 113" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB112 ,Clear Enable Bit 112" "Disabled,Enabled" eventfld.long 0x00 15. " CEB111 ,Clear Enable Bit 111" "Disabled,Enabled" eventfld.long 0x00 14. " CEB110 ,Clear Enable Bit 110" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB109 ,Clear Enable Bit 109" "Disabled,Enabled" eventfld.long 0x00 12. " CEB108 ,Clear Enable Bit 108" "Disabled,Enabled" eventfld.long 0x00 11. " CEB107 ,Clear Enable Bit 107" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB106 ,Clear Enable Bit 106" "Disabled,Enabled" eventfld.long 0x00 9. " CEB105 ,Clear Enable Bit 105" "Disabled,Enabled" eventfld.long 0x00 8. " CEB104 ,Clear Enable Bit 104" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB103 ,Clear Enable Bit 103" "Disabled,Enabled" eventfld.long 0x00 6. " CEB102 ,Clear Enable Bit 102" "Disabled,Enabled" eventfld.long 0x00 5. " CEB101 ,Clear Enable Bit 101" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB100 ,Clear Enable Bit 100" "Disabled,Enabled" eventfld.long 0x00 3. " CEB99 ,Clear Enable Bit 99" "Disabled,Enabled" eventfld.long 0x00 2. " CEB98 ,Clear Enable Bit 98" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB97 ,Clear Enable Bit 97" "Disabled,Enabled" eventfld.long 0x00 0. " CEB96 ,Clear Enable Bit 96" "Disabled,Enabled" group.long 0x1190++0x03 line.long 0x0 "GICD_ICER4,Interrupt Clear Enable Register 4" eventfld.long 0x00 31. " CEB159 ,Clear Enable Bit 159" "Disabled,Enabled" eventfld.long 0x00 30. " CEB158 ,Clear Enable Bit 158" "Disabled,Enabled" eventfld.long 0x00 29. " CEB157 ,Clear Enable Bit 157" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB156 ,Clear Enable Bit 156" "Disabled,Enabled" eventfld.long 0x00 27. " CEB155 ,Clear Enable Bit 155" "Disabled,Enabled" eventfld.long 0x00 26. " CEB154 ,Clear Enable Bit 154" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB153 ,Clear Enable Bit 153" "Disabled,Enabled" eventfld.long 0x00 24. " CEB152 ,Clear Enable Bit 152" "Disabled,Enabled" eventfld.long 0x00 23. " CEB151 ,Clear Enable Bit 151" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB150 ,Clear Enable Bit 150" "Disabled,Enabled" eventfld.long 0x00 21. " CEB149 ,Clear Enable Bit 149" "Disabled,Enabled" eventfld.long 0x00 20. " CEB148 ,Clear Enable Bit 148" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB147 ,Clear Enable Bit 147" "Disabled,Enabled" eventfld.long 0x00 18. " CEB146 ,Clear Enable Bit 146" "Disabled,Enabled" eventfld.long 0x00 17. " CEB145 ,Clear Enable Bit 145" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB144 ,Clear Enable Bit 144" "Disabled,Enabled" eventfld.long 0x00 15. " CEB143 ,Clear Enable Bit 143" "Disabled,Enabled" eventfld.long 0x00 14. " CEB142 ,Clear Enable Bit 142" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB141 ,Clear Enable Bit 141" "Disabled,Enabled" eventfld.long 0x00 12. " CEB140 ,Clear Enable Bit 140" "Disabled,Enabled" eventfld.long 0x00 11. " CEB139 ,Clear Enable Bit 139" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB138 ,Clear Enable Bit 138" "Disabled,Enabled" eventfld.long 0x00 9. " CEB137 ,Clear Enable Bit 137" "Disabled,Enabled" eventfld.long 0x00 8. " CEB136 ,Clear Enable Bit 136" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB135 ,Clear Enable Bit 135" "Disabled,Enabled" eventfld.long 0x00 6. " CEB134 ,Clear Enable Bit 134" "Disabled,Enabled" eventfld.long 0x00 5. " CEB133 ,Clear Enable Bit 133" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB132 ,Clear Enable Bit 132" "Disabled,Enabled" eventfld.long 0x00 3. " CEB131 ,Clear Enable Bit 131" "Disabled,Enabled" eventfld.long 0x00 2. " CEB130 ,Clear Enable Bit 130" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB129 ,Clear Enable Bit 129" "Disabled,Enabled" eventfld.long 0x00 0. " CEB128 ,Clear Enable Bit 128" "Disabled,Enabled" group.long 0x1194++0x03 line.long 0x0 "GICD_ICER5,Interrupt Clear Enable Register 5" eventfld.long 0x00 31. " CEB191 ,Clear Enable Bit 191" "Disabled,Enabled" eventfld.long 0x00 30. " CEB190 ,Clear Enable Bit 190" "Disabled,Enabled" eventfld.long 0x00 29. " CEB189 ,Clear Enable Bit 189" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB188 ,Clear Enable Bit 188" "Disabled,Enabled" eventfld.long 0x00 27. " CEB187 ,Clear Enable Bit 187" "Disabled,Enabled" eventfld.long 0x00 26. " CEB186 ,Clear Enable Bit 186" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB185 ,Clear Enable Bit 185" "Disabled,Enabled" eventfld.long 0x00 24. " CEB184 ,Clear Enable Bit 184" "Disabled,Enabled" eventfld.long 0x00 23. " CEB183 ,Clear Enable Bit 183" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB182 ,Clear Enable Bit 182" "Disabled,Enabled" eventfld.long 0x00 21. " CEB181 ,Clear Enable Bit 181" "Disabled,Enabled" eventfld.long 0x00 20. " CEB180 ,Clear Enable Bit 180" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB179 ,Clear Enable Bit 179" "Disabled,Enabled" eventfld.long 0x00 18. " CEB178 ,Clear Enable Bit 178" "Disabled,Enabled" eventfld.long 0x00 17. " CEB177 ,Clear Enable Bit 177" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB176 ,Clear Enable Bit 176" "Disabled,Enabled" eventfld.long 0x00 15. " CEB175 ,Clear Enable Bit 175" "Disabled,Enabled" eventfld.long 0x00 14. " CEB174 ,Clear Enable Bit 174" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB173 ,Clear Enable Bit 173" "Disabled,Enabled" eventfld.long 0x00 12. " CEB172 ,Clear Enable Bit 172" "Disabled,Enabled" eventfld.long 0x00 11. " CEB171 ,Clear Enable Bit 171" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB170 ,Clear Enable Bit 170" "Disabled,Enabled" eventfld.long 0x00 9. " CEB169 ,Clear Enable Bit 169" "Disabled,Enabled" eventfld.long 0x00 8. " CEB168 ,Clear Enable Bit 168" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB167 ,Clear Enable Bit 167" "Disabled,Enabled" eventfld.long 0x00 6. " CEB166 ,Clear Enable Bit 166" "Disabled,Enabled" eventfld.long 0x00 5. " CEB165 ,Clear Enable Bit 165" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB164 ,Clear Enable Bit 164" "Disabled,Enabled" eventfld.long 0x00 3. " CEB163 ,Clear Enable Bit 163" "Disabled,Enabled" eventfld.long 0x00 2. " CEB162 ,Clear Enable Bit 162" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB161 ,Clear Enable Bit 161" "Disabled,Enabled" eventfld.long 0x00 0. " CEB160 ,Clear Enable Bit 160" "Disabled,Enabled" group.long 0x1198++0x03 line.long 0x0 "GICD_ICER6,Interrupt Clear Enable Register 6" eventfld.long 0x00 31. " CEB223 ,Clear Enable Bit 223" "Disabled,Enabled" eventfld.long 0x00 30. " CEB222 ,Clear Enable Bit 222" "Disabled,Enabled" eventfld.long 0x00 29. " CEB221 ,Clear Enable Bit 221" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB220 ,Clear Enable Bit 220" "Disabled,Enabled" eventfld.long 0x00 27. " CEB219 ,Clear Enable Bit 219" "Disabled,Enabled" eventfld.long 0x00 26. " CEB218 ,Clear Enable Bit 218" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB217 ,Clear Enable Bit 217" "Disabled,Enabled" eventfld.long 0x00 24. " CEB216 ,Clear Enable Bit 216" "Disabled,Enabled" eventfld.long 0x00 23. " CEB215 ,Clear Enable Bit 215" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB214 ,Clear Enable Bit 214" "Disabled,Enabled" eventfld.long 0x00 21. " CEB213 ,Clear Enable Bit 213" "Disabled,Enabled" eventfld.long 0x00 20. " CEB212 ,Clear Enable Bit 212" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB211 ,Clear Enable Bit 211" "Disabled,Enabled" eventfld.long 0x00 18. " CEB210 ,Clear Enable Bit 210" "Disabled,Enabled" eventfld.long 0x00 17. " CEB209 ,Clear Enable Bit 209" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB208 ,Clear Enable Bit 208" "Disabled,Enabled" eventfld.long 0x00 15. " CEB207 ,Clear Enable Bit 207" "Disabled,Enabled" eventfld.long 0x00 14. " CEB206 ,Clear Enable Bit 206" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB205 ,Clear Enable Bit 205" "Disabled,Enabled" eventfld.long 0x00 12. " CEB204 ,Clear Enable Bit 204" "Disabled,Enabled" eventfld.long 0x00 11. " CEB203 ,Clear Enable Bit 203" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB202 ,Clear Enable Bit 202" "Disabled,Enabled" eventfld.long 0x00 9. " CEB201 ,Clear Enable Bit 201" "Disabled,Enabled" eventfld.long 0x00 8. " CEB200 ,Clear Enable Bit 200" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB199 ,Clear Enable Bit 199" "Disabled,Enabled" eventfld.long 0x00 6. " CEB198 ,Clear Enable Bit 198" "Disabled,Enabled" eventfld.long 0x00 5. " CEB197 ,Clear Enable Bit 197" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB196 ,Clear Enable Bit 196" "Disabled,Enabled" eventfld.long 0x00 3. " CEB195 ,Clear Enable Bit 195" "Disabled,Enabled" eventfld.long 0x00 2. " CEB194 ,Clear Enable Bit 194" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB193 ,Clear Enable Bit 193" "Disabled,Enabled" eventfld.long 0x00 0. " CEB192 ,Clear Enable Bit 192" "Disabled,Enabled" group.long 0x119C++0x03 line.long 0x0 "GICD_ICER7,Interrupt Clear Enable Register 7" eventfld.long 0x00 31. " CEB255 ,Clear Enable Bit 255" "Disabled,Enabled" eventfld.long 0x00 30. " CEB254 ,Clear Enable Bit 254" "Disabled,Enabled" eventfld.long 0x00 29. " CEB253 ,Clear Enable Bit 253" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB252 ,Clear Enable Bit 252" "Disabled,Enabled" eventfld.long 0x00 27. " CEB251 ,Clear Enable Bit 251" "Disabled,Enabled" eventfld.long 0x00 26. " CEB250 ,Clear Enable Bit 250" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB249 ,Clear Enable Bit 249" "Disabled,Enabled" eventfld.long 0x00 24. " CEB248 ,Clear Enable Bit 248" "Disabled,Enabled" eventfld.long 0x00 23. " CEB247 ,Clear Enable Bit 247" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB246 ,Clear Enable Bit 246" "Disabled,Enabled" eventfld.long 0x00 21. " CEB245 ,Clear Enable Bit 245" "Disabled,Enabled" eventfld.long 0x00 20. " CEB244 ,Clear Enable Bit 244" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB243 ,Clear Enable Bit 243" "Disabled,Enabled" eventfld.long 0x00 18. " CEB242 ,Clear Enable Bit 242" "Disabled,Enabled" eventfld.long 0x00 17. " CEB241 ,Clear Enable Bit 241" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB240 ,Clear Enable Bit 240" "Disabled,Enabled" eventfld.long 0x00 15. " CEB239 ,Clear Enable Bit 239" "Disabled,Enabled" eventfld.long 0x00 14. " CEB238 ,Clear Enable Bit 238" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB237 ,Clear Enable Bit 237" "Disabled,Enabled" eventfld.long 0x00 12. " CEB236 ,Clear Enable Bit 236" "Disabled,Enabled" eventfld.long 0x00 11. " CEB235 ,Clear Enable Bit 235" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB234 ,Clear Enable Bit 234" "Disabled,Enabled" eventfld.long 0x00 9. " CEB233 ,Clear Enable Bit 233" "Disabled,Enabled" eventfld.long 0x00 8. " CEB232 ,Clear Enable Bit 232" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB231 ,Clear Enable Bit 231" "Disabled,Enabled" eventfld.long 0x00 6. " CEB230 ,Clear Enable Bit 230" "Disabled,Enabled" eventfld.long 0x00 5. " CEB229 ,Clear Enable Bit 229" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB228 ,Clear Enable Bit 228" "Disabled,Enabled" eventfld.long 0x00 3. " CEB227 ,Clear Enable Bit 227" "Disabled,Enabled" eventfld.long 0x00 2. " CEB226 ,Clear Enable Bit 226" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB225 ,Clear Enable Bit 225" "Disabled,Enabled" eventfld.long 0x00 0. " CEB224 ,Clear Enable Bit 224" "Disabled,Enabled" if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x11a0++0x03 line.long 0x0 "GICD_ICER8,Interrupt Clear Enable Register 8" eventfld.long 0x00 31. " CEB287 ,Clear Enable Bit 287" "Disabled,Enabled" eventfld.long 0x00 30. " CEB286 ,Clear Enable Bit 286" "Disabled,Enabled" eventfld.long 0x00 29. " CEB285 ,Clear Enable Bit 285" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB284 ,Clear Enable Bit 284" "Disabled,Enabled" eventfld.long 0x00 27. " CEB283 ,Clear Enable Bit 283" "Disabled,Enabled" eventfld.long 0x00 26. " CEB282 ,Clear Enable Bit 282" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB281 ,Clear Enable Bit 281" "Disabled,Enabled" eventfld.long 0x00 24. " CEB280 ,Clear Enable Bit 280" "Disabled,Enabled" eventfld.long 0x00 23. " CEB279 ,Clear Enable Bit 279" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB278 ,Clear Enable Bit 278" "Disabled,Enabled" eventfld.long 0x00 21. " CEB277 ,Clear Enable Bit 277" "Disabled,Enabled" eventfld.long 0x00 20. " CEB276 ,Clear Enable Bit 276" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB275 ,Clear Enable Bit 275" "Disabled,Enabled" eventfld.long 0x00 18. " CEB274 ,Clear Enable Bit 274" "Disabled,Enabled" eventfld.long 0x00 17. " CEB273 ,Clear Enable Bit 273" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB272 ,Clear Enable Bit 272" "Disabled,Enabled" eventfld.long 0x00 15. " CEB271 ,Clear Enable Bit 271" "Disabled,Enabled" eventfld.long 0x00 14. " CEB270 ,Clear Enable Bit 270" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB269 ,Clear Enable Bit 269" "Disabled,Enabled" eventfld.long 0x00 12. " CEB268 ,Clear Enable Bit 268" "Disabled,Enabled" eventfld.long 0x00 11. " CEB267 ,Clear Enable Bit 267" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB266 ,Clear Enable Bit 266" "Disabled,Enabled" eventfld.long 0x00 9. " CEB265 ,Clear Enable Bit 265" "Disabled,Enabled" eventfld.long 0x00 8. " CEB264 ,Clear Enable Bit 264" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB263 ,Clear Enable Bit 263" "Disabled,Enabled" eventfld.long 0x00 6. " CEB262 ,Clear Enable Bit 262" "Disabled,Enabled" eventfld.long 0x00 5. " CEB261 ,Clear Enable Bit 261" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB260 ,Clear Enable Bit 260" "Disabled,Enabled" eventfld.long 0x00 3. " CEB259 ,Clear Enable Bit 259" "Disabled,Enabled" eventfld.long 0x00 2. " CEB258 ,Clear Enable Bit 258" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB257 ,Clear Enable Bit 257" "Disabled,Enabled" eventfld.long 0x00 0. " CEB256 ,Clear Enable Bit 256" "Disabled,Enabled" group.long 0x11a4++0x03 line.long 0x0 "GICD_ICER9,Interrupt Clear Enable Register 9" eventfld.long 0x00 31. " CEB319 ,Clear Enable Bit 319" "Disabled,Enabled" eventfld.long 0x00 30. " CEB318 ,Clear Enable Bit 318" "Disabled,Enabled" eventfld.long 0x00 29. " CEB317 ,Clear Enable Bit 317" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB316 ,Clear Enable Bit 316" "Disabled,Enabled" eventfld.long 0x00 27. " CEB315 ,Clear Enable Bit 315" "Disabled,Enabled" eventfld.long 0x00 26. " CEB314 ,Clear Enable Bit 314" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB313 ,Clear Enable Bit 313" "Disabled,Enabled" eventfld.long 0x00 24. " CEB312 ,Clear Enable Bit 312" "Disabled,Enabled" eventfld.long 0x00 23. " CEB311 ,Clear Enable Bit 311" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB310 ,Clear Enable Bit 310" "Disabled,Enabled" eventfld.long 0x00 21. " CEB309 ,Clear Enable Bit 309" "Disabled,Enabled" eventfld.long 0x00 20. " CEB308 ,Clear Enable Bit 308" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB307 ,Clear Enable Bit 307" "Disabled,Enabled" eventfld.long 0x00 18. " CEB306 ,Clear Enable Bit 306" "Disabled,Enabled" eventfld.long 0x00 17. " CEB305 ,Clear Enable Bit 305" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB304 ,Clear Enable Bit 304" "Disabled,Enabled" eventfld.long 0x00 15. " CEB303 ,Clear Enable Bit 303" "Disabled,Enabled" eventfld.long 0x00 14. " CEB302 ,Clear Enable Bit 302" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB301 ,Clear Enable Bit 301" "Disabled,Enabled" eventfld.long 0x00 12. " CEB300 ,Clear Enable Bit 300" "Disabled,Enabled" eventfld.long 0x00 11. " CEB299 ,Clear Enable Bit 299" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB298 ,Clear Enable Bit 298" "Disabled,Enabled" eventfld.long 0x00 9. " CEB297 ,Clear Enable Bit 297" "Disabled,Enabled" eventfld.long 0x00 8. " CEB296 ,Clear Enable Bit 296" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB295 ,Clear Enable Bit 295" "Disabled,Enabled" eventfld.long 0x00 6. " CEB294 ,Clear Enable Bit 294" "Disabled,Enabled" eventfld.long 0x00 5. " CEB293 ,Clear Enable Bit 293" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB292 ,Clear Enable Bit 292" "Disabled,Enabled" eventfld.long 0x00 3. " CEB291 ,Clear Enable Bit 291" "Disabled,Enabled" eventfld.long 0x00 2. " CEB290 ,Clear Enable Bit 290" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB289 ,Clear Enable Bit 289" "Disabled,Enabled" eventfld.long 0x00 0. " CEB288 ,Clear Enable Bit 288" "Disabled,Enabled" group.long 0x11a8++0x03 line.long 0x0 "GICD_ICER10,Interrupt Clear Enable Register 10" eventfld.long 0x00 31. " CEB351 ,Clear Enable Bit 351" "Disabled,Enabled" eventfld.long 0x00 30. " CEB350 ,Clear Enable Bit 350" "Disabled,Enabled" eventfld.long 0x00 29. " CEB349 ,Clear Enable Bit 349" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB348 ,Clear Enable Bit 348" "Disabled,Enabled" eventfld.long 0x00 27. " CEB347 ,Clear Enable Bit 347" "Disabled,Enabled" eventfld.long 0x00 26. " CEB346 ,Clear Enable Bit 346" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB345 ,Clear Enable Bit 345" "Disabled,Enabled" eventfld.long 0x00 24. " CEB344 ,Clear Enable Bit 344" "Disabled,Enabled" eventfld.long 0x00 23. " CEB343 ,Clear Enable Bit 343" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB342 ,Clear Enable Bit 342" "Disabled,Enabled" eventfld.long 0x00 21. " CEB341 ,Clear Enable Bit 341" "Disabled,Enabled" eventfld.long 0x00 20. " CEB340 ,Clear Enable Bit 340" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB339 ,Clear Enable Bit 339" "Disabled,Enabled" eventfld.long 0x00 18. " CEB338 ,Clear Enable Bit 338" "Disabled,Enabled" eventfld.long 0x00 17. " CEB337 ,Clear Enable Bit 337" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB336 ,Clear Enable Bit 336" "Disabled,Enabled" eventfld.long 0x00 15. " CEB335 ,Clear Enable Bit 335" "Disabled,Enabled" eventfld.long 0x00 14. " CEB334 ,Clear Enable Bit 334" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB333 ,Clear Enable Bit 333" "Disabled,Enabled" eventfld.long 0x00 12. " CEB332 ,Clear Enable Bit 332" "Disabled,Enabled" eventfld.long 0x00 11. " CEB331 ,Clear Enable Bit 331" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB330 ,Clear Enable Bit 330" "Disabled,Enabled" eventfld.long 0x00 9. " CEB329 ,Clear Enable Bit 329" "Disabled,Enabled" eventfld.long 0x00 8. " CEB328 ,Clear Enable Bit 328" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB327 ,Clear Enable Bit 327" "Disabled,Enabled" eventfld.long 0x00 6. " CEB326 ,Clear Enable Bit 326" "Disabled,Enabled" eventfld.long 0x00 5. " CEB325 ,Clear Enable Bit 325" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB324 ,Clear Enable Bit 324" "Disabled,Enabled" eventfld.long 0x00 3. " CEB323 ,Clear Enable Bit 323" "Disabled,Enabled" eventfld.long 0x00 2. " CEB322 ,Clear Enable Bit 322" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB321 ,Clear Enable Bit 321" "Disabled,Enabled" eventfld.long 0x00 0. " CEB320 ,Clear Enable Bit 320" "Disabled,Enabled" group.long 0x11ac++0x03 line.long 0x0 "GICD_ICER11,Interrupt Clear Enable Register 11" eventfld.long 0x00 31. " CEB383 ,Clear Enable Bit 383" "Disabled,Enabled" eventfld.long 0x00 30. " CEB382 ,Clear Enable Bit 382" "Disabled,Enabled" eventfld.long 0x00 29. " CEB381 ,Clear Enable Bit 381" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB380 ,Clear Enable Bit 380" "Disabled,Enabled" eventfld.long 0x00 27. " CEB379 ,Clear Enable Bit 379" "Disabled,Enabled" eventfld.long 0x00 26. " CEB378 ,Clear Enable Bit 378" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB377 ,Clear Enable Bit 377" "Disabled,Enabled" eventfld.long 0x00 24. " CEB376 ,Clear Enable Bit 376" "Disabled,Enabled" eventfld.long 0x00 23. " CEB375 ,Clear Enable Bit 375" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB374 ,Clear Enable Bit 374" "Disabled,Enabled" eventfld.long 0x00 21. " CEB373 ,Clear Enable Bit 373" "Disabled,Enabled" eventfld.long 0x00 20. " CEB372 ,Clear Enable Bit 372" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB371 ,Clear Enable Bit 371" "Disabled,Enabled" eventfld.long 0x00 18. " CEB370 ,Clear Enable Bit 370" "Disabled,Enabled" eventfld.long 0x00 17. " CEB369 ,Clear Enable Bit 369" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB368 ,Clear Enable Bit 368" "Disabled,Enabled" eventfld.long 0x00 15. " CEB367 ,Clear Enable Bit 367" "Disabled,Enabled" eventfld.long 0x00 14. " CEB366 ,Clear Enable Bit 366" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB365 ,Clear Enable Bit 365" "Disabled,Enabled" eventfld.long 0x00 12. " CEB364 ,Clear Enable Bit 364" "Disabled,Enabled" eventfld.long 0x00 11. " CEB363 ,Clear Enable Bit 363" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB362 ,Clear Enable Bit 362" "Disabled,Enabled" eventfld.long 0x00 9. " CEB361 ,Clear Enable Bit 361" "Disabled,Enabled" eventfld.long 0x00 8. " CEB360 ,Clear Enable Bit 360" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB359 ,Clear Enable Bit 359" "Disabled,Enabled" eventfld.long 0x00 6. " CEB358 ,Clear Enable Bit 358" "Disabled,Enabled" eventfld.long 0x00 5. " CEB357 ,Clear Enable Bit 357" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB356 ,Clear Enable Bit 356" "Disabled,Enabled" eventfld.long 0x00 3. " CEB355 ,Clear Enable Bit 355" "Disabled,Enabled" eventfld.long 0x00 2. " CEB354 ,Clear Enable Bit 354" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB353 ,Clear Enable Bit 353" "Disabled,Enabled" eventfld.long 0x00 0. " CEB352 ,Clear Enable Bit 352" "Disabled,Enabled" group.long 0x11b0++0x03 line.long 0x0 "GICD_ICER12,Interrupt Clear Enable Register 12" eventfld.long 0x00 31. " CEB415 ,Clear Enable Bit 415" "Disabled,Enabled" eventfld.long 0x00 30. " CEB414 ,Clear Enable Bit 414" "Disabled,Enabled" eventfld.long 0x00 29. " CEB413 ,Clear Enable Bit 413" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB412 ,Clear Enable Bit 412" "Disabled,Enabled" eventfld.long 0x00 27. " CEB411 ,Clear Enable Bit 411" "Disabled,Enabled" eventfld.long 0x00 26. " CEB410 ,Clear Enable Bit 410" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB409 ,Clear Enable Bit 409" "Disabled,Enabled" eventfld.long 0x00 24. " CEB408 ,Clear Enable Bit 408" "Disabled,Enabled" eventfld.long 0x00 23. " CEB407 ,Clear Enable Bit 407" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB406 ,Clear Enable Bit 406" "Disabled,Enabled" eventfld.long 0x00 21. " CEB405 ,Clear Enable Bit 405" "Disabled,Enabled" eventfld.long 0x00 20. " CEB404 ,Clear Enable Bit 404" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB403 ,Clear Enable Bit 403" "Disabled,Enabled" eventfld.long 0x00 18. " CEB402 ,Clear Enable Bit 402" "Disabled,Enabled" eventfld.long 0x00 17. " CEB401 ,Clear Enable Bit 401" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB400 ,Clear Enable Bit 400" "Disabled,Enabled" eventfld.long 0x00 15. " CEB399 ,Clear Enable Bit 399" "Disabled,Enabled" eventfld.long 0x00 14. " CEB398 ,Clear Enable Bit 398" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB397 ,Clear Enable Bit 397" "Disabled,Enabled" eventfld.long 0x00 12. " CEB396 ,Clear Enable Bit 396" "Disabled,Enabled" eventfld.long 0x00 11. " CEB395 ,Clear Enable Bit 395" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB394 ,Clear Enable Bit 394" "Disabled,Enabled" eventfld.long 0x00 9. " CEB393 ,Clear Enable Bit 393" "Disabled,Enabled" eventfld.long 0x00 8. " CEB392 ,Clear Enable Bit 392" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB391 ,Clear Enable Bit 391" "Disabled,Enabled" eventfld.long 0x00 6. " CEB390 ,Clear Enable Bit 390" "Disabled,Enabled" eventfld.long 0x00 5. " CEB389 ,Clear Enable Bit 389" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB388 ,Clear Enable Bit 388" "Disabled,Enabled" eventfld.long 0x00 3. " CEB387 ,Clear Enable Bit 387" "Disabled,Enabled" eventfld.long 0x00 2. " CEB386 ,Clear Enable Bit 386" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB385 ,Clear Enable Bit 385" "Disabled,Enabled" eventfld.long 0x00 0. " CEB384 ,Clear Enable Bit 384" "Disabled,Enabled" group.long 0x11b4++0x03 line.long 0x0 "GICD_ICER13,Interrupt Clear Enable Register 13" eventfld.long 0x00 31. " CEB447 ,Clear Enable Bit 447" "Disabled,Enabled" eventfld.long 0x00 30. " CEB446 ,Clear Enable Bit 446" "Disabled,Enabled" eventfld.long 0x00 29. " CEB445 ,Clear Enable Bit 445" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB444 ,Clear Enable Bit 444" "Disabled,Enabled" eventfld.long 0x00 27. " CEB443 ,Clear Enable Bit 443" "Disabled,Enabled" eventfld.long 0x00 26. " CEB442 ,Clear Enable Bit 442" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB441 ,Clear Enable Bit 441" "Disabled,Enabled" eventfld.long 0x00 24. " CEB440 ,Clear Enable Bit 440" "Disabled,Enabled" eventfld.long 0x00 23. " CEB439 ,Clear Enable Bit 439" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB438 ,Clear Enable Bit 438" "Disabled,Enabled" eventfld.long 0x00 21. " CEB437 ,Clear Enable Bit 437" "Disabled,Enabled" eventfld.long 0x00 20. " CEB436 ,Clear Enable Bit 436" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB435 ,Clear Enable Bit 435" "Disabled,Enabled" eventfld.long 0x00 18. " CEB434 ,Clear Enable Bit 434" "Disabled,Enabled" eventfld.long 0x00 17. " CEB433 ,Clear Enable Bit 433" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB432 ,Clear Enable Bit 432" "Disabled,Enabled" eventfld.long 0x00 15. " CEB431 ,Clear Enable Bit 431" "Disabled,Enabled" eventfld.long 0x00 14. " CEB430 ,Clear Enable Bit 430" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB429 ,Clear Enable Bit 429" "Disabled,Enabled" eventfld.long 0x00 12. " CEB428 ,Clear Enable Bit 428" "Disabled,Enabled" eventfld.long 0x00 11. " CEB427 ,Clear Enable Bit 427" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB426 ,Clear Enable Bit 426" "Disabled,Enabled" eventfld.long 0x00 9. " CEB425 ,Clear Enable Bit 425" "Disabled,Enabled" eventfld.long 0x00 8. " CEB424 ,Clear Enable Bit 424" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB423 ,Clear Enable Bit 423" "Disabled,Enabled" eventfld.long 0x00 6. " CEB422 ,Clear Enable Bit 422" "Disabled,Enabled" eventfld.long 0x00 5. " CEB421 ,Clear Enable Bit 421" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB420 ,Clear Enable Bit 420" "Disabled,Enabled" eventfld.long 0x00 3. " CEB419 ,Clear Enable Bit 419" "Disabled,Enabled" eventfld.long 0x00 2. " CEB418 ,Clear Enable Bit 418" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB417 ,Clear Enable Bit 417" "Disabled,Enabled" eventfld.long 0x00 0. " CEB416 ,Clear Enable Bit 416" "Disabled,Enabled" group.long 0x11b8++0x03 line.long 0x0 "GICD_ICER14,Interrupt Clear Enable Register 14" eventfld.long 0x00 31. " CEB479 ,Clear Enable Bit 479" "Disabled,Enabled" eventfld.long 0x00 30. " CEB478 ,Clear Enable Bit 478" "Disabled,Enabled" eventfld.long 0x00 29. " CEB477 ,Clear Enable Bit 477" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB476 ,Clear Enable Bit 476" "Disabled,Enabled" eventfld.long 0x00 27. " CEB475 ,Clear Enable Bit 475" "Disabled,Enabled" eventfld.long 0x00 26. " CEB474 ,Clear Enable Bit 474" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB473 ,Clear Enable Bit 473" "Disabled,Enabled" eventfld.long 0x00 24. " CEB472 ,Clear Enable Bit 472" "Disabled,Enabled" eventfld.long 0x00 23. " CEB471 ,Clear Enable Bit 471" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB470 ,Clear Enable Bit 470" "Disabled,Enabled" eventfld.long 0x00 21. " CEB469 ,Clear Enable Bit 469" "Disabled,Enabled" eventfld.long 0x00 20. " CEB468 ,Clear Enable Bit 468" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB467 ,Clear Enable Bit 467" "Disabled,Enabled" eventfld.long 0x00 18. " CEB466 ,Clear Enable Bit 466" "Disabled,Enabled" eventfld.long 0x00 17. " CEB465 ,Clear Enable Bit 465" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB464 ,Clear Enable Bit 464" "Disabled,Enabled" eventfld.long 0x00 15. " CEB463 ,Clear Enable Bit 463" "Disabled,Enabled" eventfld.long 0x00 14. " CEB462 ,Clear Enable Bit 462" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB461 ,Clear Enable Bit 461" "Disabled,Enabled" eventfld.long 0x00 12. " CEB460 ,Clear Enable Bit 460" "Disabled,Enabled" eventfld.long 0x00 11. " CEB459 ,Clear Enable Bit 459" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB458 ,Clear Enable Bit 458" "Disabled,Enabled" eventfld.long 0x00 9. " CEB457 ,Clear Enable Bit 457" "Disabled,Enabled" eventfld.long 0x00 8. " CEB456 ,Clear Enable Bit 456" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB455 ,Clear Enable Bit 455" "Disabled,Enabled" eventfld.long 0x00 6. " CEB454 ,Clear Enable Bit 454" "Disabled,Enabled" eventfld.long 0x00 5. " CEB453 ,Clear Enable Bit 453" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB452 ,Clear Enable Bit 452" "Disabled,Enabled" eventfld.long 0x00 3. " CEB451 ,Clear Enable Bit 451" "Disabled,Enabled" eventfld.long 0x00 2. " CEB450 ,Clear Enable Bit 450" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB449 ,Clear Enable Bit 449" "Disabled,Enabled" eventfld.long 0x00 0. " CEB448 ,Clear Enable Bit 448" "Disabled,Enabled" group.long 0x11bC++0x03 line.long 0x0 "GICD_ICER15,Interrupt Clear Enable Register 15" eventfld.long 0x00 31. " CEB511 ,Clear Enable Bit 511" "Disabled,Enabled" eventfld.long 0x00 30. " CEB510 ,Clear Enable Bit 510" "Disabled,Enabled" eventfld.long 0x00 29. " CEB509 ,Clear Enable Bit 509" "Disabled,Enabled" textline " " eventfld.long 0x00 28. " CEB508 ,Clear Enable Bit 508" "Disabled,Enabled" eventfld.long 0x00 27. " CEB507 ,Clear Enable Bit 507" "Disabled,Enabled" eventfld.long 0x00 26. " CEB506 ,Clear Enable Bit 506" "Disabled,Enabled" textline " " eventfld.long 0x00 25. " CEB505 ,Clear Enable Bit 505" "Disabled,Enabled" eventfld.long 0x00 24. " CEB504 ,Clear Enable Bit 504" "Disabled,Enabled" eventfld.long 0x00 23. " CEB503 ,Clear Enable Bit 503" "Disabled,Enabled" textline " " eventfld.long 0x00 22. " CEB502 ,Clear Enable Bit 502" "Disabled,Enabled" eventfld.long 0x00 21. " CEB501 ,Clear Enable Bit 501" "Disabled,Enabled" eventfld.long 0x00 20. " CEB500 ,Clear Enable Bit 500" "Disabled,Enabled" textline " " eventfld.long 0x00 19. " CEB499 ,Clear Enable Bit 499" "Disabled,Enabled" eventfld.long 0x00 18. " CEB498 ,Clear Enable Bit 498" "Disabled,Enabled" eventfld.long 0x00 17. " CEB497 ,Clear Enable Bit 497" "Disabled,Enabled" textline " " eventfld.long 0x00 16. " CEB496 ,Clear Enable Bit 496" "Disabled,Enabled" eventfld.long 0x00 15. " CEB495 ,Clear Enable Bit 495" "Disabled,Enabled" eventfld.long 0x00 14. " CEB494 ,Clear Enable Bit 494" "Disabled,Enabled" textline " " eventfld.long 0x00 13. " CEB493 ,Clear Enable Bit 493" "Disabled,Enabled" eventfld.long 0x00 12. " CEB492 ,Clear Enable Bit 492" "Disabled,Enabled" eventfld.long 0x00 11. " CEB491 ,Clear Enable Bit 491" "Disabled,Enabled" textline " " eventfld.long 0x00 10. " CEB490 ,Clear Enable Bit 490" "Disabled,Enabled" eventfld.long 0x00 9. " CEB489 ,Clear Enable Bit 489" "Disabled,Enabled" eventfld.long 0x00 8. " CEB488 ,Clear Enable Bit 488" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " CEB487 ,Clear Enable Bit 487" "Disabled,Enabled" eventfld.long 0x00 6. " CEB486 ,Clear Enable Bit 486" "Disabled,Enabled" eventfld.long 0x00 5. " CEB485 ,Clear Enable Bit 485" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " CEB484 ,Clear Enable Bit 484" "Disabled,Enabled" eventfld.long 0x00 3. " CEB483 ,Clear Enable Bit 483" "Disabled,Enabled" eventfld.long 0x00 2. " CEB482 ,Clear Enable Bit 482" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " CEB481 ,Clear Enable Bit 481" "Disabled,Enabled" eventfld.long 0x00 0. " CEB480 ,Clear Enable Bit 480" "Disabled,Enabled" endif textline " " group.long 0x1200++0x03 line.long 0x0 "GICD_ISPR0,Interrupt Set Pending Register 0" bitfld.long 0x00 31. " SPB31 ,Set Pending Bit 31" "Not pending,Pending" bitfld.long 0x00 30. " SPB30 ,Set Pending Bit 30" "Not pending,Pending" bitfld.long 0x00 29. " SPB29 ,Set Pending Bit 29" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB28 ,Set Pending Bit 28" "Not pending,Pending" bitfld.long 0x00 27. " SPB27 ,Set Pending Bit 27" "Not pending,Pending" bitfld.long 0x00 26. " SPB26 ,Set Pending Bit 26" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB25 ,Set Pending Bit 25" "Not pending,Pending" bitfld.long 0x00 24. " SPB24 ,Set Pending Bit 24" "Not pending,Pending" bitfld.long 0x00 23. " SPB23 ,Set Pending Bit 23" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB22 ,Set Pending Bit 22" "Not pending,Pending" bitfld.long 0x00 21. " SPB21 ,Set Pending Bit 21" "Not pending,Pending" bitfld.long 0x00 20. " SPB20 ,Set Pending Bit 20" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB19 ,Set Pending Bit 19" "Not pending,Pending" bitfld.long 0x00 18. " SPB18 ,Set Pending Bit 18" "Not pending,Pending" bitfld.long 0x00 17. " SPB17 ,Set Pending Bit 17" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB16 ,Set Pending Bit 16" "Not pending,Pending" bitfld.long 0x00 15. " SPB15 ,Set Pending Bit 15" "Not pending,Pending" bitfld.long 0x00 14. " SPB14 ,Set Pending Bit 14" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB13 ,Set Pending Bit 13" "Not pending,Pending" bitfld.long 0x00 12. " SPB12 ,Set Pending Bit 12" "Not pending,Pending" bitfld.long 0x00 11. " SPB11 ,Set Pending Bit 11" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB10 ,Set Pending Bit 10" "Not pending,Pending" bitfld.long 0x00 9. " SPB9 ,Set Pending Bit 9" "Not pending,Pending" bitfld.long 0x00 8. " SPB8 ,Set Pending Bit 8" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB7 ,Set Pending Bit 7" "Not pending,Pending" bitfld.long 0x00 6. " SPB6 ,Set Pending Bit 6" "Not pending,Pending" bitfld.long 0x00 5. " SPB5 ,Set Pending Bit 5" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB4 ,Set Pending Bit 4" "Not pending,Pending" bitfld.long 0x00 3. " SPB3 ,Set Pending Bit 3" "Not pending,Pending" bitfld.long 0x00 2. " SPB2 ,Set Pending Bit 2" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB1 ,Set Pending Bit 1" "Not pending,Pending" bitfld.long 0x00 0. " SPB0 ,Set Pending Bit 0" "Not pending,Pending" group.long 0x1204++0x03 line.long 0x0 "GICD_ISPR1,Interrupt Set Pending Register 1" bitfld.long 0x00 31. " SPB63 ,Set Pending Bit 63" "Not pending,Pending" bitfld.long 0x00 30. " SPB62 ,Set Pending Bit 62" "Not pending,Pending" bitfld.long 0x00 29. " SPB61 ,Set Pending Bit 61" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB60 ,Set Pending Bit 60" "Not pending,Pending" bitfld.long 0x00 27. " SPB59 ,Set Pending Bit 59" "Not pending,Pending" bitfld.long 0x00 26. " SPB58 ,Set Pending Bit 58" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB57 ,Set Pending Bit 57" "Not pending,Pending" bitfld.long 0x00 24. " SPB56 ,Set Pending Bit 56" "Not pending,Pending" bitfld.long 0x00 23. " SPB55 ,Set Pending Bit 55" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB54 ,Set Pending Bit 54" "Not pending,Pending" bitfld.long 0x00 21. " SPB53 ,Set Pending Bit 53" "Not pending,Pending" bitfld.long 0x00 20. " SPB52 ,Set Pending Bit 52" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB51 ,Set Pending Bit 51" "Not pending,Pending" bitfld.long 0x00 18. " SPB50 ,Set Pending Bit 50" "Not pending,Pending" bitfld.long 0x00 17. " SPB49 ,Set Pending Bit 49" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB48 ,Set Pending Bit 48" "Not pending,Pending" bitfld.long 0x00 15. " SPB47 ,Set Pending Bit 47" "Not pending,Pending" bitfld.long 0x00 14. " SPB46 ,Set Pending Bit 46" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB45 ,Set Pending Bit 45" "Not pending,Pending" bitfld.long 0x00 12. " SPB44 ,Set Pending Bit 44" "Not pending,Pending" bitfld.long 0x00 11. " SPB43 ,Set Pending Bit 43" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB42 ,Set Pending Bit 42" "Not pending,Pending" bitfld.long 0x00 9. " SPB41 ,Set Pending Bit 41" "Not pending,Pending" bitfld.long 0x00 8. " SPB40 ,Set Pending Bit 40" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB39 ,Set Pending Bit 39" "Not pending,Pending" bitfld.long 0x00 6. " SPB38 ,Set Pending Bit 38" "Not pending,Pending" bitfld.long 0x00 5. " SPB37 ,Set Pending Bit 37" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB36 ,Set Pending Bit 36" "Not pending,Pending" bitfld.long 0x00 3. " SPB35 ,Set Pending Bit 35" "Not pending,Pending" bitfld.long 0x00 2. " SPB34 ,Set Pending Bit 34" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB33 ,Set Pending Bit 33" "Not pending,Pending" bitfld.long 0x00 0. " SPB32 ,Set Pending Bit 32" "Not pending,Pending" group.long 0x1208++0x03 line.long 0x0 "GICD_ISPR2,Interrupt Set Pending Register 2" bitfld.long 0x00 31. " SPB95 ,Set Pending Bit 95" "Not pending,Pending" bitfld.long 0x00 30. " SPB94 ,Set Pending Bit 94" "Not pending,Pending" bitfld.long 0x00 29. " SPB93 ,Set Pending Bit 93" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB92 ,Set Pending Bit 92" "Not pending,Pending" bitfld.long 0x00 27. " SPB91 ,Set Pending Bit 91" "Not pending,Pending" bitfld.long 0x00 26. " SPB90 ,Set Pending Bit 90" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB89 ,Set Pending Bit 89" "Not pending,Pending" bitfld.long 0x00 24. " SPB88 ,Set Pending Bit 88" "Not pending,Pending" bitfld.long 0x00 23. " SPB87 ,Set Pending Bit 87" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB86 ,Set Pending Bit 86" "Not pending,Pending" bitfld.long 0x00 21. " SPB85 ,Set Pending Bit 85" "Not pending,Pending" bitfld.long 0x00 20. " SPB84 ,Set Pending Bit 84" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB83 ,Set Pending Bit 83" "Not pending,Pending" bitfld.long 0x00 18. " SPB82 ,Set Pending Bit 82" "Not pending,Pending" bitfld.long 0x00 17. " SPB81 ,Set Pending Bit 81" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB80 ,Set Pending Bit 80" "Not pending,Pending" bitfld.long 0x00 15. " SPB79 ,Set Pending Bit 79" "Not pending,Pending" bitfld.long 0x00 14. " SPB78 ,Set Pending Bit 78" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB77 ,Set Pending Bit 77" "Not pending,Pending" bitfld.long 0x00 12. " SPB76 ,Set Pending Bit 76" "Not pending,Pending" bitfld.long 0x00 11. " SPB75 ,Set Pending Bit 75" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB74 ,Set Pending Bit 74" "Not pending,Pending" bitfld.long 0x00 9. " SPB73 ,Set Pending Bit 73" "Not pending,Pending" bitfld.long 0x00 8. " SPB72 ,Set Pending Bit 72" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB71 ,Set Pending Bit 71" "Not pending,Pending" bitfld.long 0x00 6. " SPB70 ,Set Pending Bit 70" "Not pending,Pending" bitfld.long 0x00 5. " SPB69 ,Set Pending Bit 69" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB68 ,Set Pending Bit 68" "Not pending,Pending" bitfld.long 0x00 3. " SPB67 ,Set Pending Bit 67" "Not pending,Pending" bitfld.long 0x00 2. " SPB66 ,Set Pending Bit 66" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB65 ,Set Pending Bit 65" "Not pending,Pending" bitfld.long 0x00 0. " SPB64 ,Set Pending Bit 64" "Not pending,Pending" group.long 0x120C++0x03 line.long 0x0 "GICD_ISPR3,Interrupt Set Pending Register 3" bitfld.long 0x00 31. " SPB127 ,Set Pending Bit 127" "Not pending,Pending" bitfld.long 0x00 30. " SPB126 ,Set Pending Bit 126" "Not pending,Pending" bitfld.long 0x00 29. " SPB125 ,Set Pending Bit 125" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB124 ,Set Pending Bit 124" "Not pending,Pending" bitfld.long 0x00 27. " SPB123 ,Set Pending Bit 123" "Not pending,Pending" bitfld.long 0x00 26. " SPB122 ,Set Pending Bit 122" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB121 ,Set Pending Bit 121" "Not pending,Pending" bitfld.long 0x00 24. " SPB120 ,Set Pending Bit 120" "Not pending,Pending" bitfld.long 0x00 23. " SPB119 ,Set Pending Bit 119" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB118 ,Set Pending Bit 118" "Not pending,Pending" bitfld.long 0x00 21. " SPB117 ,Set Pending Bit 117" "Not pending,Pending" bitfld.long 0x00 20. " SPB116 ,Set Pending Bit 116" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB115 ,Set Pending Bit 115" "Not pending,Pending" bitfld.long 0x00 18. " SPB114 ,Set Pending Bit 114" "Not pending,Pending" bitfld.long 0x00 17. " SPB113 ,Set Pending Bit 113" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB112 ,Set Pending Bit 112" "Not pending,Pending" bitfld.long 0x00 15. " SPB111 ,Set Pending Bit 111" "Not pending,Pending" bitfld.long 0x00 14. " SPB110 ,Set Pending Bit 110" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB109 ,Set Pending Bit 109" "Not pending,Pending" bitfld.long 0x00 12. " SPB108 ,Set Pending Bit 108" "Not pending,Pending" bitfld.long 0x00 11. " SPB107 ,Set Pending Bit 107" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB106 ,Set Pending Bit 106" "Not pending,Pending" bitfld.long 0x00 9. " SPB105 ,Set Pending Bit 105" "Not pending,Pending" bitfld.long 0x00 8. " SPB104 ,Set Pending Bit 104" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB103 ,Set Pending Bit 103" "Not pending,Pending" bitfld.long 0x00 6. " SPB102 ,Set Pending Bit 102" "Not pending,Pending" bitfld.long 0x00 5. " SPB101 ,Set Pending Bit 101" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB100 ,Set Pending Bit 100" "Not pending,Pending" bitfld.long 0x00 3. " SPB99 ,Set Pending Bit 99" "Not pending,Pending" bitfld.long 0x00 2. " SPB98 ,Set Pending Bit 98" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB97 ,Set Pending Bit 97" "Not pending,Pending" bitfld.long 0x00 0. " SPB96 ,Set Pending Bit 96" "Not pending,Pending" group.long 0x1210++0x03 line.long 0x0 "GICD_ISPR4,Interrupt Set Pending Register 4" bitfld.long 0x00 31. " SPB159 ,Set Pending Bit 159" "Not pending,Pending" bitfld.long 0x00 30. " SPB158 ,Set Pending Bit 158" "Not pending,Pending" bitfld.long 0x00 29. " SPB157 ,Set Pending Bit 157" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB156 ,Set Pending Bit 156" "Not pending,Pending" bitfld.long 0x00 27. " SPB155 ,Set Pending Bit 155" "Not pending,Pending" bitfld.long 0x00 26. " SPB154 ,Set Pending Bit 154" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB153 ,Set Pending Bit 153" "Not pending,Pending" bitfld.long 0x00 24. " SPB152 ,Set Pending Bit 152" "Not pending,Pending" bitfld.long 0x00 23. " SPB151 ,Set Pending Bit 151" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB150 ,Set Pending Bit 150" "Not pending,Pending" bitfld.long 0x00 21. " SPB149 ,Set Pending Bit 149" "Not pending,Pending" bitfld.long 0x00 20. " SPB148 ,Set Pending Bit 148" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB147 ,Set Pending Bit 147" "Not pending,Pending" bitfld.long 0x00 18. " SPB146 ,Set Pending Bit 146" "Not pending,Pending" bitfld.long 0x00 17. " SPB145 ,Set Pending Bit 145" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB144 ,Set Pending Bit 144" "Not pending,Pending" bitfld.long 0x00 15. " SPB143 ,Set Pending Bit 143" "Not pending,Pending" bitfld.long 0x00 14. " SPB142 ,Set Pending Bit 142" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB141 ,Set Pending Bit 141" "Not pending,Pending" bitfld.long 0x00 12. " SPB140 ,Set Pending Bit 140" "Not pending,Pending" bitfld.long 0x00 11. " SPB139 ,Set Pending Bit 139" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB138 ,Set Pending Bit 138" "Not pending,Pending" bitfld.long 0x00 9. " SPB137 ,Set Pending Bit 137" "Not pending,Pending" bitfld.long 0x00 8. " SPB136 ,Set Pending Bit 136" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB135 ,Set Pending Bit 135" "Not pending,Pending" bitfld.long 0x00 6. " SPB134 ,Set Pending Bit 134" "Not pending,Pending" bitfld.long 0x00 5. " SPB133 ,Set Pending Bit 133" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB132 ,Set Pending Bit 132" "Not pending,Pending" bitfld.long 0x00 3. " SPB131 ,Set Pending Bit 131" "Not pending,Pending" bitfld.long 0x00 2. " SPB130 ,Set Pending Bit 130" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB129 ,Set Pending Bit 129" "Not pending,Pending" bitfld.long 0x00 0. " SPB128 ,Set Pending Bit 128" "Not pending,Pending" group.long 0x1214++0x03 line.long 0x0 "GICD_ISPR5,Interrupt Set Pending Register 5" bitfld.long 0x00 31. " SPB191 ,Set Pending Bit 191" "Not pending,Pending" bitfld.long 0x00 30. " SPB190 ,Set Pending Bit 190" "Not pending,Pending" bitfld.long 0x00 29. " SPB189 ,Set Pending Bit 189" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB188 ,Set Pending Bit 188" "Not pending,Pending" bitfld.long 0x00 27. " SPB187 ,Set Pending Bit 187" "Not pending,Pending" bitfld.long 0x00 26. " SPB186 ,Set Pending Bit 186" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB185 ,Set Pending Bit 185" "Not pending,Pending" bitfld.long 0x00 24. " SPB184 ,Set Pending Bit 184" "Not pending,Pending" bitfld.long 0x00 23. " SPB183 ,Set Pending Bit 183" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB182 ,Set Pending Bit 182" "Not pending,Pending" bitfld.long 0x00 21. " SPB181 ,Set Pending Bit 181" "Not pending,Pending" bitfld.long 0x00 20. " SPB180 ,Set Pending Bit 180" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB179 ,Set Pending Bit 179" "Not pending,Pending" bitfld.long 0x00 18. " SPB178 ,Set Pending Bit 178" "Not pending,Pending" bitfld.long 0x00 17. " SPB177 ,Set Pending Bit 177" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB176 ,Set Pending Bit 176" "Not pending,Pending" bitfld.long 0x00 15. " SPB175 ,Set Pending Bit 175" "Not pending,Pending" bitfld.long 0x00 14. " SPB174 ,Set Pending Bit 174" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB173 ,Set Pending Bit 173" "Not pending,Pending" bitfld.long 0x00 12. " SPB172 ,Set Pending Bit 172" "Not pending,Pending" bitfld.long 0x00 11. " SPB171 ,Set Pending Bit 171" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB170 ,Set Pending Bit 170" "Not pending,Pending" bitfld.long 0x00 9. " SPB169 ,Set Pending Bit 169" "Not pending,Pending" bitfld.long 0x00 8. " SPB168 ,Set Pending Bit 168" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB167 ,Set Pending Bit 167" "Not pending,Pending" bitfld.long 0x00 6. " SPB166 ,Set Pending Bit 166" "Not pending,Pending" bitfld.long 0x00 5. " SPB165 ,Set Pending Bit 165" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB164 ,Set Pending Bit 164" "Not pending,Pending" bitfld.long 0x00 3. " SPB163 ,Set Pending Bit 163" "Not pending,Pending" bitfld.long 0x00 2. " SPB162 ,Set Pending Bit 162" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB161 ,Set Pending Bit 161" "Not pending,Pending" bitfld.long 0x00 0. " SPB160 ,Set Pending Bit 160" "Not pending,Pending" group.long 0x1218++0x03 line.long 0x0 "GICD_ISPR6,Interrupt Set Pending Register 6" bitfld.long 0x00 31. " SPB223 ,Set Pending Bit 223" "Not pending,Pending" bitfld.long 0x00 30. " SPB222 ,Set Pending Bit 222" "Not pending,Pending" bitfld.long 0x00 29. " SPB221 ,Set Pending Bit 221" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB220 ,Set Pending Bit 220" "Not pending,Pending" bitfld.long 0x00 27. " SPB219 ,Set Pending Bit 219" "Not pending,Pending" bitfld.long 0x00 26. " SPB218 ,Set Pending Bit 218" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB217 ,Set Pending Bit 217" "Not pending,Pending" bitfld.long 0x00 24. " SPB216 ,Set Pending Bit 216" "Not pending,Pending" bitfld.long 0x00 23. " SPB215 ,Set Pending Bit 215" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB214 ,Set Pending Bit 214" "Not pending,Pending" bitfld.long 0x00 21. " SPB213 ,Set Pending Bit 213" "Not pending,Pending" bitfld.long 0x00 20. " SPB212 ,Set Pending Bit 212" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB211 ,Set Pending Bit 211" "Not pending,Pending" bitfld.long 0x00 18. " SPB210 ,Set Pending Bit 210" "Not pending,Pending" bitfld.long 0x00 17. " SPB209 ,Set Pending Bit 209" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB208 ,Set Pending Bit 208" "Not pending,Pending" bitfld.long 0x00 15. " SPB207 ,Set Pending Bit 207" "Not pending,Pending" bitfld.long 0x00 14. " SPB206 ,Set Pending Bit 206" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB205 ,Set Pending Bit 205" "Not pending,Pending" bitfld.long 0x00 12. " SPB204 ,Set Pending Bit 204" "Not pending,Pending" bitfld.long 0x00 11. " SPB203 ,Set Pending Bit 203" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB202 ,Set Pending Bit 202" "Not pending,Pending" bitfld.long 0x00 9. " SPB201 ,Set Pending Bit 201" "Not pending,Pending" bitfld.long 0x00 8. " SPB200 ,Set Pending Bit 200" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB199 ,Set Pending Bit 199" "Not pending,Pending" bitfld.long 0x00 6. " SPB198 ,Set Pending Bit 198" "Not pending,Pending" bitfld.long 0x00 5. " SPB197 ,Set Pending Bit 197" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB196 ,Set Pending Bit 196" "Not pending,Pending" bitfld.long 0x00 3. " SPB195 ,Set Pending Bit 195" "Not pending,Pending" bitfld.long 0x00 2. " SPB194 ,Set Pending Bit 194" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB193 ,Set Pending Bit 193" "Not pending,Pending" bitfld.long 0x00 0. " SPB192 ,Set Pending Bit 192" "Not pending,Pending" group.long 0x121C++0x03 line.long 0x0 "GICD_ISPR7,Interrupt Set Pending Register 7" bitfld.long 0x00 31. " SPB255 ,Set Pending Bit 255" "Not pending,Pending" bitfld.long 0x00 30. " SPB254 ,Set Pending Bit 254" "Not pending,Pending" bitfld.long 0x00 29. " SPB253 ,Set Pending Bit 253" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB252 ,Set Pending Bit 252" "Not pending,Pending" bitfld.long 0x00 27. " SPB251 ,Set Pending Bit 251" "Not pending,Pending" bitfld.long 0x00 26. " SPB250 ,Set Pending Bit 250" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB249 ,Set Pending Bit 249" "Not pending,Pending" bitfld.long 0x00 24. " SPB248 ,Set Pending Bit 248" "Not pending,Pending" bitfld.long 0x00 23. " SPB247 ,Set Pending Bit 247" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB246 ,Set Pending Bit 246" "Not pending,Pending" bitfld.long 0x00 21. " SPB245 ,Set Pending Bit 245" "Not pending,Pending" bitfld.long 0x00 20. " SPB244 ,Set Pending Bit 244" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB243 ,Set Pending Bit 243" "Not pending,Pending" bitfld.long 0x00 18. " SPB242 ,Set Pending Bit 242" "Not pending,Pending" bitfld.long 0x00 17. " SPB241 ,Set Pending Bit 241" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB240 ,Set Pending Bit 240" "Not pending,Pending" bitfld.long 0x00 15. " SPB239 ,Set Pending Bit 239" "Not pending,Pending" bitfld.long 0x00 14. " SPB238 ,Set Pending Bit 238" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB237 ,Set Pending Bit 237" "Not pending,Pending" bitfld.long 0x00 12. " SPB236 ,Set Pending Bit 236" "Not pending,Pending" bitfld.long 0x00 11. " SPB235 ,Set Pending Bit 235" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB234 ,Set Pending Bit 234" "Not pending,Pending" bitfld.long 0x00 9. " SPB233 ,Set Pending Bit 233" "Not pending,Pending" bitfld.long 0x00 8. " SPB232 ,Set Pending Bit 232" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB231 ,Set Pending Bit 231" "Not pending,Pending" bitfld.long 0x00 6. " SPB230 ,Set Pending Bit 230" "Not pending,Pending" bitfld.long 0x00 5. " SPB229 ,Set Pending Bit 229" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB228 ,Set Pending Bit 228" "Not pending,Pending" bitfld.long 0x00 3. " SPB227 ,Set Pending Bit 227" "Not pending,Pending" bitfld.long 0x00 2. " SPB226 ,Set Pending Bit 226" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB225 ,Set Pending Bit 225" "Not pending,Pending" bitfld.long 0x00 0. " SPB224 ,Set Pending Bit 224" "Not pending,Pending" if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x1220++0x03 line.long 0x0 "GICD_ISPR8,Interrupt Set Pending Register 8" bitfld.long 0x00 31. " SPB287 ,Set Pending Bit 287" "Not pending,Pending" bitfld.long 0x00 30. " SPB286 ,Set Pending Bit 286" "Not pending,Pending" bitfld.long 0x00 29. " SPB285 ,Set Pending Bit 285" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB284 ,Set Pending Bit 284" "Not pending,Pending" bitfld.long 0x00 27. " SPB283 ,Set Pending Bit 283" "Not pending,Pending" bitfld.long 0x00 26. " SPB282 ,Set Pending Bit 282" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB281 ,Set Pending Bit 281" "Not pending,Pending" bitfld.long 0x00 24. " SPB280 ,Set Pending Bit 280" "Not pending,Pending" bitfld.long 0x00 23. " SPB279 ,Set Pending Bit 279" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB278 ,Set Pending Bit 278" "Not pending,Pending" bitfld.long 0x00 21. " SPB277 ,Set Pending Bit 277" "Not pending,Pending" bitfld.long 0x00 20. " SPB276 ,Set Pending Bit 276" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB275 ,Set Pending Bit 275" "Not pending,Pending" bitfld.long 0x00 18. " SPB274 ,Set Pending Bit 274" "Not pending,Pending" bitfld.long 0x00 17. " SPB273 ,Set Pending Bit 273" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB272 ,Set Pending Bit 272" "Not pending,Pending" bitfld.long 0x00 15. " SPB271 ,Set Pending Bit 271" "Not pending,Pending" bitfld.long 0x00 14. " SPB270 ,Set Pending Bit 270" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB269 ,Set Pending Bit 269" "Not pending,Pending" bitfld.long 0x00 12. " SPB268 ,Set Pending Bit 268" "Not pending,Pending" bitfld.long 0x00 11. " SPB267 ,Set Pending Bit 267" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB266 ,Set Pending Bit 266" "Not pending,Pending" bitfld.long 0x00 9. " SPB265 ,Set Pending Bit 265" "Not pending,Pending" bitfld.long 0x00 8. " SPB264 ,Set Pending Bit 264" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB263 ,Set Pending Bit 263" "Not pending,Pending" bitfld.long 0x00 6. " SPB262 ,Set Pending Bit 262" "Not pending,Pending" bitfld.long 0x00 5. " SPB261 ,Set Pending Bit 261" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB260 ,Set Pending Bit 260" "Not pending,Pending" bitfld.long 0x00 3. " SPB259 ,Set Pending Bit 259" "Not pending,Pending" bitfld.long 0x00 2. " SPB258 ,Set Pending Bit 258" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB257 ,Set Pending Bit 257" "Not pending,Pending" bitfld.long 0x00 0. " SPB256 ,Set Pending Bit 256" "Not pending,Pending" group.long 0x1224++0x03 line.long 0x0 "GICD_ISPR9,Interrupt Set Pending Register 9" bitfld.long 0x00 31. " SPB319 ,Set Pending Bit 319" "Not pending,Pending" bitfld.long 0x00 30. " SPB318 ,Set Pending Bit 318" "Not pending,Pending" bitfld.long 0x00 29. " SPB317 ,Set Pending Bit 317" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB316 ,Set Pending Bit 316" "Not pending,Pending" bitfld.long 0x00 27. " SPB315 ,Set Pending Bit 315" "Not pending,Pending" bitfld.long 0x00 26. " SPB314 ,Set Pending Bit 314" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB313 ,Set Pending Bit 313" "Not pending,Pending" bitfld.long 0x00 24. " SPB312 ,Set Pending Bit 312" "Not pending,Pending" bitfld.long 0x00 23. " SPB311 ,Set Pending Bit 311" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB310 ,Set Pending Bit 310" "Not pending,Pending" bitfld.long 0x00 21. " SPB309 ,Set Pending Bit 309" "Not pending,Pending" bitfld.long 0x00 20. " SPB308 ,Set Pending Bit 308" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB307 ,Set Pending Bit 307" "Not pending,Pending" bitfld.long 0x00 18. " SPB306 ,Set Pending Bit 306" "Not pending,Pending" bitfld.long 0x00 17. " SPB305 ,Set Pending Bit 305" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB304 ,Set Pending Bit 304" "Not pending,Pending" bitfld.long 0x00 15. " SPB303 ,Set Pending Bit 303" "Not pending,Pending" bitfld.long 0x00 14. " SPB302 ,Set Pending Bit 302" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB301 ,Set Pending Bit 301" "Not pending,Pending" bitfld.long 0x00 12. " SPB300 ,Set Pending Bit 300" "Not pending,Pending" bitfld.long 0x00 11. " SPB299 ,Set Pending Bit 299" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB298 ,Set Pending Bit 298" "Not pending,Pending" bitfld.long 0x00 9. " SPB297 ,Set Pending Bit 297" "Not pending,Pending" bitfld.long 0x00 8. " SPB296 ,Set Pending Bit 296" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB295 ,Set Pending Bit 295" "Not pending,Pending" bitfld.long 0x00 6. " SPB294 ,Set Pending Bit 294" "Not pending,Pending" bitfld.long 0x00 5. " SPB293 ,Set Pending Bit 293" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB292 ,Set Pending Bit 292" "Not pending,Pending" bitfld.long 0x00 3. " SPB291 ,Set Pending Bit 291" "Not pending,Pending" bitfld.long 0x00 2. " SPB290 ,Set Pending Bit 290" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB289 ,Set Pending Bit 289" "Not pending,Pending" bitfld.long 0x00 0. " SPB288 ,Set Pending Bit 288" "Not pending,Pending" group.long 0x1228++0x03 line.long 0x0 "GICD_ISPR10,Interrupt Set Pending Register 10" bitfld.long 0x00 31. " SPB351 ,Set Pending Bit 351" "Not pending,Pending" bitfld.long 0x00 30. " SPB350 ,Set Pending Bit 350" "Not pending,Pending" bitfld.long 0x00 29. " SPB349 ,Set Pending Bit 349" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB348 ,Set Pending Bit 348" "Not pending,Pending" bitfld.long 0x00 27. " SPB347 ,Set Pending Bit 347" "Not pending,Pending" bitfld.long 0x00 26. " SPB346 ,Set Pending Bit 346" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB345 ,Set Pending Bit 345" "Not pending,Pending" bitfld.long 0x00 24. " SPB344 ,Set Pending Bit 344" "Not pending,Pending" bitfld.long 0x00 23. " SPB343 ,Set Pending Bit 343" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB342 ,Set Pending Bit 342" "Not pending,Pending" bitfld.long 0x00 21. " SPB341 ,Set Pending Bit 341" "Not pending,Pending" bitfld.long 0x00 20. " SPB340 ,Set Pending Bit 340" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB339 ,Set Pending Bit 339" "Not pending,Pending" bitfld.long 0x00 18. " SPB338 ,Set Pending Bit 338" "Not pending,Pending" bitfld.long 0x00 17. " SPB337 ,Set Pending Bit 337" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB336 ,Set Pending Bit 336" "Not pending,Pending" bitfld.long 0x00 15. " SPB335 ,Set Pending Bit 335" "Not pending,Pending" bitfld.long 0x00 14. " SPB334 ,Set Pending Bit 334" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB333 ,Set Pending Bit 333" "Not pending,Pending" bitfld.long 0x00 12. " SPB332 ,Set Pending Bit 332" "Not pending,Pending" bitfld.long 0x00 11. " SPB331 ,Set Pending Bit 331" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB330 ,Set Pending Bit 330" "Not pending,Pending" bitfld.long 0x00 9. " SPB329 ,Set Pending Bit 329" "Not pending,Pending" bitfld.long 0x00 8. " SPB328 ,Set Pending Bit 328" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB327 ,Set Pending Bit 327" "Not pending,Pending" bitfld.long 0x00 6. " SPB326 ,Set Pending Bit 326" "Not pending,Pending" bitfld.long 0x00 5. " SPB325 ,Set Pending Bit 325" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB324 ,Set Pending Bit 324" "Not pending,Pending" bitfld.long 0x00 3. " SPB323 ,Set Pending Bit 323" "Not pending,Pending" bitfld.long 0x00 2. " SPB322 ,Set Pending Bit 322" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB321 ,Set Pending Bit 321" "Not pending,Pending" bitfld.long 0x00 0. " SPB320 ,Set Pending Bit 320" "Not pending,Pending" group.long 0x122C++0x03 line.long 0x0 "GICD_ISPR11,Interrupt Set Pending Register 11" bitfld.long 0x00 31. " SPB383 ,Set Pending Bit 383" "Not pending,Pending" bitfld.long 0x00 30. " SPB382 ,Set Pending Bit 382" "Not pending,Pending" bitfld.long 0x00 29. " SPB381 ,Set Pending Bit 381" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB380 ,Set Pending Bit 380" "Not pending,Pending" bitfld.long 0x00 27. " SPB379 ,Set Pending Bit 379" "Not pending,Pending" bitfld.long 0x00 26. " SPB378 ,Set Pending Bit 378" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB377 ,Set Pending Bit 377" "Not pending,Pending" bitfld.long 0x00 24. " SPB376 ,Set Pending Bit 376" "Not pending,Pending" bitfld.long 0x00 23. " SPB375 ,Set Pending Bit 375" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB374 ,Set Pending Bit 374" "Not pending,Pending" bitfld.long 0x00 21. " SPB373 ,Set Pending Bit 373" "Not pending,Pending" bitfld.long 0x00 20. " SPB372 ,Set Pending Bit 372" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB371 ,Set Pending Bit 371" "Not pending,Pending" bitfld.long 0x00 18. " SPB370 ,Set Pending Bit 370" "Not pending,Pending" bitfld.long 0x00 17. " SPB369 ,Set Pending Bit 369" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB368 ,Set Pending Bit 368" "Not pending,Pending" bitfld.long 0x00 15. " SPB367 ,Set Pending Bit 367" "Not pending,Pending" bitfld.long 0x00 14. " SPB366 ,Set Pending Bit 366" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB365 ,Set Pending Bit 365" "Not pending,Pending" bitfld.long 0x00 12. " SPB364 ,Set Pending Bit 364" "Not pending,Pending" bitfld.long 0x00 11. " SPB363 ,Set Pending Bit 363" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB362 ,Set Pending Bit 362" "Not pending,Pending" bitfld.long 0x00 9. " SPB361 ,Set Pending Bit 361" "Not pending,Pending" bitfld.long 0x00 8. " SPB360 ,Set Pending Bit 360" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB359 ,Set Pending Bit 359" "Not pending,Pending" bitfld.long 0x00 6. " SPB358 ,Set Pending Bit 358" "Not pending,Pending" bitfld.long 0x00 5. " SPB357 ,Set Pending Bit 357" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB356 ,Set Pending Bit 356" "Not pending,Pending" bitfld.long 0x00 3. " SPB355 ,Set Pending Bit 355" "Not pending,Pending" bitfld.long 0x00 2. " SPB354 ,Set Pending Bit 354" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB353 ,Set Pending Bit 353" "Not pending,Pending" bitfld.long 0x00 0. " SPB352 ,Set Pending Bit 352" "Not pending,Pending" group.long 0x1230++0x03 line.long 0x0 "GICD_ISPR12,Interrupt Set Pending Register 12" bitfld.long 0x00 31. " SPB415 ,Set Pending Bit 415" "Not pending,Pending" bitfld.long 0x00 30. " SPB414 ,Set Pending Bit 414" "Not pending,Pending" bitfld.long 0x00 29. " SPB413 ,Set Pending Bit 413" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB412 ,Set Pending Bit 412" "Not pending,Pending" bitfld.long 0x00 27. " SPB411 ,Set Pending Bit 411" "Not pending,Pending" bitfld.long 0x00 26. " SPB410 ,Set Pending Bit 410" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB409 ,Set Pending Bit 409" "Not pending,Pending" bitfld.long 0x00 24. " SPB408 ,Set Pending Bit 408" "Not pending,Pending" bitfld.long 0x00 23. " SPB407 ,Set Pending Bit 407" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB406 ,Set Pending Bit 406" "Not pending,Pending" bitfld.long 0x00 21. " SPB405 ,Set Pending Bit 405" "Not pending,Pending" bitfld.long 0x00 20. " SPB404 ,Set Pending Bit 404" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB403 ,Set Pending Bit 403" "Not pending,Pending" bitfld.long 0x00 18. " SPB402 ,Set Pending Bit 402" "Not pending,Pending" bitfld.long 0x00 17. " SPB401 ,Set Pending Bit 401" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB400 ,Set Pending Bit 400" "Not pending,Pending" bitfld.long 0x00 15. " SPB399 ,Set Pending Bit 399" "Not pending,Pending" bitfld.long 0x00 14. " SPB398 ,Set Pending Bit 398" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB397 ,Set Pending Bit 397" "Not pending,Pending" bitfld.long 0x00 12. " SPB396 ,Set Pending Bit 396" "Not pending,Pending" bitfld.long 0x00 11. " SPB395 ,Set Pending Bit 395" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB394 ,Set Pending Bit 394" "Not pending,Pending" bitfld.long 0x00 9. " SPB393 ,Set Pending Bit 393" "Not pending,Pending" bitfld.long 0x00 8. " SPB392 ,Set Pending Bit 392" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB391 ,Set Pending Bit 391" "Not pending,Pending" bitfld.long 0x00 6. " SPB390 ,Set Pending Bit 390" "Not pending,Pending" bitfld.long 0x00 5. " SPB389 ,Set Pending Bit 389" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB388 ,Set Pending Bit 388" "Not pending,Pending" bitfld.long 0x00 3. " SPB387 ,Set Pending Bit 387" "Not pending,Pending" bitfld.long 0x00 2. " SPB386 ,Set Pending Bit 386" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB385 ,Set Pending Bit 385" "Not pending,Pending" bitfld.long 0x00 0. " SPB384 ,Set Pending Bit 384" "Not pending,Pending" group.long 0x1234++0x03 line.long 0x0 "GICD_ISPR13,Interrupt Set Pending Register 13" bitfld.long 0x00 31. " SPB447 ,Set Pending Bit 447" "Not pending,Pending" bitfld.long 0x00 30. " SPB446 ,Set Pending Bit 446" "Not pending,Pending" bitfld.long 0x00 29. " SPB445 ,Set Pending Bit 445" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB444 ,Set Pending Bit 444" "Not pending,Pending" bitfld.long 0x00 27. " SPB443 ,Set Pending Bit 443" "Not pending,Pending" bitfld.long 0x00 26. " SPB442 ,Set Pending Bit 442" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB441 ,Set Pending Bit 441" "Not pending,Pending" bitfld.long 0x00 24. " SPB440 ,Set Pending Bit 440" "Not pending,Pending" bitfld.long 0x00 23. " SPB439 ,Set Pending Bit 439" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB438 ,Set Pending Bit 438" "Not pending,Pending" bitfld.long 0x00 21. " SPB437 ,Set Pending Bit 437" "Not pending,Pending" bitfld.long 0x00 20. " SPB436 ,Set Pending Bit 436" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB435 ,Set Pending Bit 435" "Not pending,Pending" bitfld.long 0x00 18. " SPB434 ,Set Pending Bit 434" "Not pending,Pending" bitfld.long 0x00 17. " SPB433 ,Set Pending Bit 433" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB432 ,Set Pending Bit 432" "Not pending,Pending" bitfld.long 0x00 15. " SPB431 ,Set Pending Bit 431" "Not pending,Pending" bitfld.long 0x00 14. " SPB430 ,Set Pending Bit 430" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB429 ,Set Pending Bit 429" "Not pending,Pending" bitfld.long 0x00 12. " SPB428 ,Set Pending Bit 428" "Not pending,Pending" bitfld.long 0x00 11. " SPB427 ,Set Pending Bit 427" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB426 ,Set Pending Bit 426" "Not pending,Pending" bitfld.long 0x00 9. " SPB425 ,Set Pending Bit 425" "Not pending,Pending" bitfld.long 0x00 8. " SPB424 ,Set Pending Bit 424" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB423 ,Set Pending Bit 423" "Not pending,Pending" bitfld.long 0x00 6. " SPB422 ,Set Pending Bit 422" "Not pending,Pending" bitfld.long 0x00 5. " SPB421 ,Set Pending Bit 421" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB420 ,Set Pending Bit 420" "Not pending,Pending" bitfld.long 0x00 3. " SPB419 ,Set Pending Bit 419" "Not pending,Pending" bitfld.long 0x00 2. " SPB418 ,Set Pending Bit 418" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB417 ,Set Pending Bit 417" "Not pending,Pending" bitfld.long 0x00 0. " SPB416 ,Set Pending Bit 416" "Not pending,Pending" group.long 0x1238++0x03 line.long 0x0 "GICD_ISPR14,Interrupt Set Pending Register 14" bitfld.long 0x00 31. " SPB479 ,Set Pending Bit 479" "Not pending,Pending" bitfld.long 0x00 30. " SPB478 ,Set Pending Bit 478" "Not pending,Pending" bitfld.long 0x00 29. " SPB477 ,Set Pending Bit 477" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB476 ,Set Pending Bit 476" "Not pending,Pending" bitfld.long 0x00 27. " SPB475 ,Set Pending Bit 475" "Not pending,Pending" bitfld.long 0x00 26. " SPB474 ,Set Pending Bit 474" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB473 ,Set Pending Bit 473" "Not pending,Pending" bitfld.long 0x00 24. " SPB472 ,Set Pending Bit 472" "Not pending,Pending" bitfld.long 0x00 23. " SPB471 ,Set Pending Bit 471" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB470 ,Set Pending Bit 470" "Not pending,Pending" bitfld.long 0x00 21. " SPB469 ,Set Pending Bit 469" "Not pending,Pending" bitfld.long 0x00 20. " SPB468 ,Set Pending Bit 468" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB467 ,Set Pending Bit 467" "Not pending,Pending" bitfld.long 0x00 18. " SPB466 ,Set Pending Bit 466" "Not pending,Pending" bitfld.long 0x00 17. " SPB465 ,Set Pending Bit 465" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB464 ,Set Pending Bit 464" "Not pending,Pending" bitfld.long 0x00 15. " SPB463 ,Set Pending Bit 463" "Not pending,Pending" bitfld.long 0x00 14. " SPB462 ,Set Pending Bit 462" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB461 ,Set Pending Bit 461" "Not pending,Pending" bitfld.long 0x00 12. " SPB460 ,Set Pending Bit 460" "Not pending,Pending" bitfld.long 0x00 11. " SPB459 ,Set Pending Bit 459" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB458 ,Set Pending Bit 458" "Not pending,Pending" bitfld.long 0x00 9. " SPB457 ,Set Pending Bit 457" "Not pending,Pending" bitfld.long 0x00 8. " SPB456 ,Set Pending Bit 456" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB455 ,Set Pending Bit 455" "Not pending,Pending" bitfld.long 0x00 6. " SPB454 ,Set Pending Bit 454" "Not pending,Pending" bitfld.long 0x00 5. " SPB453 ,Set Pending Bit 453" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB452 ,Set Pending Bit 452" "Not pending,Pending" bitfld.long 0x00 3. " SPB451 ,Set Pending Bit 451" "Not pending,Pending" bitfld.long 0x00 2. " SPB450 ,Set Pending Bit 450" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB449 ,Set Pending Bit 449" "Not pending,Pending" bitfld.long 0x00 0. " SPB448 ,Set Pending Bit 448" "Not pending,Pending" group.long 0x123C++0x03 line.long 0x0 "GICD_ISPR15,Interrupt Set Pending Register 15" bitfld.long 0x00 31. " SPB511 ,Set Pending Bit 511" "Not pending,Pending" bitfld.long 0x00 30. " SPB510 ,Set Pending Bit 510" "Not pending,Pending" bitfld.long 0x00 29. " SPB509 ,Set Pending Bit 509" "Not pending,Pending" textline " " bitfld.long 0x00 28. " SPB508 ,Set Pending Bit 508" "Not pending,Pending" bitfld.long 0x00 27. " SPB507 ,Set Pending Bit 507" "Not pending,Pending" bitfld.long 0x00 26. " SPB506 ,Set Pending Bit 506" "Not pending,Pending" textline " " bitfld.long 0x00 25. " SPB505 ,Set Pending Bit 505" "Not pending,Pending" bitfld.long 0x00 24. " SPB504 ,Set Pending Bit 504" "Not pending,Pending" bitfld.long 0x00 23. " SPB503 ,Set Pending Bit 503" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SPB502 ,Set Pending Bit 502" "Not pending,Pending" bitfld.long 0x00 21. " SPB501 ,Set Pending Bit 501" "Not pending,Pending" bitfld.long 0x00 20. " SPB500 ,Set Pending Bit 500" "Not pending,Pending" textline " " bitfld.long 0x00 19. " SPB499 ,Set Pending Bit 499" "Not pending,Pending" bitfld.long 0x00 18. " SPB498 ,Set Pending Bit 498" "Not pending,Pending" bitfld.long 0x00 17. " SPB497 ,Set Pending Bit 497" "Not pending,Pending" textline " " bitfld.long 0x00 16. " SPB496 ,Set Pending Bit 496" "Not pending,Pending" bitfld.long 0x00 15. " SPB495 ,Set Pending Bit 495" "Not pending,Pending" bitfld.long 0x00 14. " SPB494 ,Set Pending Bit 494" "Not pending,Pending" textline " " bitfld.long 0x00 13. " SPB493 ,Set Pending Bit 493" "Not pending,Pending" bitfld.long 0x00 12. " SPB492 ,Set Pending Bit 492" "Not pending,Pending" bitfld.long 0x00 11. " SPB491 ,Set Pending Bit 491" "Not pending,Pending" textline " " bitfld.long 0x00 10. " SPB490 ,Set Pending Bit 490" "Not pending,Pending" bitfld.long 0x00 9. " SPB489 ,Set Pending Bit 489" "Not pending,Pending" bitfld.long 0x00 8. " SPB488 ,Set Pending Bit 488" "Not pending,Pending" textline " " bitfld.long 0x00 7. " SPB487 ,Set Pending Bit 487" "Not pending,Pending" bitfld.long 0x00 6. " SPB486 ,Set Pending Bit 486" "Not pending,Pending" bitfld.long 0x00 5. " SPB485 ,Set Pending Bit 485" "Not pending,Pending" textline " " bitfld.long 0x00 4. " SPB484 ,Set Pending Bit 484" "Not pending,Pending" bitfld.long 0x00 3. " SPB483 ,Set Pending Bit 483" "Not pending,Pending" bitfld.long 0x00 2. " SPB482 ,Set Pending Bit 482" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SPB481 ,Set Pending Bit 481" "Not pending,Pending" bitfld.long 0x00 0. " SPB480 ,Set Pending Bit 480" "Not pending,Pending" endif textline " " group.long 0x1280++0x03 line.long 0x0 "GICD_ICPR0,Interrupt Clear Pending Register 0" eventfld.long 0x00 31. " CPB31 ,Clear Pending Bit 31" "Not pending,Pending" eventfld.long 0x00 30. " CPB30 ,Clear Pending Bit 30" "Not pending,Pending" eventfld.long 0x00 29. " CPB29 ,Clear Pending Bit 29" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB28 ,Clear Pending Bit 28" "Not pending,Pending" eventfld.long 0x00 27. " CPB27 ,Clear Pending Bit 27" "Not pending,Pending" eventfld.long 0x00 26. " CPB26 ,Clear Pending Bit 26" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB25 ,Clear Pending Bit 25" "Not pending,Pending" eventfld.long 0x00 24. " CPB24 ,Clear Pending Bit 24" "Not pending,Pending" eventfld.long 0x00 23. " CPB23 ,Clear Pending Bit 23" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB22 ,Clear Pending Bit 22" "Not pending,Pending" eventfld.long 0x00 21. " CPB21 ,Clear Pending Bit 21" "Not pending,Pending" eventfld.long 0x00 20. " CPB20 ,Clear Pending Bit 20" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB19 ,Clear Pending Bit 19" "Not pending,Pending" eventfld.long 0x00 18. " CPB18 ,Clear Pending Bit 18" "Not pending,Pending" eventfld.long 0x00 17. " CPB17 ,Clear Pending Bit 17" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB16 ,Clear Pending Bit 16" "Not pending,Pending" eventfld.long 0x00 15. " CPB15 ,Clear Pending Bit 15" "Not pending,Pending" eventfld.long 0x00 14. " CPB14 ,Clear Pending Bit 14" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB13 ,Clear Pending Bit 13" "Not pending,Pending" eventfld.long 0x00 12. " CPB12 ,Clear Pending Bit 12" "Not pending,Pending" eventfld.long 0x00 11. " CPB11 ,Clear Pending Bit 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB10 ,Clear Pending Bit 10" "Not pending,Pending" eventfld.long 0x00 9. " CPB9 ,Clear Pending Bit 9" "Not pending,Pending" eventfld.long 0x00 8. " CPB8 ,Clear Pending Bit 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB7 ,Clear Pending Bit 7" "Not pending,Pending" eventfld.long 0x00 6. " CPB6 ,Clear Pending Bit 6" "Not pending,Pending" eventfld.long 0x00 5. " CPB5 ,Clear Pending Bit 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB4 ,Clear Pending Bit 4" "Not pending,Pending" eventfld.long 0x00 3. " CPB3 ,Clear Pending Bit 3" "Not pending,Pending" eventfld.long 0x00 2. " CPB2 ,Clear Pending Bit 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB1 ,Clear Pending Bit 1" "Not pending,Pending" eventfld.long 0x00 0. " CPB0 ,Clear Pending Bit 0" "Not pending,Pending" group.long 0x1284++0x03 line.long 0x0 "GICD_ICPR1,Interrupt Clear Pending Register 1" eventfld.long 0x00 31. " CPB63 ,Clear Pending Bit 63" "Not pending,Pending" eventfld.long 0x00 30. " CPB62 ,Clear Pending Bit 62" "Not pending,Pending" eventfld.long 0x00 29. " CPB61 ,Clear Pending Bit 61" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB60 ,Clear Pending Bit 60" "Not pending,Pending" eventfld.long 0x00 27. " CPB59 ,Clear Pending Bit 59" "Not pending,Pending" eventfld.long 0x00 26. " CPB58 ,Clear Pending Bit 58" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB57 ,Clear Pending Bit 57" "Not pending,Pending" eventfld.long 0x00 24. " CPB56 ,Clear Pending Bit 56" "Not pending,Pending" eventfld.long 0x00 23. " CPB55 ,Clear Pending Bit 55" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB54 ,Clear Pending Bit 54" "Not pending,Pending" eventfld.long 0x00 21. " CPB53 ,Clear Pending Bit 53" "Not pending,Pending" eventfld.long 0x00 20. " CPB52 ,Clear Pending Bit 52" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB51 ,Clear Pending Bit 51" "Not pending,Pending" eventfld.long 0x00 18. " CPB50 ,Clear Pending Bit 50" "Not pending,Pending" eventfld.long 0x00 17. " CPB49 ,Clear Pending Bit 49" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB48 ,Clear Pending Bit 48" "Not pending,Pending" eventfld.long 0x00 15. " CPB47 ,Clear Pending Bit 47" "Not pending,Pending" eventfld.long 0x00 14. " CPB46 ,Clear Pending Bit 46" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB45 ,Clear Pending Bit 45" "Not pending,Pending" eventfld.long 0x00 12. " CPB44 ,Clear Pending Bit 44" "Not pending,Pending" eventfld.long 0x00 11. " CPB43 ,Clear Pending Bit 43" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB42 ,Clear Pending Bit 42" "Not pending,Pending" eventfld.long 0x00 9. " CPB41 ,Clear Pending Bit 41" "Not pending,Pending" eventfld.long 0x00 8. " CPB40 ,Clear Pending Bit 40" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB39 ,Clear Pending Bit 39" "Not pending,Pending" eventfld.long 0x00 6. " CPB38 ,Clear Pending Bit 38" "Not pending,Pending" eventfld.long 0x00 5. " CPB37 ,Clear Pending Bit 37" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB36 ,Clear Pending Bit 36" "Not pending,Pending" eventfld.long 0x00 3. " CPB35 ,Clear Pending Bit 35" "Not pending,Pending" eventfld.long 0x00 2. " CPB34 ,Clear Pending Bit 34" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB33 ,Clear Pending Bit 33" "Not pending,Pending" eventfld.long 0x00 0. " CPB32 ,Clear Pending Bit 32" "Not pending,Pending" group.long 0x1288++0x03 line.long 0x0 "GICD_ICPR2,Interrupt Clear Pending Register 2" eventfld.long 0x00 31. " CPB95 ,Clear Pending Bit 95" "Not pending,Pending" eventfld.long 0x00 30. " CPB94 ,Clear Pending Bit 94" "Not pending,Pending" eventfld.long 0x00 29. " CPB93 ,Clear Pending Bit 93" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB92 ,Clear Pending Bit 92" "Not pending,Pending" eventfld.long 0x00 27. " CPB91 ,Clear Pending Bit 91" "Not pending,Pending" eventfld.long 0x00 26. " CPB90 ,Clear Pending Bit 90" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB89 ,Clear Pending Bit 89" "Not pending,Pending" eventfld.long 0x00 24. " CPB88 ,Clear Pending Bit 88" "Not pending,Pending" eventfld.long 0x00 23. " CPB87 ,Clear Pending Bit 87" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB86 ,Clear Pending Bit 86" "Not pending,Pending" eventfld.long 0x00 21. " CPB85 ,Clear Pending Bit 85" "Not pending,Pending" eventfld.long 0x00 20. " CPB84 ,Clear Pending Bit 84" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB83 ,Clear Pending Bit 83" "Not pending,Pending" eventfld.long 0x00 18. " CPB82 ,Clear Pending Bit 82" "Not pending,Pending" eventfld.long 0x00 17. " CPB81 ,Clear Pending Bit 81" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB80 ,Clear Pending Bit 80" "Not pending,Pending" eventfld.long 0x00 15. " CPB79 ,Clear Pending Bit 79" "Not pending,Pending" eventfld.long 0x00 14. " CPB78 ,Clear Pending Bit 78" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB77 ,Clear Pending Bit 77" "Not pending,Pending" eventfld.long 0x00 12. " CPB76 ,Clear Pending Bit 76" "Not pending,Pending" eventfld.long 0x00 11. " CPB75 ,Clear Pending Bit 75" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB74 ,Clear Pending Bit 74" "Not pending,Pending" eventfld.long 0x00 9. " CPB73 ,Clear Pending Bit 73" "Not pending,Pending" eventfld.long 0x00 8. " CPB72 ,Clear Pending Bit 72" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB71 ,Clear Pending Bit 71" "Not pending,Pending" eventfld.long 0x00 6. " CPB70 ,Clear Pending Bit 70" "Not pending,Pending" eventfld.long 0x00 5. " CPB69 ,Clear Pending Bit 69" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB68 ,Clear Pending Bit 68" "Not pending,Pending" eventfld.long 0x00 3. " CPB67 ,Clear Pending Bit 67" "Not pending,Pending" eventfld.long 0x00 2. " CPB66 ,Clear Pending Bit 66" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB65 ,Clear Pending Bit 65" "Not pending,Pending" eventfld.long 0x00 0. " CPB64 ,Clear Pending Bit 64" "Not pending,Pending" group.long 0x128C++0x03 line.long 0x0 "GICD_ICPR3,Interrupt Clear Pending Register 3" eventfld.long 0x00 31. " CPB127 ,Clear Pending Bit 127" "Not pending,Pending" eventfld.long 0x00 30. " CPB126 ,Clear Pending Bit 126" "Not pending,Pending" eventfld.long 0x00 29. " CPB125 ,Clear Pending Bit 125" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB124 ,Clear Pending Bit 124" "Not pending,Pending" eventfld.long 0x00 27. " CPB123 ,Clear Pending Bit 123" "Not pending,Pending" eventfld.long 0x00 26. " CPB122 ,Clear Pending Bit 122" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB121 ,Clear Pending Bit 121" "Not pending,Pending" eventfld.long 0x00 24. " CPB120 ,Clear Pending Bit 120" "Not pending,Pending" eventfld.long 0x00 23. " CPB119 ,Clear Pending Bit 119" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB118 ,Clear Pending Bit 118" "Not pending,Pending" eventfld.long 0x00 21. " CPB117 ,Clear Pending Bit 117" "Not pending,Pending" eventfld.long 0x00 20. " CPB116 ,Clear Pending Bit 116" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB115 ,Clear Pending Bit 115" "Not pending,Pending" eventfld.long 0x00 18. " CPB114 ,Clear Pending Bit 114" "Not pending,Pending" eventfld.long 0x00 17. " CPB113 ,Clear Pending Bit 113" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB112 ,Clear Pending Bit 112" "Not pending,Pending" eventfld.long 0x00 15. " CPB111 ,Clear Pending Bit 111" "Not pending,Pending" eventfld.long 0x00 14. " CPB110 ,Clear Pending Bit 110" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB109 ,Clear Pending Bit 109" "Not pending,Pending" eventfld.long 0x00 12. " CPB108 ,Clear Pending Bit 108" "Not pending,Pending" eventfld.long 0x00 11. " CPB107 ,Clear Pending Bit 107" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB106 ,Clear Pending Bit 106" "Not pending,Pending" eventfld.long 0x00 9. " CPB105 ,Clear Pending Bit 105" "Not pending,Pending" eventfld.long 0x00 8. " CPB104 ,Clear Pending Bit 104" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB103 ,Clear Pending Bit 103" "Not pending,Pending" eventfld.long 0x00 6. " CPB102 ,Clear Pending Bit 102" "Not pending,Pending" eventfld.long 0x00 5. " CPB101 ,Clear Pending Bit 101" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB100 ,Clear Pending Bit 100" "Not pending,Pending" eventfld.long 0x00 3. " CPB99 ,Clear Pending Bit 99" "Not pending,Pending" eventfld.long 0x00 2. " CPB98 ,Clear Pending Bit 98" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB97 ,Clear Pending Bit 97" "Not pending,Pending" eventfld.long 0x00 0. " CPB96 ,Clear Pending Bit 96" "Not pending,Pending" group.long 0x1290++0x03 line.long 0x0 "GICD_ICPR4,Interrupt Clear Pending Register 4" eventfld.long 0x00 31. " CPB159 ,Clear Pending Bit 159" "Not pending,Pending" eventfld.long 0x00 30. " CPB158 ,Clear Pending Bit 158" "Not pending,Pending" eventfld.long 0x00 29. " CPB157 ,Clear Pending Bit 157" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB156 ,Clear Pending Bit 156" "Not pending,Pending" eventfld.long 0x00 27. " CPB155 ,Clear Pending Bit 155" "Not pending,Pending" eventfld.long 0x00 26. " CPB154 ,Clear Pending Bit 154" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB153 ,Clear Pending Bit 153" "Not pending,Pending" eventfld.long 0x00 24. " CPB152 ,Clear Pending Bit 152" "Not pending,Pending" eventfld.long 0x00 23. " CPB151 ,Clear Pending Bit 151" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB150 ,Clear Pending Bit 150" "Not pending,Pending" eventfld.long 0x00 21. " CPB149 ,Clear Pending Bit 149" "Not pending,Pending" eventfld.long 0x00 20. " CPB148 ,Clear Pending Bit 148" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB147 ,Clear Pending Bit 147" "Not pending,Pending" eventfld.long 0x00 18. " CPB146 ,Clear Pending Bit 146" "Not pending,Pending" eventfld.long 0x00 17. " CPB145 ,Clear Pending Bit 145" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB144 ,Clear Pending Bit 144" "Not pending,Pending" eventfld.long 0x00 15. " CPB143 ,Clear Pending Bit 143" "Not pending,Pending" eventfld.long 0x00 14. " CPB142 ,Clear Pending Bit 142" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB141 ,Clear Pending Bit 141" "Not pending,Pending" eventfld.long 0x00 12. " CPB140 ,Clear Pending Bit 140" "Not pending,Pending" eventfld.long 0x00 11. " CPB139 ,Clear Pending Bit 139" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB138 ,Clear Pending Bit 138" "Not pending,Pending" eventfld.long 0x00 9. " CPB137 ,Clear Pending Bit 137" "Not pending,Pending" eventfld.long 0x00 8. " CPB136 ,Clear Pending Bit 136" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB135 ,Clear Pending Bit 135" "Not pending,Pending" eventfld.long 0x00 6. " CPB134 ,Clear Pending Bit 134" "Not pending,Pending" eventfld.long 0x00 5. " CPB133 ,Clear Pending Bit 133" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB132 ,Clear Pending Bit 132" "Not pending,Pending" eventfld.long 0x00 3. " CPB131 ,Clear Pending Bit 131" "Not pending,Pending" eventfld.long 0x00 2. " CPB130 ,Clear Pending Bit 130" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB129 ,Clear Pending Bit 129" "Not pending,Pending" eventfld.long 0x00 0. " CPB128 ,Clear Pending Bit 128" "Not pending,Pending" group.long 0x1294++0x03 line.long 0x0 "GICD_ICPR5,Interrupt Clear Pending Register 5" eventfld.long 0x00 31. " CPB191 ,Clear Pending Bit 191" "Not pending,Pending" eventfld.long 0x00 30. " CPB190 ,Clear Pending Bit 190" "Not pending,Pending" eventfld.long 0x00 29. " CPB189 ,Clear Pending Bit 189" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB188 ,Clear Pending Bit 188" "Not pending,Pending" eventfld.long 0x00 27. " CPB187 ,Clear Pending Bit 187" "Not pending,Pending" eventfld.long 0x00 26. " CPB186 ,Clear Pending Bit 186" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB185 ,Clear Pending Bit 185" "Not pending,Pending" eventfld.long 0x00 24. " CPB184 ,Clear Pending Bit 184" "Not pending,Pending" eventfld.long 0x00 23. " CPB183 ,Clear Pending Bit 183" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB182 ,Clear Pending Bit 182" "Not pending,Pending" eventfld.long 0x00 21. " CPB181 ,Clear Pending Bit 181" "Not pending,Pending" eventfld.long 0x00 20. " CPB180 ,Clear Pending Bit 180" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB179 ,Clear Pending Bit 179" "Not pending,Pending" eventfld.long 0x00 18. " CPB178 ,Clear Pending Bit 178" "Not pending,Pending" eventfld.long 0x00 17. " CPB177 ,Clear Pending Bit 177" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB176 ,Clear Pending Bit 176" "Not pending,Pending" eventfld.long 0x00 15. " CPB175 ,Clear Pending Bit 175" "Not pending,Pending" eventfld.long 0x00 14. " CPB174 ,Clear Pending Bit 174" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB173 ,Clear Pending Bit 173" "Not pending,Pending" eventfld.long 0x00 12. " CPB172 ,Clear Pending Bit 172" "Not pending,Pending" eventfld.long 0x00 11. " CPB171 ,Clear Pending Bit 171" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB170 ,Clear Pending Bit 170" "Not pending,Pending" eventfld.long 0x00 9. " CPB169 ,Clear Pending Bit 169" "Not pending,Pending" eventfld.long 0x00 8. " CPB168 ,Clear Pending Bit 168" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB167 ,Clear Pending Bit 167" "Not pending,Pending" eventfld.long 0x00 6. " CPB166 ,Clear Pending Bit 166" "Not pending,Pending" eventfld.long 0x00 5. " CPB165 ,Clear Pending Bit 165" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB164 ,Clear Pending Bit 164" "Not pending,Pending" eventfld.long 0x00 3. " CPB163 ,Clear Pending Bit 163" "Not pending,Pending" eventfld.long 0x00 2. " CPB162 ,Clear Pending Bit 162" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB161 ,Clear Pending Bit 161" "Not pending,Pending" eventfld.long 0x00 0. " CPB160 ,Clear Pending Bit 160" "Not pending,Pending" group.long 0x1298++0x03 line.long 0x0 "GICD_ICPR6,Interrupt Clear Pending Register 6" eventfld.long 0x00 31. " CPB223 ,Clear Pending Bit 223" "Not pending,Pending" eventfld.long 0x00 30. " CPB222 ,Clear Pending Bit 222" "Not pending,Pending" eventfld.long 0x00 29. " CPB221 ,Clear Pending Bit 221" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB220 ,Clear Pending Bit 220" "Not pending,Pending" eventfld.long 0x00 27. " CPB219 ,Clear Pending Bit 219" "Not pending,Pending" eventfld.long 0x00 26. " CPB218 ,Clear Pending Bit 218" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB217 ,Clear Pending Bit 217" "Not pending,Pending" eventfld.long 0x00 24. " CPB216 ,Clear Pending Bit 216" "Not pending,Pending" eventfld.long 0x00 23. " CPB215 ,Clear Pending Bit 215" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB214 ,Clear Pending Bit 214" "Not pending,Pending" eventfld.long 0x00 21. " CPB213 ,Clear Pending Bit 213" "Not pending,Pending" eventfld.long 0x00 20. " CPB212 ,Clear Pending Bit 212" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB211 ,Clear Pending Bit 211" "Not pending,Pending" eventfld.long 0x00 18. " CPB210 ,Clear Pending Bit 210" "Not pending,Pending" eventfld.long 0x00 17. " CPB209 ,Clear Pending Bit 209" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB208 ,Clear Pending Bit 208" "Not pending,Pending" eventfld.long 0x00 15. " CPB207 ,Clear Pending Bit 207" "Not pending,Pending" eventfld.long 0x00 14. " CPB206 ,Clear Pending Bit 206" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB205 ,Clear Pending Bit 205" "Not pending,Pending" eventfld.long 0x00 12. " CPB204 ,Clear Pending Bit 204" "Not pending,Pending" eventfld.long 0x00 11. " CPB203 ,Clear Pending Bit 203" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB202 ,Clear Pending Bit 202" "Not pending,Pending" eventfld.long 0x00 9. " CPB201 ,Clear Pending Bit 201" "Not pending,Pending" eventfld.long 0x00 8. " CPB200 ,Clear Pending Bit 200" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB199 ,Clear Pending Bit 199" "Not pending,Pending" eventfld.long 0x00 6. " CPB198 ,Clear Pending Bit 198" "Not pending,Pending" eventfld.long 0x00 5. " CPB197 ,Clear Pending Bit 197" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB196 ,Clear Pending Bit 196" "Not pending,Pending" eventfld.long 0x00 3. " CPB195 ,Clear Pending Bit 195" "Not pending,Pending" eventfld.long 0x00 2. " CPB194 ,Clear Pending Bit 194" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB193 ,Clear Pending Bit 193" "Not pending,Pending" eventfld.long 0x00 0. " CPB192 ,Clear Pending Bit 192" "Not pending,Pending" group.long 0x129C++0x03 line.long 0x0 "GICD_ICPR7,Interrupt Clear Pending Register 7" eventfld.long 0x00 31. " CPB255 ,Clear Pending Bit 255" "Not pending,Pending" eventfld.long 0x00 30. " CPB254 ,Clear Pending Bit 254" "Not pending,Pending" eventfld.long 0x00 29. " CPB253 ,Clear Pending Bit 253" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB252 ,Clear Pending Bit 252" "Not pending,Pending" eventfld.long 0x00 27. " CPB251 ,Clear Pending Bit 251" "Not pending,Pending" eventfld.long 0x00 26. " CPB250 ,Clear Pending Bit 250" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB249 ,Clear Pending Bit 249" "Not pending,Pending" eventfld.long 0x00 24. " CPB248 ,Clear Pending Bit 248" "Not pending,Pending" eventfld.long 0x00 23. " CPB247 ,Clear Pending Bit 247" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB246 ,Clear Pending Bit 246" "Not pending,Pending" eventfld.long 0x00 21. " CPB245 ,Clear Pending Bit 245" "Not pending,Pending" eventfld.long 0x00 20. " CPB244 ,Clear Pending Bit 244" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB243 ,Clear Pending Bit 243" "Not pending,Pending" eventfld.long 0x00 18. " CPB242 ,Clear Pending Bit 242" "Not pending,Pending" eventfld.long 0x00 17. " CPB241 ,Clear Pending Bit 241" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB240 ,Clear Pending Bit 240" "Not pending,Pending" eventfld.long 0x00 15. " CPB239 ,Clear Pending Bit 239" "Not pending,Pending" eventfld.long 0x00 14. " CPB238 ,Clear Pending Bit 238" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB237 ,Clear Pending Bit 237" "Not pending,Pending" eventfld.long 0x00 12. " CPB236 ,Clear Pending Bit 236" "Not pending,Pending" eventfld.long 0x00 11. " CPB235 ,Clear Pending Bit 235" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB234 ,Clear Pending Bit 234" "Not pending,Pending" eventfld.long 0x00 9. " CPB233 ,Clear Pending Bit 233" "Not pending,Pending" eventfld.long 0x00 8. " CPB232 ,Clear Pending Bit 232" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB231 ,Clear Pending Bit 231" "Not pending,Pending" eventfld.long 0x00 6. " CPB230 ,Clear Pending Bit 230" "Not pending,Pending" eventfld.long 0x00 5. " CPB229 ,Clear Pending Bit 229" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB228 ,Clear Pending Bit 228" "Not pending,Pending" eventfld.long 0x00 3. " CPB227 ,Clear Pending Bit 227" "Not pending,Pending" eventfld.long 0x00 2. " CPB226 ,Clear Pending Bit 226" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB225 ,Clear Pending Bit 225" "Not pending,Pending" eventfld.long 0x00 0. " CPB224 ,Clear Pending Bit 224" "Not pending,Pending" if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x12a0++0x03 line.long 0x0 "GICD_ICPR8,Interrupt Clear Pending Register 8" eventfld.long 0x00 31. " CPB287 ,Clear Pending Bit 287" "Not pending,Pending" eventfld.long 0x00 30. " CPB286 ,Clear Pending Bit 286" "Not pending,Pending" eventfld.long 0x00 29. " CPB285 ,Clear Pending Bit 285" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB284 ,Clear Pending Bit 284" "Not pending,Pending" eventfld.long 0x00 27. " CPB283 ,Clear Pending Bit 283" "Not pending,Pending" eventfld.long 0x00 26. " CPB282 ,Clear Pending Bit 282" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB281 ,Clear Pending Bit 281" "Not pending,Pending" eventfld.long 0x00 24. " CPB280 ,Clear Pending Bit 280" "Not pending,Pending" eventfld.long 0x00 23. " CPB279 ,Clear Pending Bit 279" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB278 ,Clear Pending Bit 278" "Not pending,Pending" eventfld.long 0x00 21. " CPB277 ,Clear Pending Bit 277" "Not pending,Pending" eventfld.long 0x00 20. " CPB276 ,Clear Pending Bit 276" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB275 ,Clear Pending Bit 275" "Not pending,Pending" eventfld.long 0x00 18. " CPB274 ,Clear Pending Bit 274" "Not pending,Pending" eventfld.long 0x00 17. " CPB273 ,Clear Pending Bit 273" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB272 ,Clear Pending Bit 272" "Not pending,Pending" eventfld.long 0x00 15. " CPB271 ,Clear Pending Bit 271" "Not pending,Pending" eventfld.long 0x00 14. " CPB270 ,Clear Pending Bit 270" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB269 ,Clear Pending Bit 269" "Not pending,Pending" eventfld.long 0x00 12. " CPB268 ,Clear Pending Bit 268" "Not pending,Pending" eventfld.long 0x00 11. " CPB267 ,Clear Pending Bit 267" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB266 ,Clear Pending Bit 266" "Not pending,Pending" eventfld.long 0x00 9. " CPB265 ,Clear Pending Bit 265" "Not pending,Pending" eventfld.long 0x00 8. " CPB264 ,Clear Pending Bit 264" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB263 ,Clear Pending Bit 263" "Not pending,Pending" eventfld.long 0x00 6. " CPB262 ,Clear Pending Bit 262" "Not pending,Pending" eventfld.long 0x00 5. " CPB261 ,Clear Pending Bit 261" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB260 ,Clear Pending Bit 260" "Not pending,Pending" eventfld.long 0x00 3. " CPB259 ,Clear Pending Bit 259" "Not pending,Pending" eventfld.long 0x00 2. " CPB258 ,Clear Pending Bit 258" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB257 ,Clear Pending Bit 257" "Not pending,Pending" eventfld.long 0x00 0. " CPB256 ,Clear Pending Bit 256" "Not pending,Pending" group.long 0x12a4++0x03 line.long 0x0 "GICD_ICPR9,Interrupt Clear Pending Register 9" eventfld.long 0x00 31. " CPB319 ,Clear Pending Bit 319" "Not pending,Pending" eventfld.long 0x00 30. " CPB318 ,Clear Pending Bit 318" "Not pending,Pending" eventfld.long 0x00 29. " CPB317 ,Clear Pending Bit 317" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB316 ,Clear Pending Bit 316" "Not pending,Pending" eventfld.long 0x00 27. " CPB315 ,Clear Pending Bit 315" "Not pending,Pending" eventfld.long 0x00 26. " CPB314 ,Clear Pending Bit 314" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB313 ,Clear Pending Bit 313" "Not pending,Pending" eventfld.long 0x00 24. " CPB312 ,Clear Pending Bit 312" "Not pending,Pending" eventfld.long 0x00 23. " CPB311 ,Clear Pending Bit 311" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB310 ,Clear Pending Bit 310" "Not pending,Pending" eventfld.long 0x00 21. " CPB309 ,Clear Pending Bit 309" "Not pending,Pending" eventfld.long 0x00 20. " CPB308 ,Clear Pending Bit 308" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB307 ,Clear Pending Bit 307" "Not pending,Pending" eventfld.long 0x00 18. " CPB306 ,Clear Pending Bit 306" "Not pending,Pending" eventfld.long 0x00 17. " CPB305 ,Clear Pending Bit 305" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB304 ,Clear Pending Bit 304" "Not pending,Pending" eventfld.long 0x00 15. " CPB303 ,Clear Pending Bit 303" "Not pending,Pending" eventfld.long 0x00 14. " CPB302 ,Clear Pending Bit 302" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB301 ,Clear Pending Bit 301" "Not pending,Pending" eventfld.long 0x00 12. " CPB300 ,Clear Pending Bit 300" "Not pending,Pending" eventfld.long 0x00 11. " CPB299 ,Clear Pending Bit 299" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB298 ,Clear Pending Bit 298" "Not pending,Pending" eventfld.long 0x00 9. " CPB297 ,Clear Pending Bit 297" "Not pending,Pending" eventfld.long 0x00 8. " CPB296 ,Clear Pending Bit 296" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB295 ,Clear Pending Bit 295" "Not pending,Pending" eventfld.long 0x00 6. " CPB294 ,Clear Pending Bit 294" "Not pending,Pending" eventfld.long 0x00 5. " CPB293 ,Clear Pending Bit 293" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB292 ,Clear Pending Bit 292" "Not pending,Pending" eventfld.long 0x00 3. " CPB291 ,Clear Pending Bit 291" "Not pending,Pending" eventfld.long 0x00 2. " CPB290 ,Clear Pending Bit 290" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB289 ,Clear Pending Bit 289" "Not pending,Pending" eventfld.long 0x00 0. " CPB288 ,Clear Pending Bit 288" "Not pending,Pending" group.long 0x12a8++0x03 line.long 0x0 "GICD_ICPR10,Interrupt Clear Pending Register 10" eventfld.long 0x00 31. " CPB351 ,Clear Pending Bit 351" "Not pending,Pending" eventfld.long 0x00 30. " CPB350 ,Clear Pending Bit 350" "Not pending,Pending" eventfld.long 0x00 29. " CPB349 ,Clear Pending Bit 349" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB348 ,Clear Pending Bit 348" "Not pending,Pending" eventfld.long 0x00 27. " CPB347 ,Clear Pending Bit 347" "Not pending,Pending" eventfld.long 0x00 26. " CPB346 ,Clear Pending Bit 346" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB345 ,Clear Pending Bit 345" "Not pending,Pending" eventfld.long 0x00 24. " CPB344 ,Clear Pending Bit 344" "Not pending,Pending" eventfld.long 0x00 23. " CPB343 ,Clear Pending Bit 343" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB342 ,Clear Pending Bit 342" "Not pending,Pending" eventfld.long 0x00 21. " CPB341 ,Clear Pending Bit 341" "Not pending,Pending" eventfld.long 0x00 20. " CPB340 ,Clear Pending Bit 340" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB339 ,Clear Pending Bit 339" "Not pending,Pending" eventfld.long 0x00 18. " CPB338 ,Clear Pending Bit 338" "Not pending,Pending" eventfld.long 0x00 17. " CPB337 ,Clear Pending Bit 337" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB336 ,Clear Pending Bit 336" "Not pending,Pending" eventfld.long 0x00 15. " CPB335 ,Clear Pending Bit 335" "Not pending,Pending" eventfld.long 0x00 14. " CPB334 ,Clear Pending Bit 334" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB333 ,Clear Pending Bit 333" "Not pending,Pending" eventfld.long 0x00 12. " CPB332 ,Clear Pending Bit 332" "Not pending,Pending" eventfld.long 0x00 11. " CPB331 ,Clear Pending Bit 331" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB330 ,Clear Pending Bit 330" "Not pending,Pending" eventfld.long 0x00 9. " CPB329 ,Clear Pending Bit 329" "Not pending,Pending" eventfld.long 0x00 8. " CPB328 ,Clear Pending Bit 328" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB327 ,Clear Pending Bit 327" "Not pending,Pending" eventfld.long 0x00 6. " CPB326 ,Clear Pending Bit 326" "Not pending,Pending" eventfld.long 0x00 5. " CPB325 ,Clear Pending Bit 325" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB324 ,Clear Pending Bit 324" "Not pending,Pending" eventfld.long 0x00 3. " CPB323 ,Clear Pending Bit 323" "Not pending,Pending" eventfld.long 0x00 2. " CPB322 ,Clear Pending Bit 322" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB321 ,Clear Pending Bit 321" "Not pending,Pending" eventfld.long 0x00 0. " CPB320 ,Clear Pending Bit 320" "Not pending,Pending" group.long 0x12ac++0x03 line.long 0x0 "GICD_ICPR11,Interrupt Clear Pending Register 11" eventfld.long 0x00 31. " CPB383 ,Clear Pending Bit 383" "Not pending,Pending" eventfld.long 0x00 30. " CPB382 ,Clear Pending Bit 382" "Not pending,Pending" eventfld.long 0x00 29. " CPB381 ,Clear Pending Bit 381" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB380 ,Clear Pending Bit 380" "Not pending,Pending" eventfld.long 0x00 27. " CPB379 ,Clear Pending Bit 379" "Not pending,Pending" eventfld.long 0x00 26. " CPB378 ,Clear Pending Bit 378" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB377 ,Clear Pending Bit 377" "Not pending,Pending" eventfld.long 0x00 24. " CPB376 ,Clear Pending Bit 376" "Not pending,Pending" eventfld.long 0x00 23. " CPB375 ,Clear Pending Bit 375" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB374 ,Clear Pending Bit 374" "Not pending,Pending" eventfld.long 0x00 21. " CPB373 ,Clear Pending Bit 373" "Not pending,Pending" eventfld.long 0x00 20. " CPB372 ,Clear Pending Bit 372" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB371 ,Clear Pending Bit 371" "Not pending,Pending" eventfld.long 0x00 18. " CPB370 ,Clear Pending Bit 370" "Not pending,Pending" eventfld.long 0x00 17. " CPB369 ,Clear Pending Bit 369" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB368 ,Clear Pending Bit 368" "Not pending,Pending" eventfld.long 0x00 15. " CPB367 ,Clear Pending Bit 367" "Not pending,Pending" eventfld.long 0x00 14. " CPB366 ,Clear Pending Bit 366" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB365 ,Clear Pending Bit 365" "Not pending,Pending" eventfld.long 0x00 12. " CPB364 ,Clear Pending Bit 364" "Not pending,Pending" eventfld.long 0x00 11. " CPB363 ,Clear Pending Bit 363" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB362 ,Clear Pending Bit 362" "Not pending,Pending" eventfld.long 0x00 9. " CPB361 ,Clear Pending Bit 361" "Not pending,Pending" eventfld.long 0x00 8. " CPB360 ,Clear Pending Bit 360" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB359 ,Clear Pending Bit 359" "Not pending,Pending" eventfld.long 0x00 6. " CPB358 ,Clear Pending Bit 358" "Not pending,Pending" eventfld.long 0x00 5. " CPB357 ,Clear Pending Bit 357" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB356 ,Clear Pending Bit 356" "Not pending,Pending" eventfld.long 0x00 3. " CPB355 ,Clear Pending Bit 355" "Not pending,Pending" eventfld.long 0x00 2. " CPB354 ,Clear Pending Bit 354" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB353 ,Clear Pending Bit 353" "Not pending,Pending" eventfld.long 0x00 0. " CPB352 ,Clear Pending Bit 352" "Not pending,Pending" group.long 0x12b0++0x03 line.long 0x0 "GICD_ICPR12,Interrupt Clear Pending Register 12" eventfld.long 0x00 31. " CPB415 ,Clear Pending Bit 415" "Not pending,Pending" eventfld.long 0x00 30. " CPB414 ,Clear Pending Bit 414" "Not pending,Pending" eventfld.long 0x00 29. " CPB413 ,Clear Pending Bit 413" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB412 ,Clear Pending Bit 412" "Not pending,Pending" eventfld.long 0x00 27. " CPB411 ,Clear Pending Bit 411" "Not pending,Pending" eventfld.long 0x00 26. " CPB410 ,Clear Pending Bit 410" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB409 ,Clear Pending Bit 409" "Not pending,Pending" eventfld.long 0x00 24. " CPB408 ,Clear Pending Bit 408" "Not pending,Pending" eventfld.long 0x00 23. " CPB407 ,Clear Pending Bit 407" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB406 ,Clear Pending Bit 406" "Not pending,Pending" eventfld.long 0x00 21. " CPB405 ,Clear Pending Bit 405" "Not pending,Pending" eventfld.long 0x00 20. " CPB404 ,Clear Pending Bit 404" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB403 ,Clear Pending Bit 403" "Not pending,Pending" eventfld.long 0x00 18. " CPB402 ,Clear Pending Bit 402" "Not pending,Pending" eventfld.long 0x00 17. " CPB401 ,Clear Pending Bit 401" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB400 ,Clear Pending Bit 400" "Not pending,Pending" eventfld.long 0x00 15. " CPB399 ,Clear Pending Bit 399" "Not pending,Pending" eventfld.long 0x00 14. " CPB398 ,Clear Pending Bit 398" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB397 ,Clear Pending Bit 397" "Not pending,Pending" eventfld.long 0x00 12. " CPB396 ,Clear Pending Bit 396" "Not pending,Pending" eventfld.long 0x00 11. " CPB395 ,Clear Pending Bit 395" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB394 ,Clear Pending Bit 394" "Not pending,Pending" eventfld.long 0x00 9. " CPB393 ,Clear Pending Bit 393" "Not pending,Pending" eventfld.long 0x00 8. " CPB392 ,Clear Pending Bit 392" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB391 ,Clear Pending Bit 391" "Not pending,Pending" eventfld.long 0x00 6. " CPB390 ,Clear Pending Bit 390" "Not pending,Pending" eventfld.long 0x00 5. " CPB389 ,Clear Pending Bit 389" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB388 ,Clear Pending Bit 388" "Not pending,Pending" eventfld.long 0x00 3. " CPB387 ,Clear Pending Bit 387" "Not pending,Pending" eventfld.long 0x00 2. " CPB386 ,Clear Pending Bit 386" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB385 ,Clear Pending Bit 385" "Not pending,Pending" eventfld.long 0x00 0. " CPB384 ,Clear Pending Bit 384" "Not pending,Pending" group.long 0x12b4++0x03 line.long 0x0 "GICD_ICPR13,Interrupt Clear Pending Register 13" eventfld.long 0x00 31. " CPB447 ,Clear Pending Bit 447" "Not pending,Pending" eventfld.long 0x00 30. " CPB446 ,Clear Pending Bit 446" "Not pending,Pending" eventfld.long 0x00 29. " CPB445 ,Clear Pending Bit 445" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB444 ,Clear Pending Bit 444" "Not pending,Pending" eventfld.long 0x00 27. " CPB443 ,Clear Pending Bit 443" "Not pending,Pending" eventfld.long 0x00 26. " CPB442 ,Clear Pending Bit 442" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB441 ,Clear Pending Bit 441" "Not pending,Pending" eventfld.long 0x00 24. " CPB440 ,Clear Pending Bit 440" "Not pending,Pending" eventfld.long 0x00 23. " CPB439 ,Clear Pending Bit 439" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB438 ,Clear Pending Bit 438" "Not pending,Pending" eventfld.long 0x00 21. " CPB437 ,Clear Pending Bit 437" "Not pending,Pending" eventfld.long 0x00 20. " CPB436 ,Clear Pending Bit 436" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB435 ,Clear Pending Bit 435" "Not pending,Pending" eventfld.long 0x00 18. " CPB434 ,Clear Pending Bit 434" "Not pending,Pending" eventfld.long 0x00 17. " CPB433 ,Clear Pending Bit 433" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB432 ,Clear Pending Bit 432" "Not pending,Pending" eventfld.long 0x00 15. " CPB431 ,Clear Pending Bit 431" "Not pending,Pending" eventfld.long 0x00 14. " CPB430 ,Clear Pending Bit 430" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB429 ,Clear Pending Bit 429" "Not pending,Pending" eventfld.long 0x00 12. " CPB428 ,Clear Pending Bit 428" "Not pending,Pending" eventfld.long 0x00 11. " CPB427 ,Clear Pending Bit 427" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB426 ,Clear Pending Bit 426" "Not pending,Pending" eventfld.long 0x00 9. " CPB425 ,Clear Pending Bit 425" "Not pending,Pending" eventfld.long 0x00 8. " CPB424 ,Clear Pending Bit 424" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB423 ,Clear Pending Bit 423" "Not pending,Pending" eventfld.long 0x00 6. " CPB422 ,Clear Pending Bit 422" "Not pending,Pending" eventfld.long 0x00 5. " CPB421 ,Clear Pending Bit 421" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB420 ,Clear Pending Bit 420" "Not pending,Pending" eventfld.long 0x00 3. " CPB419 ,Clear Pending Bit 419" "Not pending,Pending" eventfld.long 0x00 2. " CPB418 ,Clear Pending Bit 418" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB417 ,Clear Pending Bit 417" "Not pending,Pending" eventfld.long 0x00 0. " CPB416 ,Clear Pending Bit 416" "Not pending,Pending" group.long 0x12b8++0x03 line.long 0x0 "GICD_ICPR14,Interrupt Clear Pending Register 14" eventfld.long 0x00 31. " CPB479 ,Clear Pending Bit 479" "Not pending,Pending" eventfld.long 0x00 30. " CPB478 ,Clear Pending Bit 478" "Not pending,Pending" eventfld.long 0x00 29. " CPB477 ,Clear Pending Bit 477" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB476 ,Clear Pending Bit 476" "Not pending,Pending" eventfld.long 0x00 27. " CPB475 ,Clear Pending Bit 475" "Not pending,Pending" eventfld.long 0x00 26. " CPB474 ,Clear Pending Bit 474" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB473 ,Clear Pending Bit 473" "Not pending,Pending" eventfld.long 0x00 24. " CPB472 ,Clear Pending Bit 472" "Not pending,Pending" eventfld.long 0x00 23. " CPB471 ,Clear Pending Bit 471" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB470 ,Clear Pending Bit 470" "Not pending,Pending" eventfld.long 0x00 21. " CPB469 ,Clear Pending Bit 469" "Not pending,Pending" eventfld.long 0x00 20. " CPB468 ,Clear Pending Bit 468" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB467 ,Clear Pending Bit 467" "Not pending,Pending" eventfld.long 0x00 18. " CPB466 ,Clear Pending Bit 466" "Not pending,Pending" eventfld.long 0x00 17. " CPB465 ,Clear Pending Bit 465" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB464 ,Clear Pending Bit 464" "Not pending,Pending" eventfld.long 0x00 15. " CPB463 ,Clear Pending Bit 463" "Not pending,Pending" eventfld.long 0x00 14. " CPB462 ,Clear Pending Bit 462" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB461 ,Clear Pending Bit 461" "Not pending,Pending" eventfld.long 0x00 12. " CPB460 ,Clear Pending Bit 460" "Not pending,Pending" eventfld.long 0x00 11. " CPB459 ,Clear Pending Bit 459" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB458 ,Clear Pending Bit 458" "Not pending,Pending" eventfld.long 0x00 9. " CPB457 ,Clear Pending Bit 457" "Not pending,Pending" eventfld.long 0x00 8. " CPB456 ,Clear Pending Bit 456" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB455 ,Clear Pending Bit 455" "Not pending,Pending" eventfld.long 0x00 6. " CPB454 ,Clear Pending Bit 454" "Not pending,Pending" eventfld.long 0x00 5. " CPB453 ,Clear Pending Bit 453" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB452 ,Clear Pending Bit 452" "Not pending,Pending" eventfld.long 0x00 3. " CPB451 ,Clear Pending Bit 451" "Not pending,Pending" eventfld.long 0x00 2. " CPB450 ,Clear Pending Bit 450" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB449 ,Clear Pending Bit 449" "Not pending,Pending" eventfld.long 0x00 0. " CPB448 ,Clear Pending Bit 448" "Not pending,Pending" group.long 0x12bC++0x03 line.long 0x0 "GICD_ICPR15,Interrupt Clear Pending Register 15" eventfld.long 0x00 31. " CPB511 ,Clear Pending Bit 511" "Not pending,Pending" eventfld.long 0x00 30. " CPB510 ,Clear Pending Bit 510" "Not pending,Pending" eventfld.long 0x00 29. " CPB509 ,Clear Pending Bit 509" "Not pending,Pending" textline " " eventfld.long 0x00 28. " CPB508 ,Clear Pending Bit 508" "Not pending,Pending" eventfld.long 0x00 27. " CPB507 ,Clear Pending Bit 507" "Not pending,Pending" eventfld.long 0x00 26. " CPB506 ,Clear Pending Bit 506" "Not pending,Pending" textline " " eventfld.long 0x00 25. " CPB505 ,Clear Pending Bit 505" "Not pending,Pending" eventfld.long 0x00 24. " CPB504 ,Clear Pending Bit 504" "Not pending,Pending" eventfld.long 0x00 23. " CPB503 ,Clear Pending Bit 503" "Not pending,Pending" textline " " eventfld.long 0x00 22. " CPB502 ,Clear Pending Bit 502" "Not pending,Pending" eventfld.long 0x00 21. " CPB501 ,Clear Pending Bit 501" "Not pending,Pending" eventfld.long 0x00 20. " CPB500 ,Clear Pending Bit 500" "Not pending,Pending" textline " " eventfld.long 0x00 19. " CPB499 ,Clear Pending Bit 499" "Not pending,Pending" eventfld.long 0x00 18. " CPB498 ,Clear Pending Bit 498" "Not pending,Pending" eventfld.long 0x00 17. " CPB497 ,Clear Pending Bit 497" "Not pending,Pending" textline " " eventfld.long 0x00 16. " CPB496 ,Clear Pending Bit 496" "Not pending,Pending" eventfld.long 0x00 15. " CPB495 ,Clear Pending Bit 495" "Not pending,Pending" eventfld.long 0x00 14. " CPB494 ,Clear Pending Bit 494" "Not pending,Pending" textline " " eventfld.long 0x00 13. " CPB493 ,Clear Pending Bit 493" "Not pending,Pending" eventfld.long 0x00 12. " CPB492 ,Clear Pending Bit 492" "Not pending,Pending" eventfld.long 0x00 11. " CPB491 ,Clear Pending Bit 491" "Not pending,Pending" textline " " eventfld.long 0x00 10. " CPB490 ,Clear Pending Bit 490" "Not pending,Pending" eventfld.long 0x00 9. " CPB489 ,Clear Pending Bit 489" "Not pending,Pending" eventfld.long 0x00 8. " CPB488 ,Clear Pending Bit 488" "Not pending,Pending" textline " " eventfld.long 0x00 7. " CPB487 ,Clear Pending Bit 487" "Not pending,Pending" eventfld.long 0x00 6. " CPB486 ,Clear Pending Bit 486" "Not pending,Pending" eventfld.long 0x00 5. " CPB485 ,Clear Pending Bit 485" "Not pending,Pending" textline " " eventfld.long 0x00 4. " CPB484 ,Clear Pending Bit 484" "Not pending,Pending" eventfld.long 0x00 3. " CPB483 ,Clear Pending Bit 483" "Not pending,Pending" eventfld.long 0x00 2. " CPB482 ,Clear Pending Bit 482" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CPB481 ,Clear Pending Bit 481" "Not pending,Pending" eventfld.long 0x00 0. " CPB480 ,Clear Pending Bit 480" "Not pending,Pending" endif textline " " width 18. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long 0x1300++0x03 line.long 0x0 "GICD_ISACTIVER0,Interrupt Set Active Register 0" group.long 0x1304++0x03 line.long 0x0 "GICD_ISACTIVER1,Interrupt Set Active Register 1" group.long 0x1308++0x03 line.long 0x0 "GICD_ISACTIVER2,Interrupt Set Active Register 2" group.long 0x130C++0x03 line.long 0x0 "GICD_ISACTIVER3,Interrupt Set Active Register 3" group.long 0x1310++0x03 line.long 0x0 "GICD_ISACTIVER4,Interrupt Set Active Register 4" group.long 0x1314++0x03 line.long 0x0 "GICD_ISACTIVER5,Interrupt Set Active Register 5" group.long 0x1318++0x03 line.long 0x0 "GICD_ISACTIVER6,Interrupt Set Active Register 6" group.long 0x131C++0x03 line.long 0x0 "GICD_ISACTIVER7,Interrupt Set Active Register 7" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x1300++0x03 line.long 0x0 "GICD_ISACTIVER0,Interrupt Set Active Register 0" group.long 0x1304++0x03 line.long 0x0 "GICD_ISACTIVER1,Interrupt Set Active Register 1" group.long 0x1308++0x03 line.long 0x0 "GICD_ISACTIVER2,Interrupt Set Active Register 2" group.long 0x130C++0x03 line.long 0x0 "GICD_ISACTIVER3,Interrupt Set Active Register 3" group.long 0x1310++0x03 line.long 0x0 "GICD_ISACTIVER4,Interrupt Set Active Register 4" group.long 0x1314++0x03 line.long 0x0 "GICD_ISACTIVER5,Interrupt Set Active Register 5" group.long 0x1318++0x03 line.long 0x0 "GICD_ISACTIVER6,Interrupt Set Active Register 6" group.long 0x131C++0x03 line.long 0x0 "GICD_ISACTIVER7,Interrupt Set Active Register 7" group.long 0x1320++0x03 line.long 0x0 "GICD_ISACTIVER8,Interrupt Set Active Register 8" group.long 0x1324++0x03 line.long 0x0 "GICD_ISACTIVER9,Interrupt Set Active Register 9" group.long 0x1328++0x03 line.long 0x0 "GICD_ISACTIVER10,Interrupt Set Active Register 10" group.long 0x132C++0x03 line.long 0x0 "GICD_ISACTIVER11,Interrupt Set Active Register 11" group.long 0x1330++0x03 line.long 0x0 "GICD_ISACTIVER12,Interrupt Set Active Register 12" group.long 0x1334++0x03 line.long 0x0 "GICD_ISACTIVER13,Interrupt Set Active Register 13" group.long 0x1338++0x03 line.long 0x0 "GICD_ISACTIVER14,Interrupt Set Active Register 14" group.long 0x133C++0x03 line.long 0x0 "GICD_ISACTIVER15,Interrupt Set Active Register 15" endif textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long 0x1380++0x03 line.long 0x0 "GICD_ICACTIVER0,Interrupt Clear Active Register 0" group.long 0x1384++0x03 line.long 0x0 "GICD_ICACTIVER1,Interrupt Clear Active Register 1" group.long 0x1388++0x03 line.long 0x0 "GICD_ICACTIVER2,Interrupt Clear Active Register 2" group.long 0x138C++0x03 line.long 0x0 "GICD_ICACTIVER3,Interrupt Clear Active Register 3" group.long 0x1390++0x03 line.long 0x0 "GICD_ICACTIVER4,Interrupt Clear Active Register 4" group.long 0x1394++0x03 line.long 0x0 "GICD_ICACTIVER5,Interrupt Clear Active Register 5" group.long 0x1398++0x03 line.long 0x0 "GICD_ICACTIVER6,Interrupt Clear Active Register 6" group.long 0x139C++0x03 line.long 0x0 "GICD_ICACTIVER7,Interrupt Clear Active Register 7" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x1380++0x03 line.long 0x0 "GICD_ICACTIVER0,Interrupt Clear Active Register 0" group.long 0x1384++0x03 line.long 0x0 "GICD_ICACTIVER1,Interrupt Clear Active Register 1" group.long 0x1388++0x03 line.long 0x0 "GICD_ICACTIVER2,Interrupt Clear Active Register 2" group.long 0x138C++0x03 line.long 0x0 "GICD_ICACTIVER3,Interrupt Clear Active Register 3" group.long 0x1390++0x03 line.long 0x0 "GICD_ICACTIVER4,Interrupt Clear Active Register 4" group.long 0x1394++0x03 line.long 0x0 "GICD_ICACTIVER5,Interrupt Clear Active Register 5" group.long 0x1398++0x03 line.long 0x0 "GICD_ICACTIVER6,Interrupt Clear Active Register 6" group.long 0x139C++0x03 line.long 0x0 "GICD_ICACTIVER7,Interrupt Clear Active Register 7" group.long 0x13A0++0x03 line.long 0x0 "GICD_ICACTIVER8,Interrupt Clear Active Register 8" group.long 0x13A4++0x03 line.long 0x0 "GICD_ICACTIVER9,Interrupt Clear Active Register 9" group.long 0x13A8++0x03 line.long 0x0 "GICD_ICACTIVER10,Interrupt Clear Active Register 10" group.long 0x13AC++0x03 line.long 0x0 "GICD_ICACTIVER11,Interrupt Clear Active Register 11" group.long 0x13B0++0x03 line.long 0x0 "GICD_ICACTIVER12,Interrupt Clear Active Register 12" group.long 0x13B4++0x03 line.long 0x0 "GICD_ICACTIVER13,Interrupt Clear Active Register 13" group.long 0x13B8++0x03 line.long 0x0 "GICD_ICACTIVER14,Interrupt Clear Active Register 14" group.long 0x13BC++0x03 line.long 0x0 "GICD_ICACTIVER15,Interrupt Clear Active Register 15" endif textline " " width 12. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long 0x1400++0x03 line.long 0x0 "GICD_IPR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1404++0x03 line.long 0x0 "GICD_IPR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1408++0x03 line.long 0x0 "GICD_IPR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x140C++0x03 line.long 0x0 "GICD_IPR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1410++0x03 line.long 0x0 "GICD_IPR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1414++0x03 line.long 0x0 "GICD_IPR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1418++0x03 line.long 0x0 "GICD_IPR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x141C++0x03 line.long 0x0 "GICD_IPR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1420++0x03 line.long 0x0 "GICD_IPR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1424++0x03 line.long 0x0 "GICD_IPR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1428++0x03 line.long 0x0 "GICD_IPR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x142C++0x03 line.long 0x0 "GICD_IPR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1430++0x03 line.long 0x0 "GICD_IPR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1434++0x03 line.long 0x0 "GICD_IPR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1438++0x03 line.long 0x0 "GICD_IPR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x143C++0x03 line.long 0x0 "GICD_IPR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1440++0x03 line.long 0x0 "GICD_IPR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1444++0x03 line.long 0x0 "GICD_IPR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1448++0x03 line.long 0x0 "GICD_IPR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x144C++0x03 line.long 0x0 "GICD_IPR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1450++0x03 line.long 0x0 "GICD_IPR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1454++0x03 line.long 0x0 "GICD_IPR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1458++0x03 line.long 0x0 "GICD_IPR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x145C++0x03 line.long 0x0 "GICD_IPR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1460++0x03 line.long 0x0 "GICD_IPR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1464++0x03 line.long 0x0 "GICD_IPR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1468++0x03 line.long 0x0 "GICD_IPR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x146C++0x03 line.long 0x0 "GICD_IPR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1470++0x03 line.long 0x0 "GICD_IPR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1474++0x03 line.long 0x0 "GICD_IPR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1478++0x03 line.long 0x0 "GICD_IPR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x147C++0x03 line.long 0x0 "GICD_IPR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1480++0x03 line.long 0x0 "GICD_IPR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1484++0x03 line.long 0x0 "GICD_IPR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1488++0x03 line.long 0x0 "GICD_IPR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x148C++0x03 line.long 0x0 "GICD_IPR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1490++0x03 line.long 0x0 "GICD_IPR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1494++0x03 line.long 0x0 "GICD_IPR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1498++0x03 line.long 0x0 "GICD_IPR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x149C++0x03 line.long 0x0 "GICD_IPR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A0++0x03 line.long 0x0 "GICD_IPR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A4++0x03 line.long 0x0 "GICD_IPR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A8++0x03 line.long 0x0 "GICD_IPR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14AC++0x03 line.long 0x0 "GICD_IPR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B0++0x03 line.long 0x0 "GICD_IPR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B4++0x03 line.long 0x0 "GICD_IPR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B8++0x03 line.long 0x0 "GICD_IPR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14BC++0x03 line.long 0x0 "GICD_IPR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C0++0x03 line.long 0x0 "GICD_IPR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C4++0x03 line.long 0x0 "GICD_IPR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C8++0x03 line.long 0x0 "GICD_IPR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14CC++0x03 line.long 0x0 "GICD_IPR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D0++0x03 line.long 0x0 "GICD_IPR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D4++0x03 line.long 0x0 "GICD_IPR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D8++0x03 line.long 0x0 "GICD_IPR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14DC++0x03 line.long 0x0 "GICD_IPR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E0++0x03 line.long 0x0 "GICD_IPR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E4++0x03 line.long 0x0 "GICD_IPR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E8++0x03 line.long 0x0 "GICD_IPR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14EC++0x03 line.long 0x0 "GICD_IPR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F0++0x03 line.long 0x0 "GICD_IPR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F4++0x03 line.long 0x0 "GICD_IPR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F8++0x03 line.long 0x0 "GICD_IPR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14FC++0x03 line.long 0x0 "GICD_IPR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x1400++0x03 line.long 0x0 "GICD_IPR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1404++0x03 line.long 0x0 "GICD_IPR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1408++0x03 line.long 0x0 "GICD_IPR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x140C++0x03 line.long 0x0 "GICD_IPR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1410++0x03 line.long 0x0 "GICD_IPR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1414++0x03 line.long 0x0 "GICD_IPR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1418++0x03 line.long 0x0 "GICD_IPR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x141C++0x03 line.long 0x0 "GICD_IPR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1420++0x03 line.long 0x0 "GICD_IPR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1424++0x03 line.long 0x0 "GICD_IPR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1428++0x03 line.long 0x0 "GICD_IPR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x142C++0x03 line.long 0x0 "GICD_IPR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1430++0x03 line.long 0x0 "GICD_IPR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1434++0x03 line.long 0x0 "GICD_IPR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1438++0x03 line.long 0x0 "GICD_IPR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x143C++0x03 line.long 0x0 "GICD_IPR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1440++0x03 line.long 0x0 "GICD_IPR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1444++0x03 line.long 0x0 "GICD_IPR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1448++0x03 line.long 0x0 "GICD_IPR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x144C++0x03 line.long 0x0 "GICD_IPR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1450++0x03 line.long 0x0 "GICD_IPR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1454++0x03 line.long 0x0 "GICD_IPR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1458++0x03 line.long 0x0 "GICD_IPR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x145C++0x03 line.long 0x0 "GICD_IPR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1460++0x03 line.long 0x0 "GICD_IPR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1464++0x03 line.long 0x0 "GICD_IPR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1468++0x03 line.long 0x0 "GICD_IPR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x146C++0x03 line.long 0x0 "GICD_IPR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1470++0x03 line.long 0x0 "GICD_IPR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1474++0x03 line.long 0x0 "GICD_IPR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1478++0x03 line.long 0x0 "GICD_IPR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x147C++0x03 line.long 0x0 "GICD_IPR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1480++0x03 line.long 0x0 "GICD_IPR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1484++0x03 line.long 0x0 "GICD_IPR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1488++0x03 line.long 0x0 "GICD_IPR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x148C++0x03 line.long 0x0 "GICD_IPR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1490++0x03 line.long 0x0 "GICD_IPR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1494++0x03 line.long 0x0 "GICD_IPR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1498++0x03 line.long 0x0 "GICD_IPR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x149C++0x03 line.long 0x0 "GICD_IPR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A0++0x03 line.long 0x0 "GICD_IPR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A4++0x03 line.long 0x0 "GICD_IPR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14A8++0x03 line.long 0x0 "GICD_IPR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14AC++0x03 line.long 0x0 "GICD_IPR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B0++0x03 line.long 0x0 "GICD_IPR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B4++0x03 line.long 0x0 "GICD_IPR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14B8++0x03 line.long 0x0 "GICD_IPR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14BC++0x03 line.long 0x0 "GICD_IPR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C0++0x03 line.long 0x0 "GICD_IPR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C4++0x03 line.long 0x0 "GICD_IPR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14C8++0x03 line.long 0x0 "GICD_IPR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14CC++0x03 line.long 0x0 "GICD_IPR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D0++0x03 line.long 0x0 "GICD_IPR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D4++0x03 line.long 0x0 "GICD_IPR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14D8++0x03 line.long 0x0 "GICD_IPR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14DC++0x03 line.long 0x0 "GICD_IPR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E0++0x03 line.long 0x0 "GICD_IPR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E4++0x03 line.long 0x0 "GICD_IPR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14E8++0x03 line.long 0x0 "GICD_IPR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14EC++0x03 line.long 0x0 "GICD_IPR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F0++0x03 line.long 0x0 "GICD_IPR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F4++0x03 line.long 0x0 "GICD_IPR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14F8++0x03 line.long 0x0 "GICD_IPR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x14FC++0x03 line.long 0x0 "GICD_IPR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1500++0x03 line.long 0x0 "GICD_IPR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1504++0x03 line.long 0x0 "GICD_IPR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1508++0x03 line.long 0x0 "GICD_IPR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x150C++0x03 line.long 0x0 "GICD_IPR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1510++0x03 line.long 0x0 "GICD_IPR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1514++0x03 line.long 0x0 "GICD_IPR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1518++0x03 line.long 0x0 "GICD_IPR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x151C++0x03 line.long 0x0 "GICD_IPR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1520++0x03 line.long 0x0 "GICD_IPR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1524++0x03 line.long 0x0 "GICD_IPR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1528++0x03 line.long 0x0 "GICD_IPR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x152C++0x03 line.long 0x0 "GICD_IPR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1530++0x03 line.long 0x0 "GICD_IPR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1534++0x03 line.long 0x0 "GICD_IPR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1538++0x03 line.long 0x0 "GICD_IPR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x153C++0x03 line.long 0x0 "GICD_IPR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1540++0x03 line.long 0x0 "GICD_IPR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1544++0x03 line.long 0x0 "GICD_IPR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1548++0x03 line.long 0x0 "GICD_IPR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x154C++0x03 line.long 0x0 "GICD_IPR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1550++0x03 line.long 0x0 "GICD_IPR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1554++0x03 line.long 0x0 "GICD_IPR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1558++0x03 line.long 0x0 "GICD_IPR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x155C++0x03 line.long 0x0 "GICD_IPR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1560++0x03 line.long 0x0 "GICD_IPR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1564++0x03 line.long 0x0 "GICD_IPR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1568++0x03 line.long 0x0 "GICD_IPR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x156C++0x03 line.long 0x0 "GICD_IPR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1570++0x03 line.long 0x0 "GICD_IPR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1574++0x03 line.long 0x0 "GICD_IPR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1578++0x03 line.long 0x0 "GICD_IPR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x157C++0x03 line.long 0x0 "GICD_IPR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1580++0x03 line.long 0x0 "GICD_IPR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1584++0x03 line.long 0x0 "GICD_IPR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1588++0x03 line.long 0x0 "GICD_IPR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x158C++0x03 line.long 0x0 "GICD_IPR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1590++0x03 line.long 0x0 "GICD_IPR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1594++0x03 line.long 0x0 "GICD_IPR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x1598++0x03 line.long 0x0 "GICD_IPR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x159C++0x03 line.long 0x0 "GICD_IPR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15A0++0x03 line.long 0x0 "GICD_IPR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15A4++0x03 line.long 0x0 "GICD_IPR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15A8++0x03 line.long 0x0 "GICD_IPR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15AC++0x03 line.long 0x0 "GICD_IPR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15B0++0x03 line.long 0x0 "GICD_IPR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15B4++0x03 line.long 0x0 "GICD_IPR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15B8++0x03 line.long 0x0 "GICD_IPR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15BC++0x03 line.long 0x0 "GICD_IPR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15C0++0x03 line.long 0x0 "GICD_IPR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15C4++0x03 line.long 0x0 "GICD_IPR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15C8++0x03 line.long 0x0 "GICD_IPR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15CC++0x03 line.long 0x0 "GICD_IPR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15D0++0x03 line.long 0x0 "GICD_IPR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15D4++0x03 line.long 0x0 "GICD_IPR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15D8++0x03 line.long 0x0 "GICD_IPR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15DC++0x03 line.long 0x0 "GICD_IPR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15E0++0x03 line.long 0x0 "GICD_IPR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15E4++0x03 line.long 0x0 "GICD_IPR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15E8++0x03 line.long 0x0 "GICD_IPR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15EC++0x03 line.long 0x0 "GICD_IPR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15F0++0x03 line.long 0x0 "GICD_IPR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15F4++0x03 line.long 0x0 "GICD_IPR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15F8++0x03 line.long 0x0 "GICD_IPR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" group.long 0x15FC++0x03 line.long 0x0 "GICD_IPR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0" endif textline " " width 12. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long 0x1800++0x03 line.long 0x0 "GICD_IPTR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1804++0x03 line.long 0x0 "GICD_IPTR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1808++0x03 line.long 0x0 "GICD_IPTR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x180C++0x03 line.long 0x0 "GICD_IPTR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1810++0x03 line.long 0x0 "GICD_IPTR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1814++0x03 line.long 0x0 "GICD_IPTR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1818++0x03 line.long 0x0 "GICD_IPTR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x181C++0x03 line.long 0x0 "GICD_IPTR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long 0x1800++0x03 line.long 0x0 "GICD_IPTR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1804++0x03 line.long 0x0 "GICD_IPTR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1808++0x03 line.long 0x0 "GICD_IPTR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x180C++0x03 line.long 0x0 "GICD_IPTR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1810++0x03 line.long 0x0 "GICD_IPTR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1814++0x03 line.long 0x0 "GICD_IPTR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x1818++0x03 line.long 0x0 "GICD_IPTR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" rgroup.long 0x181C++0x03 line.long 0x0 "GICD_IPTR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long 0x1820++0x03 line.long 0x0 "GICD_IPTR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1824++0x03 line.long 0x0 "GICD_IPTR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1828++0x03 line.long 0x0 "GICD_IPTR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x182C++0x03 line.long 0x0 "GICD_IPTR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1830++0x03 line.long 0x0 "GICD_IPTR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1834++0x03 line.long 0x0 "GICD_IPTR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1838++0x03 line.long 0x0 "GICD_IPTR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x183C++0x03 line.long 0x0 "GICD_IPTR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1840++0x03 line.long 0x0 "GICD_IPTR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1844++0x03 line.long 0x0 "GICD_IPTR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1848++0x03 line.long 0x0 "GICD_IPTR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x184C++0x03 line.long 0x0 "GICD_IPTR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1850++0x03 line.long 0x0 "GICD_IPTR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1854++0x03 line.long 0x0 "GICD_IPTR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1858++0x03 line.long 0x0 "GICD_IPTR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x185C++0x03 line.long 0x0 "GICD_IPTR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1860++0x03 line.long 0x0 "GICD_IPTR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1864++0x03 line.long 0x0 "GICD_IPTR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1868++0x03 line.long 0x0 "GICD_IPTR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x186C++0x03 line.long 0x0 "GICD_IPTR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1870++0x03 line.long 0x0 "GICD_IPTR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1874++0x03 line.long 0x0 "GICD_IPTR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1878++0x03 line.long 0x0 "GICD_IPTR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x187C++0x03 line.long 0x0 "GICD_IPTR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1880++0x03 line.long 0x0 "GICD_IPTR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1884++0x03 line.long 0x0 "GICD_IPTR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1888++0x03 line.long 0x0 "GICD_IPTR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x188C++0x03 line.long 0x0 "GICD_IPTR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1890++0x03 line.long 0x0 "GICD_IPTR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1894++0x03 line.long 0x0 "GICD_IPTR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1898++0x03 line.long 0x0 "GICD_IPTR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x189C++0x03 line.long 0x0 "GICD_IPTR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A0++0x03 line.long 0x0 "GICD_IPTR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A4++0x03 line.long 0x0 "GICD_IPTR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A8++0x03 line.long 0x0 "GICD_IPTR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18AC++0x03 line.long 0x0 "GICD_IPTR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B0++0x03 line.long 0x0 "GICD_IPTR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B4++0x03 line.long 0x0 "GICD_IPTR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B8++0x03 line.long 0x0 "GICD_IPTR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18BC++0x03 line.long 0x0 "GICD_IPTR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C0++0x03 line.long 0x0 "GICD_IPTR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C4++0x03 line.long 0x0 "GICD_IPTR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C8++0x03 line.long 0x0 "GICD_IPTR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18CC++0x03 line.long 0x0 "GICD_IPTR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D0++0x03 line.long 0x0 "GICD_IPTR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D4++0x03 line.long 0x0 "GICD_IPTR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D8++0x03 line.long 0x0 "GICD_IPTR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18DC++0x03 line.long 0x0 "GICD_IPTR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E0++0x03 line.long 0x0 "GICD_IPTR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E4++0x03 line.long 0x0 "GICD_IPTR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E8++0x03 line.long 0x0 "GICD_IPTR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18EC++0x03 line.long 0x0 "GICD_IPTR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F0++0x03 line.long 0x0 "GICD_IPTR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F4++0x03 line.long 0x0 "GICD_IPTR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F8++0x03 line.long 0x0 "GICD_IPTR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18FC++0x03 line.long 0x0 "GICD_IPTR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x1820++0x03 line.long 0x0 "GICD_IPTR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1824++0x03 line.long 0x0 "GICD_IPTR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1828++0x03 line.long 0x0 "GICD_IPTR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x182C++0x03 line.long 0x0 "GICD_IPTR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1830++0x03 line.long 0x0 "GICD_IPTR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1834++0x03 line.long 0x0 "GICD_IPTR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1838++0x03 line.long 0x0 "GICD_IPTR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x183C++0x03 line.long 0x0 "GICD_IPTR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1840++0x03 line.long 0x0 "GICD_IPTR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1844++0x03 line.long 0x0 "GICD_IPTR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1848++0x03 line.long 0x0 "GICD_IPTR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x184C++0x03 line.long 0x0 "GICD_IPTR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1850++0x03 line.long 0x0 "GICD_IPTR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1854++0x03 line.long 0x0 "GICD_IPTR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1858++0x03 line.long 0x0 "GICD_IPTR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x185C++0x03 line.long 0x0 "GICD_IPTR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1860++0x03 line.long 0x0 "GICD_IPTR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1864++0x03 line.long 0x0 "GICD_IPTR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1868++0x03 line.long 0x0 "GICD_IPTR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x186C++0x03 line.long 0x0 "GICD_IPTR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1870++0x03 line.long 0x0 "GICD_IPTR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1874++0x03 line.long 0x0 "GICD_IPTR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1878++0x03 line.long 0x0 "GICD_IPTR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x187C++0x03 line.long 0x0 "GICD_IPTR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1880++0x03 line.long 0x0 "GICD_IPTR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1884++0x03 line.long 0x0 "GICD_IPTR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1888++0x03 line.long 0x0 "GICD_IPTR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x188C++0x03 line.long 0x0 "GICD_IPTR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1890++0x03 line.long 0x0 "GICD_IPTR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1894++0x03 line.long 0x0 "GICD_IPTR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1898++0x03 line.long 0x0 "GICD_IPTR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x189C++0x03 line.long 0x0 "GICD_IPTR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A0++0x03 line.long 0x0 "GICD_IPTR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A4++0x03 line.long 0x0 "GICD_IPTR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18A8++0x03 line.long 0x0 "GICD_IPTR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18AC++0x03 line.long 0x0 "GICD_IPTR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B0++0x03 line.long 0x0 "GICD_IPTR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B4++0x03 line.long 0x0 "GICD_IPTR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18B8++0x03 line.long 0x0 "GICD_IPTR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18BC++0x03 line.long 0x0 "GICD_IPTR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C0++0x03 line.long 0x0 "GICD_IPTR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C4++0x03 line.long 0x0 "GICD_IPTR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18C8++0x03 line.long 0x0 "GICD_IPTR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18CC++0x03 line.long 0x0 "GICD_IPTR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D0++0x03 line.long 0x0 "GICD_IPTR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D4++0x03 line.long 0x0 "GICD_IPTR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18D8++0x03 line.long 0x0 "GICD_IPTR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18DC++0x03 line.long 0x0 "GICD_IPTR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E0++0x03 line.long 0x0 "GICD_IPTR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E4++0x03 line.long 0x0 "GICD_IPTR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18E8++0x03 line.long 0x0 "GICD_IPTR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18EC++0x03 line.long 0x0 "GICD_IPTR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F0++0x03 line.long 0x0 "GICD_IPTR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F4++0x03 line.long 0x0 "GICD_IPTR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18F8++0x03 line.long 0x0 "GICD_IPTR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x18FC++0x03 line.long 0x0 "GICD_IPTR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1900++0x03 line.long 0x0 "GICD_IPTR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1904++0x03 line.long 0x0 "GICD_IPTR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1908++0x03 line.long 0x0 "GICD_IPTR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x190C++0x03 line.long 0x0 "GICD_IPTR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1910++0x03 line.long 0x0 "GICD_IPTR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1914++0x03 line.long 0x0 "GICD_IPTR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1918++0x03 line.long 0x0 "GICD_IPTR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x191C++0x03 line.long 0x0 "GICD_IPTR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1920++0x03 line.long 0x0 "GICD_IPTR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1924++0x03 line.long 0x0 "GICD_IPTR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1928++0x03 line.long 0x0 "GICD_IPTR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x192C++0x03 line.long 0x0 "GICD_IPTR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1930++0x03 line.long 0x0 "GICD_IPTR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1934++0x03 line.long 0x0 "GICD_IPTR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1938++0x03 line.long 0x0 "GICD_IPTR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x193C++0x03 line.long 0x0 "GICD_IPTR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1940++0x03 line.long 0x0 "GICD_IPTR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1944++0x03 line.long 0x0 "GICD_IPTR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1948++0x03 line.long 0x0 "GICD_IPTR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x194C++0x03 line.long 0x0 "GICD_IPTR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1950++0x03 line.long 0x0 "GICD_IPTR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1954++0x03 line.long 0x0 "GICD_IPTR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1958++0x03 line.long 0x0 "GICD_IPTR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x195C++0x03 line.long 0x0 "GICD_IPTR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1960++0x03 line.long 0x0 "GICD_IPTR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1964++0x03 line.long 0x0 "GICD_IPTR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1968++0x03 line.long 0x0 "GICD_IPTR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x196C++0x03 line.long 0x0 "GICD_IPTR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1970++0x03 line.long 0x0 "GICD_IPTR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1974++0x03 line.long 0x0 "GICD_IPTR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1978++0x03 line.long 0x0 "GICD_IPTR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x197C++0x03 line.long 0x0 "GICD_IPTR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1980++0x03 line.long 0x0 "GICD_IPTR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1984++0x03 line.long 0x0 "GICD_IPTR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1988++0x03 line.long 0x0 "GICD_IPTR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x198C++0x03 line.long 0x0 "GICD_IPTR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1990++0x03 line.long 0x0 "GICD_IPTR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1994++0x03 line.long 0x0 "GICD_IPTR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x1998++0x03 line.long 0x0 "GICD_IPTR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x199C++0x03 line.long 0x0 "GICD_IPTR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19A0++0x03 line.long 0x0 "GICD_IPTR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19A4++0x03 line.long 0x0 "GICD_IPTR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19A8++0x03 line.long 0x0 "GICD_IPTR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19AC++0x03 line.long 0x0 "GICD_IPTR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19B0++0x03 line.long 0x0 "GICD_IPTR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19B4++0x03 line.long 0x0 "GICD_IPTR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19B8++0x03 line.long 0x0 "GICD_IPTR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19BC++0x03 line.long 0x0 "GICD_IPTR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19C0++0x03 line.long 0x0 "GICD_IPTR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19C4++0x03 line.long 0x0 "GICD_IPTR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19C8++0x03 line.long 0x0 "GICD_IPTR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19CC++0x03 line.long 0x0 "GICD_IPTR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19D0++0x03 line.long 0x0 "GICD_IPTR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19D4++0x03 line.long 0x0 "GICD_IPTR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19D8++0x03 line.long 0x0 "GICD_IPTR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19DC++0x03 line.long 0x0 "GICD_IPTR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19E0++0x03 line.long 0x0 "GICD_IPTR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19E4++0x03 line.long 0x0 "GICD_IPTR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19E8++0x03 line.long 0x0 "GICD_IPTR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19EC++0x03 line.long 0x0 "GICD_IPTR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19F0++0x03 line.long 0x0 "GICD_IPTR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19F4++0x03 line.long 0x0 "GICD_IPTR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19F8++0x03 line.long 0x0 "GICD_IPTR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" group.long 0x19FC++0x03 line.long 0x0 "GICD_IPTR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0" endif textline " " width 12. rgroup.long 0x1C00++0x03 line.long 0x00 "GICD_ICFR0,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" rgroup.long 0x1C04++0x03 line.long 0x00 "GICD_ICFR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " tree "Interrupt Configuration Registers" width 13. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long 0x1C08++0x03 line.long 0x00 "GICD_ICFR2,Interrupt Configuration Register 0x1C08" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C0C++0x03 line.long 0x00 "GICD_ICFR3,Interrupt Configuration Register 0x1C0C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C10++0x03 line.long 0x00 "GICD_ICFR4,Interrupt Configuration Register 0x1C10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C14++0x03 line.long 0x00 "GICD_ICFR5,Interrupt Configuration Register 0x1C14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C18++0x03 line.long 0x00 "GICD_ICFR6,Interrupt Configuration Register 0x1C18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C1C++0x03 line.long 0x00 "GICD_ICFR7,Interrupt Configuration Register 0x1C1C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C20++0x03 line.long 0x00 "GICD_ICFR8,Interrupt Configuration Register 0x1C20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C24++0x03 line.long 0x00 "GICD_ICFR9,Interrupt Configuration Register 0x1C24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C28++0x03 line.long 0x00 "GICD_ICFR10,Interrupt Configuration Register 0x1C28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C2C++0x03 line.long 0x00 "GICD_ICFR11,Interrupt Configuration Register 0x1C2C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C30++0x03 line.long 0x00 "GICD_ICFR12,Interrupt Configuration Register 0x1C30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C34++0x03 line.long 0x00 "GICD_ICFR13,Interrupt Configuration Register 0x1C34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C38++0x03 line.long 0x00 "GICD_ICFR14,Interrupt Configuration Register 0x1C38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C3C++0x03 line.long 0x00 "GICD_ICFR15,Interrupt Configuration Register 0x1C3C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x1C08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 0x1C08" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 0x1C0C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 0x1C10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 0x1C14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 0x1C18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 0x1C1C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 0x1C20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 0x1C24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 0x1C28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 0x1C2C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 0x1C30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 0x1C34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 0x1C38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 0x1C3C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 0x1C40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 0x1C44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 0x1C48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 0x1C4C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 0x1C50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 0x1C54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 0x1C58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 0x1C5C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 0x1C60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 0x1C64" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 0x1C68" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 0x1C6C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 0x1C70" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 0x1C74" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 0x1C78" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " group.long 0x1C7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 0x1C7C" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level" textline " " endif tree.end textline " " width 14. rgroup.long 0x1D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" tree "Shared Peripheral Interrupt Status Registers" rgroup.long 0x1D04++0x03 line.long 0x00 "GICD_SPISR0,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[31] ,IRQS[31] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[30] ,IRQS[30] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[29] ,IRQS[29] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[28] ,IRQS[28] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[27] ,IRQS[27] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[26] ,IRQS[26] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[25] ,IRQS[25] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[24] ,IRQS[24] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[23] ,IRQS[23] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[22] ,IRQS[22] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[21] ,IRQS[21] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[20] ,IRQS[20] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[19] ,IRQS[19] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[18] ,IRQS[18] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[17] ,IRQS[17] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[16] ,IRQS[16] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[15] ,IRQS[15] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[14] ,IRQS[14] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[13] ,IRQS[13] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[12] ,IRQS[12] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[11] ,IRQS[11] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[10] ,IRQS[10] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[9] ,IRQS[9] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[8] ,IRQS[8] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[7] ,IRQS[7] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[6] ,IRQS[6] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[5] ,IRQS[5] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[4] ,IRQS[4] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[3] ,IRQS[3] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[2] ,IRQS[2] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[1] ,IRQS[1] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[0] ,IRQS[0] status" "No interrupt,Interrupt" rgroup.long 0x1D08++0x03 line.long 0x00 "GICD_SPISR1,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[63] ,IRQS[63] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[62] ,IRQS[62] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[61] ,IRQS[61] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[60] ,IRQS[60] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[59] ,IRQS[59] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[58] ,IRQS[58] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[57] ,IRQS[57] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[56] ,IRQS[56] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[55] ,IRQS[55] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[54] ,IRQS[54] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[53] ,IRQS[53] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[52] ,IRQS[52] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[51] ,IRQS[51] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[50] ,IRQS[50] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[49] ,IRQS[49] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[48] ,IRQS[48] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[47] ,IRQS[47] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[46] ,IRQS[46] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[45] ,IRQS[45] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[44] ,IRQS[44] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[43] ,IRQS[43] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[42] ,IRQS[42] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[41] ,IRQS[41] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[40] ,IRQS[40] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[39] ,IRQS[39] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[38] ,IRQS[38] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[37] ,IRQS[37] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[36] ,IRQS[36] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[35] ,IRQS[35] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[34] ,IRQS[34] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[33] ,IRQS[33] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[32] ,IRQS[32] status" "No interrupt,Interrupt" rgroup.long 0x1D0C++0x03 line.long 0x00 "GICD_SPISR2,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[95] ,IRQS[95] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[94] ,IRQS[94] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[93] ,IRQS[93] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[92] ,IRQS[92] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[91] ,IRQS[91] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[90] ,IRQS[90] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[89] ,IRQS[89] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[88] ,IRQS[88] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[87] ,IRQS[87] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[86] ,IRQS[86] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[85] ,IRQS[85] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[84] ,IRQS[84] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[83] ,IRQS[83] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[82] ,IRQS[82] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[81] ,IRQS[81] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[80] ,IRQS[80] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[79] ,IRQS[79] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[78] ,IRQS[78] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[77] ,IRQS[77] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[76] ,IRQS[76] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[75] ,IRQS[75] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[74] ,IRQS[74] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[73] ,IRQS[73] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[72] ,IRQS[72] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[71] ,IRQS[71] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[70] ,IRQS[70] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[69] ,IRQS[69] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[68] ,IRQS[68] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[67] ,IRQS[67] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[66] ,IRQS[66] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[65] ,IRQS[65] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[64] ,IRQS[64] status" "No interrupt,Interrupt" rgroup.long 0x1D10++0x03 line.long 0x00 "GICD_SPISR3,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[127] ,IRQS[127] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[126] ,IRQS[126] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[125] ,IRQS[125] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[124] ,IRQS[124] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[123] ,IRQS[123] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[122] ,IRQS[122] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[121] ,IRQS[121] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[120] ,IRQS[120] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[119] ,IRQS[119] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[118] ,IRQS[118] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[117] ,IRQS[117] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[116] ,IRQS[116] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[115] ,IRQS[115] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[114] ,IRQS[114] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[113] ,IRQS[113] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[112] ,IRQS[112] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[111] ,IRQS[111] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[110] ,IRQS[110] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[109] ,IRQS[109] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[108] ,IRQS[108] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[107] ,IRQS[107] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[106] ,IRQS[106] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[105] ,IRQS[105] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[104] ,IRQS[104] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[103] ,IRQS[103] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[102] ,IRQS[102] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[101] ,IRQS[101] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[100] ,IRQS[100] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[99] ,IRQS[99] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[98] ,IRQS[98] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[97] ,IRQS[97] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[96] ,IRQS[96] status" "No interrupt,Interrupt" rgroup.long 0x1D14++0x03 line.long 0x00 "GICD_SPISR4,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[159] ,IRQS[159] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[158] ,IRQS[158] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[157] ,IRQS[157] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[156] ,IRQS[156] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[155] ,IRQS[155] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[154] ,IRQS[154] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[153] ,IRQS[153] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[152] ,IRQS[152] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[151] ,IRQS[151] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[150] ,IRQS[150] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[149] ,IRQS[149] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[148] ,IRQS[148] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[147] ,IRQS[147] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[146] ,IRQS[146] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[145] ,IRQS[145] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[144] ,IRQS[144] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[143] ,IRQS[143] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[142] ,IRQS[142] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[141] ,IRQS[141] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[140] ,IRQS[140] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[139] ,IRQS[139] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[138] ,IRQS[138] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[137] ,IRQS[137] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[136] ,IRQS[136] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[135] ,IRQS[135] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[134] ,IRQS[134] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[133] ,IRQS[133] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[132] ,IRQS[132] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[131] ,IRQS[131] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[130] ,IRQS[130] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[129] ,IRQS[129] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[128] ,IRQS[128] status" "No interrupt,Interrupt" rgroup.long 0x1D18++0x03 line.long 0x00 "GICD_SPISR5,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[191] ,IRQS[191] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[190] ,IRQS[190] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[189] ,IRQS[189] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[188] ,IRQS[188] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[187] ,IRQS[187] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[186] ,IRQS[186] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[185] ,IRQS[185] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[184] ,IRQS[184] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[183] ,IRQS[183] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[182] ,IRQS[182] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[181] ,IRQS[181] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[180] ,IRQS[180] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[179] ,IRQS[179] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[178] ,IRQS[178] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[177] ,IRQS[177] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[176] ,IRQS[176] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[175] ,IRQS[175] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[174] ,IRQS[174] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[173] ,IRQS[173] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[172] ,IRQS[172] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[171] ,IRQS[171] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[170] ,IRQS[170] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[169] ,IRQS[169] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[168] ,IRQS[168] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[167] ,IRQS[167] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[166] ,IRQS[166] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[165] ,IRQS[165] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[164] ,IRQS[164] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[163] ,IRQS[163] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[162] ,IRQS[162] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[161] ,IRQS[161] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[160] ,IRQS[160] status" "No interrupt,Interrupt" rgroup.long 0x1D1C++0x03 line.long 0x00 "GICD_SPISR6,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[223] ,IRQS[223] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[222] ,IRQS[222] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[221] ,IRQS[221] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[220] ,IRQS[220] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[219] ,IRQS[219] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[218] ,IRQS[218] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[217] ,IRQS[217] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[216] ,IRQS[216] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[215] ,IRQS[215] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[214] ,IRQS[214] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[213] ,IRQS[213] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[212] ,IRQS[212] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[211] ,IRQS[211] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[210] ,IRQS[210] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[209] ,IRQS[209] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[208] ,IRQS[208] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[207] ,IRQS[207] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[206] ,IRQS[206] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[205] ,IRQS[205] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[204] ,IRQS[204] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[203] ,IRQS[203] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[202] ,IRQS[202] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[201] ,IRQS[201] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[200] ,IRQS[200] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[199] ,IRQS[199] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[198] ,IRQS[198] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[197] ,IRQS[197] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[196] ,IRQS[196] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[195] ,IRQS[195] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[194] ,IRQS[194] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[193] ,IRQS[193] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[192] ,IRQS[192] status" "No interrupt,Interrupt" if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long 0x1D20++0x03 line.long 0x00 "GICD_SPISR7,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[255] ,IRQS[255] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[254] ,IRQS[254] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[253] ,IRQS[253] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[252] ,IRQS[252] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[251] ,IRQS[251] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[250] ,IRQS[250] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[249] ,IRQS[249] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[248] ,IRQS[248] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[247] ,IRQS[247] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[246] ,IRQS[246] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[245] ,IRQS[245] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[244] ,IRQS[244] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[243] ,IRQS[243] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[242] ,IRQS[242] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[241] ,IRQS[241] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[240] ,IRQS[240] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[239] ,IRQS[239] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[238] ,IRQS[238] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[237] ,IRQS[237] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[236] ,IRQS[236] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[235] ,IRQS[235] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[234] ,IRQS[234] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[233] ,IRQS[233] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[232] ,IRQS[232] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[231] ,IRQS[231] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[230] ,IRQS[230] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[229] ,IRQS[229] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[228] ,IRQS[228] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[227] ,IRQS[227] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[226] ,IRQS[226] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[225] ,IRQS[225] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[224] ,IRQS[224] status" "No interrupt,Interrupt" rgroup.long 0x1D24++0x03 line.long 0x00 "GICD_SPISR8,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[287] ,IRQS[287] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[286] ,IRQS[286] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[285] ,IRQS[285] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[284] ,IRQS[284] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[283] ,IRQS[283] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[282] ,IRQS[282] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[281] ,IRQS[281] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[280] ,IRQS[280] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[279] ,IRQS[279] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[278] ,IRQS[278] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[277] ,IRQS[277] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[276] ,IRQS[276] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[275] ,IRQS[275] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[274] ,IRQS[274] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[273] ,IRQS[273] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[272] ,IRQS[272] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[271] ,IRQS[271] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[270] ,IRQS[270] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[269] ,IRQS[269] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[268] ,IRQS[268] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[267] ,IRQS[267] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[266] ,IRQS[266] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[265] ,IRQS[265] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[264] ,IRQS[264] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[263] ,IRQS[263] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[262] ,IRQS[262] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[261] ,IRQS[261] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[260] ,IRQS[260] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[259] ,IRQS[259] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[258] ,IRQS[258] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[257] ,IRQS[257] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[256] ,IRQS[256] status" "No interrupt,Interrupt" rgroup.long 0x1D28++0x03 line.long 0x00 "GICD_SPISR9,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[319] ,IRQS[319] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[318] ,IRQS[318] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[317] ,IRQS[317] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[316] ,IRQS[316] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[315] ,IRQS[315] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[314] ,IRQS[314] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[313] ,IRQS[313] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[312] ,IRQS[312] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[311] ,IRQS[311] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[310] ,IRQS[310] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[309] ,IRQS[309] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[308] ,IRQS[308] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[307] ,IRQS[307] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[306] ,IRQS[306] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[305] ,IRQS[305] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[304] ,IRQS[304] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[303] ,IRQS[303] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[302] ,IRQS[302] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[301] ,IRQS[301] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[300] ,IRQS[300] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[299] ,IRQS[299] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[298] ,IRQS[298] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[297] ,IRQS[297] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[296] ,IRQS[296] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[295] ,IRQS[295] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[294] ,IRQS[294] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[293] ,IRQS[293] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[292] ,IRQS[292] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[291] ,IRQS[291] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[290] ,IRQS[290] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[289] ,IRQS[289] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[288] ,IRQS[288] status" "No interrupt,Interrupt" rgroup.long 0x1D2c++0x03 line.long 0x00 "GICD_SPISR10,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[351] ,IRQS[351] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[350] ,IRQS[350] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[349] ,IRQS[349] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[348] ,IRQS[348] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[347] ,IRQS[347] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[346] ,IRQS[346] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[345] ,IRQS[345] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[344] ,IRQS[344] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[343] ,IRQS[343] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[342] ,IRQS[342] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[341] ,IRQS[341] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[340] ,IRQS[340] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[339] ,IRQS[339] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[338] ,IRQS[338] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[337] ,IRQS[337] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[336] ,IRQS[336] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[335] ,IRQS[335] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[334] ,IRQS[334] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[333] ,IRQS[333] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[332] ,IRQS[332] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[331] ,IRQS[331] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[330] ,IRQS[330] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[329] ,IRQS[329] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[328] ,IRQS[328] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[327] ,IRQS[327] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[326] ,IRQS[326] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[325] ,IRQS[325] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[324] ,IRQS[324] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[323] ,IRQS[323] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[322] ,IRQS[322] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[321] ,IRQS[321] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[320] ,IRQS[320] status" "No interrupt,Interrupt" rgroup.long 0x1D30++0x03 line.long 0x00 "GICD_SPISR11,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[383] ,IRQS[383] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[382] ,IRQS[382] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[381] ,IRQS[381] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[380] ,IRQS[380] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[379] ,IRQS[379] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[378] ,IRQS[378] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[377] ,IRQS[377] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[376] ,IRQS[376] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[375] ,IRQS[375] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[374] ,IRQS[374] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[373] ,IRQS[373] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[372] ,IRQS[372] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[371] ,IRQS[371] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[370] ,IRQS[370] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[369] ,IRQS[369] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[368] ,IRQS[368] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[367] ,IRQS[367] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[366] ,IRQS[366] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[365] ,IRQS[365] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[364] ,IRQS[364] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[363] ,IRQS[363] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[362] ,IRQS[362] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[361] ,IRQS[361] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[360] ,IRQS[360] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[359] ,IRQS[359] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[358] ,IRQS[358] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[357] ,IRQS[357] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[356] ,IRQS[356] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[355] ,IRQS[355] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[354] ,IRQS[354] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[353] ,IRQS[353] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[352] ,IRQS[352] status" "No interrupt,Interrupt" rgroup.long 0x1D34++0x03 line.long 0x00 "GICD_SPISR12,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[415] ,IRQS[415] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[414] ,IRQS[414] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[413] ,IRQS[413] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[412] ,IRQS[412] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[411] ,IRQS[411] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[410] ,IRQS[410] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[409] ,IRQS[409] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[408] ,IRQS[408] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[407] ,IRQS[407] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[406] ,IRQS[406] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[405] ,IRQS[405] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[404] ,IRQS[404] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[403] ,IRQS[403] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[402] ,IRQS[402] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[401] ,IRQS[401] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[400] ,IRQS[400] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[399] ,IRQS[399] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[398] ,IRQS[398] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[397] ,IRQS[397] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[396] ,IRQS[396] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[395] ,IRQS[395] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[394] ,IRQS[394] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[393] ,IRQS[393] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[392] ,IRQS[392] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[391] ,IRQS[391] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[390] ,IRQS[390] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[389] ,IRQS[389] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[388] ,IRQS[388] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[387] ,IRQS[387] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[386] ,IRQS[386] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[385] ,IRQS[385] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[384] ,IRQS[384] status" "No interrupt,Interrupt" rgroup.long 0x1D38++0x03 line.long 0x00 "GICD_SPISR13,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[447] ,IRQS[447] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[446] ,IRQS[446] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[445] ,IRQS[445] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[444] ,IRQS[444] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[443] ,IRQS[443] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[442] ,IRQS[442] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[441] ,IRQS[441] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[440] ,IRQS[440] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[439] ,IRQS[439] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[438] ,IRQS[438] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[437] ,IRQS[437] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[436] ,IRQS[436] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[435] ,IRQS[435] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[434] ,IRQS[434] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[433] ,IRQS[433] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[432] ,IRQS[432] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[431] ,IRQS[431] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[430] ,IRQS[430] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[429] ,IRQS[429] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[428] ,IRQS[428] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[427] ,IRQS[427] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[426] ,IRQS[426] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[425] ,IRQS[425] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[424] ,IRQS[424] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[423] ,IRQS[423] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[422] ,IRQS[422] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[421] ,IRQS[421] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[420] ,IRQS[420] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[419] ,IRQS[419] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[418] ,IRQS[418] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[417] ,IRQS[417] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[416] ,IRQS[416] status" "No interrupt,Interrupt" rgroup.long 0x1D3c++0x03 line.long 0x00 "GICD_SPISR14,Shared Peripheral Interrupt Status Register" bitfld.long 0x00 31. " IRQS[479] ,IRQS[479] status" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQS[478] ,IRQS[478] status" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQS[477] ,IRQS[477] status" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQS[476] ,IRQS[476] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQS[475] ,IRQS[475] status" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQS[474] ,IRQS[474] status" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQS[473] ,IRQS[473] status" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQS[472] ,IRQS[472] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " IRQS[471] ,IRQS[471] status" "No interrupt,Interrupt" bitfld.long 0x00 22. " IRQS[470] ,IRQS[470] status" "No interrupt,Interrupt" bitfld.long 0x00 21. " IRQS[469] ,IRQS[469] status" "No interrupt,Interrupt" bitfld.long 0x00 20. " IRQS[468] ,IRQS[468] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " IRQS[467] ,IRQS[467] status" "No interrupt,Interrupt" bitfld.long 0x00 18. " IRQS[466] ,IRQS[466] status" "No interrupt,Interrupt" bitfld.long 0x00 17. " IRQS[465] ,IRQS[465] status" "No interrupt,Interrupt" bitfld.long 0x00 16. " IRQS[464] ,IRQS[464] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " IRQS[463] ,IRQS[463] status" "No interrupt,Interrupt" bitfld.long 0x00 14. " IRQS[462] ,IRQS[462] status" "No interrupt,Interrupt" bitfld.long 0x00 13. " IRQS[461] ,IRQS[461] status" "No interrupt,Interrupt" bitfld.long 0x00 12. " IRQS[460] ,IRQS[460] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " IRQS[459] ,IRQS[459] status" "No interrupt,Interrupt" bitfld.long 0x00 10. " IRQS[458] ,IRQS[458] status" "No interrupt,Interrupt" bitfld.long 0x00 9. " IRQS[457] ,IRQS[457] status" "No interrupt,Interrupt" bitfld.long 0x00 8. " IRQS[456] ,IRQS[456] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " IRQS[455] ,IRQS[455] status" "No interrupt,Interrupt" bitfld.long 0x00 6. " IRQS[454] ,IRQS[454] status" "No interrupt,Interrupt" bitfld.long 0x00 5. " IRQS[453] ,IRQS[453] status" "No interrupt,Interrupt" bitfld.long 0x00 4. " IRQS[452] ,IRQS[452] status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " IRQS[451] ,IRQS[451] status" "No interrupt,Interrupt" bitfld.long 0x00 2. " IRQS[450] ,IRQS[450] status" "No interrupt,Interrupt" bitfld.long 0x00 1. " IRQS[449] ,IRQS[449] status" "No interrupt,Interrupt" bitfld.long 0x00 0. " IRQS[448] ,IRQS[448] status" "No interrupt,Interrupt" endif tree.end textline " " wgroup.long 0x1F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "Send to specified,Send to all,Send to interrupt,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" bitfld.long 0x00 15. " SATT ,SATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 17. group.long 0x1F10++0x03 line.long 0x00 "GICD_CPENDSGIR0,SGI Clear Pending Registers" group.long 0x1F14++0x03 line.long 0x00 "GICD_CPENDSGIR1,SGI Clear Pending Registers" group.long 0x1F18++0x03 line.long 0x00 "GICD_CPENDSGIR2,SGI Clear Pending Registers" group.long 0x1F1C++0x03 line.long 0x00 "GICD_CPENDSGIR3,SGI Clear Pending Registers" textline " " group.long 0x1F20++0x03 line.long 0x00 "GICD_SPENDSGIR0,SGI Set Pending Registers" group.long 0x1F24++0x03 line.long 0x00 "GICD_SPENDSGIR1,SGI Set Pending Registers" group.long 0x1F28++0x03 line.long 0x00 "GICD_SPENDSGIR2,SGI Set Pending Registers" group.long 0x1F2C++0x03 line.long 0x00 "GICD_SPENDSGIR3,SGI Set Pending Registers" textline " " width 12. rgroup.long 0x1FE0++0x03 line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.long 0x1FE4++0x03 line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1FE8++0x03 line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.long 0x00 0.--2. " DEVID ,DevID field" "0,1,2,3,4,5,6,7" rgroup.long 0x1FEC++0x03 line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.long 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1FD0++0x03 line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.long 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hgroup.long 0x1FD4++0x03 hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register" hgroup.long 0x1FD8++0x03 hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register" hgroup.long 0x1FDC++0x03 hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.long 0x1FF0++0x03 line.long 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.long 0x1FF4++0x03 line.long 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.long 0x1FF8++0x03 line.long 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.long 0x1FFC++0x03 line.long 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " group.long 0x2000++0x03 "Interrupt Controller Physical CPU Interface" line.long 0x00 "GICC_ICR,CPU Interface Control Register" bitfld.long 0x00 4. " SBPR ,Secure/Non-secure Binary Point Register for preemption control" "SBPR for Secure/Non-SBPR for Non-Secure,SBPR for Both" textline " " bitfld.long 0x00 3. " FIQEN ,Indicates using of FIQ or IRQ signal for interrupts" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Interrupt acknowledge control" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 1. " ENABLENS ,Global Enable for signalling of Non-secure interrupts" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLES ,Global Enable for signalling of Secure interrupts" "Disabled,Enabled" group.long 0x2004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" group.long 0x2008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7" hgroup.long 0x200C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x2010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access" rgroup.long 0x2014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt" rgroup.long 0x2018++0x03 line.long 0x00 "GICC_HPIR,Highest Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt" group.long 0x201C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long 0x2020++0x03 line.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" bitfld.long 0x00 10.--12. " CPUID ,Number of the CPU interface that made the request" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INT_ID ,Interrupt ID" wgroup.long 0x2024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,Number of the CPU interface that made the request" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INT_ID ,Interrupt ID" rgroup.long 0x2028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,Number of the CPU interface that made the request" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INT_ID ,Interrupt ID" endif group.long 0x20D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" group.long 0x20E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long 0x20FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" else rgroup.long 0x20FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" endif wgroup.long 0x3000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" group.long 0x4000++0x03 "Interrupt Controller Virtual CPU Interface (Hypervisor view)" line.long 0x00 "GICH_HCR,Hypervisor Control Register" rgroup.long 0x4004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long 0x4008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" rgroup.long 0x4010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" rgroup.long 0x4020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" rgroup.long 0x4030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" endif group.long 0x40F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" group.long 0x4100++0x03 line.long 0x00 "GICH_LR0,List Register 0" group.long 0x4104++0x03 line.long 0x00 "GICH_LR1,List Register 1" group.long 0x4108++0x03 line.long 0x00 "GICH_LR2,List Register 2" group.long 0x410C++0x03 line.long 0x00 "GICH_LR3,List Register 3" group.long 0x6000++0x03 "Interrupt Controller Virtual CPU Interface (Virtual Machine View)" line.long 0x00 "GICV_CTLR,VM Control Register" group.long 0x6004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" group.long 0x6008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" rgroup.long 0x600C++0x03 line.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" wgroup.long 0x6010++0x03 line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register" rgroup.long 0x6014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" rgroup.long 0x6018++0x03 line.long 0x00 "GICV_HPIR,VM Highest Pending Interrupt Register" group.long 0x601C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long 0x6020++0x03 line.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" wgroup.long 0x6024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" rgroup.long 0x6028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" endif group.long 0x60D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long 0x60E0++0x03 line.long 0x00 "GICV_NSAPR0,VM Non-Secure Active Priority Register" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long 0x60FC++0x03 line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" else rgroup.long 0x60FC++0x03 line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" endif wgroup.long 0x7000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" tree.end tree.end tree "PFC (Pin Function Controller)" base ad:0xE6060000 width 10. group.long 0x00++0x1B line.long 0x00 "PMMR,LSI Multiplexed Pin Setting Mask Register" bitfld.long 0x00 31. " MPM31 ,Multiplexed Pin Setting Mask 31" "Disabled,Enabled" bitfld.long 0x00 30. " MPM30 ,Multiplexed Pin Setting Mask 30" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MPM29 ,Multiplexed Pin Setting Mask 29" "Disabled,Enabled" bitfld.long 0x00 28. " MPM28 ,Multiplexed Pin Setting Mask 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " MPM27 ,Multiplexed Pin Setting Mask 27" "Disabled,Enabled" bitfld.long 0x00 26. " MPM26 ,Multiplexed Pin Setting Mask 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MPM25 ,Multiplexed Pin Setting Mask 25" "Disabled,Enabled" bitfld.long 0x00 24. " MPM24 ,Multiplexed Pin Setting Mask 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MPM23 ,Multiplexed Pin Setting Mask 23" "Disabled,Enabled" bitfld.long 0x00 22. " MPM22 ,Multiplexed Pin Setting Mask 22" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " MPM21 ,Multiplexed Pin Setting Mask 21" "Disabled,Enabled" bitfld.long 0x00 20. " MPM20 ,Multiplexed Pin Setting Mask 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MPM19 ,Multiplexed Pin Setting Mask 19" "Disabled,Enabled" bitfld.long 0x00 18. " MPM18 ,Multiplexed Pin Setting Mask 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " MPM17 ,Multiplexed Pin Setting Mask 17" "Disabled,Enabled" bitfld.long 0x00 16. " MPM16 ,Multiplexed Pin Setting Mask 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " MPM15 ,Multiplexed Pin Setting Mask 15" "Disabled,Enabled" bitfld.long 0x00 14. " MPM14 ,Multiplexed Pin Setting Mask 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MPM13 ,Multiplexed Pin Setting Mask 13" "Disabled,Enabled" bitfld.long 0x00 12. " MPM12 ,Multiplexed Pin Setting Mask 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " MPM11 ,Multiplexed Pin Setting Mask 11" "Disabled,Enabled" bitfld.long 0x00 10. " MPM10 ,Multiplexed Pin Setting Mask 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MPM9 ,Multiplexed Pin Setting Mask 9" "Disabled,Enabled" bitfld.long 0x00 8. " MPM8 ,Multiplexed Pin Setting Mask 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MPM7 ,Multiplexed Pin Setting Mask 7" "Disabled,Enabled" bitfld.long 0x00 6. " MPM6 ,Multiplexed Pin Setting Mask 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MPM5 ,Multiplexed Pin Setting Mask 5" "Disabled,Enabled" bitfld.long 0x00 4. " MPM4 ,Multiplexed Pin Setting Mask 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MPM3 ,Multiplexed Pin Setting Mask 3" "Disabled,Enabled" bitfld.long 0x00 2. " MPM2 ,Multiplexed Pin Setting Mask 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MPM1 ,Multiplexed Pin Setting Mask 1" "Disabled,Enabled" bitfld.long 0x00 0. " MPM0 ,Multiplexed Pin Setting Mask 0" "Disabled,Enabled" line.long 0x04 "GPSR0,GPIO/Peripheral Function Select Register 0" bitfld.long 0x04 31. " GP0[31] ,GPIO/Peripheral Function Select 31" "GP-0-31,IP3[17:15]" bitfld.long 0x04 30. " GP0[30] ,GPIO/Peripheral Function Select 30" "GP-0-30,IP3[14:12]" textline " " bitfld.long 0x04 29. " GP0[29] ,GPIO/Peripheral Function Select 29" "GP-0-29,IP3[11:8]" bitfld.long 0x04 28. " GP0[28] ,GPIO/Peripheral Function Select 28" "GP-0-28,IP3[7:4]" textline " " bitfld.long 0x04 27. " GP0[27] ,GPIO/Peripheral Function Select 27" "GP-0-27,IP3[3:0]" bitfld.long 0x04 26. " GP0[26] ,GPIO/Peripheral Function Select 26" "GP-0-26,IP2[28:26]" textline " " bitfld.long 0x04 25. " GP0[25] ,GPIO/Peripheral Function Select 25" "GP-0-25,IP2[25:22]" bitfld.long 0x04 24. " GP0[24] ,GPIO/Peripheral Function Select 24" "GP-0-24,IP2[21:18]" textline " " bitfld.long 0x04 23. " GP0[23] ,GPIO/Peripheral Function Select 23" "GP-0-23,IP2[17:15]" bitfld.long 0x04 22. " GP0[22] ,GPIO/Peripheral Function Select 22" "GP-0-22,IP2[14:12]" textline " " bitfld.long 0x04 21. " GP0[21] ,GPIO/Peripheral Function Select 21" "GP-0-21,IP2[11:9]" bitfld.long 0x04 20. " GP0[20] ,GPIO/Peripheral Function Select 20" "GP-0-20,IP2[8:6]" textline " " bitfld.long 0x04 19. " GP0[19] ,GPIO/Peripheral Function Select 19" "GP-0-19,IP2[5:3]" bitfld.long 0x04 18. " GP0[18] ,GPIO/Peripheral Function Select 18" "GP-0-18,IP2[2:0]" textline " " bitfld.long 0x04 17. " GP0[17] ,GPIO/Peripheral Function Select 17" "GP-0-17,IP1[29:28]" bitfld.long 0x04 16. " GP0[16] ,GPIO/Peripheral Function Select 16" "GP-0-16,IP1[27:26]" textline " " bitfld.long 0x04 15. " GP0[15] ,GPIO/Peripheral Function Select 15" "GP-0-15,IP1[25:22]" bitfld.long 0x04 14. " GP0[14] ,GPIO/Peripheral Function Select 14" "GP-0-14,IP1[21:18]" textline " " bitfld.long 0x04 13. " GP0[13] ,GPIO/Peripheral Function Select 13" "GP-0-13,IP1[17:15]" bitfld.long 0x04 12. " GP0[12] ,GPIO/Peripheral Function Select 12" "GP-0-12,IP1[14:12]" textline " " bitfld.long 0x04 11. " GP0[11] ,GPIO/Peripheral Function Select 11" "GP-0-11,IP1[11:8]" bitfld.long 0x04 10. " GP0[10] ,GPIO/Peripheral Function Select 10" "GP-0-10,IP1[7:4]" textline " " bitfld.long 0x04 9. " GP0[9] ,GPIO/Peripheral Function Select 9" "GP-0-9,IP1[3:0]" bitfld.long 0x04 8. " GP0[8] ,GPIO/Peripheral Function Select 8" "GP-0-8,IP0[30:27]" textline " " bitfld.long 0x04 7. " GP0[7] ,GPIO/Peripheral Function Select 7" "GP-0-7,IP0[26:23]" bitfld.long 0x04 6. " GP0[6] ,GPIO/Peripheral Function Select 6" "GP-0-6,IP0[22:20]" textline " " bitfld.long 0x04 5. " GP0[5] ,GPIO/Peripheral Function Select 5" "GP-0-5,IP0[19:16]" bitfld.long 0x04 4. " GP0[4] ,GPIO/Peripheral Function Select 4" "GP-0-4,IP0[15:12]" textline " " bitfld.long 0x04 3. " GP0[3] ,GPIO/Peripheral Function Select 3" "GP-0-3,IP0[11:9]" bitfld.long 0x04 2. " GP0[2] ,GPIO/Peripheral Function Select 2" "GP-0-2,IP0[8:6]" textline " " bitfld.long 0x04 1. " GP0[1] ,GPIO/Peripheral Function Select 1" "GP-0-1,IP0[5:3]" bitfld.long 0x04 0. " GP0[0] ,GPIO/Peripheral Function Select 0" "GP-0-0,IP0[2:0]" line.long 0x08 "GPSR1,GPIO/Peripheral Function Select Register 1" bitfld.long 0x08 29. " GP1[29] ,GPIO/Peripheral Function Select 29" "GP-1-29,IP6[13:11]" bitfld.long 0x08 28. " GP1[28] ,GPIO/Peripheral Function Select 28" "GP-1-28,IP6[10:9]" textline " " bitfld.long 0x08 27. " GP1[27] ,GPIO/Peripheral Function Select 27" "GP-1-27,IP6[8:6]" bitfld.long 0x08 26. " GP1[26] ,GPIO/Peripheral Function Select 26" "GP-1-26,IP6[5:3]" textline " " bitfld.long 0x08 25. " GP1[25] ,GPIO/Peripheral Function Select 25" "GP-1-25,IP6[2:0]" bitfld.long 0x08 24. " GP1[24] ,GPIO/Peripheral Function Select 24" "GP-1-24,IP5[29:27]" textline " " bitfld.long 0x08 23. " GP1[23] ,GPIO/Peripheral Function Select 23" "GP-1-23,IP5[26:24]" bitfld.long 0x08 22. " GP1[22] ,GPIO/Peripheral Function Select 22" "GP-1-22,IP5[23:21]" textline " " bitfld.long 0x08 21. " GP1[21] ,GPIO/Peripheral Function Select 21" "GP-1-21,IP5[20:18]" bitfld.long 0x08 20. " GP1[20] ,GPIO/Peripheral Function Select 20" "GP-1-20,IP5[17:15]" textline " " bitfld.long 0x08 19. " GP1[19] ,GPIO/Peripheral Function Select 19" "GP-1-19,IP5[14:13]" bitfld.long 0x08 18. " GP1[18] ,GPIO/Peripheral Function Select 18" "GP-1-18,IP5[12:10]" textline " " bitfld.long 0x08 17. " GP1[17] ,GPIO/Peripheral Function Select 17" "GP-1-17,IP5[9:6]" bitfld.long 0x08 16. " GP1[16] ,GPIO/Peripheral Function Select 16" "GP-1-16,IP5[5:3]" textline " " bitfld.long 0x08 15. " GP1[15] ,GPIO/Peripheral Function Select 15" "GP-1-15,IP5[2:0]" bitfld.long 0x08 14. " GP1[14] ,GPIO/Peripheral Function Select 14" "GP-1-14,IP4[29:27]" textline " " bitfld.long 0x08 13. " GP1[13] ,GPIO/Peripheral Function Select 13" "GP-1-13,IP4[26:24]" bitfld.long 0x08 12. " GP1[12] ,GPIO/Peripheral Function Select 12" "GP-1-12,IP4[23:21]" textline " " bitfld.long 0x08 11. " GP1[11] ,GPIO/Peripheral Function Select 11" "GP-1-11,IP4[20:18]" bitfld.long 0x08 10. " GP1[10] ,GPIO/Peripheral Function Select 10" "GP-1-10,IP4[17:15]" textline " " bitfld.long 0x08 9. " GP1[9] ,GPIO/Peripheral Function Select 9" "GP-1-9,IP4[14:12]" bitfld.long 0x08 8. " GP1[8] ,GPIO/Peripheral Function Select 8" "GP-1-8,IP4[11:9]" textline " " bitfld.long 0x08 7. " GP1[7] ,GPIO/Peripheral Function Select 7" "GP-1-7,IP4[8:6]" bitfld.long 0x08 6. " GP1[6] ,GPIO/Peripheral Function Select 6" "GP-1-6,IP4[5:3]" textline " " bitfld.long 0x08 5. " GP1[5] ,GPIO/Peripheral Function Select 5" "GP-1-5,IP4[2:0]" bitfld.long 0x08 4. " GP1[4] ,GPIO/Peripheral Function Select 4" "GP-1-4,IP3[31:29]" textline " " bitfld.long 0x08 3. " GP1[3] ,GPIO/Peripheral Function Select 3" "GP-1-3,IP3[28:26]" bitfld.long 0x08 2. " GP1[2] ,GPIO/Peripheral Function Select 2" "GP-1-2,IP3[25:23]" textline " " bitfld.long 0x08 1. " GP1[1] ,GPIO/Peripheral Function Select 1" "GP-1-1,IP3[22:20]" bitfld.long 0x08 0. " GP1[0] ,GPIO/Peripheral Function Select 0" "GP-1-0,IP3[19:18]" line.long 0x0C "GPSR2,GPIO/Peripheral Function Select Register 2" bitfld.long 0x0C 29. " GP2[29] ,GPIO/Peripheral Function Select 29" "GP-2-29,IP7[15:13]" bitfld.long 0x0C 28. " GP2[28] ,GPIO/Peripheral Function Select 28" "GP-2-28,IP7[12:10]" textline " " bitfld.long 0x0C 27. " GP2[27] ,GPIO/Peripheral Function Select 27" "GP-2-27,IP7[9:8]" bitfld.long 0x0C 26. " GP2[26] ,GPIO/Peripheral Function Select 26" "GP-2-26,IP7[7:6]" textline " " bitfld.long 0x0C 25. " GP2[25] ,GPIO/Peripheral Function Select 25" "GP-2-25,IP7[5:3]" bitfld.long 0x0C 24. " GP2[24] ,GPIO/Peripheral Function Select 24" "GP-2-24,IP7[2:0]" textline " " bitfld.long 0x0C 23. " GP2[23] ,GPIO/Peripheral Function Select 23" "GP-2-23,IP6[31:29]" bitfld.long 0x0C 22. " GP2[22] ,GPIO/Peripheral Function Select 22" "GP-2-22,IP6[28:26]" textline " " bitfld.long 0x0C 21. " GP2[21] ,GPIO/Peripheral Function Select 21" "GP-2-21,IP6[25:23]" bitfld.long 0x0C 20. " GP2[20] ,GPIO/Peripheral Function Select 20" "GP-2-20,IP6[22:20]" textline " " bitfld.long 0x0C 19. " GP2[19] ,GPIO/Peripheral Function Select 19" "GP-2-19,IP6[19:17]" bitfld.long 0x0C 18. " GP2[18] ,GPIO/Peripheral Function Select 18" "GP-2-18,IP6[16:14]" textline " " bitfld.long 0x0C 17. " GP2[17] ,GPIO/Peripheral Function Select 17" "GP-2-17,VI1_DATA7_VI1_B7" bitfld.long 0x0C 16. " GP2[16] ,GPIO/Peripheral Function Select 16" "GP-2-16,IP8[27]" textline " " bitfld.long 0x0C 15. " GP2[15] ,GPIO/Peripheral Function Select 15" "GP-2-15,IP8[26]" bitfld.long 0x0C 14. " GP2[14] ,GPIO/Peripheral Function Select 14" "GP-2-14,IP8[25:24]" textline " " bitfld.long 0x0C 13. " GP2[13] ,GPIO/Peripheral Function Select 13" "GP-2-13,IP8[23:22]" bitfld.long 0x0C 12. " GP2[12] ,GPIO/Peripheral Function Select 12" "GP-2-12,IP8[21:20]" textline " " bitfld.long 0x0C 11. " GP2[11] ,GPIO/Peripheral Function Select 11" "GP-2-11,IP8[19:18]" bitfld.long 0x0C 10. " GP2[10] ,GPIO/Peripheral Function Select 10" "GP-2-10,IP8[17:16]" textline " " bitfld.long 0x0C 9. " GP2[9] ,GPIO/Peripheral Function Select 9" "GP-2-9,IP8[15:14]" bitfld.long 0x0C 8. " GP2[8] ,GPIO/Peripheral Function Select 8" "GP-2-8,IP8[13:12]" textline " " bitfld.long 0x0C 7. " GP2[7] ,GPIO/Peripheral Function Select 7" "GP-2-7,IP8[11:10]" bitfld.long 0x0C 6. " GP2[6] ,GPIO/Peripheral Function Select 6" "GP-2-6,IP8[9:8]" textline " " bitfld.long 0x0C 5. " GP2[5] ,GPIO/Peripheral Function Select 5" "GP-2-5,IP8[7:6]" bitfld.long 0x0C 4. " GP2[4] ,GPIO/Peripheral Function Select 4" "GP-2-4,IP8[5:4]" textline " " bitfld.long 0x0C 3. " GP2[3] ,GPIO/Peripheral Function Select 3" "GP-2-3,IP8[3:2]" bitfld.long 0x0C 2. " GP2[2] ,GPIO/Peripheral Function Select 2" "GP-2-2,IP8[1:0]" textline " " bitfld.long 0x0C 1. " GP2[1] ,GPIO/Peripheral Function Select 1" "GP-2-1,IP7[30:29]" bitfld.long 0x0C 0. " GP2[0] ,GPIO/Peripheral Function Select 0" "GP-2-0,IP7[28:27]" line.long 0x10 "GPSR3,GPIO/Peripheral Function Select Register 3" bitfld.long 0x10 31. " GP3[31] ,GPIO/Peripheral Function Select 31" "GP-3-31,IP11[21:18]" bitfld.long 0x10 30. " GP3[30] ,GPIO/Peripheral Function Select 30" "GP-3-30,IP11[17:15]" textline " " bitfld.long 0x10 29. " GP3[29] ,GPIO/Peripheral Function Select 29" "GP-3-29,IP11[14:13]" bitfld.long 0x10 28. " GP3[28] ,GPIO/Peripheral Function Select 28" "GP-3-28,IP11[12:11]" textline " " bitfld.long 0x10 27. " GP3[27] ,GPIO/Peripheral Function Select 27" "GP-3-27,IP11[10:9]" bitfld.long 0x10 26. " GP3[26] ,GPIO/Peripheral Function Select 26" "GP-3-26,IP11[8:7]" textline " " bitfld.long 0x10 25. " GP3[25] ,GPIO/Peripheral Function Select 25" "GP-3-25,IP11[6:5]" bitfld.long 0x10 24. " GP3[24] ,GPIO/Peripheral Function Select 24" "GP-3-24,IP11[4]" textline " " bitfld.long 0x10 23. " GP3[23] ,GPIO/Peripheral Function Select 23" "GP-3-23,IP11[3:0]" bitfld.long 0x10 22. " GP3[22] ,GPIO/Peripheral Function Select 22" "GP-3-22,IP10[29:26]" textline " " bitfld.long 0x10 21. " GP3[21] ,GPIO/Peripheral Function Select 21" "GP-3-21,IP10[25:23]" bitfld.long 0x10 20. " GP3[20] ,GPIO/Peripheral Function Select 20" "GP-3-20,IP10[22:19]" textline " " bitfld.long 0x10 19. " GP3[19] ,GPIO/Peripheral Function Select 19" "GP-3-19,IP10[18:15]" bitfld.long 0x10 18. " GP3[18] ,GPIO/Peripheral Function Select 18" "GP-3-18,IP10[14:11]" textline " " bitfld.long 0x10 17. " GP3[17] ,GPIO/Peripheral Function Select 17" "GP-3-17,IP10[10:7]" bitfld.long 0x10 16. " GP3[16] ,GPIO/Peripheral Function Select 16" "GP-3-16,IP10[6:4]" textline " " bitfld.long 0x10 15. " GP3[15] ,GPIO/Peripheral Function Select 15" "GP-3-15,IP10[3:0]" bitfld.long 0x10 14. " GP3[14] ,GPIO/Peripheral Function Select 14" "GP-3-14,IP9[31:28]" textline " " bitfld.long 0x10 13. " GP3[13] ,GPIO/Peripheral Function Select 13" "GP-3-13,IP9[27:26]" bitfld.long 0x10 12. " GP3[12] ,GPIO/Peripheral Function Select 12" "GP-3-12,IP9[25:24]" textline " " bitfld.long 0x10 11. " GP3[11] ,GPIO/Peripheral Function Select 11" "GP-3-11,IP9[23:22]" bitfld.long 0x10 10. " GP3[10] ,GPIO/Peripheral Function Select 10" "GP-3-10,IP9[21:20]" textline " " bitfld.long 0x10 9. " GP3[9] ,GPIO/Peripheral Function Select 9" "GP-3-9,IP9[19:18]" bitfld.long 0x10 8. " GP3[8] ,GPIO/Peripheral Function Select 8" "GP-3-8,IP9[17:16]" textline " " bitfld.long 0x10 7. " GP3[7] ,GPIO/Peripheral Function Select 7" "GP-3-7,IP9[15:12]" bitfld.long 0x10 6. " GP3[6] ,GPIO/Peripheral Function Select 6" "GP-3-6,IP9[11:8]" textline " " bitfld.long 0x10 5. " GP3[5] ,GPIO/Peripheral Function Select 5" "GP-3-5,IP9[7:6]" bitfld.long 0x10 4. " GP3[4] ,GPIO/Peripheral Function Select 4" "GP-3-4,IP9[5:4]" textline " " bitfld.long 0x10 3. " GP3[3] ,GPIO/Peripheral Function Select 3" "GP-3-3,IP9[3:2]" bitfld.long 0x10 2. " GP3[2] ,GPIO/Peripheral Function Select 2" "GP-3-2,IP9[1:0]" textline " " bitfld.long 0x10 1. " GP3[1] ,GPIO/Peripheral Function Select 1" "GP-3-1,IP8[30:29]" bitfld.long 0x10 0. " GP3[0] ,GPIO/Peripheral Function Select 0" "GP-3-0,IP8[28]" line.long 0x14 "GPSR4,GPIO/Peripheral Function Select Register 4" bitfld.long 0x14 31. " GP4[31] ,GPIO/Peripheral Function Select 31" "GP-4-31,IP14[18:16]" bitfld.long 0x14 30. " GP4[30] ,GPIO/Peripheral Function Select 30" "GP-4-30,IP14[15:12]" textline " " bitfld.long 0x14 29. " GP4[29] ,GPIO/Peripheral Function Select 29" "GP-4-29,IP14[11:9]" bitfld.long 0x14 28. " GP4[28] ,GPIO/Peripheral Function Select 28" "GP-4-28,IP14[8:6]" textline " " bitfld.long 0x14 27. " GP4[27] ,GPIO/Peripheral Function Select 27" "GP-4-27,IP14[5:3]" bitfld.long 0x14 26. " GP4[26] ,GPIO/Peripheral Function Select 26" "GP-4-26,IP14[2:0]" textline " " bitfld.long 0x14 25. " GP4[25] ,GPIO/Peripheral Function Select 25" "GP-4-25,IP13[30:29]" bitfld.long 0x14 24. " GP4[24] ,GPIO/Peripheral Function Select 24" "GP-4-24,IP13[28:26]" textline " " bitfld.long 0x14 23. " GP4[23] ,GPIO/Peripheral Function Select 23" "GP-4-23,IP13[25:23]" bitfld.long 0x14 22. " GP4[22] ,GPIO/Peripheral Function Select 22" "GP-4-22,IP13[22:19]" textline " " bitfld.long 0x14 21. " GP4[21] ,GPIO/Peripheral Function Select 21" "GP-4-21,IP13[18:16]" bitfld.long 0x14 20. " GP4[20] ,GPIO/Peripheral Function Select 20" "GP-4-20,IP13[15:13]" textline " " bitfld.long 0x14 19. " GP4[19] ,GPIO/Peripheral Function Select 19" "GP-4-19,IP13[12:10]" bitfld.long 0x14 18. " GP4[18] ,GPIO/Peripheral Function Select 18" "GP-4-18,IP13[9:7]" textline " " bitfld.long 0x14 17. " GP4[17] ,GPIO/Peripheral Function Select 17" "GP-4-17,IP13[6:3]" bitfld.long 0x14 16. " GP4[16] ,GPIO/Peripheral Function Select 16" "GP-4-16,IP13[2:0]" textline " " bitfld.long 0x14 15. " GP4[15] ,GPIO/Peripheral Function Select 15" "GP-4-15,IP12[30:28]" bitfld.long 0x14 14. " GP4[14] ,GPIO/Peripheral Function Select 14" "GP-4-14,IP12[27:25]" textline " " bitfld.long 0x14 13. " GP4[13] ,GPIO/Peripheral Function Select 13" "GP-4-13,IP12[24:23]" bitfld.long 0x14 12. " GP4[12] ,GPIO/Peripheral Function Select 12" "GP-4-12,IP12[22:20]" textline " " bitfld.long 0x14 11. " GP4[11] ,GPIO/Peripheral Function Select 11" "GP-4-11,IP12[19:17]" bitfld.long 0x14 10. " GP4[10] ,GPIO/Peripheral Function Select 10" "GP-4-10,IP12[16:14]" textline " " bitfld.long 0x14 9. " GP4[9] ,GPIO/Peripheral Function Select 9" "GP-4-9,IP12[13:11]" bitfld.long 0x14 8. " GP4[8] ,GPIO/Peripheral Function Select 8" "GP-4-8,IP12[10:8]" textline " " bitfld.long 0x14 7. " GP4[7] ,GPIO/Peripheral Function Select 7" "GP-4-7,IP12[7:6]" bitfld.long 0x14 6. " GP4[6] ,GPIO/Peripheral Function Select 6" "GP-4-6,IP12[5:4]" textline " " bitfld.long 0x14 5. " GP4[5] ,GPIO/Peripheral Function Select 5" "GP-4-5,IP12[3:2]" bitfld.long 0x14 4. " GP4[4] ,GPIO/Peripheral Function Select 4" "GP-4-4,IP12[1:0]" textline " " bitfld.long 0x14 3. " GP4[3] ,GPIO/Peripheral Function Select 3" "GP-4-3,IP11[31:30]" bitfld.long 0x14 2. " GP4[2] ,GPIO/Peripheral Function Select 2" "GP-4-2,IP11[29:27]" textline " " bitfld.long 0x14 1. " GP4[1] ,GPIO/Peripheral Function Select 1" "GP-4-1,IP11[26:24]" bitfld.long 0x14 0. " GP4[0] ,GPIO/Peripheral Function Select 0" "GP-4-0,IP11[23:22]" line.long 0x18 "GPSR5,GPIO/Peripheral Function Select Register 5" bitfld.long 0x18 31. " GP5[31] ,GPIO/Peripheral Function Select 31" "GP-5-31,IP7[24:22]" bitfld.long 0x18 30. " GP5[30] ,GPIO/Peripheral Function Select 30" "GP-5-30,IP7[21:19]" textline " " bitfld.long 0x18 29. " GP5[29] ,GPIO/Peripheral Function Select 29" "GP-5-29,IP7[18:16]" bitfld.long 0x18 28. " GP5[28] ,GPIO/Peripheral Function Select 28" "GP-5-28,DU_DOTCLKIN2" textline " " bitfld.long 0x18 27. " GP5[27] ,GPIO/Peripheral Function Select 27" "GP-5-27,IP7[26:25]" bitfld.long 0x18 26. " GP5[26] ,GPIO/Peripheral Function Select 26" "GP-5-26,DU_DOTCLKIN0" textline " " bitfld.long 0x18 25. " GP5[25] ,GPIO/Peripheral Function Select 25" "GP-5-25,AVS2" bitfld.long 0x18 24. " GP5[24] ,GPIO/Peripheral Function Select 24" "GP-5-24,AVS1" textline " " bitfld.long 0x18 23. " GP5[23] ,GPIO/Peripheral Function Select 23" "GP-5-23,USB2_OVC" bitfld.long 0x18 22. " GP5[22] ,GPIO/Peripheral Function Select 22" "GP-5-22,USB2_PWEN" textline " " bitfld.long 0x18 21. " GP5[21] ,GPIO/Peripheral Function Select 21" "GP-5-21,IP16[7]" bitfld.long 0x18 20. " GP5[20] ,GPIO/Peripheral Function Select 20" "GP-5-20,IP16[6]" textline " " bitfld.long 0x18 19. " GP5[19] ,GPIO/Peripheral Function Select 19" "GP-5-19,USB0_OVC_VBUS" bitfld.long 0x18 18. " GP5[18] ,GPIO/Peripheral Function Select 18" "GP-5-18,USB0_PWEN" textline " " bitfld.long 0x18 17. " GP5[17] ,GPIO/Peripheral Function Select 17" "GP-5-17,IP16[5:3]" bitfld.long 0x18 16. " GP5[16] ,GPIO/Peripheral Function Select 16" "GP-5-16,IP16[2:0]" textline " " bitfld.long 0x18 15. " GP5[15] ,GPIO/Peripheral Function Select 15" "GP-5-15,IP15[29:28]" bitfld.long 0x18 14. " GP5[14] ,GPIO/Peripheral Function Select 14" "GP-5-14,IP15[27:26]" textline " " bitfld.long 0x18 13. " GP5[13] ,GPIO/Peripheral Function Select 13" "GP-5-13,IP15[25:23]" bitfld.long 0x18 12. " GP5[12] ,GPIO/Peripheral Function Select 12" "GP-5-12,IP15[22:20]" textline " " bitfld.long 0x18 11. " GP5[11] ,GPIO/Peripheral Function Select 11" "GP-5-11,IP15[19:18]" bitfld.long 0x18 10. " GP5[10] ,GPIO/Peripheral Function Select 10" "GP-5-10,IP15[17:16]" textline " " bitfld.long 0x18 9. " GP5[9] ,GPIO/Peripheral Function Select 9" "GP-5-9,IP15[15:14]" bitfld.long 0x18 8. " GP5[8] ,GPIO/Peripheral Function Select 8" "GP-5-8,IP15[13:12]" textline " " bitfld.long 0x18 7. " GP5[7] ,GPIO/Peripheral Function Select 7" "GP-5-7,IP15[11:9]" bitfld.long 0x18 6. " GP5[6] ,GPIO/Peripheral Function Select 6" "GP-5-6,IP15[8:6]" textline " " bitfld.long 0x18 5. " GP5[5] ,GPIO/Peripheral Function Select 5" "GP-5-5,IP15[5:3]" bitfld.long 0x18 4. " GP5[4] ,GPIO/Peripheral Function Select 4" "GP-5-4,IP15[2:0]" textline " " bitfld.long 0x18 3. " GP5[3] ,GPIO/Peripheral Function Select 3" "GP-5-3,IP14[30:28]" bitfld.long 0x18 2. " GP5[2] ,GPIO/Peripheral Function Select 2" "GP-5-2,IP14[27:25]" textline " " bitfld.long 0x18 1. " GP5[1] ,GPIO/Peripheral Function Select 1" "GP-5-1,IP14[24:22]" bitfld.long 0x18 0. " GP5[0] ,GPIO/Peripheral Function Select 0" "GP-5-0,IP14[21:19]" group.long 0x20++0x3F line.long 0x00 "IPSR0,Peripheral Function Select Register 0" bitfld.long 0x00 27.--30. " IP0[30:27] ,Peripheral Function Select 8" "D8,SCIFA1_SCK_C,AVB_TXD0,,VI0_G0,VI0_G0_B,VI2_DATA0_VI2_B0,?..." bitfld.long 0x00 23.--26. " IP0[26:23] ,Peripheral Function Select 7" "D7,AD_DI_B,IIC2_SDA_C,VI3_DATA7,VI0_R3,VI0_R3_B,I2C2_SDA_C,TCLK1,?..." textline " " bitfld.long 0x00 20.--22. " IP0[22:20] ,Peripheral Function Select 6" "D6,IIC2_SCL_C,VI3_DATA6,VI0_R2,VI0_R2_B,I2C2_SCL_C,?..." bitfld.long 0x00 16.--19. " IP0[19:16] ,Peripheral Function Select 5" "D5,SCIFB1_TXD_F,SCIFB0_TXD_C,VI3_DATA5,VI0_R1,VI0_R1_B,TX0_B,?..." textline " " bitfld.long 0x00 12.--15. " IP0[15:12] ,Peripheral Function Select 4" "D4,SCIFB1_RXD_F,SCIFB0_RXD_C,VI3_DATA4,VI0_R0,VI0_R0_B,RX0_B,?..." bitfld.long 0x00 9.--11. " IP0[11:9] ,Peripheral Function Select 3" "D3,MSIOF3_TXD_B,VI3_DATA3,VI0_G7,VI0_G7_B,?..." textline " " bitfld.long 0x00 6.--8. " IP0[8:6] ,Peripheral Function Select 2" "D2,MSIOF3_RXD_B,VI3_DATA2,VI0_G6,VI0_G6_B,?..." bitfld.long 0x00 3.--5. " IP0[5:3] ,Peripheral Function Select 1" "D1,MSIOF3_SYNC_B,VI3_DATA1,VI0_G5,VI0_G5_B,?..." textline " " bitfld.long 0x00 0.--2. " IP0[2:0] ,Peripheral Function Select 0" "D0,MSIOF3_SCK_B,VI3_DATA0,VI0_G4,VI0_G4_B,?..." line.long 0x04 "IPSR1,Peripheral Function Select Register 1" bitfld.long 0x04 28.--29. " IP1[29:28] ,Peripheral Function Select 8" "PWM4,?..." bitfld.long 0x04 26.--27. " IP1[27:26] ,Peripheral Function Select 7" "PWM3,?..." textline " " bitfld.long 0x04 22.--25. " IP1[25:22] ,Peripheral Function Select 6" "D15,SCIFB1_TXD_C,AVB_TXD7,TX1_B,VI0_FIELD,VI0_FIELD_B,VI2_DATA7_VI2_B7,?..." bitfld.long 0x04 18.--21. " IP1[21:18] ,Peripheral Function Select 5" "D14,SCIFB1_RXD_C,AVB_TXD6,RX1_B,VI0_CLKENB,VI0_CLKENB_B,VI2_DATA6_VI2_B6,?..." textline " " bitfld.long 0x04 15.--17. " IP1[17:15] ,Peripheral Function Select 4" "D13,AVB_TXD5,VI0_VSYNC_N,VI0_VSYNC_N_B,VI2_DATA5_VI2_B5,?..." bitfld.long 0x04 12.--14. " IP1[14:12] ,Peripheral Function Select 3" "D12,SCIFA1_RTS_N_C,AVB_TXD4,VI0_HSYNC_N,VI0_HSYNC_N_B,VI2_DATA4_VI2_B4,?..." textline " " bitfld.long 0x04 8.--11. " IP1[11:8] ,Peripheral Function Select 2" "D11,SCIFA1_CTS_N_C,AVB_TXD3,,VI0_G3,VI0_G3_B,VI2_DATA3_VI2_B3,?..." bitfld.long 0x04 4.--7. " IP1[7:4] ,Peripheral Function Select 1" "D10,SCIFA1_TXD_C,AVB_TXD2,,VI0_G2,VI0_G2_B,VI2_DATA2_VI2_B2,?..." textline " " bitfld.long 0x04 0.--3. " IP1[3:0] ,Peripheral Function Select 0" "D9,SCIFA1_RXD_C,AVB_TXD1,,VI0_G1,VI0_G1_B,VI2_DATA1_VI2_B1,?..." line.long 0x08 "IPSR2,Peripheral Function Select Register 2" bitfld.long 0x08 26.--28. " IP2[28:26] ,Peripheral Function Select 8" "A10,SSI_SDATA5_B,MSIOF2_SYNC,VI0_R6,VI0_R6_B,VI2_DATA2_VI2_B2_B,?..." bitfld.long 0x08 22.--25. " IP2[25:22] ,Peripheral Function Select 7" "A9,SCIFA1_CTS_N_B,SSI_WS5_B,VI0_R5,VI0_R5_B,SCIFB2_TXD_C,TX2_B,VI2_DATA1_VI2_B1_B,?..." textline " " bitfld.long 0x08 18.--21. " IP2[21:18] ,Peripheral Function Select 6" "A8,SCIFA1_RXD_B,SSI_SCK5_B,VI0_R4,VI0_R4_B,SCIFB2_RXD_C,RX2_B,VI2_DATA0_VI2_B0_B,?..." bitfld.long 0x08 15.--17. " IP2[17:15] ,Peripheral Function Select 5" "A7,SCIFA1_SCK_B,AUDIO_CLKOUT_B,TPU0TO3,?..." textline " " bitfld.long 0x08 12.--14. " IP2[14:12] ,Peripheral Function Select 4" "A6,SCIFA1_RTS_N_B,TPU0TO2,?..." bitfld.long 0x08 9.--11. " IP2[11:9] ,Peripheral Function Select 3" "A5,SCIFA1_TXD_B,TPU0TO1,?..." textline " " bitfld.long 0x08 6.--8. " IP2[8:6] ,Peripheral Function Select 2" "A4,MSIOF1_TXD_B,TPU0TO0,?..." bitfld.long 0x08 3.--5. " IP2[5:3] ,Peripheral Function Select 1" "A3,PWM6,MSIOF1_SS2_B,?..." textline " " bitfld.long 0x08 0.--2. " IP2[2:0] ,Peripheral Function Select 0" "A2,PWM5,MSIOF1_SS1_B,?..." line.long 0x0C "IPSR3,Peripheral Function Select Register 3" bitfld.long 0x0C 29.--31. " IP3[31:29] ,Peripheral Function Select 9" "A20,SPCLK,VI1_R3,VI1_R3_B,VI2_G4,?..." bitfld.long 0x0C 26.--28. " IP3[28:26] ,Peripheral Function Select 8" "A19,AD_NCS_N_B,ATACS01_N,EX_WAIT0_B,?..." textline " " bitfld.long 0x0C 23.--25. " IP3[25:23] ,Peripheral Function Select 7" "A18,AD_CLK_B,ATAG1_N,?..." bitfld.long 0x0C 20.--22. " IP3[22:20] ,Peripheral Function Select 6" "A17,AD_DO_B,ATADIR1_N,?..." textline " " bitfld.long 0x0C 18.--19. " IP3[19:18] ,Peripheral Function Select 5" "A16,ATAWR1_N,?..." bitfld.long 0x0C 15.--17. " IP3[17:15] ,Peripheral Function Select 4" "A15,SCIFB2_SCK_B,ATARD1_N,MSIOF2_SS2,?..." textline " " bitfld.long 0x0C 12.--14. " IP3[14:12] ,Peripheral Function Select 3" "A14,SCIFB2_TXD_B,ATACS11_N,MSIOF2_SS1,?..." bitfld.long 0x0C 8.--11. " IP3[11:8] ,Peripheral Function Select 2" "A13,SCIFB2_RTS_N_B,EX_WAIT2,MSIOF2_RXD,VI1_R2,VI1_R2_B,VI2_G2,VI2_DATA5_VI2_B5_B,?..." textline " " bitfld.long 0x0C 4.--7. " IP3[7:4] ,Peripheral Function Select 1" "A12,SCIFB2_RXD_B,MSIOF2_TXD,VI1_R1,VI1_R1_B,VI2_G1,VI2_DATA4_VI2_B4_B,?..." bitfld.long 0x0C 0.--3. " IP3[3:0] ,Peripheral Function Select 0" "A11,SCIFB2_CTS_N_B,MSIOF2_SCK,VI1_R0,VI1_R0_B,VI2_G0,VI2_DATA3_VI2_B3_B,?..." line.long 0x10 "IPSR4,Peripheral Function Select Register 4" bitfld.long 0x10 27.--29. " IP4[29:27] ,Peripheral Function Select 9" "EX_CS2_N,GPS_SIGN,HRTS1_N_B,VI3_CLKENB,VI1_G0,VI1_G0_B,VI2_R2,?..." bitfld.long 0x10 24.--26. " IP4[26:24] ,Peripheral Function Select 8" "EX_CS1_N,GPS_CLK,HCTS1_N_B,VI1_FIELD,VI1_FIELD_B,VI2_R1,?..." textline " " bitfld.long 0x10 21.--23. " IP4[23:21] ,Peripheral Function Select 7" "EX_CS0_N,HRX1_B,VI1_G5,VI1_G5_B,VI2_R0,HTX0_B,MSIOF0_SS1_B,?..." bitfld.long 0x10 18.--20. " IP4[20:18] ,Peripheral Function Select 6" "CS1_N_A26,SPEEDIN,VI0_R7,VI0_R7_B,VI2_CLK,VI2_CLK_B,?..." textline " " bitfld.long 0x10 15.--17. " IP4[17:15] ,Peripheral Function Select 5" "CS0_N,VI1_R6,VI1_R6_B,VI2_G3,MSIOF0_SS2_B,?..." bitfld.long 0x10 12.--14. " IP4[14:12] ,Peripheral Function Select 4" "A25,SSL,VI1_G6,VI1_G6_B,VI2_FIELD,VI2_FIELD_B,?..." textline " " bitfld.long 0x10 9.--11. " IP4[11:9] ,Peripheral Function Select 3" "A24,IO3,VI1_R7,VI1_R7_B,VI2_CLKENB,VI2_CLKENB_B,?..." bitfld.long 0x10 6.--8. " IP4[8:6] ,Peripheral Function Select 2" "A23,IO2,VI1_G7,VI1_G7_B,VI2_G7,?..." textline " " bitfld.long 0x10 3.--5. " IP4[5:3] ,Peripheral Function Select 1" "A22,MISO_IO1,VI1_R5,VI1_R5_B,VI2_G6,?..." bitfld.long 0x10 0.--2. " IP4[2:0] ,Peripheral Function Select 0" "A21,MOSI_IO0,VI1_R4,VI1_R4_B,VI2_G5,?..." line.long 0x14 "IPSR5,Peripheral Function Select Register 5" bitfld.long 0x14 27.--29. " IP5[29:27] ,Peripheral Function Select 9" "DREQ0_N,VI1_HSYNC_N,VI1_HSYNC_N_B,VI2_R7,SSI_SCK78_C,SSI_WS78_B,?..." bitfld.long 0x14 24.--26. " IP5[26:24] ,Peripheral Function Select 8" "EX_WAIT0,IRQ3,INTC_IRQ3_N,VI3_CLK,SCIFA0_RTS_N_B,HRX0_B,MSIOF0_SCK_B,?..." textline " " bitfld.long 0x14 21.--23. " IP5[23:21] ,Peripheral Function Select 7" "WE1_N,IERX,CAN1_RX,VI1_G4,VI1_G4_B,VI2_R6,SCIFA0_CTS_N_B,?..." bitfld.long 0x14 18.--20. " IP5[20:18] ,Peripheral Function Select 6" "WE0_N,IECLK,CAN_CLK,VI2_VSYNC_N,SCIFA0_TXD_B,VI2_VSYNC_N_B,?..." textline " " bitfld.long 0x14 15.--17. " IP5[17:15] ,Peripheral Function Select 5" "RD_WR_N,VI1_G3,VI1_G3_B,VI2_R5,SCIFA0_RXD_B,INTC_IRQ4_N,?..." bitfld.long 0x14 13.--14. " IP5[14:13] ,Peripheral Function Select 4" "RD_N,CAN0_TX,SCIFA0_SCK_B,?..." textline " " bitfld.long 0x14 10.--12. " IP5[12:10] ,Peripheral Function Select 3" "BS_N,IETX,HTX1_B,CAN1_TX,DRACK0,IETX_C,?..." bitfld.long 0x14 6.--9. " IP5[9:6] ,Peripheral Function Select 2" "EX_CS5_N,CAN0_RX,MSIOF1_RXD_B,VI3_VSYNC_N,VI1_G2,VI1_G2_B,VI2_R4,IIC1_SDA,INTC_EN1_N,I2C1_SDA,?..." textline " " bitfld.long 0x14 3.--5. " IP5[5:3] ,Peripheral Function Select 1" "EX_CS4_N,MSIOF1_SCK_B,VI3_HSYNC_N,VI2_HSYNC_N,IIC1_SCL,VI2_HSYNC_N_B,INTC_EN0_N,I2C1_SCL" bitfld.long 0x14 0.--2. " IP5[2:0] ,Peripheral Function Select 0" "EX_CS3_N,GPS_MAG,VI3_FIELD,VI1_G1,VI1_G1_B,VI2_R3,?..." line.long 0x18 "IPSR6,Peripheral Function Select Register 6" bitfld.long 0x18 29.--31. " IP6[31:29] ,Peripheral Function Select 10" "ETH_REF_CLK,,HCTS0_N_E,STP_IVCXO27_1_B,HRX0_F,?..." bitfld.long 0x18 26.--28. " IP6[28:26] ,Peripheral Function Select 9" "ETH_LINK,,HTX0_E,STP_IVCXO27_0_B,SCIFB1_TXD_G,TX1_E,?..." textline " " bitfld.long 0x18 23.--25. " IP6[25:23] ,Peripheral Function Select 8" "ETH_RXD1,,HRX0_E,STP_ISSYNC_0_B,TS_SCK0_D,GLO_I1_C,SCIFB1_RXD_G,RX1_E" bitfld.long 0x18 20.--22. " IP6[22:20] ,Peripheral Function Select 7" "ETH_RXD0,,STP_ISEN_0_B,TS_SDAT0_D,GLO_I0_C,SCIFB1_SCK_G,SCK1_E,?..." textline " " bitfld.long 0x18 17.--19. " IP6[19:17] ,Peripheral Function Select 6" "ETH_RX_E,,STP_ISD_0_B,TS_SPSYNC0_D,GLO_Q1_C,IIC2_SDA_E,I2C2_SDA_E,?..." bitfld.long 0x18 14.--16. " IP6[16:14] ,Peripheral Function Select 5" "ETH_CRS_DV,,STP_ISCLK_0_B,TS_SDEN0_D,GLO_Q0_C,IIC2_SCL_E,I2C2_SCL_E,?..." textline " " bitfld.long 0x18 11.--13. " IP6[13:11] ,Peripheral Function Select 4" "DACK2,IRQ2,INTC_IRQ2_N,SSI_SDATA6_B,HRTS0_N_B,MSIOF0_RXD_B,?..." bitfld.long 0x18 9.--10. " IP6[10:9] ,Peripheral Function Select 3" "DREQ2_N,HSCK1_B,HCTS0_N_B,MSIOF0_TXD_B" textline " " bitfld.long 0x18 6.--8. " IP6[8:6] ,Peripheral Function Select 2" "DACK1,IRQ1,INTC_IRQ1_N,SSI_WS6_B,SSI_SDATA8_C,?..." bitfld.long 0x18 3.--5. " IP6[5:3] ,Peripheral Function Select 1" "DREQ1_N,VI1_CLKENB,VI1_CLKENB_B,SSI_SDATA7_C,SSI_SCK78_B,?..." textline " " bitfld.long 0x18 0.--2. " IP6[2:0] ,Peripheral Function Select 0" "DACK0,IRQ0,INTC_IRQ0_N,SSI_SCK6_B,VI1_VSYNC_N,VI1_VSYNC_N_B,SSI_WS78_C,?..." line.long 0x1C "IPSR7,Peripheral Function Select Register 7" bitfld.long 0x1C 29.--30. " IP7[30:29] ,Peripheral Function Select 11" "VI0_DATA0_VI0_B0,ATACS10_N,AVB_RXD2,?..." bitfld.long 0x1C 27.--28. " IP7[28:27] ,Peripheral Function Select 10" "VI0_CLK,ATACS00_N,AVB_RXD1,?..." textline " " bitfld.long 0x1C 25.--26. " IP7[26:25] ,Peripheral Function Select 9" "DU1_DOTCLKIN,AUDIO_CLKC,AUDIO_CLKOUT_C,?..." bitfld.long 0x1C 22.--24. " IP7[24:22] ,Peripheral Function Select 8" "PWM2,PWMFSW0,SCIFA2_RXD_C,PCMWE_N,PCMWE_N,?..." textline " " bitfld.long 0x1C 19.--21. " IP7[21:19] ,Peripheral Function Select 7" "PWM1,SCIFA2_TXD_C,STP_ISSYNC_1_B,TS_SCK1_C,GLO_RFON_C,PCMOE_N,?..." bitfld.long 0x1C 16.--18. " IP7[18:16] ,Peripheral Function Select 6" "PWM0,SCIFA2_SCK_C,STP_ISEN_1_B,TS_SDAT1_C,GLO_SS_C,?..." textline " " bitfld.long 0x1C 13.--15. " IP7[15:13] ,Peripheral Function Select 5" "ETH_MDC,,STP_ISD_1_B,TS_SPSYNC1_C,GLO_SDATA_C,?..." bitfld.long 0x1C 10.--12. " IP7[12:10] ,Peripheral Function Select 4" "ETH_TXD0,,STP_ISCLK_1_B,TS_SDEN1_C,GLO_SCLK_C,?..." textline " " bitfld.long 0x1C 8.--9. " IP7[9:8] ,Peripheral Function Select 3" "ETH_MAGIC,,SIM0_RST_C,?..." bitfld.long 0x1C 6.--7. " IP7[7:6] ,Peripheral Function Select 2" "ETH_TX_EN,,SIM0_CLK_C,HRTS0_N_F" textline " " bitfld.long 0x1C 3.--5. " IP7[5:3] ,Peripheral Function Select 1" "ETH_TXD1,,HTX0_F,BPFCLK_G,?..." bitfld.long 0x1C 0.--2. " IP7[2:0] ,Peripheral Function Select 0" "ETH_MDIO,,HRTS0_N_E,SIM0_D_C,HCTS0_N_F,?..." line.long 0x20 "IPSR8,Peripheral Function Select Register 8" bitfld.long 0x20 29.--30. " IP8[30:29] ,Peripheral Function Select 16" "SD0_CMD,SCIFB1_SCK_B,VI1_DATA1_VI1_B1_B,?..." bitfld.long 0x20 28. " IP8[28] ,Peripheral Function Select 15" "SD0_CLK,VI1_DATA0_VI1_B0_B" textline " " bitfld.long 0x20 27. " IP8[27] ,Peripheral Function Select 14" "VI1_DATA6_VI1_B6,AVB_GTXREFCLK" bitfld.long 0x20 26. " IP8[26] ,Peripheral Function Select 13" "VI1_DATA5_VI1_B5,AVB_PHY_INT" textline " " bitfld.long 0x20 24.--25. " IP8[25:24] ,Peripheral Function Select 12" "VI1_DATA4_VI1_B4,SCIFA1_RTS_N_D,AVB_MAGIC,?..." bitfld.long 0x20 22.--23. " IP8[23:22] ,Peripheral Function Select 11" "VI1_DATA3_VI1_B3,SCIFA1_CTS_N_D,AVB_GTX_CLK,?..." textline " " bitfld.long 0x20 20.--21. " IP8[21:20] ,Peripheral Function Select 10" "VI1_DATA2_VI1_B2,SCIFA1_TXD_D,AVB_MDIO,?..." bitfld.long 0x20 18.--19. " IP8[19:18] ,Peripheral Function Select 9" "VI1_DATA1_VI1_B1,SCIFA1_RXD_D,AVB_MDC,?..." textline " " bitfld.long 0x20 16.--17. " IP8[17:16] ,Peripheral Function Select 8" "VI1_DATA0_VI1_B0,SCIFA1_SCK_D,AVB_CRS,?..." bitfld.long 0x20 14.--15. " IP8[15:14] ,Peripheral Function Select 7" "VI1_CLK,AVB_RX_DV,?..." textline " " bitfld.long 0x20 12.--13. " IP8[13:12] ,Peripheral Function Select 6" "VI0_DATA7_VI0_B7,AVB_RX_CLK,?..." bitfld.long 0x20 10.--11. " IP8[11:10] ,Peripheral Function Select 5" "VI0_DATA6_VI0_B6,AVB_RX_ER,?..." textline " " bitfld.long 0x20 8.--9. " IP8[9:8] ,Peripheral Function Select 4" "VI0_DATA5_VI0_B5,EX_WAIT1,AVB_RXD7,?..." bitfld.long 0x20 6.--7. " IP8[7:6] ,Peripheral Function Select 3" "VI0_DATA4_VI0_B4,ATAG0_N,AVB_RXD6,?..." textline " " bitfld.long 0x20 4.--5. " IP8[5:4] ,Peripheral Function Select 2" "VI0_DATA3_VI0_B3,ATADIR0_N,AVB_RXD5,?..." bitfld.long 0x20 2.--3. " IP8[3:2] ,Peripheral Function Select 1" "VI0_DATA2_VI0_B2,ATAWR0_N,AVB_RXD4,?..." textline " " bitfld.long 0x20 0.--1. " IP8[1:0] ,Peripheral Function Select 0" "VI0_DATA1_VI0_B1,ATARD0_N,AVB_RXD3,?..." line.long 0x24 "IPSR9,Peripheral Function Select Register 9" bitfld.long 0x24 28.--31. " IP9[31:28] ,Peripheral Function Select 12" "SD1_CD,MMC1_D6,TS_SDEN1,USB1_EXTP,GLO_SS,VI0_CLK_B,IIC2_SCL_D,I2C2_SCL_D,SIM0_CLK_B,VI3_CLK_B,?..." bitfld.long 0x24 26.--27. " IP9[27:26] ,Peripheral Function Select 11" "SD1_DAT3,AVB_RXD0,,SCIFB0_RTS_N_B" textline " " bitfld.long 0x24 24.--25. " IP9[25:24] ,Peripheral Function Select 10" "SD1_DAT2,AVB_COL,,SCIFB0_CTS_N_B" bitfld.long 0x24 22.--23. " IP9[23:22] ,Peripheral Function Select 9" "SD1_DAT1,AVB_LINK,,SCIFB0_TXD_B" textline " " bitfld.long 0x24 20.--21. " IP9[21:20] ,Peripheral Function Select 8" "SD1_DAT0,AVB_TX_CLK,,SCIFB0_RXD_B" bitfld.long 0x24 18.--19. " IP9[19:18] ,Peripheral Function Select 7" "SD1_CMD,AVB_TX_ER,,SCIFB0_SCK_B" textline " " bitfld.long 0x24 16.--17. " IP9[17:16] ,Peripheral Function Select 6" "SD1_CLK,AVB_TX_EN,?..." bitfld.long 0x24 12.--15. " IP9[15:12] ,Peripheral Function Select 5" "SD0_WP,MMC0_D7,TS_SPSYNC0_B ,USB0_IDIN,GLO_SDATA,VI1_DATA7_VI1_B7_B,IIC1_SDA_B,I2C1_SDA_B,VI2_DATA7_VI2_B7_B,?..." textline " " bitfld.long 0x24 8.--11. " IP9[11:8] ,Peripheral Function Select 4" "SD0_CD,MMC0_D6,TS_SDEN0_B,USB0_EXTP,GLO_SCLK,VI1_DATA6_VI1_B6_B,IIC1_SCL_B,I2C1_SCL_B,VI2_DATA6_VI2_B6_B,?..." bitfld.long 0x24 6.--7. " IP9[7:6] ,Peripheral Function Select 3" "SD0_DAT3,SCIFB1_RTS_N_B,VI1_DATA5_VI1_B5_B,?..." textline " " bitfld.long 0x24 4.--5. " IP9[5:4] ,Peripheral Function Select 2" "SD0_DAT2,SCIFB1_CTS_N_B,VI1_DATA4_VI1_B4_B,?..." bitfld.long 0x24 2.--3. " IP9[3:2] ,Peripheral Function Select 1" "SD0_DAT1,SCIFB1_TXD_B,VI1_DATA3_VI1_B3_B,?..." textline " " bitfld.long 0x24 0.--1. " IP9[1:0] ,Peripheral Function Select 0" "SD0_DAT0,SCIFB1_RXD_B,VI1_DATA2_VI1_B2_B,?..." line.long 0x28 "IPSR10,Peripheral Function Select Register 10" bitfld.long 0x28 26.--29. " IP10[29:26] ,Peripheral Function Select 7" "SD2_CD,MMC0_D4,TS_SDAT0_B,USB2_EXTP,GLO_I0,VI0_DATA6_VI0_B6_B,HCTS0_N_D,TS_SDAT1_B,GLO_I0_B,VI3_DATA6_B,?..." bitfld.long 0x28 23.--25. " IP10[25:23] ,Peripheral Function Select 6" "SD2_DAT3,MMC0_D3,SIM0_RST,VI0_DATA5_VI0_B5_B,HTX0_D,TS_SPSYNC1_B,GLO_Q1_B,VI3_DATA5_B" textline " " bitfld.long 0x28 19.--22. " IP10[18:15] ,Peripheral Function Select 5" "SD2_DAT2,MMC0_D2,BPFCLK_B,,VI0_DATA4_VI0_B4_B,HRX0_D,TS_SDEN1_B,GLO_Q0_B,VI3_DATA4_B,?..." bitfld.long 0x28 15.--18. " IP10[18:15] ,Peripheral Function Select 4" "VI3_DATA2_B,MMC0_D1,FMIN_B,,VI0_DATA3_VI0_B3_B,SCIFB1_TXD_E,TX1_D,TS_SCK0_C,GLO_RFON_B,VI3_DATA3_B,?..." textline " " bitfld.long 0x28 11.--14. " IP10[14:11] ,Peripheral Function Select 3" "SD2_DAT0,MMC0_D0,FMCLK_B,VI0_DATA2_VI0_B2_B,SCIFB1_RXD_E,RX1_D,TS_SDAT0_C,GLO_SS_B,VI3_DATA2_B,?..." bitfld.long 0x28 7.--10. " IP10[10:7] ,Peripheral Function Select 2" "SD2_CMD,MMC0_CMD,SIM0_D,VI0_DATA1_VI0_B1_B,SCIFB1_SCK_E,SCK1_D,TS_SPSYNC0_C,GLO_SDATA_B,VI3_DATA1_B,?..." textline " " bitfld.long 0x28 4.--6. " IP10[6:4] ,Peripheral Function Select 1" "SD2_CLK,MMC0_CLK,SIM0_CLK,VI0_DATA0_VI0_B0_B,TS_SDEN0_C,GLO_SCLK_B,VI3_DATA0_B,?..." bitfld.long 0x28 0.--3. " IP10[3:0] ,Peripheral Function Select 0" "SD1_WP,MMC1_D7,TS_SPSYNC1,USB1_IDIN,GLO_RFON,VI1_CLK_B,IIC2_SDA_D,I2C2_SDA_D,SIM0_D_B,?..." line.long 0x2C "IPSR11,Peripheral Function Select Register 11" bitfld.long 0x2C 30.--31. " IP11[31:30] ,Peripheral Function Select 12" "SSI_SCK0129,CAN_CLK_B,MOUT0,?..." bitfld.long 0x2C 27.--29. " IP11[29:27] ,Peripheral Function Select 11" "MLB_DAT,SCIFB1_TXD_D,TX1_C,BPFCLK_C,?..." textline " " bitfld.long 0x2C 24.--26. " IP11[26:24] ,Peripheral Function Select 10" "MLB_SIG,SCIFB1_RXD_D,RX1_C,IIC2_SDA_B,I2C2_SDA_B,?..." bitfld.long 0x2C 22.--23. " IP11[23:22] ,Peripheral Function Select 9" "MLB_CLK,IIC2_SCL_B,I2C2_SCL_B,?..." textline " " bitfld.long 0x2C 18.--21. " IP11[21:18] ,Peripheral Function Select 8" "SD3_WP,MMC1_D5,TS_SCK1,GLO_Q1,FMIN_C,,FMIN_E,,FMIN_F,?..." bitfld.long 0x2C 15.--17. " IP11[17:15] ,Peripheral Function Select 7" "SD3_CD,MMC1_D4,TS_SDAT1,VSP,GLO_Q0,SIM0_RST_B,?..." textline " " bitfld.long 0x2C 13.--14. " IP11[14:13] ,Peripheral Function Select 6" "SD3_DAT3,MMC1_D3,SCKZ,?..." bitfld.long 0x2C 11.--12. " IP11[12:11] ,Peripheral Function Select 5" "SD3_DAT2,MMC1_D2,SDATA,?..." textline " " bitfld.long 0x2C 9.--10. " IP11[10:9] ,Peripheral Function Select 4" "SD3_DAT1,MMC1_D1,MDATA,?..." bitfld.long 0x2C 7.--8. " IP11[8:7] ,Peripheral Function Select 3" "SD3_DAT0,MMC1_D0,STM_N,?..." textline " " bitfld.long 0x2C 5.--6. " IP11[6:5] ,Peripheral Function Select 2" "SD3_CMD,MMC1_CMD,MTS_N,?..." bitfld.long 0x2C 4. " IP11[4] ,Peripheral Function Select 1" "SD3_CLK,MMC1_CLK" textline " " bitfld.long 0x2C 0.--3. " IP11[3:0] ,Peripheral Function Select 0" "SD2_WP,MMC0_D5,TS_SCK0_B,USB2_IDIN,GLO_I1,VI0_DATA7_VI0_B7_B,HRTS0_N_D,TS_SCK1_B,GLO_I1_B,VI3_DATA7_B,?..." line.long 0x30 "IPSR12,Peripheral Function Select Register 12" bitfld.long 0x30 28.--30. " IP12[30:28] ,Peripheral Function Select 11" "SSI_WS5,SCIFB1_RXD,IECLK_B,DU2_EXVSYNC_DU2_VSYNC,QSTB_QHE,CAN_DEBUGOUT4,?..." bitfld.long 0x30 25.--27. " IP12[27:25] ,Peripheral Function Select 10" "SSI_SCK5,SCIFB1_SCK,SCIFB1_SCK,DU2_EXHSYNC_DU2_HSYNC,QSTH_QHS,CAN_DEBUGOUT3,?..." textline " " bitfld.long 0x30 23.--24. " IP12[24:23] ,Peripheral Function Select 9" "SSI_SDATA4,STP_ISSYNC_0,MSIOF1_RXD,CAN_DEBUGOUT2" bitfld.long 0x30 20.--22. " IP12[22:20] ,Peripheral Function Select 8" "SSI_WS4,STP_ISEN_0,SCIFB0_RTS_N,MSIOF1_TXD,SSI_WS5_C,CAN_DEBUGOUT1,?..." textline " " bitfld.long 0x30 17.--19. " IP12[19:17] ,Peripheral Function Select 7" "SSI_SCK4,STP_ISD_0,SCIFB0_CTS_N,MSIOF1_SS2,SSI_SCK5_C,CAN_DEBUGOUTSSI_WS40,?..." bitfld.long 0x30 14.--16. " IP12[16:14] ,Peripheral Function Select 6" "SSI_SDATA3,STP_ISCLK_0,SCIFB0_TXD,MSIOF1_SS1,CAN_TXCLK,?..." textline " " bitfld.long 0x30 11.--13. " IP12[13:11] ,Peripheral Function Select 5" "SSI_WS34,STP_IVCXO27_0,SCIFB0_RXD,MSIOF1_SYNC,CAN_STEP0,?..." bitfld.long 0x30 8.--10. " IP12[10:8] ,Peripheral Function Select 4" "SSI_SCK34,STP_OPWM_0,SCIFB0_SCK,MSIOF1_SCK,CAN_DEBUG_HW_TRIGGER,?..." textline " " bitfld.long 0x30 6.--7. " IP12[7:6] ,Peripheral Function Select 3" "SSI_SDATA2,CAN1_RX_B,SSI_SCK1,MOUT6" bitfld.long 0x30 4.--5. " IP12[5:4] ,Peripheral Function Select 2" "SSI_SDATA1,CAN1_TX_B,MOUT5,?..." textline " " bitfld.long 0x30 2.--3. " IP12[3:2] ,Peripheral Function Select 1" "SSI_SDATA0,CAN0_RX_B,MOUT2,?..." bitfld.long 0x30 0.--1. " IP12[1:0] ,Peripheral Function Select 0" "SSI_WS0129,CAN0_TX_B,MOUT1,?..." line.long 0x34 "IPSR13,Peripheral Function Select Register 13" bitfld.long 0x34 29.--30. " IP13[30:29] ,Peripheral Function Select 9" "AUDIO_CLKA,SCIFB2_RTS_N,CAN_DEBUGOUT14,?..." bitfld.long 0x34 26.--28. " IP13[28:26] ,Peripheral Function Select 8" "SSI_SDATA9,STP_ISSYNC_1,SCIFB2_CTS_N,SSI_WS1,SSI_SDATA5_C,CAN_DEB_UGOUT13,?..." textline " " bitfld.long 0x34 23.--25. " IP13[25:23] ,Peripheral Function Select 7" "SSI_SDATA8,STP_ISEN_1,SCIFB2_TXD,CAN0_TX_C,CAN_DEBUGOUT12,SSI_SDATA8_B,?..." bitfld.long 0x34 19.--22. " IP13[22:19] ,Peripheral Function Select 6" "SSI_SDATA7,STP_ISD_1,SCIFB2_RXD,SCIFA2_RTS_N,TCLK2,QSTVA_QVS,CAN_DEBUGOUT11,BPFCLK_E,,SSI_SDATA7_B,FMIN_G,?..." textline " " bitfld.long 0x34 16.--18. " IP13[18:16] ,Peripheral Function Select 5" "SSI_WS78,STP_ISCLK_1,SCIFB2_SCK,SCIFA2_CTS_N,DU2_DR7,LCDOUT7,CAN_DEBUGOUT10,?..." bitfld.long 0x34 13.--15. " IP13[15:13] ,Peripheral Function Select 4" "SSI_SCK78,STP_IVCXO27_1,SCK1,SCIFA1_SCK,DU2_DR6,LCDOUT6,CAN_DEBUGOUT9,?..." textline " " bitfld.long 0x34 10.--12. " IP13[12:10] ,Peripheral Function Select 3" "SSI_SDATA6,FMIN_D,,DU2_DR5,LCDOUT5,CAN_DEBUGOUT8,?..." bitfld.long 0x34 7.--9. " IP13[9:7] ,Peripheral Function Select 2" "SSI_WS6,SCIFB1_RTS_N,CAN0_TX_D,DU2_DR4,LCDOUT4,CAN_DEBUGOUT7,?..." textline " " bitfld.long 0x34 3.--6. " IP13[6:3] ,Peripheral Function Select 1" "SSI_SCK6,SCIFB1_CTS_N,BPFCLK_D,,DU2_DR3,LCDOUT3,CAN_DEBUGOUT6,BPFCLK_F,?..." bitfld.long 0x34 0.--2. " IP13[2:0] ,Peripheral Function Select 0" "SSI_SDATA5,SCIFB1_TXD,IETX_B,DU2_DR2,LCDOUT2,CAN_DEBUGOUT5,?..." line.long 0x38 "IPSR14,Peripheral Function Select Register 14" bitfld.long 0x38 28.--30. " IP14[30:28] ,Peripheral Function Select 9" "SCIFA1_RTS_N,AD_NCS_N,AD_NCS_N,MSIOF3_TXD,DU1_DOTCLKOUT,QSTVB_QVE,HRTS0_N_C,?..." bitfld.long 0x38 25.--27. " IP14[27:25] ,Peripheral Function Select 8" "SCIFA1_CTS_N,AD_CLK,CTS1_N,MSIOF3_RXD,DU0_DOTCLKOUT,QCLK,?..." textline " " bitfld.long 0x38 22.--24. " IP14[24:22] ,Peripheral Function Select 7" "QCPV_QDE,AD_DO,TX1,DU2_DG1,LCDOUT9,?..." bitfld.long 0x38 19.--21. " IP14[21:19] ,Peripheral Function Select 6" "SCIFA1_RXD,AD_DI,RX1,DU2_EXODDF_DU2_ODDF_DISP_CDE,QCPV_QDE,?..." textline " " bitfld.long 0x38 16.--18. " IP14[18:16] ,Peripheral Function Select 5" "SCIFA0_RTS_N,HRTS1_N,RTS0_N,MSIOF3_SS1,DU2_DG0,LCDOUT8,PWM1_B,?..." bitfld.long 0x38 12.--15. " IP14[15:12] ,Peripheral Function Select 4" "SCIFA0_CTS_N,HCTS1_N,CTS0_N,MSIOF3_SYNC,DU2_DG3,LCDOUT11,PWM0_B,IIC1_SCL_C,I2C1_SCL_C,?..." textline " " bitfld.long 0x38 9.--11. " IP14[11:9] ,Peripheral Function Select 3" "SCIFA0_TXD,HTX1,TX0,DU2_DR1,LCDOUT1,?..." bitfld.long 0x38 6.--8. " IP14[8:6] ,Peripheral Function Select 2" "SCIFA0_RXD,HRX1,RX0,DU2_DR0,LCDOUT0,?..." textline " " bitfld.long 0x38 3.--5. " IP14[5:3] ,Peripheral Function Select 1" "SCIFA0_SCK,HSCK1,SCK0,MSIOF3_SS2,DU2_DG2,LCDOUT10,IIC1_SDA_C,I2C1_SDA_C" bitfld.long 0x38 0.--2. " IP14[2:0] ,Peripheral Function Select 0" "AUDIO_CLKB,SCIF_CLK,CAN0_RX_D,DVC_MUTE,CAN0_RX_C,CAN_DEBUGOUT15,REMOCON,?..." line.long 0x3C "IPSR15,Peripheral Function Select Register 15" bitfld.long 0x3C 28.--29. " IP15[29:28] ,Peripheral Function Select 11" "MSIOF0_TXD,ADICHS1,DU2_DG6,LCDOUT14" bitfld.long 0x3C 26.--27. " IP15[27:26] ,Peripheral Function Select 10" "MSIOF0_SS1,ADICHS0,DU2_DG5,LCDOUT13" textline " " bitfld.long 0x3C 23.--25. " IP15[25:23] ,Peripheral Function Select 9" "MSIOF0_SYNC,TS_SCK0,SSI_SCK2,ADIDATA,DU2_DB7,LCDOUT23,HRX0_C,?..." bitfld.long 0x3C 20.--22. " IP15[22:20] ,Peripheral Function Select 8" "MSIOF0_SCK,TS_SDAT0,ADICLK,DU2_DB6,LCDOUT22,?..." textline " " bitfld.long 0x3C 18.--19. " IP15[19:18] ,Peripheral Function Select 7" "HRTS0_N,SSI_WS9,DU2_DB5,LCDOUT21" bitfld.long 0x3C 16.--17. " IP15[17:16] ,Peripheral Function Select 6" "HCTS0_N,SSI_SCK9,DU2_DB4,LCDOUT20" textline " " bitfld.long 0x3C 14.--15. " IP15[15:14] ,Peripheral Function Select 5" "HTX0,DU2_DB3,LCDOUT19,?..." bitfld.long 0x3C 12.--13. " IP15[13:12] ,Peripheral Function Select 4" "HRX0,DU2_DB2,LCDOUT18,?..." textline " " bitfld.long 0x3C 9.--11. " IP15[11:9] ,Peripheral Function Select 3" "HSCK0,TS_SDEN0,DU2_DG4,LCDOUT12,HCTS0_N_C,?..." bitfld.long 0x3C 6.--8. " IP15[8:6] ,Peripheral Function Select 2" "SCIFA2_TXD,BPFCLK,RX2,DU2_DB1,LCDOUT17,IIC2_SDA,I2C2_SDA,?..." textline " " bitfld.long 0x3C 3.--5. " IP15[5:3] ,Peripheral Function Select 1" "SCIFA2_RXD,FMIN,TX2,DU2_DB0,LCDOUT16,IIC2_SCL,I2C2_SCL,?..." bitfld.long 0x3C 0.--2. " IP15[2:0] ,Peripheral Function Select 0" "SCIFA2_SCK,FMCLK,SCK2,MSIOF3_SCK,DU2_DG7,LCDOUT15,SCIF_CLK_B,?..." group.long 0x160++0x3 line.long 0x00 "IPSR16,Peripheral Function Select Register 16" bitfld.long 0x00 7. " IP16[7] ,Peripheral Function Select 3" "USB1_OVC,TCLK1_B" bitfld.long 0x00 6. " IP16[6] ,Peripheral Function Select 2" "USB1_PWEN,AUDIO_CLKOUT_D" textline " " bitfld.long 0x00 3.--5. " IP16[5:3] ,Peripheral Function Select 1" "MSIOF0_RXD,TS_SPSYNC0,SSI_WS2,ADICS_SAMP,DU2_CDE,QPOLB,SCIFA2_RXD_B,?..." bitfld.long 0x00 0.--2. " IP16[2:0] ,Peripheral Function Select 0" "MSIOF0_SS2,AUDIO_CLKOUT,ADICHS2,DU2_DISP,QPOLA,HTX0_C,SCIFA2_TXD_B,?..." group.long 0x90++0xB line.long 0x00 "MOD_SEL,Module Select Register" bitfld.long 0x00 29.--31. " SEL_SCIF1 ,Module Select 19" "Function 1,Function 2,Function 3,Function 4,Function 5,Function 6,Function 7,Function 8" bitfld.long 0x00 27.--28. " SEL_SCIFB ,Module Select 18" "Function 1,Function 2,Function 3,Function 4" textline " " bitfld.long 0x00 25.--26. " SEL_SCIFB2 ,Module Select 17" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x00 22.--24. " SEL_SCIFB1 ,Module Select 16" "Function 1,Function 2,Function 3,Function 4,Function 5,Function 6,Function 7,Function 8" textline " " bitfld.long 0x00 20.--21. " SEL_SCIFA1 ,Module Select 15" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x00 19. " SEL_SCIF0 ,Module Select 14" "Function 1,Function 2" textline " " bitfld.long 0x00 18. " SEL_SCFA ,Module Select 13" "Function 1,Function 2" bitfld.long 0x00 17. " SEL_SOF1 ,Module Select 12" "Function 1,Function 2" textline " " bitfld.long 0x00 15.--16. " SEL_SSI7 ,Module Select 11" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x00 14. " SEL_SSI6 ,Module Select 10" "Function 1,Function 2" textline " " bitfld.long 0x00 12.--13. " SEL_SSI5 ,Module Select 9" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x00 11. " SEL_VI3 ,Module Select 8" "Function 1,Function 2" textline " " bitfld.long 0x00 10. " SEL_VI2 ,Module Select 7" "Function 1,Function 2" bitfld.long 0x00 9. " SEL_VI1 ,Module Select 6" "Function 1,Function 2" textline " " bitfld.long 0x00 8. " SEL_VI0 ,Module Select 5" "Function 1,Function 2" bitfld.long 0x00 6.--7. " SEL_TSIF1 ,Module Select 4" "Function 1,Function 2,Function 3,Function 4" textline " " bitfld.long 0x00 4. " SEL_LBS ,Module Select 3" "Function 1,Function 2" bitfld.long 0x00 2.--3. " SEL_TSIF0 ,Module Select 2" "Function 1,Function 2,Function 3,Function 4" textline " " bitfld.long 0x00 1. " SEL_SOF3 ,Module Select 1" "Function 1,Function 2" bitfld.long 0x00 0. " SEL_SOF0 ,Module Select 0" "Function 1,Function 2" line.long 0x04 "MOD_SEL2,Module Select Register 2" bitfld.long 0x04 28. " SEL_TMU1 ,Module Select 14" "Function 1,Function 2" bitfld.long 0x04 27. " SEL_HSCIF1 ,Module Select 13" "Function 1,Function 2" textline " " bitfld.long 0x04 26. " SEL_SCIFCLK ,Module Select 12" "Function 1,Function 2" bitfld.long 0x04 24.--25. " SEL_CAN0 ,Module Select 11" "Function 1,Function 2,Function 3,Function 4" textline " " bitfld.long 0x04 23. " SEL_CANCLK ,Module Select 10" "Function 1,Function 2" bitfld.long 0x04 21.--22. " SEL_SCIFA2 ,Module Select 9" "Function 1,Function 2,Function 3,Function 4" textline " " bitfld.long 0x04 20. " SEL_CAN1 ,Module Select 8" "Function 1,Function 2" bitfld.long 0x04 17. " SEL_SCIF2 ,Module Select 7" "Function 1,Function 2" textline " " bitfld.long 0x04 16. " SEL_ADI ,Module Select 6" "Function 1,Function 2" bitfld.long 0x04 15. " SEL_SSP ,Module Select 5" "Function 1,Function 2" textline " " bitfld.long 0x04 12.--14. " SEL_FM ,Module Select 4" "Function 1,Function 2,Function 3,Function 4,Function 5,Function 6,Function 7,Function 8" bitfld.long 0x04 9.--11. " SEL_HSCIF0 ,Module Select 3" "Function 1,Function 2,Function 3,Function 4,Function 5,Function 6,Function 7,Function 8" textline " " bitfld.long 0x04 7.--8. " SEL_HSCIF0 ,Module Select 2" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x04 2.--3. " SEL_SIM ,Module Select 1" "Function 1,Function 2,Function 3,Function 4" textline " " bitfld.long 0x04 0.--1. " SEL_SSI8 ,Module Select 0" "Function 1,Function 2,Function 3,Function 4" line.long 0x08 "MOD_SEL3,Module Select Register 3" bitfld.long 0x08 31. " SEL_IICDVFS ,Module Select 6" "Function 1,Function 2" bitfld.long 0x08 30. " SEL_IIC0 ,Module Select 5" "Function 1,Function 2" textline " " bitfld.long 0x08 16.--17. " SEL_IEB ,Module Select 4" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x08 7.--9. " SEL_IIC2 ,Module Select 3" "Function 1,Function 2,Function 3,Function 4,Function 5,Function 6,Function 7,Function 8" textline " " bitfld.long 0x08 5.--6. " SEL_IIC1 ,Module Select 2" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x08 2.--4. " SEL_I2C2 ,Module Select 1" "Function 1,Function 2,Function 3,Function 4,Function 5,Function 6,Function 7,Function 8" textline " " bitfld.long 0x08 0.--1. " SEL_I2C1 ,Module Select 0" "Function 1,Function 2,Function 3,Function 4" group.long 0x100++0x1B line.long 0x00 "PUPR0,LSI Pin Pull-Up Control Register 0" bitfld.long 0x00 31. " EX_CS5_N ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x00 30. " EX_CS4_N ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " EX_CS3_N ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x00 28. " EX_CS2_N ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " EX_CS1_N ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x00 26. " EX_CS0_N ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " A25 ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x00 24. " A24 ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " A23 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x00 22. " A22 ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " A21 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x00 20. " A20 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " A19 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x00 18. " A18 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " A17 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x00 16. " A16 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " A15 ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x00 14. " A14 ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " A13 ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x00 12. " A12 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " A11 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x00 10. " A10 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " A9 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x00 8. " A8 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " A7 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x00 6. " A6 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " A5 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x00 4. " A4 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " A3 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x00 2. " A2 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " A1 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " A0 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x04 "PUPR1,LSI Pin Pull-Up Control Register 1" bitfld.long 0x04 31. " D15 ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x04 30. " D14 ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " D13 ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x04 28. " D12 ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " D11 ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x04 26. " D10 ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " D9 ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x04 24. " D8 ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " D7 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x04 22. " D6 ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " D5 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x04 20. " D4 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " D3 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x04 18. " D2 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " D1 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x04 16. " D0 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " ASEBRK ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x04 13. " TDI ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " TMS ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" bitfld.long 0x04 11. " TCK ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " TRST_N ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x04 9. " CS1_N_A26 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " CS0_N ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" bitfld.long 0x04 7. " AVS2 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " AVS1 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" bitfld.long 0x04 5. " EX_WAIT0 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " WE1_N ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" bitfld.long 0x04 3. " WE0_N ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " RD_WR_N ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x04 1. " RD_N ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BS_N ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x08 "PUPR2,LSI Pin Pull-Up Control Register 2" bitfld.long 0x08 31. " DU_DOTCLKIN0 ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x08 29. " MLB_DAT ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " MLB_SIG ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" bitfld.long 0x08 27. " MLB_CLK ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " DU_DOTCLKIN1 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x08 22. " VI1_DATA7_VI1_B7 ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " VI1_DATA6_VI1_B6 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x08 20. " VI1_DATA5_VI1_B5 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " VI1_DATA5_VI1_B5 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x08 18. " VI1_DATA3_VI1_B3 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " VI1_DATA2_VI1_B2 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x08 16. " VI1_DATA1_VI1_B1 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " VI1_DATA0_VI1_B0 ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x08 14. " VI1_CLK ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " VI0_DATA7_VI0_B7 ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x08 12. " VI0_DATA6_VI0_B6 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " VI0_DATA5_VI0_B5 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x08 10. " VI0_DATA4_VI0_B4 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " VI0_DATA3_VI0_B3 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x08 8. " VI0_DATA2_VI0_B2 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " VI0_DATA1_VI0_B1 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x08 6. " VI0_DATA0_VI0_B0 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " VI0_CLK ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x08 0. " DU_DOTCLKIN2 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x0C "PUPR3,LSI Pin Pull-Up Control Register 3" bitfld.long 0x0C 31. " SD3_WP ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x0C 30. " SD3_CD ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" textline " " bitfld.long 0x0C 29. " SD3_DAT3 ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x0C 28. " SD3_DAT2 ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x0C 27. " SD3_DAT1 ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x0C 26. " SD3_DAT0 ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " SD3_CMD ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x0C 24. " SD3_CLK ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " SD2_WP ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x0C 22. " SD2_CD ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" textline " " bitfld.long 0x0C 21. " SD2_DAT3 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x0C 20. " SD2_DAT2 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " SD2_DAT1 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x0C 18. " SD2_DAT0 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " SD2_CMD ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x0C 16. " SD2_CLK ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x0C 15. " SD1_WP ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x0C 14. " SD1_CD ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " SD1_CD ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x0C 12. " SD1_DAT2 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " SD1_DAT1 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x0C 10. " SD1_DAT0 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " SD1_CMD ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x0C 8. " SD1_CLK ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " SD0_WP ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x0C 6. " SD0_CD ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " SD0_DAT3 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x0C 4. " SD0_DAT2 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " SD0_DAT1 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x0C 2. " SD0_DAT0 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " SD0_CMD ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x0C 0. " SD0_CLK ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x10 "PUPR4,LSI Pin Pull-Up Control Register 4" bitfld.long 0x10 31. " ETH_RX_ER ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x10 30. " ETH_CRS_DV ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " DACK2 ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x10 28. " DREQ2 ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " DACK1 ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x10 26. " DREQ1 ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " DACK0 ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x10 24. " DREQ0 ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " AUDIO_CLKB ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x10 22. " AUDIO_CLKA ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " SSI_SDATA9 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x10 20. " SSI_SDATA8 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " SSI_SDATA7 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x10 18. " SSI_WS78 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " SSI_SCK78 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x10 16. " SSI_SDATA6 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SSI_WS6 ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x10 14. " SSI_SCK6 ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " SSI_SDATA5 ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x10 12. " SSI_WS5 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " SSI_SCK5 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x10 10. " SSI_SDATA4 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " SSI_WS4 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x10 8. " SSI_SCK4 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " SSI_SDATA3 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x10 6. " SSI_WS34 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " SSI_SCK34 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x10 4. " SSI_SDATA2 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " SSI_SDATA1 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x10 2. " SSI_SDATA0 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " SSI_WS0129 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x10 0. " SSI_SCK0129 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x14 "PUPR5,LSI Pin Pull-Up Control Register 5" bitfld.long 0x14 31. " ETH_LINK ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x14 30. " ETH_RXD1 ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " ETH_RXD0 ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x14 28. " USB2_OVC ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " USB2_PWEN ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x14 26. " USB1_OVC ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " USB1_PWEN ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x14 24. " USB0_OVC_VBUS ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x14 23. " USB0_PWEN ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x14 22. " MSIOF0_RXD ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " MSIOF0_SS2 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x14 20. " MSIOF0_TXD ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " MSIOF0_SS1 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x14 18. " MSIOF0_SYNC ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " MSIOF0_SCK ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x14 16. " HRTS0_N ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " HCTS0_N ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x14 14. " HTX0 ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " HRX0 ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x14 12. " HSCK0 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " SCIFA2_TXD ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x14 10. " SCIFA2_RXD ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " SCIFA2_SCK ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x14 8. " SCIFA1_RTS_N ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " SCIFA1_CTS_N ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x14 6. " SCIFA1_TXD ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " SCIFA1_RXD ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x14 4. " SCIFA0_RTS_N ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " SCIFA0_CTS_N ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x14 2. " SCIFA0_TXD ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " SCIFA0_RXD ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x14 0. " SCIFA0_SCK ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x18 "PUPR6,LSI Pin Pull-Up Control Register 6" bitfld.long 0x18 9. " PWM2 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x18 8. " PWM1 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " PWM0 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x18 6. " ETH_MDC ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " ETH_TXD0 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x18 4. " ETH_MAGIC ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " ETH_TX_EN ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x18 2. " ETH_TXD1 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " ET_MDIO ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x18 0. " ETH_REF_CLK ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" group.long 0x70++0x3 line.long 0x00 "IOCTRL,IIC/IICDVFS/MMC IO Cell Control Register" bitfld.long 0x00 12. " GPREG_MSEL03_P[15] ,Debug monitor function Setting" "MSIOF/HSCIF/SCIFA,SDHI" bitfld.long 0x00 7. " CONTA_IICDVFS ,Control TOF value of IICDVFS IO cell" "0.3VPU,0.7VPU" textline " " bitfld.long 0x00 6. " CONTB_IICDVFS ,Control VIH/VIL value of IICDVFS IO cell" "VIL,VIH" bitfld.long 0x00 3. " CONTA_IIC0 ,Control TOF value of IIC0 IO cell" "0.3VP,0.7VPU" textline " " bitfld.long 0x00 2. " CONTB_IIC0 ,Control VIH/VIL value of IIC0 IO cell" "VIL,VIH" group.long 0x60++0x7 line.long 0x00 "IOCTRL0,SD Control Register 0" bitfld.long 0x00 30.--31. " DRV_SD3WP ,SD3_WP Setting" "0,1,2,3" bitfld.long 0x00 28.--29. " DRV_SD3CD ,SD3_CD Setting" "0,1,2,3" textline " " bitfld.long 0x00 26.--27. " DRV_SD3CLK ,SD3_CLK Setting 1" "0,1,2,3" bitfld.long 0x00 24.--25. " DRV_SD3CMD ,SD3_CMD Setting" "0,1,2,3" textline " " bitfld.long 0x00 22.--23. " DRV_SD3D3 ,SD3_DAT3 Setting" "0,1,2,3" bitfld.long 0x00 20.--21. " DRV_SD3D2 ,SD3_DAT2 Setting" "0,1,2,3" textline " " bitfld.long 0x00 18.--19. " DRV_SD3D1 ,SD3_DAT1 Setting" "0,1,2,3" bitfld.long 0x00 16.--17. " DRV_SD3D0 ,SD3_DAT0 Setting" "0,1,2,3" textline " " bitfld.long 0x00 14.--15. " DRV_SD0WP ,SD0_WP Setting" "0,1,2,3" bitfld.long 0x00 12.--13. " DRV_SD0CD ,SD0_CD Setting" "0,1,2,3" textline " " bitfld.long 0x00 10.--11. " DRV_SD0CLK ,SD0_CLK Setting 1" "0,1,2,3" bitfld.long 0x00 8.--9. " DRV_SD0CMD ,SD0_CMD Setting" "0,1,2,3" textline " " bitfld.long 0x00 6.--7. " DRV_SD0D3 ,SD0_CMD Setting" "0,1,2,3" bitfld.long 0x00 4.--5. " DRV_SD0D2 ,SD0_DAT2 Setting" "0,1,2,3" textline " " bitfld.long 0x00 2.--3. " DRV_SD0D1 ,SD0_DAT1 Setting" "0,1,2,3" bitfld.long 0x00 0.--1. " DRV_SD0D0 ,SD0_DAT0 Setting" "0,1,2,3" line.long 0x04 "IOCTRL1,SD Control Register 1" bitfld.long 0x04 30.--31. " DRV_SD2WP ,SD2_WP Setting" "0,1,2,3" bitfld.long 0x04 28.--29. " DRV_SD2CD ,SD2_CD Setting" "0,1,2,3" textline " " bitfld.long 0x04 26.--27. " DRV_SD2CLK ,SD2_CLK Setting 1" "0,1,2,3" bitfld.long 0x04 24.--25. " DRV_SD2CMD ,SD2_CMD Setting" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " DRV_SD2D3 ,SD2_DAT3 Setting" "0,1,2,3" bitfld.long 0x04 20.--21. " DRV_SD2D2 ,SD2_DAT2 Setting" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " DRV_SD2D2 ,SD2_DAT1 Setting" "0,1,2,3" bitfld.long 0x04 16.--17. " DRV_SD2D0 ,SD2_DAT0 Setting" "0,1,2,3" textline " " bitfld.long 0x04 14.--15. " DRV_SD1WP ,SD1_WP Setting" "0,1,2,3" bitfld.long 0x04 12.--13. " DRV_SD1CD ,SD1_CD Setting" "0,1,2,3" textline " " bitfld.long 0x04 10.--11. " DRV_SD1CLK ,SD1_CLK Setting 1" "0,1,2,3" bitfld.long 0x04 8.--9. " DRV_SD1CMD ,SD1_CMD Setting" "0,1,2,3" textline " " bitfld.long 0x04 6.--7. " DRV_SD1D3 ,SD1_CMD Setting" "0,1,2,3" bitfld.long 0x04 4.--5. " DRV_SD1D2 ,SD1_DAT2 Setting" "0,1,2,3" textline " " bitfld.long 0x04 2.--3. " DRV_SD1D1 ,SD1_DAT1 Setting" "0,1,2,3" bitfld.long 0x04 0.--1. " DRV_SD1D0 ,SD1_DAT0 Setting" "0,1,2,3" group.long 0x84++0xB line.long 0x00 "IOCTRL4,VI1 Driving Ability Control Register 4" bitfld.long 0x00 8.--9. " DRV_VI1DATB3 ,VI1_DAT3_VI1_B3 Setting" "0,1,2,3" line.long 0x04 "IOCTRL5,VI1 Driving Ability Control Register 5" bitfld.long 0x04 20.--21. " SD0TDSEL ,SD0_CLK Setting 2" "0,1,2,3" bitfld.long 0x04 18.--19. " SD1TDSEL ,SD1_CLK Setting 2" "0,1,2,3" textline " " bitfld.long 0x04 16.--17. " SD2TDSEL ,SD2_CLK Setting 2" "0,1,2,3" bitfld.long 0x04 14.--15. " SD3TDSEL ,SD1_CLK Setting 2" "0,1,2,3" textline " " bitfld.long 0x04 12.--13. " D0_TDSEL ,D0 Setting" "0,1,2,3" bitfld.long 0x04 10.--11. " A11_TDSEL ,A11 Setting" "0,1,2,3" textline " " bitfld.long 0x04 8.--9. " EXCS4_TDSEL ,EX_CS4_N Setting" "0,1,2,3" bitfld.long 0x04 6.--7. " EXWAIT0_TDSEL ,EX_WAIT0 Setting" "0,1,2,3" textline " " bitfld.long 0x04 4.--5. " SSI_TDSEL ,SSI_SCK34 Setting" "0,1,2,3" bitfld.long 0x04 2.--3. " SCIFA2_TDSEL ,SCIFA2_SCK Setting" "0,1,2,3" line.long 0x08 "IOCTRL6,VI1 Driving Ability Control Register 6" bitfld.long 0x08 31. " POC_SD0CLK ,SD0_CLK pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 30. " POC_SD0CMD ,SD0_CMD pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 29. " POC_SD0DAT0 ,SD0_DAT0 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 28. " POC_SD0DAT1 ,SD0_DAT1 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 27. " POC_SD0DAT2 ,SD0_DAT2 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 26. " POC_SD0DAT3 ,SD0_DAT3 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 25. " POC_SD0CD ,SD0_CD pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 24. " POC_SD0WP ,SD0_WP pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 23. " POC_SD1CLK ,SD1_CLK pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 22. " POC_SD1CMD ,SD1_CMD pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 21. " POC_SD1DAT0 ,SD1_DAT1 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 20. " POC_SD1DAT0 ,SD1_DAT1 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 19. " POC_SD1DAT2 ,SD1_DAT2 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 18. " POC_SD1DAT3 ,SD1_DAT3 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 17. " POC_SD1CD ,SD1_CD pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 16. " POC_SD1WP ,SD1_WP pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 15. " POC_SD2CLK ,SD2_CLK pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 14. " POC_SD2CMD ,SD2_CMD pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 13. " POC_SD2DAT0 ,SD2_DAT0 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 12. " POC_SD2DAT1 ,SD2_DAT1 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 11. " POC_SD2DAT2 ,SD2_DAT2 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 10. " POC_SD2DAT3 ,SD2_DAT3 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 9. " POC_SD2CD ,SD2_CD pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 8. " POC_SD2WP ,SD2_WP pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 7. " POC_SD3CLK ,SD3_CLK pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 6. " POC_SD3CMD ,SD3_CMD pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 5. " POC_SD3DAT0 ,SD3_DAT0 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 4. " POC_SD3DAT1 ,SD3_DAT1 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 3. " POC_SD3DAT2 ,SD3_DAT2 pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 2. " POC_SD3DAT3 ,SD3_DAT3 pin IO voltage select" "1.8V,3.3V" textline " " bitfld.long 0x08 1. " POC_SD3DAT3 ,SD3_CD pin IO voltage select" "1.8V,3.3V" bitfld.long 0x08 0. " POC_SD3CD ,SD3_WP pin IO voltage select" "1.8V,3.3V" group.long 0x240++0xB line.long 0x00 "DDR3GPEN,DDR3 General Port IO Enable register" bitfld.long 0x00 29. " DDR3GPEN[29] ,DDR3 general port function bit 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " DDR3GPEN[28] ,DDR3 general port function bit 28 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DDR3GPEN[27] ,DDR3 general port function bit 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " DDR3GPEN[26] ,DDR3 general port function bit 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " DDR3GPEN[25] ,DDR3 general port function bit 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " DDR3GPEN[24] ,DDR3 general port function bit 24 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " DDR3GPEN[23] ,DDR3 general port function bit 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " DDR3GPEN[22] ,DDR3 general port function bit 22 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DDR3GPEN[21] ,DDR3 general port function bit 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " DDR3GPEN[20] ,DDR3 general port function bit 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " DDR3GPEN[19] ,DDR3 general port function bit 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " DDR3GPEN[18] ,DDR3 general port function bit 18 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDR3GPEN[17] ,DDR3 general port function bit 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " DDR3GPEN[16] ,DDR3 general port function bit 16 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " DDR3GPEN[15] ,DDR3 general port function bit 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " DDR3GPEN[14] ,DDR3 general port function bit 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DDR3GPEN[13] ,DDR3 general port function bit 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " DDR3GPEN[12] ,DDR3 general port function bit 12 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DDR3GPEN[11] ,DDR3 general port function bit 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " DDR3GPEN[10] ,DDR3 general port function bit 10 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DDR3GPEN[9] ,DDR3 general port function bit 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " DDR3GPEN[8] ,DDR3 general port function bit 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DDR3GPEN[7] ,DDR3 general port function bit 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " DDR3GPEN[6] ,DDR3 general port function bit 6 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DDR3GPEN[5] ,DDR3 general port function bit 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " DDR3GPEN[4] ,DDR3 general port function bit 4 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DDR3GPEN[3] ,DDR3 general port function bit 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " DDR3GPEN[2] ,DDR3 general port function bit 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DDR3GPEN[1] ,DDR3 general port function bit 1 enable" "Disabled,Enabled" line.long 0x04 "DDR3GPOE,DDR3 General Port Output Enable" bitfld.long 0x04 29. " DDR3GPOE[29] ,DDR3 general port function bit 29 enable" "Disabled,Enabled" bitfld.long 0x04 26. " DDR3GPOE[26] ,DDR3 general port function bit 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " DDR3GPOE[24] ,DDR3 general port function bit 24 enable" "Disabled,Enabled" bitfld.long 0x04 21. " DDR3GPOE[21] ,DDR3 general port function bit 21 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " DDR3GPOE[20] ,DDR3 general port function bit 20 enable" "Disabled,Enabled" bitfld.long 0x04 19. " DDR3GPOE[19] ,DDR3 general port function bit 19 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " DDR3GPOE[17] ,DDR3 general port function bit 17 enable" "Disabled,Enabled" bitfld.long 0x04 16. " DDR3GPOE[16] ,DDR3 general port function bit 16 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " DDR3GPOE[15] ,DDR3 general port function bit 15 enable" "Disabled,Enabled" bitfld.long 0x04 12. " DDR3GPOE[12] ,DDR3 general port function bit 12 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " DDR3GPOE[11] ,DDR3 general port function bit 11 enable" "Disabled,Enabled" bitfld.long 0x04 9. " DDR3GPOE[9] ,DDR3 general port function bit 9 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " DDR3GPOE[7] ,DDR3 general port function bit 7 enable" "Disabled,Enabled" bitfld.long 0x04 3. " DDR3GPOE[3] ,DDR3 general port function bit 3 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " DDR3GPOE[2] ,DDR3 general port function bit 2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " DDR3GPOE[1] ,DDR3 general port function bit 1 enable" "Disabled,Enabled" line.long 0x08 "DDR3GPOD,DDR3 General Port Output Data" bitfld.long 0x08 29. " DDR3GPOD[29] ,DDR3 general port write bit 29" "0,1" bitfld.long 0x08 26. " DDR3GPOD[26] ,DDR3 general port write bit 26" "0,1" textline " " bitfld.long 0x08 24. " DDR3GPOD[24] ,DDR3 general port write bit 24" "0,1" bitfld.long 0x08 21. " DDR3GPOD[21] ,DDR3 general port write bit 21" "0,1" textline " " bitfld.long 0x08 20. " DDR3GPOD[20] ,DDR3 general port write bit 20" "0,1" bitfld.long 0x08 19. " DDR3GPOD[19] ,DDR3 general port write bit 19" "0,1" textline " " bitfld.long 0x08 17. " DDR3GPOD[17] ,DDR3 general port write bit 17" "0,1" bitfld.long 0x08 16. " DDR3GPOD[16] ,DDR3 general port write bit 16" "0,1" textline " " bitfld.long 0x08 15. " DDR3GPOD[15] ,DDR3 general port write bit 15" "0,1" bitfld.long 0x08 12. " DDR3GPOD[12] ,DDR3 general port write bit 12" "0,1" textline " " bitfld.long 0x08 11. " DDR3GPOD[11] ,DDR3 general port write bit 11" "0,1" bitfld.long 0x08 9. " DDR3GPOD[9] ,DDR3 general port write bit 9" "0,1" textline " " bitfld.long 0x08 7. " DDR3GPOD[7] ,DDR3 general port write bit 7" "0,1" bitfld.long 0x08 3. " DDR3GPOD[3] ,DDR3 general port write bit 3" "0,1" textline " " bitfld.long 0x08 2. " DDR3GPOD[2] ,DDR3 general port write bit 2" "0,1" bitfld.long 0x08 1. " DDR3GPOD[1] ,DDR3 general port write bit 1" "0,1" rgroup.long 0x24C++0x3 line.long 0x00 "DDR3GPID,DDR3 General Port Input Data" bitfld.long 0x00 29. " DDR3GPID[29] ,DDR3 general port value bit 29" "0,1" bitfld.long 0x00 26. " DDR3GPID[26] ,DDR3 general port value bit 26" "0,1" textline " " bitfld.long 0x00 24. " DDR3GPID[24] ,DDR3 general port value bit 24" "0,1" bitfld.long 0x00 21. " DDR3GPID[21] ,DDR3 general port value bit 21" "0,1" textline " " bitfld.long 0x00 20. " DDR3GPID[20] ,DDR3 general port value bit 20" "0,1" bitfld.long 0x00 19. " DDR3GPID[19] ,DDR3 general port value bit 19" "0,1" textline " " bitfld.long 0x00 17. " DDR3GPID[17] ,DDR3 general port value bit 17" "0,1" bitfld.long 0x00 16. " DDR3GPID[16] ,DDR3 general port value bit 16" "0,1" textline " " bitfld.long 0x00 15. " DDR3GPID[15] ,DDR3 general port value bit 15" "0,1" bitfld.long 0x00 12. " DDR3GPID[12] ,DDR3 general port value bit 12" "0,1" textline " " bitfld.long 0x00 11. " DDR3GPID[11] ,DDR3 general port value bit 11" "0,1" bitfld.long 0x00 9. " DDR3GPID[9] ,DDR3 general port value bit 9" "0,1" textline " " bitfld.long 0x00 7. " DDR3GPID[7] ,DDR3 general port value bit 7" "0,1" bitfld.long 0x00 3. " DDR3GPID[3] ,DDR3 general port value bit 3" "0,1" textline " " bitfld.long 0x00 2. " DDR3GPID[2] ,DDR3 general port value bit 2" "0,1" bitfld.long 0x00 1. " DDR3GPID[1] ,DDR3 general port value bit 1" "0,1" width 0xB tree.end tree.open "GPIO" tree "GPIO 0" base ad:0xE6050000 width 14. group.long 0x00++0xB line.long 0x00 "IOINTSEL0,General IO/interrupt switching register 0" bitfld.long 0x00 31. " IOINTSEL0_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL0_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" textline " " bitfld.long 0x00 29. " IOINTSEL0_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL0_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL0_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL0_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL0_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL0_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " IOINTSEL0_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL0_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL0_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL0_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" textline " " bitfld.long 0x00 19. " IOINTSEL0_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL0_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL0_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL0_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " IOINTSEL0_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL0_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL0_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL0_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" textline " " bitfld.long 0x00 11. " IOINTSEL0_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL0_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL0_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL0_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " IOINTSEL0_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL0_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL0_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL0_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" textline " " bitfld.long 0x00 3. " IOINTSEL0_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL0_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL0_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL0_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" textline " " line.long 0x04 "INOUTSEL0,General input/output switching register 0" bitfld.long 0x04 31. " INOUTSEL0_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL0_30 ,General input or output mode select for channel 30" "Input,Output" textline " " bitfld.long 0x04 29. " INOUTSEL0_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL0_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL0_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL0_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL0_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL0_24 ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " INOUTSEL0_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL0_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL0_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL0_20 ,General input or output mode select for channel 20" "Input,Output" textline " " bitfld.long 0x04 19. " INOUTSEL0_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL0_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL0_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL0_16 ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " INOUTSEL0_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL0_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL0_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL0_12 ,General input or output mode select for channel 12" "Input,Output" textline " " bitfld.long 0x04 11. " INOUTSEL0_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL0_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL0_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL0_8 ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " INOUTSEL0_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL0_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL0_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL0_4 ,General input or output mode select for channel 4" "Input,Output" textline " " bitfld.long 0x04 3. " INOUTSEL0_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL0_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL0_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL0_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT0,General output register 0" bitfld.long 0x08 31. " OUTDT0_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT0_30 ,Output value for channel 30" "0,1" textline " " bitfld.long 0x08 29. " OUTDT0_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT0_28 ,Output value for channel 28" "0,1" textline " " bitfld.long 0x08 27. " OUTDT0_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT0_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT0_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT0_24 ,Output value for channel 24" "0,1" textline " " bitfld.long 0x08 23. " OUTDT0_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT0_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT0_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT0_20 ,Output value for channel 20" "0,1" textline " " bitfld.long 0x08 19. " OUTDT0_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT0_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT0_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT0_16 ,Output value for channel 16" "0,1" textline " " bitfld.long 0x08 15. " OUTDT0_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT0_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT0_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT0_12 ,Output value for channel 12" "0,1" textline " " bitfld.long 0x08 11. " OUTDT0_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT0_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT0_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT0_8 ,Output value for channel 8" "0,1" textline " " bitfld.long 0x08 7. " OUTDT0_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT0_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT0_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT0_4 ,Output value for channel 4" "0,1" textline " " bitfld.long 0x08 3. " OUTDT0_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT0_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT0_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT0_0 ,Output value for channel 0" "0,1" textline " " rgroup.long 0x0C++0x07 line.long 0x00 "INDT0,General input register 0" bitfld.long 0x00 31. " INDT0_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT0_30 ,Value received through pin 30" "0,1" textline " " bitfld.long 0x00 29. " INDT0_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT0_28 ,Value received through pin 28" "0,1" textline " " bitfld.long 0x00 27. " INDT0_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT0_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT0_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT0_24 ,Value received through pin 24" "0,1" textline " " bitfld.long 0x00 23. " INDT0_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT0_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT0_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT0_20 ,Value received through pin 20" "0,1" textline " " bitfld.long 0x00 19. " INDT0_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT0_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT0_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT0_16 ,Value received through pin 16" "0,1" textline " " bitfld.long 0x00 15. " INDT0_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT0_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT0_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT0_12 ,Value received through pin 12" "0,1" textline " " bitfld.long 0x00 11. " INDT0_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT0_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT0_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT0_8 ,Value received through pin 8" "0,1" textline " " bitfld.long 0x00 7. " INDT0_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT0_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT0_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT0_4 ,Value received through pin 4" "0,1" textline " " bitfld.long 0x00 3. " INDT0_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT0_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT0_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT0_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT0,Interrupt display register 0" bitfld.long 0x04 31. " INTDT0_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT0_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " INTDT0_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT0_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT0_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT0_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT0_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT0_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " INTDT0_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT0_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT0_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT0_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " INTDT0_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT0_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT0_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT0_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " INTDT0_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT0_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT0_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT0_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " INTDT0_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT0_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT0_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT0_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " INTDT0_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT0_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT0_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT0_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " INTDT0_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT0_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT0_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT0_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" textline " " group.long 0x14++0x17 line.long 0x00 "INTCLR0,Interrupt clear register 0" bitfld.long 0x00 31. " INTCLR0_31 ,Clears pin 31 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 30. " INTCLR0_30 ,Clears pin 30 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 29. " INTCLR0_29 ,Clears pin 29 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 28. " INTCLR0_28 ,Clears pin 28 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 27. " INTCLR0_27 ,Clears pin 27 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 26. " INTCLR0_26 ,Clears pin 26 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 25. " INTCLR0_25 ,Clears pin 25 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 24. " INTCLR0_24 ,Clears pin 24 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 23. " INTCLR0_23 ,Clears pin 23 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 22. " INTCLR0_22 ,Clears pin 22 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 21. " INTCLR0_21 ,Clears pin 21 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 20. " INTCLR0_20 ,Clears pin 20 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 19. " INTCLR0_19 ,Clears pin 19 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 18. " INTCLR0_18 ,Clears pin 18 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " INTCLR0_17 ,Clears pin 17 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 16. " INTCLR0_16 ,Clears pin 16 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 15. " INTCLR0_15 ,Clears pin 15 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 14. " INTCLR0_14 ,Clears pin 14 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 13. " INTCLR0_13 ,Clears pin 13 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 12. " INTCLR0_12 ,Clears pin 12 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 11. " INTCLR0_11 ,Clears pin 11 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 10. " INTCLR0_10 ,Clears pin 10 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " INTCLR0_9 ,Clears pin 9 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 8. " INTCLR0_8 ,Clears pin 8 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " INTCLR0_7 ,Clears pin 7 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 6. " INTCLR0_6 ,Clears pin 6 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " INTCLR0_5 ,Clears pin 5 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 4. " INTCLR0_4 ,Clears pin 4 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " INTCLR0_3 ,Clears pin 3 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 2. " INTCLR0_2 ,Clears pin 2 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " INTCLR0_1 ,Clears pin 1 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 0. " INTCLR0_0 ,Clears pin 0 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " line.long 0x04 "INTMSK0,Interrupt mask register 0" bitfld.long 0x04 31. " INTMSK0_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK0_30 ,Masks interrupt request for pin 30" "Masked,Not masked" textline " " bitfld.long 0x04 29. " INTMSK0_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK0_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK0_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK0_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK0_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK0_24 ,Masks interrupt request for pin 24" "Masked,Not masked" textline " " bitfld.long 0x04 23. " INTMSK0_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK0_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK0_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK0_20 ,Masks interrupt request for pin 20" "Masked,Not masked" textline " " bitfld.long 0x04 19. " INTMSK0_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK0_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK0_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK0_16 ,Masks interrupt request for pin 16" "Masked,Not masked" textline " " bitfld.long 0x04 15. " INTMSK0_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK0_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK0_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK0_12 ,Masks interrupt request for pin 12" "Masked,Not masked" textline " " bitfld.long 0x04 11. " INTMSK0_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK0_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK0_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK0_8 ,Masks interrupt request for pin 8" "Masked,Not masked" textline " " bitfld.long 0x04 7. " INTMSK0_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK0_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK0_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK0_4 ,Masks interrupt request for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " INTMSK0_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK0_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK0_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK0_0 ,Masks interrupt request for pin 0" "Masked,Not masked" textline " " line.long 0x08 "MSKCLR0,Interrupt mask clear register 0" bitfld.long 0x08 31. " MSKCLR0_31 ,Clears mask for pin 31" "Not cleared,Cleared" bitfld.long 0x08 30. " MSKCLR0_30 ,Clears mask for pin 30" "Not cleared,Cleared" textline " " bitfld.long 0x08 29. " MSKCLR0_29 ,Clears mask for pin 29" "Not cleared,Cleared" bitfld.long 0x08 28. " MSKCLR0_28 ,Clears mask for pin 28" "Not cleared,Cleared" textline " " bitfld.long 0x08 27. " MSKCLR0_27 ,Clears mask for pin 27" "Not cleared,Cleared" bitfld.long 0x08 26. " MSKCLR0_26 ,Clears mask for pin 26" "Not cleared,Cleared" textline " " bitfld.long 0x08 25. " MSKCLR0_25 ,Clears mask for pin 25" "Not cleared,Cleared" bitfld.long 0x08 24. " MSKCLR0_24 ,Clears mask for pin 24" "Not cleared,Cleared" textline " " bitfld.long 0x08 23. " MSKCLR0_23 ,Clears mask for pin 23" "Not cleared,Cleared" bitfld.long 0x08 22. " MSKCLR0_22 ,Clears mask for pin 22" "Not cleared,Cleared" textline " " bitfld.long 0x08 21. " MSKCLR0_21 ,Clears mask for pin 21" "Not cleared,Cleared" bitfld.long 0x08 20. " MSKCLR0_20 ,Clears mask for pin 20" "Not cleared,Cleared" textline " " bitfld.long 0x08 19. " MSKCLR0_19 ,Clears mask for pin 19" "Not cleared,Cleared" bitfld.long 0x08 18. " MSKCLR0_18 ,Clears mask for pin 18" "Not cleared,Cleared" textline " " bitfld.long 0x08 17. " MSKCLR0_17 ,Clears mask for pin 17" "Not cleared,Cleared" bitfld.long 0x08 16. " MSKCLR0_16 ,Clears mask for pin 16" "Not cleared,Cleared" textline " " bitfld.long 0x08 15. " MSKCLR0_15 ,Clears mask for pin 15" "Not cleared,Cleared" bitfld.long 0x08 14. " MSKCLR0_14 ,Clears mask for pin 14" "Not cleared,Cleared" textline " " bitfld.long 0x08 13. " MSKCLR0_13 ,Clears mask for pin 13" "Not cleared,Cleared" bitfld.long 0x08 12. " MSKCLR0_12 ,Clears mask for pin 12" "Not cleared,Cleared" textline " " bitfld.long 0x08 11. " MSKCLR0_11 ,Clears mask for pin 11" "Not cleared,Cleared" bitfld.long 0x08 10. " MSKCLR0_10 ,Clears mask for pin 10" "Not cleared,Cleared" textline " " bitfld.long 0x08 9. " MSKCLR0_9 ,Clears mask for pin 9" "Not cleared,Cleared" bitfld.long 0x08 8. " MSKCLR0_8 ,Clears mask for pin 8" "Not cleared,Cleared" textline " " bitfld.long 0x08 7. " MSKCLR0_7 ,Clears mask for pin 7" "Not cleared,Cleared" bitfld.long 0x08 6. " MSKCLR0_6 ,Clears mask for pin 6" "Not cleared,Cleared" textline " " bitfld.long 0x08 5. " MSKCLR0_5 ,Clears mask for pin 5" "Not cleared,Cleared" bitfld.long 0x08 4. " MSKCLR0_4 ,Clears mask for pin 4" "Not cleared,Cleared" textline " " bitfld.long 0x08 3. " MSKCLR0_3 ,Clears mask for pin 3" "Not cleared,Cleared" bitfld.long 0x08 2. " MSKCLR0_2 ,Clears mask for pin 2" "Not cleared,Cleared" textline " " bitfld.long 0x08 1. " MSKCLR0_1 ,Clears mask for pin 1" "Not cleared,Cleared" bitfld.long 0x08 0. " MSKCLR0_0 ,Clears mask for pin 0" "Not cleared,Cleared" textline " " line.long 0x0C "POSNEG0,Positive/negative logic select register 0" bitfld.long 0x0C 31. " POSNEG0_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG0_30 ,Selects polarity for pin 30" "Positive,Negative" textline " " bitfld.long 0x0C 29. " POSNEG0_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG0_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG0_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG0_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG0_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG0_24 ,Selects polarity for pin 24" "Positive,Negative" textline " " bitfld.long 0x0C 23. " POSNEG0_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG0_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG0_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG0_20 ,Selects polarity for pin 20" "Positive,Negative" textline " " bitfld.long 0x0C 19. " POSNEG0_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG0_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG0_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG0_16 ,Selects polarity for pin 16" "Positive,Negative" textline " " bitfld.long 0x0C 15. " POSNEG0_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG0_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG0_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG0_12 ,Selects polarity for pin 12" "Positive,Negative" textline " " bitfld.long 0x0C 11. " POSNEG0_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG0_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG0_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG0_8 ,Selects polarity for pin 8" "Positive,Negative" textline " " bitfld.long 0x0C 7. " POSNEG0_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG0_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG0_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG0_4 ,Selects polarity for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " POSNEG0_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG0_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG0_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG0_0 ,Selects polarity for pin 0" "Positive,Negative" textline " " line.long 0x10 "EDGLEVEL0,Edge/level select register 0" bitfld.long 0x10 31. " EDGLEVEL0_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL0_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" textline " " bitfld.long 0x10 29. " EDGLEVEL0_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL0_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL0_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL0_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL0_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL0_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" textline " " bitfld.long 0x10 23. " EDGLEVEL0_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL0_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL0_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL0_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" textline " " bitfld.long 0x10 19. " EDGLEVEL0_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL0_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL0_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL0_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" textline " " bitfld.long 0x10 15. " EDGLEVEL0_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL0_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL0_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL0_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" textline " " bitfld.long 0x10 11. " EDGLEVEL0_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL0_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL0_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL0_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" textline " " bitfld.long 0x10 7. " EDGLEVEL0_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL0_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL0_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL0_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " EDGLEVEL0_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL0_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL0_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL0_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF0,Chattering prevention on/off register 0" sif (cpuis("RCARM2"))||(cpuis("R8A77470")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" textline " " endif bitfld.long 0x14 3. " FILONOFF0_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF0_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " FILONOFF0_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF0_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" textline " " group.long 0x38++0x17 line.long 0x00 "INTMSKS0,Interrupt Sub Mask Register 0" bitfld.long 0x00 31. " INTMSKS0_31 ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS0_30 ,Interrupt Sub Mask 30" "Masked,Not masked" textline " " bitfld.long 0x00 29. " INTMSKS0_29 ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS0_28 ,Interrupt Sub Mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS0_27 ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS0_26 ,Interrupt Sub Mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS0_25 ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS0_24 ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " INTMSKS0_23 ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS0_22 ,Interrupt Sub Mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS0_21 ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS0_20 ,Interrupt Sub Mask 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " INTMSKS0_19 ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS0_18 ,Interrupt Sub Mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS0_17 ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS0_16 ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " INTMSKS0_15 ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS0_14 ,Interrupt Sub Mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS0_13 ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS0_12 ,Interrupt Sub Mask 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " INTMSKS0_11 ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS0_10 ,Interrupt Sub Mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS0_9 ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS0_8 ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " INTMSKS0_7 ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS0_6 ,Interrupt Sub Mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS0_5 ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS0_4 ,Interrupt Sub Mask 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " INTMSKS0_3 ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS0_2 ,Interrupt Sub Mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS0_1 ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS0_0 ,Interrupt Sub Mask 0" "Masked,Not masked" textline " " line.long 0x04 "MSKCLRS0,Interrupt Sub Mask Clear Register 0" bitfld.long 0x04 31. " MSKCLRS0_31 ,Interrupt Sub Mask Clear 31" "No effect,Cleared" bitfld.long 0x04 30. " MSKCLRS0_30 ,Interrupt Sub Mask Clear 30" "No effect,Cleared" textline " " bitfld.long 0x04 29. " MSKCLRS0_29 ,Interrupt Sub Mask Clear 29" "No effect,Cleared" bitfld.long 0x04 28. " MSKCLRS0_28 ,Interrupt Sub Mask Clear 28" "No effect,Cleared" textline " " bitfld.long 0x04 27. " MSKCLRS0_27 ,Interrupt Sub Mask Clear 27" "No effect,Cleared" bitfld.long 0x04 26. " MSKCLRS0_26 ,Interrupt Sub Mask Clear 26" "No effect,Cleared" textline " " bitfld.long 0x04 25. " MSKCLRS0_25 ,Interrupt Sub Mask Clear 25" "No effect,Cleared" bitfld.long 0x04 24. " MSKCLRS0_24 ,Interrupt Sub Mask Clear 24" "No effect,Cleared" textline " " bitfld.long 0x04 23. " MSKCLRS0_23 ,Interrupt Sub Mask Clear 23" "No effect,Cleared" bitfld.long 0x04 22. " MSKCLRS0_22 ,Interrupt Sub Mask Clear 22" "No effect,Cleared" textline " " bitfld.long 0x04 21. " MSKCLRS0_21 ,Interrupt Sub Mask Clear 21" "No effect,Cleared" bitfld.long 0x04 20. " MSKCLRS0_20 ,Interrupt Sub Mask Clear 20" "No effect,Cleared" textline " " bitfld.long 0x04 19. " MSKCLRS0_19 ,Interrupt Sub Mask Clear 19" "No effect,Cleared" bitfld.long 0x04 18. " MSKCLRS0_18 ,Interrupt Sub Mask Clear 18" "No effect,Cleared" textline " " bitfld.long 0x04 17. " MSKCLRS0_17 ,Interrupt Sub Mask Clear 17" "No effect,Cleared" bitfld.long 0x04 16. " MSKCLRS0_16 ,Interrupt Sub Mask Clear 16" "No effect,Cleared" textline " " bitfld.long 0x04 15. " MSKCLRS0_15 ,Interrupt Sub Mask Clear 15" "No effect,Cleared" bitfld.long 0x04 14. " MSKCLRS0_14 ,Interrupt Sub Mask Clear 14" "No effect,Cleared" textline " " bitfld.long 0x04 13. " MSKCLRS0_13 ,Interrupt Sub Mask Clear 13" "No effect,Cleared" bitfld.long 0x04 12. " MSKCLRS0_12 ,Interrupt Sub Mask Clear 12" "No effect,Cleared" textline " " bitfld.long 0x04 11. " MSKCLRS0_11 ,Interrupt Sub Mask Clear 11" "No effect,Cleared" bitfld.long 0x04 10. " MSKCLRS0_10 ,Interrupt Sub Mask Clear 10" "No effect,Cleared" textline " " bitfld.long 0x04 9. " MSKCLRS0_9 ,Interrupt Sub Mask Clear 9" "No effect,Cleared" bitfld.long 0x04 8. " MSKCLRS0_8 ,Interrupt Sub Mask Clear 8" "No effect,Cleared" textline " " bitfld.long 0x04 7. " MSKCLRS0_7 ,Interrupt Sub Mask Clear 7" "No effect,Cleared" bitfld.long 0x04 6. " MSKCLRS0_6 ,Interrupt Sub Mask Clear 6" "No effect,Cleared" textline " " bitfld.long 0x04 5. " MSKCLRS0_5 ,Interrupt Sub Mask Clear 5" "No effect,Cleared" bitfld.long 0x04 4. " MSKCLRS0_4 ,Interrupt Sub Mask Clear 4" "No effect,Cleared" textline " " bitfld.long 0x04 3. " MSKCLRS0_3 ,Interrupt Sub Mask Clear 3" "No effect,Cleared" bitfld.long 0x04 2. " MSKCLRS0_2 ,Interrupt Sub Mask Clear 2" "No effect,Cleared" textline " " bitfld.long 0x04 1. " MSKCLRS0_1 ,Interrupt Sub Mask Clear 1" "No effect,Cleared" bitfld.long 0x04 0. " MSKCLRS0_0 ,Interrupt Sub Mask Clear 0" "No effect,Cleared" textline " " line.long 0x08 "OUTDTSEL0,Output Data Select Register 0" bitfld.long 0x08 31. " OUTDTSEL0_31 ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL0_30 ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 29. " OUTDTSEL0_29 ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL0_28 ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL0_27 ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL0_26 ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL0_25 ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL0_24 ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 23. " OUTDTSEL0_23 ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL0_22 ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL0_21 ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL0_20 ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " OUTDTSEL0_19 ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL0_18 ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL0_17 ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL0_16 ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 15. " OUTDTSEL0_15 ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL0_14 ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL0_13 ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL0_12 ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 11. " OUTDTSEL0_11 ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL0_10 ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL0_9 ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL0_8 ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " OUTDTSEL0_7 ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL0_6 ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL0_5 ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL0_4 ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 3. " OUTDTSEL0_3 ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL0_2 ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL0_1 ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL0_0 ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline " " line.long 0x0C "OUTDTH0,Output Data High Register 0" bitfld.long 0x0C 31. " OUTDTH0_31 ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH0_30 ,Output Data High 30" "Not valid,Valid" textline " " bitfld.long 0x0C 29. " OUTDTH0_29 ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH0_28 ,Output Data High 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH0_27 ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH0_26 ,Output Data High 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH0_25 ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH0_24 ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " OUTDTH0_23 ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH0_22 ,Output Data High 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH0_21 ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH0_20 ,Output Data High 20" "Not valid,Valid" textline " " bitfld.long 0x0C 19. " OUTDTH0_19 ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH0_18 ,Output Data High 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH0_17 ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH0_16 ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OUTDTH0_15 ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH0_14 ,Output Data High 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH0_13 ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH0_12 ,Output Data High 12" "Not valid,Valid" textline " " bitfld.long 0x0C 11. " OUTDTH0_11 ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH0_10 ,Output Data High 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH0_9 ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH0_8 ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " OUTDTH0_7 ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH0_6 ,Output Data High 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH0_5 ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH0_4 ,Output Data High 4" "Not valid,Valid" textline " " bitfld.long 0x0C 3. " OUTDTH0_3 ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH0_2 ,Output Data High 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH0_1 ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH0_0 ,Output Data High 0" "Not valid,Valid" textline " " line.long 0x10 "OUTDTL0,Output Data Low Register 0" bitfld.long 0x10 31. " OUTDTL0_31 ,Output Data Low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL0_30 ,Output Data Low 30" "Not valid,Valid" textline " " bitfld.long 0x10 29. " OUTDTL0_29 ,Output Data Low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL0_28 ,Output Data Low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL0_27 ,Output Data Low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL0_26 ,Output Data Low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL0_25 ,Output Data Low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL0_24 ,Output Data Low 24" "Not valid,Valid" textline " " bitfld.long 0x10 23. " OUTDTL0_23 ,Output Data Low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL0_22 ,Output Data Low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL0_21 ,Output Data Low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL0_20 ,Output Data Low 20" "Not valid,Valid" textline " " bitfld.long 0x10 19. " OUTDTL0_19 ,Output Data Low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL0_18 ,Output Data Low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL0_17 ,Output Data Low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL0_16 ,Output Data Low 16" "Not valid,Valid" textline " " bitfld.long 0x10 15. " OUTDTL0_15 ,Output Data Low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL0_14 ,Output Data Low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL0_13 ,Output Data Low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL0_12 ,Output Data Low 12" "Not valid,Valid" textline " " bitfld.long 0x10 11. " OUTDTL0_11 ,Output Data Low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL0_10 ,Output Data Low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL0_9 ,Output Data Low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL0_8 ,Output Data Low 8" "Not valid,Valid" textline " " bitfld.long 0x10 7. " OUTDTL0_7 ,Output Data Low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL0_6 ,Output Data Low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL0_5 ,Output Data Low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL0_4 ,Output Data Low 4" "Not valid,Valid" textline " " bitfld.long 0x10 3. " OUTDTL0_3 ,Output Data Low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL0_2 ,Output Data Low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL0_1 ,Output Data Low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL0_0 ,Output Data Low 0" "Not valid,Valid" textline " " line.long 0x14 "BOTHEDGE0,One Edge/Both Edge Select Register 0" bitfld.long 0x14 31. " BOTHEDGE0_31 ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE0_30 ,One Edge/Both Edge Select 30" "One,Both" textline " " bitfld.long 0x14 29. " BOTHEDGE0_29 ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE0_28 ,One Edge/Both Edge Select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE0_27 ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE0_26 ,One Edge/Both Edge Select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE0_25 ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE0_24 ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " BOTHEDGE0_23 ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE0_22 ,One Edge/Both Edge Select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE0_21 ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE0_20 ,One Edge/Both Edge Select 20" "One,Both" textline " " bitfld.long 0x14 19. " BOTHEDGE0_19 ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE0_18 ,One Edge/Both Edge Select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE0_17 ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE0_16 ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " BOTHEDGE0_15 ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE0_14 ,One Edge/Both Edge Select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE0_13 ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE0_12 ,One Edge/Both Edge Select 12" "One,Both" textline " " bitfld.long 0x14 11. " BOTHEDGE0_11 ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE0_10 ,One Edge/Both Edge Select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE0_9 ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE0_8 ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " BOTHEDGE0_7 ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE0_6 ,One Edge/Both Edge Select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE0_5 ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE0_4 ,One Edge/Both Edge Select 4" "One,Both" textline " " bitfld.long 0x14 3. " BOTHEDGE0_3 ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE0_2 ,One Edge/Both Edge Select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE0_1 ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE0_0 ,One Edge/Both Edge Select 0" "One,Both" textline " " width 0xB tree.end tree "GPIO 1" base ad:0xE6051000 width 14. group.long 0x00++0xB line.long 0x00 "IOINTSEL1,General IO/interrupt switching register 0" sif cpu()!="RCARM2" bitfld.long 0x00 29. " IOINTSEL1_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL1_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL1_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL1_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " endif bitfld.long 0x00 25. " IOINTSEL1_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL1_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " IOINTSEL1_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL1_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL1_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL1_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" textline " " bitfld.long 0x00 19. " IOINTSEL1_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL1_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL1_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL1_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " IOINTSEL1_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL1_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL1_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL1_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" textline " " bitfld.long 0x00 11. " IOINTSEL1_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL1_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL1_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL1_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " IOINTSEL1_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL1_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL1_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL1_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" textline " " bitfld.long 0x00 3. " IOINTSEL1_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL1_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL1_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL1_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" textline " " line.long 0x04 "INOUTSEL1,General input/output switching register 0" sif cpu()!="RCARM2" bitfld.long 0x04 29. " INOUTSEL1_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL1_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL1_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL1_26 ,General input or output mode select for channel 26" "Input,Output" textline " " endif bitfld.long 0x04 25. " INOUTSEL1_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL1_24 ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " INOUTSEL1_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL1_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL1_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL1_20 ,General input or output mode select for channel 20" "Input,Output" textline " " bitfld.long 0x04 19. " INOUTSEL1_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL1_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL1_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL1_16 ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " INOUTSEL1_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL1_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL1_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL1_12 ,General input or output mode select for channel 12" "Input,Output" textline " " bitfld.long 0x04 11. " INOUTSEL1_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL1_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL1_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL1_8 ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " INOUTSEL1_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL1_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL1_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL1_4 ,General input or output mode select for channel 4" "Input,Output" textline " " bitfld.long 0x04 3. " INOUTSEL1_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL1_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL1_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL1_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT1,General output register 0" sif cpu()!="RCARM2" bitfld.long 0x08 29. " OUTDT1_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT1_28 ,Output value for channel 28" "0,1" textline " " bitfld.long 0x08 27. " OUTDT1_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT1_26 ,Output value for channel 26" "0,1" textline " " endif bitfld.long 0x08 25. " OUTDT1_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT1_24 ,Output value for channel 24" "0,1" textline " " bitfld.long 0x08 23. " OUTDT1_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT1_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT1_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT1_20 ,Output value for channel 20" "0,1" textline " " bitfld.long 0x08 19. " OUTDT1_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT1_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT1_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT1_16 ,Output value for channel 16" "0,1" textline " " bitfld.long 0x08 15. " OUTDT1_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT1_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT1_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT1_12 ,Output value for channel 12" "0,1" textline " " bitfld.long 0x08 11. " OUTDT1_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT1_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT1_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT1_8 ,Output value for channel 8" "0,1" textline " " bitfld.long 0x08 7. " OUTDT1_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT1_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT1_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT1_4 ,Output value for channel 4" "0,1" textline " " bitfld.long 0x08 3. " OUTDT1_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT1_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT1_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT1_0 ,Output value for channel 0" "0,1" textline " " rgroup.long 0x0C++0x07 line.long 0x00 "INDT1,General input register 1" sif cpu()!="RCARM2" bitfld.long 0x00 29. " INDT1_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT1_28 ,Value received through pin 28" "0,1" textline " " bitfld.long 0x00 27. " INDT1_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT1_26 ,Value received through pin 26" "0,1" textline " " endif bitfld.long 0x00 25. " INDT1_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT1_24 ,Value received through pin 24" "0,1" textline " " bitfld.long 0x00 23. " INDT1_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT1_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT1_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT1_20 ,Value received through pin 20" "0,1" textline " " bitfld.long 0x00 19. " INDT1_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT1_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT1_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT1_16 ,Value received through pin 16" "0,1" textline " " bitfld.long 0x00 15. " INDT1_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT1_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT1_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT1_12 ,Value received through pin 12" "0,1" textline " " bitfld.long 0x00 11. " INDT1_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT1_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT1_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT1_8 ,Value received through pin 8" "0,1" textline " " bitfld.long 0x00 7. " INDT1_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT1_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT1_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT1_4 ,Value received through pin 4" "0,1" textline " " bitfld.long 0x00 3. " INDT1_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT1_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT1_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT1_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT1,Interrupt display register 1" sif cpu()!="RCARM2" bitfld.long 0x04 29. " INTDT1_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT1_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT1_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT1_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 25. " INTDT1_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT1_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " INTDT1_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT1_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT1_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT1_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " INTDT1_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT1_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT1_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT1_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " INTDT1_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT1_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT1_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT1_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " INTDT1_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT1_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT1_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT1_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " INTDT1_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT1_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT1_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT1_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " INTDT1_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT1_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT1_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT1_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" textline " " group.long 0x14++0x17 line.long 0x00 "INTCLR1,Interrupt clear register 1" sif cpu()!="RCARM2" bitfld.long 0x00 29. " INTCLR1_29 ,Clears pin 29 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 28. " INTCLR1_28 ,Clears pin 28 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 27. " INTCLR1_27 ,Clears pin 27 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 26. " INTCLR1_26 ,Clears pin 26 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " endif bitfld.long 0x00 25. " INTCLR1_25 ,Clears pin 25 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 24. " INTCLR1_24 ,Clears pin 24 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 23. " INTCLR1_23 ,Clears pin 23 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 22. " INTCLR1_22 ,Clears pin 22 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 21. " INTCLR1_21 ,Clears pin 21 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 20. " INTCLR1_20 ,Clears pin 20 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 19. " INTCLR1_19 ,Clears pin 19 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 18. " INTCLR1_18 ,Clears pin 18 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " INTCLR1_17 ,Clears pin 17 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 16. " INTCLR1_16 ,Clears pin 16 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 15. " INTCLR1_15 ,Clears pin 15 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 14. " INTCLR1_14 ,Clears pin 14 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 13. " INTCLR1_13 ,Clears pin 13 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 12. " INTCLR1_12 ,Clears pin 12 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 11. " INTCLR1_11 ,Clears pin 11 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 10. " INTCLR1_10 ,Clears pin 10 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " INTCLR1_9 ,Clears pin 9 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 8. " INTCLR1_8 ,Clears pin 8 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " INTCLR1_7 ,Clears pin 7 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 6. " INTCLR1_6 ,Clears pin 6 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " INTCLR1_5 ,Clears pin 5 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 4. " INTCLR1_4 ,Clears pin 4 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " INTCLR1_3 ,Clears pin 3 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 2. " INTCLR1_2 ,Clears pin 2 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " INTCLR1_1 ,Clears pin 1 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 0. " INTCLR1_0 ,Clears pin 0 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " line.long 0x04 "INTMSK1,Interrupt mask register 1" sif cpu()!="RCARM2" bitfld.long 0x04 29. " INTMSK1_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK1_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK1_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK1_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " endif bitfld.long 0x04 25. " INTMSK1_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK1_24 ,Masks interrupt request for pin 24" "Masked,Not masked" textline " " bitfld.long 0x04 23. " INTMSK1_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK1_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK1_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK1_20 ,Masks interrupt request for pin 20" "Masked,Not masked" textline " " bitfld.long 0x04 19. " INTMSK1_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK1_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK1_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK1_16 ,Masks interrupt request for pin 16" "Masked,Not masked" textline " " bitfld.long 0x04 15. " INTMSK1_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK1_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK1_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK1_12 ,Masks interrupt request for pin 12" "Masked,Not masked" textline " " bitfld.long 0x04 11. " INTMSK1_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK1_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK1_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK1_8 ,Masks interrupt request for pin 8" "Masked,Not masked" textline " " bitfld.long 0x04 7. " INTMSK1_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK1_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK1_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK1_4 ,Masks interrupt request for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " INTMSK1_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK1_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK1_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK1_0 ,Masks interrupt request for pin 0" "Masked,Not masked" textline " " line.long 0x08 "MSKCLR1,Interrupt mask clear register 1" sif cpu()!="RCARM2" bitfld.long 0x08 29. " MSKCLR1_29 ,Clears mask for pin 29" "Not cleared,Cleared" bitfld.long 0x08 28. " MSKCLR1_28 ,Clears mask for pin 28" "Not cleared,Cleared" textline " " bitfld.long 0x08 27. " MSKCLR1_27 ,Clears mask for pin 27" "Not cleared,Cleared" bitfld.long 0x08 26. " MSKCLR1_26 ,Clears mask for pin 26" "Not cleared,Cleared" textline " " endif bitfld.long 0x08 25. " MSKCLR1_25 ,Clears mask for pin 25" "Not cleared,Cleared" bitfld.long 0x08 24. " MSKCLR1_24 ,Clears mask for pin 24" "Not cleared,Cleared" textline " " bitfld.long 0x08 23. " MSKCLR1_23 ,Clears mask for pin 23" "Not cleared,Cleared" bitfld.long 0x08 22. " MSKCLR1_22 ,Clears mask for pin 22" "Not cleared,Cleared" textline " " bitfld.long 0x08 21. " MSKCLR1_21 ,Clears mask for pin 21" "Not cleared,Cleared" bitfld.long 0x08 20. " MSKCLR1_20 ,Clears mask for pin 20" "Not cleared,Cleared" textline " " bitfld.long 0x08 19. " MSKCLR1_19 ,Clears mask for pin 19" "Not cleared,Cleared" bitfld.long 0x08 18. " MSKCLR1_18 ,Clears mask for pin 18" "Not cleared,Cleared" textline " " bitfld.long 0x08 17. " MSKCLR1_17 ,Clears mask for pin 17" "Not cleared,Cleared" bitfld.long 0x08 16. " MSKCLR1_16 ,Clears mask for pin 16" "Not cleared,Cleared" textline " " bitfld.long 0x08 15. " MSKCLR1_15 ,Clears mask for pin 15" "Not cleared,Cleared" bitfld.long 0x08 14. " MSKCLR1_14 ,Clears mask for pin 14" "Not cleared,Cleared" textline " " bitfld.long 0x08 13. " MSKCLR1_13 ,Clears mask for pin 13" "Not cleared,Cleared" bitfld.long 0x08 12. " MSKCLR1_12 ,Clears mask for pin 12" "Not cleared,Cleared" textline " " bitfld.long 0x08 11. " MSKCLR1_11 ,Clears mask for pin 11" "Not cleared,Cleared" bitfld.long 0x08 10. " MSKCLR1_10 ,Clears mask for pin 10" "Not cleared,Cleared" textline " " bitfld.long 0x08 9. " MSKCLR1_9 ,Clears mask for pin 9" "Not cleared,Cleared" bitfld.long 0x08 8. " MSKCLR1_8 ,Clears mask for pin 8" "Not cleared,Cleared" textline " " bitfld.long 0x08 7. " MSKCLR1_7 ,Clears mask for pin 7" "Not cleared,Cleared" bitfld.long 0x08 6. " MSKCLR1_6 ,Clears mask for pin 6" "Not cleared,Cleared" textline " " bitfld.long 0x08 5. " MSKCLR1_5 ,Clears mask for pin 5" "Not cleared,Cleared" bitfld.long 0x08 4. " MSKCLR1_4 ,Clears mask for pin 4" "Not cleared,Cleared" textline " " bitfld.long 0x08 3. " MSKCLR1_3 ,Clears mask for pin 3" "Not cleared,Cleared" bitfld.long 0x08 2. " MSKCLR1_2 ,Clears mask for pin 2" "Not cleared,Cleared" textline " " bitfld.long 0x08 1. " MSKCLR1_1 ,Clears mask for pin 1" "Not cleared,Cleared" bitfld.long 0x08 0. " MSKCLR1_0 ,Clears mask for pin 0" "Not cleared,Cleared" textline " " line.long 0x0C "POSNEG1,Positive/negative logic select register 1" sif cpu()!="RCARM2" bitfld.long 0x0C 29. " POSNEG1_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG1_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG1_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG1_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " endif bitfld.long 0x0C 25. " POSNEG1_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG1_24 ,Selects polarity for pin 24" "Positive,Negative" textline " " bitfld.long 0x0C 23. " POSNEG1_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG1_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG1_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG1_20 ,Selects polarity for pin 20" "Positive,Negative" textline " " bitfld.long 0x0C 19. " POSNEG1_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG1_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG1_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG1_16 ,Selects polarity for pin 16" "Positive,Negative" textline " " bitfld.long 0x0C 15. " POSNEG1_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG1_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG1_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG1_12 ,Selects polarity for pin 12" "Positive,Negative" textline " " bitfld.long 0x0C 11. " POSNEG1_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG1_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG1_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG1_8 ,Selects polarity for pin 8" "Positive,Negative" textline " " bitfld.long 0x0C 7. " POSNEG1_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG1_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG1_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG1_4 ,Selects polarity for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " POSNEG1_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG1_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG1_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG1_0 ,Selects polarity for pin 0" "Positive,Negative" textline " " line.long 0x10 "EDGLEVEL1,Edge/level select register 1" sif cpu()!="RCARM2" bitfld.long 0x10 29. " EDGLEVEL1_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL1_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL1_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL1_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " endif bitfld.long 0x10 25. " EDGLEVEL1_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL1_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" textline " " bitfld.long 0x10 23. " EDGLEVEL1_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL1_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL1_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL1_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" textline " " bitfld.long 0x10 19. " EDGLEVEL1_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL1_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL1_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL1_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" textline " " bitfld.long 0x10 15. " EDGLEVEL1_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL1_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL1_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL1_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" textline " " bitfld.long 0x10 11. " EDGLEVEL1_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL1_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL1_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL1_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" textline " " bitfld.long 0x10 7. " EDGLEVEL1_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL1_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL1_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL1_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " EDGLEVEL1_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL1_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL1_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL1_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF1,Chattering prevention on/off register 1" sif cpu()=="RCARM2" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" textline " " endif bitfld.long 0x14 3. " FILONOFF1_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF1_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " FILONOFF1_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF1_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" textline " " group.long 0x38++0x17 line.long 0x00 "INTMSKS1,Interrupt Sub Mask Register 1" sif cpu()!="RCARM2" bitfld.long 0x00 29. " INTMSKS1_29 ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS1_28 ,Interrupt Sub Mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS1_27 ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS1_26 ,Interrupt Sub Mask 26" "Masked,Not masked" textline " " endif bitfld.long 0x00 25. " INTMSKS1_25 ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS1_24 ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " INTMSKS1_23 ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS1_22 ,Interrupt Sub Mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS1_21 ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS1_20 ,Interrupt Sub Mask 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " INTMSKS1_19 ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS1_18 ,Interrupt Sub Mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS1_17 ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS1_16 ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " INTMSKS1_15 ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS1_14 ,Interrupt Sub Mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS1_13 ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS1_12 ,Interrupt Sub Mask 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " INTMSKS1_11 ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS1_10 ,Interrupt Sub Mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS1_9 ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS1_8 ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " INTMSKS1_7 ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS1_6 ,Interrupt Sub Mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS1_5 ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS1_4 ,Interrupt Sub Mask 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " INTMSKS1_3 ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS1_2 ,Interrupt Sub Mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS1_1 ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS1_0 ,Interrupt Sub Mask 0" "Masked,Not masked" textline " " line.long 0x04 "MSKCLRS1,Interrupt Sub Mask Clear Register 1" sif cpu()!="RCARM2" bitfld.long 0x04 29. " MSKCLR1_29 ,Interrupt Sub Mask Clear 29" "No effect,Cleared" bitfld.long 0x04 28. " MSKCLR1_28 ,Interrupt Sub Mask Clear 28" "No effect,Cleared" textline " " bitfld.long 0x04 27. " MSKCLR1_27 ,Interrupt Sub Mask Clear 27" "No effect,Cleared" bitfld.long 0x04 26. " MSKCLR1_26 ,Interrupt Sub Mask Clear 26" "No effect,Cleared" textline " " endif bitfld.long 0x04 25. " MSKCLR1_25 ,Interrupt Sub Mask Clear 25" "No effect,Cleared" bitfld.long 0x04 24. " MSKCLR1_24 ,Interrupt Sub Mask Clear 24" "No effect,Cleared" textline " " bitfld.long 0x04 23. " MSKCLR1_23 ,Interrupt Sub Mask Clear 23" "No effect,Cleared" bitfld.long 0x04 22. " MSKCLR1_22 ,Interrupt Sub Mask Clear 22" "No effect,Cleared" textline " " bitfld.long 0x04 21. " MSKCLR1_21 ,Interrupt Sub Mask Clear 21" "No effect,Cleared" bitfld.long 0x04 20. " MSKCLR1_20 ,Interrupt Sub Mask Clear 20" "No effect,Cleared" textline " " bitfld.long 0x04 19. " MSKCLR1_19 ,Interrupt Sub Mask Clear 19" "No effect,Cleared" bitfld.long 0x04 18. " MSKCLR1_18 ,Interrupt Sub Mask Clear 18" "No effect,Cleared" textline " " bitfld.long 0x04 17. " MSKCLR1_17 ,Interrupt Sub Mask Clear 17" "No effect,Cleared" bitfld.long 0x04 16. " MSKCLR1_16 ,Interrupt Sub Mask Clear 16" "No effect,Cleared" textline " " bitfld.long 0x04 15. " MSKCLR1_15 ,Interrupt Sub Mask Clear 15" "No effect,Cleared" bitfld.long 0x04 14. " MSKCLR1_14 ,Interrupt Sub Mask Clear 14" "No effect,Cleared" textline " " bitfld.long 0x04 13. " MSKCLR1_13 ,Interrupt Sub Mask Clear 13" "No effect,Cleared" bitfld.long 0x04 12. " MSKCLR1_12 ,Interrupt Sub Mask Clear 12" "No effect,Cleared" textline " " bitfld.long 0x04 11. " MSKCLR1_11 ,Interrupt Sub Mask Clear 11" "No effect,Cleared" bitfld.long 0x04 10. " MSKCLR1_10 ,Interrupt Sub Mask Clear 10" "No effect,Cleared" textline " " bitfld.long 0x04 9. " MSKCLR1_9 ,Interrupt Sub Mask Clear 9" "No effect,Cleared" bitfld.long 0x04 8. " MSKCLR1_8 ,Interrupt Sub Mask Clear 8" "No effect,Cleared" textline " " bitfld.long 0x04 7. " MSKCLR1_7 ,Interrupt Sub Mask Clear 7" "No effect,Cleared" bitfld.long 0x04 6. " MSKCLR1_6 ,Interrupt Sub Mask Clear 6" "No effect,Cleared" textline " " bitfld.long 0x04 5. " MSKCLR1_5 ,Interrupt Sub Mask Clear 5" "No effect,Cleared" bitfld.long 0x04 4. " MSKCLR1_4 ,Interrupt Sub Mask Clear 4" "No effect,Cleared" textline " " bitfld.long 0x04 3. " MSKCLR1_3 ,Interrupt Sub Mask Clear 3" "No effect,Cleared" bitfld.long 0x04 2. " MSKCLR1_2 ,Interrupt Sub Mask Clear 2" "No effect,Cleared" textline " " bitfld.long 0x04 1. " MSKCLR1_1 ,Interrupt Sub Mask Clear 1" "No effect,Cleared" bitfld.long 0x04 0. " MSKCLR1_0 ,Interrupt Sub Mask Clear 0" "No effect,Cleared" textline " " line.long 0x08 "OUTDTSEL1,Output Data Select Register 1" sif cpu()!="RCARM2" bitfld.long 0x08 29. " OUTDTSEL1_29 ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL1_28 ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL1_27 ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL1_26 ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " endif bitfld.long 0x08 25. " OUTDTSEL1_25 ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL1_24 ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 23. " OUTDTSEL1_23 ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL1_22 ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL1_21 ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL1_20 ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " OUTDTSEL1_19 ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL1_18 ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL1_17 ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL1_16 ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 15. " OUTDTSEL1_15 ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL1_14 ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL1_13 ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL1_12 ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 11. " OUTDTSEL1_11 ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL1_10 ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL1_9 ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL1_8 ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " OUTDTSEL1_7 ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL1_6 ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL1_5 ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL1_4 ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 3. " OUTDTSEL1_3 ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL1_2 ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL1_1 ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL1_0 ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline " " line.long 0x0C "OUTDTH1,Output Data High Register 1" sif cpu()!="RCARM2" bitfld.long 0x0C 29. " OUTDTH1_29 ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH1_28 ,Output Data High 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH1_27 ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH1_26 ,Output Data High 26" "Not valid,Valid" textline " " endif bitfld.long 0x0C 25. " OUTDTH1_25 ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH1_24 ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " OUTDTH1_23 ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH1_22 ,Output Data High 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH1_21 ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH1_20 ,Output Data High 20" "Not valid,Valid" textline " " bitfld.long 0x0C 19. " OUTDTH1_19 ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH1_18 ,Output Data High 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH1_17 ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH1_16 ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OUTDTH1_15 ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH1_14 ,Output Data High 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH1_13 ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH1_12 ,Output Data High 12" "Not valid,Valid" textline " " bitfld.long 0x0C 11. " OUTDTH1_11 ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH1_10 ,Output Data High 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH1_9 ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH1_8 ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " OUTDTH1_7 ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH1_6 ,Output Data High 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH1_5 ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH1_4 ,Output Data High 4" "Not valid,Valid" textline " " bitfld.long 0x0C 3. " OUTDTH1_3 ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH1_2 ,Output Data High 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH1_1 ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH1_0 ,Output Data High 0" "Not valid,Valid" textline " " line.long 0x10 "OUTDTL1,Output Data Low Register 1" sif cpu()!="RCARM2" bitfld.long 0x10 29. " OUTDTL1_29 ,Output Data Low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL1_28 ,Output Data Low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL1_27 ,Output Data Low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL1_26 ,Output Data Low 26" "Not valid,Valid" textline " " endif bitfld.long 0x10 25. " OUTDTL1_25 ,Output Data Low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL1_24 ,Output Data Low 24" "Not valid,Valid" textline " " bitfld.long 0x10 23. " OUTDTL1_23 ,Output Data Low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL1_22 ,Output Data Low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL1_21 ,Output Data Low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL1_20 ,Output Data Low 20" "Not valid,Valid" textline " " bitfld.long 0x10 19. " OUTDTL1_19 ,Output Data Low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL1_18 ,Output Data Low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL1_17 ,Output Data Low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL1_16 ,Output Data Low 16" "Not valid,Valid" textline " " bitfld.long 0x10 15. " OUTDTL1_15 ,Output Data Low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL1_14 ,Output Data Low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL1_13 ,Output Data Low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL1_12 ,Output Data Low 12" "Not valid,Valid" textline " " bitfld.long 0x10 11. " OUTDTL1_11 ,Output Data Low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL1_10 ,Output Data Low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL1_9 ,Output Data Low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL1_8 ,Output Data Low 8" "Not valid,Valid" textline " " bitfld.long 0x10 7. " OUTDTL1_7 ,Output Data Low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL1_6 ,Output Data Low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL1_5 ,Output Data Low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL1_4 ,Output Data Low 4" "Not valid,Valid" textline " " bitfld.long 0x10 3. " OUTDTL1_3 ,Output Data Low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL1_2 ,Output Data Low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL1_1 ,Output Data Low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL1_0 ,Output Data Low 0" "Not valid,Valid" textline " " line.long 0x14 "BOTHEDGE1,One Edge/Both Edge Select Register 1" sif cpu()!="RCARM2" bitfld.long 0x14 29. " BOTHEDGE1_29 ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE1_28 ,One Edge/Both Edge Select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE1_27 ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE1_26 ,One Edge/Both Edge Select 26" "One,Both" textline " " endif bitfld.long 0x14 25. " BOTHEDGE1_25 ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE1_24 ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " BOTHEDGE1_23 ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE1_22 ,One Edge/Both Edge Select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE1_21 ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE1_20 ,One Edge/Both Edge Select 20" "One,Both" textline " " bitfld.long 0x14 19. " BOTHEDGE1_19 ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE1_18 ,One Edge/Both Edge Select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE1_17 ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE1_16 ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " BOTHEDGE1_15 ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE1_14 ,One Edge/Both Edge Select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE1_13 ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE1_12 ,One Edge/Both Edge Select 12" "One,Both" textline " " bitfld.long 0x14 11. " BOTHEDGE1_11 ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE1_10 ,One Edge/Both Edge Select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE1_9 ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE1_8 ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " BOTHEDGE1_7 ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE1_6 ,One Edge/Both Edge Select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE1_5 ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE1_4 ,One Edge/Both Edge Select 4" "One,Both" textline " " bitfld.long 0x14 3. " BOTHEDGE1_3 ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE1_2 ,One Edge/Both Edge Select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE1_1 ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE1_0 ,One Edge/Both Edge Select 0" "One,Both" textline " " width 0xB tree.end tree "GPIO 2" base ad:0xE6052000 width 14. group.long 0x00++0xB line.long 0x00 "IOINTSEL2,General IO/interrupt switching register 0" sif cpu()!="RCARM2" bitfld.long 0x00 29. " IOINTSEL2_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL2_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL2_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL2_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " endif bitfld.long 0x00 25. " IOINTSEL2_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL2_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " IOINTSEL2_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL2_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL2_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL2_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" textline " " bitfld.long 0x00 19. " IOINTSEL2_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL2_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL2_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL2_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " IOINTSEL2_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL2_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL2_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL2_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" textline " " bitfld.long 0x00 11. " IOINTSEL2_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL2_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL2_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL2_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " IOINTSEL2_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL2_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL2_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL2_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" textline " " bitfld.long 0x00 3. " IOINTSEL2_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL2_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL2_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL2_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" textline " " line.long 0x04 "INOUTSEL2,General input/output switching register 0" sif cpu()!="RCARM2" bitfld.long 0x04 29. " INOUTSEL2_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL2_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL2_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL2_26 ,General input or output mode select for channel 26" "Input,Output" textline " " endif bitfld.long 0x04 25. " INOUTSEL2_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL2_24 ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " INOUTSEL2_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL2_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL2_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL2_20 ,General input or output mode select for channel 20" "Input,Output" textline " " bitfld.long 0x04 19. " INOUTSEL2_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL2_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL2_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL2_16 ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " INOUTSEL2_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL2_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL2_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL2_12 ,General input or output mode select for channel 12" "Input,Output" textline " " bitfld.long 0x04 11. " INOUTSEL2_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL2_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL2_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL2_8 ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " INOUTSEL2_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL2_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL2_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL2_4 ,General input or output mode select for channel 4" "Input,Output" textline " " bitfld.long 0x04 3. " INOUTSEL2_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL2_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL2_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL2_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT2,General output register 0" sif cpu()!="RCARM2" bitfld.long 0x08 29. " OUTDT2_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT2_28 ,Output value for channel 28" "0,1" textline " " bitfld.long 0x08 27. " OUTDT2_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT2_26 ,Output value for channel 26" "0,1" textline " " endif bitfld.long 0x08 25. " OUTDT2_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT2_24 ,Output value for channel 24" "0,1" textline " " bitfld.long 0x08 23. " OUTDT2_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT2_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT2_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT2_20 ,Output value for channel 20" "0,1" textline " " bitfld.long 0x08 19. " OUTDT2_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT2_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT2_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT2_16 ,Output value for channel 16" "0,1" textline " " bitfld.long 0x08 15. " OUTDT2_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT2_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT2_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT2_12 ,Output value for channel 12" "0,1" textline " " bitfld.long 0x08 11. " OUTDT2_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT2_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT2_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT2_8 ,Output value for channel 8" "0,1" textline " " bitfld.long 0x08 7. " OUTDT2_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT2_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT2_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT2_4 ,Output value for channel 4" "0,1" textline " " bitfld.long 0x08 3. " OUTDT2_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT2_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT2_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT2_0 ,Output value for channel 0" "0,1" textline " " rgroup.long 0x0C++0x07 line.long 0x00 "INDT2,General input register 2" sif cpu()!="RCARM2" bitfld.long 0x00 29. " INDT2_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT2_28 ,Value received through pin 28" "0,1" textline " " bitfld.long 0x00 27. " INDT2_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT2_26 ,Value received through pin 26" "0,1" textline " " endif bitfld.long 0x00 25. " INDT2_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT2_24 ,Value received through pin 24" "0,1" textline " " bitfld.long 0x00 23. " INDT2_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT2_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT2_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT2_20 ,Value received through pin 20" "0,1" textline " " bitfld.long 0x00 19. " INDT2_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT2_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT2_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT2_16 ,Value received through pin 16" "0,1" textline " " bitfld.long 0x00 15. " INDT2_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT2_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT2_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT2_12 ,Value received through pin 12" "0,1" textline " " bitfld.long 0x00 11. " INDT2_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT2_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT2_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT2_8 ,Value received through pin 8" "0,1" textline " " bitfld.long 0x00 7. " INDT2_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT2_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT2_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT2_4 ,Value received through pin 4" "0,1" textline " " bitfld.long 0x00 3. " INDT2_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT2_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT2_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT2_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT2,Interrupt display register 2" sif cpu()!="RCARM2" bitfld.long 0x04 29. " INTDT2_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT2_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT2_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT2_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 25. " INTDT2_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT2_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " INTDT2_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT2_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT2_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT2_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " INTDT2_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT2_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT2_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT2_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " INTDT2_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT2_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT2_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT2_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " INTDT2_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT2_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT2_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT2_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " INTDT2_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT2_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT2_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT2_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " INTDT2_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT2_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT2_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT2_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" textline " " group.long 0x14++0x17 line.long 0x00 "INTCLR2,Interrupt clear register 2" sif cpu()!="RCARM2" bitfld.long 0x00 29. " INTCLR2_29 ,Clears pin 29 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 28. " INTCLR2_28 ,Clears pin 28 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 27. " INTCLR2_27 ,Clears pin 27 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 26. " INTCLR2_26 ,Clears pin 26 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " endif bitfld.long 0x00 25. " INTCLR2_25 ,Clears pin 25 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 24. " INTCLR2_24 ,Clears pin 24 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 23. " INTCLR2_23 ,Clears pin 23 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 22. " INTCLR2_22 ,Clears pin 22 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 21. " INTCLR2_21 ,Clears pin 21 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 20. " INTCLR2_20 ,Clears pin 20 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 19. " INTCLR2_19 ,Clears pin 19 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 18. " INTCLR2_18 ,Clears pin 18 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " INTCLR2_17 ,Clears pin 17 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 16. " INTCLR2_16 ,Clears pin 16 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 15. " INTCLR2_15 ,Clears pin 15 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 14. " INTCLR2_14 ,Clears pin 14 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 13. " INTCLR2_13 ,Clears pin 13 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 12. " INTCLR2_12 ,Clears pin 12 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 11. " INTCLR2_11 ,Clears pin 11 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 10. " INTCLR2_10 ,Clears pin 10 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " INTCLR2_9 ,Clears pin 9 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 8. " INTCLR2_8 ,Clears pin 8 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " INTCLR2_7 ,Clears pin 7 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 6. " INTCLR2_6 ,Clears pin 6 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " INTCLR2_5 ,Clears pin 5 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 4. " INTCLR2_4 ,Clears pin 4 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " INTCLR2_3 ,Clears pin 3 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 2. " INTCLR2_2 ,Clears pin 2 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " INTCLR2_1 ,Clears pin 1 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 0. " INTCLR2_0 ,Clears pin 0 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " line.long 0x04 "INTMSK2,Interrupt mask register 2" sif cpu()!="RCARM2" bitfld.long 0x04 29. " INTMSK2_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK2_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK2_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK2_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " endif bitfld.long 0x04 25. " INTMSK2_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK2_24 ,Masks interrupt request for pin 24" "Masked,Not masked" textline " " bitfld.long 0x04 23. " INTMSK2_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK2_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK2_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK2_20 ,Masks interrupt request for pin 20" "Masked,Not masked" textline " " bitfld.long 0x04 19. " INTMSK2_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK2_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK2_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK2_16 ,Masks interrupt request for pin 16" "Masked,Not masked" textline " " bitfld.long 0x04 15. " INTMSK2_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK2_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK2_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK2_12 ,Masks interrupt request for pin 12" "Masked,Not masked" textline " " bitfld.long 0x04 11. " INTMSK2_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK2_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK2_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK2_8 ,Masks interrupt request for pin 8" "Masked,Not masked" textline " " bitfld.long 0x04 7. " INTMSK2_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK2_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK2_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK2_4 ,Masks interrupt request for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " INTMSK2_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK2_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK2_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK2_0 ,Masks interrupt request for pin 0" "Masked,Not masked" textline " " line.long 0x08 "MSKCLR2,Interrupt mask clear register 2" sif cpu()!="RCARM2" bitfld.long 0x08 29. " MSKCLR2_29 ,Clears mask for pin 29" "Not cleared,Cleared" bitfld.long 0x08 28. " MSKCLR2_28 ,Clears mask for pin 28" "Not cleared,Cleared" textline " " bitfld.long 0x08 27. " MSKCLR2_27 ,Clears mask for pin 27" "Not cleared,Cleared" bitfld.long 0x08 26. " MSKCLR2_26 ,Clears mask for pin 26" "Not cleared,Cleared" textline " " endif bitfld.long 0x08 25. " MSKCLR2_25 ,Clears mask for pin 25" "Not cleared,Cleared" bitfld.long 0x08 24. " MSKCLR2_24 ,Clears mask for pin 24" "Not cleared,Cleared" textline " " bitfld.long 0x08 23. " MSKCLR2_23 ,Clears mask for pin 23" "Not cleared,Cleared" bitfld.long 0x08 22. " MSKCLR2_22 ,Clears mask for pin 22" "Not cleared,Cleared" textline " " bitfld.long 0x08 21. " MSKCLR2_21 ,Clears mask for pin 21" "Not cleared,Cleared" bitfld.long 0x08 20. " MSKCLR2_20 ,Clears mask for pin 20" "Not cleared,Cleared" textline " " bitfld.long 0x08 19. " MSKCLR2_19 ,Clears mask for pin 19" "Not cleared,Cleared" bitfld.long 0x08 18. " MSKCLR2_18 ,Clears mask for pin 18" "Not cleared,Cleared" textline " " bitfld.long 0x08 17. " MSKCLR2_17 ,Clears mask for pin 17" "Not cleared,Cleared" bitfld.long 0x08 16. " MSKCLR2_16 ,Clears mask for pin 16" "Not cleared,Cleared" textline " " bitfld.long 0x08 15. " MSKCLR2_15 ,Clears mask for pin 15" "Not cleared,Cleared" bitfld.long 0x08 14. " MSKCLR2_14 ,Clears mask for pin 14" "Not cleared,Cleared" textline " " bitfld.long 0x08 13. " MSKCLR2_13 ,Clears mask for pin 13" "Not cleared,Cleared" bitfld.long 0x08 12. " MSKCLR2_12 ,Clears mask for pin 12" "Not cleared,Cleared" textline " " bitfld.long 0x08 11. " MSKCLR2_11 ,Clears mask for pin 11" "Not cleared,Cleared" bitfld.long 0x08 10. " MSKCLR2_10 ,Clears mask for pin 10" "Not cleared,Cleared" textline " " bitfld.long 0x08 9. " MSKCLR2_9 ,Clears mask for pin 9" "Not cleared,Cleared" bitfld.long 0x08 8. " MSKCLR2_8 ,Clears mask for pin 8" "Not cleared,Cleared" textline " " bitfld.long 0x08 7. " MSKCLR2_7 ,Clears mask for pin 7" "Not cleared,Cleared" bitfld.long 0x08 6. " MSKCLR2_6 ,Clears mask for pin 6" "Not cleared,Cleared" textline " " bitfld.long 0x08 5. " MSKCLR2_5 ,Clears mask for pin 5" "Not cleared,Cleared" bitfld.long 0x08 4. " MSKCLR2_4 ,Clears mask for pin 4" "Not cleared,Cleared" textline " " bitfld.long 0x08 3. " MSKCLR2_3 ,Clears mask for pin 3" "Not cleared,Cleared" bitfld.long 0x08 2. " MSKCLR2_2 ,Clears mask for pin 2" "Not cleared,Cleared" textline " " bitfld.long 0x08 1. " MSKCLR2_1 ,Clears mask for pin 1" "Not cleared,Cleared" bitfld.long 0x08 0. " MSKCLR2_0 ,Clears mask for pin 0" "Not cleared,Cleared" textline " " line.long 0x0C "POSNEG2,Positive/negative logic select register 2" sif cpu()!="RCARM2" bitfld.long 0x0C 29. " POSNEG2_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG2_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG2_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG2_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " endif bitfld.long 0x0C 25. " POSNEG2_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG2_24 ,Selects polarity for pin 24" "Positive,Negative" textline " " bitfld.long 0x0C 23. " POSNEG2_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG2_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG2_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG2_20 ,Selects polarity for pin 20" "Positive,Negative" textline " " bitfld.long 0x0C 19. " POSNEG2_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG2_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG2_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG2_16 ,Selects polarity for pin 16" "Positive,Negative" textline " " bitfld.long 0x0C 15. " POSNEG2_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG2_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG2_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG2_12 ,Selects polarity for pin 12" "Positive,Negative" textline " " bitfld.long 0x0C 11. " POSNEG2_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG2_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG2_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG2_8 ,Selects polarity for pin 8" "Positive,Negative" textline " " bitfld.long 0x0C 7. " POSNEG2_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG2_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG2_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG2_4 ,Selects polarity for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " POSNEG2_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG2_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG2_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG2_0 ,Selects polarity for pin 0" "Positive,Negative" textline " " line.long 0x10 "EDGLEVEL2,Edge/level select register 2" sif cpu()!="RCARM2" bitfld.long 0x10 29. " EDGLEVEL2_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL2_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL2_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL2_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " endif bitfld.long 0x10 25. " EDGLEVEL2_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL2_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" textline " " bitfld.long 0x10 23. " EDGLEVEL2_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL2_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL2_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL2_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" textline " " bitfld.long 0x10 19. " EDGLEVEL2_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL2_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL2_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL2_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" textline " " bitfld.long 0x10 15. " EDGLEVEL2_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL2_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL2_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL2_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" textline " " bitfld.long 0x10 11. " EDGLEVEL2_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL2_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL2_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL2_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" textline " " bitfld.long 0x10 7. " EDGLEVEL2_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL2_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL2_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL2_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " EDGLEVEL2_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL2_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL2_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL2_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF2,Chattering prevention on/off register 2" sif cpu()=="RCARM2" bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" textline " " endif bitfld.long 0x14 3. " FILONOFF2_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF2_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " FILONOFF2_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF2_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" textline " " group.long 0x38++0x17 line.long 0x00 "INTMSKS2,Interrupt Sub Mask Register 2" sif cpu()!="RCARM2" bitfld.long 0x00 29. " INTMSKS2_29 ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS2_28 ,Interrupt Sub Mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS2_27 ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS2_26 ,Interrupt Sub Mask 26" "Masked,Not masked" textline " " endif bitfld.long 0x00 25. " INTMSKS2_25 ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS2_24 ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " INTMSKS2_23 ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS2_22 ,Interrupt Sub Mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS2_21 ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS2_20 ,Interrupt Sub Mask 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " INTMSKS2_19 ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS2_18 ,Interrupt Sub Mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS2_17 ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS2_16 ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " INTMSKS2_15 ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS2_14 ,Interrupt Sub Mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS2_13 ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS2_12 ,Interrupt Sub Mask 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " INTMSKS2_11 ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS2_10 ,Interrupt Sub Mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS2_9 ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS2_8 ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " INTMSKS2_7 ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS2_6 ,Interrupt Sub Mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS2_5 ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS2_4 ,Interrupt Sub Mask 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " INTMSKS2_3 ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS2_2 ,Interrupt Sub Mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS2_1 ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS2_0 ,Interrupt Sub Mask 0" "Masked,Not masked" textline " " line.long 0x04 "MSKCLRS2,Interrupt Sub Mask Clear Register 2" sif cpu()!="RCARM2" bitfld.long 0x04 29. " MSKCLR2_29 ,Interrupt Sub Mask Clear 29" "No effect,Cleared" bitfld.long 0x04 28. " MSKCLR2_28 ,Interrupt Sub Mask Clear 28" "No effect,Cleared" textline " " bitfld.long 0x04 27. " MSKCLR2_27 ,Interrupt Sub Mask Clear 27" "No effect,Cleared" bitfld.long 0x04 26. " MSKCLR2_26 ,Interrupt Sub Mask Clear 26" "No effect,Cleared" textline " " endif bitfld.long 0x04 25. " MSKCLR2_25 ,Interrupt Sub Mask Clear 25" "No effect,Cleared" bitfld.long 0x04 24. " MSKCLR2_24 ,Interrupt Sub Mask Clear 24" "No effect,Cleared" textline " " bitfld.long 0x04 23. " MSKCLR2_23 ,Interrupt Sub Mask Clear 23" "No effect,Cleared" bitfld.long 0x04 22. " MSKCLR2_22 ,Interrupt Sub Mask Clear 22" "No effect,Cleared" textline " " bitfld.long 0x04 21. " MSKCLR2_21 ,Interrupt Sub Mask Clear 21" "No effect,Cleared" bitfld.long 0x04 20. " MSKCLR2_20 ,Interrupt Sub Mask Clear 20" "No effect,Cleared" textline " " bitfld.long 0x04 19. " MSKCLR2_19 ,Interrupt Sub Mask Clear 19" "No effect,Cleared" bitfld.long 0x04 18. " MSKCLR2_18 ,Interrupt Sub Mask Clear 18" "No effect,Cleared" textline " " bitfld.long 0x04 17. " MSKCLR2_17 ,Interrupt Sub Mask Clear 17" "No effect,Cleared" bitfld.long 0x04 16. " MSKCLR2_16 ,Interrupt Sub Mask Clear 16" "No effect,Cleared" textline " " bitfld.long 0x04 15. " MSKCLR2_15 ,Interrupt Sub Mask Clear 15" "No effect,Cleared" bitfld.long 0x04 14. " MSKCLR2_14 ,Interrupt Sub Mask Clear 14" "No effect,Cleared" textline " " bitfld.long 0x04 13. " MSKCLR2_13 ,Interrupt Sub Mask Clear 13" "No effect,Cleared" bitfld.long 0x04 12. " MSKCLR2_12 ,Interrupt Sub Mask Clear 12" "No effect,Cleared" textline " " bitfld.long 0x04 11. " MSKCLR2_11 ,Interrupt Sub Mask Clear 11" "No effect,Cleared" bitfld.long 0x04 10. " MSKCLR2_10 ,Interrupt Sub Mask Clear 10" "No effect,Cleared" textline " " bitfld.long 0x04 9. " MSKCLR2_9 ,Interrupt Sub Mask Clear 9" "No effect,Cleared" bitfld.long 0x04 8. " MSKCLR2_8 ,Interrupt Sub Mask Clear 8" "No effect,Cleared" textline " " bitfld.long 0x04 7. " MSKCLR2_7 ,Interrupt Sub Mask Clear 7" "No effect,Cleared" bitfld.long 0x04 6. " MSKCLR2_6 ,Interrupt Sub Mask Clear 6" "No effect,Cleared" textline " " bitfld.long 0x04 5. " MSKCLR2_5 ,Interrupt Sub Mask Clear 5" "No effect,Cleared" bitfld.long 0x04 4. " MSKCLR2_4 ,Interrupt Sub Mask Clear 4" "No effect,Cleared" textline " " bitfld.long 0x04 3. " MSKCLR2_3 ,Interrupt Sub Mask Clear 3" "No effect,Cleared" bitfld.long 0x04 2. " MSKCLR2_2 ,Interrupt Sub Mask Clear 2" "No effect,Cleared" textline " " bitfld.long 0x04 1. " MSKCLR2_1 ,Interrupt Sub Mask Clear 1" "No effect,Cleared" bitfld.long 0x04 0. " MSKCLR2_0 ,Interrupt Sub Mask Clear 0" "No effect,Cleared" textline " " line.long 0x08 "OUTDTSEL2,Output Data Select Register 2" sif cpu()!="RCARM2" bitfld.long 0x08 29. " OUTDTSEL2_29 ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL2_28 ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL2_27 ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL2_26 ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " endif bitfld.long 0x08 25. " OUTDTSEL2_25 ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL2_24 ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 23. " OUTDTSEL2_23 ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL2_22 ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL2_21 ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL2_20 ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " OUTDTSEL2_19 ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL2_18 ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL2_17 ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL2_16 ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 15. " OUTDTSEL2_15 ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL2_14 ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL2_13 ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL2_12 ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 11. " OUTDTSEL2_11 ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL2_10 ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL2_9 ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL2_8 ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " OUTDTSEL2_7 ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL2_6 ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL2_5 ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL2_4 ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 3. " OUTDTSEL2_3 ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL2_2 ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL2_1 ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL2_0 ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline " " line.long 0x0C "OUTDTH2,Output Data High Register 2" sif cpu()!="RCARM2" bitfld.long 0x0C 29. " OUTDTH2_29 ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH2_28 ,Output Data High 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH2_27 ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH2_26 ,Output Data High 26" "Not valid,Valid" textline " " endif bitfld.long 0x0C 25. " OUTDTH2_25 ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH2_24 ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " OUTDTH2_23 ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH2_22 ,Output Data High 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH2_21 ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH2_20 ,Output Data High 20" "Not valid,Valid" textline " " bitfld.long 0x0C 19. " OUTDTH2_19 ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH2_18 ,Output Data High 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH2_17 ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH2_16 ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OUTDTH2_15 ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH2_14 ,Output Data High 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH2_13 ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH2_12 ,Output Data High 12" "Not valid,Valid" textline " " bitfld.long 0x0C 11. " OUTDTH2_11 ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH2_10 ,Output Data High 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH2_9 ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH2_8 ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " OUTDTH2_7 ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH2_6 ,Output Data High 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH2_5 ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH2_4 ,Output Data High 4" "Not valid,Valid" textline " " bitfld.long 0x0C 3. " OUTDTH2_3 ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH2_2 ,Output Data High 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH2_1 ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH2_0 ,Output Data High 0" "Not valid,Valid" textline " " line.long 0x10 "OUTDTL2,Output Data Low Register 2" sif cpu()!="RCARM2" bitfld.long 0x10 29. " OUTDTL2_29 ,Output Data Low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL2_28 ,Output Data Low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL2_27 ,Output Data Low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL2_26 ,Output Data Low 26" "Not valid,Valid" textline " " endif bitfld.long 0x10 25. " OUTDTL2_25 ,Output Data Low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL2_24 ,Output Data Low 24" "Not valid,Valid" textline " " bitfld.long 0x10 23. " OUTDTL2_23 ,Output Data Low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL2_22 ,Output Data Low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL2_21 ,Output Data Low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL2_20 ,Output Data Low 20" "Not valid,Valid" textline " " bitfld.long 0x10 19. " OUTDTL2_19 ,Output Data Low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL2_18 ,Output Data Low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL2_17 ,Output Data Low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL2_16 ,Output Data Low 16" "Not valid,Valid" textline " " bitfld.long 0x10 15. " OUTDTL2_15 ,Output Data Low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL2_14 ,Output Data Low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL2_13 ,Output Data Low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL2_12 ,Output Data Low 12" "Not valid,Valid" textline " " bitfld.long 0x10 11. " OUTDTL2_11 ,Output Data Low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL2_10 ,Output Data Low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL2_9 ,Output Data Low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL2_8 ,Output Data Low 8" "Not valid,Valid" textline " " bitfld.long 0x10 7. " OUTDTL2_7 ,Output Data Low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL2_6 ,Output Data Low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL2_5 ,Output Data Low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL2_4 ,Output Data Low 4" "Not valid,Valid" textline " " bitfld.long 0x10 3. " OUTDTL2_3 ,Output Data Low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL2_2 ,Output Data Low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL2_1 ,Output Data Low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL2_0 ,Output Data Low 0" "Not valid,Valid" textline " " line.long 0x14 "BOTHEDGE2,One Edge/Both Edge Select Register 2" sif cpu()!="RCARM2" bitfld.long 0x14 29. " BOTHEDGE2_29 ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE2_28 ,One Edge/Both Edge Select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE2_27 ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE2_26 ,One Edge/Both Edge Select 26" "One,Both" textline " " endif bitfld.long 0x14 25. " BOTHEDGE2_25 ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE2_24 ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " BOTHEDGE2_23 ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE2_22 ,One Edge/Both Edge Select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE2_21 ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE2_20 ,One Edge/Both Edge Select 20" "One,Both" textline " " bitfld.long 0x14 19. " BOTHEDGE2_19 ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE2_18 ,One Edge/Both Edge Select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE2_17 ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE2_16 ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " BOTHEDGE2_15 ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE2_14 ,One Edge/Both Edge Select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE2_13 ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE2_12 ,One Edge/Both Edge Select 12" "One,Both" textline " " bitfld.long 0x14 11. " BOTHEDGE2_11 ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE2_10 ,One Edge/Both Edge Select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE2_9 ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE2_8 ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " BOTHEDGE2_7 ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE2_6 ,One Edge/Both Edge Select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE2_5 ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE2_4 ,One Edge/Both Edge Select 4" "One,Both" textline " " bitfld.long 0x14 3. " BOTHEDGE2_3 ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE2_2 ,One Edge/Both Edge Select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE2_1 ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE2_0 ,One Edge/Both Edge Select 0" "One,Both" textline " " width 0xB tree.end tree "GPIO 3" base ad:0xE6053000 width 14. group.long 0x00++0xB line.long 0x00 "IOINTSEL3,General IO/interrupt switching register 3" bitfld.long 0x00 31. " IOINTSEL3_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL3_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" textline " " bitfld.long 0x00 29. " IOINTSEL3_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL3_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL3_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL3_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL3_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL3_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " IOINTSEL3_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL3_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL3_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL3_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" textline " " bitfld.long 0x00 19. " IOINTSEL3_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL3_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL3_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL3_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " IOINTSEL3_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL3_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL3_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL3_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" textline " " bitfld.long 0x00 11. " IOINTSEL3_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL3_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL3_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL3_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " IOINTSEL3_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL3_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL3_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL3_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" textline " " bitfld.long 0x00 3. " IOINTSEL3_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL3_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL3_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL3_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" textline " " line.long 0x04 "INOUTSEL3,General input/output switching register 3" bitfld.long 0x04 31. " INOUTSEL3_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL3_30 ,General input or output mode select for channel 30" "Input,Output" textline " " bitfld.long 0x04 29. " INOUTSEL3_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL3_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL3_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL3_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL3_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL3_24 ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " INOUTSEL3_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL3_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL3_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL3_20 ,General input or output mode select for channel 20" "Input,Output" textline " " bitfld.long 0x04 19. " INOUTSEL3_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL3_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL3_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL3_16 ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " INOUTSEL3_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL3_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL3_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL3_12 ,General input or output mode select for channel 12" "Input,Output" textline " " bitfld.long 0x04 11. " INOUTSEL3_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL3_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL3_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL3_8 ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " INOUTSEL3_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL3_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL3_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL3_4 ,General input or output mode select for channel 4" "Input,Output" textline " " bitfld.long 0x04 3. " INOUTSEL3_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL3_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL3_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL3_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT3,General output register 3" bitfld.long 0x08 31. " OUTDT3_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT3_30 ,Output value for channel 30" "0,1" textline " " bitfld.long 0x08 29. " OUTDT3_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT3_28 ,Output value for channel 28" "0,1" textline " " bitfld.long 0x08 27. " OUTDT3_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT3_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT3_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT3_24 ,Output value for channel 24" "0,1" textline " " bitfld.long 0x08 23. " OUTDT3_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT3_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT3_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT3_20 ,Output value for channel 20" "0,1" textline " " bitfld.long 0x08 19. " OUTDT3_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT3_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT3_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT3_16 ,Output value for channel 16" "0,1" textline " " bitfld.long 0x08 15. " OUTDT3_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT3_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT3_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT3_12 ,Output value for channel 12" "0,1" textline " " bitfld.long 0x08 11. " OUTDT3_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT3_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT3_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT3_8 ,Output value for channel 8" "0,1" textline " " bitfld.long 0x08 7. " OUTDT3_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT3_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT3_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT3_4 ,Output value for channel 4" "0,1" textline " " bitfld.long 0x08 3. " OUTDT3_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT3_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT3_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT3_0 ,Output value for channel 0" "0,1" textline " " rgroup.long 0x0C++0x07 line.long 0x00 "INDT3,General input register 3" bitfld.long 0x00 31. " INDT3_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT3_30 ,Value received through pin 30" "0,1" textline " " bitfld.long 0x00 29. " INDT3_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT3_28 ,Value received through pin 28" "0,1" textline " " bitfld.long 0x00 27. " INDT3_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT3_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT3_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT3_24 ,Value received through pin 24" "0,1" textline " " bitfld.long 0x00 23. " INDT3_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT3_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT3_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT3_20 ,Value received through pin 20" "0,1" textline " " bitfld.long 0x00 19. " INDT3_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT3_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT3_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT3_16 ,Value received through pin 16" "0,1" textline " " bitfld.long 0x00 15. " INDT3_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT3_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT3_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT3_12 ,Value received through pin 12" "0,1" textline " " bitfld.long 0x00 11. " INDT3_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT3_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT3_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT3_8 ,Value received through pin 8" "0,1" textline " " bitfld.long 0x00 7. " INDT3_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT3_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT3_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT3_4 ,Value received through pin 4" "0,1" textline " " bitfld.long 0x00 3. " INDT3_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT3_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT3_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT3_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT3,Interrupt display register 3" bitfld.long 0x04 31. " INTDT3_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT3_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " INTDT3_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT3_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT3_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT3_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT3_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT3_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " INTDT3_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT3_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT3_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT3_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " INTDT3_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT3_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT3_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT3_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " INTDT3_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT3_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT3_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT3_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " INTDT3_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT3_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT3_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT3_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " INTDT3_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT3_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT3_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT3_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " INTDT3_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT3_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT3_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT3_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" textline " " group.long 0x14++0x17 line.long 0x00 "INTCLR3,Interrupt clear register 3" bitfld.long 0x00 31. " INTCLR3_31 ,Clears pin 31 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 30. " INTCLR3_30 ,Clears pin 30 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 29. " INTCLR3_29 ,Clears pin 29 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 28. " INTCLR3_28 ,Clears pin 28 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 27. " INTCLR3_27 ,Clears pin 27 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 26. " INTCLR3_26 ,Clears pin 26 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 25. " INTCLR3_25 ,Clears pin 25 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 24. " INTCLR3_24 ,Clears pin 24 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 23. " INTCLR3_23 ,Clears pin 23 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 22. " INTCLR3_22 ,Clears pin 22 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 21. " INTCLR3_21 ,Clears pin 21 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 20. " INTCLR3_20 ,Clears pin 20 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 19. " INTCLR3_19 ,Clears pin 19 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 18. " INTCLR3_18 ,Clears pin 18 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " INTCLR3_17 ,Clears pin 17 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 16. " INTCLR3_16 ,Clears pin 16 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 15. " INTCLR3_15 ,Clears pin 15 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 14. " INTCLR3_14 ,Clears pin 14 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 13. " INTCLR3_13 ,Clears pin 13 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 12. " INTCLR3_12 ,Clears pin 12 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 11. " INTCLR3_11 ,Clears pin 11 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 10. " INTCLR3_10 ,Clears pin 10 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " INTCLR3_9 ,Clears pin 9 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 8. " INTCLR3_8 ,Clears pin 8 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " INTCLR3_7 ,Clears pin 7 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 6. " INTCLR3_6 ,Clears pin 6 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " INTCLR3_5 ,Clears pin 5 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 4. " INTCLR3_4 ,Clears pin 4 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " INTCLR3_3 ,Clears pin 3 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 2. " INTCLR3_2 ,Clears pin 2 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " INTCLR3_1 ,Clears pin 1 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 0. " INTCLR3_0 ,Clears pin 0 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " line.long 0x04 "INTMSK3,Interrupt mask register 3" bitfld.long 0x04 31. " INTMSK3_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK3_30 ,Masks interrupt request for pin 30" "Masked,Not masked" textline " " bitfld.long 0x04 29. " INTMSK3_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK3_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK3_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK3_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK3_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK3_24 ,Masks interrupt request for pin 24" "Masked,Not masked" textline " " bitfld.long 0x04 23. " INTMSK3_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK3_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK3_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK3_20 ,Masks interrupt request for pin 20" "Masked,Not masked" textline " " bitfld.long 0x04 19. " INTMSK3_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK3_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK3_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK3_16 ,Masks interrupt request for pin 16" "Masked,Not masked" textline " " bitfld.long 0x04 15. " INTMSK3_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK3_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK3_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK3_12 ,Masks interrupt request for pin 12" "Masked,Not masked" textline " " bitfld.long 0x04 11. " INTMSK3_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK3_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK3_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK3_8 ,Masks interrupt request for pin 8" "Masked,Not masked" textline " " bitfld.long 0x04 7. " INTMSK3_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK3_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK3_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK3_4 ,Masks interrupt request for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " INTMSK3_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK3_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK3_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK3_0 ,Masks interrupt request for pin 0" "Masked,Not masked" textline " " line.long 0x08 "MSKCLR3,Interrupt mask clear register 3" bitfld.long 0x08 31. " MSKCLR3_31 ,Clears mask for pin 31" "Not cleared,Cleared" bitfld.long 0x08 30. " MSKCLR3_30 ,Clears mask for pin 30" "Not cleared,Cleared" textline " " bitfld.long 0x08 29. " MSKCLR3_29 ,Clears mask for pin 29" "Not cleared,Cleared" bitfld.long 0x08 28. " MSKCLR3_28 ,Clears mask for pin 28" "Not cleared,Cleared" textline " " bitfld.long 0x08 27. " MSKCLR3_27 ,Clears mask for pin 27" "Not cleared,Cleared" bitfld.long 0x08 26. " MSKCLR3_26 ,Clears mask for pin 26" "Not cleared,Cleared" textline " " bitfld.long 0x08 25. " MSKCLR3_25 ,Clears mask for pin 25" "Not cleared,Cleared" bitfld.long 0x08 24. " MSKCLR3_24 ,Clears mask for pin 24" "Not cleared,Cleared" textline " " bitfld.long 0x08 23. " MSKCLR3_23 ,Clears mask for pin 23" "Not cleared,Cleared" bitfld.long 0x08 22. " MSKCLR3_22 ,Clears mask for pin 22" "Not cleared,Cleared" textline " " bitfld.long 0x08 21. " MSKCLR3_21 ,Clears mask for pin 21" "Not cleared,Cleared" bitfld.long 0x08 20. " MSKCLR3_20 ,Clears mask for pin 20" "Not cleared,Cleared" textline " " bitfld.long 0x08 19. " MSKCLR3_19 ,Clears mask for pin 19" "Not cleared,Cleared" bitfld.long 0x08 18. " MSKCLR3_18 ,Clears mask for pin 18" "Not cleared,Cleared" textline " " bitfld.long 0x08 17. " MSKCLR3_17 ,Clears mask for pin 17" "Not cleared,Cleared" bitfld.long 0x08 16. " MSKCLR3_16 ,Clears mask for pin 16" "Not cleared,Cleared" textline " " bitfld.long 0x08 15. " MSKCLR3_15 ,Clears mask for pin 15" "Not cleared,Cleared" bitfld.long 0x08 14. " MSKCLR3_14 ,Clears mask for pin 14" "Not cleared,Cleared" textline " " bitfld.long 0x08 13. " MSKCLR3_13 ,Clears mask for pin 13" "Not cleared,Cleared" bitfld.long 0x08 12. " MSKCLR3_12 ,Clears mask for pin 12" "Not cleared,Cleared" textline " " bitfld.long 0x08 11. " MSKCLR3_11 ,Clears mask for pin 11" "Not cleared,Cleared" bitfld.long 0x08 10. " MSKCLR3_10 ,Clears mask for pin 10" "Not cleared,Cleared" textline " " bitfld.long 0x08 9. " MSKCLR3_9 ,Clears mask for pin 9" "Not cleared,Cleared" bitfld.long 0x08 8. " MSKCLR3_8 ,Clears mask for pin 8" "Not cleared,Cleared" textline " " bitfld.long 0x08 7. " MSKCLR3_7 ,Clears mask for pin 7" "Not cleared,Cleared" bitfld.long 0x08 6. " MSKCLR3_6 ,Clears mask for pin 6" "Not cleared,Cleared" textline " " bitfld.long 0x08 5. " MSKCLR3_5 ,Clears mask for pin 5" "Not cleared,Cleared" bitfld.long 0x08 4. " MSKCLR3_4 ,Clears mask for pin 4" "Not cleared,Cleared" textline " " bitfld.long 0x08 3. " MSKCLR3_3 ,Clears mask for pin 3" "Not cleared,Cleared" bitfld.long 0x08 2. " MSKCLR3_2 ,Clears mask for pin 2" "Not cleared,Cleared" textline " " bitfld.long 0x08 1. " MSKCLR3_1 ,Clears mask for pin 1" "Not cleared,Cleared" bitfld.long 0x08 0. " MSKCLR3_0 ,Clears mask for pin 0" "Not cleared,Cleared" textline " " line.long 0x0C "POSNEG3,Positive/negative logic select register 3" bitfld.long 0x0C 31. " POSNEG3_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG3_30 ,Selects polarity for pin 30" "Positive,Negative" textline " " bitfld.long 0x0C 29. " POSNEG3_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG3_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG3_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG3_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG3_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG3_24 ,Selects polarity for pin 24" "Positive,Negative" textline " " bitfld.long 0x0C 23. " POSNEG3_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG3_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG3_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG3_20 ,Selects polarity for pin 20" "Positive,Negative" textline " " bitfld.long 0x0C 19. " POSNEG3_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG3_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG3_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG3_16 ,Selects polarity for pin 16" "Positive,Negative" textline " " bitfld.long 0x0C 15. " POSNEG3_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG3_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG3_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG3_12 ,Selects polarity for pin 12" "Positive,Negative" textline " " bitfld.long 0x0C 11. " POSNEG3_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG3_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG3_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG3_8 ,Selects polarity for pin 8" "Positive,Negative" textline " " bitfld.long 0x0C 7. " POSNEG3_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG3_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG3_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG3_4 ,Selects polarity for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " POSNEG3_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG3_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG3_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG3_0 ,Selects polarity for pin 0" "Positive,Negative" textline " " line.long 0x10 "EDGLEVEL3,Edge/level select register 3" bitfld.long 0x10 31. " EDGLEVEL3_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL3_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" textline " " bitfld.long 0x10 29. " EDGLEVEL3_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL3_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL3_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL3_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL3_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL3_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" textline " " bitfld.long 0x10 23. " EDGLEVEL3_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL3_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL3_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL3_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" textline " " bitfld.long 0x10 19. " EDGLEVEL3_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL3_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL3_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL3_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" textline " " bitfld.long 0x10 15. " EDGLEVEL3_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL3_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL3_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL3_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" textline " " bitfld.long 0x10 11. " EDGLEVEL3_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL3_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL3_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL3_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" textline " " bitfld.long 0x10 7. " EDGLEVEL3_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL3_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL3_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL3_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " EDGLEVEL3_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL3_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL3_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL3_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF3,Chattering prevention on/off register 3" sif (cpuis("RCARM2"))||(cpuis("R8A77470")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" textline " " endif bitfld.long 0x14 3. " FILONOFF3_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF3_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " FILONOFF3_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF3_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" textline " " group.long 0x38++0x17 line.long 0x00 "INTMSKS3,Interrupt Sub Mask Register 3" bitfld.long 0x00 31. " INTMSKS3_31 ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS3_30 ,Interrupt Sub Mask 30" "Masked,Not masked" textline " " bitfld.long 0x00 29. " INTMSKS3_29 ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS3_28 ,Interrupt Sub Mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS3_27 ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS3_26 ,Interrupt Sub Mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS3_25 ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS3_24 ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " INTMSKS3_23 ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS3_22 ,Interrupt Sub Mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS3_21 ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS3_20 ,Interrupt Sub Mask 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " INTMSKS3_19 ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS3_18 ,Interrupt Sub Mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS3_17 ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS3_16 ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " INTMSKS3_15 ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS3_14 ,Interrupt Sub Mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS3_13 ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS3_12 ,Interrupt Sub Mask 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " INTMSKS3_11 ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS3_10 ,Interrupt Sub Mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS3_9 ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS3_8 ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " INTMSKS3_7 ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS3_6 ,Interrupt Sub Mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS3_5 ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS3_4 ,Interrupt Sub Mask 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " INTMSKS3_3 ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS3_2 ,Interrupt Sub Mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS3_1 ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS3_0 ,Interrupt Sub Mask 0" "Masked,Not masked" textline " " line.long 0x04 "MSKCLRS3,Interrupt Sub Mask Clear Register 3" bitfld.long 0x04 31. " MSKCLRS3_31 ,Interrupt Sub Mask Clear 31" "No effect,Cleared" bitfld.long 0x04 30. " MSKCLRS3_30 ,Interrupt Sub Mask Clear 30" "No effect,Cleared" textline " " bitfld.long 0x04 29. " MSKCLRS3_29 ,Interrupt Sub Mask Clear 29" "No effect,Cleared" bitfld.long 0x04 28. " MSKCLRS3_28 ,Interrupt Sub Mask Clear 28" "No effect,Cleared" textline " " bitfld.long 0x04 27. " MSKCLRS3_27 ,Interrupt Sub Mask Clear 27" "No effect,Cleared" bitfld.long 0x04 26. " MSKCLRS3_26 ,Interrupt Sub Mask Clear 26" "No effect,Cleared" textline " " bitfld.long 0x04 25. " MSKCLRS3_25 ,Interrupt Sub Mask Clear 25" "No effect,Cleared" bitfld.long 0x04 24. " MSKCLRS3_24 ,Interrupt Sub Mask Clear 24" "No effect,Cleared" textline " " bitfld.long 0x04 23. " MSKCLRS3_23 ,Interrupt Sub Mask Clear 23" "No effect,Cleared" bitfld.long 0x04 22. " MSKCLRS3_22 ,Interrupt Sub Mask Clear 22" "No effect,Cleared" textline " " bitfld.long 0x04 21. " MSKCLRS3_21 ,Interrupt Sub Mask Clear 21" "No effect,Cleared" bitfld.long 0x04 20. " MSKCLRS3_20 ,Interrupt Sub Mask Clear 20" "No effect,Cleared" textline " " bitfld.long 0x04 19. " MSKCLRS3_19 ,Interrupt Sub Mask Clear 19" "No effect,Cleared" bitfld.long 0x04 18. " MSKCLRS3_18 ,Interrupt Sub Mask Clear 18" "No effect,Cleared" textline " " bitfld.long 0x04 17. " MSKCLRS3_17 ,Interrupt Sub Mask Clear 17" "No effect,Cleared" bitfld.long 0x04 16. " MSKCLRS3_16 ,Interrupt Sub Mask Clear 16" "No effect,Cleared" textline " " bitfld.long 0x04 15. " MSKCLRS3_15 ,Interrupt Sub Mask Clear 15" "No effect,Cleared" bitfld.long 0x04 14. " MSKCLRS3_14 ,Interrupt Sub Mask Clear 14" "No effect,Cleared" textline " " bitfld.long 0x04 13. " MSKCLRS3_13 ,Interrupt Sub Mask Clear 13" "No effect,Cleared" bitfld.long 0x04 12. " MSKCLRS3_12 ,Interrupt Sub Mask Clear 12" "No effect,Cleared" textline " " bitfld.long 0x04 11. " MSKCLRS3_11 ,Interrupt Sub Mask Clear 11" "No effect,Cleared" bitfld.long 0x04 10. " MSKCLRS3_10 ,Interrupt Sub Mask Clear 10" "No effect,Cleared" textline " " bitfld.long 0x04 9. " MSKCLRS3_9 ,Interrupt Sub Mask Clear 9" "No effect,Cleared" bitfld.long 0x04 8. " MSKCLRS3_8 ,Interrupt Sub Mask Clear 8" "No effect,Cleared" textline " " bitfld.long 0x04 7. " MSKCLRS3_7 ,Interrupt Sub Mask Clear 7" "No effect,Cleared" bitfld.long 0x04 6. " MSKCLRS3_6 ,Interrupt Sub Mask Clear 6" "No effect,Cleared" textline " " bitfld.long 0x04 5. " MSKCLRS3_5 ,Interrupt Sub Mask Clear 5" "No effect,Cleared" bitfld.long 0x04 4. " MSKCLRS3_4 ,Interrupt Sub Mask Clear 4" "No effect,Cleared" textline " " bitfld.long 0x04 3. " MSKCLRS3_3 ,Interrupt Sub Mask Clear 3" "No effect,Cleared" bitfld.long 0x04 2. " MSKCLRS3_2 ,Interrupt Sub Mask Clear 2" "No effect,Cleared" textline " " bitfld.long 0x04 1. " MSKCLRS3_1 ,Interrupt Sub Mask Clear 1" "No effect,Cleared" bitfld.long 0x04 0. " MSKCLRS3_0 ,Interrupt Sub Mask Clear 0" "No effect,Cleared" textline " " line.long 0x08 "OUTDTSEL3,Output Data Select Register 3" bitfld.long 0x08 31. " OUTDTSEL3_31 ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL3_30 ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 29. " OUTDTSEL3_29 ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL3_28 ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL3_27 ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL3_26 ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL3_25 ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL3_24 ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 23. " OUTDTSEL3_23 ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL3_22 ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL3_21 ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL3_20 ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " OUTDTSEL3_19 ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL3_18 ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL3_17 ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL3_16 ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 15. " OUTDTSEL3_15 ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL3_14 ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL3_13 ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL3_12 ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 11. " OUTDTSEL3_11 ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL3_10 ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL3_9 ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL3_8 ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " OUTDTSEL3_7 ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL3_6 ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL3_5 ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL3_4 ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 3. " OUTDTSEL3_3 ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL3_2 ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL3_1 ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL3_0 ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline " " line.long 0x0C "OUTDTH3,Output Data High Register 3" bitfld.long 0x0C 31. " OUTDTH3_31 ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH3_30 ,Output Data High 30" "Not valid,Valid" textline " " bitfld.long 0x0C 29. " OUTDTH3_29 ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH3_28 ,Output Data High 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH3_27 ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH3_26 ,Output Data High 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH3_25 ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH3_24 ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " OUTDTH3_23 ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH3_22 ,Output Data High 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH3_21 ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH3_20 ,Output Data High 20" "Not valid,Valid" textline " " bitfld.long 0x0C 19. " OUTDTH3_19 ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH3_18 ,Output Data High 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH3_17 ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH3_16 ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OUTDTH3_15 ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH3_14 ,Output Data High 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH3_13 ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH3_12 ,Output Data High 12" "Not valid,Valid" textline " " bitfld.long 0x0C 11. " OUTDTH3_11 ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH3_10 ,Output Data High 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH3_9 ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH3_8 ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " OUTDTH3_7 ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH3_6 ,Output Data High 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH3_5 ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH3_4 ,Output Data High 4" "Not valid,Valid" textline " " bitfld.long 0x0C 3. " OUTDTH3_3 ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH3_2 ,Output Data High 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH3_1 ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH3_0 ,Output Data High 0" "Not valid,Valid" textline " " line.long 0x10 "OUTDTL3,Output Data Low Register 3" bitfld.long 0x10 31. " OUTDTL3_31 ,Output Data Low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL3_30 ,Output Data Low 30" "Not valid,Valid" textline " " bitfld.long 0x10 29. " OUTDTL3_29 ,Output Data Low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL3_28 ,Output Data Low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL3_27 ,Output Data Low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL3_26 ,Output Data Low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL3_25 ,Output Data Low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL3_24 ,Output Data Low 24" "Not valid,Valid" textline " " bitfld.long 0x10 23. " OUTDTL3_23 ,Output Data Low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL3_22 ,Output Data Low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL3_21 ,Output Data Low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL3_20 ,Output Data Low 20" "Not valid,Valid" textline " " bitfld.long 0x10 19. " OUTDTL3_19 ,Output Data Low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL3_18 ,Output Data Low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL3_17 ,Output Data Low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL3_16 ,Output Data Low 16" "Not valid,Valid" textline " " bitfld.long 0x10 15. " OUTDTL3_15 ,Output Data Low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL3_14 ,Output Data Low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL3_13 ,Output Data Low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL3_12 ,Output Data Low 12" "Not valid,Valid" textline " " bitfld.long 0x10 11. " OUTDTL3_11 ,Output Data Low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL3_10 ,Output Data Low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL3_9 ,Output Data Low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL3_8 ,Output Data Low 8" "Not valid,Valid" textline " " bitfld.long 0x10 7. " OUTDTL3_7 ,Output Data Low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL3_6 ,Output Data Low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL3_5 ,Output Data Low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL3_4 ,Output Data Low 4" "Not valid,Valid" textline " " bitfld.long 0x10 3. " OUTDTL3_3 ,Output Data Low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL3_2 ,Output Data Low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL3_1 ,Output Data Low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL3_0 ,Output Data Low 0" "Not valid,Valid" textline " " line.long 0x14 "BOTHEDGE3,One Edge/Both Edge Select Register 3" bitfld.long 0x14 31. " BOTHEDGE3_31 ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE3_30 ,One Edge/Both Edge Select 30" "One,Both" textline " " bitfld.long 0x14 29. " BOTHEDGE3_29 ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE3_28 ,One Edge/Both Edge Select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE3_27 ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE3_26 ,One Edge/Both Edge Select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE3_25 ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE3_24 ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " BOTHEDGE3_23 ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE3_22 ,One Edge/Both Edge Select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE3_21 ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE3_20 ,One Edge/Both Edge Select 20" "One,Both" textline " " bitfld.long 0x14 19. " BOTHEDGE3_19 ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE3_18 ,One Edge/Both Edge Select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE3_17 ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE3_16 ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " BOTHEDGE3_15 ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE3_14 ,One Edge/Both Edge Select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE3_13 ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE3_12 ,One Edge/Both Edge Select 12" "One,Both" textline " " bitfld.long 0x14 11. " BOTHEDGE3_11 ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE3_10 ,One Edge/Both Edge Select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE3_9 ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE3_8 ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " BOTHEDGE3_7 ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE3_6 ,One Edge/Both Edge Select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE3_5 ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE3_4 ,One Edge/Both Edge Select 4" "One,Both" textline " " bitfld.long 0x14 3. " BOTHEDGE3_3 ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE3_2 ,One Edge/Both Edge Select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE3_1 ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE3_0 ,One Edge/Both Edge Select 0" "One,Both" textline " " width 0xB tree.end tree "GPIO 4" base ad:0xE6054000 width 14. group.long 0x00++0xB line.long 0x00 "IOINTSEL4,General IO/interrupt switching register 4" bitfld.long 0x00 31. " IOINTSEL4_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL4_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" textline " " bitfld.long 0x00 29. " IOINTSEL4_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL4_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL4_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL4_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL4_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL4_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " IOINTSEL4_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL4_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL4_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL4_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" textline " " bitfld.long 0x00 19. " IOINTSEL4_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL4_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL4_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL4_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " IOINTSEL4_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL4_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL4_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL4_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" textline " " bitfld.long 0x00 11. " IOINTSEL4_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL4_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL4_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL4_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " IOINTSEL4_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL4_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL4_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL4_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" textline " " bitfld.long 0x00 3. " IOINTSEL4_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL4_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL4_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL4_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" textline " " line.long 0x04 "INOUTSEL4,General input/output switching register 4" bitfld.long 0x04 31. " INOUTSEL4_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL4_30 ,General input or output mode select for channel 30" "Input,Output" textline " " bitfld.long 0x04 29. " INOUTSEL4_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL4_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL4_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL4_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL4_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL4_24 ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " INOUTSEL4_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL4_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL4_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL4_20 ,General input or output mode select for channel 20" "Input,Output" textline " " bitfld.long 0x04 19. " INOUTSEL4_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL4_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL4_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL4_16 ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " INOUTSEL4_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL4_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL4_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL4_12 ,General input or output mode select for channel 12" "Input,Output" textline " " bitfld.long 0x04 11. " INOUTSEL4_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL4_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL4_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL4_8 ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " INOUTSEL4_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL4_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL4_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL4_4 ,General input or output mode select for channel 4" "Input,Output" textline " " bitfld.long 0x04 3. " INOUTSEL4_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL4_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL4_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL4_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT4,General output register 4" bitfld.long 0x08 31. " OUTDT4_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT4_30 ,Output value for channel 30" "0,1" textline " " bitfld.long 0x08 29. " OUTDT4_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT4_28 ,Output value for channel 28" "0,1" textline " " bitfld.long 0x08 27. " OUTDT4_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT4_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT4_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT4_24 ,Output value for channel 24" "0,1" textline " " bitfld.long 0x08 23. " OUTDT4_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT4_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT4_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT4_20 ,Output value for channel 20" "0,1" textline " " bitfld.long 0x08 19. " OUTDT4_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT4_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT4_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT4_16 ,Output value for channel 16" "0,1" textline " " bitfld.long 0x08 15. " OUTDT4_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT4_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT4_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT4_12 ,Output value for channel 12" "0,1" textline " " bitfld.long 0x08 11. " OUTDT4_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT4_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT4_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT4_8 ,Output value for channel 8" "0,1" textline " " bitfld.long 0x08 7. " OUTDT4_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT4_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT4_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT4_4 ,Output value for channel 4" "0,1" textline " " bitfld.long 0x08 3. " OUTDT4_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT4_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT4_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT4_0 ,Output value for channel 0" "0,1" textline " " rgroup.long 0x0C++0x07 line.long 0x00 "INDT4,General input register 4" bitfld.long 0x00 31. " INDT4_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT4_30 ,Value received through pin 30" "0,1" textline " " bitfld.long 0x00 29. " INDT4_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT4_28 ,Value received through pin 28" "0,1" textline " " bitfld.long 0x00 27. " INDT4_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT4_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT4_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT4_24 ,Value received through pin 24" "0,1" textline " " bitfld.long 0x00 23. " INDT4_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT4_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT4_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT4_20 ,Value received through pin 20" "0,1" textline " " bitfld.long 0x00 19. " INDT4_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT4_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT4_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT4_16 ,Value received through pin 16" "0,1" textline " " bitfld.long 0x00 15. " INDT4_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT4_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT4_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT4_12 ,Value received through pin 12" "0,1" textline " " bitfld.long 0x00 11. " INDT4_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT4_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT4_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT4_8 ,Value received through pin 8" "0,1" textline " " bitfld.long 0x00 7. " INDT4_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT4_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT4_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT4_4 ,Value received through pin 4" "0,1" textline " " bitfld.long 0x00 3. " INDT4_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT4_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT4_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT4_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT4,Interrupt display register 4" bitfld.long 0x04 31. " INTDT4_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT4_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " INTDT4_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT4_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT4_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT4_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT4_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT4_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " INTDT4_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT4_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT4_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT4_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " INTDT4_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT4_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT4_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT4_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " INTDT4_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT4_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT4_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT4_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " INTDT4_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT4_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT4_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT4_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " INTDT4_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT4_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT4_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT4_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " INTDT4_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT4_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT4_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT4_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" textline " " group.long 0x14++0x17 line.long 0x00 "INTCLR4,Interrupt clear register 4" bitfld.long 0x00 31. " INTCLR4_31 ,Clears pin 31 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 30. " INTCLR4_30 ,Clears pin 30 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 29. " INTCLR4_29 ,Clears pin 29 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 28. " INTCLR4_28 ,Clears pin 28 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 27. " INTCLR4_27 ,Clears pin 27 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 26. " INTCLR4_26 ,Clears pin 26 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 25. " INTCLR4_25 ,Clears pin 25 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 24. " INTCLR4_24 ,Clears pin 24 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 23. " INTCLR4_23 ,Clears pin 23 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 22. " INTCLR4_22 ,Clears pin 22 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 21. " INTCLR4_21 ,Clears pin 21 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 20. " INTCLR4_20 ,Clears pin 20 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 19. " INTCLR4_19 ,Clears pin 19 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 18. " INTCLR4_18 ,Clears pin 18 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " INTCLR4_17 ,Clears pin 17 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 16. " INTCLR4_16 ,Clears pin 16 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 15. " INTCLR4_15 ,Clears pin 15 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 14. " INTCLR4_14 ,Clears pin 14 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 13. " INTCLR4_13 ,Clears pin 13 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 12. " INTCLR4_12 ,Clears pin 12 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 11. " INTCLR4_11 ,Clears pin 11 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 10. " INTCLR4_10 ,Clears pin 10 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " INTCLR4_9 ,Clears pin 9 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 8. " INTCLR4_8 ,Clears pin 8 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " INTCLR4_7 ,Clears pin 7 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 6. " INTCLR4_6 ,Clears pin 6 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " INTCLR4_5 ,Clears pin 5 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 4. " INTCLR4_4 ,Clears pin 4 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " INTCLR4_3 ,Clears pin 3 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 2. " INTCLR4_2 ,Clears pin 2 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " INTCLR4_1 ,Clears pin 1 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 0. " INTCLR4_0 ,Clears pin 0 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " line.long 0x04 "INTMSK4,Interrupt mask register 4" bitfld.long 0x04 31. " INTMSK4_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK4_30 ,Masks interrupt request for pin 30" "Masked,Not masked" textline " " bitfld.long 0x04 29. " INTMSK4_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK4_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK4_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK4_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK4_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK4_24 ,Masks interrupt request for pin 24" "Masked,Not masked" textline " " bitfld.long 0x04 23. " INTMSK4_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK4_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK4_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK4_20 ,Masks interrupt request for pin 20" "Masked,Not masked" textline " " bitfld.long 0x04 19. " INTMSK4_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK4_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK4_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK4_16 ,Masks interrupt request for pin 16" "Masked,Not masked" textline " " bitfld.long 0x04 15. " INTMSK4_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK4_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK4_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK4_12 ,Masks interrupt request for pin 12" "Masked,Not masked" textline " " bitfld.long 0x04 11. " INTMSK4_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK4_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK4_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK4_8 ,Masks interrupt request for pin 8" "Masked,Not masked" textline " " bitfld.long 0x04 7. " INTMSK4_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK4_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK4_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK4_4 ,Masks interrupt request for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " INTMSK4_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK4_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK4_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK4_0 ,Masks interrupt request for pin 0" "Masked,Not masked" textline " " line.long 0x08 "MSKCLR4,Interrupt mask clear register 4" bitfld.long 0x08 31. " MSKCLR4_31 ,Clears mask for pin 31" "Not cleared,Cleared" bitfld.long 0x08 30. " MSKCLR4_30 ,Clears mask for pin 30" "Not cleared,Cleared" textline " " bitfld.long 0x08 29. " MSKCLR4_29 ,Clears mask for pin 29" "Not cleared,Cleared" bitfld.long 0x08 28. " MSKCLR4_28 ,Clears mask for pin 28" "Not cleared,Cleared" textline " " bitfld.long 0x08 27. " MSKCLR4_27 ,Clears mask for pin 27" "Not cleared,Cleared" bitfld.long 0x08 26. " MSKCLR4_26 ,Clears mask for pin 26" "Not cleared,Cleared" textline " " bitfld.long 0x08 25. " MSKCLR4_25 ,Clears mask for pin 25" "Not cleared,Cleared" bitfld.long 0x08 24. " MSKCLR4_24 ,Clears mask for pin 24" "Not cleared,Cleared" textline " " bitfld.long 0x08 23. " MSKCLR4_23 ,Clears mask for pin 23" "Not cleared,Cleared" bitfld.long 0x08 22. " MSKCLR4_22 ,Clears mask for pin 22" "Not cleared,Cleared" textline " " bitfld.long 0x08 21. " MSKCLR4_21 ,Clears mask for pin 21" "Not cleared,Cleared" bitfld.long 0x08 20. " MSKCLR4_20 ,Clears mask for pin 20" "Not cleared,Cleared" textline " " bitfld.long 0x08 19. " MSKCLR4_19 ,Clears mask for pin 19" "Not cleared,Cleared" bitfld.long 0x08 18. " MSKCLR4_18 ,Clears mask for pin 18" "Not cleared,Cleared" textline " " bitfld.long 0x08 17. " MSKCLR4_17 ,Clears mask for pin 17" "Not cleared,Cleared" bitfld.long 0x08 16. " MSKCLR4_16 ,Clears mask for pin 16" "Not cleared,Cleared" textline " " bitfld.long 0x08 15. " MSKCLR4_15 ,Clears mask for pin 15" "Not cleared,Cleared" bitfld.long 0x08 14. " MSKCLR4_14 ,Clears mask for pin 14" "Not cleared,Cleared" textline " " bitfld.long 0x08 13. " MSKCLR4_13 ,Clears mask for pin 13" "Not cleared,Cleared" bitfld.long 0x08 12. " MSKCLR4_12 ,Clears mask for pin 12" "Not cleared,Cleared" textline " " bitfld.long 0x08 11. " MSKCLR4_11 ,Clears mask for pin 11" "Not cleared,Cleared" bitfld.long 0x08 10. " MSKCLR4_10 ,Clears mask for pin 10" "Not cleared,Cleared" textline " " bitfld.long 0x08 9. " MSKCLR4_9 ,Clears mask for pin 9" "Not cleared,Cleared" bitfld.long 0x08 8. " MSKCLR4_8 ,Clears mask for pin 8" "Not cleared,Cleared" textline " " bitfld.long 0x08 7. " MSKCLR4_7 ,Clears mask for pin 7" "Not cleared,Cleared" bitfld.long 0x08 6. " MSKCLR4_6 ,Clears mask for pin 6" "Not cleared,Cleared" textline " " bitfld.long 0x08 5. " MSKCLR4_5 ,Clears mask for pin 5" "Not cleared,Cleared" bitfld.long 0x08 4. " MSKCLR4_4 ,Clears mask for pin 4" "Not cleared,Cleared" textline " " bitfld.long 0x08 3. " MSKCLR4_3 ,Clears mask for pin 3" "Not cleared,Cleared" bitfld.long 0x08 2. " MSKCLR4_2 ,Clears mask for pin 2" "Not cleared,Cleared" textline " " bitfld.long 0x08 1. " MSKCLR4_1 ,Clears mask for pin 1" "Not cleared,Cleared" bitfld.long 0x08 0. " MSKCLR4_0 ,Clears mask for pin 0" "Not cleared,Cleared" textline " " line.long 0x0C "POSNEG4,Positive/negative logic select register 4" bitfld.long 0x0C 31. " POSNEG4_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG4_30 ,Selects polarity for pin 30" "Positive,Negative" textline " " bitfld.long 0x0C 29. " POSNEG4_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG4_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG4_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG4_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG4_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG4_24 ,Selects polarity for pin 24" "Positive,Negative" textline " " bitfld.long 0x0C 23. " POSNEG4_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG4_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG4_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG4_20 ,Selects polarity for pin 20" "Positive,Negative" textline " " bitfld.long 0x0C 19. " POSNEG4_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG4_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG4_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG4_16 ,Selects polarity for pin 16" "Positive,Negative" textline " " bitfld.long 0x0C 15. " POSNEG4_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG4_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG4_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG4_12 ,Selects polarity for pin 12" "Positive,Negative" textline " " bitfld.long 0x0C 11. " POSNEG4_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG4_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG4_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG4_8 ,Selects polarity for pin 8" "Positive,Negative" textline " " bitfld.long 0x0C 7. " POSNEG4_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG4_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG4_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG4_4 ,Selects polarity for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " POSNEG4_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG4_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG4_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG4_0 ,Selects polarity for pin 0" "Positive,Negative" textline " " line.long 0x10 "EDGLEVEL4,Edge/level select register 4" bitfld.long 0x10 31. " EDGLEVEL4_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL4_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" textline " " bitfld.long 0x10 29. " EDGLEVEL4_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL4_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL4_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL4_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL4_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL4_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" textline " " bitfld.long 0x10 23. " EDGLEVEL4_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL4_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL4_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL4_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" textline " " bitfld.long 0x10 19. " EDGLEVEL4_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL4_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL4_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL4_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" textline " " bitfld.long 0x10 15. " EDGLEVEL4_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL4_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL4_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL4_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" textline " " bitfld.long 0x10 11. " EDGLEVEL4_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL4_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL4_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL4_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" textline " " bitfld.long 0x10 7. " EDGLEVEL4_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL4_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL4_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL4_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " EDGLEVEL4_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL4_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL4_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL4_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF4,Chattering prevention on/off register 4" sif (cpuis("RCARM2"))||(cpuis("R8A77470")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" textline " " endif bitfld.long 0x14 3. " FILONOFF4_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF4_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " FILONOFF4_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF4_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" textline " " group.long 0x38++0x17 line.long 0x00 "INTMSKS4,Interrupt Sub Mask Register 4" bitfld.long 0x00 31. " INTMSKS4_31 ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS4_30 ,Interrupt Sub Mask 30" "Masked,Not masked" textline " " bitfld.long 0x00 29. " INTMSKS4_29 ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS4_28 ,Interrupt Sub Mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS4_27 ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS4_26 ,Interrupt Sub Mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS4_25 ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS4_24 ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " INTMSKS4_23 ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS4_22 ,Interrupt Sub Mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS4_21 ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS4_20 ,Interrupt Sub Mask 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " INTMSKS4_19 ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS4_18 ,Interrupt Sub Mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS4_17 ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS4_16 ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " INTMSKS4_15 ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS4_14 ,Interrupt Sub Mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS4_13 ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS4_12 ,Interrupt Sub Mask 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " INTMSKS4_11 ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS4_10 ,Interrupt Sub Mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS4_9 ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS4_8 ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " INTMSKS4_7 ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS4_6 ,Interrupt Sub Mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS4_5 ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS4_4 ,Interrupt Sub Mask 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " INTMSKS4_3 ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS4_2 ,Interrupt Sub Mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS4_1 ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS4_0 ,Interrupt Sub Mask 0" "Masked,Not masked" textline " " line.long 0x04 "MSKCLRS4,Interrupt Sub Mask Clear Register 4" bitfld.long 0x04 31. " MSKCLRS4_31 ,Interrupt Sub Mask Clear 31" "No effect,Cleared" bitfld.long 0x04 30. " MSKCLRS4_30 ,Interrupt Sub Mask Clear 30" "No effect,Cleared" textline " " bitfld.long 0x04 29. " MSKCLRS4_29 ,Interrupt Sub Mask Clear 29" "No effect,Cleared" bitfld.long 0x04 28. " MSKCLRS4_28 ,Interrupt Sub Mask Clear 28" "No effect,Cleared" textline " " bitfld.long 0x04 27. " MSKCLRS4_27 ,Interrupt Sub Mask Clear 27" "No effect,Cleared" bitfld.long 0x04 26. " MSKCLRS4_26 ,Interrupt Sub Mask Clear 26" "No effect,Cleared" textline " " bitfld.long 0x04 25. " MSKCLRS4_25 ,Interrupt Sub Mask Clear 25" "No effect,Cleared" bitfld.long 0x04 24. " MSKCLRS4_24 ,Interrupt Sub Mask Clear 24" "No effect,Cleared" textline " " bitfld.long 0x04 23. " MSKCLRS4_23 ,Interrupt Sub Mask Clear 23" "No effect,Cleared" bitfld.long 0x04 22. " MSKCLRS4_22 ,Interrupt Sub Mask Clear 22" "No effect,Cleared" textline " " bitfld.long 0x04 21. " MSKCLRS4_21 ,Interrupt Sub Mask Clear 21" "No effect,Cleared" bitfld.long 0x04 20. " MSKCLRS4_20 ,Interrupt Sub Mask Clear 20" "No effect,Cleared" textline " " bitfld.long 0x04 19. " MSKCLRS4_19 ,Interrupt Sub Mask Clear 19" "No effect,Cleared" bitfld.long 0x04 18. " MSKCLRS4_18 ,Interrupt Sub Mask Clear 18" "No effect,Cleared" textline " " bitfld.long 0x04 17. " MSKCLRS4_17 ,Interrupt Sub Mask Clear 17" "No effect,Cleared" bitfld.long 0x04 16. " MSKCLRS4_16 ,Interrupt Sub Mask Clear 16" "No effect,Cleared" textline " " bitfld.long 0x04 15. " MSKCLRS4_15 ,Interrupt Sub Mask Clear 15" "No effect,Cleared" bitfld.long 0x04 14. " MSKCLRS4_14 ,Interrupt Sub Mask Clear 14" "No effect,Cleared" textline " " bitfld.long 0x04 13. " MSKCLRS4_13 ,Interrupt Sub Mask Clear 13" "No effect,Cleared" bitfld.long 0x04 12. " MSKCLRS4_12 ,Interrupt Sub Mask Clear 12" "No effect,Cleared" textline " " bitfld.long 0x04 11. " MSKCLRS4_11 ,Interrupt Sub Mask Clear 11" "No effect,Cleared" bitfld.long 0x04 10. " MSKCLRS4_10 ,Interrupt Sub Mask Clear 10" "No effect,Cleared" textline " " bitfld.long 0x04 9. " MSKCLRS4_9 ,Interrupt Sub Mask Clear 9" "No effect,Cleared" bitfld.long 0x04 8. " MSKCLRS4_8 ,Interrupt Sub Mask Clear 8" "No effect,Cleared" textline " " bitfld.long 0x04 7. " MSKCLRS4_7 ,Interrupt Sub Mask Clear 7" "No effect,Cleared" bitfld.long 0x04 6. " MSKCLRS4_6 ,Interrupt Sub Mask Clear 6" "No effect,Cleared" textline " " bitfld.long 0x04 5. " MSKCLRS4_5 ,Interrupt Sub Mask Clear 5" "No effect,Cleared" bitfld.long 0x04 4. " MSKCLRS4_4 ,Interrupt Sub Mask Clear 4" "No effect,Cleared" textline " " bitfld.long 0x04 3. " MSKCLRS4_3 ,Interrupt Sub Mask Clear 3" "No effect,Cleared" bitfld.long 0x04 2. " MSKCLRS4_2 ,Interrupt Sub Mask Clear 2" "No effect,Cleared" textline " " bitfld.long 0x04 1. " MSKCLRS4_1 ,Interrupt Sub Mask Clear 1" "No effect,Cleared" bitfld.long 0x04 0. " MSKCLRS4_0 ,Interrupt Sub Mask Clear 0" "No effect,Cleared" textline " " line.long 0x08 "OUTDTSEL4,Output Data Select Register 4" bitfld.long 0x08 31. " OUTDTSEL4_31 ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL4_30 ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 29. " OUTDTSEL4_29 ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL4_28 ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL4_27 ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL4_26 ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL4_25 ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL4_24 ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 23. " OUTDTSEL4_23 ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL4_22 ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL4_21 ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL4_20 ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " OUTDTSEL4_19 ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL4_18 ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL4_17 ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL4_16 ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 15. " OUTDTSEL4_15 ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL4_14 ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL4_13 ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL4_12 ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 11. " OUTDTSEL4_11 ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL4_10 ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL4_9 ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL4_8 ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " OUTDTSEL4_7 ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL4_6 ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL4_5 ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL4_4 ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 3. " OUTDTSEL4_3 ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL4_2 ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL4_1 ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL4_0 ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline " " line.long 0x0C "OUTDTH4,Output Data High Register 4" bitfld.long 0x0C 31. " OUTDTH4_31 ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH4_30 ,Output Data High 30" "Not valid,Valid" textline " " bitfld.long 0x0C 29. " OUTDTH4_29 ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH4_28 ,Output Data High 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH4_27 ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH4_26 ,Output Data High 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH4_25 ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH4_24 ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " OUTDTH4_23 ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH4_22 ,Output Data High 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH4_21 ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH4_20 ,Output Data High 20" "Not valid,Valid" textline " " bitfld.long 0x0C 19. " OUTDTH4_19 ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH4_18 ,Output Data High 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH4_17 ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH4_16 ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OUTDTH4_15 ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH4_14 ,Output Data High 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH4_13 ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH4_12 ,Output Data High 12" "Not valid,Valid" textline " " bitfld.long 0x0C 11. " OUTDTH4_11 ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH4_10 ,Output Data High 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH4_9 ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH4_8 ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " OUTDTH4_7 ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH4_6 ,Output Data High 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH4_5 ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH4_4 ,Output Data High 4" "Not valid,Valid" textline " " bitfld.long 0x0C 3. " OUTDTH4_3 ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH4_2 ,Output Data High 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH4_1 ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH4_0 ,Output Data High 0" "Not valid,Valid" textline " " line.long 0x10 "OUTDTL4,Output Data Low Register 4" bitfld.long 0x10 31. " OUTDTL4_31 ,Output Data Low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL4_30 ,Output Data Low 30" "Not valid,Valid" textline " " bitfld.long 0x10 29. " OUTDTL4_29 ,Output Data Low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL4_28 ,Output Data Low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL4_27 ,Output Data Low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL4_26 ,Output Data Low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL4_25 ,Output Data Low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL4_24 ,Output Data Low 24" "Not valid,Valid" textline " " bitfld.long 0x10 23. " OUTDTL4_23 ,Output Data Low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL4_22 ,Output Data Low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL4_21 ,Output Data Low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL4_20 ,Output Data Low 20" "Not valid,Valid" textline " " bitfld.long 0x10 19. " OUTDTL4_19 ,Output Data Low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL4_18 ,Output Data Low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL4_17 ,Output Data Low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL4_16 ,Output Data Low 16" "Not valid,Valid" textline " " bitfld.long 0x10 15. " OUTDTL4_15 ,Output Data Low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL4_14 ,Output Data Low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL4_13 ,Output Data Low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL4_12 ,Output Data Low 12" "Not valid,Valid" textline " " bitfld.long 0x10 11. " OUTDTL4_11 ,Output Data Low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL4_10 ,Output Data Low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL4_9 ,Output Data Low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL4_8 ,Output Data Low 8" "Not valid,Valid" textline " " bitfld.long 0x10 7. " OUTDTL4_7 ,Output Data Low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL4_6 ,Output Data Low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL4_5 ,Output Data Low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL4_4 ,Output Data Low 4" "Not valid,Valid" textline " " bitfld.long 0x10 3. " OUTDTL4_3 ,Output Data Low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL4_2 ,Output Data Low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL4_1 ,Output Data Low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL4_0 ,Output Data Low 0" "Not valid,Valid" textline " " line.long 0x14 "BOTHEDGE4,One Edge/Both Edge Select Register 4" bitfld.long 0x14 31. " BOTHEDGE4_31 ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE4_30 ,One Edge/Both Edge Select 30" "One,Both" textline " " bitfld.long 0x14 29. " BOTHEDGE4_29 ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE4_28 ,One Edge/Both Edge Select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE4_27 ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE4_26 ,One Edge/Both Edge Select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE4_25 ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE4_24 ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " BOTHEDGE4_23 ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE4_22 ,One Edge/Both Edge Select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE4_21 ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE4_20 ,One Edge/Both Edge Select 20" "One,Both" textline " " bitfld.long 0x14 19. " BOTHEDGE4_19 ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE4_18 ,One Edge/Both Edge Select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE4_17 ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE4_16 ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " BOTHEDGE4_15 ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE4_14 ,One Edge/Both Edge Select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE4_13 ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE4_12 ,One Edge/Both Edge Select 12" "One,Both" textline " " bitfld.long 0x14 11. " BOTHEDGE4_11 ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE4_10 ,One Edge/Both Edge Select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE4_9 ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE4_8 ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " BOTHEDGE4_7 ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE4_6 ,One Edge/Both Edge Select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE4_5 ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE4_4 ,One Edge/Both Edge Select 4" "One,Both" textline " " bitfld.long 0x14 3. " BOTHEDGE4_3 ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE4_2 ,One Edge/Both Edge Select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE4_1 ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE4_0 ,One Edge/Both Edge Select 0" "One,Both" textline " " width 0xB tree.end tree "GPIO 5" base ad:0xE6055000 width 14. group.long 0x00++0xB line.long 0x00 "IOINTSEL5,General IO/interrupt switching register 5" bitfld.long 0x00 31. " IOINTSEL5_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL5_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" textline " " bitfld.long 0x00 29. " IOINTSEL5_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL5_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL5_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL5_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL5_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL5_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" textline " " bitfld.long 0x00 23. " IOINTSEL5_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL5_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL5_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL5_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" textline " " bitfld.long 0x00 19. " IOINTSEL5_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL5_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL5_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL5_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" textline " " bitfld.long 0x00 15. " IOINTSEL5_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL5_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL5_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL5_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" textline " " bitfld.long 0x00 11. " IOINTSEL5_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL5_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL5_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL5_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" textline " " bitfld.long 0x00 7. " IOINTSEL5_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL5_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL5_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL5_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" textline " " bitfld.long 0x00 3. " IOINTSEL5_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL5_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL5_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL5_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" textline " " line.long 0x04 "INOUTSEL5,General input/output switching register 5" bitfld.long 0x04 31. " INOUTSEL5_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL5_30 ,General input or output mode select for channel 30" "Input,Output" textline " " bitfld.long 0x04 29. " INOUTSEL5_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL5_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL5_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL5_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL5_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL5_24 ,General input or output mode select for channel 24" "Input,Output" textline " " bitfld.long 0x04 23. " INOUTSEL5_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL5_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL5_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL5_20 ,General input or output mode select for channel 20" "Input,Output" textline " " bitfld.long 0x04 19. " INOUTSEL5_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL5_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL5_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL5_16 ,General input or output mode select for channel 16" "Input,Output" textline " " bitfld.long 0x04 15. " INOUTSEL5_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL5_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL5_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL5_12 ,General input or output mode select for channel 12" "Input,Output" textline " " bitfld.long 0x04 11. " INOUTSEL5_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL5_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL5_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL5_8 ,General input or output mode select for channel 8" "Input,Output" textline " " bitfld.long 0x04 7. " INOUTSEL5_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL5_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL5_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL5_4 ,General input or output mode select for channel 4" "Input,Output" textline " " bitfld.long 0x04 3. " INOUTSEL5_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL5_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL5_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL5_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT5,General output register 5" bitfld.long 0x08 31. " OUTDT5_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT5_30 ,Output value for channel 30" "0,1" textline " " bitfld.long 0x08 29. " OUTDT5_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT5_28 ,Output value for channel 28" "0,1" textline " " bitfld.long 0x08 27. " OUTDT5_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT5_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT5_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT5_24 ,Output value for channel 24" "0,1" textline " " bitfld.long 0x08 23. " OUTDT5_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT5_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT5_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT5_20 ,Output value for channel 20" "0,1" textline " " bitfld.long 0x08 19. " OUTDT5_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT5_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT5_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT5_16 ,Output value for channel 16" "0,1" textline " " bitfld.long 0x08 15. " OUTDT5_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT5_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT5_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT5_12 ,Output value for channel 12" "0,1" textline " " bitfld.long 0x08 11. " OUTDT5_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT5_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT5_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT5_8 ,Output value for channel 8" "0,1" textline " " bitfld.long 0x08 7. " OUTDT5_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT5_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT5_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT5_4 ,Output value for channel 4" "0,1" textline " " bitfld.long 0x08 3. " OUTDT5_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT5_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT5_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT5_0 ,Output value for channel 0" "0,1" textline " " rgroup.long 0x0C++0x07 line.long 0x00 "INDT5,General input register 5" bitfld.long 0x00 31. " INDT5_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT5_30 ,Value received through pin 30" "0,1" textline " " bitfld.long 0x00 29. " INDT5_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT5_28 ,Value received through pin 28" "0,1" textline " " bitfld.long 0x00 27. " INDT5_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT5_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT5_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT5_24 ,Value received through pin 24" "0,1" textline " " bitfld.long 0x00 23. " INDT5_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT5_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT5_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT5_20 ,Value received through pin 20" "0,1" textline " " bitfld.long 0x00 19. " INDT5_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT5_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT5_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT5_16 ,Value received through pin 16" "0,1" textline " " bitfld.long 0x00 15. " INDT5_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT5_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT5_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT5_12 ,Value received through pin 12" "0,1" textline " " bitfld.long 0x00 11. " INDT5_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT5_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT5_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT5_8 ,Value received through pin 8" "0,1" textline " " bitfld.long 0x00 7. " INDT5_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT5_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT5_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT5_4 ,Value received through pin 4" "0,1" textline " " bitfld.long 0x00 3. " INDT5_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT5_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT5_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT5_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT5,Interrupt display register 5" bitfld.long 0x04 31. " INTDT5_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT5_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " INTDT5_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT5_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT5_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT5_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT5_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT5_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " INTDT5_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT5_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT5_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT5_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " INTDT5_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT5_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT5_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT5_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " INTDT5_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT5_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT5_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT5_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " INTDT5_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT5_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT5_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT5_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " INTDT5_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT5_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT5_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT5_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " INTDT5_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT5_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT5_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT5_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" textline " " group.long 0x14++0x17 line.long 0x00 "INTCLR5,Interrupt clear register 5" bitfld.long 0x00 31. " INTCLR5_31 ,Clears pin 31 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 30. " INTCLR5_30 ,Clears pin 30 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 29. " INTCLR5_29 ,Clears pin 29 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 28. " INTCLR5_28 ,Clears pin 28 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 27. " INTCLR5_27 ,Clears pin 27 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 26. " INTCLR5_26 ,Clears pin 26 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 25. " INTCLR5_25 ,Clears pin 25 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 24. " INTCLR5_24 ,Clears pin 24 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 23. " INTCLR5_23 ,Clears pin 23 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 22. " INTCLR5_22 ,Clears pin 22 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 21. " INTCLR5_21 ,Clears pin 21 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 20. " INTCLR5_20 ,Clears pin 20 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 19. " INTCLR5_19 ,Clears pin 19 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 18. " INTCLR5_18 ,Clears pin 18 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " INTCLR5_17 ,Clears pin 17 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 16. " INTCLR5_16 ,Clears pin 16 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 15. " INTCLR5_15 ,Clears pin 15 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 14. " INTCLR5_14 ,Clears pin 14 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 13. " INTCLR5_13 ,Clears pin 13 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 12. " INTCLR5_12 ,Clears pin 12 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 11. " INTCLR5_11 ,Clears pin 11 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 10. " INTCLR5_10 ,Clears pin 10 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " INTCLR5_9 ,Clears pin 9 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 8. " INTCLR5_8 ,Clears pin 8 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " INTCLR5_7 ,Clears pin 7 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 6. " INTCLR5_6 ,Clears pin 6 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " INTCLR5_5 ,Clears pin 5 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 4. " INTCLR5_4 ,Clears pin 4 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " INTCLR5_3 ,Clears pin 3 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 2. " INTCLR5_2 ,Clears pin 2 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " INTCLR5_1 ,Clears pin 1 bit in the Interrupt Display Register" "Not cleared,Cleared" bitfld.long 0x00 0. " INTCLR5_0 ,Clears pin 0 bit in the Interrupt Display Register" "Not cleared,Cleared" textline " " line.long 0x04 "INTMSK5,Interrupt mask register 5" bitfld.long 0x04 31. " INTMSK5_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK5_30 ,Masks interrupt request for pin 30" "Masked,Not masked" textline " " bitfld.long 0x04 29. " INTMSK5_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK5_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK5_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK5_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK5_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK5_24 ,Masks interrupt request for pin 24" "Masked,Not masked" textline " " bitfld.long 0x04 23. " INTMSK5_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK5_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK5_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK5_20 ,Masks interrupt request for pin 20" "Masked,Not masked" textline " " bitfld.long 0x04 19. " INTMSK5_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK5_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK5_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK5_16 ,Masks interrupt request for pin 16" "Masked,Not masked" textline " " bitfld.long 0x04 15. " INTMSK5_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK5_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK5_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK5_12 ,Masks interrupt request for pin 12" "Masked,Not masked" textline " " bitfld.long 0x04 11. " INTMSK5_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK5_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK5_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK5_8 ,Masks interrupt request for pin 8" "Masked,Not masked" textline " " bitfld.long 0x04 7. " INTMSK5_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK5_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK5_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK5_4 ,Masks interrupt request for pin 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " INTMSK5_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK5_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK5_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK5_0 ,Masks interrupt request for pin 0" "Masked,Not masked" textline " " line.long 0x08 "MSKCLR5,Interrupt mask clear register 5" bitfld.long 0x08 31. " MSKCLR5_31 ,Clears mask for pin 31" "Not cleared,Cleared" bitfld.long 0x08 30. " MSKCLR5_30 ,Clears mask for pin 30" "Not cleared,Cleared" textline " " bitfld.long 0x08 29. " MSKCLR5_29 ,Clears mask for pin 29" "Not cleared,Cleared" bitfld.long 0x08 28. " MSKCLR5_28 ,Clears mask for pin 28" "Not cleared,Cleared" textline " " bitfld.long 0x08 27. " MSKCLR5_27 ,Clears mask for pin 27" "Not cleared,Cleared" bitfld.long 0x08 26. " MSKCLR5_26 ,Clears mask for pin 26" "Not cleared,Cleared" textline " " bitfld.long 0x08 25. " MSKCLR5_25 ,Clears mask for pin 25" "Not cleared,Cleared" bitfld.long 0x08 24. " MSKCLR5_24 ,Clears mask for pin 24" "Not cleared,Cleared" textline " " bitfld.long 0x08 23. " MSKCLR5_23 ,Clears mask for pin 23" "Not cleared,Cleared" bitfld.long 0x08 22. " MSKCLR5_22 ,Clears mask for pin 22" "Not cleared,Cleared" textline " " bitfld.long 0x08 21. " MSKCLR5_21 ,Clears mask for pin 21" "Not cleared,Cleared" bitfld.long 0x08 20. " MSKCLR5_20 ,Clears mask for pin 20" "Not cleared,Cleared" textline " " bitfld.long 0x08 19. " MSKCLR5_19 ,Clears mask for pin 19" "Not cleared,Cleared" bitfld.long 0x08 18. " MSKCLR5_18 ,Clears mask for pin 18" "Not cleared,Cleared" textline " " bitfld.long 0x08 17. " MSKCLR5_17 ,Clears mask for pin 17" "Not cleared,Cleared" bitfld.long 0x08 16. " MSKCLR5_16 ,Clears mask for pin 16" "Not cleared,Cleared" textline " " bitfld.long 0x08 15. " MSKCLR5_15 ,Clears mask for pin 15" "Not cleared,Cleared" bitfld.long 0x08 14. " MSKCLR5_14 ,Clears mask for pin 14" "Not cleared,Cleared" textline " " bitfld.long 0x08 13. " MSKCLR5_13 ,Clears mask for pin 13" "Not cleared,Cleared" bitfld.long 0x08 12. " MSKCLR5_12 ,Clears mask for pin 12" "Not cleared,Cleared" textline " " bitfld.long 0x08 11. " MSKCLR5_11 ,Clears mask for pin 11" "Not cleared,Cleared" bitfld.long 0x08 10. " MSKCLR5_10 ,Clears mask for pin 10" "Not cleared,Cleared" textline " " bitfld.long 0x08 9. " MSKCLR5_9 ,Clears mask for pin 9" "Not cleared,Cleared" bitfld.long 0x08 8. " MSKCLR5_8 ,Clears mask for pin 8" "Not cleared,Cleared" textline " " bitfld.long 0x08 7. " MSKCLR5_7 ,Clears mask for pin 7" "Not cleared,Cleared" bitfld.long 0x08 6. " MSKCLR5_6 ,Clears mask for pin 6" "Not cleared,Cleared" textline " " bitfld.long 0x08 5. " MSKCLR5_5 ,Clears mask for pin 5" "Not cleared,Cleared" bitfld.long 0x08 4. " MSKCLR5_4 ,Clears mask for pin 4" "Not cleared,Cleared" textline " " bitfld.long 0x08 3. " MSKCLR5_3 ,Clears mask for pin 3" "Not cleared,Cleared" bitfld.long 0x08 2. " MSKCLR5_2 ,Clears mask for pin 2" "Not cleared,Cleared" textline " " bitfld.long 0x08 1. " MSKCLR5_1 ,Clears mask for pin 1" "Not cleared,Cleared" bitfld.long 0x08 0. " MSKCLR5_0 ,Clears mask for pin 0" "Not cleared,Cleared" textline " " line.long 0x0C "POSNEG5,Positive/negative logic select register 5" bitfld.long 0x0C 31. " POSNEG5_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG5_30 ,Selects polarity for pin 30" "Positive,Negative" textline " " bitfld.long 0x0C 29. " POSNEG5_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG5_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG5_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG5_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG5_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG5_24 ,Selects polarity for pin 24" "Positive,Negative" textline " " bitfld.long 0x0C 23. " POSNEG5_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG5_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG5_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG5_20 ,Selects polarity for pin 20" "Positive,Negative" textline " " bitfld.long 0x0C 19. " POSNEG5_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG5_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG5_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG5_16 ,Selects polarity for pin 16" "Positive,Negative" textline " " bitfld.long 0x0C 15. " POSNEG5_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG5_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG5_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG5_12 ,Selects polarity for pin 12" "Positive,Negative" textline " " bitfld.long 0x0C 11. " POSNEG5_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG5_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG5_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG5_8 ,Selects polarity for pin 8" "Positive,Negative" textline " " bitfld.long 0x0C 7. " POSNEG5_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG5_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG5_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG5_4 ,Selects polarity for pin 4" "Positive,Negative" textline " " bitfld.long 0x0C 3. " POSNEG5_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG5_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG5_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG5_0 ,Selects polarity for pin 0" "Positive,Negative" textline " " line.long 0x10 "EDGLEVEL5,Edge/level select register 5" bitfld.long 0x10 31. " EDGLEVEL5_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL5_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" textline " " bitfld.long 0x10 29. " EDGLEVEL5_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL5_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL5_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL5_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL5_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL5_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" textline " " bitfld.long 0x10 23. " EDGLEVEL5_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL5_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL5_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL5_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" textline " " bitfld.long 0x10 19. " EDGLEVEL5_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL5_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL5_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL5_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" textline " " bitfld.long 0x10 15. " EDGLEVEL5_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL5_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL5_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL5_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" textline " " bitfld.long 0x10 11. " EDGLEVEL5_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL5_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL5_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL5_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" textline " " bitfld.long 0x10 7. " EDGLEVEL5_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL5_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL5_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL5_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" textline " " bitfld.long 0x10 3. " EDGLEVEL5_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL5_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL5_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL5_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF5,Chattering prevention on/off register 5" sif (cpuis("RCARM2"))||(cpuis("R8A77470")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "clkp/25000,clkp/12500,clkp/6250,clkp/3125" textline " " endif bitfld.long 0x14 3. " FILONOFF5_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF5_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " FILONOFF5_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF5_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" textline " " group.long 0x38++0x17 line.long 0x00 "INTMSKS5,Interrupt Sub Mask Register 5" bitfld.long 0x00 31. " INTMSKS5_31 ,Interrupt Sub Mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS5_30 ,Interrupt Sub Mask 30" "Masked,Not masked" textline " " bitfld.long 0x00 29. " INTMSKS5_29 ,Interrupt Sub Mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS5_28 ,Interrupt Sub Mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS5_27 ,Interrupt Sub Mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS5_26 ,Interrupt Sub Mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS5_25 ,Interrupt Sub Mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS5_24 ,Interrupt Sub Mask 24" "Masked,Not masked" textline " " bitfld.long 0x00 23. " INTMSKS5_23 ,Interrupt Sub Mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS5_22 ,Interrupt Sub Mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS5_21 ,Interrupt Sub Mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS5_20 ,Interrupt Sub Mask 20" "Masked,Not masked" textline " " bitfld.long 0x00 19. " INTMSKS5_19 ,Interrupt Sub Mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS5_18 ,Interrupt Sub Mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS5_17 ,Interrupt Sub Mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS5_16 ,Interrupt Sub Mask 16" "Masked,Not masked" textline " " bitfld.long 0x00 15. " INTMSKS5_15 ,Interrupt Sub Mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS5_14 ,Interrupt Sub Mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS5_13 ,Interrupt Sub Mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS5_12 ,Interrupt Sub Mask 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " INTMSKS5_11 ,Interrupt Sub Mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS5_10 ,Interrupt Sub Mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS5_9 ,Interrupt Sub Mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS5_8 ,Interrupt Sub Mask 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " INTMSKS5_7 ,Interrupt Sub Mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS5_6 ,Interrupt Sub Mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS5_5 ,Interrupt Sub Mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS5_4 ,Interrupt Sub Mask 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " INTMSKS5_3 ,Interrupt Sub Mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS5_2 ,Interrupt Sub Mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS5_1 ,Interrupt Sub Mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS5_0 ,Interrupt Sub Mask 0" "Masked,Not masked" textline " " line.long 0x04 "MSKCLRS5,Interrupt Sub Mask Clear Register 5" bitfld.long 0x04 31. " MSKCLRS5_31 ,Interrupt Sub Mask Clear 31" "No effect,Cleared" bitfld.long 0x04 30. " MSKCLRS5_30 ,Interrupt Sub Mask Clear 30" "No effect,Cleared" textline " " bitfld.long 0x04 29. " MSKCLRS5_29 ,Interrupt Sub Mask Clear 29" "No effect,Cleared" bitfld.long 0x04 28. " MSKCLRS5_28 ,Interrupt Sub Mask Clear 28" "No effect,Cleared" textline " " bitfld.long 0x04 27. " MSKCLRS5_27 ,Interrupt Sub Mask Clear 27" "No effect,Cleared" bitfld.long 0x04 26. " MSKCLRS5_26 ,Interrupt Sub Mask Clear 26" "No effect,Cleared" textline " " bitfld.long 0x04 25. " MSKCLRS5_25 ,Interrupt Sub Mask Clear 25" "No effect,Cleared" bitfld.long 0x04 24. " MSKCLRS5_24 ,Interrupt Sub Mask Clear 24" "No effect,Cleared" textline " " bitfld.long 0x04 23. " MSKCLRS5_23 ,Interrupt Sub Mask Clear 23" "No effect,Cleared" bitfld.long 0x04 22. " MSKCLRS5_22 ,Interrupt Sub Mask Clear 22" "No effect,Cleared" textline " " bitfld.long 0x04 21. " MSKCLRS5_21 ,Interrupt Sub Mask Clear 21" "No effect,Cleared" bitfld.long 0x04 20. " MSKCLRS5_20 ,Interrupt Sub Mask Clear 20" "No effect,Cleared" textline " " bitfld.long 0x04 19. " MSKCLRS5_19 ,Interrupt Sub Mask Clear 19" "No effect,Cleared" bitfld.long 0x04 18. " MSKCLRS5_18 ,Interrupt Sub Mask Clear 18" "No effect,Cleared" textline " " bitfld.long 0x04 17. " MSKCLRS5_17 ,Interrupt Sub Mask Clear 17" "No effect,Cleared" bitfld.long 0x04 16. " MSKCLRS5_16 ,Interrupt Sub Mask Clear 16" "No effect,Cleared" textline " " bitfld.long 0x04 15. " MSKCLRS5_15 ,Interrupt Sub Mask Clear 15" "No effect,Cleared" bitfld.long 0x04 14. " MSKCLRS5_14 ,Interrupt Sub Mask Clear 14" "No effect,Cleared" textline " " bitfld.long 0x04 13. " MSKCLRS5_13 ,Interrupt Sub Mask Clear 13" "No effect,Cleared" bitfld.long 0x04 12. " MSKCLRS5_12 ,Interrupt Sub Mask Clear 12" "No effect,Cleared" textline " " bitfld.long 0x04 11. " MSKCLRS5_11 ,Interrupt Sub Mask Clear 11" "No effect,Cleared" bitfld.long 0x04 10. " MSKCLRS5_10 ,Interrupt Sub Mask Clear 10" "No effect,Cleared" textline " " bitfld.long 0x04 9. " MSKCLRS5_9 ,Interrupt Sub Mask Clear 9" "No effect,Cleared" bitfld.long 0x04 8. " MSKCLRS5_8 ,Interrupt Sub Mask Clear 8" "No effect,Cleared" textline " " bitfld.long 0x04 7. " MSKCLRS5_7 ,Interrupt Sub Mask Clear 7" "No effect,Cleared" bitfld.long 0x04 6. " MSKCLRS5_6 ,Interrupt Sub Mask Clear 6" "No effect,Cleared" textline " " bitfld.long 0x04 5. " MSKCLRS5_5 ,Interrupt Sub Mask Clear 5" "No effect,Cleared" bitfld.long 0x04 4. " MSKCLRS5_4 ,Interrupt Sub Mask Clear 4" "No effect,Cleared" textline " " bitfld.long 0x04 3. " MSKCLRS5_3 ,Interrupt Sub Mask Clear 3" "No effect,Cleared" bitfld.long 0x04 2. " MSKCLRS5_2 ,Interrupt Sub Mask Clear 2" "No effect,Cleared" textline " " bitfld.long 0x04 1. " MSKCLRS5_1 ,Interrupt Sub Mask Clear 1" "No effect,Cleared" bitfld.long 0x04 0. " MSKCLRS5_0 ,Interrupt Sub Mask Clear 0" "No effect,Cleared" textline " " line.long 0x08 "OUTDTSEL5,Output Data Select Register 5" bitfld.long 0x08 31. " OUTDTSEL5_31 ,Output Data Select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL5_30 ,Output Data Select 30" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 29. " OUTDTSEL5_29 ,Output Data Select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL5_28 ,Output Data Select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL5_27 ,Output Data Select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL5_26 ,Output Data Select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL5_25 ,Output Data Select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL5_24 ,Output Data Select 24" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 23. " OUTDTSEL5_23 ,Output Data Select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL5_22 ,Output Data Select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL5_21 ,Output Data Select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL5_20 ,Output Data Select 20" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 19. " OUTDTSEL5_19 ,Output Data Select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL5_18 ,Output Data Select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL5_17 ,Output Data Select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL5_16 ,Output Data Select 16" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 15. " OUTDTSEL5_15 ,Output Data Select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL5_14 ,Output Data Select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL5_13 ,Output Data Select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL5_12 ,Output Data Select 12" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 11. " OUTDTSEL5_11 ,Output Data Select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL5_10 ,Output Data Select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL5_9 ,Output Data Select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL5_8 ,Output Data Select 8" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 7. " OUTDTSEL5_7 ,Output Data Select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL5_6 ,Output Data Select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL5_5 ,Output Data Select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL5_4 ,Output Data Select 4" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 3. " OUTDTSEL5_3 ,Output Data Select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL5_2 ,Output Data Select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL5_1 ,Output Data Select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL5_0 ,Output Data Select 0" "OUTDT,OUTDTH/OUTDTL" textline " " line.long 0x0C "OUTDTH5,Output Data High Register 5" bitfld.long 0x0C 31. " OUTDTH5_31 ,Output Data High 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH5_30 ,Output Data High 30" "Not valid,Valid" textline " " bitfld.long 0x0C 29. " OUTDTH5_29 ,Output Data High 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH5_28 ,Output Data High 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH5_27 ,Output Data High 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH5_26 ,Output Data High 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH5_25 ,Output Data High 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH5_24 ,Output Data High 24" "Not valid,Valid" textline " " bitfld.long 0x0C 23. " OUTDTH5_23 ,Output Data High 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH5_22 ,Output Data High 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH5_21 ,Output Data High 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH5_20 ,Output Data High 20" "Not valid,Valid" textline " " bitfld.long 0x0C 19. " OUTDTH5_19 ,Output Data High 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH5_18 ,Output Data High 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH5_17 ,Output Data High 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH5_16 ,Output Data High 16" "Not valid,Valid" textline " " bitfld.long 0x0C 15. " OUTDTH5_15 ,Output Data High 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH5_14 ,Output Data High 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH5_13 ,Output Data High 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH5_12 ,Output Data High 12" "Not valid,Valid" textline " " bitfld.long 0x0C 11. " OUTDTH5_11 ,Output Data High 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH5_10 ,Output Data High 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH5_9 ,Output Data High 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH5_8 ,Output Data High 8" "Not valid,Valid" textline " " bitfld.long 0x0C 7. " OUTDTH5_7 ,Output Data High 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH5_6 ,Output Data High 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH5_5 ,Output Data High 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH5_4 ,Output Data High 4" "Not valid,Valid" textline " " bitfld.long 0x0C 3. " OUTDTH5_3 ,Output Data High 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH5_2 ,Output Data High 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH5_1 ,Output Data High 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH5_0 ,Output Data High 0" "Not valid,Valid" textline " " line.long 0x10 "OUTDTL5,Output Data Low Register 5" bitfld.long 0x10 31. " OUTDTL5_31 ,Output Data Low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL5_30 ,Output Data Low 30" "Not valid,Valid" textline " " bitfld.long 0x10 29. " OUTDTL5_29 ,Output Data Low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL5_28 ,Output Data Low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL5_27 ,Output Data Low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL5_26 ,Output Data Low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL5_25 ,Output Data Low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL5_24 ,Output Data Low 24" "Not valid,Valid" textline " " bitfld.long 0x10 23. " OUTDTL5_23 ,Output Data Low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL5_22 ,Output Data Low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL5_21 ,Output Data Low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL5_20 ,Output Data Low 20" "Not valid,Valid" textline " " bitfld.long 0x10 19. " OUTDTL5_19 ,Output Data Low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL5_18 ,Output Data Low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL5_17 ,Output Data Low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL5_16 ,Output Data Low 16" "Not valid,Valid" textline " " bitfld.long 0x10 15. " OUTDTL5_15 ,Output Data Low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL5_14 ,Output Data Low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL5_13 ,Output Data Low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL5_12 ,Output Data Low 12" "Not valid,Valid" textline " " bitfld.long 0x10 11. " OUTDTL5_11 ,Output Data Low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL5_10 ,Output Data Low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL5_9 ,Output Data Low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL5_8 ,Output Data Low 8" "Not valid,Valid" textline " " bitfld.long 0x10 7. " OUTDTL5_7 ,Output Data Low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL5_6 ,Output Data Low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL5_5 ,Output Data Low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL5_4 ,Output Data Low 4" "Not valid,Valid" textline " " bitfld.long 0x10 3. " OUTDTL5_3 ,Output Data Low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL5_2 ,Output Data Low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL5_1 ,Output Data Low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL5_0 ,Output Data Low 0" "Not valid,Valid" textline " " line.long 0x14 "BOTHEDGE5,One Edge/Both Edge Select Register 5" bitfld.long 0x14 31. " BOTHEDGE5_31 ,One Edge/Both Edge Select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE5_30 ,One Edge/Both Edge Select 30" "One,Both" textline " " bitfld.long 0x14 29. " BOTHEDGE5_29 ,One Edge/Both Edge Select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE5_28 ,One Edge/Both Edge Select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE5_27 ,One Edge/Both Edge Select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE5_26 ,One Edge/Both Edge Select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE5_25 ,One Edge/Both Edge Select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE5_24 ,One Edge/Both Edge Select 24" "One,Both" textline " " bitfld.long 0x14 23. " BOTHEDGE5_23 ,One Edge/Both Edge Select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE5_22 ,One Edge/Both Edge Select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE5_21 ,One Edge/Both Edge Select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE5_20 ,One Edge/Both Edge Select 20" "One,Both" textline " " bitfld.long 0x14 19. " BOTHEDGE5_19 ,One Edge/Both Edge Select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE5_18 ,One Edge/Both Edge Select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE5_17 ,One Edge/Both Edge Select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE5_16 ,One Edge/Both Edge Select 16" "One,Both" textline " " bitfld.long 0x14 15. " BOTHEDGE5_15 ,One Edge/Both Edge Select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE5_14 ,One Edge/Both Edge Select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE5_13 ,One Edge/Both Edge Select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE5_12 ,One Edge/Both Edge Select 12" "One,Both" textline " " bitfld.long 0x14 11. " BOTHEDGE5_11 ,One Edge/Both Edge Select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE5_10 ,One Edge/Both Edge Select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE5_9 ,One Edge/Both Edge Select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE5_8 ,One Edge/Both Edge Select 8" "One,Both" textline " " bitfld.long 0x14 7. " BOTHEDGE5_7 ,One Edge/Both Edge Select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE5_6 ,One Edge/Both Edge Select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE5_5 ,One Edge/Both Edge Select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE5_4 ,One Edge/Both Edge Select 4" "One,Both" textline " " bitfld.long 0x14 3. " BOTHEDGE5_3 ,One Edge/Both Edge Select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE5_2 ,One Edge/Both Edge Select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE5_1 ,One Edge/Both Edge Select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE5_0 ,One Edge/Both Edge Select 0" "One,Both" textline " " width 0xB tree.end tree.end tree "CPG (Clock Pulse Generator)" base ad:0xE6150000 width 11. group.long 0x04++0x3 line.long 0x00 "FRQCRB,Frequency Control Register B" bitfld.long 0x00 31. " KICK ,KICK bit" "Not activated,Activated" bitfld.long 0x00 20.--23. " ZTRFC ,Debug Trace port Clock (ZTRfi) Frequency Division Ratio" ",,x 1/4,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,,,x 1/5,?..." bitfld.long 0x00 16.--19. " ZTFC ,Debug Trace bus Clock (ZTfi) Frequency Division Ratio" ",,,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,,,x 1/5,?..." textline " " bitfld.long 0x00 0.--3. " ZTRD2FC ,Debug Clock (ZTRD2fi) Frequency Division Ratio" ",,,,,x 1/12,x 1/16,x 1/18,x 1/24,?..." sif !cpuis("R8A77940") group.long 0xE0++0x3 line.long 0x00 "FRQCRC,Frequency Control Register C" bitfld.long 0x00 8.--12. " ZFC ,AP-System Core (Cortex-A15) Clock (Zfi) Frequency Division Ratio" "x 32/32,x 31/32,x 30/32,x 29/32,x 28/32,x 27/32,x 26/32,x 25/32,x 24/32,x 23/32,x 22/32,x 21/32,x 20/32,x 19/32,x 18/32,x 17/32,x 16/32,x 15/32,x 14/32,x 13/32,x 12/32,x 11/32,x 10/32,x 9/32,x 8/32,x 7/32,x 6/32,x 5/32,x 4/32,x 3/32,x 2/32,x 1/32" rgroup.long 0xD0++0x3 line.long 0x00 "PLLECR,PLL Enable Control Register" bitfld.long 0x00 8. " PLL0ST ,PLL circuit 0 status" "Off,On" group.long 0xD8++0x3 line.long 0x00 "PLL0CR,PLL0 Control Register" hexmask.long.byte 0x00 24.--30. 1. " STC ,PLL Circuit 0 Multiplication Ratio" endif group.long 0x74++0x7 line.long 0x00 "SDCKCR,SDHI Clock Frequency Control Register" bitfld.long 0x00 8.--11. " SDHFC ,SDH clock (SDHfi) Frequency Division Ratio" "x 1/2,x 1/3,x 1/4,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,?..." bitfld.long 0x00 4.--7. " SD0FC ,SDHI0 clock (SD0fi) Frequency Division Ratio" ",,,,,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,x 1/10,?..." sif ((cpu()!="RCARM2")&&(!cpuis("R8A77940"))) bitfld.long 0x00 0.--3. " SD1FC ,SDHI1 clock (SD1fi) Frequency Division Ratio" ",,,,,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,x 1/10,,," endif sif (cpu()=="RCARM2"||cpuis("R8A77940")) line.long 0x04 "SD1CKCR,SDHI1 Clock Frequency Control Register" else line.long 0x04 "SD2CKCR,SDHI2 Clock Frequency Control Register" endif bitfld.long 0x04 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x04 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" sif (cpu()=="RCARM2"||cpuis("R8A77940")) group.long 0x26C++0x03 line.long 0x00 "SD2CKCR,SDHI2 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x7C++0x03 line.long 0x00 "SD3CKCR,SDHI3 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif group.long 0x240++0x3 line.long 0x00 "MMC0CKCR,MMC0 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" sif (cpu()!="RCARM2"&&(!cpuis("R8A77940"))) group.long 0x244++0x03 line.long 0x00 "MMC1CKCR,MMC1 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif group.long 0x25C++0x3 line.long 0x00 "ADSPCKCR,ADSP Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--3. " DIV ,Division Ratio" ",x 1/3,x 1/4,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,?..." sif (!cpuis("R8A77940")) group.long 0x248++0x7 line.long 0x00 "SSPCKCR,SSP Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" line.long 0x04 "SSPRSCKCR,SSPRS Clock Frequency Control Register" bitfld.long 0x04 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x04 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif sif cpu()=="RCARM2" group.long 0x234++0x03 line.long 0x00 "GPUCKCR,GPU Clock Frequency Control Register" bitfld.long 0x00 15. " ZGCKSEL ,Clock Select" "(PLL1/VCO x 1/2) x 1/3,(PLL1/VCO x 1/2) x 1/5" endif sif (cpu()!="RCARM2"&&(!cpuis("R8A77940"))) if (((per.l(ad:0xE6150000+0x230))&0x2000)==0x0000) group.long 0x230++0x3 line.long 0x00 "MTSBCKCR,MTSB Clock Frequency Control Register" bitfld.long 0x00 13. " MTSB0SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" bitfld.long 0x00 12. " MTSB1SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" textline " " bitfld.long 0x00 4.--7. " MTSB1X2FC ,MTSB1X2 clock (MTSB1X2fi) Frequency Division Ratio when using CPGMA/PLL1" ",,x 1/4,x 1/6,,,,,,,,,x 1/5,,,Stopped" bitfld.long 0x00 0.--3. " MTSB1X1FC ,MTSB1X1 clock (MTSB1X1fi) Frequency Division Ratio when using CPGMA/PLL1" ",,,,x 1/8,x 1/12,,,,,,,x 1/10,,,Stopped" else group.long 0x230++0x3 line.long 0x00 "MTSBCKCR,MTSB Clock Frequency Control Register" bitfld.long 0x00 13. " MTSB0SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" bitfld.long 0x00 12. " MTSB1SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" bitfld.long 0x00 8.--11. " MTSB0FC ,MTSB0 clock (MTSB0fi) Frequency Division Ratio when using CPGMA/PLL1" ",,,x 1/6,x 1/8,,,,,,,,x 1/10,,,Stopped" endif endif group.long 0x270++0x7 line.long 0x00 "RCANCKCR,RCAN Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" line.long 0x04 "FMMCKCR,FMM Clock Frequency Control Register" bitfld.long 0x04 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" sif ((cpu()=="RCARM2")||cpuis("R8A77940")) bitfld.long 0x04 1. " FMMCKSEL ,Select the clock supplied to FMM" "FMCLK,MLBCLK / 6" endif sif !cpuis("R8A77940") group.long 0x58++0x3 line.long 0x00 "DVFSCR0,DVFS Control Register 0" bitfld.long 0x00 31. " DVFSEN ,Enables DVFS control sequence" "Disabled,Enabled" bitfld.long 0x00 29. " PLLVSMODE ,PLL Power Supply request mode" "Disabled,Enabled" rbitfld.long 0x00 27. " I2CEND ,I2C status bit" "Not started/On going,Finished" textline " " rbitfld.long 0x00 26. " I2CERR ,I2C error status bit" "No error,Error" bitfld.long 0x00 23. " VSSTART ,Voltage Scaling Start Bit" "Not started,Started" bitfld.long 0x00 20. " VSINTEN ,VSEND Interrupt Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " VSERR2 ,Error bit 2" "No error,Error" bitfld.long 0x00 17. " VSERR1 ,Error bit 1" "No error,Error" bitfld.long 0x00 16. " VSEND ,VSEND bit" "Not completed,Completed" textline " " bitfld.long 0x00 13. " VREQ ,Request voltage bit" "Low,High" rbitfld.long 0x00 9. " VCURRENT ,Request Status Bit" "Not requested,Requested" group.long 0x5C++0x3 line.long 0x00 "DVFSCR1,DVFS Control Register 1" bitfld.long 0x00 8. " WAITMODE ,Selects Timer mode for DVFS timer" "Timeout,Time Measurement" hexmask.long.byte 0x00 0.--7. 1. " WAITTIME ,DVFS timer value" endif base ad:0xFFEF0000 group.long 0x00++0x7 line.long 0x00 "SH4AIFC,SH-4A Ick Frequency Control Register" bitfld.long 0x00 0.--2. " IIFC ,SH-4A internal clock division ratio" "x 1,x 1/2,x 1/3,x 1/6,?..." line.long 0x04 "SH4ASTBCR,SH-4A Standby Control Register" bitfld.long 0x04 31. " LTSLP ,Light Sleep" "Disabled,Enabled" rbitfld.long 0x04 9. " EXRESET ,SH-4A Core Reset State" "No reset,Reset" bitfld.long 0x04 8. " EXRESETEND ,SH-4A Core Reset Completed" "Not completed,Completed" textline " " rbitfld.long 0x04 2. " SLEEP ,Sleep Mode" "Disabled,Enabled" bitfld.long 0x04 1. " RESET ,Reset" "No reset,Reset" bitfld.long 0x04 0. " MSTP ,Module Stop" "Not stopped,Stopped" width 0xB tree.end tree "Module Standby, Software Reset" base ad:0xE6150000 width 11. tree "Module Stop Status Registers" rgroup.long 0x30++0x3 line.long 0x00 "MSTPSR0,Module Stop Status Register 0" bitfld.long 0x00 22. " MSTPST022 ,INTC-RT Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST021 ,RTDMAC Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST018 ,H-UDI Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 11. " MSTPST011 ,ARMREG Stop Status" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST000 ,MSIOF0 Stop Status" "Not stopped,Stopped" rgroup.long 0x38++0x3 line.long 0x00 "MSTPSR1,Module Stop Status Register 1" bitfld.long 0x00 31. " MSTPST131 ,VSP1 (SY) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST130 ,VSP1 (RT) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 28. " MSTPST128 ,VSP1DU0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 27. " MSTPST127 ,VSP1DU1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST125 ,TMU0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST124 ,CMT0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 22. " MSTPST122 ,TMU2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST121 ,TMU3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 19. " MSTPST119 ,FDP0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 18. " MSTPST118 ,FDP1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST117 ,FDP2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST115 ,2DDMAC Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST112 ,3DG Stop Status" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST111 ,TMU1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST109 ,SSP1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 8. " MSTPST108 ,TSIF0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST107 ,TSIF1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 6. " MSTPST106 ,JPU Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST104 ,STB Stop Status" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST103 ,VPC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST102 ,VPC1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 1. " MSTPST101 ,VCP0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST100 ,VCP1 Stop Status" "Not stopped,Stopped" rgroup.long 0x40++0x3 line.long 0x00 "MSTPSR2,Module Stop Status Register 2" bitfld.long 0x00 29. " MSTPST229 ,Crypt Engine (Public) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 28. " MSTPST228 ,Crypt Engine (Secure) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST218 ,DMAC Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 16. " MSTPST216 ,SCIFB2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST215 ,MSIOF3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST213 ,MFIS Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 8. " MSTPST208 ,MSIOF1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST207 ,SCIFB1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 6. " MSTPST206 ,SCIFB0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 5. " MSTPST205 ,MSIOF2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST204 ,SCIFA0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST203 ,SCIFA1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 2. " MSTPST202 ,SCIFA2 Stop Status" "Not stopped,Stopped" rgroup.long 0x48++0x7 line.long 0x00 "MSTPSR3,Module Stop Status Register 3" bitfld.long 0x00 31. " MSTPST331 ,USBDMAC1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST330 ,USBDMAC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 29. " MSTPST329 ,CMT1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 28. " MSTPST328 ,SSUSB Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST323 ,IIC1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 19. " MSTPST319 ,PCIEC Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 18. " MSTPST318 ,IIC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST315 ,MMC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST314 ,SDHI0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 13. " MSTPST313 ,SDHI1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 12. " MSTPST312 ,SDHI2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST311 ,SDHI3 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 10. " MSTPST310 ,IrDA Stop Status" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST305 ,MMC1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST304 ,TPU0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " MSTPST300 ,IIC2 Stop Status" "Not stopped,Stopped" line.long 0x04 "MSTPSR4,Module Stop Status Register 4" bitfld.long 0x04 31. " MSTPST431 ,Secure up-Time Clock Stop Status" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST408 ,INTC-SY Stop Status" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST407 ,IRQC Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 2. " MSTPST402 ,RWDT Stop Status" "Not stopped,Stopped" rgroup.long 0x3C++0x3 line.long 0x00 "MSTPSR5,Module Stop Status Register 5" bitfld.long 0x00 30. " MSTPST530 ,Secure boot ROM Stop Status" "Not stopped,Stopped" bitfld.long 0x00 26. " MSTPST526 ,Public boot ROM Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST523 ,PWM Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 22. " MSTPST522 ,Thermal Sensor Stop Status" "Not stopped,Stopped" bitfld.long 0x00 6. " MSTPST506 ,ADSP Stop Status" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST502 ,MPDMAC0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 1. " MSTPST501 ,MPDMAC1 Stop Status" "Not stopped,Stopped" rgroup.long 0x1C4++0x3 line.long 0x00 "MSTPSR7,Module Stop Status Register 7" bitfld.long 0x00 26. " MSTPST726 ,LVDS0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST725 ,LVDS1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST724 ,DU0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 23. " MSTPST723 ,DU1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST722 ,DU2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST721 ,SCIF0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 20. " MSTPST720 ,SCIF1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST717 ,HSCIF0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 16. " MSTPST716 ,HSCIF1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 10. " MSTPST710 ,CMM0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST709 ,CMM1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST708 ,CMM2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST704 ,HSUSB Stop Status" "Not stopped,Stopped" rgroup.long 0x9A0++0xB line.long 0x00 "MSTPSR8,Module Stop Status Register 8" bitfld.long 0x00 31. " MSTPST831 ,MTSB Controller 0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST830 ,MTSB Controller 1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST824 ,IMP-X4 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 23. " MSTPST823 ,IMR-LSX2 0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST822 ,IMR-LSX2 1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST821 ,IMR-LSX2 0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 20. " MSTPST820 ,IMR-LSX2 1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST815 ,SATA0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST814 ,SATA1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 13. " MSTPST813 ,Ether Stop Status" "Not stopped,Stopped" bitfld.long 0x00 12. " MSTPST812 ,EtherAVB Stop Status" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST811 ,VIN0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 10. " MSTPST810 ,VIN1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST809 ,VIN2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST808 ,VIN3 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " MSTPST807 ,RGP2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST802 ,MLB+ Stop Status" "Not stopped,Stopped" line.long 0x04 "MSTPSR9,Module Stop Status Register 9" bitfld.long 0x04 31. " MSTPST931 ,I2C0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST930 ,I2C1 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST929 ,I2C2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 28. " MSTPST928 ,I2C3 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 26. " MSTPST926 ,IICDVFS Stop Status" "Not stopped,Stopped" bitfld.long 0x04 24. " MSTPST924 ,MLM Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 23. " MSTPST923 ,DTCP Stop Status" "Not stopped,Stopped" bitfld.long 0x04 22. " MSTPST922 ,ADG Stop Status" "Not stopped,Stopped" bitfld.long 0x04 20. " MSTPST920 ,SIM card I/F Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 18. " MSTPST918 ,IEBUS Stop Status" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST917 ,QSPI Stop Status" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST916 ,RCAN0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 15. " MSTPST915 ,RCAN1 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST912 ,GPIO0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST911 ,GPIO1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 10. " MSTPST910 ,GPIO2 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST909 ,GPIO3 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST908 ,GPIO4 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 7. " MSTPST907 ,GPIO5 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST906 ,DARC Stop Status" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST903 ,REMOCON Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 2. " MSTPST902 ,Speed-pulse I/F Stop Status" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST901 ,Gyro ADC I/F Stop Status" "Not stopped,Stopped" bitfld.long 0x04 0. " MSTPST900 ,GPS Stop Status" "Not stopped,Stopped" line.long 0x08 "MSTPSR10,Module Stop Status Register 10" bitfld.long 0x08 31. " MSTPST1031 ,SCU (SRC0) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 30. " MSTPST1030 ,SCU (SRC1) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 29. " MSTPST1029 ,SCU (SRC2)Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 28. " MSTPST1028 ,SCU (SRC3) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 27. " MSTPST1027 ,SCU (SRC4) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 26. " MSTPST1026 ,SCU (SRC5) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 25. " MSTPST1025 ,SCU (SRC6) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 24. " MSTPST1024 ,SCU (SRC7) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 23. " MSTPST1023 ,SCU (SRC8) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 22. " MSTPST1022 ,SCU (SRC9) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 21. " MSTPST1021 ,SCU (CTU00/01/02/03, MIX0) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 20. " MSTPST1020 ,SCU (CTU10/11/12/13, MIX1) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 19. " MSTPST1019 ,SCU (DVC0) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST1018 ,SCU (DVC1) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 17. " MSTPST1017 ,SCU (ALL) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 15. " MSTPST1015 ,SSI0 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 14. " MSTPST1014 ,SSI1 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST1013 ,SSI2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 12. " MSTPST1012 ,SSI3 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 11. " MSTPST1011 ,SSI4 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 10. " MSTPST1010 ,SSI5 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 9. " MSTPST1009 ,SSI6 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST1008 ,SSI7 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 7. " MSTPST1007 ,SSI8 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 6. " MSTPST1006 ,SSI9 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST1005 ,SSI (ALL)Stop Status" "Not stopped,Stopped" tree.end tree "Realtime Module Stop Registers" group.long 0x110++0x17 line.long 0x00 "RMSTPCR0,Realtime Module Stop Register 0" bitfld.long 0x00 22. " MSTPST022 ,INTC-RT Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST021 ,RTDMAC Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST018 ,H-UDI Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 11. " MSTPST011 ,ARMREG Stop Control" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST000 ,MSIOF0 Stop Control" "Not stopped,Stopped" line.long 0x04 "RMSTPCR1,Realtime Module Stop Register 1" bitfld.long 0x04 31. " MSTPST131 ,VSP1 (SY) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST130 ,VSP1 (RT) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST128 ,VSP1DU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 27. " MSTPST127 ,VSP1DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST125 ,TMU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 24. " MSTPST124 ,CMT0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 22. " MSTPST122 ,TMU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST121 ,TMU3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 19. " MSTPST119 ,FDP0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 18. " MSTPST118 ,FDP1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST117 ,FDP2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST115 ,2DDMAC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 12. " MSTPST112 ,3DG Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST111 ,TMU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST109 ,SSP1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 8. " MSTPST108 ,TSIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST107 ,TSIF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST106 ,JPU Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 4. " MSTPST104 ,STB Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST103 ,VPC0 top Control" "Not stopped,Stopped" bitfld.long 0x04 2. " MSTPST102 ,VPC1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 1. " MSTPST101 ,VCP0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 0. " MSTPST100 ,VCP1 Stop Control" "Not stopped,Stopped" line.long 0x08 "RMSTPCR2,Realtime Module Stop Register 2" bitfld.long 0x08 29. " MSTPST229 ,Crypt Engine (Public) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 28. " MSTPST228 ,Crypt Engine (Secure) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST218 ,DMAC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 16. " MSTPST216 ,SCIFB2 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 15. " MSTPST215 ,MSIOF3 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST213 ,MFIS Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 8. " MSTPST208 ,MSIOF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 7. " MSTPST207 ,SCIFB1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 6. " MSTPST206 ,SCIFB0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 5. " MSTPST205 ,MSIOF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 4. " MSTPST204 ,SCIFA0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 3. " MSTPST203 ,SCIFA1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 2. " MSTPST202 ,SCIFA2 Stop Control" "Not stopped,Stopped" line.long 0x0C "RMSTPCR3,Realtime Module Stop Register 3" bitfld.long 0x0C 31. " MSTPST331 ,USBDMAC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 30. " MSTPST330 ,USBDMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 29. " MSTPST329 ,CMT1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 28. " MSTPST328 ,SSUSB Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 23. " MSTPST323 ,IIC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 19. " MSTPST319 ,PCIEC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 18. " MSTPST318 ,IIC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 15. " MSTPST315 ,MMC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 14. " MSTPST314 ,SDHI0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 13. " MSTPST313 ,SDHI1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 12. " MSTPST312 ,SDHI2 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 11. " MSTPST311 ,SDHI3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 10. " MSTPST310 ,IrDA Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 5. " MSTPST305 ,MMC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 4. " MSTPST304 ,TPU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 0. " MSTPST300 ,IIC2 Stop Control" "Not stopped,Stopped" line.long 0x10 "RMSTPCR4,Realtime Module Stop Register 4" bitfld.long 0x10 31. " MSTPST431 ,Secure up-Time Clock Stop Control" "Not stopped,Stopped" bitfld.long 0x10 8. " MSTPST408 ,INTC-SY Stop Control" "Not stopped,Stopped" bitfld.long 0x10 7. " MSTPST407 ,IRQC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x10 2. " MSTPST402 ,RWDT Stop Control" "Not stopped,Stopped" line.long 0x14 "RMSTPCR5,Realtime Module Stop Register 5" bitfld.long 0x14 30. " MSTPST530 ,Secure boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 26. " MSTPST526 ,Public boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 23. " MSTPST523 ,PWM Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 22. " MSTPST522 ,Thermal Sensor Stop Control" "Not stopped,Stopped" bitfld.long 0x14 6. " MSTPST506 ,ADSP Stop Control" "Not stopped,Stopped" bitfld.long 0x14 2. " MSTPST502 ,MPDMAC0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 1. " MSTPST501 ,MPDMAC1 Stop Control" "Not stopped,Stopped" group.long 0x12C++0x3 line.long 0x00 "RMSTPCR7,Realtime Module Stop Register 7" bitfld.long 0x00 26. " MSTPST726 ,LVDS0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST725 ,LVDS1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST724 ,DU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 23. " MSTPST723 ,DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST722 ,DU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST721 ,SCIF0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 20. " MSTPST720 ,SCIF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST717 ,HSCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 16. " MSTPST716 ,HSCIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 10. " MSTPST710 ,CMM0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST709 ,CMM1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST708 ,CMM2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST704 ,HSUSB Stop Control" "Not stopped,Stopped" group.long 0x980++0xB line.long 0x00 "RMSTPCR8,Realtime Module Stop Register 8" bitfld.long 0x00 31. " MSTPST831 ,MTSB Controller 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST830 ,MTSB Controller 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST824 ,IMP-X4 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 23. " MSTPST823 ,IMR-LSX2 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST822 ,IMR-LSX2 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST821 ,IMR-LSX2 0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 20. " MSTPST820 ,IMR-LSX2 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST815 ,SATA0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST814 ,SATA1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 13. " MSTPST813 ,Ether Stop Control" "Not stopped,Stopped" bitfld.long 0x00 12. " MSTPST812 ,EtherAVB Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST811 ,VIN0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 10. " MSTPST810 ,VIN1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST809 ,VIN2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST808 ,VIN3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " MSTPST807 ,RGP2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST802 ,MLB+ Stop Control" "Not stopped,Stopped" line.long 0x04 "RMSTPCR9,Realtime Module Stop Register 9" bitfld.long 0x04 31. " MSTPST931 ,I2C0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST930 ,I2C1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST929 ,I2C2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 28. " MSTPST928 ,I2C3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 26. " MSTPST926 ,IICDVFS Stop Control" "Not stopped,Stopped" bitfld.long 0x04 24. " MSTPST924 ,MLM Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 23. " MSTPST923 ,DTCP Stop Control" "Not stopped,Stopped" bitfld.long 0x04 22. " MSTPST922 ,ADG Stop Control" "Not stopped,Stopped" bitfld.long 0x04 20. " MSTPST920 ,SIM card I/F Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 18. " MSTPST918 ,IEBUS Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST917 ,QSPI Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST916 ,RCAN0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 15. " MSTPST915 ,RCAN1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST912 ,GPIO0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST911 ,GPIO1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 10. " MSTPST910 ,GPIO2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST909 ,GPIO3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST908 ,GPIO4 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 7. " MSTPST907 ,GPIO5 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST906 ,DARC Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST903 ,REMOCON Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 2. " MSTPST902 ,Speed-pulse I/F Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST901 ,Gyro ADC I/F Stop Control" "Not stopped,Stopped" bitfld.long 0x04 0. " MSTPST900 ,GPS Stop Control" "Not stopped,Stopped" line.long 0x08 "RMSTPCR10,Realtime Module Stop Register 10" bitfld.long 0x08 31. " MSTPST1031 ,SCU (SRC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 30. " MSTPST1030 ,SCU (SRC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 29. " MSTPST1029 ,SCU (SRC2)Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 28. " MSTPST1028 ,SCU (SRC3) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 27. " MSTPST1027 ,SCU (SRC4) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 26. " MSTPST1026 ,SCU (SRC5) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 25. " MSTPST1025 ,SCU (SRC6) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 24. " MSTPST1024 ,SCU (SRC7) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 23. " MSTPST1023 ,SCU (SRC8) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 22. " MSTPST1022 ,SCU (SRC9) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 21. " MSTPST1021 ,SCU (CTU00/01/02/03, MIX0) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 20. " MSTPST1020 ,SCU (CTU10/11/12/13, MIX1) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 19. " MSTPST1019 ,SCU (DVC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST1018 ,SCU (DVC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 17. " MSTPST1017 ,SCU (ALL) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 15. " MSTPST1015 ,SSI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 14. " MSTPST1014 ,SSI1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST1013 ,SSI2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 12. " MSTPST1012 ,SSI3 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 11. " MSTPST1011 ,SSI4 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 10. " MSTPST1010 ,SSI5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 9. " MSTPST1009 ,SSI6 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST1008 ,SSI7 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 7. " MSTPST1007 ,SSI8 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 6. " MSTPST1006 ,SSI9 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST1005 ,SSI (ALL) Stop Control" "Not stopped,Stopped" tree.end tree "Realtime Module Stop Registers 2" group.long 0x130++0x17 line.long 0x00 "SMSTPCR0,Realtime Module Stop Register 0" bitfld.long 0x00 22. " MSTPST022 ,INTC-RT Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST021 ,RTDMAC Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST018 ,H-UDI Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 11. " MSTPST011 ,ARMREG Stop Control" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST000 ,MSIOF0 Stop Control" "Not stopped,Stopped" line.long 0x04 "SMSTPCR1,Realtime Module Stop Register 1" bitfld.long 0x04 31. " MSTPST131 ,VSP1 (SY) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST130 ,VSP1 (RT) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST128 ,VSP1DU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 27. " MSTPST127 ,VSP1DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST125 ,TMU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 24. " MSTPST124 ,CMT0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 22. " MSTPST122 ,TMU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST121 ,TMU3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 19. " MSTPST119 ,FDP0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 18. " MSTPST118 ,FDP1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST117 ,FDP2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST115 ,2DDMAC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 12. " MSTPST112 ,3DG Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST111 ,TMU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST109 ,SSP1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 8. " MSTPST108 ,TSIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST107 ,TSIF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST106 ,JPU Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 4. " MSTPST104 ,STB Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST103 ,VPC0 top Control" "Not stopped,Stopped" bitfld.long 0x04 2. " MSTPST102 ,VPC1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 1. " MSTPST101 ,VCP0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 0. " MSTPST100 ,VCP1 Stop Control" "Not stopped,Stopped" line.long 0x08 "SMSTPCR2,Realtime Module Stop Register 2" bitfld.long 0x08 29. " MSTPST229 ,Crypt Engine (Public) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 28. " MSTPST228 ,Crypt Engine (Secure) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST218 ,DMAC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 16. " MSTPST216 ,SCIFB2 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 15. " MSTPST215 ,MSIOF3 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST213 ,MFIS Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 8. " MSTPST208 ,MSIOF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 7. " MSTPST207 ,SCIFB1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 6. " MSTPST206 ,SCIFB0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 5. " MSTPST205 ,MSIOF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 4. " MSTPST204 ,SCIFA0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 3. " MSTPST203 ,SCIFA1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 2. " MSTPST202 ,SCIFA2 Stop Control" "Not stopped,Stopped" line.long 0x0C "SMSTPCR3,Realtime Module Stop Register 3" bitfld.long 0x0C 31. " MSTPST331 ,USBDMAC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 30. " MSTPST330 ,USBDMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 29. " MSTPST329 ,CMT1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 28. " MSTPST328 ,SSUSB Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 23. " MSTPST323 ,IIC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 19. " MSTPST319 ,PCIEC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 18. " MSTPST318 ,IIC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 15. " MSTPST315 ,MMC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 14. " MSTPST314 ,SDHI0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 13. " MSTPST313 ,SDHI1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 12. " MSTPST312 ,SDHI2 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 11. " MSTPST311 ,SDHI3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 10. " MSTPST310 ,IrDA Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 5. " MSTPST305 ,MMC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 4. " MSTPST304 ,TPU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 0. " MSTPST300 ,IIC2 Stop Control" "Not stopped,Stopped" line.long 0x10 "SMSTPCR4,Realtime Module Stop Register 4" bitfld.long 0x10 31. " MSTPST431 ,Secure up-Time Clock Stop Control" "Not stopped,Stopped" bitfld.long 0x10 8. " MSTPST408 ,INTC-SY Stop Control" "Not stopped,Stopped" bitfld.long 0x10 7. " MSTPST407 ,IRQC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x10 2. " MSTPST402 ,RWDT Stop Control" "Not stopped,Stopped" line.long 0x14 "SMSTPCR5,Realtime Module Stop Register 5" bitfld.long 0x14 30. " MSTPST530 ,Secure boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 26. " MSTPST526 ,Public boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 23. " MSTPST523 ,PWM Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 22. " MSTPST522 ,Thermal Sensor Stop Control" "Not stopped,Stopped" bitfld.long 0x14 6. " MSTPST506 ,ADSP Stop Control" "Not stopped,Stopped" bitfld.long 0x14 2. " MSTPST502 ,MPDMAC0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 1. " MSTPST501 ,MPDMAC1 Stop Control" "Not stopped,Stopped" group.long 0x14C++0x3 line.long 0x00 "SMSTPCR7,Realtime Module Stop Register 7" bitfld.long 0x00 26. " MSTPST726 ,LVDS0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST725 ,LVDS1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST724 ,DU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 23. " MSTPST723 ,DU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST722 ,DU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST721 ,SCIF0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 20. " MSTPST720 ,SCIF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST717 ,HSCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 16. " MSTPST716 ,HSCIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 10. " MSTPST710 ,CMM0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST709 ,CMM1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST708 ,CMM2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST704 ,HSUSB Stop Control" "Not stopped,Stopped" group.long 0x990++0x7 line.long 0x00 "SMSTPCR8,Realtime Module Stop Register 8" bitfld.long 0x00 31. " MSTPST831 ,MTSB Controller 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST830 ,MTSB Controller 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST824 ,IMP-X4 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 23. " MSTPST823 ,IMR-LSX2 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST822 ,IMR-LSX2 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST821 ,IMR-LSX2 0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 20. " MSTPST820 ,IMR-LSX2 1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST815 ,SATA0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST814 ,SATA1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 13. " MSTPST813 ,Ether Stop Control" "Not stopped,Stopped" bitfld.long 0x00 12. " MSTPST812 ,EtherAVB Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST811 ,VIN0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 10. " MSTPST810 ,VIN1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST809 ,VIN2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST808 ,VIN3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " MSTPST807 ,RGP2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST802 ,MLB+ Stop Control" "Not stopped,Stopped" line.long 0x04 "SMSTPCR9,Realtime Module Stop Register 9" bitfld.long 0x04 31. " MSTPST931 ,I2C0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST930 ,I2C1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST929 ,I2C2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 28. " MSTPST928 ,I2C3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 26. " MSTPST926 ,IICDVFS Stop Control" "Not stopped,Stopped" bitfld.long 0x04 24. " MSTPST924 ,MLM Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 23. " MSTPST923 ,DTCP Stop Control" "Not stopped,Stopped" bitfld.long 0x04 22. " MSTPST922 ,ADG Stop Control" "Not stopped,Stopped" bitfld.long 0x04 20. " MSTPST920 ,SIM card I/F Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 18. " MSTPST918 ,IEBUS Stop Control" "Not stopped,Stopped" bitfld.long 0x04 17. " MSTPST917 ,QSPI Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST916 ,RCAN0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 15. " MSTPST915 ,RCAN1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST912 ,GPIO0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST911 ,GPIO1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 10. " MSTPST910 ,GPIO2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 9. " MSTPST909 ,GPIO3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST908 ,GPIO4 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 7. " MSTPST907 ,GPIO5 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST906 ,DARC Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST903 ,REMOCON Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 2. " MSTPST902 ,Speed-pulse I/F Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST901 ,Gyro ADC I/F Stop Control" "Not stopped,Stopped" bitfld.long 0x04 0. " MSTPST900 ,GPS Stop Control" "Not stopped,Stopped" group.long 0x99C++0x3 line.long 0x00 "SMSTPCR11,Realtime Module Stop Register 11" bitfld.long 0x00 31. " MSTPST1131 ,SCU (SRC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST1130 ,SCU (SRC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 29. " MSTPST1129 ,SCU (SRC2)Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 28. " MSTPST1128 ,SCU (SRC3) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 27. " MSTPST1127 ,SCU (SRC4) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 26. " MSTPST1126 ,SCU (SRC5) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 25. " MSTPST1125 ,SCU (SRC6) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST1124 ,SCU (SRC7) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST1123 ,SCU (SRC8) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 22. " MSTPST1122 ,SCU (SRC9) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST1121 ,SCU (CTU00/01/02/03, MIX0) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST1120 ,SCU (CTU10/11/12/13, MIX1) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST1119 ,SCU (DVC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST1118 ,SCU (DVC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST1117 ,SCU (ALL) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 15. " MSTPST1115 ,SSI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST1114 ,SSI1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST1113 ,SSI2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST1112 ,SSI3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST1111 ,SSI4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST1110 ,SSI5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 9. " MSTPST1109 ,SSI6 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST1108 ,SSI7 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST1107 ,SSI8 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 6. " MSTPST1106 ,SSI9 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST1105 ,SSI (ALL) Stop Control" "Not stopped,Stopped" tree.end tree "Software Reset and Clear Reset Registers" group.long 0xA0++0x3 line.long 0x00 "SRCR0,Software Reset Register 0" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST022_set/clr ,INTC-RT Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x8A0 21. " SRTST021_set/clr ,RTDMAC Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST019_set/clr ,H-UDI Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 0. 0x00 0. 0x8A0 0. " SRTST000_set/clr ,MSIOF0 Software Reset" "No reset,Reset" group.long 0xA8++0x3 line.long 0x00 "SRCR1,Software Reset Register 1" setclrfld.long 0x00 31. 0x00 31. 0x8A0 31. " SRTST131_set/clr ,VSP1 (SY) Software Reset" "No reset,Reset" setclrfld.long 0x00 30. 0x00 30. 0x8A0 30. " SRTST130_set/clr ,VSP1 (RT) Software Reset" "No reset,Reset" setclrfld.long 0x00 28. 0x00 28. 0x8A0 28. " SRTST128_set/clr ,VSP1DU0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 27. 0x00 27. 0x8A0 27. " SRTST127_set/clr ,VSP1DU1 Software Reset" "No reset,Reset" setclrfld.long 0x00 25. 0x00 25. 0x8A0 25. " SRTST125_set/clr ,TMU0 Software Reset" "No reset,Reset" setclrfld.long 0x00 24. 0x00 24. 0x8A0 24. " SRTST124_set/clr ,CMT0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST122_set/clr ,TMU2 Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x8A0 21. " SRTST121_set/clr ,TMU3 Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST119_set/clr ,FDP0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST118_set/clr ,FDP1 Software Reset" "No reset,Reset" setclrfld.long 0x00 17. 0x00 17. 0x8A0 17. " SRTST117_set/clr ,FDP2 Software Reset" "No reset,Reset" setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST115_set/clr ,2DDMAC Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 12. 0x00 12. 0x8A0 12. " SRTST112_set/clr ,3DG Software Reset" "No reset,Reset" setclrfld.long 0x00 11. 0x00 11. 0x8A0 11. " SRTST111_set/clr ,TMU1 Software Reset" "No reset,Reset" setclrfld.long 0x00 9. 0x00 9. 0x8A0 9. " SRTST109_set/clr ,SSP Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST108_set/clr ,TSIF0 Software Reset" "No reset,Reset" setclrfld.long 0x00 7. 0x00 7. 0x8A0 7. " SRTST107_set/clr ,TSIF1 Software Reset" "No reset,Reset" setclrfld.long 0x00 6. 0x00 6. 0x8A0 6. " SRTST106_set/clr ,JPU Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST104_set/clr ,STB Software Reset" "No reset,Reset" setclrfld.long 0x00 3. 0x00 3. 0x8A0 3. " SRTST103_set/clr ,VPC0 top Control" "No reset,Reset" setclrfld.long 0x00 2. 0x00 2. 0x8A0 2. " SRTST102_set/clr ,VPC1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 1. 0x00 1. 0x8A0 1. " SRTST101_set/clr ,VCP0 Software Reset" "No reset,Reset" setclrfld.long 0x00 0. 0x00 0. 0x8A0 0. " SRTST100_set/clr ,VCP1 Software Reset" "No reset,Reset" group.long 0xB0++0x3 line.long 0x00 "SRCR2,Software Reset Register 2" setclrfld.long 0x00 29. 0x00 29. 0x8A0 29. " SRTST229_set/clr ,Crypt Engine (Public) Software Reset" "No reset,Reset" setclrfld.long 0x00 28. 0x00 28. 0x8A0 28. " SRTST228_set/clr ,Crypt Engine (Secure) Software Reset" "No reset,Reset" setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST218_set/clr ,DMAC Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 16. 0x00 16. 0x8A0 16. " SRTST216_set/clr ,SCIFB2 Software Reset" "No reset,Reset" setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST215_set/clr ,MSIOF3 Software Reset" "No reset,Reset" setclrfld.long 0x00 13. 0x00 13. 0x8A0 13. " SRTST213_set/clr ,MFIS Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST208_set/clr ,MSIOF1 Software Reset" "No reset,Reset" setclrfld.long 0x00 7. 0x00 7. 0x8A0 7. " SRTST207_set/clr ,SCIFB1 Software Reset" "No reset,Reset" setclrfld.long 0x00 6. 0x00 6. 0x8A0 6. " SRTST206_set/clr ,SCIFB0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 5. 0x00 5. 0x8A0 5. " SRTST205_set/clr ,MSIOF2 Software Reset" "No reset,Reset" setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST204_set/clr ,SCIFA0 Software Reset" "No reset,Reset" setclrfld.long 0x00 3. 0x00 3. 0x8A0 3. " SRTST203_set/clr ,SCIFA1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 2. 0x00 2. 0x8A0 2. " SRTST202_set/clr ,SCIFA2 Software Reset" "No reset,Reset" group.long 0xB8++0x7 line.long 0x00 "SRCR3,Software Reset Register 3" setclrfld.long 0x00 31. 0x00 31. 0x8A0 31. " SRTST331_set/clr ,USBDMAC1 Software Reset" "No reset,Reset" setclrfld.long 0x00 30. 0x00 30. 0x8A0 30. " SRTST330_set/clr ,USBDMAC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 29. 0x00 29. 0x8A0 29. " SRTST329_set/clr ,CMT1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 28. 0x00 28. 0x8A0 28. " SRTST328_set/clr ,SSUSB Software Reset" "No reset,Reset" setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST323_set/clr ,IIC1 Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST319_set/clr ,PCIEC Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST318_set/clr ,IIC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST315_set/clr ,MMC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 14. 0x00 14. 0x8A0 14. " SRTST314_set/clr ,SDHI0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 13. 0x00 13. 0x8A0 13. " SRTST313_set/clr ,SDHI1 Software Reset" "No reset,Reset" setclrfld.long 0x00 12. 0x00 12. 0x8A0 12. " SRTST312_set/clr ,SDHI2 Software Reset" "No reset,Reset" setclrfld.long 0x00 11. 0x00 11. 0x8A0 11. " SRTST311_set/clr ,SDHI3 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 5. 0x00 5. 0x8A0 5. " SRTST305_set/clr ,MMC1 Software Reset" "No reset,Reset" setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST304_set/clr ,TPU0 Software Reset" "No reset,Reset" setclrfld.long 0x00 0. 0x00 0. 0x8A0 0. " SRTST300_set/clr ,IIC2 Software Reset" "No reset,Reset" line.long 0x04 "SRCR4,Software Reset Register 4" setclrfld.long 0x04 31. 0x04 31. 0x8A4 31. " SRTST431_set/clr ,Secure up-Time Clock Software Reset" "No reset,Reset" setclrfld.long 0x04 23. 0x04 23. 0x8A4 23. " SRTST423_set/clr ,S3$ Controller Software Reset" "No reset,Reset" setclrfld.long 0x04 8. 0x04 8. 0x8A4 8. " SRTST408_set/clr ,INTC-SY Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 7. 0x04 7. 0x8A4 7. " SRTST407_set/clr ,IRQC Software Reset" "No reset,Reset" setclrfld.long 0x04 2. 0x04 2. 0x8A4 2. " SRTST402_set/clr ,RWDT Software Reset" "No reset,Reset" setclrfld.long 0x04 1. 0x04 1. 0x8A4 1. " SRTST401_set/clr ,Secure WDT Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 0. 0x04 0. 0x8A4 0. " SRTST400_set/clr ,Secure Timer (SCMT) Software Reset" "No reset,Reset" group.long 0xC4++0x3 line.long 0x00 "SRCR5,Software Reset Register 5" setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST523_set/clr ,PWM Software Reset" "No reset,Reset" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST522_set/clr ,Thermal Sensor Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST508_set/clr ,SCUW Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 6. 0x00 6. 0x8A0 6. " SRTST506_set/clr ,ADSP Software Reset" "No reset,Reset" setclrfld.long 0x00 2. 0x00 2. 0x8A0 2. " SRTST502_set/clr ,MPDMAC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 1. 0x00 1. 0x8A0 1. " SRTST501_set/clr ,MPDMAC1 Software Reset" "No reset,Reset" group.long 0x1CC++0x3 line.long 0x00 "SRCR7,Software Reset Register 7" setclrfld.long 0x00 26. 0x00 26. 0x8A0 26. " SRTST726_set/clr ,LVDS0 Software Reset" "No reset,Reset" setclrfld.long 0x00 25. 0x00 25. 0x8A0 25. " SRTST725_set/clr ,LVDS1 Software Reset" "No reset,Reset" setclrfld.long 0x00 24. 0x00 24. 0x8A0 24. " SRTST724_set/clr ,DU0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST723_set/clr ,DU1 Software Reset" "No reset,Reset" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST722_set/clr ,DU2 Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x8A0 21. " SRTST721_set/clr ,SCIF0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 20. 0x00 20. 0x8A0 20. " SRTST720_set/clr ,SCIF1 Software Reset" "No reset,Reset" setclrfld.long 0x00 17. 0x00 17. 0x8A0 17. " SRTST717_set/clr ,HSCIF0 Software Reset" "No reset,Reset" setclrfld.long 0x00 16. 0x00 16. 0x8A0 16. " SRTST716_set/clr ,HSCIF1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 10. 0x00 10. 0x8A0 10. " SRTST710_set/clr ,CMM0 Software Reset" "No reset,Reset" setclrfld.long 0x00 9. 0x00 9. 0x8A0 9. " SRTST709_set/clr ,CMM1 Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST708_set/clr ,CMM2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST704_set/clr ,HSUSB Software Reset" "No reset,Reset" group.long 0x920++0xB line.long 0x00 "SRCR8,Software Reset Register 8" setclrfld.long 0x00 31. 0x00 31. 0x40 31. " SRTST831_set/clr ,MTSB0 Software Reset" "No reset,Reset" setclrfld.long 0x00 30. 0x00 30. 0x40 30. " SRTST830_set/clr ,MTSB1 Software Reset" "No reset,Reset" setclrfld.long 0x00 24. 0x00 24. 0x40 24. " SRTST824_set/clr ,IMP-X4 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 23. 0x00 23. 0x40 23. " SRTST823_set/clr ,IMR-LSX2 0 Software Reset" "No reset,Reset" setclrfld.long 0x00 22. 0x00 22. 0x40 22. " SRTST822_set/clr ,IMR-LSX2 1 Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x40 21. " SRTST821_set/clr ,IMR-LSX2 0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 20. 0x00 20. 0x40 20. " SRTST820_set/clr ,IMR-LSX2 1 Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x40 19. " SRTST819_set/clr ,IMR-LSX2 UAI Software Reset" "No reset,Reset" setclrfld.long 0x00 18. 0x00 18. 0x40 18. " SRTST818_set/clr ,IMR-X2 UAI Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 15. 0x00 15. 0x40 15. " SRTST815_set/clr ,SATA0 Software Reset" "No reset,Reset" setclrfld.long 0x00 14. 0x00 14. 0x40 14. " SRTST814_set/clr ,SATA1 Software Reset" "No reset,Reset" setclrfld.long 0x00 13. 0x00 13. 0x40 13. " SRTST813_set/clr ,Ether Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 12. 0x00 12. 0x40 12. " SRTST812_set/clr ,EtherAVB Software Reset" "No reset,Reset" setclrfld.long 0x00 11. 0x00 11. 0x40 11. " SRTST811_set/clr ,VIN0 Software Reset" "No reset,Reset" setclrfld.long 0x00 10. 0x00 10. 0x40 10. " SRTST810_set/clr ,VIN1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 9. 0x00 9. 0x40 9. " SRTST809_set/clr ,VIN2 Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x40 8. " SRTST808_set/clr ,VIN3 Software Reset" "No reset,Reset" setclrfld.long 0x00 7. 0x00 7. 0x40 7. " SRTST807_set/clr ,RGP2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 2. 0x00 2. 0x40 2. " SRTST802_set/clr ,MLB+ Software Reset" "No reset,Reset" line.long 0x04 "SRCR9,Software Reset Register 9" setclrfld.long 0x04 31. 0x04 31. 0x44 31. " SRTST931_set/clr ,I2C0 Software Reset" "No reset,Reset" setclrfld.long 0x04 30. 0x04 30. 0x44 30. " SRTST930_set/clr ,I2C1 Software Reset" "No reset,Reset" setclrfld.long 0x04 29. 0x04 29. 0x44 29. " SRTST929_set/clr ,I2C2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 28. 0x04 28. 0x44 28. " SRTST928_set/clr ,I2C3 Software Reset" "No reset,Reset" setclrfld.long 0x04 26. 0x04 26. 0x44 26. " SRTST926_set/clr ,IICDVFS Software Reset" "No reset,Reset" setclrfld.long 0x04 24. 0x04 24. 0x44 24. " SRTST924_set/clr ,MLM Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 23. 0x04 23. 0x44 23. " SRTST923_set/clr ,DTCP Software Reset" "No reset,Reset" setclrfld.long 0x04 20. 0x04 20. 0x44 20. " SRTST920_set/clr ,SIM card I/F Software Reset" "No reset,Reset" setclrfld.long 0x04 18. 0x04 18. 0x44 18. " SRTST918_set/clr ,IEBUS Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 17. 0x04 17. 0x44 17. " SRTST917_set/clr ,QSPI Software Reset" "No reset,Reset" setclrfld.long 0x04 16. 0x04 16. 0x44 16. " SRTST916_set/clr ,RCAN0 Software Reset" "No reset,Reset" setclrfld.long 0x04 15. 0x04 15. 0x44 15. " SRTST915_set/clr ,RCAN1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 12. 0x04 12. 0x44 12. " SRTST912_set/clr ,GPIO0 Software Reset" "No reset,Reset" setclrfld.long 0x04 11. 0x04 11. 0x44 11. " SRTST911_set/clr ,GPIO1 Software Reset" "No reset,Reset" setclrfld.long 0x04 10. 0x04 10. 0x44 10. " SRTST910_set/clr ,GPIO2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 9. 0x04 9. 0x44 9. " SRTST909_set/clr ,GPIO3 Software Reset" "No reset,Reset" setclrfld.long 0x04 8. 0x04 8. 0x44 8. " SRTST908_set/clr ,GPIO4 Software Reset" "No reset,Reset" setclrfld.long 0x04 7. 0x04 7. 0x44 7. " SRTST907_set/clr ,GPIO5 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 6. 0x04 6. 0x44 6. " SRTST906_set/clr ,DARC Software Reset" "No reset,Reset" setclrfld.long 0x04 3. 0x04 3. 0x44 3. " SRTST903_set/clr ,REMOCON Software Reset" "No reset,Reset" setclrfld.long 0x04 2. 0x04 2. 0x44 2. " SRTST902_set/clr ,Speed Pulse IF Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 1. 0x04 1. 0x44 1. " SRTST901_set/clr ,Gyro ADC IF Software Reset" "No reset,Reset" line.long 0x08 "SRCR10,Software Reset Register 10" setclrfld.long 0x08 15. 0x08 15. 0x48 15. " SRTST1015_set/clr ,SSI0 Software Reset" "No reset,Reset" setclrfld.long 0x08 14. 0x08 14. 0x48 14. " SRTST1014_set/clr ,SSI1 Software Reset" "No reset,Reset" setclrfld.long 0x08 13. 0x08 13. 0x48 13. " SRTST1013_set/clr ,SSI2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x08 12. 0x08 12. 0x48 12. " SRTST1012_set/clr ,SSI3 Software Reset" "No reset,Reset" setclrfld.long 0x08 11. 0x08 11. 0x48 11. " SRTST1011_set/clr ,SSI4 Software Reset" "No reset,Reset" setclrfld.long 0x08 10. 0x08 10. 0x48 10. " SRTST1010_set/clr ,SSI5 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x08 9. 0x08 9. 0x48 9. " SRTST1009_set/clr ,SSI6 Software Reset" "No reset,Reset" setclrfld.long 0x08 8. 0x08 8. 0x48 8. " SRTST1008_set/clr ,SSI7 Software Reset" "No reset,Reset" setclrfld.long 0x08 7. 0x08 7. 0x48 7. " SRTST1007_set/clr ,SSI8 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x08 6. 0x08 6. 0x48 6. " SRTST1006_set/clr ,SSI9 Software Reset" "No reset,Reset" setclrfld.long 0x08 5. 0x08 5. 0x48 5. " SRTST1005_set/clr ,SSI (ALL) Software Reset" "No reset,Reset" tree.end width 0xB tree.end tree.open "APMU (Advanced Power Management Unit for AP-System Core)" tree "Cortex-A7" base ad:0xE6151000 width 9. group.long 0x100++0x3 line.long 0x00 "CPU0CR,CPU0Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x110++0x3 line.long 0x00 "CPU1CR,CPU1Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x120++0x3 line.long 0x00 "CPU2CR,CPU2Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x130++0x3 line.long 0x00 "CPU3CR,CPU3Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x184++0x3 line.long 0x00 "CPUCMCR,Common Power Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "Normal,L2 shutdown" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2 shutdown," else bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "L2dormant,Normal" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2dormant," endif group.long 0x10++0x3 line.long 0x00 "WUPCR,CPU Wake Up Control Register" bitfld.long 0x00 3. " CPU3WUP ,CPU3 wake up bit" "No wake up,Wake up" bitfld.long 0x00 2. " CPU2WUP ,CPU2 WAKE UP bit" "No wake up,Wake up" bitfld.long 0x00 1. " CPU1WUP ,CPU1 wake up bit" "No wake up,Wake up" bitfld.long 0x00 0. " CPU0WUP ,CPU0 wake up bit" "No wake up,Wake up" rgroup.long 0x40++0x3 line.long 0x00 "PSTR,Power Status Register" bitfld.long 0x00 12.--13. " CPU3ST ,CPU3 status bit" "Run,,,CoreStandby" bitfld.long 0x00 8.--9. " CPU2ST ,CPU2 status bit" "Run,,,CoreStandby" textline " " bitfld.long 0x00 4.--5. " CPU1ST ,CPU1 status bit" "Run,,,CoreStandby" bitfld.long 0x00 0.--1. " CPU0ST ,CPU0 status bit" "Run,,,CoreStandby" textline "" sif cpu()=="RCARM2" group.long 0x80++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8A77940")||cpuis("R8A7792X") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" group.long 0x1E0++0x03 line.long 0x00 "RBCR,Runtime Test Control Register" bitfld.long 0x00 15. " SCUIMSK ,SCUIMSK" "0,1" bitfld.long 0x00 8. " CPURMSK ,CPURMSK" "0,1" bitfld.long 0x00 3. " CPU3IMSK ,CPU3IMSK" "0,1" textline " " bitfld.long 0x00 2. " CPU2IMSK ,CPU2IMSK" "0,1" bitfld.long 0x00 1. " CPU1IMSK ,CPU1IMSK" "0,1" bitfld.long 0x00 0. " CPU0IMSK ,CPU0IMSK" "0,1" endif width 0x0B tree.end tree "Cortex-A15" base ad:0xE6152000 width 9. group.long 0x100++0x3 line.long 0x00 "CPU0CR,CPU0Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x110++0x3 line.long 0x00 "CPU1CR,CPU1Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x120++0x3 line.long 0x00 "CPU2CR,CPU2Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x130++0x3 line.long 0x00 "CPU3CR,CPU3Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x184++0x3 line.long 0x00 "CPUCMCR,Common Power Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "Normal,L2 shutdown" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2 shutdown," else bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "L2dormant,Normal" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2dormant," endif group.long 0x10++0x3 line.long 0x00 "WUPCR,CPU Wake Up Control Register" bitfld.long 0x00 3. " CPU3WUP ,CPU3 wake up bit" "No wake up,Wake up" bitfld.long 0x00 2. " CPU2WUP ,CPU2 WAKE UP bit" "No wake up,Wake up" bitfld.long 0x00 1. " CPU1WUP ,CPU1 wake up bit" "No wake up,Wake up" bitfld.long 0x00 0. " CPU0WUP ,CPU0 wake up bit" "No wake up,Wake up" rgroup.long 0x40++0x3 line.long 0x00 "PSTR,Power Status Register" bitfld.long 0x00 12.--13. " CPU3ST ,CPU3 status bit" "Run,,,CoreStandby" bitfld.long 0x00 8.--9. " CPU2ST ,CPU2 status bit" "Run,,,CoreStandby" textline " " bitfld.long 0x00 4.--5. " CPU1ST ,CPU1 status bit" "Run,,,CoreStandby" bitfld.long 0x00 0.--1. " CPU0ST ,CPU0 status bit" "Run,,,CoreStandby" textline "" sif cpu()=="RCARM2" group.long 0x80++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8A77940")||cpuis("R8A7792X") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" group.long 0x1E0++0x03 line.long 0x00 "RBCR,Runtime Test Control Register" bitfld.long 0x00 15. " SCUIMSK ,SCUIMSK" "0,1" bitfld.long 0x00 8. " CPURMSK ,CPURMSK" "0,1" bitfld.long 0x00 3. " CPU3IMSK ,CPU3IMSK" "0,1" textline " " bitfld.long 0x00 2. " CPU2IMSK ,CPU2IMSK" "0,1" bitfld.long 0x00 1. " CPU1IMSK ,CPU1IMSK" "0,1" bitfld.long 0x00 0. " CPU0IMSK ,CPU0IMSK" "0,1" endif width 0x0B tree.end tree.end tree "RST (RESET)" base ad:0xE6160000 width 12. sif !cpuis("R8A77940")&&!cpuis("R8A77470") rgroup.long 0x60++0x03 line.long 0x00 "MODEMR,Mode Monitor Register" bitfld.long 0x00 30. " MDT1 ,MDT1" "0,1" bitfld.long 0x00 29. " MDT0 ,MDT0" "0,1" bitfld.long 0x00 28. " MD28 ,MD28" "0,1" bitfld.long 0x00 27. " MD27 ,MD27" "0,1" bitfld.long 0x00 26. " MD26 ,MD26" "0,1" bitfld.long 0x00 25. " MD25 ,MD25" "0,1" bitfld.long 0x00 24. " MD24 ,MD24" "0,1" bitfld.long 0x00 23. " MD23 ,MD23" "0,1" textline " " bitfld.long 0x00 22. " MD22 ,MD22" "0,1" bitfld.long 0x00 21. " MD21 ,MD21" "0,1" bitfld.long 0x00 20. " MD20 ,MD20" "0,1" bitfld.long 0x00 19. " MD19 ,MD19" "0,1" bitfld.long 0x00 18. " MD18 ,MD18" "0,1" bitfld.long 0x00 17. " MD17 ,MD17" "0,1" bitfld.long 0x00 16. " MD16 ,MD16" "0,1" bitfld.long 0x00 15. " MD15 ,MD15" "0,1" textline " " bitfld.long 0x00 14. " MD14 ,MD14" "0,1" bitfld.long 0x00 13. " MD13 ,MD13" "0,1" bitfld.long 0x00 12. " MD12 ,MD12" "0,1" bitfld.long 0x00 11. " MD11 ,MD11" "0,1" bitfld.long 0x00 10. " MD10 ,MD10" "0,1" bitfld.long 0x00 9. " MD09 ,MD09" "0,1" bitfld.long 0x00 8. " MD08 ,MD08" "0,1" bitfld.long 0x00 7. " MD07 ,MD07" "0,1" textline " " bitfld.long 0x00 6. " MD06 ,MD06" "0,1" bitfld.long 0x00 5. " MD05 ,MD05" "0,1" bitfld.long 0x00 4. " MD04 ,MD04" "0,1" bitfld.long 0x00 3. " MD03 ,MD03" "0,1" bitfld.long 0x00 2. " MD02 ,MD02" "0,1" bitfld.long 0x00 1. " MD01 ,MD01" "0,1" bitfld.long 0x00 0. " MD00 ,MD00" "0,1" else rgroup.long 0x60++0x03 line.long 0x00 "MODEMR,Mode Monitor Register" bitfld.long 0x00 30. " MDT1 ,MDT1" "0,1" bitfld.long 0x00 29. " MDT0 ,MDT0" "0,1" bitfld.long 0x00 21. " MD21 ,MD21" "0,1" bitfld.long 0x00 20. " MD20 ,MD20" "0,1" sif cpu()=="R8A77470" bitfld.long 0x00 14. " MD14 ,MD14" "0,1" bitfld.long 0x00 13. " MD13 ,MD13" "0,1" bitfld.long 0x00 11. " MD11 ,MD11" "0,1" textline " " bitfld.long 0x00 10. " MD10 ,MD10" "0,1" else bitfld.long 0x00 19. " MD19 ,MD19" "0,1" bitfld.long 0x00 18. " MD18 ,MD18" "0,1" bitfld.long 0x00 14. " MD14 ,MD14" "0,1" bitfld.long 0x00 13. " MD13 ,MD13" "0,1" textline " " bitfld.long 0x00 12. " MD12 ,MD12" "0,1" bitfld.long 0x00 11. " MD11 ,MD11" "0,1" bitfld.long 0x00 10. " MD10 ,MD10" "0,1" endif bitfld.long 0x00 9. " MD09 ,MD09" "0,1" bitfld.long 0x00 8. " MD08 ,MD08" "0,1" bitfld.long 0x00 7. " MD07 ,MD07" "0,1" bitfld.long 0x00 6. " MD06 ,MD06" "0,1" bitfld.long 0x00 5. " MD05 ,MD05" "0,1" textline " " bitfld.long 0x00 4. " MD04 ,MD04" "0,1" bitfld.long 0x00 3. " MD03 ,MD03" "0,1" bitfld.long 0x00 2. " MD02 ,MD02" "0,1" bitfld.long 0x00 1. " MD01 ,MD01" "0,1" bitfld.long 0x00 0. " MD00 ,MD00" "0,1" endif textline " " sif (!cpuis("R8A77940")&&!cpuis("R8A77470")) group.long 0x40++0x03 line.long 0x00 "CA15RESCNT,CA15 Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" bitfld.long 0x00 3. " CA15CPU0R ,Issue reset to CA15-CPU0" "No reset,Reset" bitfld.long 0x00 2. " CA15CPU1R ,Issue reset to CA15-CPU1" "No reset,Reset" sif cpu()!="RCARM2" textline " " bitfld.long 0x00 1. " CA15CPU2R ,Issue reset to CA15-CPU2" "No reset,Reset" bitfld.long 0x00 0. " CA15CPU3R ,Issue reset to CA15-CPU3" "No reset,Reset" endif endif sif cpu()!="RCARM2" group.long 0x44++0x03 line.long 0x00 "CA7RESCNT,CA7 Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" bitfld.long 0x00 3. " CA7CPU0R ,Issue reset to CA7-CPU0" "No reset,Reset" bitfld.long 0x00 2. " CA7CPU1R ,Issue reset to CA7-CPU1" "No reset,Reset" sif cpu()!="R8A77470" textline " " bitfld.long 0x00 1. " CA7CPU2R ,Issue reset to CA7-CPU2" "No reset,Reset" bitfld.long 0x00 0. " CA7CPU3R ,Issue reset to CA7-CPU3" "No reset,Reset" endif endif sif cpu()!="R8A77470" group.long 0x48++0x03 line.long 0x00 "SHXSFTRST,SH-4A Software Reset Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" bitfld.long 0x00 0. " SHX4R ,Issue reset request to SH-4A" "No reset,Reset" sif cpu()!="RCARM2" group.long 0x50++0x03 line.long 0x00 "RESCNT,Reset Control Register" bitfld.long 0x00 1. " MSTPCA15 ,System CPU (CA15) module stop" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPCA7 ,System CPU (CA7) module stop" "Not stopped,Stopped" endif endif group.long 0x54++0x07 line.long 0x00 "WDTRSTCR,Watchdog Timer Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" sif cpu()!="R8A77470" bitfld.long 0x00 1. " SWDT_RSTMSK ,Secure-WDT reset mask" "Reset,No reset" endif bitfld.long 0x00 0. " RWDT_RSTMSK ,RWDT reset mask" "Reset,No reset" line.long 0x04 "RSTOUTCR,PRESETOUT Control Register" bitfld.long 0x04 0. " RESOUT ,PRESETOUT# control by software" "Asserted,Negated" sif cpu()!="R8A77470" group.long 0x00++0x03 line.long 0x00 "RBAR,RT Boot Address Register" hexmask.long 0x00 4.--31. 1. " RBAR ,SH-4A boot address" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of SH-4A" "External Memory,RBAR,?..." endif group.long 0x10++0x07 line.long 0x00 "SBAR,SYS Boot Address Register" line.long 0x04 "SBAR2,SYS Boot Address Register 2" textline " " sif (!cpuis("R8A77940")&&!cpuis("R8A77470")) group.long 0x04++0x03 line.long 0x00 "RBAR2,RT Boot Address Register 2" hexmask.long 0x00 4.--31. 0x10 " RBAR2 ,SH-4A boot address 2" bitfld.long 0x00 0. " VLD ,VALID bit" "RBAR,RBAR2" endif sif (cpuis("R8A77940")||cpuis("R8A77470")) group.long 0x30++0x07 line.long 0x00 "CA7BAR,CA7 Boot Address Register" hexmask.long.tbyte 0x00 10.--31. 0x4 " SBAR ,System CPU (CA7) boot address" bitfld.long 0x00 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of system CPU (CA7)" "SBAR[39:18],,Built-in memory,?..." line.long 0x04 "CA7BAR2,CA7 Boot Address Register 2" hexmask.long.tbyte 0x04 10.--31. 0x4 " SBAR2 ,System CPU (CA7) boot address 2" bitfld.long 0x04 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x04 0. " VLD ,VALID bit" "SBAR,SBAR2" elif cpu()!="RCARM2" group.long 0x4030++0x07 line.long 0x00 "CA7BAR,CA7 Boot Address Register" hexmask.long.tbyte 0x00 10.--31. 0x4 " SBAR ,System CPU (CA7) boot address" bitfld.long 0x00 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of system CPU (CA7)" "SBAR[39:18],,Built-in memory,?..." line.long 0x04 "CA7BAR2,CA7 Boot Address Register 2" hexmask.long.tbyte 0x04 10.--31. 0x4 " SBAR2 ,System CPU (CA7) boot address 2" bitfld.long 0x04 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x04 0. " VLD ,VALID bit" "SBAR,SBAR2" endif sif (!cpuis("R8A77940")&&!cpuis("R8A77470")) group.long 0x6020++0x07 line.long 0x00 "CA15BAR,CA15 Boot Address Register" hexmask.long.tbyte 0x00 10.--31. 0x4 " SBAR ,System CPU (CA15) boot address" bitfld.long 0x00 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of system CPU (CA15)" "SBAR[39:18],,Built-in memory,?..." line.long 0x04 "CA15BAR2,CA15 Boot Address Register 2" hexmask.long.tbyte 0x04 10.--31. 0x4 " SBAR2 ,System CPU (CA15) boot address 2" bitfld.long 0x04 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x04 0. " VLD ,VALID bit" "SBAR,SBAR2" endif sif !cpuis("R8A77470") base ad:0xFFEF0000 width 14. group.long 0x80++0x0B "SH 4A" line.long 0x00 "SH4AWDTST,SH-4A Watchdog Timer Stop Time Register" hexmask.long.byte 0x00 24.--31. 1. " CV ,Code value" hexmask.long.tbyte 0x00 0.--23. 1. " WDTST ,SH4AWDTCNT overflow time" line.long 0x04 "SH4AWDTCSR,SH-4A Watchdog Timer Control/Status Register" hexmask.long.byte 0x04 24.--31. 1. " CV ,Code value" bitfld.long 0x04 7. " TME ,Timer enable" "Disabled,Enabled" bitfld.long 0x04 4. " WOVF ,Watchdog timer overflow" "Not occurred,Occurred" line.long 0x08 "SH4AWDTBST,SH-4A Watchdog Timer Base Stop Time Register" hexmask.long.byte 0x08 24.--31. 1. " CV ,Code value" hexmask.long.tbyte 0x08 0.--23. 1. " WDTST ,SH4AWDTBCNT overflow time" rgroup.long 0x90++0x03 line.long 0x00 "SH4AWDTCNT,SH-4A Watchdog Timer Counter" hexmask.long.tbyte 0x00 0.--23. 1. " WDTCNT ,Counter value" rgroup.long 0x98++0x03 line.long 0x00 "SH4AWDTBCNT,SH-4A Watchdog Timer Base Counter" hexmask.long.tbyte 0x00 0.--23. 1. " WDTCNT ,Counter value" group.long 0x40++0x03 line.long 0x00 "SH4ARESETVEC,SH-4A Reset Vector Setting Register" endif width 0x0B tree.end tree "INTC-SYS (Interrupt Controller)" base ad:0xE61C0000 width 14. tree "IRQC Event Detector Register Configuration" rgroup.long 0x0++0x3 line.long 0x00 "INTREQ_STS0,Interrupt Request Status Register 0" bitfld.long 0x00 3. " INTREQ3 ,Interrupt status 3" "Not requested,Requested" bitfld.long 0x00 2. " INTREQ2 ,Interrupt status 2" "Not requested,Requested" bitfld.long 0x00 1. " INTREQ1 ,Interrupt status 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INTREQ0 ,Interrupt status 0" "Not requested,Requested" group.long (0x0+0x04)++0x3 line.long 0x00 "INTEN_STS0,Interrupt Enable Status Register 0" eventfld.long 0x00 3. " INTEN3 ,Interrupt enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " INTEN2 ,Interrupt enable 2" "Disabled,Enabled" eventfld.long 0x00 1. " INTEN1 ,Interrupt enable 1" "Disabled,Enabled" textline " " eventfld.long 0x00 0. " INTEN0 ,Interrupt enable 0" "Disabled,Enabled" wgroup.long (0x0+0x08)++0x3 line.long 0x00 "INTEN_SET,0,Interrupt Enable Set Register 0" bitfld.long 0x00 3. " INTENS3 ,Interrupt enable set 3" "No effect,Enabled" bitfld.long 0x00 2. " INTENS2 ,Interrupt enable set 2" "No effect,Enabled" bitfld.long 0x00 1. " INTENS1 ,Interrupt enable set 1" "No effect,Enabled" textline " " bitfld.long 0x00 0. " INTENS0 ,Interrupt enable set 0" "No effect,Enabled" rgroup.long 0x10++0x3 line.long 0x00 "INTREQ_STS1,Interrupt Request Status Register 1" bitfld.long 0x00 3. " INTREQ3 ,Interrupt status 3" "Not requested,Requested" bitfld.long 0x00 2. " INTREQ2 ,Interrupt status 2" "Not requested,Requested" bitfld.long 0x00 1. " INTREQ1 ,Interrupt status 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INTREQ0 ,Interrupt status 0" "Not requested,Requested" group.long (0x10+0x04)++0x3 line.long 0x00 "INTEN_STS1,Interrupt Enable Status Register 1" eventfld.long 0x00 3. " INTEN3 ,Interrupt enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " INTEN2 ,Interrupt enable 2" "Disabled,Enabled" eventfld.long 0x00 1. " INTEN1 ,Interrupt enable 1" "Disabled,Enabled" textline " " eventfld.long 0x00 0. " INTEN0 ,Interrupt enable 0" "Disabled,Enabled" wgroup.long (0x10+0x08)++0x3 line.long 0x00 "INTEN_SET,1,Interrupt Enable Set Register 1" bitfld.long 0x00 3. " INTENS3 ,Interrupt enable set 3" "No effect,Enabled" bitfld.long 0x00 2. " INTENS2 ,Interrupt enable set 2" "No effect,Enabled" bitfld.long 0x00 1. " INTENS1 ,Interrupt enable set 1" "No effect,Enabled" textline " " bitfld.long 0x00 0. " INTENS0 ,Interrupt enable set 0" "No effect,Enabled" rgroup.long 0x120++0x3 line.long 0x00 "CHTEN_STS,Chattering Reduction Status Register" bitfld.long 0x00 3. " CHTEN3 ,Noise reduction enable status 3" "Disabled,Enabled" bitfld.long 0x00 2. " CHTEN2 ,Noise reduction enable status 2" "Disabled,Enabled" bitfld.long 0x00 1. " CHTEN1 ,Noise reduction enable status 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CHTEN0 ,Noise reduction enable status 0" "Disabled,Enabled" textline "" sif cpu()=="R8A7792X" group.long 0x100++0x3 line.long 0x0 "DETECT_STATUS,IRQC Detect Status Register" eventfld.long 0x0 3. " IRQCDET[3] ,IRQC Event Detection Status bit 3" "Not occurred,Occurred" eventfld.long 0x0 2. " [2] ,IRQC Event Detection Status bit 2" "Not occurred,Occurred" eventfld.long 0x0 1. " [1] ,IRQC Event Detection Status bit 1" "Not occurred,Occurred" eventfld.long 0x0 0. " [0] ,IRQC Event Detection Status bit 0" "Not occurred,Occurred" rgroup.long 0x104++0x3 line.long 0x0 "MONITOR,IRQC Signal Level Monitor Register" bitfld.long 0x0 3. " IRQCMON[3] ,IRQC External Signal Level Monitor bit 3" "Low,High" bitfld.long 0x0 2. " [2] ,IRQC External Signal Level Monitor bit 2" "Low,High" bitfld.long 0x0 1. " [1] ,IRQC External Signal Level Monitor bit 1" "Low,High" bitfld.long 0x0 0. " [0] ,IRQC External Signal Level Monitor bit 0" "Low,High" endif textline "" rgroup.long 0x108++0x17 line.long 0x00 "HLVL_STS,IRQ High Level Detect Status Register" bitfld.long 0x00 3. " IRQHSTS3 ,IRQ High level interrupt status 3" "Not occurred,Occurred" bitfld.long 0x00 2. " IRQHSTS2 ,IRQ High level interrupt status 2" "Not occurred,Occurred" bitfld.long 0x00 1. " IRQHSTS1 ,IRQ High level interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " IRQHSTS0 ,IRQ High level interrupt status 0" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,IRQ Low Level Detect Status Register" bitfld.long 0x04 3. " IRQLSTS3 ,IRQ Low level interrupt status 3" "Not occurred,Occurred" bitfld.long 0x04 2. " IRQLSTS2 ,IRQ Low level interrupt status 2" "Not occurred,Occurred" bitfld.long 0x04 1. " IRQLSTS1 ,IRQ Low level interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x04 0. " IRQLSTS0 ,IRQ Low level interrupt status 0" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,IRQ Sync Rising Edge Detect Status Register" bitfld.long 0x08 3. " IRQSRSTS3 ,IRQ Synchronous Rise edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x08 2. " IRQSRSTS2 ,IRQ Synchronous Rise edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x08 1. " IRQSRSTS1 ,IRQ Synchronous Rise edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x08 0. " IRQSRSTS0 ,IRQ Synchronous Rise edge interrupt status 0" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,IRQ Sync Falling Edge Detect Status Register" bitfld.long 0x0C 3. " IRQSFSTS3 ,IRQ Synchronous Fall edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x0C 2. " IRQSFSTS2 ,IRQ Synchronous Fall edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x0C 1. " IRQSFSTS1 ,IRQ Synchronous Fall edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x0C 0. " IRQSFSTS0 ,IRQ Synchronous Fall edge interrupt status 0" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,IRQ Async Rising Edge DetectStatus Register" bitfld.long 0x10 3. " IRQARSTS3 ,IRQ Asynchronous Rise edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x10 2. " IRQARSTS2 ,IRQ Asynchronous Rise edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x10 1. " IRQARSTS1 ,IRQ Asynchronous Rise edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x10 0. " IRQARSTS0 ,IRQ Asynchronous Rise edge interrupt status 0" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,IRQ AsyncFallingEdge Detect Status Register" bitfld.long 0x14 3. " IRQAFSTS3 ,IRQ AsyncFallingEdge DetectStatus Register 3" "Not occurred,Occurred" bitfld.long 0x14 2. " IRQAFSTS2 ,IRQ AsyncFallingEdge DetectStatus Register 2" "Not occurred,Occurred" bitfld.long 0x14 1. " IRQAFSTS1 ,IRQ AsyncFallingEdge DetectStatus Register 1" "Not occurred,Occurred" textline " " bitfld.long 0x14 0. " IRQAFSTS0 ,IRQ AsyncFallingEdge DetectStatus Register 0" "Not occurred,Occurred" sif cpuis("R8A77940") group.long 0x180++0x03 line.long 0x00 "CONFIG_00,IRQ0 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ0 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ0 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,?..." else group.long 0x180++0x03 line.long 0x00 "CONFIG_00,IRQ0 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ0 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ0 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,?..." endif sif cpuis("R8A77940") group.long 0x184++0x03 line.long 0x00 "CONFIG_01,IRQ1 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ1 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ1 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,?..." else group.long 0x184++0x03 line.long 0x00 "CONFIG_01,IRQ1 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ1 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ1 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,?..." endif sif cpuis("R8A77940") group.long 0x188++0x03 line.long 0x00 "CONFIG_02,IRQ2 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ2 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ2 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,?..." else group.long 0x188++0x03 line.long 0x00 "CONFIG_02,IRQ2 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ2 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ2 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,?..." endif sif cpuis("R8A77940") group.long 0x18C++0x03 line.long 0x00 "CONFIG_03,IRQ3 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ3 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ3 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,?..." else group.long 0x18C++0x03 line.long 0x00 "CONFIG_03,IRQ3 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ3 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ3 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,?..." endif tree.end tree "NMI Event Detector Register Configuration" sif cpuis("R8A77940")||cpuis("R8A7792X") rgroup.long 0x400++0x3 line.long 0x00 "NMIREQ_STS0,NMI Request Status Register 0" bitfld.long 0x00 1. " C1STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long 0x404++0x3 line.long 0x00 "NMIEN_STS0,NMI Enable Status Register 0" eventfld.long 0x00 1. " C1IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long 0x408++0x3 line.long 0x00 "NMIEN_SET0,NMI Enable Set Register 0" bitfld.long 0x00 1. " C1SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" rgroup.long 0x410++0x3 line.long 0x00 "NMIREQ_STS1,NMI Request Status Register 1" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long 0x414++0x3 line.long 0x00 "NMIEN_STS1,NMI Enable Status Register 1" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long 0x418++0x3 line.long 0x00 "NMIEN_SET1,NMI Enable Set Register 1" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" else rgroup.long 0x400++0x3 line.long 0x00 "NMIREQ_STS0,NMI Request Status Register 0" bitfld.long 0x00 7. " C7STS ,NMI status 7" "Not during service,During service" bitfld.long 0x00 6. " C6STS ,NMI status 6" "Not during service,During service" bitfld.long 0x00 5. " C5STS ,NMI status 5" "Not during service,During service" textline " " bitfld.long 0x00 4. " C4STS ,NMI status 4" "Not during service,During service" bitfld.long 0x00 3. " C3STS ,NMI status 3" "Not during service,During service" bitfld.long 0x00 2. " C2STS ,NMI status 2" "Not during service,During service" textline " " bitfld.long 0x00 1. " C1STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long (0x400+0x04)++0x3 line.long 0x00 "NMIEN_STS0,NMI Enable Status Register 0" eventfld.long 0x00 7. " C7IEN ,NMI enable 7" "Disabled,Enabled" eventfld.long 0x00 6. " C6IEN ,NMI enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " C5IEN ,NMI enable 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " C4IEN ,NMI enable 4" "Disabled,Enabled" eventfld.long 0x00 3. " C3IEN ,NMI enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " C2IEN ,NMI enable 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " C1IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long (0x400+0x08)++0x3 line.long 0x00 "NMIEN_SET,NMI Enable Set (CPU0) Register 0" bitfld.long 0x00 7. " C7SET ,NMI enable set 7" "No effect,Enable" bitfld.long 0x00 6. " C6SET ,NMI enable set 6" "No effect,Enable" bitfld.long 0x00 5. " C5SET ,NMI enable set 5" "No effect,Enable" textline " " bitfld.long 0x00 4. " C4SET ,NMI enable set 4" "No effect,Enable" bitfld.long 0x00 3. " C3SET ,NMI enable set 3" "No effect,Enable" bitfld.long 0x00 2. " C2SET ,NMI enable set 2" "No effect,Enable" textline " " bitfld.long 0x00 1. " C1SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" rgroup.long 0x410++0x3 line.long 0x00 "NMIREQ_STS1,NMI Request Status Register 1" bitfld.long 0x00 7. " C7STS ,NMI status 7" "Not during service,During service" bitfld.long 0x00 6. " C6STS ,NMI status 6" "Not during service,During service" bitfld.long 0x00 5. " C5STS ,NMI status 5" "Not during service,During service" textline " " bitfld.long 0x00 4. " C4STS ,NMI status 4" "Not during service,During service" bitfld.long 0x00 3. " C3STS ,NMI status 3" "Not during service,During service" bitfld.long 0x00 2. " C2STS ,NMI status 2" "Not during service,During service" textline " " bitfld.long 0x00 1. " C1STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0STS ,NMI status 0" "Not during service,During service" group.long (0x410+0x04)++0x3 line.long 0x00 "NMIEN_STS1,NMI Enable Status Register 1" eventfld.long 0x00 7. " C7IEN ,NMI enable 7" "Disabled,Enabled" eventfld.long 0x00 6. " C6IEN ,NMI enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " C5IEN ,NMI enable 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " C4IEN ,NMI enable 4" "Disabled,Enabled" eventfld.long 0x00 3. " C3IEN ,NMI enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " C2IEN ,NMI enable 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " C1IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long (0x410+0x08)++0x3 line.long 0x00 "NMIEN_SET,NMI Enable Set (CPU1) Register 1" bitfld.long 0x00 7. " C7SET ,NMI enable set 7" "No effect,Enable" bitfld.long 0x00 6. " C6SET ,NMI enable set 6" "No effect,Enable" bitfld.long 0x00 5. " C5SET ,NMI enable set 5" "No effect,Enable" textline " " bitfld.long 0x00 4. " C4SET ,NMI enable set 4" "No effect,Enable" bitfld.long 0x00 3. " C3SET ,NMI enable set 3" "No effect,Enable" bitfld.long 0x00 2. " C2SET ,NMI enable set 2" "No effect,Enable" textline " " bitfld.long 0x00 1. " C1SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0SET ,NMI enable set 0" "No effect,Enable" endif rgroup.long 0x520++0x3 line.long 0x00 "CHTEN_STS,Chattering Reduction Status Register" bitfld.long 0x00 0. " CHTEN ,Noise reduction enable status" "Disabled,Enabled" group.long 0x540++0x3 line.long 0x00 "DEB_SET,NMI Debounce Setting Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,NMI scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,NMI chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" sif cpuis("R8A77940")||cpuis("R8A77940")||cpuis("R8A7792X") rgroup.long 0x508++0x17 line.long 0x00 "HLVL_STS,NMI High Level Detect Status Register" bitfld.long 0x00 8. " NMI8HSTS ,NMI8 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 1. " NMI1HSTS ,NMI1 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 0. " NMI0HSTS ,NMI0 High level interrupt status" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,NMI Low Level Detect Status Register" bitfld.long 0x04 8. " NMI8LSTS ,NMI8 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 1. " NMI1LSTS ,NMI1 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 0. " NMI0LSTS ,NMI0 Low level interrupt status" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,NMI Sync Rising Edge Detect Status Register" bitfld.long 0x08 8. " NMI8SRSTS ,NMI8 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 1. " NMI1SRSTS ,NMI1 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 0. " NMI0SRSTS ,NMI0 Synchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,NMI Sync Falling Edge Detect Status Register" bitfld.long 0x0C 8. " NMI8SFSTS ,NMI8 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 1. " NMI1SFSTS ,NMI1 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 0. " NMI0SFSTS ,NMI0 Synchronous Fall edge interrupt status" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,NMI Async Rising Edge Detect Status Register" bitfld.long 0x10 8. " NMI8ARSTS ,NMI8 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 1. " NMI1ARSTS ,NMI1 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 0. " NMI0ARSTS ,NMI0 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,NMI Async Falling Edge Detect Status Register" bitfld.long 0x14 8. " NMI8AFSTS ,NMI8 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 1. " NMI1AFSTS ,NMI1 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 0. " NMI0AFSTS ,NMI0 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" else rgroup.long 0x508++0x17 line.long 0x00 "HLVL_STS,NMI High Level Detect Status Register" bitfld.long 0x00 8. " NMI8HSTS ,NMI8 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 7. " NMI7HSTS ,NMI7 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 6. " NMI6HSTS ,NMI6 High level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " NMI5HSTS ,NMI5 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 4. " NMI4HSTS ,NMI4 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 3. " NMI3HSTS ,NMI3 High level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " NMI2HSTS ,NMI2 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 1. " NMI1HSTS ,NMI1 High level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 0. " NMI0HSTS ,NMI0 High level interrupt status" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,NMI Low Level Detect Status Register" bitfld.long 0x04 8. " NMI8LSTS ,NMI8 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 7. " NMI7LSTS ,NMI7 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 6. " NMI6LSTS ,NMI6 Low level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x04 5. " NMI5LSTS ,NMI5 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 4. " NMI4LSTS ,NMI4 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 3. " NMI3LSTS ,NMI3 Low level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x04 2. " NMI2LSTS ,NMI2 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 1. " NMI1LSTS ,NMI1 Low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 0. " NMI0LSTS ,NMI0 Low level interrupt status" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,NMI Sync Rising Edge Detect Status Register" bitfld.long 0x08 8. " NMI8SRSTS ,NMI8 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 7. " NMI7SRSTS ,NMI7 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 6. " NMI6SRSTS ,NMI6 Synchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x08 5. " NMI5SRSTS ,NMI5 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 4. " NMI4SRSTS ,NMI4 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 3. " NMI3SRSTS ,NMI3 Synchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x08 2. " NMI2SRSTS ,NMI2 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 1. " NMI1SRSTS ,NMI1 Synchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 0. " NMI0SRSTS ,NMI0 Synchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,NMI Sync Falling Edge Detect Status Register" bitfld.long 0x0C 8. " NMI8SFSTS ,NMI8 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 7. " NMI7SFSTS ,NMI7 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 6. " NMI6SFSTS ,NMI6 Synchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x0C 5. " NMI5SFSTS ,NMI5 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 4. " NMI4SFSTS ,NMI4 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 3. " NMI3SFSTS ,NMI3 Synchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x0C 2. " NMI2SFSTS ,NMI2 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 1. " NMI1SFSTS ,NMI1 Synchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 0. " NMI0SFSTS ,NMI0 Synchronous Fall edge interrupt status" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,NMI Async Rising Edge Detect Status Register" bitfld.long 0x10 8. " NMI8ARSTS ,NMI8 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 7. " NMI7ARSTS ,NMI7 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 6. " NMI6ARSTS ,NMI6 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x10 5. " NMI5ARSTS ,NMI5 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 4. " NMI4ARSTS ,NMI4 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 3. " NMI3ARSTS ,NMI3 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x10 2. " NMI2ARSTS ,NMI2 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 1. " NMI1ARSTS ,NMI1 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 0. " NMI0ARSTS ,NMI0 Asynchronous Rise edge interrupt status" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,NMI Async Falling Edge Detect Status Register" bitfld.long 0x14 8. " NMI8AFSTS ,NMI8 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 7. " NMI7AFSTS ,NMI7 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 6. " NMI6AFSTS ,NMI6 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x14 5. " NMI5AFSTS ,NMI5 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 4. " NMI4AFSTS ,NMI4 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 3. " NMI3AFSTS ,NMI3 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x14 2. " NMI2AFSTS ,NMI2 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 1. " NMI1AFSTS ,NMI1 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 0. " NMI0AFSTS ,NMI0 Asynchronous Fall edge interrupt status" "Not occurred,Occurred" endif sif cpuis("R8A77940")||cpuis("R8A77940")||cpuis("R8A7792X") group.long 0x580++0x07 line.long 0x00 "CONFIG0_NMI,NMI Configuration 0 Register" bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x04 "CONFIG1_NMI,NMI Configuration 1 Register" bitfld.long 0x04 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." group.long 0x5A0++0x03 line.long 0x00 "CONFIG8_NMI,NMI Configuration 8 Register" bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." else group.long 0x400++0x23 line.long 0x0 "CONFIG0_NMI,NMI Configuration 0 Register" bitfld.long 0x0 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x4 "CONFIG1_NMI,NMI Configuration 1 Register" bitfld.long 0x4 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x8 "CONFIG2_NMI,NMI Configuration 2 Register" bitfld.long 0x8 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0xC "CONFIG3_NMI,NMI Configuration 3 Register" bitfld.long 0xC 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x10 "CONFIG4_NMI,NMI Configuration 4 Register" bitfld.long 0x10 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x14 "CONFIG5_NMI,NMI Configuration 5 Register" bitfld.long 0x14 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x18 "CONFIG6_NMI,NMI Configuration 6 Register" bitfld.long 0x18 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x1C "CONFIG7_NMI,NMI Configuration 7 Register" bitfld.long 0x1C 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x20 "CONFIG8_NMI,NMI Configuration 8 Register" bitfld.long 0x20 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." endif tree.end tree "NMI Lock Register Configuration" group.long 0xA00++0xB line.long 0x00 "NMI_LCK,NMI Mask Lock Set Register" line.long 0x04 "NMI_LCKCODE,NMI Lock Code Register" line.long 0x08 "NMI_DBG,NMI Debug Control Enable Register" bitfld.long 0x08 0. " DBGEN ,NMI mask lock feature debug enable" "Disabled,Enabled" group.long 0xB08++0x3 line.long 0x00 "NMI_DBGCODE,NMI Debug Code Register" tree.end width 0xB tree.end tree "INTC-RT (Interrupt Controller)" base ad:0xFFD20000 width 10. tree "Peripheral Interrupt Priority Registers" group.word 0x00++0x1 line.word 0x00 "IPRAS,Peripheral Interrupt priority register AS" bitfld.word 0x00 12.--15. " IPRAS[15:12] ,CTI priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRAS[11:8] ,TPU_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRAS[7:4] ,2DDM0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRAS[3:0] ,Sec timer priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x04++0x1 line.word 0x00 "IPRBS,Peripheral Interrupt priority register BS" bitfld.word 0x00 12.--15. " IPRBS[15:12] ,JPU priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRBS[11:8] ,MMC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRBS[3:0] ,MMC1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x08++0x1 line.word 0x00 "IPRCS,Peripheral Interrupt priority register CS" bitfld.word 0x00 12.--15. " IPRCS[15:12] ,FSN priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x0C++0x1 line.word 0x00 "IPRDS,Peripheral Interrupt priority register DS" bitfld.word 0x00 12.--15. " IPRDS[15:12] ,CAN0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRDS[11:8] ,CAN1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x10++0x1 line.word 0x00 "IPRES,Peripheral Interrupt priority register ES" bitfld.word 0x00 12.--15. " IPRES[15:12] ,RTDMAC_DEI0/RTDMAC_DEI1/RTDMAC_DEI2/RTDMAC_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRES[11:8] ,REMOCON priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRES[7:4] ,GPS priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRES[3:0] ,ADI priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x14++0x1 line.word 0x00 "IPRFS,Peripheral Interrupt priority register FS" bitfld.word 0x00 4.--7. " IPRFS[7:4] ,CMT0_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRFS[3:0] ,CMT0_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x18++0x1 line.word 0x00 "IPRGS,Peripheral Interrupt priority register ES" bitfld.word 0x00 12.--15. " IPRGS[15:12] ,TMU1_TUNI0/TMU0_TUNI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRGS[11:8] ,TMU1_TUNI1/TMU0_TUNI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRGS[7:4] ,TMU1_TUNI2/TMU0_TUNI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRGS[3:0] ,TSIF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x1C++0x1 line.word 0x00 "IPRHS,Peripheral Interrupt priority register HS" bitfld.word 0x00 8.--11. " IPRHS[11:8] ,PCIEX/PXC/IEBUS priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRHS[7:4] ,PCIEX_DMA/SDHIO0/SDHIO1/SDHIO2/SDHIO3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRHS[3:0] ,PCIEX_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x20++0x1 line.word 0x00 "IPRIS,Peripheral Interrupt priority register IS" bitfld.word 0x00 4.--7. " IPRIS[7:4] ,TSIF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRIS[3:0] ,I2C3/IIC(DVFS)/I2C0/IIC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x24++0x1 line.word 0x00 "IPRJS,Peripheral Interrupt priority register JS" bitfld.word 0x00 8.--11. " IPRJS[11:8] ,SGX-3DG priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x28++0x1 line.word 0x00 "IPRKS,Peripheral Interrupt priority register KS" bitfld.word 0x00 12.--15. " IPRKS[15:12] ,DARC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRKS[11:8] ,TDBG priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRKS[3:0] ,Sec up timer priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x2C++0x1 line.word 0x00 "IPRLS,Peripheral Interrupt priority register LS" bitfld.word 0x00 12.--15. " IPRLS[15:12] ,IPMMU(DS)/IPMMU(SYS0)/IPMMU(SYS1) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRLS[3:0] ,SIM priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30++0x1 line.word 0x00 "IPRMS,Peripheral Interrupt priority register MS" bitfld.word 0x00 12.--15. " IPRMS[15:12] ,I2C1/I2C2/IIC1/IIC2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRMS[7:4] ,SWDT0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRMS[3:0] ,RWDT0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30000++0x1 line.word 0x00 "IPRAS3,Peripheral Interrupt priority register AS3" bitfld.word 0x00 12.--15. " IPRAS3[15:12] ,SCIF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRAS3[11:8] ,SCIF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRAS3[7:4] ,HSCIF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRAS3[3:0] ,HSCIF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30004++0x1 line.word 0x00 "IPRBS3,Peripheral Interrupt priority register BS3" bitfld.word 0x00 12.--15. " IPRBS3[15:12] ,TMU1_TUNI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRBS3[11:8] ,TMU2_TUNI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRBS3[7:4] ,RTDMAC_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRBS3[3:0] ,SYSC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30008++0x1 line.word 0x00 "IPRCS3,Peripheral Interrupt priority register CS3" bitfld.word 0x00 12.--15. " IPRCS3[15:12] ,QSPI priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRCS3[11:8] ,R-GP2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRCS3[7:4] ,ETHER priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRCS3[3:0] ,CPGA0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3000C++0x1 line.word 0x00 "IPRDS3,Peripheral Interrupt priority register DS3" bitfld.word 0x00 12.--15. " IPRDS3[15:12] ,SCIFA0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRDS3[11:8] ,SCIFA1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRDS3[7:4] ,SCIFA2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRDS3[3:0] ,CPGA1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30010++0x1 line.word 0x00 "IPRES3,Peripheral Interrupt priority register ES3" bitfld.word 0x00 12.--15. " IPRES3[15:12] ,SCIFB0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRES3[11:8] ,SCIFB1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRES3[7:4] ,SCIFB2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRES3[3:0] ,AVB priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30014++0x1 line.word 0x00 "IPRFS3,Peripheral Interrupt priority register FS3" bitfld.word 0x00 12.--15. " IPRFS3[15:12] ,CMT1_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRFS3[11:8] ,CMT1_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRFS3[7:4] ,CMT1_2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRFS3[3:0] ,CMT1_3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30018++0x1 line.word 0x00 "IPRGS3,Peripheral Interrupt priority register GS3" bitfld.word 0x00 12.--15. " IPRGS3[15:12] ,CMT1_4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRGS3[11:8] ,CMT1_5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRGS3[7:4] ,CMT1_6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRGS3[3:0] ,CMT1_7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3001C++0x1 line.word 0x00 "IPRHS3,Peripheral Interrupt priority register HS3" bitfld.word 0x00 12.--15. " IPRHS3[15:12] ,MSOF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRHS3[11:8] ,MSOF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRHS3[7:4] ,MSOF2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRHS3[3:0] ,MSOF3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30020++0x1 line.word 0x00 "IPRIS3,Peripheral Interrupt priority register IS3" bitfld.word 0x00 12.--15. " IPRIS3[15:12] ,SATA0/USB 3.0 HOST priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRIS3[11:8] ,SATA1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30024++0x1 line.word 0x00 "IPRJS3,Peripheral Interrupt priority register JS3" bitfld.word 0x00 4.--7. " IPRJS3[7:4] ,USB 3.0 BC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30028++0x1 line.word 0x00 "IPRKS3,Peripheral Interrupt priority register KS3" bitfld.word 0x00 12.--15. " IPRKS3[15:12] ,ADSP priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3002C++0x1 line.word 0x00 "IPRLS3,Peripheral Interrupt priority register LS3" bitfld.word 0x00 12.--15. " IPRLS3[15:12] ,DU1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRLS3[11:8] ,DU2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRLS3[7:4] ,VSP0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30030++0x1 line.word 0x00 "IPRMS3,Peripheral Interrupt priority register MS3" bitfld.word 0x00 12.--15. " IPRMS3[15:12] ,LBSC-WT0/LBSC-ATA/LBSC-DMAC2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRMS3[7:4] ,LBSC-DMAC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRMS3[3:0] ,LBSC-DMAC1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30034++0x1 line.word 0x00 "IPRNS3,Peripheral Interrupt priority register NS3" bitfld.word 0x00 8.--11. " IPRNS3[11:8] ,TMU2_TUNI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRNS3[7:4] ,TMU2_TUNI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRNS3[3:0] ,TMU2_TUNI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30038++0x1 line.word 0x00 "IPROS3,Peripheral Interrupt priority register OS3" bitfld.word 0x00 12.--15. " IPROS3[15:12] ,MFIS priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPROS3[11:8] ,CPORTS2R priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPROS3[7:4] ,TMU3_TUNI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPROS3[3:0] ,TMU3_TUNI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3003C++0x1 line.word 0x00 "IPRPS3,Peripheral Interrupt priority register PS3" bitfld.word 0x00 12.--15. " IPRPS3[15:12] ,TMU3_TUNI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRPS3[11:8] ,Thermal Sensor priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRPS3[7:4] ,CPG priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRPS3[3:0] ,DRC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30040++0x1 line.word 0x00 "IPRQS3,Peripheral Interrupt priority register QS3" bitfld.word 0x00 12.--15. " IPRQS3[15:12] ,STB priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRQS3[11:8] ,DU0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRQS3[3:0] ,VSP1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30044++0x1 line.word 0x00 "IPRRS3,Peripheral Interrupt priority register RS3" bitfld.word 0x00 12.--15. " IPRRS3[15:12] ,VSPD0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRRS3[11:8] ,VSPD1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRRS3[7:4] ,IMR-LSX0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRRS3[3:0] ,IMR-LSX1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30048++0x1 line.word 0x00 "IPRSS3,Peripheral Interrupt priority register SS3" bitfld.word 0x00 12.--15. " IPRSS3[15:12] ,VIN0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRSS3[11:8] ,VIN1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRSS3[7:4] ,VIN2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRSS3[3:0] ,VIN3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3004C++0x1 line.word 0x00 "IPRTS3,Peripheral Interrupt priority register TS3" bitfld.word 0x00 12.--15. " IPRTS3[15:12] ,IMR-X2_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRTS3[11:8] ,IMR-X2_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRTS3[7:4] ,IMP-X4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRTS3[3:0] ,IPMMU_MP priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30050++0x1 line.word 0x00 "IPRUS3,Peripheral Interrupt priority register US3" bitfld.word 0x00 12.--15. " IPRUS3[15:12] ,IPMMU_RT priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRUS3[11:8] ,IPMMU_M priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRUS3[7:4] ,FDP0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRUS3[3:0] ,FDP1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30054++0x1 line.word 0x00 "IPRVS3,Peripheral Interrupt priority register VS3" bitfld.word 0x00 12.--15. " IPRVS3[15:12] ,FDP2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRVS3[7:4] ,VCP1_VINT priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRVS3[3:0] ,VCP1_CINT priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30058++0x1 line.word 0x00 "IPRWS3,Peripheral Interrupt priority register WS3" bitfld.word 0x00 4.--7. " IPRWS3[7:4] ,VCP0_VINT priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRWS3[3:0] ,VCP0_CINT priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3005C++0x1 line.word 0x00 "IPRXS3,Peripheral Interrupt priority register XS3" bitfld.word 0x00 12.--15. " IPRXS3[15:12] ,SSP1S_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRXS3[11:8] ,SSP1S_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRXS3[7:4] ,SSP1S_2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRXS3[3:0] ,SSP1S_3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30060++0x1 line.word 0x00 "IPRYS3,Peripheral Interrupt priority register YS3" bitfld.word 0x00 12.--15. " IPRYS3[15:12] ,SSP1S_4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRYS3[11:8] ,IPMMU_M_SEC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30064++0x1 line.word 0x00 "IPRZS3,Peripheral Interrupt priority register ZS3" bitfld.word 0x00 12.--15. " IPRZS3[15:12] ,S3C (Secure) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRZS3[11:8] ,S3C priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRZS3[7:4] ,CC5.2_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRZS3[3:0] ,CC5.2_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30068++0x1 line.word 0x00 "IPRAAS3,Peripheral Interrupt priority register AAS3" bitfld.word 0x00 8.--11. " IPRAAS3[11:8] ,USB DDM priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRAAS3[7:4] ,USB DMAC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRAAS3[3:0] ,USB DMAC1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3006C++0x1 line.word 0x00 "IPRABS3,Peripheral Interrupt priority register ABS3" bitfld.word 0x00 12.--15. " IPRABS3[15:12] ,USB2.0 OTG priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRABS3[11:8] ,USB2.0 HOST0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRABS3[7:4] ,USB2.0 HOST1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRABS3[3:0] ,USB2.0 HOST2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30070++0x1 line.word 0x00 "IPRACS3,Peripheral Interrupt priority register ACS3" bitfld.word 0x00 4.--7. " IPRACS3[7:4] ,AXISTAT_5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRACS3[3:0] ,AXISTAT_4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30074++0x1 line.word 0x00 "IPRADS3,Peripheral Interrupt priority register ADS3" bitfld.word 0x00 12.--15. " IPRADS3[15:12] ,AXISTAT_3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRADS3[11:8] ,AXISTAT_2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRADS3[7:4] ,AXISTAT_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRADS3[3:0] ,AXISTAT_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30078++0x1 line.word 0x00 "IPRAES3,Peripheral Interrupt priority register AES3" bitfld.word 0x00 12.--15. " IPRAES3[15:12] ,MFIIICR7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRAES3[11:8] ,MFIIICR6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRAES3[7:4] ,MFIIICR5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRAES3[3:0] ,MFIIICR4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3007C++0x1 line.word 0x00 "IPRAFS3,Peripheral Interrupt priority register AFS3" bitfld.word 0x00 12.--15. " IPRAFS3[15:12] ,MFIIICR3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRAFS3[11:8] ,MFIIICR2priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRAFS3[7:4] ,MFIIICR1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRAFS3[3:0] ,MFIIICR0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40000++0x1 line.word 0x00 "IPRAS3P,Peripheral Interrupt priority register AS3P" bitfld.word 0x00 12.--15. " IPRAS3P[15:12] ,SYSDMAC0_DEI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRAS3P[11:8] ,SYSDMAC0_DEI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRAS3P[7:4] ,SYSDMAC0_DEI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRAS3P[3:0] ,SYSDMAC0_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40004++0x1 line.word 0x00 "IPRBS3P,Peripheral Interrupt priority register AS3P" bitfld.word 0x00 12.--15. " IPRBS3P[15:12] ,SYSDMAC0_DEI4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRBS3P[11:8] ,SYSDMAC0_DEI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRBS3P[7:4] ,SYSDMAC0_DEI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRBS3P[3:0] ,SYSDMAC0_DEI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40008++0x1 line.word 0x00 "IPRCS3P,Peripheral Interrupt priority register CS3P" bitfld.word 0x00 12.--15. " IPRCS3P[15:12] ,SYSDMAC0_DEI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRCS3P[11:8] ,SYSDMAC0_DEI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRCS3P[7:4] ,SYSDMAC0_DEI10 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRCS3P[3:0] ,SYSDMAC0_DEI11 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4000C++0x1 line.word 0x00 "IPRDS3P,Peripheral Interrupt priority register DS3P" bitfld.word 0x00 12.--15. " IPRDS3P[15:12] ,SYSDMAC0_DEI12 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRDS3P[11:8] ,SYSDMAC0_DEI13 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRDS3P[7:4] ,SYSDMAC0_DEI14 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRDS3P[3:0] ,SYSDMAC0_DEI15 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40010++0x1 line.word 0x00 "IPRES3P,Peripheral Interrupt priority register ES3P" bitfld.word 0x00 12.--15. " IPRES3P[15:12] ,SYSDMAC1_DEI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRES3P[11:8] ,SYSDMAC1_DEI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRES3P[7:4] ,SYSDMAC1_DEI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRES3P[3:0] ,SYSDMAC1_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40014++0x1 line.word 0x00 "IPRFS3P,Peripheral Interrupt priority register FS3P" bitfld.word 0x00 12.--15. " IPRFS3P[15:12] ,SYSDMAC1_DEI4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRFS3P[11:8] ,SYSDMAC1_DEI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRFS3P[7:4] ,SYSDMAC1_DEI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRFS3P[3:0] ,SYSDMAC1_DEI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40018++0x1 line.word 0x00 "IPRGS3P,Peripheral Interrupt priority register GS3P" bitfld.word 0x00 12.--15. " IPRGS3P[15:12] ,SYSDMAC1_DEI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRGS3P[11:8] ,SYSDMAC1_DEI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRGS3P[7:4] ,SYSDMAC1_DEI10 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRGS3P[3:0] ,SYSDMAC1_DEI11 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4001C++0x1 line.word 0x00 "IPRHS3P,Peripheral Interrupt priority register HS3P" bitfld.word 0x00 12.--15. " IPRHS3P[15:12] ,SYSDMAC1_DEI12 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRHS3P[11:8] ,SYSDMAC1_DEI13 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRHS3P[7:4] ,SYSDMAC1_DEI14 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRHS3P[3:0] ,SYSDMAC1_DEI15 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40020++0x1 line.word 0x00 "IPRIS3P,Peripheral Interrupt priority register IS3P" bitfld.word 0x00 12.--15. " IPRIS3P[15:12] ,ASDMAC0_DEI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRIS3P[11:8] ,ASDMAC0_DEI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRIS3P[7:4] ,ASDMAC0_DEI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRIS3P[3:0] ,ASDMAC0_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40024++0x1 line.word 0x00 "IPRJS3P,Peripheral Interrupt priority register JS3P" bitfld.word 0x00 12.--15. " IPRJS3P[15:12] ,ASDMAC0_DEI4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRJS3P[11:8] ,ASDMAC0_DEI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRJS3P[7:4] ,ASDMAC0_DEI6/ASDMAC0_DEI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40028++0x1 line.word 0x00 "IPRKS3P,Peripheral Interrupt priority register KS3P" bitfld.word 0x00 12.--15. " IPRKS3P[15:12] ,ASDMAC0_DEI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRKS3P[11:8] ,ASDMAC0_DEI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRKS3P[7:4] ,ASDMAC0_DEI10 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRKS3P[3:0] ,ASDMAC0_DEI11 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4002C++0x1 line.word 0x00 "IPRLS3P,Peripheral Interrupt priority register LS3P" bitfld.word 0x00 12.--15. " IPRLS3P[15:12] ,ASDMAC0_DEI12 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRLS3P[11:8] ,ASDMAC0_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40030++0x1 line.word 0x00 "IPRMS3P,Peripheral Interrupt priority register MS3P" bitfld.word 0x00 12.--15. " IPRMS3P[15:12] ,ASDMAC1_DEI0/ASDMAC1_DEI4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRMS3P[11:8] ,ASDMAC1_DEI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRMS3P[7:4] ,ASDMAC1_DEI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRMS3P[3:0] ,ASDMAC1_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40034++0x1 line.word 0x00 "IPRNS3P,Peripheral Interrupt priority register NS3P" bitfld.word 0x00 8.--11. " IPRNS3P[11:8] ,ASDMAC1_DEI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRNS3P[7:4] ,ASDMAC1_DEI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRNS3P[3:0] ,ASDMAC1_DEI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40038++0x1 line.word 0x00 "IPROS3P,Peripheral Interrupt priority register OS3P" bitfld.word 0x00 12.--15. " IPROS3P[15:12] ,ASDMAC1_DEI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPROS3P[11:8] ,ASDMAC1_DEI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPROS3P[7:4] ,ASDMAC1_DEI10 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPROS3P[3:0] ,ASDMAC1_DEI11 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4003C++0x1 line.word 0x00 "IPRPS3P,Peripheral Interrupt priority register PS3P" bitfld.word 0x00 12.--15. " IPRPS3P[15:12] ,ASDMAC1_DEI12 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRPS3P[11:8] ,ASDMAC1_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40040++0x1 line.word 0x00 "IPRQS3P,Peripheral Interrupt priority register QS3P" bitfld.word 0x00 12.--15. " IPRQS3P[15:12] ,SCU7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRQS3P[11:8] ,SCU6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRQS3P[7:4] ,SCU5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRQS3P[3:0] ,SCU4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40044++0x1 line.word 0x00 "IPRRSP3,Peripheral Interrupt priority register RS3P" bitfld.word 0x00 12.--15. " IPRRSP3[15:12] ,SCU3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRRSP3[11:8] ,SCU2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRRSP3[7:4] ,SCU51 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRRSP3[3:0] ,SCU0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40048++0x1 line.word 0x00 "IPRSS3P,Peripheral Interrupt priority register SS3P" bitfld.word 0x00 12.--15. " IPRSS3P[15:12] ,MLM7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRSS3P[11:8] ,MLM6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRSS3P[7:4] ,MLM5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRSS3P[3:0] ,MLM4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4004C++0x1 line.word 0x00 "IPRTS3P,Peripheral Interrupt priority register TS3P" bitfld.word 0x00 12.--15. " IPRTS3P[15:12] ,MLM3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRTS3P[11:8] ,MLM2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRTS3P[7:4] ,MLM1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRTS3P[3:0] ,MLM0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40050++0x1 line.word 0x00 "IPRUS3P,Peripheral Interrupt priority register US3P" bitfld.word 0x00 12.--15. " IPRUS3P[15:12] ,SSI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRUS3P[11:8] ,SSI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRUS3P[7:4] ,SSI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRUS3P[3:0] ,SSI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40054++0x1 line.word 0x00 "IPRVS3P,Peripheral Interrupt priority register VS3P" bitfld.word 0x00 12.--15. " IPRVS3P[15:12] ,SSI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRVS3P[11:8] ,SSI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRVS3P[7:4] ,SSI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRVS3P[3:0] ,SSI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40058++0x1 line.word 0x00 "IPRWS3P,Peripheral Interrupt priority register WS3P" bitfld.word 0x00 12.--15. " IPRWS3P[15:12] ,SCU9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRWS3P[11:8] ,SCU8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRWS3P[7:4] ,SSI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRWS3P[3:0] ,SSI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4005C++0x1 line.word 0x00 "IPRXS3P,Peripheral Interrupt priority register XS3P" bitfld.word 0x00 8.--11. " IPRXS3P[11:8] ,MLP_2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRXS3P[7:4] ,MLP_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRXS3P[3:0] ,MLP_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40060++0x1 line.word 0x00 "IPRYS3P,Peripheral Interrupt priority register YS3P" bitfld.word 0x00 8.--11. " IPRXS3P[11:8] ,SSP1M_4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPRXS3P[7:4] ,SSP1M_3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 0.--3. " IPRXS3P[3:0] ,SSP1M_2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40064++0x1 line.word 0x00 "IPRZS3P,Peripheral Interrupt priority register ZS3P" bitfld.word 0x00 12.--15. " IPRZS3P[15:12] ,SSP1M_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRZS3P[11:8] ,SSP1M_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRZS3P[7:4] ,DTCP1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRZS3P[3:0] ,DTCP0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40068++0x1 line.word 0x00 "IPRAAS3P,Peripheral Interrupt priority register AAS3P" bitfld.word 0x00 12.--15. " IPRAAS3P[15:12] ,SYSDMAC0_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRAAS3P[11:8] ,SYSDMAC1_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRAAS3P[7:4] ," "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRAAS3P[3:0] ," "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4006C++0x1 line.word 0x00 "IPRABS3P,Peripheral Interrupt priority register ABS3P" bitfld.word 0x00 4.--7. " IPRABS3P[7:4] ,IPMMUSY0(S) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRABS3P[3:0] ,IPMMUDS(S) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x200++0x1 line.word 0x00 "IPRE00S,Peripheral Interrupt priority register e00S" bitfld.word 0x00 12.--15. " IPRE00S[15:12] ,IRQ0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE00S[11:8] ,IRQ1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE00S[7:4] ,IRQ2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE00S[3:0] ,IRQ3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x204++0x1 line.word 0x00 "IPRE01S,Peripheral Interrupt priority register e01S" bitfld.word 0x00 12.--15. " IPRE01S[15:12] ,GPIO0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE01S[11:8] ,GPIO1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE01S[7:4] ,GPIO2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE01S[3:0] ,GPIO3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x208++0x1 line.word 0x00 "IPRE02S,Peripheral Interrupt priority register e02S" bitfld.word 0x00 12.--15. " IPRE02S[15:12] ,GPIO4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE02S[11:8] ,GPIO5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x20C++0x1 line.word 0x00 "IPRE03S,Peripheral Interrupt priority register e03S" bitfld.word 0x00 12.--15. " IPRE03S[15:12] ,MTSB0(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE03S[11:8] ,MTSB1(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE03S[7:4] ,MTSB2(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE03S[3:0] ,MTSB3(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x210++0x1 line.word 0x00 "IPRE04S,Peripheral Interrupt priority register e04S" bitfld.word 0x00 12.--15. " IPRE04S[15:12] ,MTSB4(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE04S[11:8] ,MTSB5(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE04S[7:4] ,MTSB6(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE04S[3:0] ,MTSB7(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x214++0x1 line.word 0x00 "IPRE05S,Peripheral Interrupt priority register e05S" bitfld.word 0x00 12.--15. " IPRE05S[15:12] ,MTSB8(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE05S[11:8] ,MTSB9(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE05S[7:4] ,MTSB10(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE05S[3:0] ,MTSB11(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x218++0x1 line.word 0x00 "IPRE06S,Peripheral Interrupt priority register e06S" bitfld.word 0x00 12.--15. " IPRE06S[15:12] ,MTSB12(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE06S[11:8] ,MTSB13(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE06S[7:4] ,MTSB14(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE06S[3:0] ,MTSB15(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x21C++0x1 line.word 0x00 "IPRE07S,Peripheral Interrupt priority register e07S" bitfld.word 0x00 12.--15. " IPRE07S[15:12] ,MTSB16(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE07S[11:8] ,MTSB17(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE07S[7:4] ,MTSB18(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE07S[3:0] ,MTSB19(HS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x220++0x1 line.word 0x00 "IPRE08S,Peripheral Interrupt priority register e08S" bitfld.word 0x00 12.--15. " IPRE08S[15:12] ,MTSB0(LS)" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE08S[11:8] ,MTSB1(LS)" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE08S[7:4] ,MTSB2(LS)" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE08S[3:0] ,MTSB3(LS)" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x224++0x1 line.word 0x00 "IPRE09S,Peripheral Interrupt priority register e09S" bitfld.word 0x00 12.--15. " IPRE09S[15:12] ,MTSB4(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE09S[11:8] ,MTSB5(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE09S[7:4] ,MTSB6(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE09S[3:0] ,MTSB7(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x228++0x1 line.word 0x00 "IPRE10S,Peripheral Interrupt priority register e10S" bitfld.word 0x00 12.--15. " IPRE10S[15:12] ,MTSB8(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE10S[11:8] ,MTSB9(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE10S[7:4] ,MTSB10(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE10S[3:0] ,MTSB11(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x22C++0x1 line.word 0x00 "IPRE11S,Peripheral Interrupt priority register e11S" bitfld.word 0x00 12.--15. " IPRE11S[15:12] ,MTSB12(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE11S[11:8] ,MTSB13(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE11S[7:4] ,MTSB14(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE11S[3:0] ,MTSB15(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x230++0x1 line.word 0x00 "IPRE12S,Peripheral Interrupt priority register e12S" bitfld.word 0x00 12.--15. " IPRE12S[15:12] ,MTSB16(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE12S[11:8] ,MTSB17(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE12S[7:4] ,MTSB18(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE12S[3:0] ,MTSB19(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x234++0x1 line.word 0x00 "IPRE13S,Peripheral Interrupt priority register e13S" bitfld.word 0x00 12.--15. " IPRE13S[15:12] ,MTSB20(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE13S[11:8] ,MTSB21(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE13S[7:4] ,MTSB22(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE13S[3:0] ,MTSB23(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x238++0x1 line.word 0x00 "IPRE14S,Peripheral Interrupt priority register e14S" bitfld.word 0x00 12.--15. " IPRE14S[15:12] ,MTSB24(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE14S[11:8] ,MTSB25(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE14S[7:4] ,MTSB26(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE14S[3:0] ,MTSB27(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x23C++0x1 line.word 0x00 "IPRE15S,Peripheral Interrupt priority register e15S" bitfld.word 0x00 12.--15. " IPRE15S[15:12] ,MTSB28(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPRE15S[11:8] ,MTSB29(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" textline " " bitfld.word 0x00 4.--7. " IPRE15S[7:4] ,MTSB30(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPRE15S[3:0] ,MTSB31(LS) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" tree.end width 11. tree "Peripheral Interrupt Mask Registers" group.byte 0x84++0x0 line.byte 0x00 "IMR1S,Peripheral Interrupt mask register 1S" bitfld.byte 0x00 3. " IMR1S[3] ,SDHIO3 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR1S[2] ,SDHIO2 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR1S[1] ,SDHIO1 Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR1S[0] ,SDHIO0 Interrupt mask" "Not masked,Masked" group.byte 0x88++0x0 line.byte 0x00 "IMR2S,Peripheral Interrupt mask register 2S" bitfld.byte 0x00 7. " IMR2S[7] ,IEBUS Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR2S[4] ,ADI Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR2S[3] ,FSN Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR2S[0] ,GPS Interrupt mask" "Not masked,Masked" group.byte 0x8C++0x0 line.byte 0x00 "IMR3S,Peripheral Interrupt mask register 3S" bitfld.byte 0x00 4. " IMR3S[4] ,2DDM0 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR3S[3] ,DARC Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR3S[2] ,TDBG Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR3S[1] ,Sec Up Timer Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR3S[0] ,Sec Timer Interrupt mask" "Not masked,Masked" group.byte 0x90++0x0 line.byte 0x00 "IMR4S,Peripheral Interrupt mask register 4S" bitfld.byte 0x00 5. " IMR4S[5] ,TPU0 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR4S[4] ,CTI Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR4S[3] ,JPU Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " IMR4S[2] ,SIM Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR4S[1] ,MMC1 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR4S[0] ,MMC0 Interrupt mask" "Not masked,Masked" group.byte 0x94++0x0 line.byte 0x00 "IMR5S,Peripheral Interrupt mask register 5S" bitfld.byte 0x00 3. " IMR5S[3] ,RTDMAC_DEI3/PCIEX_ERR Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR5S[2] ,RTDMAC_DEI2/PCIEX_DMA Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR5S[1] ,RTDMAC_DEI1/PCIEX/PXC Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR5S[0] ,RTDMAC_DEI0/REMOCON Interrupt mask" "Not masked,Masked" group.byte 0x98++0x0 line.byte 0x00 "IMR6S,Peripheral Interrupt mask register 6S" bitfld.byte 0x00 3. " IMR6S[3] ,SGX-3DG Interrupt mask" "Not masked,Masked" group.byte 0x9C++0x0 line.byte 0x00 "IMR7S,Peripheral Interrupt mask register 7S" bitfld.byte 0x00 6. " IMR7S[6] ,TMU1_TUNI2 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR7S[5] ,TMU1_TUNI1 Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR7S[4] ,TMU1_TUNI0 Interrupt mask" "Not masked,Masked" group.byte 0xA0++0x0 line.byte 0x00 "IMR8S,Peripheral Interrupt mask register 8S" bitfld.byte 0x00 2. " IMR8S[2] ,TMU0_TUNI1 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR8S[1] ,TMU0_TUNI2 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR8S[0] ,TMU0_TUNI0 Interrupt mask" "Not masked,Masked" group.byte 0xA4++0x0 line.byte 0x00 "IMR9S,Peripheral Interrupt mask register 9S" bitfld.byte 0x00 7. " IMR9S[7] ,SWDT0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR9S[6] ,RWDT0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR9S[5] ,CMT0_1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR9S[4] ,CMT0_0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR9S[3] ,IIC2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR9S[2] ,IIC1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR9S[1] ,I2C2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR9S[0] ,I2C1 Interrupt Mask" "Not masked,Masked" group.byte 0xA8++0x0 line.byte 0x00 "IMR10S,Peripheral Interrupt mask register 10S" bitfld.byte 0x00 2. " IMR10S[2] ,IPMMU(SYS1)" "Not masked,Masked" bitfld.byte 0x00 1. " IMR10S[1] ,IPMMU(SYS0)" "Not masked,Masked" bitfld.byte 0x00 0. " IMR10S[0] ,IPMMU(DS)" "Not masked,Masked" group.byte 0xAC++0x0 line.byte 0x00 "IMR11S,Peripheral Interrupt mask register 11S" bitfld.byte 0x00 7. " IMR11S[7] ,IIC0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR11S[6] ,I2C0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR11S[5] ,IIC(DVFS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR11S[4] ,I2C3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR11S[2] ,TSIF1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR11S[0] ,TSIF0 Interrupt Mask" "Not masked,Masked" group.byte 0xB0++0x0 line.byte 0x00 "IMR12S,Peripheral Interrupt mask register 12S" bitfld.byte 0x00 1. " IMR12S[1] ,CAN1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR12S[0] ,CAN0 Interrupt Mask" "Not masked,Masked" group.byte 0x30080++0x0 line.byte 0x00 "IMR0S3,Peripheral Interrupt mask register 0S3" bitfld.byte 0x00 7. " IMR0S3[7] ,SCIF0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR0S3[6] ,SCIF1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR0S3[5] ,HSCIF0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR0S3[4] ,HSCIF1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR0S3[3] ,TMU1_TUNI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR0S3[2] ,TMU2_TUNI3 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR0S3[1] ,RTDMAC_ERR Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR0S3[0] ,SYSC Interrupt Mask" "Not masked,Masked" group.byte 0x30084++0x0 line.byte 0x00 "IMR1S3,Peripheral Interrupt mask register 1S3" bitfld.byte 0x00 7. " IMR1S3[7] ,QSPI Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR1S3[6] ,R-GP2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR1S3[5] ,ETHER Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR1S3[4] ,CPGA0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR1S3[3] ,SCIFA0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR1S3[2] ,SCIFA1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR1S3[1] ,SCIFA2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR1S3[0] ,CPGA1 Interrupt Mask" "Not masked,Masked" group.byte 0x30088++0x0 line.byte 0x00 "IMR2S3,Peripheral Interrupt mask register 2S3" bitfld.byte 0x00 7. " IMR2S3[7] ,SCIFB0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR2S3[6] ,SCIFB1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR2S3[5] ,SCIFB2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR2S3[4] ,AVB Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR2S3[3] ,CMT1_0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR2S3[2] ,CMT1_1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR2S3[1] ,CMT1_2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR2S3[0] ,CMT1_3 Interrupt Mask" "Not masked,Masked" group.byte 0x3008C++0x0 line.byte 0x00 "IMR3S3,Peripheral Interrupt mask register 3S3" bitfld.byte 0x00 7. " IMR3S3[7] ,CMT1_4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR3S3[6] ,CMT1_5 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR3S3[5] ,CMT1_6 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR3S3[4] ,CMT1_7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR3S3[3] ,MSOF0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR3S3[2] ,MSOF1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR3S3[1] ,MSOF2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR3S3[0] ,MSOF3 Interrupt Mask" "Not masked,Masked" group.byte 0x30090++0x0 line.byte 0x00 "IMR4S3,Peripheral Interrupt mask register 4S3" bitfld.byte 0x00 7. " IMR4S3[7] ,SATA0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR4S3[6] ,SATA1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR4S3[3] ,USB3.0 HOST Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR4S3[1] ,USB3.0 BC Interrupt Mask" "Not masked,Masked" group.byte 0x30094++0x0 line.byte 0x00 "IMR5S3,Peripheral Interrupt mask register 5S3" bitfld.byte 0x00 7. " IMR5S3[7] ,ADSP Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR5S3[3] ,DU1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR5S3[2] ,DU2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR5S3[1] ,VSP0 Interrupt Mask" "Not masked,Masked" group.byte 0x30098++0x0 line.byte 0x00 "IMR6S3,Peripheral Interrupt mask register 6S3" bitfld.byte 0x00 7. " IMR6S3[7] ,LBSC-WT0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR6S3[6] ,LBSC-ATA Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR6S3[5] ,LBSC-DMAC0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR6S3[4] ,LBSC-DMAC1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR6S3[3] ,LBSC-DMAC2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR6S3[2] ,TMU2_TUNI0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR6S3[1] ,TMU2_TUNI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR6S3[0] ,TMU2_TUNI2 Interrupt Mask" "Not masked,Masked" group.byte 0x3009C++0x0 line.byte 0x00 "IMR7S3,Peripheral Interrupt mask register 7S3" bitfld.byte 0x00 7. " IMR7S3[7] ,MFIS Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR7S3[6] ,CPORTS2R Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR7S3[5] ,TMU3_TUNI0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR7S3[4] ,TMU3_TUNI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR7S3[3] ,TMU3_TUNI2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR7S3[2] ,Thermal Sensor Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR7S3[1] ,CPG Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR7S3[0] ,DRC Interrupt Mask" "Not masked,Masked" group.byte 0x300A0++0x0 line.byte 0x00 "IMR8S3,Peripheral Interrupt mask register 8S3" bitfld.byte 0x00 7. " IMR8S3[7] ,STB Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR8S3[6] ,DU0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR8S3[4] ,VSP1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " IMR8S3[3] ,VSPD0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR8S3[2] ,VSPD1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR8S3[1] ,IMR-LSX0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR8S3[0] ,IMR-LSX1 Interrupt Mask" "Not masked,Masked" group.byte 0x300A4++0x0 line.byte 0x00 "IMR9S3,Peripheral Interrupt mask register 9S3" bitfld.byte 0x00 7. " IMR9S3[7] ,VIN0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR9S3[6] ,VIN1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR9S3[5] ,VIN2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR9S3[4] ,VIN3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR9S3[3] ,IMR-X2_0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR9S3[2] ,IMR-X2_1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR9S3[1] ,IMP-X4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR9S3[0] ,IPMMU_MP Interrupt Mask" "Not masked,Masked" group.byte 0x300A8++0x0 line.byte 0x00 "IMR10S3,Peripheral Interrupt mask register 10S3" bitfld.byte 0x00 7. " IMR10S3[7] ,IPMMU_RT Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR10S3[6] ,IPMMU_M Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR10S3[5] ,FDP0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR10S3[4] ,FDP1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR10S3[3] ,FDP2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR10S3[1] ,VCP1_VINT Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR10S3[0] ,VCP1_CINT Interrupt Mask" "Not masked,Masked" group.byte 0x300AC++0x0 line.byte 0x00 "IMR11S3,Peripheral Interrupt mask register 11S3" bitfld.byte 0x00 5. " IMR11S3[5] ,VCP0_VINT Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR11S3[4] ,VCP0_CINT Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR11S3[3] ,SSP1S_0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " IMR11S3[2] ,SSP1S_1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR11S3[1] ,SSP1S_2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR11S3[0] ,SSP1S_3 Interrupt Mask" "Not masked,Masked" group.byte 0x300B0++0x0 line.byte 0x00 "IMR12S3,Peripheral Interrupt mask register 12S3" bitfld.byte 0x00 7. " IMR12S3[7] ,SSP1S_4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR12S3[6] ,IPMMU_M_SEC Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR12S3[3] ,S3C (Secure) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " IMR12S3[2] ,S3C Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR12S3[1] ,CC5.2_1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR12S3[0] ,CC5.2_0 Interrupt Mask" "Not masked,Masked" group.byte 0x300B4++0x0 line.byte 0x00 "IMR13S3,Peripheral Interrupt mask register 13S3" bitfld.byte 0x00 6. " IMR13S3[6] ,USB DDM Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR13S3[5] ,USB DMAC 0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR13S3[4] ,USB DMAC 1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " IMR13S3[3] ,USB2.0 OTG Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR13S3[2] ,USB2.0 HOST0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR13S3[1] ,USB2.0 HOST1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR13S3[0] ,USB2.0 HOST2 Interrupt Mask" "Not masked,Masked" group.byte 0x300B8++0x0 line.byte 0x00 "IMR14S3,Peripheral Interrupt mask register 14S3" bitfld.byte 0x00 5. " IMR14S3[5] ,AXISTAT_5 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR14S3[4] ,AXISTAT_4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR14S3[3] ,AXISTAT_3 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " IMR14S3[2] ,AXISTAT_2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR14S3[1] ,AXISTAT_1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR14S3[0] ,AXISTAT_0 Interrupt Mask" "Not masked,Masked" group.byte 0x300BC++0x0 line.byte 0x00 "IMR15S3,Peripheral Interrupt mask register 15S3" bitfld.byte 0x00 7. " IMR15S3[7] ,MFIIICR7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR15S3[6] ,MFIIICR6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR15S3[5] ,MFIIICR5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR15S3[4] ,MFIIICR4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR15S3[3] ,MFIIICR3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR15S3[2] ,MFIIICR2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR15S3[1] ,MFIIICR1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR15S3[0] ,MFIIICR0 Interrupt Mask" "Not masked,Masked" group.byte 0x40080++0x0 line.byte 0x00 "IMR0S3P,Peripheral Interrupt mask register 0S3P" bitfld.byte 0x00 7. " IMR0S3P[7] ,SYSDMAC0_DEI0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR0S3P[6] ,SYSDMAC0_DEI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR0S3P[5] ,SYSDMAC0_DEI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR0S3P[4] ,SYSDMAC0_DEI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR0S3P[3] ,SYSDMAC0_DEI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR0S3P[2] ,SYSDMAC0_DEI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR0S3P[1] ,SYSDMAC0_DEI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR0S3P[0] ,SYSDMAC0_DEI7 Interrupt Mask" "Not masked,Masked" group.byte 0x40084++0x0 line.byte 0x00 "IMR1S3P,Peripheral Interrupt mask register 1S3P" bitfld.byte 0x00 7. " IMR1S3P[7] ,SYSDMAC0_DEI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR1S3P[6] ,SYSDMAC0_DEI9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR1S3P[5] ,SYSDMAC0_DEI10 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR1S3P[4] ,SYSDMAC0_DEI11 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR1S3P[3] ,SYSDMAC0_DEI12 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR1S3P[2] ,SYSDMAC0_DEI13 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR1S3P[1] ,SYSDMAC0_DEI14 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR1S3P[0] ,SYSDMAC0_DEI15 Interrupt Mask" "Not masked,Masked" group.byte 0x40088++0x0 line.byte 0x00 "IMR2S3P,Peripheral Interrupt mask register 2S3P" bitfld.byte 0x00 7. " IMR2S3P[7] ,SYSDMAC1_DEI0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR2S3P[6] ,SYSDMAC1_DEI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR2S3P[5] ,SYSDMAC1_DEI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR2S3P[4] ,SYSDMAC1_DEI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR2S3P[3] ,SYSDMAC1_DEI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR2S3P[2] ,SYSDMAC1_DEI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR2S3P[1] ,SYSDMAC1_DEI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR2S3P[0] ,SYSDMAC1_DEI7 Interrupt Mask" "Not masked,Masked" group.byte 0x4008C++0x0 line.byte 0x00 "IMR3S3P,Peripheral Interrupt mask register 3S3P" bitfld.byte 0x00 7. " IMR3S3P[7] ,SYSDMAC1_DEI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR3S3P[6] ,SYSDMAC1_DEI9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR3S3P[5] ,SYSDMAC1_DEI10 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR3S3P[4] ,SYSDMAC1_DEI11 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR3S3P[3] ,SYSDMAC1_DEI12 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR3S3P[2] ,SYSDMAC1_DEI13 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR3S3P[1] ,SYSDMAC1_DEI14 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR3S3P[0] ,SYSDMAC1_DEI15 Interrupt Mask" "Not masked,Masked" group.byte 0x40090++0x0 line.byte 0x00 "IMR4S3P,Peripheral Interrupt mask register 4S3P" bitfld.byte 0x00 7. " IMR4S3P[7] ,ASDMAC0_DEI0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR4S3P[6] ,ASDMAC0_DEI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR4S3P[5] ,ASDMAC0_DEI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR4S3P[4] ,ASDMAC0_DEI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR4S3P[3] ,ASDMAC0_DEI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR4S3P[2] ,ASDMAC0_DEI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR4S3P[1] ,ASDMAC0_DEI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR4S3P[0] ,ASDMAC0_DEI7 Interrupt Mask" "Not masked,Masked" group.byte 0x40094++0x0 line.byte 0x00 "IMR5S3P,Peripheral Interrupt mask register 5S3P" bitfld.byte 0x00 7. " IMR5S3P[7] ,ASDMAC0_DEI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR5S3P[6] ,ASDMAC0_DEI9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR5S3P[5] ,ASDMAC0_DEI10 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR5S3P[4] ,ASDMAC0_DEI11 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR5S3P[3] ,ASDMAC0_DEI12 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR5S3P[2] ,ASDMAC0_ERR Interrupt Mask" "Not masked,Masked" group.byte 0x40098++0x0 line.byte 0x00 "IMR6S3P,Peripheral Interrupt mask register 6S3P" bitfld.byte 0x00 7. " IMR6S3P[7] ,ASDMAC1_DEI0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR6S3P[6] ,ASDMAC1_DEI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR6S3P[5] ,ASDMAC1_DEI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR6S3P[4] ,ASDMAC1_DEI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR6S3P[3] ,ASDMAC1_DEI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR6S3P[2] ,ASDMAC1_DEI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR6S3P[1] ,ASDMAC1_DEI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR6S3P[0] ,ASDMAC1_DEI7 Interrupt Mask" "Not masked,Masked" group.byte 0x4009C++0x0 line.byte 0x00 "IMR7S3P,Peripheral Interrupt mask register 7S3P" bitfld.byte 0x00 7. " IMR7S3P[7] ,ASDMAC1_DEI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR7S3P[6] ,ASDMAC1_DEI9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR7S3P[5] ,ASDMAC1_DEI10 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR7S3P[4] ,ASDMAC1_DEI11 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR7S3P[3] ,ASDMAC1_DEI12 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR7S3P[2] ,ASDMAC1_ERR Interrupt Mask" "Not masked,Masked" group.byte 0x400A0++0x0 line.byte 0x00 "IMR8S3P,Peripheral Interrupt mask register 8S3P" bitfld.byte 0x00 7. " IMR8S3P[7] ,SCU7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR8S3P[6] ,SCU6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR8S3P[5] ,SCU5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR8S3P[4] ,SCU4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR8S3P[3] ,SCU3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR8S3P[2] ,SCU2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR8S3P[1] ,SCU1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR8S3P[0] ,SCU0 Interrupt Mask" "Not masked,Masked" group.byte 0x400A4++0x0 line.byte 0x00 "IMR9S3P,Peripheral Interrupt mask register 9S3P" bitfld.byte 0x00 7. " IMR9S3P[7] ,MLM7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR9S3P[6] ,MLM6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR9S3P[5] ,MLM5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR9S3P[4] ,MLM4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR9S3P[3] ,MLM3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR9S3P[2] ,MLM2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR9S3P[1] ,MLM1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR9S3P[0] ,MLM0 Interrupt Mask" "Not masked,Masked" group.byte 0x400A8++0x0 line.byte 0x00 "IMR10S3P,Peripheral Interrupt mask register 10S3P" bitfld.byte 0x00 7. " IMR10S3P[7] ,SSI7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR10S3P[6] ,SSI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR10S3P[5] ,SSI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR10S3P[4] ,SSI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR10S3P[3] ,SSI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR10S3P[2] ,SSI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR10S3P[1] ,SSI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR10S3P[0] ,SSI0 Interrupt Mask" "Not masked,Masked" group.byte 0x400AC++0x0 line.byte 0x00 "IMR11S3P,Peripheral Interrupt mask register 11S3P" bitfld.byte 0x00 7. " IMR11S3P[7] ,SCU9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR11S3P[6] ,SCU8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR11S3P[5] ,SSI9 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR11S3P[4] ,SSI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR11S3P[2] ,MLP_2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR11S3P[1] ,MLP_1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR11S3P[0] ,MLP_0 Interrupt Mask" "Not masked,Masked" group.byte 0x400B0++0x0 line.byte 0x00 "IMR12S3P,Peripheral Interrupt mask register 12S3P" bitfld.byte 0x00 6. " IMR12S3P[6] ,SSP1M_4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR12S3P[5] ,SSP1M_3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR12S3P[4] ,SSP1M_2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " IMR12S3P[3] ,SSP1M_1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR12S3P[2] ,SSP1M_0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR12S3P[1] ,DTCP1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR12S3P[0] ,DTCP0 Interrupt Mask" "Not masked,Masked" group.byte 0x400B4++0x0 line.byte 0x00 "IMR13S3P,Peripheral Interrupt mask register 13S3P" bitfld.byte 0x00 7. " IMR13S3P[7] ,SYSDMAC0_ERR Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR13S3P[6] ,SYSDMAC1_ERR Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR13S3P[1] ,IPMMUSY0(S) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR13S3P[0] ,IPMMUDS(S) Interrupt Mask" "Not masked,Masked" group.byte 0x280++0x0 line.byte 0x00 "IMRE00S,Peripheral Interrupt mask register e00S" bitfld.byte 0x00 7. " IMRE00S[7] ,GPIO3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE00S[6] ,GPIO2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE00S[5] ,GPIO1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE00S[4] ,GPIO0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMRE00S[3] ,IRQ3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMRE00S[2] ,IRQ2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMRE00S[1] ,IRQ1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE00S[0] ,IRQ0 Interrupt Mask" "Not masked,Masked" group.byte 0x284++0x0 line.byte 0x00 "IMRE01S,Peripheral Interrupt mask register e01S" bitfld.byte 0x00 7. " IMRE01S[7] ,MTSB3 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE01S[6] ,MTSB2 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE01S[5] ,MTSB1 (HS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE01S[4] ,MTSB0 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMRE01S[1] ,GPIO6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE01S[0] ,GPIO5 Interrupt Mask" "Not masked,Masked" group.byte 0x288++0x0 line.byte 0x00 "IMRE02S,Peripheral Interrupt mask register e02S" bitfld.byte 0x00 7. " IMRE02S[7] ,MTSB11 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE02S[6] ,MTSB10 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE02S[5] ,MTSB9 (HS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE02S[4] ,MTSB8 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMRE02S[3] ,MTSB7 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMRE02S[2] ,MTSB6 (HS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMRE02S[1] ,MTSB5 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE02S[0] ,MTSB4 (HS) Interrupt Mask" "Not masked,Masked" group.byte 0x28C++0x0 line.byte 0x00 "IMRE03S,Peripheral Interrupt mask register e03S" bitfld.byte 0x00 7. " IMRE03S[7] ,MTSB19 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE03S[6] ,MTSB18 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE03S[5] ,MTSB17 (HS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE03S[4] ,MTSB16 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMRE03S[3] ,MTSB15 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMRE03S[2] ,MTSB14 (HS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMRE03S[1] ,MTSB13 (HS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE03S[0] ,MTSB12 (HS) Interrupt Mask" "Not masked,Masked" group.byte 0x290++0x0 line.byte 0x00 "IMRE04S,Peripheral Interrupt mask register e04S" bitfld.byte 0x00 7. " IMRE04S[7] ,MTSB7 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE04S[6] ,MTSB6 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE04S[5] ,MTSB5 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE04S[4] ,MTSB4 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMRE04S[3] ,MTSB3 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMRE04S[2] ,MTSB2 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMRE04S[1] ,MTSB1 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE04S[0] ,MTSB0 (LS) Interrupt Mask" "Not masked,Masked" group.byte 0x294++0x0 line.byte 0x00 "IMRE05S,Peripheral Interrupt mask register e05S" bitfld.byte 0x00 7. " IMRE05S[7] ,MTSB15 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE05S[6] ,MTSB14 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE05S[5] ,MTSB13 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE05S[4] ,MTSB12 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMRE05S[3] ,MTSB11 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMRE05S[2] ,MTSB10 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMRE05S[1] ,MTSB9 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE05S[0] ,MTSB8 (LS) Interrupt Mask" "Not masked,Masked" group.byte 0x298++0x0 line.byte 0x00 "IMRE06S,Peripheral Interrupt mask register e06S" bitfld.byte 0x00 7. " IMRE06S[7] ,MTSB23 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE06S[6] ,MTSB22 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE06S[5] ,MTSB21 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE06S[4] ,MTSB20 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMRE06S[3] ,MTSB19 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMRE06S[2] ,MTSB18 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMRE06S[1] ,MTSB17 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE06S[0] ,MTSB16 (LS) Interrupt Mask" "Not masked,Masked" group.byte 0x29C++0x0 line.byte 0x00 "IMRE07S,Peripheral Interrupt mask register e07S" bitfld.byte 0x00 7. " IMRE07S[7] ,MTSB31 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMRE07S[6] ,MTSB30 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMRE07S[5] ,MTSB29 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMRE07S[4] ,MTSB28 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMRE07S[3] ,MTSB27 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMRE07S[2] ,MTSB26 (LS) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMRE07S[1] ,MTSB25 (LS) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMRE07S[0] ,MTSB24 (LS) Interrupt Mask" "Not masked,Masked" tree.end tree "Peripheral Interrupt Mask Clear Registers" wgroup.byte 0xC4++0x0 line.byte 0x00 "IMCR1S,Peripheral Interrupt mask clear register 1S" bitfld.byte 0x00 3. " IMCR1S[3] ,SDHIO3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR1S[2] ,SDHIO2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR1S[1] ,SDHIO1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR1S[0] ,SDHIO0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xC8++0x0 line.byte 0x00 "IMCR2S,Peripheral Interrupt mask clear register 2S" bitfld.byte 0x00 7. " IMCR2S[7] ,IEBUS Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR2S[4] ,ADI Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR2S[3] ,FSN Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR2S[0] ,GPS Interrupt mask clear" "No effect,Clear" wgroup.byte 0xCC++0x0 line.byte 0x00 "IMCR3S,Peripheral Interrupt mask clear register 3S" bitfld.byte 0x00 4. " IMCR3S[4] ,2DDM0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR3S[3] ,DARC Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR3S[2] ,TDBG Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR3S[1] ,Sec Up Timer Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR3S[0] ,Sec Timer Interrupt mask clear" "No effect,Clear" wgroup.byte 0xD0++0x0 line.byte 0x00 "IMCR4S,Peripheral Interrupt mask clear register 4S" bitfld.byte 0x00 5. " IMCR4S[5] ,TPU0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR4S[4] ,CTI Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR4S[3] ,JPU Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 2. " IMCR4S[2] ,SIM Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR4S[1] ,MMC1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR4S[0] ,MMC0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xD4++0x0 line.byte 0x00 "IMCR5S,Peripheral Interrupt mask clear register 5S" bitfld.byte 0x00 3. " IMCR5S[3] ,RTDMAC_DEI3/PCIEX_ERR Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR5S[2] ,RTDMAC_DEI2/PCIEX_DMA Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR5S[1] ,RTDMAC_DEI1/PCIEX/PXC Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR5S[0] ,RTDMAC_DEI0/REMOCON Interrupt mask clear" "No effect,Clear" wgroup.byte 0xD8++0x0 line.byte 0x00 "IMCR6S,Peripheral Interrupt mask clear register 6S" bitfld.byte 0x00 3. " IMCR6S[3] ,SGX-3DG Interrupt mask clear" "No effect,Clear" wgroup.byte 0xDC++0x0 line.byte 0x00 "IMCR7S,Peripheral Interrupt mask clear register 7S" bitfld.byte 0x00 6. " IMCR7S[6] ,TMU1_TUNI2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR7S[5] ,TMU1_TUNI1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR7S[4] ,TMU1_TUNI0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xE0++0x0 line.byte 0x00 "IMCR8S,Peripheral Interrupt mask clear register 8S" bitfld.byte 0x00 2. " IMCR8S[2] ,TMU0_TUNI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR8S[1] ,TMU0_TUNI2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR8S[0] ,TMU0_TUNI0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xE4++0x0 line.byte 0x00 "IMCR9S,Peripheral Interrupt mask clear register 9S" bitfld.byte 0x00 7. " IMCR9S[7] ,SWDT0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR9S[6] ,RWDT0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR9S[5] ,CMT0_1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR9S[4] ,CMT0_0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR9S[3] ,IIC2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR9S[2] ,IIC1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR9S[1] ,I2C2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR9S[0] ,I2C1 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xE8++0x0 line.byte 0x00 "IMCR10S,Peripheral Interrupt mask clear register 10S" bitfld.byte 0x00 2. " IMCR10S[2] ,IPMMU(SYS1)" "Not masked,Masked" bitfld.byte 0x00 1. " IMCR10S[1] ,IPMMU(SYS0)" "Not masked,Masked" bitfld.byte 0x00 0. " IMCR10S[0] ,IPMMU(DS)" "Not masked,Masked" wgroup.byte 0xEC++0x0 line.byte 0x00 "IMCR11S,Peripheral Interrupt mask clear register 11S" bitfld.byte 0x00 7. " IMCR11S[7] ,IIC0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR11S[6] ,I2C0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR11S[5] ,IIC(DVFS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR11S[4] ,I2C3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR11S[2] ,TSIF1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR11S[0] ,TSIF0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xF0++0x0 line.byte 0x00 "IMCR12S,Peripheral Interrupt mask clear register 12S" bitfld.byte 0x00 1. " IMCR12S[1] ,CAN1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR12S[0] ,CAN0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300C0++0x0 line.byte 0x00 "IMCR0S3,Peripheral Interrupt mask clear register 0S3" bitfld.byte 0x00 7. " IMCR0S3[7] ,SCIF0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR0S3[6] ,SCIF1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR0S3[5] ,HSCIF0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR0S3[4] ,HSCIF1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR0S3[3] ,TMU1_TUNI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR0S3[2] ,TMU2_TUNI3 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR0S3[1] ,RTDMAC_ERR Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR0S3[0] ,SYSC Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300C4++0x0 line.byte 0x00 "IMCR1S3,Peripheral Interrupt mask clear register 1S3" bitfld.byte 0x00 7. " IMCR1S3[7] ,QSPI Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR1S3[6] ,R-GP2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR1S3[5] ,ETHER Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR1S3[4] ,CPGA0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR1S3[3] ,SCIFA0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR1S3[2] ,SCIFA1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR1S3[1] ,SCIFA2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR1S3[0] ,CPGA1 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300C8++0x0 line.byte 0x00 "IMCR2S3,Peripheral Interrupt mask clear register 2S3" bitfld.byte 0x00 7. " IMCR2S3[7] ,SCIFB0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR2S3[6] ,SCIFB1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR2S3[5] ,SCIFB2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR2S3[4] ,AVB Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR2S3[3] ,CMT1_0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR2S3[2] ,CMT1_1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR2S3[1] ,CMT1_2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR2S3[0] ,CMT1_3 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300CC++0x0 line.byte 0x00 "IMCR3S3,Peripheral Interrupt mask clear register 3S3" bitfld.byte 0x00 7. " IMCR3S3[7] ,CMT1_4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR3S3[6] ,CMT1_5 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR3S3[5] ,CMT1_6 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR3S3[4] ,CMT1_7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR3S3[3] ,MSOF0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR3S3[2] ,MSOF1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR3S3[1] ,MSOF2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR3S3[0] ,MSOF3 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300D0++0x0 line.byte 0x00 "IMCR4S3,Peripheral Interrupt mask clear register 4S3" bitfld.byte 0x00 7. " IMCR4S3[7] ,SATA0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR4S3[6] ,SATA1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR4S3[3] ,USB3.0 HOST Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR4S3[1] ,USB3.0 BC Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300D4++0x0 line.byte 0x00 "IMCR5S3,Peripheral Interrupt mask clear register 5S3" bitfld.byte 0x00 7. " IMCR5S3[7] ,ADSP Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR5S3[3] ,DU1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR5S3[2] ,DU2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR5S3[1] ,VSP0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300D8++0x0 line.byte 0x00 "IMCR6S3,Peripheral Interrupt mask clear register 6S3" bitfld.byte 0x00 7. " IMCR6S3[7] ,LBSC-WT0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR6S3[6] ,LBSC-ATA Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR6S3[5] ,LBSC-DMAC0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR6S3[4] ,LBSC-DMAC1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR6S3[3] ,LBSC-DMAC2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR6S3[2] ,TMU2_TUNI0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR6S3[1] ,TMU2_TUNI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR6S3[0] ,TMU2_TUNI2 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300DC++0x0 line.byte 0x00 "IMCR7S3,Peripheral Interrupt mask clear register 7S3" bitfld.byte 0x00 7. " IMCR7S3[7] ,MFIS Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR7S3[6] ,CPORTS2R Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR7S3[5] ,TMU3_TUNI0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR7S3[4] ,TMU3_TUNI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR7S3[3] ,TMU3_TUNI2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR7S3[2] ,Thermal Sensor Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR7S3[1] ,CPG Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR7S3[0] ,DRC Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300E0++0x0 line.byte 0x00 "IMCR8S3,Peripheral Interrupt mask clear register 8S3" bitfld.byte 0x00 7. " IMCR8S3[7] ,STB Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR8S3[6] ,DU0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR8S3[4] ,VSP1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 3. " IMCR8S3[3] ,VSPD0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR8S3[2] ,VSPD1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR8S3[1] ,IMR-LSX0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR8S3[0] ,IMR-LSX1 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300E4++0x0 line.byte 0x00 "IMR9S3,Peripheral Interrupt mask clear register 9S3" bitfld.byte 0x00 7. " IMCR9S3[7] ,VIN0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR9S3[6] ,VIN1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR9S3[5] ,VIN2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR9S3[4] ,VIN3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR9S3[3] ,IMR-X2_0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR9S3[2] ,IMR-X2_1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR9S3[1] ,IMP-X4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR9S3[0] ,IPMMU_MP Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300E8++0x0 line.byte 0x00 "IMCR10S3,Peripheral Interrupt mask clear register 10S3" bitfld.byte 0x00 7. " IMCR10S3[7] ,IPMMU_RT Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR10S3[6] ,IPMMU_M Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR10S3[5] ,FDP0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR10S3[4] ,FDP1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR10S3[3] ,FDP2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR10S3[1] ,VCP1_VINT Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR10S3[0] ,VCP1_CINT Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300EC++0x0 line.byte 0x00 "IMCR11S3,Peripheral Interrupt mask clear register 11S3" bitfld.byte 0x00 5. " IMCR11S3[5] ,VCP0_VINT Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR11S3[4] ,VCP0_CINT Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR11S3[3] ,SSP1S_0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 2. " IMCR11S3[2] ,SSP1S_1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR11S3[1] ,SSP1S_2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR11S3[0] ,SSP1S_3 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300F0++0x0 line.byte 0x00 "IMCR12S3,Peripheral Interrupt mask clear register 12S3" bitfld.byte 0x00 7. " IMCR12S3[7] ,SSP1S_4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR12S3[6] ,IPMMU_M_SEC Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR12S3[3] ,S3C (Secure) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 2. " IMCR12S3[2] ,S3C Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR12S3[1] ,CC5.2_1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR12S3[0] ,CC5.2_0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300F4++0x0 line.byte 0x00 "IMCR13S3,Peripheral Interrupt mask clear register 13S3" bitfld.byte 0x00 6. " IMCR13S3[6] ,USB DDM Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR13S3[5] ,USB DMAC 0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR13S3[4] ,USB DMAC 1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 3. " IMCR13S3[3] ,USB2.0 OTG Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR13S3[2] ,USB2.0 HOST0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR13S3[1] ,USB2.0 HOST1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR13S3[0] ,USB2.0 HOST2 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300F8++0x0 line.byte 0x00 "IMCR14S3,Peripheral Interrupt mask clear register 14S3" bitfld.byte 0x00 5. " IMCR14S3[5] ,AXISTAT_5 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR14S3[4] ,AXISTAT_4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR14S3[3] ,AXISTAT_3 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 2. " IMCR14S3[2] ,AXISTAT_2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR14S3[1] ,AXISTAT_1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR14S3[0] ,AXISTAT_0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300FC++0x0 line.byte 0x00 "IMCR15S3,Peripheral Interrupt mask clear register 15S3" bitfld.byte 0x00 7. " IMCR15S3[7] ,MFIIICR7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR15S3[6] ,MFIIICR6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR15S3[5] ,MFIIICR5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR15S3[4] ,MFIIICR4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR15S3[3] ,MFIIICR3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR15S3[2] ,MFIIICR2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR15S3[1] ,MFIIICR1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR15S3[0] ,MFIIICR0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400C0++0x0 line.byte 0x00 "IMCR0S3P,Peripheral Interrupt mask clear register 0S3P" bitfld.byte 0x00 7. " IMCR0S3P[7] ,SYSDMAC0_DEI0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR0S3P[6] ,SYSDMAC0_DEI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR0S3P[5] ,SYSDMAC0_DEI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR0S3P[4] ,SYSDMAC0_DEI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR0S3P[3] ,SYSDMAC0_DEI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR0S3P[2] ,SYSDMAC0_DEI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR0S3P[1] ,SYSDMAC0_DEI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR0S3P[0] ,SYSDMAC0_DEI7 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400C4++0x0 line.byte 0x00 "IMCR1S3P,Peripheral Interrupt mask clear register 1S3P" bitfld.byte 0x00 7. " IMCR1S3P[7] ,SYSDMAC0_DEI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR1S3P[6] ,SYSDMAC0_DEI9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR1S3P[5] ,SYSDMAC0_DEI10 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR1S3P[4] ,SYSDMAC0_DEI11 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR1S3P[3] ,SYSDMAC0_DEI12 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR1S3P[2] ,SYSDMAC0_DEI13 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR1S3P[1] ,SYSDMAC0_DEI14 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR1S3P[0] ,SYSDMAC0_DEI15 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400C8++0x0 line.byte 0x00 "IMCR2S3P,Peripheral Interrupt mask clear register 2S3P" bitfld.byte 0x00 7. " IMCR2S3P[7] ,SYSDMAC1_DEI0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR2S3P[6] ,SYSDMAC1_DEI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR2S3P[5] ,SYSDMAC1_DEI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR2S3P[4] ,SYSDMAC1_DEI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR2S3P[3] ,SYSDMAC1_DEI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR2S3P[2] ,SYSDMAC1_DEI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR2S3P[1] ,SYSDMAC1_DEI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR2S3P[0] ,SYSDMAC1_DEI7 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400CC++0x0 line.byte 0x00 "IMCR3S3P,Peripheral Interrupt mask clear register 3S3P" bitfld.byte 0x00 7. " IMCR3S3P[7] ,SYSDMAC1_DEI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR3S3P[6] ,SYSDMAC1_DEI9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR3S3P[5] ,SYSDMAC1_DEI10 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR3S3P[4] ,SYSDMAC1_DEI11 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR3S3P[3] ,SYSDMAC1_DEI12 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR3S3P[2] ,SYSDMAC1_DEI13 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR3S3P[1] ,SYSDMAC1_DEI14 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR3S3P[0] ,SYSDMAC1_DEI15 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400D0++0x0 line.byte 0x00 "IMCR4S3P,Peripheral Interrupt mask clear register 4S3P" bitfld.byte 0x00 7. " IMCR4S3P[7] ,ASDMAC0_DEI0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR4S3P[6] ,ASDMAC0_DEI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR4S3P[5] ,ASDMAC0_DEI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR4S3P[4] ,ASDMAC0_DEI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR4S3P[3] ,ASDMAC0_DEI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR4S3P[2] ,ASDMAC0_DEI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR4S3P[1] ,ASDMAC0_DEI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR4S3P[0] ,ASDMAC0_DEI7 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400D4++0x0 line.byte 0x00 "IMCR5S3P,Peripheral Interrupt mask clear register 5S3P" bitfld.byte 0x00 7. " IMCR5S3P[7] ,ASDMAC0_DEI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR5S3P[6] ,ASDMAC0_DEI9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR5S3P[5] ,ASDMAC0_DEI10 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR5S3P[4] ,ASDMAC0_DEI11 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR5S3P[3] ,ASDMAC0_DEI12 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR5S3P[2] ,ASDMAC0_ERR Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400D8++0x0 line.byte 0x00 "IMCR6S3P,Peripheral Interrupt mask clear register 6S3P" bitfld.byte 0x00 7. " IMCR6S3P[7] ,ASDMAC1_DEI0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR6S3P[6] ,ASDMAC1_DEI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR6S3P[5] ,ASDMAC1_DEI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR6S3P[4] ,ASDMAC1_DEI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR6S3P[3] ,ASDMAC1_DEI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR6S3P[2] ,ASDMAC1_DEI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR6S3P[1] ,ASDMAC1_DEI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR6S3P[0] ,ASDMAC1_DEI7 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400DC++0x0 line.byte 0x00 "IMCR7S3P,Peripheral Interrupt mask clear register 7S3P" bitfld.byte 0x00 7. " IMCR7S3P[7] ,ASDMAC1_DEI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR7S3P[6] ,ASDMAC1_DEI9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR7S3P[5] ,ASDMAC1_DEI10 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR7S3P[4] ,ASDMAC1_DEI11 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR7S3P[3] ,ASDMAC1_DEI12 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR7S3P[2] ,ASDMAC1_ERR Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400E0++0x0 line.byte 0x00 "IMCR8S3P,Peripheral Interrupt mask clear register 8S3P" bitfld.byte 0x00 7. " IMCR8S3P[7] ,SCU7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR8S3P[6] ,SCU6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR8S3P[5] ,SCU5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR8S3P[4] ,SCU4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR8S3P[3] ,SCU3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR8S3P[2] ,SCU2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR8S3P[1] ,SCU1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR8S3P[0] ,SCU0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400E4++0x0 line.byte 0x00 "IMCR9S3P,Peripheral Interrupt mask clear register 9S3P" bitfld.byte 0x00 7. " IMCR9S3P[7] ,MLM7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR9S3P[6] ,MLM6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR9S3P[5] ,MLM5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR9S3P[4] ,MLM4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR9S3P[3] ,MLM3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR9S3P[2] ,MLM2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR9S3P[1] ,MLM1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR9S3P[0] ,MLM0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400E8++0x0 line.byte 0x00 "IMCR10S3P,Peripheral Interrupt mask clear register 10S3P" bitfld.byte 0x00 7. " IMCR10S3P[7] ,SSI7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR10S3P[6] ,SSI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR10S3P[5] ,SSI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR10S3P[4] ,SSI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR10S3P[3] ,SSI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR10S3P[2] ,SSI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR10S3P[1] ,SSI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR10S3P[0] ,SSI0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400EC++0x0 line.byte 0x00 "IMCR11S3P,Peripheral Interrupt mask clear register 11S3P" bitfld.byte 0x00 7. " IMCR11S3P[7] ,SCU9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR11S3P[6] ,SCU8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR11S3P[5] ,SSI9 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR11S3P[4] ,SSI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR11S3P[2] ,MLP_2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR11S3P[1] ,MLP_1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR11S3P[0] ,MLP_0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400F0++0x0 line.byte 0x00 "IMCR12S3P,Peripheral Interrupt mask clear register 12S3P" bitfld.byte 0x00 6. " IMCR12S3P[6] ,SSP1M_4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR12S3P[5] ,SSP1M_3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR12S3P[4] ,SSP1M_2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 3. " IMCR12S3P[3] ,SSP1M_1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR12S3P[2] ,SSP1M_0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR12S3P[1] ,DTCP1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR12S3P[0] ,DTCP0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400F4++0x0 line.byte 0x00 "IMCR13S3P,Peripheral Interrupt mask clear register 13S3P" bitfld.byte 0x00 7. " IMCR13S3P[7] ,SYSDMAC0_ERR Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR13S3P[6] ,SYSDMAC1_ERR Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR13S3P[1] ,IPMMUSY0(S) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR13S3P[0] ,IPMMUDS(S) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2C0++0x0 line.byte 0x00 "IMCRE00S,Peripheral Interrupt mask clear register e00S" bitfld.byte 0x00 7. " IMCRE00S[7] ,GPIO3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE00S[6] ,GPIO2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE00S[5] ,GPIO1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE00S[4] ,GPIO0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCRE00S[3] ,IRQ3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCRE00S[2] ,IRQ2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCRE00S[1] ,IRQ1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE00S[0] ,IRQ0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2C4++0x0 line.byte 0x00 "IMCRE01S,Peripheral Interrupt mask clear register e01S" bitfld.byte 0x00 7. " IMCRE01S[7] ,MTSB3 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE01S[6] ,MTSB2 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE01S[5] ,MTSB1 (HS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE01S[4] ,MTSB0 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCRE01S[1] ,GPIO6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE01S[0] ,GPIO5 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2C8++0x0 line.byte 0x00 "IMCRE02S,Peripheral Interrupt mask clear register e02S" bitfld.byte 0x00 7. " IMCRE02S[7] ,MTSB11 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE02S[6] ,MTSB10 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE02S[5] ,MTSB9 (HS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE02S[4] ,MTSB8 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCRE02S[3] ,MTSB7 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCRE02S[2] ,MTSB6 (HS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCRE02S[1] ,MTSB5 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE02S[0] ,MTSB4 (HS) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2CC++0x0 line.byte 0x00 "IMCRE03S,Peripheral Interrupt mask clear register e03S" bitfld.byte 0x00 7. " IMCRE03S[7] ,MTSB19 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE03S[6] ,MTSB18 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE03S[5] ,MTSB17 (HS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE03S[4] ,MTSB16 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCRE03S[3] ,MTSB15 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCRE03S[2] ,MTSB14 (HS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCRE03S[1] ,MTSB13 (HS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE03S[0] ,MTSB12 (HS) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2D0++0x0 line.byte 0x00 "IMCRE04S,Peripheral Interrupt mask clear register e04S" bitfld.byte 0x00 7. " IMCRE04S[7] ,MTSB7 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE04S[6] ,MTSB6 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE04S[5] ,MTSB5 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE04S[4] ,MTSB4 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCRE04S[3] ,MTSB3 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCRE04S[2] ,MTSB2 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCRE04S[1] ,MTSB1 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE04S[0] ,MTSB0 (LS) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2D4++0x0 line.byte 0x00 "IMCRE05S,Peripheral Interrupt mask clear register e05S" bitfld.byte 0x00 7. " IMCRE05S[7] ,MTSB15 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE05S[6] ,MTSB14 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE05S[5] ,MTSB13 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE05S[4] ,MTSB12 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCRE05S[3] ,MTSB11 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCRE05S[2] ,MTSB10 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCRE05S[1] ,MTSB9 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE05S[0] ,MTSB8 (LS) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2D8++0x0 line.byte 0x00 "IMCRE06S,Peripheral Interrupt mask clear register e06S" bitfld.byte 0x00 7. " IMCRE06S[7] ,MTSB23 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE06S[6] ,MTSB22 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE06S[5] ,MTSB21 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE06S[4] ,MTSB20 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCRE06S[3] ,MTSB19 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCRE06S[2] ,MTSB18 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCRE06S[1] ,MTSB17 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE06S[0] ,MTSB16 (LS) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2DC++0x0 line.byte 0x00 "IMCRE07S,Peripheral Interrupt mask clear register e07S" bitfld.byte 0x00 7. " IMCRE07S[7] ,MTSB31 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCRE07S[6] ,MTSB30 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCRE07S[5] ,MTSB29 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCRE07S[4] ,MTSB28 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCRE07S[3] ,MTSB27 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCRE07S[2] ,MTSB26 (LS) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCRE07S[1] ,MTSB25 (LS) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCRE07S[0] ,MTSB24 (LS) Interrupt mask clear" "No effect,Clear" tree.end width 12. group.long 0x20000++0x3 line.long 0x00 "USERIMASKS,User interrupt mask level register S" bitfld.long 0x00 4.--7. " UIMASKS ,User Interrupt Mask Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x100++0x3 line.long 0x00 "INTEVTSA,AP-System core indyvidual interrupt source register" group.word 0x104++0x1 line.word 0x00 "INTAMASK,INTAMASK" width 0xB tree.end tree "MFIS (Multifunctional Interface)" base ad:0xE6260000 width 11. group.long 0xC0++0x7 line.long 0x00 "MFISLCKR0,MFIS Lock Register 0" bitfld.long 0x00 0. " LCK ,Mutex Control" "Not acquired/Release,Acquired/Forbidden" line.long 0x04 "MFISLCKR1,MFIS Lock Register 1" bitfld.long 0x04 0. " LCK ,Mutex Control" "Not acquired/Release,Acquired/Forbidden" sif cpuis("R8A77940") group.long 0x110++0x7 line.long 0x00 "MFISIICR0,MFIS CPU Communication Control Register 0 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR0,MFIS CPU Communication Control Register 0 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x118++0x7 line.long 0x00 "MFISIICR1,MFIS CPU Communication Control Register 1 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR1,MFIS CPU Communication Control Register 1 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" else group.long 0x110++0x7 line.long 0x00 "MFISIICR0,MFIS CPU Communication Control Register 0 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR0,MFIS CPU Communication Control Register 0 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x118++0x7 line.long 0x00 "MFISIICR1,MFIS CPU Communication Control Register 1 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR1,MFIS CPU Communication Control Register 1 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x120++0x7 line.long 0x00 "MFISIICR2,MFIS CPU Communication Control Register 2 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR2,MFIS CPU Communication Control Register 2 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x128++0x7 line.long 0x00 "MFISIICR3,MFIS CPU Communication Control Register 3 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR3,MFIS CPU Communication Control Register 3 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x130++0x7 line.long 0x00 "MFISIICR4,MFIS CPU Communication Control Register 4 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR4,MFIS CPU Communication Control Register 4 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x138++0x7 line.long 0x00 "MFISIICR5,MFIS CPU Communication Control Register 5 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR5,MFIS CPU Communication Control Register 5 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x140++0x7 line.long 0x00 "MFISIICR6,MFIS CPU Communication Control Register 6 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR6,MFIS CPU Communication Control Register 6 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x148++0x7 line.long 0x00 "MFISIICR7,MFIS CPU Communication Control Register 7 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR7,MFIS CPU Communication Control Register 7 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" endif sif cpuis("R8A77940") group.long 0x160++0x3F line.long 0x0 "MFISIMBR0,MFIS CPU Communication Message Register 0 (ARM->SH-4A)" line.long 0x4 "MFISIMBR1,MFIS CPU Communication Message Register 1 (ARM->SH-4A)" line.long 0x20 "MFISEMBR0,MFIS CPU Communication Message Register 0 (SH-4A->ARM)" line.long 0x24 "MFISEMBR1,MFIS CPU Communication Message Register 1 (SH-4A->ARM)" else group.long 0x160++0x3F line.long 0x0 "MFISIMBR0,MFIS CPU Communication Message Register 0 (ARM->SH-4A)" line.long 0x4 "MFISIMBR1,MFIS CPU Communication Message Register 1 (ARM->SH-4A)" line.long 0x8 "MFISIMBR2,MFIS CPU Communication Message Register 2 (ARM->SH-4A)" line.long 0xC "MFISIMBR3,MFIS CPU Communication Message Register 3 (ARM->SH-4A)" line.long 0x10 "MFISIMBR4,MFIS CPU Communication Message Register 4 (ARM->SH-4A)" line.long 0x14 "MFISIMBR5,MFIS CPU Communication Message Register 5 (ARM->SH-4A)" line.long 0x18 "MFISIMBR6,MFIS CPU Communication Message Register 6 (ARM->SH-4A)" line.long 0x1C "MFISIMBR7,MFIS CPU Communication Message Register 7 (ARM->SH-4A)" line.long 0x20 "MFISEMBR0,MFIS CPU Communication Message Register 0 (SH-4A->ARM)" line.long 0x24 "MFISEMBR1,MFIS CPU Communication Message Register 1 (SH-4A->ARM)" line.long 0x28 "MFISEMBR2,MFIS CPU Communication Message Register 2 (SH-4A->ARM)" line.long 0x2C "MFISEMBR3,MFIS CPU Communication Message Register 3 (SH-4A->ARM)" line.long 0x30 "MFISEMBR4,MFIS CPU Communication Message Register 4 (SH-4A->ARM)" line.long 0x34 "MFISEMBR5,MFIS CPU Communication Message Register 5 (SH-4A->ARM)" line.long 0x38 "MFISEMBR6,MFIS CPU Communication Message Register 6 (SH-4A->ARM)" line.long 0x3C "MFISEMBR7,MFIS CPU Communication Message Register 7 (SH-4A->ARM)" endif width 0xB tree.end tree.open "IPMMU" tree "IPMMUSY0" base ad:0xE6280000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6280000+0x0))&0x8)==0x8) group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "IMCAAR0,MMU CCI Address Allocation Register 0" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x0+0x0C)++0x3 line.long 0x00 "IMBUSCR0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR0,Both" group.long (0x0+0x08)++0x3 line.long 0x00 "IMTTBCR0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x3 line.long 0x00 "IMTTUBR00,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x10)++0x3 line.long 0x00 "IMTTLBR00,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x3 line.long 0x00 "IMTTUBR10,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x18)++0x3 line.long 0x00 "IMTTLBR10,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x28)++0x7 line.long 0x00 "IMMAIR00,Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR10,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x0+0x28)++0x7 line.long 0x00 "PRRR0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x0+0x20)++0x3 line.long 0x00 "IMSTR0,MMU Error Status Register 0" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x0+0x30)++0x3 line.long 0x00 "IMEAR0,MMU Error Address Register 0" if (((per.l(ad:0xE6280000+0x40))&0x8)==0x8) group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x40+0x04)++0x3 line.long 0x00 "IMCAAR1,MMU CCI Address Allocation Register 1" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x40+0x0C)++0x3 line.long 0x00 "IMBUSCR1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR1,Both" group.long (0x40+0x08)++0x3 line.long 0x00 "IMTTBCR1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x3 line.long 0x00 "IMTTUBR01,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x10)++0x3 line.long 0x00 "IMTTLBR01,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x3 line.long 0x00 "IMTTUBR11,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x18)++0x3 line.long 0x00 "IMTTLBR11,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x28)++0x7 line.long 0x00 "IMMAIR01,Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR11,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x40+0x28)++0x7 line.long 0x00 "PRRR1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x40+0x20)++0x3 line.long 0x00 "IMSTR1,MMU Error Status Register 1" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x40+0x30)++0x3 line.long 0x00 "IMEAR1,MMU Error Address Register 1" if (((per.l(ad:0xE6280000+0x80))&0x8)==0x8) group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x80+0x04)++0x3 line.long 0x00 "IMCAAR2,MMU CCI Address Allocation Register 2" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x80+0x0C)++0x3 line.long 0x00 "IMBUSCR2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR2,Both" group.long (0x80+0x08)++0x3 line.long 0x00 "IMTTBCR2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x3 line.long 0x00 "IMTTUBR02,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x10)++0x3 line.long 0x00 "IMTTLBR02,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x3 line.long 0x00 "IMTTUBR12,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x18)++0x3 line.long 0x00 "IMTTLBR12,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x28)++0x7 line.long 0x00 "IMMAIR02,Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR12,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x80+0x28)++0x7 line.long 0x00 "PRRR2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x80+0x20)++0x3 line.long 0x00 "IMSTR2,MMU Error Status Register 2" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x80+0x30)++0x3 line.long 0x00 "IMEAR2,MMU Error Address Register 2" if (((per.l(ad:0xE6280000+0xC0))&0x8)==0x8) group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0xC0+0x04)++0x3 line.long 0x00 "IMCAAR3,MMU CCI Address Allocation Register 3" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0xC0+0x0C)++0x3 line.long 0x00 "IMBUSCR3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR3,Both" group.long (0xC0+0x08)++0x3 line.long 0x00 "IMTTBCR3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x3 line.long 0x00 "IMTTUBR03,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x10)++0x3 line.long 0x00 "IMTTLBR03,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x3 line.long 0x00 "IMTTUBR13,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x18)++0x3 line.long 0x00 "IMTTLBR13,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x28)++0x7 line.long 0x00 "IMMAIR03,Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR13,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0xC0+0x28)++0x7 line.long 0x00 "PRRR3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0xC0+0x20)++0x3 line.long 0x00 "IMSTR3,MMU Error Status Register 3" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0xC0+0x30)++0x3 line.long 0x00 "IMEAR3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x3 line.long 0x00 "IMPCTR,PMB Control Register" bitfld.long 0x00 4.--5. " TTSEL ,Translation Table Select" "0,1,2,3" bitfld.long 0x00 3. " TTEN ,TLB Translation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PMBEN ,PMB Enable" "Disabled,Enabled" if (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x00) // IMPMBD0[SZ] == 0x00 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x80) // IMPMBD0[SZ] == 0x80 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x10) // IMPMBD0[SZ] == 0x10 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD0[SZ] == 0x90 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x00) // IMPMBD1[SZ] == 0x00 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x80) // IMPMBD1[SZ] == 0x80 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x10) // IMPMBD1[SZ] == 0x10 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD1[SZ] == 0x90 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x00) // IMPMBD2[SZ] == 0x00 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x80) // IMPMBD2[SZ] == 0x80 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x10) // IMPMBD2[SZ] == 0x10 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD2[SZ] == 0x90 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x00) // IMPMBD3[SZ] == 0x00 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x80) // IMPMBD3[SZ] == 0x80 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x10) // IMPMBD3[SZ] == 0x10 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD3[SZ] == 0x90 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x00) // IMPMBD4[SZ] == 0x00 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x80) // IMPMBD4[SZ] == 0x80 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x10) // IMPMBD4[SZ] == 0x10 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD4[SZ] == 0x90 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x00) // IMPMBD5[SZ] == 0x00 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x80) // IMPMBD5[SZ] == 0x80 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x10) // IMPMBD5[SZ] == 0x10 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD5[SZ] == 0x90 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x00) // IMPMBD6[SZ] == 0x00 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x80) // IMPMBD6[SZ] == 0x80 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x10) // IMPMBD6[SZ] == 0x10 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD6[SZ] == 0x90 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x00) // IMPMBD7[SZ] == 0x00 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x80) // IMPMBD7[SZ] == 0x80 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x10) // IMPMBD7[SZ] == 0x10 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD7[SZ] == 0x90 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x00) // IMPMBD8[SZ] == 0x00 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x80) // IMPMBD8[SZ] == 0x80 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x10) // IMPMBD8[SZ] == 0x10 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD8[SZ] == 0x90 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x00) // IMPMBD9[SZ] == 0x00 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x80) // IMPMBD9[SZ] == 0x80 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x10) // IMPMBD9[SZ] == 0x10 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD9[SZ] == 0x90 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x00) // IMPMBD10[SZ] == 0x00 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x80) // IMPMBD10[SZ] == 0x80 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x10) // IMPMBD10[SZ] == 0x10 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD10[SZ] == 0x90 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x00) // IMPMBD11[SZ] == 0x00 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x80) // IMPMBD11[SZ] == 0x80 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x10) // IMPMBD11[SZ] == 0x10 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD11[SZ] == 0x90 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x00) // IMPMBD12[SZ] == 0x00 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x80) // IMPMBD12[SZ] == 0x80 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x10) // IMPMBD12[SZ] == 0x10 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD12[SZ] == 0x90 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x00) // IMPMBD13[SZ] == 0x00 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x80) // IMPMBD13[SZ] == 0x80 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x10) // IMPMBD13[SZ] == 0x10 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD13[SZ] == 0x90 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x00) // IMPMBD14[SZ] == 0x00 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x80) // IMPMBD14[SZ] == 0x80 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x10) // IMPMBD14[SZ] == 0x10 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD14[SZ] == 0x90 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x00) // IMPMBD15[SZ] == 0x00 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x80) // IMPMBD15[SZ] == 0x80 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x10) // IMPMBD15[SZ] == 0x10 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD15[SZ] == 0x90 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x3 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long 0x20C++0x3 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x3 line.long 0x00 "IMUCTR0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x300+0x08)++0x3 line.long 0x00 "IMUASID0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x310++0x3 line.long 0x00 "IMUCTR1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x310+0x08)++0x3 line.long 0x00 "IMUASID1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x320++0x3 line.long 0x00 "IMUCTR2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x320+0x08)++0x3 line.long 0x00 "IMUASID2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x330++0x3 line.long 0x00 "IMUCTR3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x330+0x08)++0x3 line.long 0x00 "IMUASID3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x340++0x3 line.long 0x00 "IMUCTR4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x340+0x08)++0x3 line.long 0x00 "IMUASID4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x350++0x3 line.long 0x00 "IMUCTR5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x350+0x08)++0x3 line.long 0x00 "IMUASID5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x360++0x3 line.long 0x00 "IMUCTR6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x360+0x08)++0x3 line.long 0x00 "IMUASID6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x370++0x3 line.long 0x00 "IMUCTR7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x370+0x08)++0x3 line.long 0x00 "IMUASID7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x380++0x3 line.long 0x00 "IMUCTR8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x380+0x08)++0x3 line.long 0x00 "IMUASID8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x390++0x3 line.long 0x00 "IMUCTR9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x390+0x08)++0x3 line.long 0x00 "IMUASID9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3A0++0x3 line.long 0x00 "IMUCTR10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x3 line.long 0x00 "IMUASID10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3B0++0x3 line.long 0x00 "IMUCTR11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x3 line.long 0x00 "IMUASID11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3C0++0x3 line.long 0x00 "IMUCTR12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x3 line.long 0x00 "IMUASID12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3D0++0x3 line.long 0x00 "IMUCTR13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x3 line.long 0x00 "IMUASID13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3E0++0x3 line.long 0x00 "IMUCTR14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x3 line.long 0x00 "IMUASID14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3F0++0x3 line.long 0x00 "IMUCTR15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x3 line.long 0x00 "IMUASID15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x400++0x3 line.long 0x00 "IMUCTR16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x400+0x08)++0x3 line.long 0x00 "IMUASID16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x410++0x3 line.long 0x00 "IMUCTR17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x410+0x08)++0x3 line.long 0x00 "IMUASID17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x420++0x3 line.long 0x00 "IMUCTR18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x420+0x08)++0x3 line.long 0x00 "IMUASID18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x430++0x3 line.long 0x00 "IMUCTR19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x430+0x08)++0x3 line.long 0x00 "IMUASID19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x440++0x3 line.long 0x00 "IMUCTR20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x440+0x08)++0x3 line.long 0x00 "IMUASID20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x450++0x3 line.long 0x00 "IMUCTR21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x450+0x08)++0x3 line.long 0x00 "IMUASID21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x460++0x3 line.long 0x00 "IMUCTR22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x460+0x08)++0x3 line.long 0x00 "IMUASID22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x470++0x3 line.long 0x00 "IMUCTR23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x470+0x08)++0x3 line.long 0x00 "IMUASID23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x480++0x3 line.long 0x00 "IMUCTR24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x480+0x08)++0x3 line.long 0x00 "IMUASID24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x490++0x3 line.long 0x00 "IMUCTR25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x490+0x08)++0x3 line.long 0x00 "IMUASID25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4A0++0x3 line.long 0x00 "IMUCTR26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x3 line.long 0x00 "IMUASID26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4B0++0x3 line.long 0x00 "IMUCTR27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x3 line.long 0x00 "IMUASID27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4C0++0x3 line.long 0x00 "IMUCTR28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x3 line.long 0x00 "IMUASID28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4D0++0x3 line.long 0x00 "IMUCTR29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x3 line.long 0x00 "IMUASID29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4E0++0x3 line.long 0x00 "IMUCTR30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x3 line.long 0x00 "IMUASID30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4F0++0x3 line.long 0x00 "IMUCTR31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x3 line.long 0x00 "IMUASID31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" tree.end width 0xB tree.end tree "IPMMUSY1" base ad:0xE6290000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6290000+0x0))&0x8)==0x8) group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "IMCAAR0,MMU CCI Address Allocation Register 0" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x0+0x0C)++0x3 line.long 0x00 "IMBUSCR0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR0,Both" group.long (0x0+0x08)++0x3 line.long 0x00 "IMTTBCR0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x3 line.long 0x00 "IMTTUBR00,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x10)++0x3 line.long 0x00 "IMTTLBR00,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x3 line.long 0x00 "IMTTUBR10,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x18)++0x3 line.long 0x00 "IMTTLBR10,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x28)++0x7 line.long 0x00 "IMMAIR00,Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR10,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x0+0x28)++0x7 line.long 0x00 "PRRR0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x0+0x20)++0x3 line.long 0x00 "IMSTR0,MMU Error Status Register 0" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x0+0x30)++0x3 line.long 0x00 "IMEAR0,MMU Error Address Register 0" if (((per.l(ad:0xE6290000+0x40))&0x8)==0x8) group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x40+0x04)++0x3 line.long 0x00 "IMCAAR1,MMU CCI Address Allocation Register 1" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x40+0x0C)++0x3 line.long 0x00 "IMBUSCR1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR1,Both" group.long (0x40+0x08)++0x3 line.long 0x00 "IMTTBCR1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x3 line.long 0x00 "IMTTUBR01,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x10)++0x3 line.long 0x00 "IMTTLBR01,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x3 line.long 0x00 "IMTTUBR11,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x18)++0x3 line.long 0x00 "IMTTLBR11,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x28)++0x7 line.long 0x00 "IMMAIR01,Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR11,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x40+0x28)++0x7 line.long 0x00 "PRRR1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x40+0x20)++0x3 line.long 0x00 "IMSTR1,MMU Error Status Register 1" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x40+0x30)++0x3 line.long 0x00 "IMEAR1,MMU Error Address Register 1" if (((per.l(ad:0xE6290000+0x80))&0x8)==0x8) group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x80+0x04)++0x3 line.long 0x00 "IMCAAR2,MMU CCI Address Allocation Register 2" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x80+0x0C)++0x3 line.long 0x00 "IMBUSCR2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR2,Both" group.long (0x80+0x08)++0x3 line.long 0x00 "IMTTBCR2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x3 line.long 0x00 "IMTTUBR02,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x10)++0x3 line.long 0x00 "IMTTLBR02,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x3 line.long 0x00 "IMTTUBR12,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x18)++0x3 line.long 0x00 "IMTTLBR12,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x28)++0x7 line.long 0x00 "IMMAIR02,Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR12,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x80+0x28)++0x7 line.long 0x00 "PRRR2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x80+0x20)++0x3 line.long 0x00 "IMSTR2,MMU Error Status Register 2" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x80+0x30)++0x3 line.long 0x00 "IMEAR2,MMU Error Address Register 2" if (((per.l(ad:0xE6290000+0xC0))&0x8)==0x8) group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0xC0+0x04)++0x3 line.long 0x00 "IMCAAR3,MMU CCI Address Allocation Register 3" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0xC0+0x0C)++0x3 line.long 0x00 "IMBUSCR3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR3,Both" group.long (0xC0+0x08)++0x3 line.long 0x00 "IMTTBCR3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x3 line.long 0x00 "IMTTUBR03,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x10)++0x3 line.long 0x00 "IMTTLBR03,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x3 line.long 0x00 "IMTTUBR13,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x18)++0x3 line.long 0x00 "IMTTLBR13,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x28)++0x7 line.long 0x00 "IMMAIR03,Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR13,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0xC0+0x28)++0x7 line.long 0x00 "PRRR3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0xC0+0x20)++0x3 line.long 0x00 "IMSTR3,MMU Error Status Register 3" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0xC0+0x30)++0x3 line.long 0x00 "IMEAR3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x3 line.long 0x00 "IMPCTR,PMB Control Register" bitfld.long 0x00 4.--5. " TTSEL ,Translation Table Select" "0,1,2,3" bitfld.long 0x00 3. " TTEN ,TLB Translation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PMBEN ,PMB Enable" "Disabled,Enabled" if (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x00) // IMPMBD0[SZ] == 0x00 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x80) // IMPMBD0[SZ] == 0x80 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x10) // IMPMBD0[SZ] == 0x10 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD0[SZ] == 0x90 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x00) // IMPMBD1[SZ] == 0x00 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x80) // IMPMBD1[SZ] == 0x80 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x10) // IMPMBD1[SZ] == 0x10 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD1[SZ] == 0x90 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x00) // IMPMBD2[SZ] == 0x00 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x80) // IMPMBD2[SZ] == 0x80 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x10) // IMPMBD2[SZ] == 0x10 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD2[SZ] == 0x90 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x00) // IMPMBD3[SZ] == 0x00 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x80) // IMPMBD3[SZ] == 0x80 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x10) // IMPMBD3[SZ] == 0x10 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD3[SZ] == 0x90 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x00) // IMPMBD4[SZ] == 0x00 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x80) // IMPMBD4[SZ] == 0x80 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x10) // IMPMBD4[SZ] == 0x10 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD4[SZ] == 0x90 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x00) // IMPMBD5[SZ] == 0x00 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x80) // IMPMBD5[SZ] == 0x80 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x10) // IMPMBD5[SZ] == 0x10 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD5[SZ] == 0x90 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x00) // IMPMBD6[SZ] == 0x00 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x80) // IMPMBD6[SZ] == 0x80 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x10) // IMPMBD6[SZ] == 0x10 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD6[SZ] == 0x90 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x00) // IMPMBD7[SZ] == 0x00 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x80) // IMPMBD7[SZ] == 0x80 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x10) // IMPMBD7[SZ] == 0x10 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD7[SZ] == 0x90 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x00) // IMPMBD8[SZ] == 0x00 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x80) // IMPMBD8[SZ] == 0x80 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x10) // IMPMBD8[SZ] == 0x10 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD8[SZ] == 0x90 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x00) // IMPMBD9[SZ] == 0x00 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x80) // IMPMBD9[SZ] == 0x80 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x10) // IMPMBD9[SZ] == 0x10 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD9[SZ] == 0x90 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x00) // IMPMBD10[SZ] == 0x00 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x80) // IMPMBD10[SZ] == 0x80 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x10) // IMPMBD10[SZ] == 0x10 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD10[SZ] == 0x90 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x00) // IMPMBD11[SZ] == 0x00 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x80) // IMPMBD11[SZ] == 0x80 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x10) // IMPMBD11[SZ] == 0x10 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD11[SZ] == 0x90 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x00) // IMPMBD12[SZ] == 0x00 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x80) // IMPMBD12[SZ] == 0x80 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x10) // IMPMBD12[SZ] == 0x10 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD12[SZ] == 0x90 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x00) // IMPMBD13[SZ] == 0x00 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x80) // IMPMBD13[SZ] == 0x80 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x10) // IMPMBD13[SZ] == 0x10 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD13[SZ] == 0x90 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x00) // IMPMBD14[SZ] == 0x00 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x80) // IMPMBD14[SZ] == 0x80 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x10) // IMPMBD14[SZ] == 0x10 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD14[SZ] == 0x90 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x00) // IMPMBD15[SZ] == 0x00 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x80) // IMPMBD15[SZ] == 0x80 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x10) // IMPMBD15[SZ] == 0x10 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD15[SZ] == 0x90 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x3 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long 0x20C++0x3 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x3 line.long 0x00 "IMUCTR0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x300+0x08)++0x3 line.long 0x00 "IMUASID0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x310++0x3 line.long 0x00 "IMUCTR1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x310+0x08)++0x3 line.long 0x00 "IMUASID1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x320++0x3 line.long 0x00 "IMUCTR2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x320+0x08)++0x3 line.long 0x00 "IMUASID2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x330++0x3 line.long 0x00 "IMUCTR3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x330+0x08)++0x3 line.long 0x00 "IMUASID3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x340++0x3 line.long 0x00 "IMUCTR4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x340+0x08)++0x3 line.long 0x00 "IMUASID4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x350++0x3 line.long 0x00 "IMUCTR5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x350+0x08)++0x3 line.long 0x00 "IMUASID5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x360++0x3 line.long 0x00 "IMUCTR6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x360+0x08)++0x3 line.long 0x00 "IMUASID6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x370++0x3 line.long 0x00 "IMUCTR7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x370+0x08)++0x3 line.long 0x00 "IMUASID7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x380++0x3 line.long 0x00 "IMUCTR8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x380+0x08)++0x3 line.long 0x00 "IMUASID8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x390++0x3 line.long 0x00 "IMUCTR9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x390+0x08)++0x3 line.long 0x00 "IMUASID9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3A0++0x3 line.long 0x00 "IMUCTR10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x3 line.long 0x00 "IMUASID10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3B0++0x3 line.long 0x00 "IMUCTR11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x3 line.long 0x00 "IMUASID11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3C0++0x3 line.long 0x00 "IMUCTR12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x3 line.long 0x00 "IMUASID12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3D0++0x3 line.long 0x00 "IMUCTR13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x3 line.long 0x00 "IMUASID13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3E0++0x3 line.long 0x00 "IMUCTR14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x3 line.long 0x00 "IMUASID14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3F0++0x3 line.long 0x00 "IMUCTR15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x3 line.long 0x00 "IMUASID15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x400++0x3 line.long 0x00 "IMUCTR16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x400+0x08)++0x3 line.long 0x00 "IMUASID16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x410++0x3 line.long 0x00 "IMUCTR17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x410+0x08)++0x3 line.long 0x00 "IMUASID17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x420++0x3 line.long 0x00 "IMUCTR18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x420+0x08)++0x3 line.long 0x00 "IMUASID18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x430++0x3 line.long 0x00 "IMUCTR19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x430+0x08)++0x3 line.long 0x00 "IMUASID19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x440++0x3 line.long 0x00 "IMUCTR20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x440+0x08)++0x3 line.long 0x00 "IMUASID20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x450++0x3 line.long 0x00 "IMUCTR21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x450+0x08)++0x3 line.long 0x00 "IMUASID21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x460++0x3 line.long 0x00 "IMUCTR22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x460+0x08)++0x3 line.long 0x00 "IMUASID22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x470++0x3 line.long 0x00 "IMUCTR23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x470+0x08)++0x3 line.long 0x00 "IMUASID23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x480++0x3 line.long 0x00 "IMUCTR24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x480+0x08)++0x3 line.long 0x00 "IMUASID24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x490++0x3 line.long 0x00 "IMUCTR25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x490+0x08)++0x3 line.long 0x00 "IMUASID25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4A0++0x3 line.long 0x00 "IMUCTR26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x3 line.long 0x00 "IMUASID26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4B0++0x3 line.long 0x00 "IMUCTR27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x3 line.long 0x00 "IMUASID27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4C0++0x3 line.long 0x00 "IMUCTR28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x3 line.long 0x00 "IMUASID28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4D0++0x3 line.long 0x00 "IMUCTR29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x3 line.long 0x00 "IMUASID29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4E0++0x3 line.long 0x00 "IMUCTR30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x3 line.long 0x00 "IMUASID30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4F0++0x3 line.long 0x00 "IMUCTR31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x3 line.long 0x00 "IMUASID31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" tree.end width 0xB tree.end tree "IPMMUDS" base ad:0xE6740000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6740000+0x0))&0x8)==0x8) group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "IMCAAR0,MMU CCI Address Allocation Register 0" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x0+0x0C)++0x3 line.long 0x00 "IMBUSCR0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR0,Both" group.long (0x0+0x08)++0x3 line.long 0x00 "IMTTBCR0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x3 line.long 0x00 "IMTTUBR00,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x10)++0x3 line.long 0x00 "IMTTLBR00,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x3 line.long 0x00 "IMTTUBR10,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x18)++0x3 line.long 0x00 "IMTTLBR10,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x28)++0x7 line.long 0x00 "IMMAIR00,Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR10,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x0+0x28)++0x7 line.long 0x00 "PRRR0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x0+0x20)++0x3 line.long 0x00 "IMSTR0,MMU Error Status Register 0" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x0+0x30)++0x3 line.long 0x00 "IMEAR0,MMU Error Address Register 0" if (((per.l(ad:0xE6740000+0x40))&0x8)==0x8) group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x40+0x04)++0x3 line.long 0x00 "IMCAAR1,MMU CCI Address Allocation Register 1" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x40+0x0C)++0x3 line.long 0x00 "IMBUSCR1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR1,Both" group.long (0x40+0x08)++0x3 line.long 0x00 "IMTTBCR1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x3 line.long 0x00 "IMTTUBR01,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x10)++0x3 line.long 0x00 "IMTTLBR01,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x3 line.long 0x00 "IMTTUBR11,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x18)++0x3 line.long 0x00 "IMTTLBR11,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x28)++0x7 line.long 0x00 "IMMAIR01,Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR11,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x40+0x28)++0x7 line.long 0x00 "PRRR1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x40+0x20)++0x3 line.long 0x00 "IMSTR1,MMU Error Status Register 1" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x40+0x30)++0x3 line.long 0x00 "IMEAR1,MMU Error Address Register 1" if (((per.l(ad:0xE6740000+0x80))&0x8)==0x8) group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x80+0x04)++0x3 line.long 0x00 "IMCAAR2,MMU CCI Address Allocation Register 2" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x80+0x0C)++0x3 line.long 0x00 "IMBUSCR2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR2,Both" group.long (0x80+0x08)++0x3 line.long 0x00 "IMTTBCR2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x3 line.long 0x00 "IMTTUBR02,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x10)++0x3 line.long 0x00 "IMTTLBR02,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x3 line.long 0x00 "IMTTUBR12,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x18)++0x3 line.long 0x00 "IMTTLBR12,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x28)++0x7 line.long 0x00 "IMMAIR02,Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR12,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x80+0x28)++0x7 line.long 0x00 "PRRR2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x80+0x20)++0x3 line.long 0x00 "IMSTR2,MMU Error Status Register 2" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x80+0x30)++0x3 line.long 0x00 "IMEAR2,MMU Error Address Register 2" if (((per.l(ad:0xE6740000+0xC0))&0x8)==0x8) group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0xC0+0x04)++0x3 line.long 0x00 "IMCAAR3,MMU CCI Address Allocation Register 3" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0xC0+0x0C)++0x3 line.long 0x00 "IMBUSCR3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR3,Both" group.long (0xC0+0x08)++0x3 line.long 0x00 "IMTTBCR3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x3 line.long 0x00 "IMTTUBR03,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x10)++0x3 line.long 0x00 "IMTTLBR03,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x3 line.long 0x00 "IMTTUBR13,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x18)++0x3 line.long 0x00 "IMTTLBR13,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x28)++0x7 line.long 0x00 "IMMAIR03,Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR13,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0xC0+0x28)++0x7 line.long 0x00 "PRRR3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0xC0+0x20)++0x3 line.long 0x00 "IMSTR3,MMU Error Status Register 3" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0xC0+0x30)++0x3 line.long 0x00 "IMEAR3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x3 line.long 0x00 "IMPCTR,PMB Control Register" bitfld.long 0x00 4.--5. " TTSEL ,Translation Table Select" "0,1,2,3" bitfld.long 0x00 3. " TTEN ,TLB Translation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PMBEN ,PMB Enable" "Disabled,Enabled" if (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x00) // IMPMBD0[SZ] == 0x00 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x80) // IMPMBD0[SZ] == 0x80 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x10) // IMPMBD0[SZ] == 0x10 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD0[SZ] == 0x90 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x00) // IMPMBD1[SZ] == 0x00 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x80) // IMPMBD1[SZ] == 0x80 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x10) // IMPMBD1[SZ] == 0x10 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD1[SZ] == 0x90 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x00) // IMPMBD2[SZ] == 0x00 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x80) // IMPMBD2[SZ] == 0x80 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x10) // IMPMBD2[SZ] == 0x10 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD2[SZ] == 0x90 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x00) // IMPMBD3[SZ] == 0x00 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x80) // IMPMBD3[SZ] == 0x80 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x10) // IMPMBD3[SZ] == 0x10 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD3[SZ] == 0x90 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x00) // IMPMBD4[SZ] == 0x00 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x80) // IMPMBD4[SZ] == 0x80 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x10) // IMPMBD4[SZ] == 0x10 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD4[SZ] == 0x90 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x00) // IMPMBD5[SZ] == 0x00 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x80) // IMPMBD5[SZ] == 0x80 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x10) // IMPMBD5[SZ] == 0x10 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD5[SZ] == 0x90 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x00) // IMPMBD6[SZ] == 0x00 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x80) // IMPMBD6[SZ] == 0x80 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x10) // IMPMBD6[SZ] == 0x10 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD6[SZ] == 0x90 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x00) // IMPMBD7[SZ] == 0x00 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x80) // IMPMBD7[SZ] == 0x80 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x10) // IMPMBD7[SZ] == 0x10 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD7[SZ] == 0x90 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x00) // IMPMBD8[SZ] == 0x00 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x80) // IMPMBD8[SZ] == 0x80 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x10) // IMPMBD8[SZ] == 0x10 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD8[SZ] == 0x90 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x00) // IMPMBD9[SZ] == 0x00 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x80) // IMPMBD9[SZ] == 0x80 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x10) // IMPMBD9[SZ] == 0x10 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD9[SZ] == 0x90 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x00) // IMPMBD10[SZ] == 0x00 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x80) // IMPMBD10[SZ] == 0x80 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x10) // IMPMBD10[SZ] == 0x10 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD10[SZ] == 0x90 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x00) // IMPMBD11[SZ] == 0x00 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x80) // IMPMBD11[SZ] == 0x80 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x10) // IMPMBD11[SZ] == 0x10 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD11[SZ] == 0x90 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x00) // IMPMBD12[SZ] == 0x00 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x80) // IMPMBD12[SZ] == 0x80 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x10) // IMPMBD12[SZ] == 0x10 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD12[SZ] == 0x90 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x00) // IMPMBD13[SZ] == 0x00 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x80) // IMPMBD13[SZ] == 0x80 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x10) // IMPMBD13[SZ] == 0x10 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD13[SZ] == 0x90 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x00) // IMPMBD14[SZ] == 0x00 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x80) // IMPMBD14[SZ] == 0x80 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x10) // IMPMBD14[SZ] == 0x10 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD14[SZ] == 0x90 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x00) // IMPMBD15[SZ] == 0x00 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x80) // IMPMBD15[SZ] == 0x80 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x10) // IMPMBD15[SZ] == 0x10 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD15[SZ] == 0x90 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x3 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long 0x20C++0x3 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x3 line.long 0x00 "IMUCTR0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x300+0x08)++0x3 line.long 0x00 "IMUASID0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x310++0x3 line.long 0x00 "IMUCTR1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x310+0x08)++0x3 line.long 0x00 "IMUASID1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x320++0x3 line.long 0x00 "IMUCTR2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x320+0x08)++0x3 line.long 0x00 "IMUASID2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x330++0x3 line.long 0x00 "IMUCTR3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x330+0x08)++0x3 line.long 0x00 "IMUASID3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x340++0x3 line.long 0x00 "IMUCTR4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x340+0x08)++0x3 line.long 0x00 "IMUASID4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x350++0x3 line.long 0x00 "IMUCTR5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x350+0x08)++0x3 line.long 0x00 "IMUASID5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x360++0x3 line.long 0x00 "IMUCTR6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x360+0x08)++0x3 line.long 0x00 "IMUASID6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x370++0x3 line.long 0x00 "IMUCTR7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x370+0x08)++0x3 line.long 0x00 "IMUASID7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x380++0x3 line.long 0x00 "IMUCTR8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x380+0x08)++0x3 line.long 0x00 "IMUASID8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x390++0x3 line.long 0x00 "IMUCTR9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x390+0x08)++0x3 line.long 0x00 "IMUASID9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3A0++0x3 line.long 0x00 "IMUCTR10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x3 line.long 0x00 "IMUASID10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3B0++0x3 line.long 0x00 "IMUCTR11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x3 line.long 0x00 "IMUASID11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3C0++0x3 line.long 0x00 "IMUCTR12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x3 line.long 0x00 "IMUASID12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3D0++0x3 line.long 0x00 "IMUCTR13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x3 line.long 0x00 "IMUASID13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3E0++0x3 line.long 0x00 "IMUCTR14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x3 line.long 0x00 "IMUASID14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3F0++0x3 line.long 0x00 "IMUCTR15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x3 line.long 0x00 "IMUASID15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x400++0x3 line.long 0x00 "IMUCTR16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x400+0x08)++0x3 line.long 0x00 "IMUASID16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x410++0x3 line.long 0x00 "IMUCTR17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x410+0x08)++0x3 line.long 0x00 "IMUASID17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x420++0x3 line.long 0x00 "IMUCTR18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x420+0x08)++0x3 line.long 0x00 "IMUASID18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x430++0x3 line.long 0x00 "IMUCTR19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x430+0x08)++0x3 line.long 0x00 "IMUASID19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x440++0x3 line.long 0x00 "IMUCTR20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x440+0x08)++0x3 line.long 0x00 "IMUASID20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x450++0x3 line.long 0x00 "IMUCTR21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x450+0x08)++0x3 line.long 0x00 "IMUASID21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x460++0x3 line.long 0x00 "IMUCTR22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x460+0x08)++0x3 line.long 0x00 "IMUASID22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x470++0x3 line.long 0x00 "IMUCTR23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x470+0x08)++0x3 line.long 0x00 "IMUASID23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x480++0x3 line.long 0x00 "IMUCTR24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x480+0x08)++0x3 line.long 0x00 "IMUASID24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x490++0x3 line.long 0x00 "IMUCTR25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x490+0x08)++0x3 line.long 0x00 "IMUASID25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4A0++0x3 line.long 0x00 "IMUCTR26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x3 line.long 0x00 "IMUASID26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4B0++0x3 line.long 0x00 "IMUCTR27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x3 line.long 0x00 "IMUASID27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4C0++0x3 line.long 0x00 "IMUCTR28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x3 line.long 0x00 "IMUASID28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4D0++0x3 line.long 0x00 "IMUCTR29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x3 line.long 0x00 "IMUASID29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4E0++0x3 line.long 0x00 "IMUCTR30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x3 line.long 0x00 "IMUASID30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4F0++0x3 line.long 0x00 "IMUCTR31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x3 line.long 0x00 "IMUASID31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" tree.end width 0xB tree.end tree "IPMMUMP" base ad:0xEC680000 width 11. tree "MMU Registers" if (((per.l(ad:0xEC680000+0x0))&0x8)==0x8) group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "IMCAAR0,MMU CCI Address Allocation Register 0" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x0+0x0C)++0x3 line.long 0x00 "IMBUSCR0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR0,Both" group.long (0x0+0x08)++0x3 line.long 0x00 "IMTTBCR0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xEC680000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x3 line.long 0x00 "IMTTUBR00,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x10)++0x3 line.long 0x00 "IMTTLBR00,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x3 line.long 0x00 "IMTTUBR10,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x18)++0x3 line.long 0x00 "IMTTLBR10,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x28)++0x7 line.long 0x00 "IMMAIR00,Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR10,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x0+0x28)++0x7 line.long 0x00 "PRRR0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x0+0x20)++0x3 line.long 0x00 "IMSTR0,MMU Error Status Register 0" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x0+0x30)++0x3 line.long 0x00 "IMEAR0,MMU Error Address Register 0" if (((per.l(ad:0xEC680000+0x40))&0x8)==0x8) group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x40+0x04)++0x3 line.long 0x00 "IMCAAR1,MMU CCI Address Allocation Register 1" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x40+0x0C)++0x3 line.long 0x00 "IMBUSCR1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR1,Both" group.long (0x40+0x08)++0x3 line.long 0x00 "IMTTBCR1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xEC680000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x3 line.long 0x00 "IMTTUBR01,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x10)++0x3 line.long 0x00 "IMTTLBR01,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x3 line.long 0x00 "IMTTUBR11,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x18)++0x3 line.long 0x00 "IMTTLBR11,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x28)++0x7 line.long 0x00 "IMMAIR01,Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR11,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x40+0x28)++0x7 line.long 0x00 "PRRR1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x40+0x20)++0x3 line.long 0x00 "IMSTR1,MMU Error Status Register 1" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x40+0x30)++0x3 line.long 0x00 "IMEAR1,MMU Error Address Register 1" if (((per.l(ad:0xEC680000+0x80))&0x8)==0x8) group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x80+0x04)++0x3 line.long 0x00 "IMCAAR2,MMU CCI Address Allocation Register 2" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x80+0x0C)++0x3 line.long 0x00 "IMBUSCR2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR2,Both" group.long (0x80+0x08)++0x3 line.long 0x00 "IMTTBCR2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xEC680000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x3 line.long 0x00 "IMTTUBR02,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x10)++0x3 line.long 0x00 "IMTTLBR02,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x3 line.long 0x00 "IMTTUBR12,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x18)++0x3 line.long 0x00 "IMTTLBR12,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x28)++0x7 line.long 0x00 "IMMAIR02,Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR12,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x80+0x28)++0x7 line.long 0x00 "PRRR2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x80+0x20)++0x3 line.long 0x00 "IMSTR2,MMU Error Status Register 2" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x80+0x30)++0x3 line.long 0x00 "IMEAR2,MMU Error Address Register 2" if (((per.l(ad:0xEC680000+0xC0))&0x8)==0x8) group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0xC0+0x04)++0x3 line.long 0x00 "IMCAAR3,MMU CCI Address Allocation Register 3" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0xC0+0x0C)++0x3 line.long 0x00 "IMBUSCR3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR3,Both" group.long (0xC0+0x08)++0x3 line.long 0x00 "IMTTBCR3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xEC680000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x3 line.long 0x00 "IMTTUBR03,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x10)++0x3 line.long 0x00 "IMTTLBR03,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x3 line.long 0x00 "IMTTUBR13,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x18)++0x3 line.long 0x00 "IMTTLBR13,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x28)++0x7 line.long 0x00 "IMMAIR03,Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR13,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0xC0+0x28)++0x7 line.long 0x00 "PRRR3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0xC0+0x20)++0x3 line.long 0x00 "IMSTR3,MMU Error Status Register 3" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0xC0+0x30)++0x3 line.long 0x00 "IMEAR3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x3 line.long 0x00 "IMPCTR,PMB Control Register" bitfld.long 0x00 4.--5. " TTSEL ,Translation Table Select" "0,1,2,3" bitfld.long 0x00 3. " TTEN ,TLB Translation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PMBEN ,PMB Enable" "Disabled,Enabled" if (((per.l(ad:0xEC680000+0x280+0x40))&0x90)==0x00) // IMPMBD0[SZ] == 0x00 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x280+0x40))&0x90)==0x80) // IMPMBD0[SZ] == 0x80 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x280+0x40))&0x90)==0x10) // IMPMBD0[SZ] == 0x10 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD0[SZ] == 0x90 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x284+0x40))&0x90)==0x00) // IMPMBD1[SZ] == 0x00 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x284+0x40))&0x90)==0x80) // IMPMBD1[SZ] == 0x80 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x284+0x40))&0x90)==0x10) // IMPMBD1[SZ] == 0x10 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD1[SZ] == 0x90 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x288+0x40))&0x90)==0x00) // IMPMBD2[SZ] == 0x00 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x288+0x40))&0x90)==0x80) // IMPMBD2[SZ] == 0x80 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x288+0x40))&0x90)==0x10) // IMPMBD2[SZ] == 0x10 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD2[SZ] == 0x90 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x28C+0x40))&0x90)==0x00) // IMPMBD3[SZ] == 0x00 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x28C+0x40))&0x90)==0x80) // IMPMBD3[SZ] == 0x80 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x28C+0x40))&0x90)==0x10) // IMPMBD3[SZ] == 0x10 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD3[SZ] == 0x90 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x290+0x40))&0x90)==0x00) // IMPMBD4[SZ] == 0x00 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x290+0x40))&0x90)==0x80) // IMPMBD4[SZ] == 0x80 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x290+0x40))&0x90)==0x10) // IMPMBD4[SZ] == 0x10 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD4[SZ] == 0x90 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x294+0x40))&0x90)==0x00) // IMPMBD5[SZ] == 0x00 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x294+0x40))&0x90)==0x80) // IMPMBD5[SZ] == 0x80 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x294+0x40))&0x90)==0x10) // IMPMBD5[SZ] == 0x10 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD5[SZ] == 0x90 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x298+0x40))&0x90)==0x00) // IMPMBD6[SZ] == 0x00 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x298+0x40))&0x90)==0x80) // IMPMBD6[SZ] == 0x80 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x298+0x40))&0x90)==0x10) // IMPMBD6[SZ] == 0x10 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD6[SZ] == 0x90 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x29C+0x40))&0x90)==0x00) // IMPMBD7[SZ] == 0x00 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x29C+0x40))&0x90)==0x80) // IMPMBD7[SZ] == 0x80 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x29C+0x40))&0x90)==0x10) // IMPMBD7[SZ] == 0x10 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD7[SZ] == 0x90 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2A0+0x40))&0x90)==0x00) // IMPMBD8[SZ] == 0x00 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A0+0x40))&0x90)==0x80) // IMPMBD8[SZ] == 0x80 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A0+0x40))&0x90)==0x10) // IMPMBD8[SZ] == 0x10 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD8[SZ] == 0x90 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2A4+0x40))&0x90)==0x00) // IMPMBD9[SZ] == 0x00 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A4+0x40))&0x90)==0x80) // IMPMBD9[SZ] == 0x80 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A4+0x40))&0x90)==0x10) // IMPMBD9[SZ] == 0x10 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD9[SZ] == 0x90 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2A8+0x40))&0x90)==0x00) // IMPMBD10[SZ] == 0x00 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A8+0x40))&0x90)==0x80) // IMPMBD10[SZ] == 0x80 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A8+0x40))&0x90)==0x10) // IMPMBD10[SZ] == 0x10 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD10[SZ] == 0x90 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2AC+0x40))&0x90)==0x00) // IMPMBD11[SZ] == 0x00 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2AC+0x40))&0x90)==0x80) // IMPMBD11[SZ] == 0x80 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2AC+0x40))&0x90)==0x10) // IMPMBD11[SZ] == 0x10 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD11[SZ] == 0x90 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2B0+0x40))&0x90)==0x00) // IMPMBD12[SZ] == 0x00 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B0+0x40))&0x90)==0x80) // IMPMBD12[SZ] == 0x80 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B0+0x40))&0x90)==0x10) // IMPMBD12[SZ] == 0x10 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD12[SZ] == 0x90 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2B4+0x40))&0x90)==0x00) // IMPMBD13[SZ] == 0x00 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B4+0x40))&0x90)==0x80) // IMPMBD13[SZ] == 0x80 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B4+0x40))&0x90)==0x10) // IMPMBD13[SZ] == 0x10 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD13[SZ] == 0x90 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2B8+0x40))&0x90)==0x00) // IMPMBD14[SZ] == 0x00 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B8+0x40))&0x90)==0x80) // IMPMBD14[SZ] == 0x80 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B8+0x40))&0x90)==0x10) // IMPMBD14[SZ] == 0x10 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD14[SZ] == 0x90 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2BC+0x40))&0x90)==0x00) // IMPMBD15[SZ] == 0x00 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2BC+0x40))&0x90)==0x80) // IMPMBD15[SZ] == 0x80 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2BC+0x40))&0x90)==0x10) // IMPMBD15[SZ] == 0x10 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD15[SZ] == 0x90 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2C0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2C4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2C8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2CC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2CC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2CC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2D0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2D4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2D8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2DC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2DC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2DC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2E0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2E4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2E8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2EC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2EC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2EC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2F0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2F4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2F8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2FC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2FC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2FC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x3 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long 0x20C++0x3 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x3 line.long 0x00 "IMUCTR0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x300+0x08)++0x3 line.long 0x00 "IMUASID0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x310++0x3 line.long 0x00 "IMUCTR1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x310+0x08)++0x3 line.long 0x00 "IMUASID1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x320++0x3 line.long 0x00 "IMUCTR2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x320+0x08)++0x3 line.long 0x00 "IMUASID2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x330++0x3 line.long 0x00 "IMUCTR3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x330+0x08)++0x3 line.long 0x00 "IMUASID3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x340++0x3 line.long 0x00 "IMUCTR4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x340+0x08)++0x3 line.long 0x00 "IMUASID4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x350++0x3 line.long 0x00 "IMUCTR5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x350+0x08)++0x3 line.long 0x00 "IMUASID5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x360++0x3 line.long 0x00 "IMUCTR6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x360+0x08)++0x3 line.long 0x00 "IMUASID6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x370++0x3 line.long 0x00 "IMUCTR7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x370+0x08)++0x3 line.long 0x00 "IMUASID7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x380++0x3 line.long 0x00 "IMUCTR8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x380+0x08)++0x3 line.long 0x00 "IMUASID8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x390++0x3 line.long 0x00 "IMUCTR9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x390+0x08)++0x3 line.long 0x00 "IMUASID9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3A0++0x3 line.long 0x00 "IMUCTR10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x3 line.long 0x00 "IMUASID10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3B0++0x3 line.long 0x00 "IMUCTR11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x3 line.long 0x00 "IMUASID11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3C0++0x3 line.long 0x00 "IMUCTR12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x3 line.long 0x00 "IMUASID12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3D0++0x3 line.long 0x00 "IMUCTR13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x3 line.long 0x00 "IMUASID13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3E0++0x3 line.long 0x00 "IMUCTR14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x3 line.long 0x00 "IMUASID14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3F0++0x3 line.long 0x00 "IMUCTR15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x3 line.long 0x00 "IMUASID15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x400++0x3 line.long 0x00 "IMUCTR16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x400+0x08)++0x3 line.long 0x00 "IMUASID16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x410++0x3 line.long 0x00 "IMUCTR17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x410+0x08)++0x3 line.long 0x00 "IMUASID17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x420++0x3 line.long 0x00 "IMUCTR18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x420+0x08)++0x3 line.long 0x00 "IMUASID18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x430++0x3 line.long 0x00 "IMUCTR19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x430+0x08)++0x3 line.long 0x00 "IMUASID19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x440++0x3 line.long 0x00 "IMUCTR20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x440+0x08)++0x3 line.long 0x00 "IMUASID20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x450++0x3 line.long 0x00 "IMUCTR21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x450+0x08)++0x3 line.long 0x00 "IMUASID21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x460++0x3 line.long 0x00 "IMUCTR22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x460+0x08)++0x3 line.long 0x00 "IMUASID22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x470++0x3 line.long 0x00 "IMUCTR23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x470+0x08)++0x3 line.long 0x00 "IMUASID23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x480++0x3 line.long 0x00 "IMUCTR24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x480+0x08)++0x3 line.long 0x00 "IMUASID24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x490++0x3 line.long 0x00 "IMUCTR25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x490+0x08)++0x3 line.long 0x00 "IMUASID25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4A0++0x3 line.long 0x00 "IMUCTR26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x3 line.long 0x00 "IMUASID26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4B0++0x3 line.long 0x00 "IMUCTR27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x3 line.long 0x00 "IMUASID27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4C0++0x3 line.long 0x00 "IMUCTR28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x3 line.long 0x00 "IMUASID28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4D0++0x3 line.long 0x00 "IMUCTR29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x3 line.long 0x00 "IMUASID29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4E0++0x3 line.long 0x00 "IMUCTR30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x3 line.long 0x00 "IMUASID30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4F0++0x3 line.long 0x00 "IMUCTR31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x3 line.long 0x00 "IMUASID31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" tree.end width 0xB tree.end tree "IPMMUM" base ad:0xFE951000 width 11. tree "MMU Registers" if (((per.l(ad:0xFE951000+0x0))&0x8)==0x8) group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "IMCAAR0,MMU CCI Address Allocation Register 0" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x0+0x0C)++0x3 line.long 0x00 "IMBUSCR0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR0,Both" group.long (0x0+0x08)++0x3 line.long 0x00 "IMTTBCR0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x3 line.long 0x00 "IMTTUBR00,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x10)++0x3 line.long 0x00 "IMTTLBR00,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x3 line.long 0x00 "IMTTUBR10,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x18)++0x3 line.long 0x00 "IMTTLBR10,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x28)++0x7 line.long 0x00 "IMMAIR00,Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR10,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x0+0x28)++0x7 line.long 0x00 "PRRR0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x0+0x20)++0x3 line.long 0x00 "IMSTR0,MMU Error Status Register 0" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x0+0x30)++0x3 line.long 0x00 "IMEAR0,MMU Error Address Register 0" if (((per.l(ad:0xFE951000+0x40))&0x8)==0x8) group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x40+0x04)++0x3 line.long 0x00 "IMCAAR1,MMU CCI Address Allocation Register 1" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x40+0x0C)++0x3 line.long 0x00 "IMBUSCR1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR1,Both" group.long (0x40+0x08)++0x3 line.long 0x00 "IMTTBCR1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x3 line.long 0x00 "IMTTUBR01,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x10)++0x3 line.long 0x00 "IMTTLBR01,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x3 line.long 0x00 "IMTTUBR11,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x18)++0x3 line.long 0x00 "IMTTLBR11,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x28)++0x7 line.long 0x00 "IMMAIR01,Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR11,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x40+0x28)++0x7 line.long 0x00 "PRRR1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x40+0x20)++0x3 line.long 0x00 "IMSTR1,MMU Error Status Register 1" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x40+0x30)++0x3 line.long 0x00 "IMEAR1,MMU Error Address Register 1" if (((per.l(ad:0xFE951000+0x80))&0x8)==0x8) group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x80+0x04)++0x3 line.long 0x00 "IMCAAR2,MMU CCI Address Allocation Register 2" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x80+0x0C)++0x3 line.long 0x00 "IMBUSCR2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR2,Both" group.long (0x80+0x08)++0x3 line.long 0x00 "IMTTBCR2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x3 line.long 0x00 "IMTTUBR02,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x10)++0x3 line.long 0x00 "IMTTLBR02,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x3 line.long 0x00 "IMTTUBR12,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x18)++0x3 line.long 0x00 "IMTTLBR12,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x28)++0x7 line.long 0x00 "IMMAIR02,Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR12,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x80+0x28)++0x7 line.long 0x00 "PRRR2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x80+0x20)++0x3 line.long 0x00 "IMSTR2,MMU Error Status Register 2" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x80+0x30)++0x3 line.long 0x00 "IMEAR2,MMU Error Address Register 2" if (((per.l(ad:0xFE951000+0xC0))&0x8)==0x8) group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0xC0+0x04)++0x3 line.long 0x00 "IMCAAR3,MMU CCI Address Allocation Register 3" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0xC0+0x0C)++0x3 line.long 0x00 "IMBUSCR3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR3,Both" group.long (0xC0+0x08)++0x3 line.long 0x00 "IMTTBCR3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x3 line.long 0x00 "IMTTUBR03,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x10)++0x3 line.long 0x00 "IMTTLBR03,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x3 line.long 0x00 "IMTTUBR13,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x18)++0x3 line.long 0x00 "IMTTLBR13,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x28)++0x7 line.long 0x00 "IMMAIR03,Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR13,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0xC0+0x28)++0x7 line.long 0x00 "PRRR3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0xC0+0x20)++0x3 line.long 0x00 "IMSTR3,MMU Error Status Register 3" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0xC0+0x30)++0x3 line.long 0x00 "IMEAR3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x3 line.long 0x00 "IMPCTR,PMB Control Register" bitfld.long 0x00 4.--5. " TTSEL ,Translation Table Select" "0,1,2,3" bitfld.long 0x00 3. " TTEN ,TLB Translation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PMBEN ,PMB Enable" "Disabled,Enabled" if (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x00) // IMPMBD0[SZ] == 0x00 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x80) // IMPMBD0[SZ] == 0x80 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x10) // IMPMBD0[SZ] == 0x10 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD0[SZ] == 0x90 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x00) // IMPMBD1[SZ] == 0x00 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x80) // IMPMBD1[SZ] == 0x80 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x10) // IMPMBD1[SZ] == 0x10 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD1[SZ] == 0x90 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x00) // IMPMBD2[SZ] == 0x00 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x80) // IMPMBD2[SZ] == 0x80 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x10) // IMPMBD2[SZ] == 0x10 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD2[SZ] == 0x90 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x00) // IMPMBD3[SZ] == 0x00 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x80) // IMPMBD3[SZ] == 0x80 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x10) // IMPMBD3[SZ] == 0x10 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD3[SZ] == 0x90 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x00) // IMPMBD4[SZ] == 0x00 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x80) // IMPMBD4[SZ] == 0x80 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x10) // IMPMBD4[SZ] == 0x10 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD4[SZ] == 0x90 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x00) // IMPMBD5[SZ] == 0x00 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x80) // IMPMBD5[SZ] == 0x80 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x10) // IMPMBD5[SZ] == 0x10 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD5[SZ] == 0x90 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x00) // IMPMBD6[SZ] == 0x00 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x80) // IMPMBD6[SZ] == 0x80 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x10) // IMPMBD6[SZ] == 0x10 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD6[SZ] == 0x90 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x00) // IMPMBD7[SZ] == 0x00 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x80) // IMPMBD7[SZ] == 0x80 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x10) // IMPMBD7[SZ] == 0x10 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD7[SZ] == 0x90 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x00) // IMPMBD8[SZ] == 0x00 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x80) // IMPMBD8[SZ] == 0x80 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x10) // IMPMBD8[SZ] == 0x10 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD8[SZ] == 0x90 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x00) // IMPMBD9[SZ] == 0x00 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x80) // IMPMBD9[SZ] == 0x80 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x10) // IMPMBD9[SZ] == 0x10 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD9[SZ] == 0x90 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x00) // IMPMBD10[SZ] == 0x00 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x80) // IMPMBD10[SZ] == 0x80 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x10) // IMPMBD10[SZ] == 0x10 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD10[SZ] == 0x90 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x00) // IMPMBD11[SZ] == 0x00 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x80) // IMPMBD11[SZ] == 0x80 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x10) // IMPMBD11[SZ] == 0x10 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD11[SZ] == 0x90 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x00) // IMPMBD12[SZ] == 0x00 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x80) // IMPMBD12[SZ] == 0x80 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x10) // IMPMBD12[SZ] == 0x10 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD12[SZ] == 0x90 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x00) // IMPMBD13[SZ] == 0x00 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x80) // IMPMBD13[SZ] == 0x80 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x10) // IMPMBD13[SZ] == 0x10 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD13[SZ] == 0x90 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x00) // IMPMBD14[SZ] == 0x00 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x80) // IMPMBD14[SZ] == 0x80 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x10) // IMPMBD14[SZ] == 0x10 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD14[SZ] == 0x90 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x00) // IMPMBD15[SZ] == 0x00 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x80) // IMPMBD15[SZ] == 0x80 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x10) // IMPMBD15[SZ] == 0x10 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD15[SZ] == 0x90 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x3 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long 0x20C++0x3 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x3 line.long 0x00 "IMUCTR0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x300+0x08)++0x3 line.long 0x00 "IMUASID0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x310++0x3 line.long 0x00 "IMUCTR1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x310+0x08)++0x3 line.long 0x00 "IMUASID1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x320++0x3 line.long 0x00 "IMUCTR2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x320+0x08)++0x3 line.long 0x00 "IMUASID2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x330++0x3 line.long 0x00 "IMUCTR3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x330+0x08)++0x3 line.long 0x00 "IMUASID3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x340++0x3 line.long 0x00 "IMUCTR4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x340+0x08)++0x3 line.long 0x00 "IMUASID4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x350++0x3 line.long 0x00 "IMUCTR5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x350+0x08)++0x3 line.long 0x00 "IMUASID5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x360++0x3 line.long 0x00 "IMUCTR6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x360+0x08)++0x3 line.long 0x00 "IMUASID6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x370++0x3 line.long 0x00 "IMUCTR7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x370+0x08)++0x3 line.long 0x00 "IMUASID7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x380++0x3 line.long 0x00 "IMUCTR8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x380+0x08)++0x3 line.long 0x00 "IMUASID8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x390++0x3 line.long 0x00 "IMUCTR9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x390+0x08)++0x3 line.long 0x00 "IMUASID9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3A0++0x3 line.long 0x00 "IMUCTR10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x3 line.long 0x00 "IMUASID10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3B0++0x3 line.long 0x00 "IMUCTR11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x3 line.long 0x00 "IMUASID11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3C0++0x3 line.long 0x00 "IMUCTR12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x3 line.long 0x00 "IMUASID12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3D0++0x3 line.long 0x00 "IMUCTR13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x3 line.long 0x00 "IMUASID13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3E0++0x3 line.long 0x00 "IMUCTR14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x3 line.long 0x00 "IMUASID14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3F0++0x3 line.long 0x00 "IMUCTR15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x3 line.long 0x00 "IMUASID15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x400++0x3 line.long 0x00 "IMUCTR16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x400+0x08)++0x3 line.long 0x00 "IMUASID16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x410++0x3 line.long 0x00 "IMUCTR17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x410+0x08)++0x3 line.long 0x00 "IMUASID17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x420++0x3 line.long 0x00 "IMUCTR18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x420+0x08)++0x3 line.long 0x00 "IMUASID18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x430++0x3 line.long 0x00 "IMUCTR19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x430+0x08)++0x3 line.long 0x00 "IMUASID19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x440++0x3 line.long 0x00 "IMUCTR20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x440+0x08)++0x3 line.long 0x00 "IMUASID20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x450++0x3 line.long 0x00 "IMUCTR21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x450+0x08)++0x3 line.long 0x00 "IMUASID21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x460++0x3 line.long 0x00 "IMUCTR22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x460+0x08)++0x3 line.long 0x00 "IMUASID22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x470++0x3 line.long 0x00 "IMUCTR23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x470+0x08)++0x3 line.long 0x00 "IMUASID23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x480++0x3 line.long 0x00 "IMUCTR24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x480+0x08)++0x3 line.long 0x00 "IMUASID24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x490++0x3 line.long 0x00 "IMUCTR25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x490+0x08)++0x3 line.long 0x00 "IMUASID25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4A0++0x3 line.long 0x00 "IMUCTR26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x3 line.long 0x00 "IMUASID26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4B0++0x3 line.long 0x00 "IMUCTR27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x3 line.long 0x00 "IMUASID27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4C0++0x3 line.long 0x00 "IMUCTR28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x3 line.long 0x00 "IMUASID28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4D0++0x3 line.long 0x00 "IMUCTR29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x3 line.long 0x00 "IMUASID29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4E0++0x3 line.long 0x00 "IMUCTR30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x3 line.long 0x00 "IMUASID30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4F0++0x3 line.long 0x00 "IMUCTR31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x3 line.long 0x00 "IMUASID31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" tree.end width 0xB tree.end tree "IPMMURT" base ad:0xFFC80000 width 11. tree "MMU Registers" if (((per.l(ad:0xFFC80000+0x0))&0x8)==0x8) group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x0++0x3 line.long 0x00 "IMCTR0,MMU Control Register 0" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x0+0x04)++0x3 line.long 0x00 "IMCAAR0,MMU CCI Address Allocation Register 0" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x0+0x0C)++0x3 line.long 0x00 "IMBUSCR0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR0,Both" group.long (0x0+0x08)++0x3 line.long 0x00 "IMTTBCR0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFFC80000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x3 line.long 0x00 "IMTTUBR00,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x10)++0x3 line.long 0x00 "IMTTLBR00,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x3 line.long 0x00 "IMTTUBR10,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x0+0x18)++0x3 line.long 0x00 "IMTTLBR10,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x28)++0x7 line.long 0x00 "IMMAIR00,Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR10,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x0+0x28)++0x7 line.long 0x00 "PRRR0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x0+0x20)++0x3 line.long 0x00 "IMSTR0,MMU Error Status Register 0" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x0+0x30)++0x3 line.long 0x00 "IMEAR0,MMU Error Address Register 0" if (((per.l(ad:0xFFC80000+0x40))&0x8)==0x8) group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x40++0x3 line.long 0x00 "IMCTR1,MMU Control Register 1" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x40+0x04)++0x3 line.long 0x00 "IMCAAR1,MMU CCI Address Allocation Register 1" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x40+0x0C)++0x3 line.long 0x00 "IMBUSCR1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR1,Both" group.long (0x40+0x08)++0x3 line.long 0x00 "IMTTBCR1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFFC80000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x3 line.long 0x00 "IMTTUBR01,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x10)++0x3 line.long 0x00 "IMTTLBR01,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x3 line.long 0x00 "IMTTUBR11,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x40+0x18)++0x3 line.long 0x00 "IMTTLBR11,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x28)++0x7 line.long 0x00 "IMMAIR01,Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR11,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x40+0x28)++0x7 line.long 0x00 "PRRR1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x40+0x20)++0x3 line.long 0x00 "IMSTR1,MMU Error Status Register 1" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x40+0x30)++0x3 line.long 0x00 "IMEAR1,MMU Error Address Register 1" if (((per.l(ad:0xFFC80000+0x80))&0x8)==0x8) group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0x80++0x3 line.long 0x00 "IMCTR2,MMU Control Register 2" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0x80+0x04)++0x3 line.long 0x00 "IMCAAR2,MMU CCI Address Allocation Register 2" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0x80+0x0C)++0x3 line.long 0x00 "IMBUSCR2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR2,Both" group.long (0x80+0x08)++0x3 line.long 0x00 "IMTTBCR2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFFC80000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x3 line.long 0x00 "IMTTUBR02,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x10)++0x3 line.long 0x00 "IMTTLBR02,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x3 line.long 0x00 "IMTTUBR12,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0x80+0x18)++0x3 line.long 0x00 "IMTTLBR12,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x28)++0x7 line.long 0x00 "IMMAIR02,Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR12,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0x80+0x28)++0x7 line.long 0x00 "PRRR2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0x80+0x20)++0x3 line.long 0x00 "IMSTR2,MMU Error Status Register 2" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0x80+0x30)++0x3 line.long 0x00 "IMEAR2,MMU Error Address Register 2" if (((per.l(ad:0xFFC80000+0xC0))&0x8)==0x8) group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RTSEL ,Retranslation Table Select" "0,1,2,3" textline " " bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" else group.long 0xC0++0x3 line.long 0x00 "IMCTR3,MMU Control Register 3" bitfld.long 0x00 17. " TRE ,TEX Remap Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU Retranslation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU Enable" "Disabled,Enabled" endif group.long (0xC0+0x04)++0x3 line.long 0x00 "IMCAAR3,MMU CCI Address Allocation Register 3" hexmask.long.word 0x00 16.--31. 1. " SADD ,A start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 1. " EADD ,A end phisycal address via CCI interconnect" group.long (0xC0+0x0C)++0x3 line.long 0x00 "IMBUSCR3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus Select" "Always,Memory attr. sharable,Range of IMCAAR3,Both" group.long (0xC0+0x08)++0x3 line.long 0x00 "IMTTBCR3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " bitfld.long 0x00 4. " SL0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size ofthe region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" if (((per.l(ad:0xFFC80000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x3 line.long 0x00 "IMTTUBR03,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x10)++0x3 line.long 0x00 "IMTTLBR03,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x3 line.long 0x00 "IMTTUBR13,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" endif group.long (0xC0+0x18)++0x3 line.long 0x00 "IMTTLBR13,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFFC80000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x28)++0x7 line.long 0x00 "IMMAIR03,Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,ATTR0" line.long 0x04 "IMMAIR13,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR3 ,ATTR3" hexmask.long.byte 0x04 16.--23. 1. " ATTR2 ,ATTR2" hexmask.long.byte 0x04 8.--15. 1. " ATTR1 ,ATTR1" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR0 ,ATTR0" else group.long (0xC0+0x28)++0x7 line.long 0x00 "PRRR3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif group.long (0xC0+0x20)++0x3 line.long 0x00 "IMSTR3,MMU Error Status Register 3" bitfld.long 0x00 4. " MHIT ,Indicate that multipleTLB hits occurred" "Not occurred,Occurred" bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long (0xC0+0x30)++0x3 line.long 0x00 "IMEAR3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x3 line.long 0x00 "IMPCTR,PMB Control Register" bitfld.long 0x00 4.--5. " TTSEL ,Translation Table Select" "0,1,2,3" bitfld.long 0x00 3. " TTEN ,TLB Translation Enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PMBEN ,PMB Enable" "Disabled,Enabled" if (((per.l(ad:0xFFC80000+0x280+0x40))&0x90)==0x00) // IMPMBD0[SZ] == 0x00 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x280+0x40))&0x90)==0x80) // IMPMBD0[SZ] == 0x80 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x280+0x40))&0x90)==0x10) // IMPMBD0[SZ] == 0x10 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD0[SZ] == 0x90 group.long 0x280++0x3 line.long 0x00 "IMPMBA0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x284+0x40))&0x90)==0x00) // IMPMBD1[SZ] == 0x00 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x284+0x40))&0x90)==0x80) // IMPMBD1[SZ] == 0x80 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x284+0x40))&0x90)==0x10) // IMPMBD1[SZ] == 0x10 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD1[SZ] == 0x90 group.long 0x284++0x3 line.long 0x00 "IMPMBA1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x288+0x40))&0x90)==0x00) // IMPMBD2[SZ] == 0x00 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x288+0x40))&0x90)==0x80) // IMPMBD2[SZ] == 0x80 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x288+0x40))&0x90)==0x10) // IMPMBD2[SZ] == 0x10 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD2[SZ] == 0x90 group.long 0x288++0x3 line.long 0x00 "IMPMBA2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x28C+0x40))&0x90)==0x00) // IMPMBD3[SZ] == 0x00 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x28C+0x40))&0x90)==0x80) // IMPMBD3[SZ] == 0x80 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x28C+0x40))&0x90)==0x10) // IMPMBD3[SZ] == 0x10 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD3[SZ] == 0x90 group.long 0x28C++0x3 line.long 0x00 "IMPMBA3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x290+0x40))&0x90)==0x00) // IMPMBD4[SZ] == 0x00 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x290+0x40))&0x90)==0x80) // IMPMBD4[SZ] == 0x80 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x290+0x40))&0x90)==0x10) // IMPMBD4[SZ] == 0x10 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD4[SZ] == 0x90 group.long 0x290++0x3 line.long 0x00 "IMPMBA4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x294+0x40))&0x90)==0x00) // IMPMBD5[SZ] == 0x00 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x294+0x40))&0x90)==0x80) // IMPMBD5[SZ] == 0x80 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x294+0x40))&0x90)==0x10) // IMPMBD5[SZ] == 0x10 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD5[SZ] == 0x90 group.long 0x294++0x3 line.long 0x00 "IMPMBA5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x298+0x40))&0x90)==0x00) // IMPMBD6[SZ] == 0x00 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x298+0x40))&0x90)==0x80) // IMPMBD6[SZ] == 0x80 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x298+0x40))&0x90)==0x10) // IMPMBD6[SZ] == 0x10 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD6[SZ] == 0x90 group.long 0x298++0x3 line.long 0x00 "IMPMBA6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x29C+0x40))&0x90)==0x00) // IMPMBD7[SZ] == 0x00 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x29C+0x40))&0x90)==0x80) // IMPMBD7[SZ] == 0x80 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x29C+0x40))&0x90)==0x10) // IMPMBD7[SZ] == 0x10 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD7[SZ] == 0x90 group.long 0x29C++0x3 line.long 0x00 "IMPMBA7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2A0+0x40))&0x90)==0x00) // IMPMBD8[SZ] == 0x00 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2A0+0x40))&0x90)==0x80) // IMPMBD8[SZ] == 0x80 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2A0+0x40))&0x90)==0x10) // IMPMBD8[SZ] == 0x10 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD8[SZ] == 0x90 group.long 0x2A0++0x3 line.long 0x00 "IMPMBA8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2A4+0x40))&0x90)==0x00) // IMPMBD9[SZ] == 0x00 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2A4+0x40))&0x90)==0x80) // IMPMBD9[SZ] == 0x80 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2A4+0x40))&0x90)==0x10) // IMPMBD9[SZ] == 0x10 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD9[SZ] == 0x90 group.long 0x2A4++0x3 line.long 0x00 "IMPMBA9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2A8+0x40))&0x90)==0x00) // IMPMBD10[SZ] == 0x00 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2A8+0x40))&0x90)==0x80) // IMPMBD10[SZ] == 0x80 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2A8+0x40))&0x90)==0x10) // IMPMBD10[SZ] == 0x10 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD10[SZ] == 0x90 group.long 0x2A8++0x3 line.long 0x00 "IMPMBA10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2AC+0x40))&0x90)==0x00) // IMPMBD11[SZ] == 0x00 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2AC+0x40))&0x90)==0x80) // IMPMBD11[SZ] == 0x80 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2AC+0x40))&0x90)==0x10) // IMPMBD11[SZ] == 0x10 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD11[SZ] == 0x90 group.long 0x2AC++0x3 line.long 0x00 "IMPMBA11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2B0+0x40))&0x90)==0x00) // IMPMBD12[SZ] == 0x00 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2B0+0x40))&0x90)==0x80) // IMPMBD12[SZ] == 0x80 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2B0+0x40))&0x90)==0x10) // IMPMBD12[SZ] == 0x10 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD12[SZ] == 0x90 group.long 0x2B0++0x3 line.long 0x00 "IMPMBA12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2B4+0x40))&0x90)==0x00) // IMPMBD13[SZ] == 0x00 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2B4+0x40))&0x90)==0x80) // IMPMBD13[SZ] == 0x80 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2B4+0x40))&0x90)==0x10) // IMPMBD13[SZ] == 0x10 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD13[SZ] == 0x90 group.long 0x2B4++0x3 line.long 0x00 "IMPMBA13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2B8+0x40))&0x90)==0x00) // IMPMBD14[SZ] == 0x00 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2B8+0x40))&0x90)==0x80) // IMPMBD14[SZ] == 0x80 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2B8+0x40))&0x90)==0x10) // IMPMBD14[SZ] == 0x10 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD14[SZ] == 0x90 group.long 0x2B8++0x3 line.long 0x00 "IMPMBA14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2BC+0x40))&0x90)==0x00) // IMPMBD15[SZ] == 0x00 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2BC+0x40))&0x90)==0x80) // IMPMBD15[SZ] == 0x80 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFFC80000+0x2BC+0x40))&0x90)==0x10) // IMPMBD15[SZ] == 0x10 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else // IMPMBD15[SZ] == 0x90 group.long 0x2BC++0x3 line.long 0x00 "IMPMBA15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFFC80000+0x2C0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2C0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2C0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C0++0x3 line.long 0x00 "IMPMBD0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2C4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2C4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2C4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C4++0x3 line.long 0x00 "IMPMBD1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2C8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2C8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2C8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2C8++0x3 line.long 0x00 "IMPMBD2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2CC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2CC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2CC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2CC++0x3 line.long 0x00 "IMPMBD3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2D0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2D0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2D0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D0++0x3 line.long 0x00 "IMPMBD4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2D4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2D4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2D4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D4++0x3 line.long 0x00 "IMPMBD5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2D8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2D8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2D8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2D8++0x3 line.long 0x00 "IMPMBD6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2DC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2DC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2DC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2DC++0x3 line.long 0x00 "IMPMBD7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2E0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2E0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2E0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E0++0x3 line.long 0x00 "IMPMBD8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2E4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2E4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2E4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E4++0x3 line.long 0x00 "IMPMBD9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2E8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2E8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2E8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2E8++0x3 line.long 0x00 "IMPMBD10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2EC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2EC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2EC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2EC++0x3 line.long 0x00 "IMPMBD11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2F0))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2F0))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2F0))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F0++0x3 line.long 0x00 "IMPMBD12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2F4))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2F4))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2F4))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F4++0x3 line.long 0x00 "IMPMBD13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2F8))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2F8))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2F8))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2F8++0x3 line.long 0x00 "IMPMBD14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFFC80000+0x2FC))&0x90)==0x00) // THIS[SZ] == 0x00 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2FC))&0x90)==0x80) // THIS[SZ] == 0x80 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFFC80000+0x2FC))&0x90)==0x10) // THIS[SZ] == 0x10 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else // THIS[SZ] == 0x90 group.long 0x2FC++0x3 line.long 0x00 "IMPMBD15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical Page Number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper Physical Page Number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page Size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x3 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" rgroup.long 0x20C++0x3 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x3 line.long 0x00 "IMUCTR0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x300+0x08)++0x3 line.long 0x00 "IMUASID0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x310++0x3 line.long 0x00 "IMUCTR1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x310+0x08)++0x3 line.long 0x00 "IMUASID1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x320++0x3 line.long 0x00 "IMUCTR2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x320+0x08)++0x3 line.long 0x00 "IMUASID2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x330++0x3 line.long 0x00 "IMUCTR3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x330+0x08)++0x3 line.long 0x00 "IMUASID3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x340++0x3 line.long 0x00 "IMUCTR4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x340+0x08)++0x3 line.long 0x00 "IMUASID4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x350++0x3 line.long 0x00 "IMUCTR5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x350+0x08)++0x3 line.long 0x00 "IMUASID5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x360++0x3 line.long 0x00 "IMUCTR6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x360+0x08)++0x3 line.long 0x00 "IMUASID6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x370++0x3 line.long 0x00 "IMUCTR7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x370+0x08)++0x3 line.long 0x00 "IMUASID7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x380++0x3 line.long 0x00 "IMUCTR8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x380+0x08)++0x3 line.long 0x00 "IMUASID8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x390++0x3 line.long 0x00 "IMUCTR9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x390+0x08)++0x3 line.long 0x00 "IMUASID9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3A0++0x3 line.long 0x00 "IMUCTR10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x3 line.long 0x00 "IMUASID10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3B0++0x3 line.long 0x00 "IMUCTR11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x3 line.long 0x00 "IMUASID11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3C0++0x3 line.long 0x00 "IMUCTR12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x3 line.long 0x00 "IMUASID12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3D0++0x3 line.long 0x00 "IMUCTR13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x3 line.long 0x00 "IMUASID13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3E0++0x3 line.long 0x00 "IMUCTR14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x3 line.long 0x00 "IMUASID14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x3F0++0x3 line.long 0x00 "IMUCTR15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x3 line.long 0x00 "IMUASID15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x400++0x3 line.long 0x00 "IMUCTR16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x400+0x08)++0x3 line.long 0x00 "IMUASID16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x410++0x3 line.long 0x00 "IMUCTR17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x410+0x08)++0x3 line.long 0x00 "IMUASID17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x420++0x3 line.long 0x00 "IMUCTR18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x420+0x08)++0x3 line.long 0x00 "IMUASID18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x430++0x3 line.long 0x00 "IMUCTR19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x430+0x08)++0x3 line.long 0x00 "IMUASID19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x440++0x3 line.long 0x00 "IMUCTR20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x440+0x08)++0x3 line.long 0x00 "IMUASID20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x450++0x3 line.long 0x00 "IMUCTR21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x450+0x08)++0x3 line.long 0x00 "IMUASID21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x460++0x3 line.long 0x00 "IMUCTR22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x460+0x08)++0x3 line.long 0x00 "IMUASID22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x470++0x3 line.long 0x00 "IMUCTR23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x470+0x08)++0x3 line.long 0x00 "IMUASID23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x480++0x3 line.long 0x00 "IMUCTR24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x480+0x08)++0x3 line.long 0x00 "IMUASID24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x490++0x3 line.long 0x00 "IMUCTR25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x490+0x08)++0x3 line.long 0x00 "IMUASID25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4A0++0x3 line.long 0x00 "IMUCTR26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x3 line.long 0x00 "IMUASID26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4B0++0x3 line.long 0x00 "IMUCTR27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x3 line.long 0x00 "IMUASID27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4C0++0x3 line.long 0x00 "IMUCTR28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x3 line.long 0x00 "IMUASID28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4D0++0x3 line.long 0x00 "IMUCTR29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x3 line.long 0x00 "IMUASID29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4E0++0x3 line.long 0x00 "IMUCTR30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x3 line.long 0x00 "IMUASID30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" group.long 0x4F0++0x3 line.long 0x00 "IMUCTR31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32] " bitfld.long 0x00 4.--7. " TTSEL ,Translation Table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " bitfld.long 0x00 1. " FLUSH ,Micro-TLB Invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address Translation Enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x3 line.long 0x00 "IMUASID31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID0 ,ASID0" tree.end width 0xB tree.end tree.end tree "LBSC within Bus Bridge" base ad:0xFEC00200 width 12. group.long 0x200++0x07 line.long 0x00 "CS0CTRL,Area 0 Control Register" sif ((cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77420")||(cpu()=="R8A77470")||(cpu()=="R8A77440")) rbitfld.long 0x00 8. " 128B ,Area 0 capacity indication (Mbytes)" "64,128" rbitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " elif (cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*"))||(cpuis("R8A77960*"))||(cpuis("R8A77990*")) rbitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " else bitfld.long 0x00 15. " ENDIAN ,Endian indication" "Big,Little" bitfld.long 0x00 8. " 128B ,Area 0 capacity indication (Mbytes)" "64,128" bitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " endif bitfld.long 0x00 0.--1. " CS0IF ,Area 0 interface select" "Standard,Burst ROM,?..." line.long 0x04 "CS1CTRL,Area 1 Control Register" bitfld.long 0x04 4.--5. " CS1SZ ,Area 1 bus size selection (bits)" ",8,16,?..." bitfld.long 0x04 2. " CS1BRM ,Area 1 byte-control SRAM mode selection" "/CS,/RD" textline " " sif ((cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||cpuis("R8A77960*")||cpuis("R8A77990*")||(cpu()=="R8A77470")) bitfld.long 0x04 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x04 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") if (((per.l(ad:0xFEC00200+0x200+0x8))&0x3)==0x01) group.long (0x200+0x8)++0x03 line.long 0x00 "ECS0CTRL,Expansion Area 0 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS0CP ,Expansion area 0 capacity setting" bitfld.long 0x00 4.--5. " ECS0SZ ,Expansion area 0 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS0BRM ,Expansion area 0 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS0IF ,Expansion area 0 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x8)++0x03 line.long 0x00 "ECS0CTRL,Expansion Area 0 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS0CP ,Expansion area 0 capacity setting" bitfld.long 0x00 4.--5. " ECS0SZ ,Expansion area 0 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS0IF ,Expansion area 0 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0xC))&0x3)==0x01) group.long (0x200+0xC)++0x03 line.long 0x00 "ECS1CTRL,Expansion Area 1 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS1CP ,Expansion area 1 capacity setting" bitfld.long 0x00 4.--5. " ECS1SZ ,Expansion area 1 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS1BRM ,Expansion area 1 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS1IF ,Expansion area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0xC)++0x03 line.long 0x00 "ECS1CTRL,Expansion Area 1 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS1CP ,Expansion area 1 capacity setting" bitfld.long 0x00 4.--5. " ECS1SZ ,Expansion area 1 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS1IF ,Expansion area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x10))&0x3)==0x01) group.long (0x200+0x10)++0x03 line.long 0x00 "ECS2CTRL,Expansion Area 2 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS2CP ,Expansion area 2 capacity setting" bitfld.long 0x00 4.--5. " ECS2SZ ,Expansion area 2 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS2BRM ,Expansion area 2 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS2IF ,Expansion area 2 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x10)++0x03 line.long 0x00 "ECS2CTRL,Expansion Area 2 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS2CP ,Expansion area 2 capacity setting" bitfld.long 0x00 4.--5. " ECS2SZ ,Expansion area 2 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS2IF ,Expansion area 2 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x14))&0x3)==0x01) group.long (0x200+0x14)++0x03 line.long 0x00 "ECS3CTRL,Expansion Area 3 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS3CP ,Expansion area 3 capacity setting" bitfld.long 0x00 4.--5. " ECS3SZ ,Expansion area 3 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS3BRM ,Expansion area 3 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS3IF ,Expansion area 3 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x14)++0x03 line.long 0x00 "ECS3CTRL,Expansion Area 3 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS3CP ,Expansion area 3 capacity setting" bitfld.long 0x00 4.--5. " ECS3SZ ,Expansion area 3 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS3IF ,Expansion area 3 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x18))&0x3)==0x01) group.long (0x200+0x18)++0x03 line.long 0x00 "ECS4CTRL,Expansion Area 4 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS4CP ,Expansion area 4 capacity setting" bitfld.long 0x00 4.--5. " ECS4SZ ,Expansion area 4 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS4BRM ,Expansion area 4 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS4IF ,Expansion area 4 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x18)++0x03 line.long 0x00 "ECS4CTRL,Expansion Area 4 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS4CP ,Expansion area 4 capacity setting" bitfld.long 0x00 4.--5. " ECS4SZ ,Expansion area 4 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS4IF ,Expansion area 4 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x1C))&0x3)==0x01) group.long (0x200+0x1C)++0x03 line.long 0x00 "ECS5CTRL,Expansion Area 5 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS5CP ,Expansion area 5 capacity setting" bitfld.long 0x00 4.--5. " ECS5SZ ,Expansion area 5 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS5BRM ,Expansion area 5 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS5IF ,Expansion area 5 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x1C)++0x03 line.long 0x00 "ECS5CTRL,Expansion Area 5 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS5CP ,Expansion area 5 capacity setting" bitfld.long 0x00 4.--5. " ECS5SZ ,Expansion area 5 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS5IF ,Expansion area 5 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif endif sif ((cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(cpu()!="R8A77940")&&(cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77990*"))&&(!cpuis("R8A77965*"))&&(cpu()!="R8A77470")&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450")&&(cpu()!="R8A77440")) group.long 0x220++0x03 line.long 0x00 "CS0CTRL2,Area 0 Control 2 Register" hexmask.long.byte 0x00 8.--14. 1. " CS0CP ,Area 0 capacity setting" endif textline " " group.long 0x230++0x07 line.long 0x00 "CSWCR0,Area 0 RD/WE Pulse Control Register" sif ((cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77440")) bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x04 "CSWCR1,Area 1 RD/WE Pulse Control Register" sif ((cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77440")) bitfld.long 0x04 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x04 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") group.long 0x238++0x03 line.long 0x00 "ECSWCR0,Expansion Area 0 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x23C++0x03 line.long 0x00 "ECSWCR1,Expansion Area 1 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x240++0x03 line.long 0x00 "ECSWCR2,Expansion Area 2 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x244++0x03 line.long 0x00 "ECSWCR3,Expansion Area 3 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x248++0x03 line.long 0x00 "ECSWCR4,Expansion Area 4 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x24C++0x03 line.long 0x00 "ECSWCR5,Expansion Area 5 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x0)++0x03 line.long 0x00 "EXDMAWCR0,LBSC-DMAC Channel 0 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x4)++0x03 line.long 0x00 "EXDMAWCR1,LBSC-DMAC Channel 1 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x8)++0x03 line.long 0x00 "EXDMAWCR2,LBSC-DMAC Channel 2 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif textline " " group.long 0x280++0x7 line.long 0x00 "CSPWCR0,Area 0 External Wait Control Register" bitfld.long 0x00 5. " V ,Area 0 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external Wait signal polarity" "Not inverted,Inverted" textline " " endif else bitfld.long 0x00 4. " RB ,Area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWT2 ,Area 0 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWT1 ,Area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif line.long 0x04 "CSPWCR1,Area 1 External Wait Control Register" bitfld.long 0x04 5. " V ,Area 1 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif else bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x04 2. " EXWT2 ,Area 1 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " EXWT1 ,Area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " elif (cpu()=="R8A77470") bitfld.long 0x04 1. " EXWT1 ,Area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif sif ((!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77990*"))&&(!cpuis("R8A77965*"))&&(cpu()!="R8A77470")) group.long (0x288+0x0)++0x03 line.long 0x00 "ECSPWCR0,Expansion Area 0 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 0 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 0 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 0 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 0 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x4)++0x03 line.long 0x00 "ECSPWCR1,Expansion Area 1 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 1 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 1 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 1 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x8)++0x03 line.long 0x00 "ECSPWCR2,Expansion Area 2 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 2 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 2 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 2 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 2 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 2 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 2 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 2 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 2 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 2 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0xC)++0x03 line.long 0x00 "ECSPWCR3,Expansion Area 3 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 3 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 3 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 3 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 3 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 3 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 3 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 3 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 3 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 3 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x10)++0x03 line.long 0x00 "ECSPWCR4,Expansion Area 4 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 4 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 4 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 4 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 4 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 4 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 4 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 4 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 4 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 4 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x14)++0x03 line.long 0x00 "ECSPWCR5,Expansion Area 5 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 5 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 5 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 5 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 5 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 5 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 5 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 5 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 5 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 5 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif endif group.long 0x2A0++0x03 line.long 0x00 "EXWTSYNC,External Wait Input Control Register" sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")&&(!cpuis("R8A77970*")))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWTSYNC2 ,EX_WAIT[2] synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 1. " EXWTSYNC1 ,EX_WAIT[1] synchronize" "Not synchronized,Synchronized" textline " " bitfld.long 0x00 0. " EXWTSYNC0 ,EX_WAIT[0] synchronize" "Not synchronized,Synchronized" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWTSYNC1 ,EX_WAIT[1] synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 0. " EXWTSYNC0 ,EX_WAIT[0] synchronize" "Not synchronized,Synchronized" textline " " endif if (((per.l(ad:0xFEC00200+0x200))&0x03)==0x01) group.long 0x2B0++0x03 line.long 0x00 "CS0BSTCTL,Area 0 Burst Control Register" bitfld.long 0x00 11.--13. " A0BST ,Area 0 burst length for burst ROM interface" "No transfer,4,8,16,32,No transfer,No transfer,No transfer" else hgroup.long 0x2B0++0x03 hide.long 0x00 "CS0BSTCTL,Area 0 Burst Control Register" endif textline " " group.long 0x2B4++0x03 line.long 0x00 "CS0BTPH,Area 0 Burst Pitch Set Register" bitfld.long 0x00 8. " A0H ,/CS and address hold cycles with respect to the /RD signal for area 0" "0,1" bitfld.long 0x00 4.--7. " A0W ,Burst pitch after the first burst cycle for area 0" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " A0B ,Burst pitch after the second burst cycle for area 0" ",1,2,3,4,5,6,7" group.long 0x2C0++0x3 line.long 0x00 "CS1GDST,Area 1 Guard Set Register" bitfld.long 0x00 4. " CS1GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Area 1 guard interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif ((!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))) sif (cpu()!="R8A77470") group.long 0x2C4++0x03 line.long 0x00 "ECS0GDST,Expansion Area 0 Guard Set Register" bitfld.long 0x00 4. " ECS0GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 0 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2C8++0x03 line.long 0x00 "ECS1GDST,Expansion Area 1 Guard Set Register" bitfld.long 0x00 4. " ECS1GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 1 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2CC++0x03 line.long 0x00 "ECS2GDST,Expansion Area 2 Guard Set Register" bitfld.long 0x00 4. " ECS2GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 2 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D0++0x03 line.long 0x00 "ECS3GDST,Expansion Area 3 Guard Set Register" bitfld.long 0x00 4. " ECS3GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 3 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D4++0x03 line.long 0x00 "ECS4GDST,Expansion Area 4 Guard Set Register" bitfld.long 0x00 4. " ECS4GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 4 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D8++0x03 line.long 0x00 "ECS5GDST,Expansion Area 5 Guard Set Register" bitfld.long 0x00 4. " ECS5GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 5 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x2F0+0x0)++0x03 line.long 0x00 "EXDMASET0,LBSC-DMAC Channel 0 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 0 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 0 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 0 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 0 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 0 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 0 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 0 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 0 to area 0 assign" "Not assigned,Assigned" group.long (0x2F0+0x4)++0x03 line.long 0x00 "EXDMASET1,LBSC-DMAC Channel 1 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 1 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 1 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 1 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 1 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 1 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 1 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 1 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 1 to area 0 assign" "Not assigned,Assigned" group.long (0x2F0+0x8)++0x03 line.long 0x00 "EXDMASET2,LBSC-DMAC Channel 2 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 2 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 2 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 2 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 2 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 2 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 2 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 2 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 2 to area 0 assign" "Not assigned,Assigned" textline " " group.long (0x310+0x0)++0x03 line.long 0x00 "EXDMCR0,LBSC-DMAC Channel 0 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[0] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[0] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[0] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[0] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 0 is assigned" "/CS & DACK[0],/CS,DACK[0],/CS & DACK[0]" group.long (0x310+0x4)++0x03 line.long 0x00 "EXDMCR1,LBSC-DMAC Channel 1 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[1] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[1] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[1] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[1] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 1 is assigned" "/CS & DACK[1],/CS,DACK[1],/CS & DACK[1]" group.long (0x310+0x8)++0x03 line.long 0x00 "EXDMCR2,LBSC-DMAC Channel 2 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[2] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[2] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[2] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[2] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 2 is assigned" "/CS & DACK[2],/CS,DACK[2],/CS & DACK[2]" endif rgroup.long 0x330++0x03 line.long 0x00 "BCINTSR,BSC Interrupt Source Status Register" bitfld.long 0x00 1. " EXWTE ,EX-BUS wait timeout error status" "No error,Error" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") bitfld.long 0x00 0. " ATTE ,ATA wait timeout error status" "No error,Error" endif wgroup.long 0x334++0x03 line.long 0x00 "BCINTCR,BSC Interrupt Source Clear Register" bitfld.long 0x00 1. " EXWTEC ,EX-BUS wait timeout error status clear" "No effect,Clear" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")&&(cpu()!="R8A77440") bitfld.long 0x00 0. " ATTEC ,ATA wait timeout error status clear" "No effect,Clear" endif group.long 0x338++0x03 line.long 0x00 "BCINTMR,BSC Interrupt Enable Register" bitfld.long 0x00 1. " EXWTEM ,EX-BUS wait timeout error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") bitfld.long 0x00 0. " ATTEM ,ATA wait timeout error interrupt enable" "Disabled,Enabled" endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*")) group.long 0x340++0x03 line.long 0x00 "EXBATLV,EX_BUS Priority Level Set Register" bitfld.long 0x00 0. " EX-BLV ,Priority level setting for EX_BUS arbitration (higher/lower)" "PIO/LBSC-DMAC,LBSC-DMAC/PIO" endif textline " " rgroup.long 0x344++0x03 line.long 0x00 "EXWTSTS,External Wait Status Register" sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWT2STS ,Indicates the EX_WAIT2 pin state" "Low,High" bitfld.long 0x00 1. " EXWT1STS ,Indicates the EX_WAIT1 pin state" "Low,High" bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWT1STS ,Indicates the EX_WAIT1 pin state" "Low,High" bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " else bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) group.long 0x380++0x03 line.long 0x00 "ATACSCTRL,ATACS Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 6. " ATAECS5_EN ,ATACS signal at area 5 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 5. " ATAECS4_EN ,ATACS signal at area 4 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 4. " ATAECS3_EN ,ATACS signal at area 3 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 3. " ATAECS2_EN ,ATACS signal at area 2 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 2. " ATAECS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 1. " ATAECS0_EN ,ATACS signal at area 0 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 0. " ATACS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" textline " " else bitfld.long 0x00 5. " ATAECS5_EN ,ATACS signal at area 5 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 4. " ATAECS4_EN ,ATACS signal at area 4 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 3. " ATAECS3_EN ,ATACS signal at area 3 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 2. " ATAECS2_EN ,ATACS signal at area 2 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 1. " ATAECS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 0. " ATAECS0_EN ,ATACS signal at area 0 in ATA mode" "ATACS0,ATACS1" endif endif group.long 0x3C0++0x07 line.long 0x00 "EXBCT,EX-BUS Wait Timeout Detection Base Counter Register" hexmask.long.byte 0x00 24.--31. 1. " EXWB_KEY ,EX-BUS wait timeout detection base counter register write key" hexmask.long.tbyte 0x00 0.--19. 1. " EXW_TOBCNT ,EX-BUS wait timeout counter setting" line.long 0x04 "EXTCT,EX-BUS Wait Timeout Detection Counter Register" hexmask.long.byte 0x04 24.--31. 1. " EXWB_KEY ,EX-BUS wait timeout detection counter register write key" bitfld.long 0x04 16. " EXW_TOEN ,EX-BUS wait timeout enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " EXW_TOCNT ,EX-BUS wait timeout counter setting" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" eventfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from superHyway" "No timeout,Timeout" eventfld.long 0x00 2. " EXW_TODC2 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 2" "No timeout,Timeout" eventfld.long 0x00 1. " EXW_TODC1 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 1" "No timeout,Timeout" textline " " eventfld.long 0x00 0. " EXW_TODC0 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 0" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" elif cpuis("R8J7795*")||cpuis("R8A7795*")||cpu()==("R8A77970")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*")) group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" eventfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from SuperHyway" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" else group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" bitfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from SuperHyway" "No timeout,Timeout" bitfld.long 0x00 2. " EXW_TODC2 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 2" "No timeout,Timeout" bitfld.long 0x00 1. " EXW_TODC1 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 1" "No timeout,Timeout" textline " " bitfld.long 0x00 0. " EXW_TODC0 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 0" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" endif width 0x0B tree.end tree.open "DBSC3 (DDR3-SDRAM Interface)" tree "DBSC3 0" base ad:0xE6790000 width 14. sif cpu()=="R8A77940" hgroup.long 0x0C++0x03 hide.long 0x00 "DBSTATE_1,DBSC3 status register 1" else rgroup.long 0x0C++0x03 line.long 0x00 "DBSTATE_1,DBSC3 status register 1" bitfld.long 0x00 16.--17. " THRML ,External Temperature Sensor" "Higher than -10 C,Higher/lower than -15 C/-10 C,,-15 C or lower" endif group.long 0x10++0x07 line.long 0x00 "DBACEN,SDRAM access enable register" bitfld.long 0x00 0. " ACCEN ,SDRAM Access Enable" "Disabled,Enabled" line.long 0x04 "DBRFEN,Auto-refresh enable register" bitfld.long 0x04 0. " ARFEN ,Auto-Refresh Enable" "Stop,Start" if ((((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x28000000)||(((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x29000000)||(((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x2A000000)||(((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x2B000000)) group.long 0x18++0x03 line.long 0x00 "DBCMD,Manual command-issuing register" bitfld.long 0x00 24.--29. " OPC ,Operation Code" "Device Deselected Issued,,ZQ Calibration Short Issued,ZQ Calibration Long Issued,,,,,,,,Precharge All Issued,Refresh Issued,,,,Power Down Entry,Power Down Exit,,,,,,,Self-Refresh Entry,Self-Refresh Exit,,,,,,,Set Reset Pins to Low,Set Reset Pins to High,,,,,,,ModeRegisterSet 0 Issued,ModeRegisterSet 1 Issued,ModeRegisterSet 2 Issued,ModeRegisterSet 3 Issued,?..." hexmask.long.word 0x00 0.--15. 1. " ARG ,Parameter Bits - value to be issued on the address pins (MA) of SDRAM" else group.long 0x18++0x03 line.long 0x00 "DBCMD,Manual command-issuing register" bitfld.long 0x00 24.--29. " OPC ,Operation Code" "Device Deselected Issued,,ZQ Calibration Short Issued,ZQ Calibration Long Issued,,,,,,,,Precharge All Issued,Refresh Issued,,,,Power Down Entry,Power Down Exit,,,,,,,Self-Refresh Entry,Self-Refresh Exit,,,,,,,Set Reset Pins to Low,Set Reset Pins to High,,,,,,,ModeRegisterSet 0 Issued,ModeRegisterSet 1 Issued,ModeRegisterSet 2 Issued,ModeRegisterSet 3 Issued,?..." hexmask.long.word 0x00 0.--15. 1. " ARG ,Parameter Bits - minimum interval to issuing of the next command in SDRAM cycles" endif rgroup.long 0x1C++0x03 line.long 0x00 "DBWAIT,Operation completion waiting register" bitfld.long 0x00 0. " WAIT ,Operation Completion Waiting" "Low,High" group.long 0x20++0x07 line.long 0x00 "DBKIND,SDRAM type setting register" bitfld.long 0x00 0.--2. " DDCG ,SDRAM Kind" ",,,,,,,DDR3-SDRAM" line.long 0x04 "DBCONF_0,SDRAM configuration setting register 0" bitfld.long 0x04 24.--28. " AWRW0 ,Row Address Bit Width Setting" ",,,,,,,,,,,,12 bits,13 bits,14 bits,15 bits,16 bits,?..." bitfld.long 0x04 20. " AWRK0 ,Number of Ranks Setting" "One rank,?..." textline " " bitfld.long 0x04 16.--17. " AWBK0 ,Number of Banks Setting" ",,,Eight banks" bitfld.long 0x04 8.--11. " AWCL0 ,Column Address Bit Width Setting" ",,,,,,,,,9 bits,10 bits,?..." textline " " bitfld.long 0x04 0.--1. " DW0 ,External Data Bus Width Setting" ",16 bits,32 bits,?..." group.long 0x30++0x3 line.long 0x00 "DBPHYTYPE,PHY Type Setting Register" bitfld.long 0x00 0.--1. " PHYTYPE ,PHY Type Setting Bits" ",DFI,?..." group.long 0x40++0x0B line.long 0x00 "DBTR_0,SDRAM Timing Register 0" bitfld.long 0x00 0.--3. " CL ,CAS Latency Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x04 "DBTR_1,SDRAM Timing Register 1" bitfld.long 0x04 0.--3. " CWL ,CAS Write Latency Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,?..." line.long 0x08 "DBTRv2,SDRAM Timing Register 2" bitfld.long 0x08 0.--3. " AL ,Additive Latency Setting" "0 cycles,?..." group.long 0x50++0x43 line.long 0x00 "DBTR_3,SDRAM Timing Register 3" bitfld.long 0x00 0.--4. " TRCD ,ACT to READ/ACT to WRITE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x04 "DBTR_4,SDRAM Timing Register 4" bitfld.long 0x04 16.--20. " TRPA ,PREA Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.long 0x04 0.--4. " TRP ,PRE Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x08 "DBTR_5,SDRAM Timing Register 5" bitfld.long 0x08 0.--5. " TRC ,ACT to ACT/ACT to REF Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" line.long 0x0C "DBTR_6,SDRAM Timing Register 6" bitfld.long 0x0C 0.--5. " TRAS ,ACT to PRE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,?..." line.long 0x10 "DBTR_7,SDRAM Timing Register 7" bitfld.long 0x10 0.--3. " TRRD ,ACT(A) to ACT(B) Interval Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x14 "DBTR_8,SDRAM Timing Register 8" hexmask.long.byte 0x14 0.--7. 1. " TFAW ,Four Activate Window Length Setting" line.long 0x18 "DBTR_9,SDRAM Timing Register 9" bitfld.long 0x18 0.--3. " TRDPR ,READ-PRE Interval Setting" ",,,,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x1C "DBTR_10,SDRAM Timing Register 10" bitfld.long 0x1C 0.--3. " TWR ,Write-Recovery Period Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x20 "DBTR_11,SDRAM Timing Register 11" bitfld.long 0x20 0.--5. " TRDWR ,READ to WRITE Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,?..." line.long 0x24 "DBTR_12,SDRAM Timing Register 12" bitfld.long 0x24 0.--5. " TWRRD ,WRITE to READ Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,?..." line.long 0x28 "DBTR_13,SDRAM Timing Register 13" hexmask.long.word 0x28 0.--11. 1. " TRFC ,REF to ACT/ACT to REF Interval Setting" line.long 0x2C "DBTR_14,SDRAM Timing Register 14" hexmask.long.byte 0x2C 16.--23. 1. " TCKEHDLL ,CKEH (DLL-LOCK) Period Setting" hexmask.long.byte 0x2C 0.--7. 1. " TCKEH ,CKEH Period Setting" line.long 0x30 "DBTR_15,SDRAM Timing Register 15" bitfld.long 0x30 16.--19. " TCKESR ,CKESR Period Setting Bits" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.long 0x30 0.--3. " TCKEL ,CKEL Period Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x34 "DBTR_16,SDRAM Timing Register 16" bitfld.long 0x34 28.--31. " DQIENLTNCY ,Dqienltncy Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." bitfld.long 0x34 16.--21. " DQL ,Dqltncy Setting" ",,,,,,,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" textline " " bitfld.long 0x34 12.--15. " DQENLTNCY ,Dqenltncy Setting" "0 cycles,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,?..." bitfld.long 0x34 0.--3. " WDQL ,Wdqltncy Setting" ",One cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." line.long 0x38 "DBTR_17,SDRAM Timing Register 17" bitfld.long 0x38 16.--21. " TMOD ,MRS Time Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,14 cycles,15 cycles,?..." line.long 0x3C "DBTR_18,SDRAM Timing Register 18" bitfld.long 0x3C 24.--26. " RODTL ,ODT Assert Period Setting at Read" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 16.--18. " RODTA ,ODT Assert Start Timing Setting Bits Read" "Simultaneous with the read,One cycle after the read,Two cycles after the read,Three cycles after the read,?..." textline " " bitfld.long 0x3C 8.--10. " WODTL ,ODT Assert Period Setting at Write" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 0.--2. " WODTA ,ODT Assert Start Timing Setting at Write" "Simultaneous with the read,1 cycle after the read,2 cycles after the read,3 cycles after the read,?..." line.long 0x40 "DBTR_19,SDRAM Timing Register 19" hexmask.long.byte 0x40 0.--7. 1. " TZQCS ,Calibration Period Setting" group.long 0xB0++0x3 line.long 0x00 "DBBL,SDRAM operation setting register" bitfld.long 0x00 0.--1. " BL ,Burst Length Setting" "Fixed to 8,?..." group.long 0xC0++0x3 line.long 0x00 "DBADJ_0,DBSC3 operation adjustment register 0" bitfld.long 0x00 16.--17. " FREQRATIO ,PHY Frequency Ratio Setting Bits" ",,1:4,?..." bitfld.long 0x00 0. " CAMODE ,Command/Address Output Mode Setting" ",1 command output in 2 clock cycle" group.long 0xC8++0x3 line.long 0x00 "DBADJ_2,DBSC3 operation adjustment register 2" hexmask.long.byte 0x00 24.--31. 1. " ACAPC1 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" bitfld.long 0x00 16.--19. " ACAPX1 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,,,,,8 transactions,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " ACAPC0 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" bitfld.long 0x00 0.--3. " ACAPX0 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,,,,,8 transactions,?..." group.long 0xE0++0xB line.long 0x00 "DBRFCNF_0,Refresh configuration register 0" hexmask.long.word 0x00 0.--11. 1. " REFTHF ,Forcible Auto-Refresh Threshold Setting" line.long 0x04 "DBRFCNF_1,Refresh configuration register 1" bitfld.long 0x04 16.--19. " REFPMAX ,Maximum Post Number of Refresh Commands Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." hexmask.long.word 0x04 0.--15. 1. " REFINT ,Average Refresh Interval Setting" line.long 0x08 "DBRFCNF_2,Refresh configuration register 2" bitfld.long 0x08 16.--19. " REFPMIN ,Minimum Post Number of Refresh Commands Setting Bits" ",1,?..." bitfld.long 0x08 0. " REFINTS ,Average Refresh Interval Adjustment" "REFINT,1/2 REFINT" group.long 0xF4++0x7 line.long 0x00 "DBCALCNF,DDR3-SDRAM calibration configuration register" bitfld.long 0x00 24. " CALEN ,DDR3-SDRAM Calibration Enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " CALINT ,DDR3-SDRAM Calibration Frequency Setting Bits" line.long 0x04 "DBCALTR,DDR3-SDRAM calibration timing register" hexmask.long.word 0x04 16.--27. 1. " TCALRZ ,DDR3-SDRAM Calibration Timing Setting (REF to ZQCS Interval)" hexmask.long.word 0x04 0.--11. 1. " TCALZR ,DDR3-SDRAM Calibration Timing Setting (ZQCS to REF Interval)" group.long 0x100++0x03 line.long 0x00 "DBRNK_0,ODT operation setting register" bitfld.long 0x00 16. " RODTOUT0 ,Bit for ODT Output Level Setting at Read" "Level set to 0,Level set to 1" bitfld.long 0x00 0. " WODTOUT0 ,Bit for ODT Output Level Setting at Write" "Level set to 0,Level set to 1" group.long 0x180++0x03 line.long 0x00 "DBPDNCNF,Power-down configuration register" hexmask.long.byte 0x00 8.--15. 1. " PDWAIT ,Power-Down Wait" bitfld.long 0x00 4. " PDDLL ,Power-Down DLL Control" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " PDMODE ,Power-Down Mode" "Disabled,Power-down,Self-refresh,?..." rgroup.long 0x240++0x3 line.long 0x00 "DBDFISTAT,DFI Status IF Input Register" bitfld.long 0x00 0. " INITCOMPL ,INITCOMPL" "0,1" group.long 0x244++0x3 line.long 0x00 "DBDFICNT,DFI Status IF Output Register" bitfld.long 0x00 4.--5. " FREQRATIO ,Frequence ratio" ",Clk freqratio,?..." bitfld.long 0x00 0. " INITSTART ,Init start" "0,1" group.long 0x280++0x3 line.long 0x00 "DBPDLCK,PHY Unit Lock Register" hexmask.long.word 0x00 0.--15. 1. " PLOCK ,PHY Unit Access Lock Setting" group.long 0x290++0x3 line.long 0x00 "DBPDRGA,PHY Unit Address Register" hexmask.long.word 0x00 0.--15. 1. " PRA ,PHY Unit Address Register" group.long 0x2A0++0x3 line.long 0x00 "DBPDRGD,PHY Unit Access Register" group.long 0x304++0x3 line.long 0x00 "DBBS0CNT_1,Bus control unit 0 control register 1" bitfld.long 0x00 0.--1. " BKADM ,Bank Assignment Setting" "One block,Two blocks,Three blocks,Four blocks" if (((per.l(ad:0xE6790000+0x380))&0x70000)==0x20000) group.long 0x380++0x3 line.long 0x00 "DBWT_0_CNF_0,AXI Port Setting Register 0" bitfld.long 0x00 16.--18. " WASYN ,WASYN" ",,2,?..." bitfld.long 0x00 0.--2. " WCN ,AXI Clock to Memory Clock Ratio Setting Bits" "0.5 MCLKCH1>...>CH14,,,Round-robin" bitfld.long 0x00 2. " AE ,Address Error Flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA Master Enable" "Disabled,Enabled" wgroup.long 0x80++0x3 line.long 0x00 "DMACHCLR_L,DMA Channel Clear Register for Low channel" bitfld.long 0x00 14. " CLR14 ,Channel 14 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR13 ,Channel 13 registers clear" "No clear,Clear" bitfld.long 0x00 12. " CLR12 ,Channel 12 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 11. " CLR11 ,Channel 11 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR10 ,Channel 10 registers clear" "No clear,Clear" bitfld.long 0x00 9. " CLR9 ,Channel 9 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 8. " CLR8 ,Channel 8 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR7 ,Channel 7 registers clear" "No clear,Clear" bitfld.long 0x00 6. " CLR6 ,Channel 6 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 5. " CLR5 ,Channel 5 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR4 ,Channel 4 registers clear" "No clear,Clear" bitfld.long 0x00 3. " CLR3 ,Channel 3 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 2. " CLR2 ,Channel 2 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 registers clear" "No clear,Clear" bitfld.long 0x00 0. " CLR0 ,Channel 0 registers clear" "No clear,Clear" group.long 0xA0++0x3 line.long 0x00 "DMADPSEC_L,DPRAM Secure Control Register for Low channels" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" tree "Channel 0" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x7 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" else group.long 0x8000++0x7 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" endif group.long (0x8000+0x08)++0x3 line.long 0x00 "DMATCR_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8000+0x18)++0x3 line.long 0x00 "DMATCRB_0,DMA Transfer Count Registers B_0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x3 line.long 0x00 "DMATSR_0,DMA Transfer Count Register 0" group.long (0x8000+0x38)++0x3 line.long 0x00 "DMATSRB_0,DMA Transfer Size Register 0" endif if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8000+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8000+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8000+0x1C)++0x3 line.long 0x00 "DMACHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x3 line.long 0x00 "DMABUFCR_0,DMA Buffer Control Register 0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x1 line.word 0x00 "DMARS_0,DMA Extended Resource Selector 0" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "DMADPBASE_0,DMA Descriptor Base Address Register 0" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "DMAFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 1" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x7 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" else group.long 0x8080++0x7 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" endif group.long (0x8080+0x08)++0x3 line.long 0x00 "DMATCR_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8080+0x18)++0x3 line.long 0x00 "DMATCRB_1,DMA Transfer Count Registers B_1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x3 line.long 0x00 "DMATSR_1,DMA Transfer Count Register 1" group.long (0x8080+0x38)++0x3 line.long 0x00 "DMATSRB_1,DMA Transfer Size Register 1" endif if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8080+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8080+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8080+0x1C)++0x3 line.long 0x00 "DMACHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x3 line.long 0x00 "DMABUFCR_1,DMA Buffer Control Register 1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x1 line.word 0x00 "DMARS_1,DMA Extended Resource Selector 1" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "DMADPBASE_1,DMA Descriptor Base Address Register 1" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "DMAFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 2" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x7 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" else group.long 0x8100++0x7 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" endif group.long (0x8100+0x08)++0x3 line.long 0x00 "DMATCR_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8100+0x18)++0x3 line.long 0x00 "DMATCRB_2,DMA Transfer Count Registers B_2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x3 line.long 0x00 "DMATSR_2,DMA Transfer Count Register 2" group.long (0x8100+0x38)++0x3 line.long 0x00 "DMATSRB_2,DMA Transfer Size Register 2" endif if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8100+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8100+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8100+0x1C)++0x3 line.long 0x00 "DMACHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x3 line.long 0x00 "DMABUFCR_2,DMA Buffer Control Register 2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x1 line.word 0x00 "DMARS_2,DMA Extended Resource Selector 2" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "DMADPBASE_2,DMA Descriptor Base Address Register 2" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "DMAFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 3" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x7 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" else group.long 0x8180++0x7 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" endif group.long (0x8180+0x08)++0x3 line.long 0x00 "DMATCR_3,DMA Transfer Count Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8180+0x18)++0x3 line.long 0x00 "DMATCRB_3,DMA Transfer Count Registers B_3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x3 line.long 0x00 "DMATSR_3,DMA Transfer Count Register 3" group.long (0x8180+0x38)++0x3 line.long 0x00 "DMATSRB_3,DMA Transfer Size Register 3" endif if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8180+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8180+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8180+0x1C)++0x3 line.long 0x00 "DMACHCRB_3,DMA Channel Control Register B_3" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x3 line.long 0x00 "DMABUFCR_3,DMA Buffer Control Register 3" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x1 line.word 0x00 "DMARS_3,DMA Extended Resource Selector 3" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x7 line.long 0x00 "DMADPBASE_3,DMA Descriptor Base Address Register 3" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_3,DMA Descriptor Control Register 3" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x7 line.long 0x00 "DMAFIXSAR_3,DMA Fixed Source Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_3,DMA Fixed Destination Address Register 3" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_3,DMA Fixed Descriptor Base Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 4" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x7 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" else group.long 0x8200++0x7 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" endif group.long (0x8200+0x08)++0x3 line.long 0x00 "DMATCR_4,DMA Transfer Count Register 4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8200+0x18)++0x3 line.long 0x00 "DMATCRB_4,DMA Transfer Count Registers B_4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x3 line.long 0x00 "DMATSR_4,DMA Transfer Count Register 4" group.long (0x8200+0x38)++0x3 line.long 0x00 "DMATSRB_4,DMA Transfer Size Register 4" endif if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8200+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8200+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8200+0x1C)++0x3 line.long 0x00 "DMACHCRB_4,DMA Channel Control Register B_4" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x3 line.long 0x00 "DMABUFCR_4,DMA Buffer Control Register 4" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x1 line.word 0x00 "DMARS_4,DMA Extended Resource Selector 4" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x7 line.long 0x00 "DMADPBASE_4,DMA Descriptor Base Address Register 4" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_4,DMA Descriptor Control Register 4" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x7 line.long 0x00 "DMAFIXSAR_4,DMA Fixed Source Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_4,DMA Fixed Destination Address Register 4" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_4,DMA Fixed Descriptor Base Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 5" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x7 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" else group.long 0x8280++0x7 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" endif group.long (0x8280+0x08)++0x3 line.long 0x00 "DMATCR_5,DMA Transfer Count Register 5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8280+0x18)++0x3 line.long 0x00 "DMATCRB_5,DMA Transfer Count Registers B_5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x3 line.long 0x00 "DMATSR_5,DMA Transfer Count Register 5" group.long (0x8280+0x38)++0x3 line.long 0x00 "DMATSRB_5,DMA Transfer Size Register 5" endif if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8280+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8280+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8280+0x1C)++0x3 line.long 0x00 "DMACHCRB_5,DMA Channel Control Register B_5" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x3 line.long 0x00 "DMABUFCR_5,DMA Buffer Control Register 5" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x1 line.word 0x00 "DMARS_5,DMA Extended Resource Selector 5" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x7 line.long 0x00 "DMADPBASE_5,DMA Descriptor Base Address Register 5" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_5,DMA Descriptor Control Register 5" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x7 line.long 0x00 "DMAFIXSAR_5,DMA Fixed Source Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_5,DMA Fixed Destination Address Register 5" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_5,DMA Fixed Descriptor Base Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 6" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x7 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" else group.long 0x8300++0x7 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" endif group.long (0x8300+0x08)++0x3 line.long 0x00 "DMATCR_6,DMA Transfer Count Register 6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8300+0x18)++0x3 line.long 0x00 "DMATCRB_6,DMA Transfer Count Registers B_6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x3 line.long 0x00 "DMATSR_6,DMA Transfer Count Register 6" group.long (0x8300+0x38)++0x3 line.long 0x00 "DMATSRB_6,DMA Transfer Size Register 6" endif if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8300+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8300+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8300+0x1C)++0x3 line.long 0x00 "DMACHCRB_6,DMA Channel Control Register B_6" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x3 line.long 0x00 "DMABUFCR_6,DMA Buffer Control Register 6" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x1 line.word 0x00 "DMARS_6,DMA Extended Resource Selector 6" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x7 line.long 0x00 "DMADPBASE_6,DMA Descriptor Base Address Register 6" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_6,DMA Descriptor Control Register 6" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x7 line.long 0x00 "DMAFIXSAR_6,DMA Fixed Source Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_6,DMA Fixed Destination Address Register 6" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_6,DMA Fixed Descriptor Base Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 7" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x7 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" else group.long 0x8380++0x7 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" endif group.long (0x8380+0x08)++0x3 line.long 0x00 "DMATCR_7,DMA Transfer Count Register 7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8380+0x18)++0x3 line.long 0x00 "DMATCRB_7,DMA Transfer Count Registers B_7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x3 line.long 0x00 "DMATSR_7,DMA Transfer Count Register 7" group.long (0x8380+0x38)++0x3 line.long 0x00 "DMATSRB_7,DMA Transfer Size Register 7" endif if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8380+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8380+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8380+0x1C)++0x3 line.long 0x00 "DMACHCRB_7,DMA Channel Control Register B_7" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x3 line.long 0x00 "DMABUFCR_7,DMA Buffer Control Register 7" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x1 line.word 0x00 "DMARS_7,DMA Extended Resource Selector 7" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x7 line.long 0x00 "DMADPBASE_7,DMA Descriptor Base Address Register 7" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_7,DMA Descriptor Control Register 7" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x7 line.long 0x00 "DMAFIXSAR_7,DMA Fixed Source Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_7,DMA Fixed Destination Address Register 7" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_7,DMA Fixed Descriptor Base Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 8" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x7 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" else group.long 0x8400++0x7 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" endif group.long (0x8400+0x08)++0x3 line.long 0x00 "DMATCR_8,DMA Transfer Count Register 8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8400+0x18)++0x3 line.long 0x00 "DMATCRB_8,DMA Transfer Count Registers B_8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x3 line.long 0x00 "DMATSR_8,DMA Transfer Count Register 8" group.long (0x8400+0x38)++0x3 line.long 0x00 "DMATSRB_8,DMA Transfer Size Register 8" endif if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8400+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8400+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8400+0x1C)++0x3 line.long 0x00 "DMACHCRB_8,DMA Channel Control Register B_8" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x3 line.long 0x00 "DMABUFCR_8,DMA Buffer Control Register 8" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x1 line.word 0x00 "DMARS_8,DMA Extended Resource Selector 8" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x7 line.long 0x00 "DMADPBASE_8,DMA Descriptor Base Address Register 8" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_8,DMA Descriptor Control Register 8" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x7 line.long 0x00 "DMAFIXSAR_8,DMA Fixed Source Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_8,DMA Fixed Destination Address Register 8" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_8,DMA Fixed Descriptor Base Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 9" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x7 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" else group.long 0x8480++0x7 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" endif group.long (0x8480+0x08)++0x3 line.long 0x00 "DMATCR_9,DMA Transfer Count Register 9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8480+0x18)++0x3 line.long 0x00 "DMATCRB_9,DMA Transfer Count Registers B_9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x3 line.long 0x00 "DMATSR_9,DMA Transfer Count Register 9" group.long (0x8480+0x38)++0x3 line.long 0x00 "DMATSRB_9,DMA Transfer Size Register 9" endif if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8480+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8480+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8480+0x1C)++0x3 line.long 0x00 "DMACHCRB_9,DMA Channel Control Register B_9" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x3 line.long 0x00 "DMABUFCR_9,DMA Buffer Control Register 9" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x1 line.word 0x00 "DMARS_9,DMA Extended Resource Selector 9" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x7 line.long 0x00 "DMADPBASE_9,DMA Descriptor Base Address Register 9" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_9,DMA Descriptor Control Register 9" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x7 line.long 0x00 "DMAFIXSAR_9,DMA Fixed Source Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_9,DMA Fixed Destination Address Register 9" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_9,DMA Fixed Descriptor Base Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 10" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x7 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" else group.long 0x8500++0x7 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" endif group.long (0x8500+0x08)++0x3 line.long 0x00 "DMATCR_10,DMA Transfer Count Register 10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8500+0x18)++0x3 line.long 0x00 "DMATCRB_10,DMA Transfer Count Registers B_10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x3 line.long 0x00 "DMATSR_10,DMA Transfer Count Register 10" group.long (0x8500+0x38)++0x3 line.long 0x00 "DMATSRB_10,DMA Transfer Size Register 10" endif if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8500+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8500+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8500+0x1C)++0x3 line.long 0x00 "DMACHCRB_10,DMA Channel Control Register B_10" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x3 line.long 0x00 "DMABUFCR_10,DMA Buffer Control Register 10" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x1 line.word 0x00 "DMARS_10,DMA Extended Resource Selector 10" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x7 line.long 0x00 "DMADPBASE_10,DMA Descriptor Base Address Register 10" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_10,DMA Descriptor Control Register 10" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x7 line.long 0x00 "DMAFIXSAR_10,DMA Fixed Source Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_10,DMA Fixed Destination Address Register 10" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_10,DMA Fixed Descriptor Base Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 11" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x7 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" else group.long 0x8580++0x7 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" endif group.long (0x8580+0x08)++0x3 line.long 0x00 "DMATCR_11,DMA Transfer Count Register 11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8580+0x18)++0x3 line.long 0x00 "DMATCRB_11,DMA Transfer Count Registers B_11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x3 line.long 0x00 "DMATSR_11,DMA Transfer Count Register 11" group.long (0x8580+0x38)++0x3 line.long 0x00 "DMATSRB_11,DMA Transfer Size Register 11" endif if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8580+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8580+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8580+0x1C)++0x3 line.long 0x00 "DMACHCRB_11,DMA Channel Control Register B_11" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x3 line.long 0x00 "DMABUFCR_11,DMA Buffer Control Register 11" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x1 line.word 0x00 "DMARS_11,DMA Extended Resource Selector 11" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x7 line.long 0x00 "DMADPBASE_11,DMA Descriptor Base Address Register 11" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_11,DMA Descriptor Control Register 11" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x7 line.long 0x00 "DMAFIXSAR_11,DMA Fixed Source Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_11,DMA Fixed Destination Address Register 11" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_11,DMA Fixed Descriptor Base Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 12" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x7 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" else group.long 0x8600++0x7 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" endif group.long (0x8600+0x08)++0x3 line.long 0x00 "DMATCR_12,DMA Transfer Count Register 12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8600+0x18)++0x3 line.long 0x00 "DMATCRB_12,DMA Transfer Count Registers B_12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x3 line.long 0x00 "DMATSR_12,DMA Transfer Count Register 12" group.long (0x8600+0x38)++0x3 line.long 0x00 "DMATSRB_12,DMA Transfer Size Register 12" endif if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8600+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8600+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8600+0x1C)++0x3 line.long 0x00 "DMACHCRB_12,DMA Channel Control Register B_12" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x3 line.long 0x00 "DMABUFCR_12,DMA Buffer Control Register 12" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x1 line.word 0x00 "DMARS_12,DMA Extended Resource Selector 12" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x7 line.long 0x00 "DMADPBASE_12,DMA Descriptor Base Address Register 12" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_12,DMA Descriptor Control Register 12" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x7 line.long 0x00 "DMAFIXSAR_12,DMA Fixed Source Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_12,DMA Fixed Destination Address Register 12" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_12,DMA Fixed Descriptor Base Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 13" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x20)++0x7 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" else group.long 0x8680++0x7 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" endif group.long (0x8680+0x08)++0x3 line.long 0x00 "DMATCR_13,DMA Transfer Count Register 13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8680+0x18)++0x3 line.long 0x00 "DMATCRB_13,DMA Transfer Count Registers B_13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x28)++0x3 line.long 0x00 "DMATSR_13,DMA Transfer Count Register 13" group.long (0x8680+0x38)++0x3 line.long 0x00 "DMATSRB_13,DMA Transfer Size Register 13" endif if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8680+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8680+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8680+0x1C)++0x3 line.long 0x00 "DMACHCRB_13,DMA Channel Control Register B_13" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8680+0x48)++0x3 line.long 0x00 "DMABUFCR_13,DMA Buffer Control Register 13" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8680+0x40)++0x1 line.word 0x00 "DMARS_13,DMA Extended Resource Selector 13" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8680+0x50)++0x7 line.long 0x00 "DMADPBASE_13,DMA Descriptor Base Address Register 13" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_13,DMA Descriptor Control Register 13" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8680+0x10)++0x7 line.long 0x00 "DMAFIXSAR_13,DMA Fixed Source Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_13,DMA Fixed Destination Address Register 13" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8680+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_13,DMA Fixed Descriptor Base Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 14" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x20)++0x7 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" else group.long 0x8700++0x7 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" endif group.long (0x8700+0x08)++0x3 line.long 0x00 "DMATCR_14,DMA Transfer Count Register 14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8700+0x18)++0x3 line.long 0x00 "DMATCRB_14,DMA Transfer Count Registers B_14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x28)++0x3 line.long 0x00 "DMATSR_14,DMA Transfer Count Register 14" group.long (0x8700+0x38)++0x3 line.long 0x00 "DMATSRB_14,DMA Transfer Size Register 14" endif if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8700+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8700+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8700+0x1C)++0x3 line.long 0x00 "DMACHCRB_14,DMA Channel Control Register B_14" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8700+0x48)++0x3 line.long 0x00 "DMABUFCR_14,DMA Buffer Control Register 14" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8700+0x40)++0x1 line.word 0x00 "DMARS_14,DMA Extended Resource Selector 14" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8700+0x50)++0x7 line.long 0x00 "DMADPBASE_14,DMA Descriptor Base Address Register 14" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_14,DMA Descriptor Control Register 14" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8700+0x10)++0x7 line.long 0x00 "DMAFIXSAR_14,DMA Fixed Source Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_14,DMA Fixed Destination Address Register 14" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8700+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_14,DMA Fixed Descriptor Base Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for Lower Channels" button "DESCRIPTORMEM" "d (ad:0xE6700000+0xA000)--(ad:0xE6700000+0xA7FC) /long" textline "" group.long 0xC0++0x0B line.long 0x00 "DMASES_L,Secure function Secure Status register for Low channels" bitfld.long 0x00 0. " ERROR ,Error status of Low channels" "No error,Error" line.long 0x04 "DMASEDDR_L,Secure function Salve Error Address register for Low channels" line.long 0x08 "DMASEMID_L,Secure function Error Master ID register for Low channels" width 0xB tree.end tree "Upper channels" base ad:0xE6720000 width 19. rgroup.long 0x20++0x3 line.long 0x00 "DMAISTA_U,DMA Interrupt Status Register for Upper channel" bitfld.long 0x00 14. " I29 ,Channel 29 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " I28 ,Channel 28 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " I27 ,Channel 27 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " I26 ,Channel 26 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I25 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " I24 ,Channel 24 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " I23 ,Channel 23 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " I22 ,Channel 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " I21 ,Channel 21 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " I20 ,Channel 20 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I19 ,Channel 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " I18 ,Channel 18 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " I17 ,Channel 17 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I16 ,Channel 16 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I15 ,Channel 15 interrupt status" "No interrupt,Interrupt" group.long 0x30++0x3 line.long 0x00 "DMASEC_U,DMA Secure Control Register for Upper channel" bitfld.long 0x00 14. " S29 ,Channel 29 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 13. " S28 ,Channel 28 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 12. " S27 ,Channel 27 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 11. " S26 ,Channel 26 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S25 ,Channel 25 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 9. " S24 ,Channel 24 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 8. " S23 ,Channel 23 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 7. " S22 ,Channel 22 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 6. " S21 ,Channel 21 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 5. " S20 ,Channel 20 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S19 ,Channel 19 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 3. " S18 ,Channel 18 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 2. " S17 ,Channel 17 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S16 ,Channel 16 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S15 ,Channel 15 secure mode setting" "Non-secure,Secure" group.long 0x60++0x3 line.long 0x00 "DMAOR_U,DMA Operation Register for Upper channel" bitfld.long 0x00 8.--9. " PR ,Priority Mode" "CH15>CH16>...>CH29,,,Round-robin" bitfld.long 0x00 2. " AE ,Address Error Flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA Master Enable" "Disabled,Enabled" wgroup.long 0x80++0x3 line.long 0x00 "DMACHCLR_U,DMA Channel Clear Register for Upper channel" bitfld.long 0x00 14. " CLR29 ,Channel 29 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR28 ,Channel 28 registers clear" "No clear,Clear" bitfld.long 0x00 12. " CLR27 ,Channel 27 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 11. " CLR26 ,Channel 26 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR25 ,Channel 25 registers clear" "No clear,Clear" bitfld.long 0x00 9. " CLR24 ,Channel 24 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 8. " CLR23 ,Channel 23 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR22 ,Channel 22 registers clear" "No clear,Clear" bitfld.long 0x00 6. " CLR21 ,Channel 21 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 5. " CLR20 ,Channel 20 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR19 ,Channel 19 registers clear" "No clear,Clear" bitfld.long 0x00 3. " CLR18 ,Channel 18 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 2. " CLR17 ,Channel 17 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR16 ,Channel 16 registers clear" "No clear,Clear" bitfld.long 0x00 0. " CLR15 ,Channel 15 registers clear" "No clear,Clear" group.long 0xA0++0x3 line.long 0x00 "DMADPSEC_U,DPRAM Secure Control Register for Upper channels" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" tree "Channel 15" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x7 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" else group.long 0x8000++0x7 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" endif group.long (0x8000+0x08)++0x3 line.long 0x00 "DMATCR_15,DMA Transfer Count Register 15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8000+0x18)++0x3 line.long 0x00 "DMATCRB_15,DMA Transfer Count Registers B_15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x3 line.long 0x00 "DMATSR_15,DMA Transfer Count Register 15" group.long (0x8000+0x38)++0x3 line.long 0x00 "DMATSRB_15,DMA Transfer Size Register 15" endif if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8000+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8000+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8000+0x1C)++0x3 line.long 0x00 "DMACHCRB_15,DMA Channel Control Register B_15" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x3 line.long 0x00 "DMABUFCR_15,DMA Buffer Control Register 15" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x1 line.word 0x00 "DMARS_15,DMA Extended Resource Selector 15" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "DMADPBASE_15,DMA Descriptor Base Address Register 15" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_15,DMA Descriptor Control Register 15" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "DMAFIXSAR_15,DMA Fixed Source Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_15,DMA Fixed Destination Address Register 15" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_15,DMA Fixed Descriptor Base Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 16" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x7 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" else group.long 0x8080++0x7 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" endif group.long (0x8080+0x08)++0x3 line.long 0x00 "DMATCR_16,DMA Transfer Count Register 16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8080+0x18)++0x3 line.long 0x00 "DMATCRB_16,DMA Transfer Count Registers B_16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x3 line.long 0x00 "DMATSR_16,DMA Transfer Count Register 16" group.long (0x8080+0x38)++0x3 line.long 0x00 "DMATSRB_16,DMA Transfer Size Register 16" endif if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8080+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8080+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8080+0x1C)++0x3 line.long 0x00 "DMACHCRB_16,DMA Channel Control Register B_16" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x3 line.long 0x00 "DMABUFCR_16,DMA Buffer Control Register 16" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x1 line.word 0x00 "DMARS_16,DMA Extended Resource Selector 16" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "DMADPBASE_16,DMA Descriptor Base Address Register 16" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_16,DMA Descriptor Control Register 16" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "DMAFIXSAR_16,DMA Fixed Source Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_16,DMA Fixed Destination Address Register 16" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_16,DMA Fixed Descriptor Base Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 17" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x7 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" else group.long 0x8100++0x7 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" endif group.long (0x8100+0x08)++0x3 line.long 0x00 "DMATCR_17,DMA Transfer Count Register 17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8100+0x18)++0x3 line.long 0x00 "DMATCRB_17,DMA Transfer Count Registers B_17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x3 line.long 0x00 "DMATSR_17,DMA Transfer Count Register 17" group.long (0x8100+0x38)++0x3 line.long 0x00 "DMATSRB_17,DMA Transfer Size Register 17" endif if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8100+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8100+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8100+0x1C)++0x3 line.long 0x00 "DMACHCRB_17,DMA Channel Control Register B_17" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x3 line.long 0x00 "DMABUFCR_17,DMA Buffer Control Register 17" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x1 line.word 0x00 "DMARS_17,DMA Extended Resource Selector 17" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "DMADPBASE_17,DMA Descriptor Base Address Register 17" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_17,DMA Descriptor Control Register 17" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "DMAFIXSAR_17,DMA Fixed Source Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_17,DMA Fixed Destination Address Register 17" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_17,DMA Fixed Descriptor Base Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 18" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x7 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" else group.long 0x8180++0x7 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" endif group.long (0x8180+0x08)++0x3 line.long 0x00 "DMATCR_18,DMA Transfer Count Register 18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8180+0x18)++0x3 line.long 0x00 "DMATCRB_18,DMA Transfer Count Registers B_18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x3 line.long 0x00 "DMATSR_18,DMA Transfer Count Register 18" group.long (0x8180+0x38)++0x3 line.long 0x00 "DMATSRB_18,DMA Transfer Size Register 18" endif if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8180+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8180+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8180+0x1C)++0x3 line.long 0x00 "DMACHCRB_18,DMA Channel Control Register B_18" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x3 line.long 0x00 "DMABUFCR_18,DMA Buffer Control Register 18" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x1 line.word 0x00 "DMARS_18,DMA Extended Resource Selector 18" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x7 line.long 0x00 "DMADPBASE_18,DMA Descriptor Base Address Register 18" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_18,DMA Descriptor Control Register 18" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x7 line.long 0x00 "DMAFIXSAR_18,DMA Fixed Source Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_18,DMA Fixed Destination Address Register 18" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_18,DMA Fixed Descriptor Base Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 19" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x7 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" else group.long 0x8200++0x7 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" endif group.long (0x8200+0x08)++0x3 line.long 0x00 "DMATCR_19,DMA Transfer Count Register 19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8200+0x18)++0x3 line.long 0x00 "DMATCRB_19,DMA Transfer Count Registers B_19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x3 line.long 0x00 "DMATSR_19,DMA Transfer Count Register 19" group.long (0x8200+0x38)++0x3 line.long 0x00 "DMATSRB_19,DMA Transfer Size Register 19" endif if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8200+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8200+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8200+0x1C)++0x3 line.long 0x00 "DMACHCRB_19,DMA Channel Control Register B_19" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x3 line.long 0x00 "DMABUFCR_19,DMA Buffer Control Register 19" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x1 line.word 0x00 "DMARS_19,DMA Extended Resource Selector 19" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x7 line.long 0x00 "DMADPBASE_19,DMA Descriptor Base Address Register 19" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_19,DMA Descriptor Control Register 19" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x7 line.long 0x00 "DMAFIXSAR_19,DMA Fixed Source Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_19,DMA Fixed Destination Address Register 19" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_19,DMA Fixed Descriptor Base Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 20" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x7 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" else group.long 0x8280++0x7 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" endif group.long (0x8280+0x08)++0x3 line.long 0x00 "DMATCR_20,DMA Transfer Count Register 20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8280+0x18)++0x3 line.long 0x00 "DMATCRB_20,DMA Transfer Count Registers B_20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x3 line.long 0x00 "DMATSR_20,DMA Transfer Count Register 20" group.long (0x8280+0x38)++0x3 line.long 0x00 "DMATSRB_20,DMA Transfer Size Register 20" endif if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8280+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8280+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8280+0x1C)++0x3 line.long 0x00 "DMACHCRB_20,DMA Channel Control Register B_20" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x3 line.long 0x00 "DMABUFCR_20,DMA Buffer Control Register 20" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x1 line.word 0x00 "DMARS_20,DMA Extended Resource Selector 20" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x7 line.long 0x00 "DMADPBASE_20,DMA Descriptor Base Address Register 20" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_20,DMA Descriptor Control Register 20" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x7 line.long 0x00 "DMAFIXSAR_20,DMA Fixed Source Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_20,DMA Fixed Destination Address Register 20" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_20,DMA Fixed Descriptor Base Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 21" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x7 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" else group.long 0x8300++0x7 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" endif group.long (0x8300+0x08)++0x3 line.long 0x00 "DMATCR_21,DMA Transfer Count Register 21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8300+0x18)++0x3 line.long 0x00 "DMATCRB_21,DMA Transfer Count Registers B_21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x3 line.long 0x00 "DMATSR_21,DMA Transfer Count Register 21" group.long (0x8300+0x38)++0x3 line.long 0x00 "DMATSRB_21,DMA Transfer Size Register 21" endif if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8300+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8300+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8300+0x1C)++0x3 line.long 0x00 "DMACHCRB_21,DMA Channel Control Register B_21" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x3 line.long 0x00 "DMABUFCR_21,DMA Buffer Control Register 21" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x1 line.word 0x00 "DMARS_21,DMA Extended Resource Selector 21" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x7 line.long 0x00 "DMADPBASE_21,DMA Descriptor Base Address Register 21" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_21,DMA Descriptor Control Register 21" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x7 line.long 0x00 "DMAFIXSAR_21,DMA Fixed Source Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_21,DMA Fixed Destination Address Register 21" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_21,DMA Fixed Descriptor Base Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 22" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x7 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" else group.long 0x8380++0x7 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" endif group.long (0x8380+0x08)++0x3 line.long 0x00 "DMATCR_22,DMA Transfer Count Register 22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8380+0x18)++0x3 line.long 0x00 "DMATCRB_22,DMA Transfer Count Registers B_22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x3 line.long 0x00 "DMATSR_22,DMA Transfer Count Register 22" group.long (0x8380+0x38)++0x3 line.long 0x00 "DMATSRB_22,DMA Transfer Size Register 22" endif if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8380+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8380+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8380+0x1C)++0x3 line.long 0x00 "DMACHCRB_22,DMA Channel Control Register B_22" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x3 line.long 0x00 "DMABUFCR_22,DMA Buffer Control Register 22" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x1 line.word 0x00 "DMARS_22,DMA Extended Resource Selector 22" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x7 line.long 0x00 "DMADPBASE_22,DMA Descriptor Base Address Register 22" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_22,DMA Descriptor Control Register 22" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x7 line.long 0x00 "DMAFIXSAR_22,DMA Fixed Source Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_22,DMA Fixed Destination Address Register 22" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_22,DMA Fixed Descriptor Base Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 23" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x7 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" else group.long 0x8400++0x7 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" endif group.long (0x8400+0x08)++0x3 line.long 0x00 "DMATCR_23,DMA Transfer Count Register 23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8400+0x18)++0x3 line.long 0x00 "DMATCRB_23,DMA Transfer Count Registers B_23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x3 line.long 0x00 "DMATSR_23,DMA Transfer Count Register 23" group.long (0x8400+0x38)++0x3 line.long 0x00 "DMATSRB_23,DMA Transfer Size Register 23" endif if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8400+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8400+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8400+0x1C)++0x3 line.long 0x00 "DMACHCRB_23,DMA Channel Control Register B_23" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x3 line.long 0x00 "DMABUFCR_23,DMA Buffer Control Register 23" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x1 line.word 0x00 "DMARS_23,DMA Extended Resource Selector 23" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x7 line.long 0x00 "DMADPBASE_23,DMA Descriptor Base Address Register 23" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_23,DMA Descriptor Control Register 23" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x7 line.long 0x00 "DMAFIXSAR_23,DMA Fixed Source Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_23,DMA Fixed Destination Address Register 23" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_23,DMA Fixed Descriptor Base Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 24" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x7 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" else group.long 0x8480++0x7 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" endif group.long (0x8480+0x08)++0x3 line.long 0x00 "DMATCR_24,DMA Transfer Count Register 24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8480+0x18)++0x3 line.long 0x00 "DMATCRB_24,DMA Transfer Count Registers B_24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x3 line.long 0x00 "DMATSR_24,DMA Transfer Count Register 24" group.long (0x8480+0x38)++0x3 line.long 0x00 "DMATSRB_24,DMA Transfer Size Register 24" endif if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8480+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8480+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8480+0x1C)++0x3 line.long 0x00 "DMACHCRB_24,DMA Channel Control Register B_24" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x3 line.long 0x00 "DMABUFCR_24,DMA Buffer Control Register 24" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x1 line.word 0x00 "DMARS_24,DMA Extended Resource Selector 24" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x7 line.long 0x00 "DMADPBASE_24,DMA Descriptor Base Address Register 24" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_24,DMA Descriptor Control Register 24" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x7 line.long 0x00 "DMAFIXSAR_24,DMA Fixed Source Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_24,DMA Fixed Destination Address Register 24" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_24,DMA Fixed Descriptor Base Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 25" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x7 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" else group.long 0x8500++0x7 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" endif group.long (0x8500+0x08)++0x3 line.long 0x00 "DMATCR_25,DMA Transfer Count Register 25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8500+0x18)++0x3 line.long 0x00 "DMATCRB_25,DMA Transfer Count Registers B_25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x3 line.long 0x00 "DMATSR_25,DMA Transfer Count Register 25" group.long (0x8500+0x38)++0x3 line.long 0x00 "DMATSRB_25,DMA Transfer Size Register 25" endif if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8500+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8500+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8500+0x1C)++0x3 line.long 0x00 "DMACHCRB_25,DMA Channel Control Register B_25" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x3 line.long 0x00 "DMABUFCR_25,DMA Buffer Control Register 25" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x1 line.word 0x00 "DMARS_25,DMA Extended Resource Selector 25" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x7 line.long 0x00 "DMADPBASE_25,DMA Descriptor Base Address Register 25" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_25,DMA Descriptor Control Register 25" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x7 line.long 0x00 "DMAFIXSAR_25,DMA Fixed Source Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_25,DMA Fixed Destination Address Register 25" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_25,DMA Fixed Descriptor Base Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 26" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x7 line.long 0x00 "DMASAR_26,DMA Source Address Register 26" line.long 0x04 "DMADAR_26,DMA Destination Address Register 26" else group.long 0x8580++0x7 line.long 0x00 "DMASAR_26,DMA Source Address Register 26" line.long 0x04 "DMADAR_26,DMA Destination Address Register 26" endif group.long (0x8580+0x08)++0x3 line.long 0x00 "DMATCR_26,DMA Transfer Count Register 26" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8580+0x18)++0x3 line.long 0x00 "DMATCRB_26,DMA Transfer Count Registers B_26" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x3 line.long 0x00 "DMATSR_26,DMA Transfer Count Register 26" group.long (0x8580+0x38)++0x3 line.long 0x00 "DMATSRB_26,DMA Transfer Size Register 26" endif if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8580+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8580+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8580+0x1C)++0x3 line.long 0x00 "DMACHCRB_26,DMA Channel Control Register B_26" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x3 line.long 0x00 "DMABUFCR_26,DMA Buffer Control Register 26" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x1 line.word 0x00 "DMARS_26,DMA Extended Resource Selector 26" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x7 line.long 0x00 "DMADPBASE_26,DMA Descriptor Base Address Register 26" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_26,DMA Descriptor Control Register 26" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x7 line.long 0x00 "DMAFIXSAR_26,DMA Fixed Source Address Register 26" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_26,DMA Fixed Destination Address Register 26" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_26,DMA Fixed Descriptor Base Address Register 26" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 27" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x7 line.long 0x00 "DMASAR_27,DMA Source Address Register 27" line.long 0x04 "DMADAR_27,DMA Destination Address Register 27" else group.long 0x8600++0x7 line.long 0x00 "DMASAR_27,DMA Source Address Register 27" line.long 0x04 "DMADAR_27,DMA Destination Address Register 27" endif group.long (0x8600+0x08)++0x3 line.long 0x00 "DMATCR_27,DMA Transfer Count Register 27" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8600+0x18)++0x3 line.long 0x00 "DMATCRB_27,DMA Transfer Count Registers B_27" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x3 line.long 0x00 "DMATSR_27,DMA Transfer Count Register 27" group.long (0x8600+0x38)++0x3 line.long 0x00 "DMATSRB_27,DMA Transfer Size Register 27" endif if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8600+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8600+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8600+0x1C)++0x3 line.long 0x00 "DMACHCRB_27,DMA Channel Control Register B_27" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x3 line.long 0x00 "DMABUFCR_27,DMA Buffer Control Register 27" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x1 line.word 0x00 "DMARS_27,DMA Extended Resource Selector 27" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x7 line.long 0x00 "DMADPBASE_27,DMA Descriptor Base Address Register 27" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_27,DMA Descriptor Control Register 27" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x7 line.long 0x00 "DMAFIXSAR_27,DMA Fixed Source Address Register 27" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_27,DMA Fixed Destination Address Register 27" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_27,DMA Fixed Descriptor Base Address Register 27" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 28" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x20)++0x7 line.long 0x00 "DMASAR_28,DMA Source Address Register 28" line.long 0x04 "DMADAR_28,DMA Destination Address Register 28" else group.long 0x8680++0x7 line.long 0x00 "DMASAR_28,DMA Source Address Register 28" line.long 0x04 "DMADAR_28,DMA Destination Address Register 28" endif group.long (0x8680+0x08)++0x3 line.long 0x00 "DMATCR_28,DMA Transfer Count Register 28" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8680+0x18)++0x3 line.long 0x00 "DMATCRB_28,DMA Transfer Count Registers B_28" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x28)++0x3 line.long 0x00 "DMATSR_28,DMA Transfer Count Register 28" group.long (0x8680+0x38)++0x3 line.long 0x00 "DMATSRB_28,DMA Transfer Size Register 28" endif if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8680+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x2C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8680+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x0C)++0x3 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8680+0x1C)++0x3 line.long 0x00 "DMACHCRB_28,DMA Channel Control Register B_28" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8680+0x48)++0x3 line.long 0x00 "DMABUFCR_28,DMA Buffer Control Register 28" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8680+0x40)++0x1 line.word 0x00 "DMARS_28,DMA Extended Resource Selector 28" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8680+0x50)++0x7 line.long 0x00 "DMADPBASE_28,DMA Descriptor Base Address Register 28" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_28,DMA Descriptor Control Register 28" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8680+0x10)++0x7 line.long 0x00 "DMAFIXSAR_28,DMA Fixed Source Address Register 28" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_28,DMA Fixed Destination Address Register 28" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8680+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_28,DMA Fixed Descriptor Base Address Register 28" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 29" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x20)++0x7 line.long 0x00 "DMASAR_29,DMA Source Address Register 29" line.long 0x04 "DMADAR_29,DMA Destination Address Register 29" else group.long 0x8700++0x7 line.long 0x00 "DMASAR_29,DMA Source Address Register 29" line.long 0x04 "DMADAR_29,DMA Destination Address Register 29" endif group.long (0x8700+0x08)++0x3 line.long 0x00 "DMATCR_29,DMA Transfer Count Register 29" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8700+0x18)++0x3 line.long 0x00 "DMATCRB_29,DMA Transfer Count Registers B_29" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x28)++0x3 line.long 0x00 "DMATSR_29,DMA Transfer Count Register 29" group.long (0x8700+0x38)++0x3 line.long 0x00 "DMATSRB_29,DMA Transfer Size Register 29" endif if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) if (((per.l(ad:0xE6700000+0x8700+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x2C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6700000+0x8700+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x0C)++0x3 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8700+0x1C)++0x3 line.long 0x00 "DMACHCRB_29,DMA Channel Control Register B_29" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8700+0x48)++0x3 line.long 0x00 "DMABUFCR_29,DMA Buffer Control Register 29" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8700+0x40)++0x1 line.word 0x00 "DMARS_29,DMA Extended Resource Selector 29" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8700+0x50)++0x7 line.long 0x00 "DMADPBASE_29,DMA Descriptor Base Address Register 29" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_29,DMA Descriptor Control Register 29" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8700+0x10)++0x7 line.long 0x00 "DMAFIXSAR_29,DMA Fixed Source Address Register 29" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_29,DMA Fixed Destination Address Register 29" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8700+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_29,DMA Fixed Descriptor Base Address Register 29" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for Lower Channels" button "DESCRIPTORMEM" "d (ad:0xE6700000+0xA000)--(ad:0xE6700000+0xA7FC) /long" textline "" group.long 0xC0++0x0B line.long 0x00 "DMASES_U,Secure function Secure Status register for Upper channels" bitfld.long 0x00 0. " ERROR ,Error status of Upper channels" "No error,Error" line.long 0x04 "DMASEDDR_U,Secure function Salve Error Address register for Upper channels" line.long 0x08 "DMASEMID_U,Secure function Error Master ID register for Upper channels" width 0xB tree.end tree.end tree "RT-DMAC (Realtime Direct MemoryAccess Controller)" base ad:0xFFC10000 width 10. tree "Channels 0..16" rgroup.long 0x20++0x03 line.long 0x00 "RDMISTA,DMA Interrupt Status Register" sif ((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77965*"))||(cpuis("R8A77990*")) bitfld.long 0x00 7. " I7 ,Channel 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " I6 ,Channel 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " I5 ,Channel 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I4 ,Channel 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " I3 ,Channel 3 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " I2 ,Channel 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I1 ,Channel 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I0 ,Channel 0 interrupt status" "No interrupt,Interrupt" elif (cpuis("R8A77960*")||cpuis("R8A77970*")||cpuis("R8A77980*")) bitfld.long 0x00 15. " I15 ,Channel 15 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " I14 ,Channel 14 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " I13 ,Channel 13 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " I12 ,Channel 12 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " I11 ,Channel 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I10 ,Channel 10 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " I9 ,Channel 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " I8 ,Channel 8 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " I7 ,Channel 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " I6 ,Channel 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " I5 ,Channel 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I4 ,Channel 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " I3 ,Channel 3 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " I2 ,Channel 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I1 ,Channel 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I0 ,Channel 0 interrupt status" "No interrupt,Interrupt" elif (cpuis("R8A77995*")) bitfld.long 0x00 3. " I3 ,Channel 3 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " I2 ,Channel 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I1 ,Channel 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I0 ,Channel 0 interrupt status" "No interrupt,Interrupt" else bitfld.long 0x00 2. " I2 ,Channel 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I1 ,Channel 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I0 ,Channel 0 interrupt status" "No interrupt,Interrupt" endif group.long 0x030++0x03 line.long 0x00 "RDMSEC,DMA Secure Control Register" sif ((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77965*"))||(cpuis("R8A77990*")) bitfld.long 0x00 7. " S7 ,Channel 7 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 6. " S6 ,Channel 6 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 5. " S5 ,Channel 5 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S4 ,Channel 4 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " S3 ,Channel 3 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 2. " S2 ,Channel 2 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S1 ,Channel 1 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S0 ,Channel 0 secure mode setting" "Non-secure,Secure" elif (cpuis("R8A77960*")||cpuis("R8A77970*")||cpuis("R8A77980*")) bitfld.long 0x00 15. " S15 ,Channel 15 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 14. " S14 ,Channel 14 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 13. " S13 ,Channel 13 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 12. " S12 ,Channel 12 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 11. " S11 ,Channel 11 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S10 ,Channel 10 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 9. " S9 ,Channel 9 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 8. " S8 ,Channel 8 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 7. " S7 ,Channel 7 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 6. " S6 ,Channel 6 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 5. " S5 ,Channel 5 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S4 ,Channel 4 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " S3 ,Channel 3 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 2. " S2 ,Channel 2 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S1 ,Channel 1 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S0 ,Channel 0 secure mode setting" "Non-secure,Secure" elif (cpuis("R8A77995*")) bitfld.long 0x00 3. " S3 ,Channel 3 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 2. " S2 ,Channel 2 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S1 ,Channel 1 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S0 ,Channel 0 secure mode setting" "Non-secure,Secure" else bitfld.long 0x00 2. " S2 ,Channel 2 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S1 ,Channel 1 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S0 ,Channel 0 secure mode setting" "Non-secure,Secure" endif group.word 0x60++0x1 line.word 0x00 "RDMOR,DMA Operation Register" bitfld.word 0x00 8.--9. " PR ,Priority mode" "CH0>CH1>CH2,,,Round-robin" bitfld.word 0x00 2. " AE ,Address error flag" "Not occurred,Occurred" bitfld.word 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" wgroup.long 0x80++0x03 line.long 0x00 "RDMCHCLR,DMA Channel Clear Register" sif ((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77965*"))||(cpuis("R8A77990*")) bitfld.long 0x00 7. " CLR7 ,Channel 7 clear" "No effect,Clear" bitfld.long 0x00 6. " CLR6 ,Channel 6 clear" "No effect,Clear" bitfld.long 0x00 5. " CLR5 ,Channel 5 clear" "No effect,Clear" bitfld.long 0x00 4. " CLR4 ,Channel 4 clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " CLR3 ,Channel 3 clear" "No effect,Clear" bitfld.long 0x00 2. " CLR2 ,Channel 2 clear" "No effect,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 clear" "No effect,Clear" bitfld.long 0x00 0. " CLR0 ,Channel 0 clear" "No effect,Clear" elif (cpuis("R8A77960*")||cpuis("R8A77970*")||cpuis("R8A77980*")) bitfld.long 0x00 15. " CLR15 ,Channel 15 clear" "No effect,Clear" bitfld.long 0x00 14. " CLR14 ,Channel 14 clear" "No effect,Clear" bitfld.long 0x00 13. " CLR13 ,Channel 13 clear" "No effect,Clear" bitfld.long 0x00 12. " CLR12 ,Channel 12 clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " CLR11 ,Channel 11 clear" "No effect,Clear" bitfld.long 0x00 10. " CLR10 ,Channel 10 clear" "No effect,Clear" bitfld.long 0x00 9. " CLR9 ,Channel 9 clear" "No effect,Clear" bitfld.long 0x00 8. " CLR8 ,Channel 8 clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " CLR7 ,Channel 7 clear" "No effect,Clear" bitfld.long 0x00 6. " CLR6 ,Channel 6 clear" "No effect,Clear" bitfld.long 0x00 5. " CLR5 ,Channel 5 clear" "No effect,Clear" bitfld.long 0x00 4. " CLR4 ,Channel 4 clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " CLR3 ,Channel 3 clear" "No effect,Clear" bitfld.long 0x00 2. " CLR2 ,Channel 2 clear" "No effect,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 clear" "No effect,Clear" bitfld.long 0x00 0. " CLR0 ,Channel 0 clear" "No effect,Clear" elif (cpuis("R8A77995*")) bitfld.long 0x00 3. " CLR3 ,Channel 3 clear" "No effect,Clear" bitfld.long 0x00 2. " CLR2 ,Channel 2 clear" "No effect,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 clear" "No effect,Clear" bitfld.long 0x00 0. " CLR0 ,Channel 0 clear" "No effect,Clear" else bitfld.long 0x00 2. " CLR2 ,Channel 2 clear" "No effect,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 clear" "No effect,Clear" bitfld.long 0x00 0. " CLR0 ,Channel 0 clear" "No effect,Clear" endif group.long 0xA0++0x03 line.long 0x00 "RDMDPSEC,DPRAM Secure Control Register" bitfld.long 0x00 31. " SEC ,Secure attribute setting of descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of descriptor memory" width 16. sif ((cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")) elif (cpuis("R8A77960*")) tree "Channel 0" group.long 0x8000++0xB line.long 0x00 "RDMSAR_0,DMA Source Address Register 0" line.long 0x04 "RDMDAR_0,DMA Destination Address Register 0" line.long 0x08 "RDMTCR_0,DMA Transfer Count Register 0" group.long (0x8000+0x18)++0x03 line.long 0x00 "RDMTCRB_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x28)++0x03 line.long 0x00 "RDMTSR_0,DMA Transfer Size Register 0" group.long (0x8000+0x038)++0x03 line.long 0x00 "RDMTSRB_0,DMA Transfer Size Register B_0" group.long (0x8000+0x0C)++0x03 line.long 0x00 "RDMCHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8000+0x1C)++0x03 line.long 0x00 "RDMCHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "RDMBUFCR_0,DMA Buffer Control Register_0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8000+0x40)++0x03 line.long 0x00 "RDMRS_0,DMA Extended Resource Selector 0" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "RDMDPBASE_0,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "RDMFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8000+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77970*")||cpuis("R8A77980*")) tree "Channel 0" group.long 0x8000++0xB line.long 0x00 "RDMSAR_0,DMA Source Address Register 0" line.long 0x04 "RDMDAR_0,DMA Destination Address Register 0" line.long 0x08 "RDMTCR_0,DMA Transfer Count Register 0" group.long (0x8000+0x18)++0x03 line.long 0x00 "RDMTCRB_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x28)++0x03 line.long 0x00 "RDMTSR_0,DMA Transfer Size Register 0" group.long (0x8000+0x038)++0x03 line.long 0x00 "RDMTSRB_0,DMA Transfer Size Register B_0" group.long (0x8000+0x0C)++0x03 line.long 0x00 "RDMCHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8000+0x1C)++0x03 line.long 0x00 "RDMCHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "RDMBUFCR_0,DMA Buffer Control Register_0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8000+0x40)++0x03 line.long 0x00 "RDMRS_0,DMA Extended Resource Selector 0" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "RDMDPBASE_0,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "RDMFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8000+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77995*")) else tree "Channel 0" group.long 0x8000++0xB line.long 0x00 "RDMSAR_0,DMA Source Address Register 0" line.long 0x04 "RDMDAR_0,DMA Destination Address Register 0" line.long 0x08 "RDMTCR_0,DMA Transfer Count Register 0" group.long (0x8000+0x18)++0x03 line.long 0x00 "RDMTCRB_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x28)++0x03 line.long 0x00 "RDMTSR_0,DMA Transfer Size Register 0" group.long (0x8000+0x038)++0x03 line.long 0x00 "RDMTSRB_0,DMA Transfer Size Register B_0" group.long (0x8000+0x0C)++0x03 line.long 0x00 "RDMCHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8000+0x1C)++0x03 line.long 0x00 "RDMCHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "RDMBUFCR_0,DMA Buffer Control Register_0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8000+0x40)++0x03 line.long 0x00 "RDMRS_0,DMA Extended Resource Selector 0" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "RDMDPBASE_0,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in,External" line.long 0x04 "RDMDPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "RDMFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8000+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end endif sif ((cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")) tree "Channel 1" group.long 0x8080++0xB line.long 0x00 "RDMSAR_1,DMA Source Address Register 1" line.long 0x04 "RDMDAR_1,DMA Destination Address Register 1" line.long 0x08 "RDMTCR_1,DMA Transfer Count Register 1" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_1,DMA Transfer Size Register 1" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_1,DMA Transfer Size Register B_1" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_1,DMA Buffer Control Register_1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_1,DMA Extended Resource Selector 1" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_1,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77960*")) tree "Channel 1" group.long 0x8080++0xB line.long 0x00 "RDMSAR_1,DMA Source Address Register 1" line.long 0x04 "RDMDAR_1,DMA Destination Address Register 1" line.long 0x08 "RDMTCR_1,DMA Transfer Count Register 1" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_1,DMA Transfer Size Register 1" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_1,DMA Transfer Size Register B_1" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_1,DMA Buffer Control Register_1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_1,DMA Extended Resource Selector 1" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_1,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77970*")||cpuis("R8A77980*")) tree "Channel 1" group.long 0x8080++0xB line.long 0x00 "RDMSAR_1,DMA Source Address Register 1" line.long 0x04 "RDMDAR_1,DMA Destination Address Register 1" line.long 0x08 "RDMTCR_1,DMA Transfer Count Register 1" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_1,DMA Transfer Size Register 1" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_1,DMA Transfer Size Register B_1" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_1,DMA Buffer Control Register_1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_1,DMA Extended Resource Selector 1" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_1,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77995*")) tree "Channel 1" group.long 0x8080++0xB line.long 0x00 "RDMSAR_1,DMA Source Address Register 1" line.long 0x04 "RDMDAR_1,DMA Destination Address Register 1" line.long 0x08 "RDMTCR_1,DMA Transfer Count Register 1" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_1,DMA Transfer Size Register 1" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_1,DMA Transfer Size Register B_1" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_1,DMA Buffer Control Register_1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_1,DMA Extended Resource Selector 1" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_1,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end else tree "Channel 1" group.long 0x8080++0xB line.long 0x00 "RDMSAR_1,DMA Source Address Register 1" line.long 0x04 "RDMDAR_1,DMA Destination Address Register 1" line.long 0x08 "RDMTCR_1,DMA Transfer Count Register 1" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_1,DMA Transfer Size Register 1" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_1,DMA Transfer Size Register B_1" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_1,DMA Buffer Control Register_1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_1,DMA Extended Resource Selector 1" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_1,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in,External" line.long 0x04 "RDMDPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end endif sif ((cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")) elif (cpuis("R8A77960*")) tree "Channel 2" group.long 0x8100++0xB line.long 0x00 "RDMSAR_2,DMA Source Address Register 2" line.long 0x04 "RDMDAR_2,DMA Destination Address Register 2" line.long 0x08 "RDMTCR_2,DMA Transfer Count Register 2" group.long (0x8100+0x18)++0x03 line.long 0x00 "RDMTCRB_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x28)++0x03 line.long 0x00 "RDMTSR_2,DMA Transfer Size Register 2" group.long (0x8100+0x038)++0x03 line.long 0x00 "RDMTSRB_2,DMA Transfer Size Register B_2" group.long (0x8100+0x0C)++0x03 line.long 0x00 "RDMCHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8100+0x1C)++0x03 line.long 0x00 "RDMCHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "RDMBUFCR_2,DMA Buffer Control Register_2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8100+0x40)++0x03 line.long 0x00 "RDMRS_2,DMA Extended Resource Selector 2" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "RDMDPBASE_2,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "RDMFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8100+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77970*")||cpuis("R8A77980*")) tree "Channel 2" group.long 0x8100++0xB line.long 0x00 "RDMSAR_2,DMA Source Address Register 2" line.long 0x04 "RDMDAR_2,DMA Destination Address Register 2" line.long 0x08 "RDMTCR_2,DMA Transfer Count Register 2" group.long (0x8100+0x18)++0x03 line.long 0x00 "RDMTCRB_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x28)++0x03 line.long 0x00 "RDMTSR_2,DMA Transfer Size Register 2" group.long (0x8100+0x038)++0x03 line.long 0x00 "RDMTSRB_2,DMA Transfer Size Register B_2" group.long (0x8100+0x0C)++0x03 line.long 0x00 "RDMCHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8100+0x1C)++0x03 line.long 0x00 "RDMCHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "RDMBUFCR_2,DMA Buffer Control Register_2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8100+0x40)++0x03 line.long 0x00 "RDMRS_2,DMA Extended Resource Selector 2" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "RDMDPBASE_2,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "RDMFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8100+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77995*")) else tree "Channel 2" group.long 0x8100++0xB line.long 0x00 "RDMSAR_2,DMA Source Address Register 2" line.long 0x04 "RDMDAR_2,DMA Destination Address Register 2" line.long 0x08 "RDMTCR_2,DMA Transfer Count Register 2" group.long (0x8100+0x18)++0x03 line.long 0x00 "RDMTCRB_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x28)++0x03 line.long 0x00 "RDMTSR_2,DMA Transfer Size Register 2" group.long (0x8100+0x038)++0x03 line.long 0x00 "RDMTSRB_2,DMA Transfer Size Register B_2" group.long (0x8100+0x0C)++0x03 line.long 0x00 "RDMCHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8100+0x1C)++0x03 line.long 0x00 "RDMCHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "RDMBUFCR_2,DMA Buffer Control Register_2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8100+0x40)++0x03 line.long 0x00 "RDMRS_2,DMA Extended Resource Selector 2" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "RDMDPBASE_2,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in,External" line.long 0x04 "RDMDPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "RDMFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8100+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end endif textline " " sif (!cpuis("R8A77980*")) group.long 0xA000++0x03 line.long 0x00 "DESCRIPTORMEM,Descriptor Memory" button "DESCRIPTORMEM" "d (ad:0xFFC10000+0xA000)--(ad:0xFFC10000+0xA7FF) /long" endif group.long 0xC0++0x0F line.long 0x00 "RDMSES,Secure function Secure Status register" bitfld.long 0x00 0. " Error ,Error Status" "No error,Error" line.long 0x04 "RDMSEADDR,Secure function Salve Error Address register" line.long 0x08 "RDMSEMID,Secure function Error Master ID register" tree.end width 10. base ad:0xFFC20000 sif (!cpuis("R8A77960*")) tree "Channels 16..31" rgroup.long 0x20++0x03 line.long 0x00 "RDMISTA1,DMA Interrupt Status Register" sif (!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*")) bitfld.long 0x00 15. " I15 ,Channel 31 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " I14 ,Channel 30 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " I13 ,Channel 29 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " I12 ,Channel 28 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " I11 ,Channel 27 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I10 ,Channel 26 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " I9 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " I8 ,Channel 24 interrupt status" "No interrupt,Interrupt" textline " " endif sif (!cpuis("R8A77995*")) bitfld.long 0x00 7. " I7 ,Channel 23 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " I6 ,Channel 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " I5 ,Channel 21 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I4 ,Channel 20 interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x00 3. " I3 ,Channel 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " I2 ,Channel 18 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I1 ,Channel 17 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I0 ,Channel 16 interrupt status" "No interrupt,Interrupt" group.long 0x030++0x03 line.long 0x00 "RDMSEC1,DMA Secure Control Register" sif (!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*")) bitfld.long 0x00 15. " S15 ,Channel 31 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 14. " S14 ,Channel 30 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 13. " S13 ,Channel 29 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 12. " S12 ,Channel 28 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 11. " S11 ,Channel 27 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S10 ,Channel 26 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 9. " S9 ,Channel 25 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 8. " S8 ,Channel 24 secure mode setting" "Non-secure,Secure" textline " " endif sif (!cpuis("R8A77995*")) bitfld.long 0x00 7. " S7 ,Channel 23 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 6. " S6 ,Channel 22 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 5. " S5 ,Channel 21 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S4 ,Channel 20 secure mode setting" "Non-secure,Secure" textline " " endif bitfld.long 0x00 3. " S3 ,Channel 19 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 2. " S2 ,Channel 18 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S1 ,Channel 17 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S0 ,Channel 16 secure mode setting" "Non-secure,Secure" group.word 0x60++0x01 line.word 0x00 "RDMOR1,DMA Operation Register" bitfld.word 0x00 8.--9. " PR ,Priority mode" "CH0>CH1>CH2,,,Round-robin" bitfld.word 0x00 2. " AE ,Address error flag" "Not occurred,Occurred" bitfld.word 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" wgroup.long 0x80++0x03 line.long 0x00 "RDMCHCLR1,DMA Channel Clear Register" sif (!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*")) bitfld.long 0x00 15. " CLR31 ,Channel 31 clear" "No effect,Clear" bitfld.long 0x00 14. " CLR30 ,Channel 30 clear" "No effect,Clear" bitfld.long 0x00 13. " CLR29 ,Channel 29 clear" "No effect,Clear" bitfld.long 0x00 12. " CLR28 ,Channel 28 clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " CLR27 ,Channel 27 clear" "No effect,Clear" bitfld.long 0x00 10. " CLR26 ,Channel 26 clear" "No effect,Clear" bitfld.long 0x00 9. " CLR25 ,Channel 25 clear" "No effect,Clear" bitfld.long 0x00 8. " CLR24 ,Channel 24 clear" "No effect,Clear" textline " " endif sif (!cpuis("R8A77995*")) bitfld.long 0x00 7. " CLR23 ,Channel 23 clear" "No effect,Clear" bitfld.long 0x00 6. " CLR22 ,Channel 22 clear" "No effect,Clear" bitfld.long 0x00 5. " CLR21 ,Channel 21 clear" "No effect,Clear" bitfld.long 0x00 4. " CLR20 ,Channel 20 clear" "No effect,Clear" textline " " endif bitfld.long 0x00 3. " CLR19 ,Channel 19 clear" "No effect,Clear" bitfld.long 0x00 2. " CLR18 ,Channel 18 clear" "No effect,Clear" bitfld.long 0x00 1. " CLR17 ,Channel 17 clear" "No effect,Clear" bitfld.long 0x00 0. " CLR16 ,Channel 16 clear" "No effect,Clear" group.long 0xA0++0x03 line.long 0x00 "RDMDPSEC1,DPRAM Secure Control Register" bitfld.long 0x00 31. " SEC ,Secure attribute setting of descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of descriptor memory" width 16. sif ((cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")) tree "Channel 16" group.long 0x8000++0xB line.long 0x00 "RDMSAR_16,DMA Source Address Register 16" line.long 0x04 "RDMDAR_16,DMA Destination Address Register 16" line.long 0x08 "RDMTCR_16,DMA Transfer Count Register 16" group.long (0x8000+0x18)++0x03 line.long 0x00 "RDMTCRB_16,DMA Transfer Count Register 16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x28)++0x03 line.long 0x00 "RDMTSR_16,DMA Transfer Size Register 16" group.long (0x8000+0x038)++0x03 line.long 0x00 "RDMTSRB_16,DMA Transfer Size Register B_16" group.long (0x8000+0x0C)++0x03 line.long 0x00 "RDMCHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8000+0x1C)++0x03 line.long 0x00 "RDMCHCRB_16,DMA Channel Control Register B_16" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "RDMBUFCR_16,DMA Buffer Control Register_16" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8000+0x40)++0x03 line.long 0x00 "RDMRS_16,DMA Extended Resource Selector 16" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "RDMDPBASE_16,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_16,DMA Descriptor Control Register 16" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "RDMFIXSAR_16,DMA Fixed Source Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_16,DMA Fixed Destination Address Register 16" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8000+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_16,DMA Fixed Descriptor Base Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77995*")) tree "Channel 16" group.long 0x8000++0xB line.long 0x00 "RDMSAR_16,DMA Source Address Register 16" line.long 0x04 "RDMDAR_16,DMA Destination Address Register 16" line.long 0x08 "RDMTCR_16,DMA Transfer Count Register 16" group.long (0x8000+0x18)++0x03 line.long 0x00 "RDMTCRB_16,DMA Transfer Count Register 16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x28)++0x03 line.long 0x00 "RDMTSR_16,DMA Transfer Size Register 16" group.long (0x8000+0x038)++0x03 line.long 0x00 "RDMTSRB_16,DMA Transfer Size Register B_16" group.long (0x8000+0x0C)++0x03 line.long 0x00 "RDMCHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8000+0x1C)++0x03 line.long 0x00 "RDMCHCRB_16,DMA Channel Control Register B_16" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "RDMBUFCR_16,DMA Buffer Control Register_16" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8000+0x40)++0x03 line.long 0x00 "RDMRS_16,DMA Extended Resource Selector 16" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "RDMDPBASE_16,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_16,DMA Descriptor Control Register 16" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "RDMFIXSAR_16,DMA Fixed Source Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_16,DMA Fixed Destination Address Register 16" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8000+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_16,DMA Fixed Descriptor Base Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end else tree "Channel 16" group.long 0x8000++0xB line.long 0x00 "RDMSAR_16,DMA Source Address Register 16" line.long 0x04 "RDMDAR_16,DMA Destination Address Register 16" line.long 0x08 "RDMTCR_16,DMA Transfer Count Register 16" group.long (0x8000+0x18)++0x03 line.long 0x00 "RDMTCRB_16,DMA Transfer Count Register 16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x28)++0x03 line.long 0x00 "RDMTSR_16,DMA Transfer Size Register 16" group.long (0x8000+0x038)++0x03 line.long 0x00 "RDMTSRB_16,DMA Transfer Size Register B_16" group.long (0x8000+0x0C)++0x03 line.long 0x00 "RDMCHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8000+0x1C)++0x03 line.long 0x00 "RDMCHCRB_16,DMA Channel Control Register B_16" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "RDMBUFCR_16,DMA Buffer Control Register_16" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8000+0x40)++0x03 line.long 0x00 "RDMRS_16,DMA Extended Resource Selector 16" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "RDMDPBASE_16,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_16,DMA Descriptor Control Register 16" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "RDMFIXSAR_16,DMA Fixed Source Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_16,DMA Fixed Destination Address Register 16" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8000+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_16,DMA Fixed Descriptor Base Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end endif sif ((cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")) tree "Channel 17" group.long 0x8080++0xB line.long 0x00 "RDMSAR_17,DMA Source Address Register 17" line.long 0x04 "RDMDAR_17,DMA Destination Address Register 17" line.long 0x08 "RDMTCR_17,DMA Transfer Count Register 17" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_17,DMA Transfer Count Register 17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_17,DMA Transfer Size Register 17" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_17,DMA Transfer Size Register B_17" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_17,DMA Channel Control Register B_17" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_17,DMA Buffer Control Register_17" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_17,DMA Extended Resource Selector 17" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_17,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_17,DMA Descriptor Control Register 17" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_17,DMA Fixed Source Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_17,DMA Fixed Destination Address Register 17" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_17,DMA Fixed Descriptor Base Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77995*")) tree "Channel 17" group.long 0x8080++0xB line.long 0x00 "RDMSAR_17,DMA Source Address Register 17" line.long 0x04 "RDMDAR_17,DMA Destination Address Register 17" line.long 0x08 "RDMTCR_17,DMA Transfer Count Register 17" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_17,DMA Transfer Count Register 17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_17,DMA Transfer Size Register 17" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_17,DMA Transfer Size Register B_17" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_17,DMA Channel Control Register B_17" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_17,DMA Buffer Control Register_17" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_17,DMA Extended Resource Selector 17" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_17,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_17,DMA Descriptor Control Register 17" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_17,DMA Fixed Source Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_17,DMA Fixed Destination Address Register 17" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_17,DMA Fixed Descriptor Base Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end else tree "Channel 17" group.long 0x8080++0xB line.long 0x00 "RDMSAR_17,DMA Source Address Register 17" line.long 0x04 "RDMDAR_17,DMA Destination Address Register 17" line.long 0x08 "RDMTCR_17,DMA Transfer Count Register 17" group.long (0x8080+0x18)++0x03 line.long 0x00 "RDMTCRB_17,DMA Transfer Count Register 17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x28)++0x03 line.long 0x00 "RDMTSR_17,DMA Transfer Size Register 17" group.long (0x8080+0x038)++0x03 line.long 0x00 "RDMTSRB_17,DMA Transfer Size Register B_17" group.long (0x8080+0x0C)++0x03 line.long 0x00 "RDMCHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8080+0x1C)++0x03 line.long 0x00 "RDMCHCRB_17,DMA Channel Control Register B_17" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "RDMBUFCR_17,DMA Buffer Control Register_17" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8080+0x40)++0x03 line.long 0x00 "RDMRS_17,DMA Extended Resource Selector 17" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "RDMDPBASE_17,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_17,DMA Descriptor Control Register 17" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "RDMFIXSAR_17,DMA Fixed Source Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_17,DMA Fixed Destination Address Register 17" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8080+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_17,DMA Fixed Descriptor Base Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end endif sif ((cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")) tree "Channel 18" group.long 0x8100++0xB line.long 0x00 "RDMSAR_18,DMA Source Address Register 18" line.long 0x04 "RDMDAR_18,DMA Destination Address Register 18" line.long 0x08 "RDMTCR_18,DMA Transfer Count Register 18" group.long (0x8100+0x18)++0x03 line.long 0x00 "RDMTCRB_18,DMA Transfer Count Register 18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x28)++0x03 line.long 0x00 "RDMTSR_18,DMA Transfer Size Register 18" group.long (0x8100+0x038)++0x03 line.long 0x00 "RDMTSRB_18,DMA Transfer Size Register B_18" group.long (0x8100+0x0C)++0x03 line.long 0x00 "RDMCHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8100+0x1C)++0x03 line.long 0x00 "RDMCHCRB_18,DMA Channel Control Register B_18" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "RDMBUFCR_18,DMA Buffer Control Register_18" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8100+0x40)++0x03 line.long 0x00 "RDMRS_18,DMA Extended Resource Selector 18" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "RDMDPBASE_18,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_18,DMA Descriptor Control Register 18" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "RDMFIXSAR_18,DMA Fixed Source Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_18,DMA Fixed Destination Address Register 18" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8100+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_18,DMA Fixed Descriptor Base Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end elif (cpuis("R8A77995*")) tree "Channel 18" group.long 0x8100++0xB line.long 0x00 "RDMSAR_18,DMA Source Address Register 18" line.long 0x04 "RDMDAR_18,DMA Destination Address Register 18" line.long 0x08 "RDMTCR_18,DMA Transfer Count Register 18" group.long (0x8100+0x18)++0x03 line.long 0x00 "RDMTCRB_18,DMA Transfer Count Register 18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x28)++0x03 line.long 0x00 "RDMTSR_18,DMA Transfer Size Register 18" group.long (0x8100+0x038)++0x03 line.long 0x00 "RDMTSRB_18,DMA Transfer Size Register B_18" group.long (0x8100+0x0C)++0x03 line.long 0x00 "RDMCHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8100+0x1C)++0x03 line.long 0x00 "RDMCHCRB_18,DMA Channel Control Register B_18" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "RDMBUFCR_18,DMA Buffer Control Register_18" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8100+0x40)++0x03 line.long 0x00 "RDMRS_18,DMA Extended Resource Selector 18" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "RDMDPBASE_18,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_18,DMA Descriptor Control Register 18" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "RDMFIXSAR_18,DMA Fixed Source Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_18,DMA Fixed Destination Address Register 18" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8100+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_18,DMA Fixed Descriptor Base Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end else tree "Channel 18" group.long 0x8100++0xB line.long 0x00 "RDMSAR_18,DMA Source Address Register 18" line.long 0x04 "RDMDAR_18,DMA Destination Address Register 18" line.long 0x08 "RDMTCR_18,DMA Transfer Count Register 18" group.long (0x8100+0x18)++0x03 line.long 0x00 "RDMTCRB_18,DMA Transfer Count Register 18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x28)++0x03 line.long 0x00 "RDMTSR_18,DMA Transfer Size Register 18" group.long (0x8100+0x038)++0x03 line.long 0x00 "RDMTSRB_18,DMA Transfer Size Register B_18" group.long (0x8100+0x0C)++0x03 line.long 0x00 "RDMCHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No occurred,Occurred" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out Interrupt/Infinite repeat" textline " " bitfld.long 0x00 27. " RPT2 ,Source address register update" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Destination address register update" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RPT0 ,Transfer count register update" "Disabled,Enabled" bitfld.long 0x00 22. " DPB ,Descriptor start bit" "RDMSAR/RDMDAR/RDMTCR,Descriptor Read-out" textline " " bitfld.long 0x00 3.--4. 20.--21. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,DMA extended resource selector,?..." textline " " bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x8100+0x1C)++0x03 line.long 0x00 "RDMCHCRB_18,DMA Channel Control Register B_18" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycles,512 clock cycles,1024 clock cycles,2048 clock cycles,4096 clock cycles,8192 clock cycles,16384 clock cycles,32768 clock cycles" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,8,9,10,11,12,13,14,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "RDMBUFCR_18,DMA Buffer Control Register_18" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.long (0x8100+0x40)++0x03 line.long 0x00 "RDMRS_18,DMA Extended Resource Selector 18" bitfld.long 0x00 2.--7. " MID ,DMA request source adoption" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "RDMDPBASE_18,DMA Descriptor Base Address Register" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" line.long 0x04 "RDMDPCR_18,DMA Descriptor Control Register 18" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "RDMFIXSAR_18,DMA Fixed Source Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " SAR ,Source Address Register" line.long 0x04 "RDMFIXDAR_18,DMA Fixed Destination Address Register 18" hexmask.long.byte 0x04 0.--7. 1. " DAR ,Destination Address Register" group.long (0x8100+0x60)++0x03 line.long 0x00 "RDMFIXDPBASE_18,DMA Fixed Descriptor Base Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE" tree.end endif textline " " group.long 0xC0++0x0F line.long 0x00 "RDMSES,Secure function Secure Status register" bitfld.long 0x00 0. " Error ,Error Status" "No error,Error" line.long 0x04 "RDMSEADDR,Secure function Salve Error Address register" line.long 0x08 "RDMSEMID,Secure function Error Master ID register" tree.end endif textline " " width 16. sif (!cpuis("R8A77960*")) group.long 0xD0++0x03 line.long 0x00 "FDRDM_CONTROL0,Failure detection function control register 0" bitfld.long 0x00 28.--31. " DMA_CH2 ,DMA_CH2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DMA_CH1 ,DMA_CH1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " A_EN ,A_EN" "0,1" bitfld.long 0x00 0. " D_EN ,D_EN" "0,1" group.long 0xD4++0x03 line.long 0x00 "FDRDM_CONTROL1,Failure detection function control register 1" bitfld.long 0x00 28.--31. " DMA_CH2 ,DMA_CH2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DMA_CH1 ,DMA_CH1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " A_EN ,A_EN" "0,1" bitfld.long 0x00 0. " D_EN ,D_EN" "0,1" group.long 0xD8++0x03 line.long 0x00 "FDRDM_CONTROL2,Failure detection function control register 2" bitfld.long 0x00 28.--31. " DMA_CH2 ,DMA_CH2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DMA_CH1 ,DMA_CH1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " A_EN ,A_EN" "0,1" bitfld.long 0x00 0. " D_EN ,D_EN" "0,1" group.long 0xE0++0x03 line.long 0x00 "FDRDM_STATUS,Failure detection error status register" bitfld.long 0x00 2. " STT2 ,STT2" "0,1" bitfld.long 0x00 1. " STT1 ,STT1" "0,1" bitfld.long 0x00 0. " STT0 ,STT0" "0,1" endif width 0x0B tree.end tree.open "LBSC-DMAC" tree "LBSC Common Registers" base ad:0xFEC01000 width 13. group.long 0x00++0x03 line.long 0x00 "DTIMR,DMA Timer Control Register" hexmask.long.word 0x00 0.--15. 1. " DTIM ,DMAC Internal Timer Cycle Set" group.long 0x04++0x03 line.long 0x00 "DRMSKR,DMA Request Mask Control Register" bitfld.long 0x00 8.--11. " DRMSK2 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DRMSK1 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DRMSK0 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x0c++0x03 line.long 0x00 "DMLVLR,DMA Memory Access Priority Level Control Register" bitfld.long 0x00 2. " DMLV2 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" bitfld.long 0x00 1. " DMLV1 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" bitfld.long 0x00 0. " DMLV0 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" rgroup.long 0x10++0x03 line.long 0x00 "DINTSR,DMA Transfer End Interrupt Register" bitfld.long 0x00 2. " DTE2 ,DMA Transfer End Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 1. " DTE1 ,DMA Transfer End Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE0 ,DMA Transfer End Interrupt Status" "No interrupt,Interrupt" wgroup.long 0x14++0x03 line.long 0x00 "DINTCR,DMA Transfer End Interrupt Status Clear Register" bitfld.long 0x00 2. " DTEC2 ,DMA Transfer End Interrupt Status Clear" "No effect,Clear" bitfld.long 0x00 1. " DTEC1 ,DMA Transfer End Interrupt Status Clear" "No effect,Clear" bitfld.long 0x00 0. " DTEC0 ,DMA Transfer End Interrupt Status Clear" "No effect,Clear" group.long 0x18++0x03 line.long 0x00 "DINTMR,DMA Transfer End Interrupt Enable Register" bitfld.long 0x00 2. " DTEM2 ,DMA Transfer End Interrupt Output Control" "Disabled,Enabled" bitfld.long 0x00 1. " DTEM1 ,DMA Transfer End Interrupt Output Control" "Disabled,Enabled" bitfld.long 0x00 0. " DTEM0 ,DMA Transfer End Interrupt Output Control" "Disabled,Enabled" rgroup.long 0x20++0x03 line.long 0x00 "DACTSR,DMA Activation Status Register" bitfld.long 0x00 2. " DS2 ,DMA Channel 2 Status" "Idle,Active" bitfld.long 0x00 1. " DS1 ,DMA Channel 1 Status" "Idle,Active" bitfld.long 0x00 0. " DS0 ,DMA Channel 0 Status" "Idle,Active" group.long 0x24++0x0b line.long 0x0 "LSRSTR0,Software-Reset Register 0" eventfld.long 0x0 0. " SRST ,Software Reset" "No reset,Reset" line.long 0x4 "LSRSTR1,Software-Reset Register 1" eventfld.long 0x4 0. " SRST ,Software Reset" "No reset,Reset" line.long 0x8 "LSRSTR2,Software-Reset Register 2" eventfld.long 0x8 0. " SRST ,Software Reset" "No reset,Reset" group.long 0x80++0x03 line.long 0x00 "DMALGR,External DMA Data Alignment Control Register" bitfld.long 0x00 11. " DMLG2[EXBWE] ,EX-BUS data alignment conversion for DMAC channel 2" "Fixed,Variable" bitfld.long 0x00 10. " DMLG2[EXAC] ,Endian setting channel 2" "Big,Little" bitfld.long 0x00 8.--9. " DMLG2[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" textline " " bitfld.long 0x00 7. " DMLG1[EXBWE] ,EXBUS data alignment conversion for DMAC channel 1" "Fixed,Variable" bitfld.long 0x00 6. " DMLG1[EXAC] ,Endian setting channel 1" "Big,Little" bitfld.long 0x00 4.--5. " DMLG2[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" textline " " bitfld.long 0x00 3. " DMLG0[EXBWE] ,EXBUS data alignment conversion for DMAC channel 0" "Fixed,Variable" bitfld.long 0x00 2. " DMLG0[EXAC] ,Endian setting channel 0" "Big,Little" bitfld.long 0x00 0.--1. " DMLG0[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" sif cpu()=="RCARM2"||cpu()=="RCARV2H" group.long 0x90++0x03 line.long 0x00 "LBSC-DMASPR,LBSC-DMA AXI Priority Control Register" bitfld.long 0x00 8.--11. " SPRR2 ,AXI bus access priority level for DMAC channel 2" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 4.--7. " SPRR1 ,AXI bus access priority level for DMAC channel 1" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 0.--3. " SPRR0 ,AXI bus access priority level for DMAC channel 0" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" else group.long 0x90++0x03 line.long 0x00 "LBSC-DMASPR,LBSC-DMA SHwy Priority Control Register" bitfld.long 0x00 8.--11. " SPRR2 ,SHwy bus access priority level for DMAC channel 2" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 4.--7. " SPRR1 ,SHwy bus access priority level for DMAC channel 1" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 0.--3. " SPRR0 ,SHwy bus access priority level for DMAC channel 0" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" endif sif (!cpuis("RCARV2H")) group.long 0xC0++0x07 line.long 0x00 "UATMR,Ultra ATA DMA Mode Register" bitfld.long 0x00 24.--25. " UTDR1 ,Select the external pin for the DREQ in the Ultra ATA 1" "No external pin,DREQ0,DREQ1,No external pin" bitfld.long 0x00 21. " UTWE1 ,Enables or disables data alignment conversion for write operation in the Ultra ATA 1" "Disabled,Enabled" bitfld.long 0x00 20. " UTRE1 ,Enables or disables data alignment conversion for read operation in the Ultra ATA 1" "Disabled,Enabled" textline " " bitfld.long 0x00 17.--18. " UTSL1 ,Select the external pin for the IORDY in the Ultra ATA 1" "No external pin,EX_WAIT0,EX_WAIT1,EX_WAIT2" bitfld.long 0x00 16. " UATM1 ,Specifies the Ultra ATA 1 operating mode" "Normal DMA mode,Ultra ATA DMA mode" bitfld.long 0x00 8.--9. " UTDR0 ,Select the external pin for the DREQ signal in the Ultra ATA 0" "No external pin,DREQ0,DREQ1,No external pin" textline " " bitfld.long 0x00 5. " UTWE0 ,Enables or disables data alignment conversion for write operation in the Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 4. " UTRE0 ,Enables or disables data alignment conversion for read operation in the Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 1.--2. " UTSL0 ,Select the external pin for the IORDY in the Ultra ATA 0" "No external pin,EX_WAIT0,EX_WAIT1,EX_WAIT2" textline " " bitfld.long 0x00 0. " UATM0 ,Specifies the Ultra ATA 0 operating mode" "Normal DMA mode,Ultra ATA DMA mode" line.long 0x04 "UATWCR,Ultra ATA Write Cycle Setting Register" bitfld.long 0x04 16.--18. " UATWCYC1 ,Specify the setup and hold clock cycles of the write data in the Ultra ATA 1 [Setup/Hold]]" "1 cycle/1 cycle,2 cycles/1 cycle,2 cycles/2 cycles,3 cycles/2 cycles,3 cycles/3 cycles,4 cycles/3 cycles,4 cycles/4 cycles,5 cycles/4 cycles" bitfld.long 0x04 0.--2. " UATWCYC0 ,Specify the setup and hold clock cycles of the write data in the Ultra ATA 0 [Setup/Hold]" "1 cycle/1 cycle,2 cycles/1 cycle,2 cycles/2 cycles,3 cycles/2 cycles,3 cycles/3 cycles,4 cycles/3 cycles,4 cycles/4 cycles,5 cycles/4 cycles" group.long 0xC8++0x07 line.long 0x00 "UATTSR0,Ultra ATA Timeout Period Setting Register 0" line.long 0x04 "UATTSR1,Ultra ATA Timeout Period Setting Register 1" group.long 0xCC++0x07 line.long 0x00 "UATTER,Ultra ATA Error Indication Register" bitfld.long 0x00 16. " DER1 ,Timeout occurs due to a temporary communication stop in Ultra ATA 1" "No timeout,Timeout" bitfld.long 0x00 1. " PER ,PIO access is executed" "No access,Access" bitfld.long 0x00 0. " DER0 ,Timeout occurs due to a temporary communication stop in Ultra ATA 0" "No timeout,Timeout" line.long 0x04 "UATIER,Ultra ATA Error Interrupt Enable Register" bitfld.long 0x04 16. " DERE1 ,DER1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " PERE ,PER interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " DERE0 ,DER0 interrupt" "No interrupt,Interrupt" rgroup.long 0xD4++0x03 line.long 0x00 "UATCRCR,Ultra ATA CRC Code Indication Register" hexmask.long.word 0x00 16.--31. 1. " CRC1 ,CRC code created from the transfer data in Ultra ATA 1" hexmask.long.word 0x00 0.--15. 1. " CRC0 ,CRC code created from the transfer data in Ultra ATA 0" base ad:0xFEC01400 group.long 0x00++0x03 line.long 0x00 "UATTMR,Ultra ATA Transfer Mode Register" bitfld.long 0x00 9. " DTCD1 ,Controls the operating mode for continuation in case of transfer termination in Ultra ATA 1" "Disabled,Enabled" bitfld.long 0x00 8. " DTCD0 ,Controls the operating mode for continuation in case of transfer termination in Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 0. " DBG0 ,Test Bit" "0,1" endif width 0x0b tree.end tree "Channel 0" base ad:0xFEC01000 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long 0x08 0.--25. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Normal,Burst" textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 1" base ad:0xFEC01040 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Normal,Burst" textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 2" base ad:0xFEC01080 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 3" base ad:0xFEC010C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 4" base ad:0xFEC01100 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 5" base ad:0xFEC01140 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 6" base ad:0xFEC01180 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 7" base ad:0xFEC011C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 8" base ad:0xFEC01200 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 9" base ad:0xFEC01240 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 10" base ad:0xFEC01280 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SCIF0,SCIF1,SCIF2,SCIF3,SCIF4,SCIF5,,,,,HSPI0,HSPI1,,,,,,,,HSPI2,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 11" base ad:0xFEC012C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP1 Packet reception,MIMLCP2 CPU4 reception,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP0 Packet transmission,,MIMLCP 2 CPU4 transmission,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 12" base ad:0xFEC01300 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP1 Packet reception,MIMLCP2 CPU4 reception,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP0 Packet transmission,,MIMLCP 2 CPU4 transmission,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 13" base ad:0xFEC01340 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP1 Packet reception,MIMLCP2 CPU4 reception,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,MIMLCP0 Packet transmission,,MIMLCP 2 CPU4 transmission,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 14" base ad:0xFEC01380 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "USBF0,USBF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "USBF0,USBF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 15" base ad:0xFEC013C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "USBF0,USBF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "USBF0,USBF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 16" base ad:0xFEC01400 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 17" base ad:0xFEC01440 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 18" base ad:0xFEC01480 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 19" base ad:0xFEC014C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "HSCIF0,HSCIF1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 20" base ad:0xFEC01500 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,,,,,SDHI1,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,,,,,SDHI1,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 21" base ad:0xFEC01540 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 22" base ad:0xFEC01580 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 23" base ad:0xFEC015C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,,,,,SDHI0,,SDHI0 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 24" base ad:0xFEC01600 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",MMC0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "MMC0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 25" base ad:0xFEC01640 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,SDHI2,,SDHI2 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,SDHI2,,SDHI2 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 26" base ad:0xFEC01680 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,SDHI2,,SDHI2 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,SDHI2,,SDHI2 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 27" base ad:0xFEC016C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,,,,,SDHI2,,SDHI2 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,,,,,SDHI2,,SDHI2 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 28" base ad:0xFEC01700 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 29" base ad:0xFEC01740 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 30" base ad:0xFEC01780 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 31" base ad:0xFEC017C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 32" base ad:0xFEC01800 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 33" base ad:0xFEC01840 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 34" base ad:0xFEC01880 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 35" base ad:0xFEC018C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 36" base ad:0xFEC01900 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 37" base ad:0xFEC01940 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 38" base ad:0xFEC01980 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 39" base ad:0xFEC019C0 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,SDHI3,,SDHI3 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,SDHI3,,SDHI3 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 40" base ad:0xFEC01A00 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,SDHI3,,SDHI3 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,SDHI3,,SDHI3 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 41" base ad:0xFEC01A40 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" ",,,,,SDHI3,,SDHI3 CPRM,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" ",,,,SDHI3,,SDHI3 CPRM,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree "Channel 42" base ad:0xFEC01A80 width 11. group.long 0x00++0x17 line.long 0x00 "DSAR0,DMA Source Address Registers 0" line.long 0x04 "DDAR0,DMA Destination Address Registers 0" line.long 0x08 "DTCR0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR1,DMA Source Address Registers 1" line.long 0x10 "DDAR1,DMA Destination Address Registers 0" line.long 0x14 "DTCR1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA Transfer Count" sif (cpu()!="R8A7790X")&&(cpu()!="R8A7792X")&&(cpu()!="RCARE2")&&(!cpuis("RCARM2*")) bitfld.long 0x00 8.--12. " SDPT ,Transfer Source Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." bitfld.long 0x00 0.--4. " DDPT ,Transfer Destination Peripheral Access Port Select" "SSI0,SSI1,SSI2,SSI3,SSI4,SSI5,SSI6,SSI7,SSI8,SSI9,,,,,,,,HPBIF0,?..." endif group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Data alignment conversion enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU1 ,8-byte data alignment in 4-byte units performed" "Not performed,Performed" sif cpu()=="RCARM2"||cpu()=="R8A7792X" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" else bitfld.long 0x00 22. " SWMD ,Specifies memory (SuperHyway bus) access size" "1 byte,4 bytes" endif textline " " bitfld.long 0x00 20. " PKMD ,Data packing enable" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" textline "" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP1 ,Next DMA Transfer Information Register Status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP0 ,Next DMA Transfer Information Register Status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary Stop Status of DMA Information Updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary Stop Status of DMA Transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA Acceptance End Status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA Transfer Request Status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA Status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG02 ,Test bit" "0,1" sif (cpu()=="RCARH2"||cpu()=="RCARM2"||cpu()=="R8A7792X") rbitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--6. " DBG01 ,Test bit" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " DBG00 ,Test bit" "0,1,2,3,4,5,6,7" endif line.long 0x04 "DDBGR2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG10 ,Test bit" width 0x0b tree.end tree.end tree "R-GP2D (2D graphics rendering module)" base ad:0xE6EC0000 width 11. tree "System Control Register" group.long 0x00++0x3 line.long 0x00 "SCLR,System Control Register" bitfld.long 0x00 31. " SRES ,Software Reset" "No reset,Reset" bitfld.long 0x00 3. " RBRK ,Rendering Break" "Not broke,Broke" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x04++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 28.--31. " VER ,Version Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " BRK ,Rendering Break Flag" "Not broke,Broke" bitfld.long 0x00 2. " CER ,Command Error Flag" "No error,Error" textline " " bitfld.long 0x00 1. " INT ,Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " TRA ,Trap Flag - end of command execution" "Not ended,Ended" wgroup.long 0x08++0x03 line.long 0x00 "SRCR,Status Register Clear Register" bitfld.long 0x00 3. " BRCL ,Rendering Break Flag Clear" "No effect,Clear" bitfld.long 0x00 2. " CECL ,Command Error Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " INCL ,Interrupt Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRCL ,Trap Flag Clear" "No effect,Clear" group.long 0x0C++0x03 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 3. " BRE ,Rendering Break Flag Enable" "Disabled,Enabled" bitfld.long 0x00 2. " CEE ,Command Error Flag Enable" "Disabled,Enabled" bitfld.long 0x00 1. " INE ,Interrupt Flag Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRE ,Trap Flag Enable" "Disabled,Enabled" rgroup.long 0x10++0x03 line.long 0x00 "ICIDR,Interrupt Command ID Register" hexmask.long.byte 0x00 0.--7. 1. " ICID ,Interrupt Command ID" tree.end tree "Memory Control Register" group.long 0x40++0x2F line.long 0x00 "RTN0R,Return Address Register 0" hexmask.long 0x00 2.--28. 0x4 " RTN0 ,Return Address 0" line.long 0x04 "RTN1R,Return Address Register 1" hexmask.long 0x04 2.--28. 0x4 " RTN1 ,Return Address 1" line.long 0x08 "DLSAR,Display List Start Address Register" hexmask.long 0x08 4.--28. 0x10 " DLSA ,Display List Start Address" line.long 0x0c "SSAR,2-Dimensional Source Area Start Address Register" hexmask.long 0x0c 4.--28. 0x10 " SSA ,2-Dimensional Source Area Start Address" line.long 0x10 "RSAR,Rendering Start Address Register" hexmask.long 0x10 4.--28. 0x10 " RSA ,Rendering Start Address" line.long 0x14 "WSAR,Work Area Start Address Register" hexmask.long 0x14 4.--28. 0x10 " WSA ,Work Area Start Address" line.long 0x18 "SSTRR,Source Stride Register" hexmask.long.word 0x18 3.--12. 1. " SSTR ,Source Stride" line.long 0x1c "DSTRR,Destination Stride Register" hexmask.long.word 0x1c 4.--12. 1. " DSTR ,Destination Stride" line.long 0x20 "ENDCVR,Endian Conversion Control Register" bitfld.long 0x20 3. " LWSWAP ,Longword Swap" "Not swapped,Swapped" bitfld.long 0x20 2. " WSWAP ,Word Swap" "Not swapped,Swapped" bitfld.long 0x20 1. " BYTESWAP ,Byte Swap" "Not swapped,Swapped" textline " " bitfld.long 0x20 0. " BITSWAP ,Bit Swap" "Not swapped,Swapped" line.long 0x24 "ASAR,Alfa-Map Area Start Address Register" hexmask.long 0x24 4.--28. 0x10 " ASA ,Alfa-Map Area Start Address" line.long 0x28 "ASTRR,Alfa-Map Stride Register" hexmask.long.word 0x28 3.--12. 1. " ASTR ,Alfa-Map Stride" line.long 0x2c "ADREXTR,Address Extension Register" bitfld.long 0x2c 29.--31. " ADREXT ,Address Extension" "0,1,2,3,4,5,6,7" rgroup.long 0x74++0x03 line.long 0x00 "RTNSTKR,Return Address STK Register" hexmask.long 0x00 2.--28. 0x4 " RTNSTK ,Return Address STK" tree.end tree "Color Control Register" group.long 0x80++0xF line.long 0x00 "STCR,Source Transparent Color Register" bitfld.long 0x00 24. " STC1 ,[1-bit/pixel] Source Transparent Color" "Low,High" hexmask.long.byte 0x00 16.--23. 1. " [STC8/STC32] ,[8-bit/pixel]|[32-bit/pixel R] Source Transparent Color" hexmask.long.word 0x00 0.--15. 1. " [STC16/STC32] ,[16-bit/pixel]|[32-bit/pixel G and B] Source Transparent Color" line.long 0x04 "DTCR,Destination Transparent Color Register" hexmask.long.byte 0x04 16.--23. 1. " [DTC8/DTC32] ,[8-bit/pixel]|[32-bit/pixel] R Destination Transparent Color" hexmask.long.word 0x04 0.--15. 1. " [DTC16/DTC32] ,[16-bit/pixel]|[32-bit/pixel G and B] Destination Transparent Color 16" line.long 0x08 "ALPHR,Alpha Value Register" hexmask.long.byte 0x08 0.--7. 1. " ALPH ,Alpha Value" line.long 0x0C "COFSR,Color Offset Register" hexmask.long.byte 0x0C 16.--23. 1. " COR ,Color Offset R" hexmask.long.byte 0x0C 8.--15. 1. " COG ,Color Offset G" hexmask.long.byte 0x0C 0.--7. 1. " COB ,Color Offset B" group.long 0x98++0x03 line.long 0x00 "AVALUE8R,A Value 8 Register" hexmask.long.byte 0x00 0.--7. 1. " AVALUE8 ,A Value 8" group.long 0x9C++0x03 line.long 0x00 "ATCLR,Alpha Test Control Register" bitfld.long 0x00 28.--30. " SATSEL ,Source Alpha Test Mode Select" "ALWAYS,NEVER,LESS,LEQUAL,EQUAL,GEQUAL,GREATER,NEQUAL" hexmask.long.byte 0x00 16.--23. 1. " SATRV ,Source Alpha Test Reference Value " bitfld.long 0x00 12.--14. " DATSEL ,Destination Alpha Test Mode Select" "ALWAYS,NEVER,LESS,LEQUAL,EQUAL,GEQUAL,GREATER,NEQUAL" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATRV ,Destination Alpha Test Reference Value" tree.end tree "Rendering Control Register" if (((per.l(ad:0xE6EC0000+0xC0))&0x40000)==0x00000) if (((per.l(ad:0xE6EC0000+0x1FC))&0x1000000)==0x0000000) group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB," bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB," bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE,Value A" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" else group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB," bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB," bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE8R,Cmd parameters" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" endif else if (((per.l(ad:0xE6EC0000+0x1FC))&0x1000000)==0x0000000) group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB,ARGB" bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB,ARGB" bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE,Value A" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" else group.long 0xC0++0x03 line.long 0x00 "RCLR,Rendering Control Register" bitfld.long 0x00 27. " SAEP ,Source Alpha Enable Polarity [A value for blending/drawing back]" "1/0,0/1" bitfld.long 0x00 25. " STP ,Source Transparent Color Polarity" "Match,Unmatch" bitfld.long 0x00 24. " DTP ,Destination Transparent Color Polarity" "Match,Unmatch" textline " " bitfld.long 0x00 21. " SPF ,Source Pixel Format" "RGB,ARGB" bitfld.long 0x00 20. " DPF ,Destination Pixel Format" "RGB,ARGB" bitfld.long 0x00 18. " GBM ,Graphics Bit Mode" "8-bit/pixel,16-bit/pixel" textline " " bitfld.long 0x00 17. " SAU ,Source Value A Use" "AVALUE8R,Cmd parameters" bitfld.long 0x00 16. " AVALUE ,Value A" "0,1" bitfld.long 0x00 12.--13. " BDS ,Thickness Direction Boundary Select" "Boundary A,Boundary B,Boundary C,Boundary D" textline " " bitfld.long 0x00 8.--9. " LALPHAE ,Line Alpha Enable" "Not performed,,Performed,ARGB=1555 rewritten" bitfld.long 0x00 7. " 2DVCLPE ,2-Dimensional Vertex Clipping Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NAA ,New Antialias Mode" "Not performed,Performed" textline " " bitfld.long 0x00 2. " WLM ,Bold Line Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LPCE ,Line Pre-Clipping Enable" "Not performed,Performed" bitfld.long 0x00 0. " COM ,Connection Drawing Mask" "Drawn,Not drawn" endif endif rgroup.long 0xC4++0x1F line.long 0x00 "CSTR,Command Status Register" hexmask.long 0x00 2.--28. 0x4 " CST ,Command Status" line.long 0x04 "CURR,Current Pointer Register" hexmask.long.word 0x04 16.--31. 1. " XC ,Current Pointer X" hexmask.long.word 0x04 0.--15. 1. " YC ,Current Pointer Y" line.long 0x08 "LCOR,Local Offset Register" hexmask.long.word 0x08 16.--31. 1. " XO ,Local Offset X" hexmask.long.word 0x08 0.--15. 1. " YO ,Local Offset Y" line.long 0x0c "SCLMAR,System Clipping Area MAX Register" hexmask.long.word 0x0C 16.--27. 1. " SXMAX ,System Clipping XMAX" hexmask.long.word 0x0C 0.--11. 1. " SYMAX ,System Clipping YMAX" line.long 0x10 "UCLMIR,User Clipping Area MIN Register" hexmask.long.word 0x10 16.--27. 1. " UXMIN ,User Clipping XMIN" hexmask.long.word 0x10 0.--11. 1. " UYMIN ,User Clipping YMIN" line.long 0x14 "UCLMAR,User Clipping Area MAX Register" hexmask.long.word 0x14 16.--27. 1. " UXMAX ,User Clipping XMAX" hexmask.long.word 0x14 0.--11. 1. " UYMAX ,User Clipping YMAX" line.long 0x18 "RUCLMIR,Relative User Clipping Area MIN Register" hexmask.long.word 0x18 16.--27. 1. " RUXMIN ,Relative User Clipping XMIN" hexmask.long.word 0x18 0.--11. 1. " RUYMIN ,Relative User Clipping YMIN" line.long 0x1C "RUCLMAR,Relative User Clipping Area MAX Register" hexmask.long.word 0x1C 16.--27. 1. " RUXMAX ,Relative User Clipping XMAX" hexmask.long.word 0x1C 0.--11. 1. " RUYMAX ,Relative User Clipping YMAX" if (((per.l(ad:0xE6EC0000+0x1FC))&0x1000000)==0x0000000) group.long 0xF0++0x03 line.long 0x00 "RCL2R,Rendering Control 2 Register" bitfld.long 0x00 21. " DAE ,Destination Alpha Enable" "Regardless of value A,Value A" bitfld.long 0x00 20. " PSTYLE ,Pattern Style Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " PXSIZE ,Pattern X Size" "8 pixels,16 pixels,32 pixels,64 pixels" textline " " bitfld.long 0x00 16.--17. " PYSIZE ,Pattern Y Size" "8 pixels,16 pixels,32 pixels,64 pixels" else group.long 0xF0++0x03 line.long 0x00 "RCL2R,Rendering Control 2 Register" bitfld.long 0x00 21. " DAE ,Destination Alpha Enable" "Regardless of value A,Test passed" bitfld.long 0x00 20. " PSTYLE ,Pattern Style Enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " PXSIZE ,Pattern X Size" "8 pixels,16 pixels,32 pixels,64 pixels" textline " " bitfld.long 0x00 16.--17. " PYSIZE ,Pattern Y Size" "8 pixels,16 pixels,32 pixels,64 pixels" endif group.long 0xF8++0x03 line.long 0x00 "POFSR,Pattern Offset Register" hexmask.long.word 0x00 16.--27. 1. " POFSX ,Pattern Offset X" hexmask.long.word 0x00 0.--11. 1. " POFSY ,Pattern Offset Y" tree.end tree "Coordinate Transformation Control Register" group.long 0x100++0x3B line.long 0x00 "GTRCR,Coordinate Transformation Control Register" bitfld.long 0x00 31. " GTE ,Coordinate Transformation Enable" "Disabled,Enabled" bitfld.long 0x00 0. " AFE ,Affine Transformation Enable" "Disabled,Enabled" line.long 0x04 "MTRAR,Matrix Parameter A Register" line.long 0x08 "MTRBR,Matrix Parameter B Register" line.long 0x0c "MTRCR,Matrix Parameter C Register" line.long 0x10 "MTRDR,Matrix Parameter D Register" line.long 0x14 "MTRER,Matrix Parameter E Register" line.long 0x18 "MTRFR,Matrix Parameter F Register" line.long 0x1c "MTRGR,Matrix Parameter G Register" line.long 0x20 "MTRHR,Matrix Parameter H Register" line.long 0x24 "MTRIR,Matrix Parameter I Register" line.long 0x28 "GTROFSXR,Coordinate Transformation Offset X Register" hexmask.long.word 0x28 0.--15. 1. " GTROFSX ,Coordinate Transformation Offset X" line.long 0x2c "GTROFSYR,Coordinate Transformation Offset Y Register" hexmask.long.word 0x2C 0.--15. 1. " GTROFSY ,Coordinate Transformation Offset Y" line.long 0x30 "ZCLPMINR,Z Clipping Area MIN Register" line.long 0x34 "ZCLPMAXR,Z Clipping Area MAX Register" line.long 0x38 "ZSATVMINR,Z Saturation Value MIN Register" group.long 0x160++0x3 line.long 0x00 "2DVCEXTR,2-Dimensional Vertex Clip Extension Width Register" bitfld.long 0x00 0.--5. " 2DVCEXT ,2-Dimensional Vertex Clip Extension Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "Mode Control Register" group.long 0x1FC++0x3 line.long 0x00 "MD0R,Mode 0 Register" bitfld.long 0x00 24. " GBM2 ,Graphic Bit Mode" "In accord with GBM,ARGB8888 format" textline " " bitfld.long 0x00 8. " ACDE ,Anti-aliasing Coverage Drawing Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DITHERENB ,Dither Enable" "Disabled,Enabled" tree.end width 11. tree.end tree.open "DU (Display Unit)" tree "DU 0" base ad:0xFEB00000 width 13. tree "Display Control Registers" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "DSYSR_0,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input Pad Latch Timing Select" "Rising edge,Falling edge" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 16. " IUPD ,Internal Updating Disable" "No,Yes" textline " " bitfld.long 0x00 8.--9. " DRES/DEN ,Display Reset/Display Enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM ,Scan Mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" else group.long 0x00++0x03 line.long 0x00 "DSYSR_0,Display Unit System Control Register" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." textline " " bitfld.long 0x00 4.--5. " SCM_1 ,Scan Mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" endif textline "" group.long 0x04++0x03 line.long 0x00 "DSMR_0,Display Mode Register" bitfld.long 0x00 28. " VSPM ,VSYNC Pin Mode" "VSYNC signal,CSYNC signal" bitfld.long 0x00 27. " ODPM ,ODDF Pin Mode" "ODDF signal,CLAMP signal" bitfld.long 0x00 25.--26. " DIPM ,DISP Pin Mode" "DISP signal,CSYNC signal,,DE signal" textline " " bitfld.long 0x00 24. " CSPM ,CSYNC Pin Mode" "CSYNC signal,HSYNC signal" bitfld.long 0x00 19. " DIL ,DISP Polarity Selection" "High-active,Polarity inverted" bitfld.long 0x00 18. " VSL ,VSYNC Polarity Selection" "Low-active,Polarity inverted" textline " " bitfld.long 0x00 17. " HSL ,HSYNC Polarity Selection" "Low-active,Polarity inverted" bitfld.long 0x00 16. " DDIS ,DISP Output Disable" "No,Yes" bitfld.long 0x00 15. " CDEL ,CDE Polarity Selection" "High-active,Polarity inverted" textline " " bitfld.long 0x00 13.--14. " CDEM ,CDE Output Mode" "Normal mode,Normal mode,Low level,High level" bitfld.long 0x00 12. " CDED ,CDE Disable" "No,Yes" bitfld.long 0x00 8. " ODEV ,ODD Signal Polarity Selection" "Low level,High level" textline " " bitfld.long 0x00 6.--7. " CSY ,CSYNC Mode" "Mode 0,,Mode 2,Mode 3" rgroup.long 0x08++0x03 line.long 0x00 "DSSR_0,Display Status Register" bitfld.long 0x00 30.--31. " VC_1_FB ,Video Capture Frame 1 Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 28.--29. " VC_0_FB ,Video Capture Frame 0 Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 26.--27. " VC_2_FB ,Video Capture 2 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 25. " DFB10 ,Display Frame Buffer 10 Flag" "AP_2_DSA_0_R,AP_2_DSA_1_R" bitfld.long 0x00 24. " DFB_9 ,Display Frame Buffer 9 Flag" "AP_1_DSA_0_R,AP_1_DSA_1_R" bitfld.long 0x00 23. " DFB_8 ,Display Frame Buffer 8 Flag" "P8DSA_0_R,P8DSA_1_R" textline " " bitfld.long 0x00 22. " DFB_7 ,Display Frame Buffer 7 Flag" "AP_7_DSA_0_R,AP_7_DSA_1_R" bitfld.long 0x00 21. " DFB_6 ,Display Frame Buffer 6 Flag" "AP_6_DSA_0_R,AP_6_DSA_1_R" bitfld.long 0x00 22. " DFB_5 ,Display Frame Buffer 5 Flag" "AP_5_DSA_0_R,AP_5_DSA_1_R" textline " " bitfld.long 0x00 19. " DFB_4 ,Display Frame Buffer 4 Flag" "P4DSA_0_R,P4DSA_1_R" bitfld.long 0x00 18. " DFB_3 ,Display Frame Buffer 3 Flag" "P3DSA_0_R,P3DSA_1_R" bitfld.long 0x00 17. " DFB_2 ,Display Frame Buffer 2 Flag" "P2DSA_0_R,P2DSA_1_R" textline " " bitfld.long 0x00 16. " DFB_1 ,Display Frame Buffer 1 Flag" "P1DSA_0_R,P1DSA_1_R" textline " " bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag(EXVSYNC)" "Detected,Not detected" bitfld.long 0x00 14. " FRM ,Frame Flag" "Low,High" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Low,High" bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Low,High" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto Rendering Display Change Flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto Rendering Display Change Flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto Rendering Display Change Flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto Rendering Display Change Flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto Rendering Display Change Flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto Rendering Display Change Flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto Rendering Display Change Flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto Rendering Display Change Flag 1" "Not switched,Switched" wgroup.long 0x0C++0x03 line.long 0x00 "DSRCR_0,Display Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer Underflow Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " ADCL_8 ,Auto Rendering Display Change Flag Clear 8" "No effect,Clear" bitfld.long 0x00 6. " ADCL_7 ,Auto Rendering Display Change Flag Clear 7" "No effect,Clear" bitfld.long 0x00 5. " ADCL_6 ,Auto Rendering Display Change Flag Clear 6" "No effect,Clear" textline " " bitfld.long 0x00 4. " ADCL_5 ,Auto Rendering Display Change Flag Clear 5" "No effect,Clear" bitfld.long 0x00 3. " ADCL_4 ,Auto Rendering Display Change Flag Clear 4" "No effect,Clear" bitfld.long 0x00 2. " ADCL_3 ,Auto Rendering Display Change Flag Clear 3" "No effect,Clear" textline " " bitfld.long 0x00 1. " ADCL_2 ,Auto Rendering Display Change Flag Clear 2" "No effect,Clear" bitfld.long 0x00 0. " ADCL_1 ,Auto Rendering Display Change Flag Clear 1" "No effect,Clear" group.long 0x10++0x0b line.long 0x00 "DIER_0,Display Unit Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer Underflow Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ADCE_8 ,Auto Rendering Display Change Flag 8 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ADCE_7 ,Auto Rendering Display Change Flag 7 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " ADCE_6 ,Auto Rendering Display Change Flag 6 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ADCE_5 ,Auto Rendering Display Change Flag 5 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ADCE_4 ,Auto Rendering Display Change Flag 4 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " ADCE_3 ,Auto Rendering Display Change Flag 3 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADCE_2 ,Auto Rendering Display Change Flag 2 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " ADCE_1 ,Auto Rendering Display Change Flag 1 Interrupt Enable" "Disabled,Enabled" line.long 0x04 "CPCR_0,Color Palette Control Register" bitfld.long 0x04 19. " CP_4_CE ,Color Palette 4 Change Enable" "Disabled,Enabled" bitfld.long 0x04 18. " CP_3_CE ,Color Palette 3 Change Enable" "Disabled,Enabled" bitfld.long 0x04 17. " CP_2_CE ,Color Palette 2 Change Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " CP_1_CE ,Color Palette 1 Change Enable" "Disabled,Enabled" line.long 0x08 "DPPR_0,Display Plane Priority Register" bitfld.long 0x08 31. " DPE_8 ,Display Plane Priority 8 Enable" "Disabled,Enabled" bitfld.long 0x08 28.--30. " DPS_8 ,Display Plane Priority 8 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 27. " DPE_7 ,Display Plane Priority 7 Enable" "Disabled,Enabled" bitfld.long 0x08 24.--26. " DPS_7 ,Display Plane Priority 7 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 23. " DPE_6 ,Display Plane Priority 6 Enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " DPS_6 ,Display Plane Priority 6 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 19. " DPE_5 ,Display Plane Priority 5 Enable" "Disabled,Enabled" bitfld.long 0x08 16.--18. " DPS_5 ,Display Plane Priority 5 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 15. " DPE_4 ,Display Plane Priority 4 Enable" "Disabled,Enabled" bitfld.long 0x08 12.--14. " DPS_4 ,Display Plane Priority 4 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 11. " DPE_3 ,Display Plane Priority 3 Enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " DPS_3 ,Display Plane Priority 3 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 7. " DPE_2 ,Display Plane Priority 2 Enable" "Disabled,Enabled" bitfld.long 0x08 4.--6. " DPS_2 ,Display Plane Priority 2 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 3. " DPE_1 ,Display Plane Priority 1 Enable" "Disabled,Enabled" bitfld.long 0x08 0.--2. " DPS_1 ,Display Plane Priority 1 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" group.long 0x20++0x03 line.long 0x00 "DEFR_0,Display Unit Extensional Function Enable Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR Enabling Code [0x7773]" bitfld.long 0x00 12. " EXSL ,External Sync Signal Select" "Post-divison clocks,Pre-divison clocks" bitfld.long 0x00 11. " EXVL ,External Vsync Latch Select" "Every clock cycle,Rising edge" textline " " bitfld.long 0x00 5. " EXUP ,External Updating Mode" "Internal,External" bitfld.long 0x00 4. " VCUP ,Vertical Cycle Register Update Timing Select" "Falling VSYNC,Rising VSYNC" bitfld.long 0x00 0. " DEFE ,Display Unit Extensional Function Enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "DAPCR_0,Display Alpha Ratio Plane Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code To make DAPCR accessible [0x7773]" bitfld.long 0x00 4. " AP_2_E ,Alpha Ratio Plane 2 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " AP_1_E ,Alpha Ratio Plane 1 Enable" "Disabled,Enabled" if ((((per.l(ad:0xFEB00000+0x34))&0x1)==0x1)&&(((per.l(ad:0xFEB00000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display Capture A Bit 2 Function Select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display Capture Data 2 Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display Capture 2 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " CAB ,Display Capture A Bit Function Select" "0,1" bitfld.long 0x00 4. " CDF ,Display Capture Data Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB00000+0x34))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 5. " CAB ,Display Capture A Bit Function Select" "0,1" bitfld.long 0x00 4. " CDF ,Display Capture Data Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB00000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display Capture A Bit 2 Function Select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display Capture Data 2 Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display Capture 2 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" else group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" endif group.long 0x34++0x03 line.long 0x00 "DEFR20,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7775]" bitfld.long 0x00 0. " DEFE_2_G ,Display Unit Extensional Function Enable SHNavi_2_G" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "DEFR30,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7776]" bitfld.long 0x00 0. " DEFE_3 ,Display Unit Extensional Function Enable from SH-Navi3" "Disabled,Enabled" group.long 0x3c++0x03 line.long 0x00 "DEFR40,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7777]" bitfld.long 0x00 5. " LRUO ,LRU Function Off" "No,yes" rgroup.long 0x60++0x03 line.long 0x00 "DVCSR_0,Display Unit Video Capture Status Register" bitfld.long 0x00 22.--23. " VC_3_FB_2 ,Video Capture 3 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 20.--21. " VC_2_FB_2 ,Video Capture 2 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 18.--19. " VC_1_FB_2 ,Video Capture 1 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 16.--17. " VC_0_FB_2 ,Video Capture 0 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 6.--7. " VC_3_FB ,Video Capture 3 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 4.--5. " VC_2_FB ,Video Capture 2 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 2.--3. " VC_1_FB ,Video Capture 1 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 0.--1. " VC_0_FB ,Video Capture 0 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" group.long 0xE0++0x03 line.long 0x00 "DEFR50,Display Unit Extensional Function Enable Register 5" hexmask.long.byte 0x00 24.--31. 1. " CODE ,DEFR_5 Enabling Code [0x66]" bitfld.long 0x00 14.--15. " YCRGB_2 ,YC-RGB Select 2" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 12.--13. " YCRGB_1 ,YC-RGB Select 1" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" textline " " bitfld.long 0x00 10.--11. " DRC_1 ,DRC Select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 8.--9. " DRC_1 ,DRC Select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 2. " DRCS ,DRC Select" "Processor 0,Processor 1" textline " " bitfld.long 0x00 0. " DEFE_5 ,Display Unit Extensional Function Enable 5" "Disabled,Enabled" group.long 0xE4++0x03 line.long 0x00 "DDLTR_0,Display Data Latency Adjustment Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DDLTR Enabling Code [0x7766]" bitfld.long 0x00 6. " DLAR_1 ,Display Data Latency Adjustment RGBYC2" "No delay,Delay" bitfld.long 0x00 5. " DLAY_1 ,Display Data Latency Adjustment YCRGB2" "No delay,Delay" textline " " bitfld.long 0x00 4. " DLAD_1 ,Display Data Latency Adjustment DRC1" "No delay,Delay" bitfld.long 0x00 1. " DLAY_0 ,Display Data Latency Adjustment YCRGB0" "No delay,Delay" bitfld.long 0x00 0. " DLAD_0 ,Display Data Latency Adjustment DRC0" "No delay,Delay" group.long 0xE8++0x03 line.long 0x00 "DEFR60,Display Unit Extensional Function Enable Register 6" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR_6 Enabling Code [0x7778]" bitfld.long 0x00 10.--11. " ODPM12 ,ODDF Pin Mode 22" "ODMP2,,DISP,CDE" bitfld.long 0x00 8.--9. " ODPM02 ,ODDF Pin Mode 12" "ODMP2,,DISP,CDE" textline " " bitfld.long 0x00 4. " TCNE_0 ,T-CON Enable 0" "Disabled,Enabled" bitfld.long 0x00 2. " MLOS_1 ,DMultiple Output Select 1" "24-bit,12-bit" base ad:0xFEB20000 rgroup.long 0x08++0x3 line.long 0x00 "DD_1_SSR_0,Display Unit Domain 1 Status Register 0" bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag" "Not occurred,Occurred" bitfld.long 0x00 14. " FRM ,Frame Flag" "Not occurred,Occurred" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Not occurred,Occurred" bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "Not occurred,Occurred" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto Rendering Display Change Flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto Rendering Display Change Flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto Rendering Display Change Flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto Rendering Display Change Flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto Rendering Display Change Flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto Rendering Display Change Flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto Rendering Display Change Flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto Rendering Display Change Flag 1" "Not switched,Switched" wgroup.long 0x0C++0x3 line.long 0x00 "DD_1_SRCR_0,Display Unit Domain 1 Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer Underflow Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " ADCL_8 ,Auto Rendering Display Change Flag Clear 8" "No effect,Clear" bitfld.long 0x00 6. " ADCL_7 ,Auto Rendering Display Change Flag Clear 7" "No effect,Clear" bitfld.long 0x00 5. " ADCL_6 ,Auto Rendering Display Change Flag Clear 6" "No effect,Clear" textline " " bitfld.long 0x00 4. " ADCL_5 ,Auto Rendering Display Change Flag Clear 5" "No effect,Clear" bitfld.long 0x00 3. " ADCL_4 ,Auto Rendering Display Change Flag Clear 4" "No effect,Clear" bitfld.long 0x00 2. " ADCL_3 ,Auto Rendering Display Change Flag Clear 3" "No effect,Clear" textline " " bitfld.long 0x00 1. " ADCL_2 ,Auto Rendering Display Change Flag Clear 2" "No effect,Clear" bitfld.long 0x00 0. " ADCL_1 ,Auto Rendering Display Change Flag Clear 1" "No effect,Clear" group.long 0x10++0x3 line.long 0x00 "DD_1_IER_0,Display Unit Domain 1 Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer Underflow Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ADCE_8 ,Auto Rendering Display Change Flag 8 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " ADCE_7 ,Auto Rendering Display Change Flag 7 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " ADCE_6 ,Auto Rendering Display Change Flag 6 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ADCE_5 ,Auto Rendering Display Change Flag 5 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " ADCE_4 ,Auto Rendering Display Change Flag 4 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " ADCE_3 ,Auto Rendering Display Change Flag 3 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADCE_2 ,Auto Rendering Display Change Flag 2 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " ADCE_1 ,Auto Rendering Display Change Flag 1 Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x7 line.long 0x00 "DEF_8_R0,Display Unit Extensional FunctionControl 8 Register 0" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF_8_Rm Enabling Code" bitfld.long 0x00 6. " VSCS ,VSP_1 Channel Select" "DU1/DU_0 plane 2,DU_2 plane 1" bitfld.long 0x00 4.--5. " DRGBS ,Digital RGB Output Select" "DU0,DU1,DU2,?..." textline " " bitfld.long 0x00 0. " DEFE_8 ,Display Unit Extensional Function Enable 8" "Disabled,Enabled" line.long 0x04 "DOFLR_0,Display Unit Output Signal Fixed Level Register 0" hexmask.long.word 0x04 16.--31. 1. " CODE ,DOFLR_0 Enabling Code" bitfld.long 0x04 13. " HSYCFL_1 ,HSYNC (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 12. " VSYCFL_1 ,VSYNC (DU1) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 11. " ODDFL_1 ,ODDF (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 10. " DISPFL_1 ,DISP (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 9. " CDEFL_1 ,CDE (DU1) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 8. " RGBFL_1 ,RGB (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 5. " HSYCFL_0 ,HSYNC (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 4. " VSYCFL_0 ,VSYNC (DU0) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 3. " ODDFL_0 ,ODDF (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 2. " DISPFL_0 ,DISP (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 1. " CDEFL_0 ,CDE (DU0) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 0. " RGBFL_0 ,RGB (DU0) Signal Fixed Low Level" "Normal,Fixed low" group.long 0x28++0x3 line.long 0x00 "DIDSR,Display Unit Input Dot Clock Select Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DIDSR Enabling Code" bitfld.long 0x00 12.--13. " LDCS_2 ,DU_2 LVDS Dot Clock Select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 10.--11. " LDCS_1 ,DU_1 LVDS Dot Clock Select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" textline " " bitfld.long 0x00 8.--9. " LDCS_0 ,DU_0 LVDS Dot Clock Select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 4.--5. " PDCS_2 ,DU_2 Pad Dot Clock Select" "DU_DOTCLKIN2,DU_DOTCLKIN0,DU_DOTCLKIN2,DU_DOTCLKIN1" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 Pad Dot Clock Select" "DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN2" textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 Pad Dot Clock Select" "DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN2" tree.end base ad:0xFEB00000 tree "Display Timing Generation Registers" width 11. group.long 0x40++0x1F line.long 0x00 "HDSR_0,Horizontal Display Start Register" hexmask.long.word 0x00 0.--9. 1. " HDS ,Horizontal Display Start" line.long 0x04 "HDER_0,Horizontal Display End Register" hexmask.long.word 0x04 0.--11. 1. " HDE ,Horizontal Display End" line.long 0x08 "VDSR_0,Vertical Display Start Register" hexmask.long.word 0x08 0.--8. 1. " VDS ,Vertical Display Start" line.long 0x0c "VDER_0,Vertical Display End Register" hexmask.long.word 0x0c 0.--10. 1. " VDE ,Vertical Display End" line.long 0x10 "HCR_0,Horizontal Cycle Register" hexmask.long.word 0x10 0.--11. 1. " HC ,Horizontal Cycle" line.long 0x14 "HSWR_0,Horizontal Sync Width Register" hexmask.long.word 0x14 0.--8. 1. " HSW ,Horizontal Sync Width" line.long 0x18 "VCR_0,Vertical Cycle Register" hexmask.long.word 0x18 0.--10. 1. " VC ,Vertical Cycle" line.long 0x1c "VSPR_0,Vertical Sync Point Register" hexmask.long.word 0x1c 0.--10. 1. " VSP ,Vertical Sync Point" if (((per.l(ad:0xFEB00000+0x04))&0x80)==0x80) group.long (0x60)++0x7 line.long 0x00 "EQWR_0,Equal Pulse Width Register" hexmask.long.byte 0x00 0.--6. 1. " EQW ,Equal Pulse Width" line.long 0x04 "SPWR_0,Serration Width Register" hexmask.long.word 0x04 0.--9. 1. " SPW ,Serration Width" else hgroup.long 0x60++0x3 hide.long 0x00 "EQWR_0,Equal Pulse Width Register" hgroup.long 0x64++0x3 hide.long 0x00 "SPWR_0,Separation Width Register" endif group.long 0x70++0xF line.long 0x00 "CLAMPSR_0,CLAMP Signal Start Register" hexmask.long.word 0x00 0.--11. 1. " CLAMPS ,CLAMP Signal Start" line.long 0x04 "CLAMPWR_0,CLAMP Signal Width Register" hexmask.long.word 0x04 0.--11. 1. " CLAMPW ,CLAMP Signal Width" line.long 0x08 "DESR_0,DE Signal Start Register" hexmask.long.word 0x08 0.--11. 1. " DES ,DE Signal Start" line.long 0x0c "DEWR_0,DE Signal Width Register" hexmask.long.word 0x0c 0.--11. 1. " DEW ,DE Signal Width" tree.end width 11. tree "Display Attribute Registers" group.long 0x80++0xF line.long 0x0 "CP_1_TR_0,Color Palette Transparent Color Register" bitfld.long 0x0 15. " CP_1_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x0 14. " CP_1_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x0 13. " CP_1_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x0 12. " CP_1_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x0 11. " CP_1_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x0 10. " CP_1_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x0 9. " CP_1_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x0 8. " CP_1_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x0 7. " CP_1_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x0 6. " CP_1_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x0 5. " CP_1_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x0 4. " CP_1_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x0 3. " CP_1_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x0 2. " CP_1_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x0 1. " CP_1_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x0 0. " CP_1_I0 ,Color Palette Index 0" "Not set,Set" line.long 0x4 "CP_2_TR_0,Color Palette Transparent Color Register" bitfld.long 0x4 15. " CP_2_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x4 14. " CP_2_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x4 13. " CP_2_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x4 12. " CP_2_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x4 11. " CP_2_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x4 10. " CP_2_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x4 9. " CP_2_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x4 8. " CP_2_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x4 7. " CP_2_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x4 6. " CP_2_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x4 5. " CP_2_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x4 4. " CP_2_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x4 3. " CP_2_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x4 2. " CP_2_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x4 1. " CP_2_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x4 0. " CP_2_I0 ,Color Palette Index 0" "Not set,Set" line.long 0x8 "CP_3_TR_0,Color Palette Transparent Color Register" bitfld.long 0x8 15. " CP_3_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x8 14. " CP_3_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x8 13. " CP_3_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x8 12. " CP_3_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x8 11. " CP_3_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x8 10. " CP_3_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x8 9. " CP_3_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x8 8. " CP_3_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x8 7. " CP_3_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x8 6. " CP_3_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x8 5. " CP_3_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x8 4. " CP_3_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x8 3. " CP_3_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x8 2. " CP_3_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x8 1. " CP_3_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x8 0. " CP_3_I0 ,Color Palette Index 0" "Not set,Set" line.long 0xC "CP_4_TR_0,Color Palette Transparent Color Register" bitfld.long 0xC 15. " CP_4_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0xC 14. " CP_4_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0xC 13. " CP_4_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0xC 12. " CP_4_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0xC 11. " CP_4_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0xC 10. " CP_4_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0xC 9. " CP_4_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0xC 8. " CP_4_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0xC 7. " CP_4_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0xC 6. " CP_4_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0xC 5. " CP_4_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0xC 4. " CP_4_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0xC 3. " CP_4_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0xC 2. " CP_4_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0xC 1. " CP_4_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0xC 0. " CP_4_I0 ,Color Palette Index 0" "Not set,Set" group.long 0x90++0xF line.long 0x00 "DOOR_0,Display-Off Mode Output Register" hexmask.long.byte 0x00 18.--23. 1. " DOR ,Display Off Mode Output Red" hexmask.long.byte 0x00 10.--15. 1. " DOG ,Display Off Mode Output Green" hexmask.long.byte 0x00 2.--7. 1. " DOB ,Display Off Mode Output Blue" line.long 0x04 "CDER_0,Color Detection Register" hexmask.long.byte 0x04 18.--23. 1. " CDR ,Color Detection Red" hexmask.long.byte 0x04 10.--15. 1. " CDG ,Color Detection Green" hexmask.long.byte 0x04 2.--7. 1. " CDB ,Color Detection Blue" line.long 0x08 "BPOR_0,Ground Color Register" hexmask.long.byte 0x08 18.--23. 1. " BPOR ,Background Plane Output Red" hexmask.long.byte 0x08 10.--15. 1. " BPOG ,Background Plane Output Green" hexmask.long.byte 0x08 2.--7. 1. " BPOB ,Background Plane Output Blue" line.long 0x0c "RINTOFSR_0,Raster Interrupt Offset Register" hexmask.long.word 0x0c 0.--10. 1. " RINTOFS ,Raster Interrupt Offset" tree.end tree.open "Display Planes 1-8" tree.open "Display Plane 1" base (ad:0xFEB00000+0x100) width 10. group.long 0x00++0x03 line.long 0x00 "P1MR,Plane 1 Mode Register" bitfld.long 0x00 26.--27. " P1VISL ,Plane 1 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P1YCDF ,Plane 1 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P1TC ,Plane 1 Transparent Color" "P1TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P1SPM ,Plane 1 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P1CPSL ,Plane 1 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P1DDF ,Plane 1 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P1MWR,Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P1MWX ,Plane 1 Memory Width X" if (((per.l(ad:0xFEB00000+0x100))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P1ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P1ABIT ,Plane 1 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P1BRSL ,Plane 1 Blend Ratio Selection" "P1ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P1ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P1ALPHA ,Plane 1 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P1ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P1ABIT ,Plane 1 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P1ALPHA ,Plane 1 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P1DPY ,Plane 1 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P1DPY ,Plane 1 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P1SPXR,Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P1SPX ,Plane 1 Starting Position X" line.long 0x04 "P1SPYR,Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P1SPY ,Plane 1 Starting Position Y" line.long 0x08 "P1WASPR,Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P1WASPY ,Plane 1 Wrap Around Starting Position Y" line.long 0x0C "P1WAMWR,Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P1WAMWY ,Plane 1 Wrap Around Memory Width Y" line.long 0x10 "P1BTR,Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P1BTA ,Plane 1 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P1BTB ,Plane 1 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P1TC1R,Plane 1 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P1TC1 ,Plane 1 Transparent Color 1" line.long 0x04 "P1TC2R,Plane 1 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P1TC2 ,Plane 1 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P1TC3R,Plane 1 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P1TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P1TC3 ,Plane 1 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P1MLR,Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P1MLY ,Plane 1 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P1SWAPR,Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P1DIGN ,Plane 1 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P1SPQW ,Plane 1 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P1SPLW ,Plane 1 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P1SPWD ,Plane 1 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P1SPBY ,Plane 1 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P1DDCR,Plane 1 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P1DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P1LRGB1 ,Plane 1 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P1LRGB0 ,Plane 1 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P1DDCR2,Plane 1 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P1DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P1NV21 ,Plane 1 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P1Y420 ,Plane 1 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P1DIVU ,Plane 1 UV Data from Divided YUV" "P1DDF bit of P1MR,UV data" textline " " bitfld.long 0x00 0. " P1DIVY ,Plane 1 Y Data from Divided YUV" "P1DDF bit of P1MR,Y data" group.long 0x90++0x03 line.long 0x00 "P1DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P1DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P1SDFS ,Plane 1 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P1EDF ,Plane 1 Extensional Data Format" "P1DDF bit of P1MR/P1LRGB1 or P1LRGB0 bit in P1DDCR/P1DIVU or P1DIVY bit in P1DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 2" base (ad:0xFEB00000+0x200) width 10. group.long 0x00++0x03 line.long 0x00 "P2MR,Plane 2 Mode Register" bitfld.long 0x00 26.--27. " P2VISL ,Plane 2 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P2YCDF ,Plane 2 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P2TC ,Plane 2 Transparent Color" "P2TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P2SPM ,Plane 2 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P2CPSL ,Plane 2 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P2DDF ,Plane 2 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P2MWR,Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P2MWX ,Plane 2 Memory Width X" if (((per.l(ad:0xFEB00000+0x200))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P2ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P2ABIT ,Plane 2 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P2BRSL ,Plane 2 Blend Ratio Selection" "P2ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P2ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P2ALPHA ,Plane 2 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P2ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P2ABIT ,Plane 2 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P2ALPHA ,Plane 2 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P2DPY ,Plane 2 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P2DPY ,Plane 2 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P2SPXR,Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P2SPX ,Plane 2 Starting Position X" line.long 0x04 "P2SPYR,Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P2SPY ,Plane 2 Starting Position Y" line.long 0x08 "P2WASPR,Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P2WASPY ,Plane 2 Wrap Around Starting Position Y" line.long 0x0C "P2WAMWR,Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P2WAMWY ,Plane 2 Wrap Around Memory Width Y" line.long 0x10 "P2BTR,Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P2BTA ,Plane 2 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P2BTB ,Plane 2 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P2TC1R,Plane 2 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P2TC1 ,Plane 2 Transparent Color 1" line.long 0x04 "P2TC2R,Plane 2 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P2TC2 ,Plane 2 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P2TC3R,Plane 2 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P2TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P2TC3 ,Plane 2 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P2MLR,Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P2MLY ,Plane 2 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P2SWAPR,Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P2DIGN ,Plane 2 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P2SPQW ,Plane 2 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2SPLW ,Plane 2 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P2SPWD ,Plane 2 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P2SPBY ,Plane 2 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P2DDCR,Plane 2 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P2DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P2LRGB1 ,Plane 2 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P2LRGB0 ,Plane 2 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P2DDCR2,Plane 2 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P2DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P2NV21 ,Plane 2 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P2Y420 ,Plane 2 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P2DIVU ,Plane 2 UV Data from Divided YUV" "P2DDF bit of P2MR,UV data" textline " " bitfld.long 0x00 0. " P2DIVY ,Plane 2 Y Data from Divided YUV" "P2DDF bit of P2MR,Y data" group.long 0x90++0x03 line.long 0x00 "P2DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P2DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P2SDFS ,Plane 2 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P2EDF ,Plane 2 Extensional Data Format" "P2DDF bit of P2MR/P2LRGB1 or P2LRGB0 bit in P2DDCR/P2DIVU or P2DIVY bit in P2DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 3" base (ad:0xFEB00000+0x300) width 10. group.long 0x00++0x03 line.long 0x00 "P3MR,Plane 3 Mode Register" bitfld.long 0x00 26.--27. " P3VISL ,Plane 3 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P3YCDF ,Plane 3 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P3TC ,Plane 3 Transparent Color" "P3TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P3SPM ,Plane 3 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P3CPSL ,Plane 3 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P3DDF ,Plane 3 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P3MWR,Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P3MWX ,Plane 3 Memory Width X" if (((per.l(ad:0xFEB00000+0x300))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P3ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P3ABIT ,Plane 3 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P3BRSL ,Plane 3 Blend Ratio Selection" "P3ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P3ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P3ALPHA ,Plane 3 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P3ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P3ABIT ,Plane 3 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P3ALPHA ,Plane 3 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P3DPY ,Plane 3 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P3DPY ,Plane 3 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P3SPXR,Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P3SPX ,Plane 3 Starting Position X" line.long 0x04 "P3SPYR,Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P3SPY ,Plane 3 Starting Position Y" line.long 0x08 "P3WASPR,Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P3WASPY ,Plane 3 Wrap Around Starting Position Y" line.long 0x0C "P3WAMWR,Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P3WAMWY ,Plane 3 Wrap Around Memory Width Y" line.long 0x10 "P3BTR,Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P3BTA ,Plane 3 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P3BTB ,Plane 3 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P3TC1R,Plane 3 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P3TC1 ,Plane 3 Transparent Color 1" line.long 0x04 "P3TC2R,Plane 3 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P3TC2 ,Plane 3 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P3TC3R,Plane 3 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P3TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P3TC3 ,Plane 3 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P3MLR,Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P3MLY ,Plane 3 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P3SWAPR,Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P3DIGN ,Plane 3 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P3SPQW ,Plane 3 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P3SPLW ,Plane 3 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P3SPWD ,Plane 3 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P3SPBY ,Plane 3 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P3DDCR,Plane 3 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P3DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P3LRGB1 ,Plane 3 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P3LRGB0 ,Plane 3 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P3DDCR2,Plane 3 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P3DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P3NV21 ,Plane 3 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P3Y420 ,Plane 3 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P3DIVU ,Plane 3 UV Data from Divided YUV" "P3DDF bit of P3MR,UV data" textline " " bitfld.long 0x00 0. " P3DIVY ,Plane 3 Y Data from Divided YUV" "P3DDF bit of P3MR,Y data" group.long 0x90++0x03 line.long 0x00 "P3DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P3DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P3SDFS ,Plane 3 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P3EDF ,Plane 3 Extensional Data Format" "P3DDF bit of P3MR/P3LRGB1 or P3LRGB0 bit in P3DDCR/P3DIVU or P3DIVY bit in P3DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 4" base (ad:0xFEB00000+0x400) width 10. group.long 0x00++0x03 line.long 0x00 "P4MR,Plane 4 Mode Register" bitfld.long 0x00 26.--27. " P4VISL ,Plane 4 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P4YCDF ,Plane 4 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P4TC ,Plane 4 Transparent Color" "P4TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P4SPM ,Plane 4 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P4CPSL ,Plane 4 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P4DDF ,Plane 4 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P4MWR,Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P4MWX ,Plane 4 Memory Width X" if (((per.l(ad:0xFEB00000+0x400))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P4ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P4ABIT ,Plane 4 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P4BRSL ,Plane 4 Blend Ratio Selection" "P4ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P4ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P4ALPHA ,Plane 4 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P4ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P4ABIT ,Plane 4 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P4ALPHA ,Plane 4 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P4DPY ,Plane 4 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P4DPY ,Plane 4 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P4SPXR,Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P4SPX ,Plane 4 Starting Position X" line.long 0x04 "P4SPYR,Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P4SPY ,Plane 4 Starting Position Y" line.long 0x08 "P4WASPR,Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P4WASPY ,Plane 4 Wrap Around Starting Position Y" line.long 0x0C "P4WAMWR,Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P4WAMWY ,Plane 4 Wrap Around Memory Width Y" line.long 0x10 "P4BTR,Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P4BTA ,Plane 4 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P4BTB ,Plane 4 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P4TC1R,Plane 4 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P4TC1 ,Plane 4 Transparent Color 1" line.long 0x04 "P4TC2R,Plane 4 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P4TC2 ,Plane 4 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P4TC3R,Plane 4 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P4TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P4TC3 ,Plane 4 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P4MLR,Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P4MLY ,Plane 4 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P4SWAPR,Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P4DIGN ,Plane 4 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P4SPQW ,Plane 4 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P4SPLW ,Plane 4 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P4SPWD ,Plane 4 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P4SPBY ,Plane 4 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P4DDCR,Plane 4 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P4DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P4LRGB1 ,Plane 4 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P4LRGB0 ,Plane 4 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P4DDCR2,Plane 4 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P4DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P4NV21 ,Plane 4 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P4Y420 ,Plane 4 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P4DIVU ,Plane 4 UV Data from Divided YUV" "P4DDF bit of P4MR,UV data" textline " " bitfld.long 0x00 0. " P4DIVY ,Plane 4 Y Data from Divided YUV" "P4DDF bit of P4MR,Y data" group.long 0x90++0x03 line.long 0x00 "P4DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P4DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P4SDFS ,Plane 4 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P4EDF ,Plane 4 Extensional Data Format" "P4DDF bit of P4MR/P4LRGB1 or P4LRGB0 bit in P4DDCR/P4DIVU or P4DIVY bit in P4DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 5" base (ad:0xFEB00000+0x500) width 10. group.long 0x00++0x03 line.long 0x00 "P5MR,Plane 5 Mode Register" bitfld.long 0x00 26.--27. " P5VISL ,Plane 5 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P5YCDF ,Plane 5 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P5TC ,Plane 5 Transparent Color" "P5TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P5SPM ,Plane 5 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P5CPSL ,Plane 5 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P5DDF ,Plane 5 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P5MWR,Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P5MWX ,Plane 5 Memory Width X" if (((per.l(ad:0xFEB00000+0x500))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P5ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P5ABIT ,Plane 5 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P5BRSL ,Plane 5 Blend Ratio Selection" "P5ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P5ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P5ALPHA ,Plane 5 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P5ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P5ABIT ,Plane 5 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P5ALPHA ,Plane 5 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P5DPY ,Plane 5 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P5DPY ,Plane 5 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P5SPXR,Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P5SPX ,Plane 5 Starting Position X" line.long 0x04 "P5SPYR,Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P5SPY ,Plane 5 Starting Position Y" line.long 0x08 "P5WASPR,Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P5WASPY ,Plane 5 Wrap Around Starting Position Y" line.long 0x0C "P5WAMWR,Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P5WAMWY ,Plane 5 Wrap Around Memory Width Y" line.long 0x10 "P5BTR,Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P5BTA ,Plane 5 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P5BTB ,Plane 5 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P5TC1R,Plane 5 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P5TC1 ,Plane 5 Transparent Color 1" line.long 0x04 "P5TC2R,Plane 5 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P5TC2 ,Plane 5 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P5TC3R,Plane 5 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P5TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P5TC3 ,Plane 5 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P5MLR,Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P5MLY ,Plane 5 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P5SWAPR,Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P5DIGN ,Plane 5 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P5SPQW ,Plane 5 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P5SPLW ,Plane 5 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P5SPWD ,Plane 5 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P5SPBY ,Plane 5 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P5DDCR,Plane 5 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P5DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P5LRGB1 ,Plane 5 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P5LRGB0 ,Plane 5 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P5DDCR2,Plane 5 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P5DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P5NV21 ,Plane 5 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P5Y420 ,Plane 5 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P5DIVU ,Plane 5 UV Data from Divided YUV" "P5DDF bit of P5MR,UV data" textline " " bitfld.long 0x00 0. " P5DIVY ,Plane 5 Y Data from Divided YUV" "P5DDF bit of P5MR,Y data" group.long 0x90++0x03 line.long 0x00 "P5DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P5DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P5SDFS ,Plane 5 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P5EDF ,Plane 5 Extensional Data Format" "P5DDF bit of P5MR/P5LRGB1 or P5LRGB0 bit in P5DDCR/P5DIVU or P5DIVY bit in P5DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 6" base (ad:0xFEB00000+0x600) width 10. group.long 0x00++0x03 line.long 0x00 "P6MR,Plane 6 Mode Register" bitfld.long 0x00 26.--27. " P6VISL ,Plane 6 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P6YCDF ,Plane 6 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P6TC ,Plane 6 Transparent Color" "P6TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P6SPM ,Plane 6 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P6CPSL ,Plane 6 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P6DDF ,Plane 6 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P6MWR,Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P6MWX ,Plane 6 Memory Width X" if (((per.l(ad:0xFEB00000+0x600))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P6ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P6ABIT ,Plane 6 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P6BRSL ,Plane 6 Blend Ratio Selection" "P6ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P6ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P6ALPHA ,Plane 6 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P6ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P6ABIT ,Plane 6 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P6ALPHA ,Plane 6 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P6DPY ,Plane 6 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P6DPY ,Plane 6 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P6SPXR,Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P6SPX ,Plane 6 Starting Position X" line.long 0x04 "P6SPYR,Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P6SPY ,Plane 6 Starting Position Y" line.long 0x08 "P6WASPR,Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P6WASPY ,Plane 6 Wrap Around Starting Position Y" line.long 0x0C "P6WAMWR,Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P6WAMWY ,Plane 6 Wrap Around Memory Width Y" line.long 0x10 "P6BTR,Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P6BTA ,Plane 6 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P6BTB ,Plane 6 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P6TC1R,Plane 6 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P6TC1 ,Plane 6 Transparent Color 1" line.long 0x04 "P6TC2R,Plane 6 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P6TC2 ,Plane 6 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P6TC3R,Plane 6 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P6TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P6TC3 ,Plane 6 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P6MLR,Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P6MLY ,Plane 6 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P6SWAPR,Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P6DIGN ,Plane 6 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P6SPQW ,Plane 6 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P6SPLW ,Plane 6 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P6SPWD ,Plane 6 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P6SPBY ,Plane 6 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P6DDCR,Plane 6 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P6DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P6LRGB1 ,Plane 6 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P6LRGB0 ,Plane 6 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P6DDCR2,Plane 6 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P6DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P6NV21 ,Plane 6 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P6Y420 ,Plane 6 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P6DIVU ,Plane 6 UV Data from Divided YUV" "P6DDF bit of P6MR,UV data" textline " " bitfld.long 0x00 0. " P6DIVY ,Plane 6 Y Data from Divided YUV" "P6DDF bit of P6MR,Y data" group.long 0x90++0x03 line.long 0x00 "P6DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P6DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P6SDFS ,Plane 6 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P6EDF ,Plane 6 Extensional Data Format" "P6DDF bit of P6MR/P6LRGB1 or P6LRGB0 bit in P6DDCR/P6DIVU or P6DIVY bit in P6DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 7" base (ad:0xFEB00000+0x700) width 10. group.long 0x00++0x03 line.long 0x00 "P7MR,Plane 7 Mode Register" bitfld.long 0x00 26.--27. " P7VISL ,Plane 7 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P7YCDF ,Plane 7 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P7TC ,Plane 7 Transparent Color" "P7TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P7SPM ,Plane 7 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P7CPSL ,Plane 7 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P7DDF ,Plane 7 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P7MWR,Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P7MWX ,Plane 7 Memory Width X" if (((per.l(ad:0xFEB00000+0x700))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P7ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P7ABIT ,Plane 7 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P7BRSL ,Plane 7 Blend Ratio Selection" "P7ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P7ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P7ALPHA ,Plane 7 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P7ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P7ABIT ,Plane 7 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P7ALPHA ,Plane 7 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P7DPY ,Plane 7 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P7DPY ,Plane 7 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P7SPXR,Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P7SPX ,Plane 7 Starting Position X" line.long 0x04 "P7SPYR,Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P7SPY ,Plane 7 Starting Position Y" line.long 0x08 "P7WASPR,Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P7WASPY ,Plane 7 Wrap Around Starting Position Y" line.long 0x0C "P7WAMWR,Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P7WAMWY ,Plane 7 Wrap Around Memory Width Y" line.long 0x10 "P7BTR,Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P7BTA ,Plane 7 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P7BTB ,Plane 7 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P7TC1R,Plane 7 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P7TC1 ,Plane 7 Transparent Color 1" line.long 0x04 "P7TC2R,Plane 7 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P7TC2 ,Plane 7 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P7TC3R,Plane 7 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P7TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P7TC3 ,Plane 7 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P7MLR,Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P7MLY ,Plane 7 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P7SWAPR,Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P7DIGN ,Plane 7 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P7SPQW ,Plane 7 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P7SPLW ,Plane 7 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P7SPWD ,Plane 7 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P7SPBY ,Plane 7 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P7DDCR,Plane 7 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P7DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P7LRGB1 ,Plane 7 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P7LRGB0 ,Plane 7 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P7DDCR2,Plane 7 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P7DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P7NV21 ,Plane 7 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P7Y420 ,Plane 7 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P7DIVU ,Plane 7 UV Data from Divided YUV" "P7DDF bit of P7MR,UV data" textline " " bitfld.long 0x00 0. " P7DIVY ,Plane 7 Y Data from Divided YUV" "P7DDF bit of P7MR,Y data" group.long 0x90++0x03 line.long 0x00 "P7DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P7DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P7SDFS ,Plane 7 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P7EDF ,Plane 7 Extensional Data Format" "P7DDF bit of P7MR/P7LRGB1 or P7LRGB0 bit in P7DDCR/P7DIVU or P7DIVY bit in P7DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 8" base (ad:0xFEB00000+0x800) width 10. group.long 0x00++0x03 line.long 0x00 "P8MR,Plane 8 Mode Register" bitfld.long 0x00 26.--27. " P8VISL ,Plane 8 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P8YCDF ,Plane 8 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P8TC ,Plane 8 Transparent Color" "P8TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P8SPM ,Plane 8 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P8CPSL ,Plane 8 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P8DDF ,Plane 8 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P8MWR,Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P8MWX ,Plane 8 Memory Width X" if (((per.l(ad:0xFEB00000+0x800))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P8ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P8ABIT ,Plane 8 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P8BRSL ,Plane 8 Blend Ratio Selection" "P8ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P8ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P8ALPHA ,Plane 8 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P8ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P8ABIT ,Plane 8 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P8ALPHA ,Plane 8 Blend Ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P8DPY ,Plane 8 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P8DPY ,Plane 8 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P8SPXR,Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P8SPX ,Plane 8 Starting Position X" line.long 0x04 "P8SPYR,Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P8SPY ,Plane 8 Starting Position Y" line.long 0x08 "P8WASPR,Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P8WASPY ,Plane 8 Wrap Around Starting Position Y" line.long 0x0C "P8WAMWR,Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P8WAMWY ,Plane 8 Wrap Around Memory Width Y" line.long 0x10 "P8BTR,Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P8BTA ,Plane 8 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P8BTB ,Plane 8 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P8TC1R,Plane 8 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P8TC1 ,Plane 8 Transparent Color 1" line.long 0x04 "P8TC2R,Plane 8 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P8TC2 ,Plane 8 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P8TC3R,Plane 8 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P8TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P8TC3 ,Plane 8 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P8MLR,Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P8MLY ,Plane 8 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P8SWAPR,Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P8DIGN ,Plane 8 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P8SPQW ,Plane 8 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P8SPLW ,Plane 8 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P8SPWD ,Plane 8 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P8SPBY ,Plane 8 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P8DDCR,Plane 8 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P8DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P8LRGB1 ,Plane 8 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P8LRGB0 ,Plane 8 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P8DDCR2,Plane 8 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P8DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P8NV21 ,Plane 8 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P8Y420 ,Plane 8 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P8DIVU ,Plane 8 UV Data from Divided YUV" "P8DDF bit of P8MR,UV data" textline " " bitfld.long 0x00 0. " P8DIVY ,Plane 8 Y Data from Divided YUV" "P8DDF bit of P8MR,Y data" group.long 0x90++0x03 line.long 0x00 "P8DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P8DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P8SDFS ,Plane 8 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P8EDF ,Plane 8 Extensional Data Format" "P8DDF bit of P8MR/P8LRGB1 or P8LRGB0 bit in P8DDCR/P8DIVU or P8DIVY bit in P8DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.end tree "Alpha-Ratio Planes 1-8" tree "Alpha-Ratio Plane 1" base (ad:0xFEB00000+0xA100) width 10. group.long 0x00++0x03 line.long 0x00 "P1MR,Plane 1 Mode Register" bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P1MWR,Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P1MWX ,Plane 1 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P1DPY ,Plane 1 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P1DPY ,Plane 1 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P1SPXR,Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P1SPX ,Plane 1 Starting Position X" line.long 0x04 "P1SPYR,Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P1SPY ,Plane 1 Starting Position Y" line.long 0x08 "P1WASPR,Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P1WASPY ,Plane 1 Wrap Around Starting Position Y" line.long 0x0C "P1WAMWR,Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P1WAMWY ,Plane 1 Wrap Around Memory Width Y" line.long 0x10 "P1BTR,Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P1BTA ,Plane 1 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P1BTB ,Plane 1 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P1MLR,Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P1MLY ,Plane 1 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P1SWAPR,Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P1DIGN ,Plane 1 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P1SPQW ,Plane 1 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P1SPLW ,Plane 1 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P1SPWD ,Plane 1 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P1SPBY ,Plane 1 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P1DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P1DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P1SDFS ,Plane 1 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P1EDF ,Plane 1 Extensional Data Format" "P1DDF bit of P1MR/P1LRGB1 or P1LRGB0 bit in P1DDCR/P1DIVU or P1DIVY bit in P1DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 2" base (ad:0xFEB00000+0xA200) width 10. group.long 0x00++0x03 line.long 0x00 "P2MR,Plane 2 Mode Register" bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P2MWR,Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P2MWX ,Plane 2 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P2DPY ,Plane 2 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P2DPY ,Plane 2 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P2SPXR,Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P2SPX ,Plane 2 Starting Position X" line.long 0x04 "P2SPYR,Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P2SPY ,Plane 2 Starting Position Y" line.long 0x08 "P2WASPR,Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P2WASPY ,Plane 2 Wrap Around Starting Position Y" line.long 0x0C "P2WAMWR,Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P2WAMWY ,Plane 2 Wrap Around Memory Width Y" line.long 0x10 "P2BTR,Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P2BTA ,Plane 2 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P2BTB ,Plane 2 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P2MLR,Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P2MLY ,Plane 2 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P2SWAPR,Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P2DIGN ,Plane 2 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P2SPQW ,Plane 2 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2SPLW ,Plane 2 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P2SPWD ,Plane 2 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P2SPBY ,Plane 2 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P2DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P2DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P2SDFS ,Plane 2 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P2EDF ,Plane 2 Extensional Data Format" "P2DDF bit of P2MR/P2LRGB1 or P2LRGB0 bit in P2DDCR/P2DIVU or P2DIVY bit in P2DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 3" base (ad:0xFEB00000+0xA300) width 10. group.long 0x00++0x03 line.long 0x00 "P3MR,Plane 3 Mode Register" bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P3MWR,Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P3MWX ,Plane 3 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P3DPY ,Plane 3 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P3DPY ,Plane 3 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P3SPXR,Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P3SPX ,Plane 3 Starting Position X" line.long 0x04 "P3SPYR,Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P3SPY ,Plane 3 Starting Position Y" line.long 0x08 "P3WASPR,Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P3WASPY ,Plane 3 Wrap Around Starting Position Y" line.long 0x0C "P3WAMWR,Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P3WAMWY ,Plane 3 Wrap Around Memory Width Y" line.long 0x10 "P3BTR,Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P3BTA ,Plane 3 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P3BTB ,Plane 3 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P3MLR,Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P3MLY ,Plane 3 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P3SWAPR,Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P3DIGN ,Plane 3 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P3SPQW ,Plane 3 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P3SPLW ,Plane 3 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P3SPWD ,Plane 3 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P3SPBY ,Plane 3 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P3DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P3DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P3SDFS ,Plane 3 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P3EDF ,Plane 3 Extensional Data Format" "P3DDF bit of P3MR/P3LRGB1 or P3LRGB0 bit in P3DDCR/P3DIVU or P3DIVY bit in P3DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 4" base (ad:0xFEB00000+0xA400) width 10. group.long 0x00++0x03 line.long 0x00 "P4MR,Plane 4 Mode Register" bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P4MWR,Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P4MWX ,Plane 4 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P4DPY ,Plane 4 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P4DPY ,Plane 4 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P4SPXR,Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P4SPX ,Plane 4 Starting Position X" line.long 0x04 "P4SPYR,Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P4SPY ,Plane 4 Starting Position Y" line.long 0x08 "P4WASPR,Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P4WASPY ,Plane 4 Wrap Around Starting Position Y" line.long 0x0C "P4WAMWR,Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P4WAMWY ,Plane 4 Wrap Around Memory Width Y" line.long 0x10 "P4BTR,Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P4BTA ,Plane 4 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P4BTB ,Plane 4 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P4MLR,Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P4MLY ,Plane 4 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P4SWAPR,Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P4DIGN ,Plane 4 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P4SPQW ,Plane 4 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P4SPLW ,Plane 4 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P4SPWD ,Plane 4 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P4SPBY ,Plane 4 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P4DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P4DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P4SDFS ,Plane 4 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P4EDF ,Plane 4 Extensional Data Format" "P4DDF bit of P4MR/P4LRGB1 or P4LRGB0 bit in P4DDCR/P4DIVU or P4DIVY bit in P4DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 5" base (ad:0xFEB00000+0xA500) width 10. group.long 0x00++0x03 line.long 0x00 "P5MR,Plane 5 Mode Register" bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P5MWR,Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P5MWX ,Plane 5 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P5DPY ,Plane 5 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P5DPY ,Plane 5 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P5SPXR,Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P5SPX ,Plane 5 Starting Position X" line.long 0x04 "P5SPYR,Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P5SPY ,Plane 5 Starting Position Y" line.long 0x08 "P5WASPR,Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P5WASPY ,Plane 5 Wrap Around Starting Position Y" line.long 0x0C "P5WAMWR,Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P5WAMWY ,Plane 5 Wrap Around Memory Width Y" line.long 0x10 "P5BTR,Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P5BTA ,Plane 5 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P5BTB ,Plane 5 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P5MLR,Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P5MLY ,Plane 5 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P5SWAPR,Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P5DIGN ,Plane 5 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P5SPQW ,Plane 5 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P5SPLW ,Plane 5 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P5SPWD ,Plane 5 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P5SPBY ,Plane 5 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P5DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P5DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P5SDFS ,Plane 5 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P5EDF ,Plane 5 Extensional Data Format" "P5DDF bit of P5MR/P5LRGB1 or P5LRGB0 bit in P5DDCR/P5DIVU or P5DIVY bit in P5DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 6" base (ad:0xFEB00000+0xA600) width 10. group.long 0x00++0x03 line.long 0x00 "P6MR,Plane 6 Mode Register" bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P6MWR,Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P6MWX ,Plane 6 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P6DPY ,Plane 6 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P6DPY ,Plane 6 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P6SPXR,Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P6SPX ,Plane 6 Starting Position X" line.long 0x04 "P6SPYR,Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P6SPY ,Plane 6 Starting Position Y" line.long 0x08 "P6WASPR,Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P6WASPY ,Plane 6 Wrap Around Starting Position Y" line.long 0x0C "P6WAMWR,Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P6WAMWY ,Plane 6 Wrap Around Memory Width Y" line.long 0x10 "P6BTR,Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P6BTA ,Plane 6 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P6BTB ,Plane 6 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P6MLR,Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P6MLY ,Plane 6 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P6SWAPR,Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P6DIGN ,Plane 6 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P6SPQW ,Plane 6 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P6SPLW ,Plane 6 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P6SPWD ,Plane 6 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P6SPBY ,Plane 6 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P6DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P6DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P6SDFS ,Plane 6 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P6EDF ,Plane 6 Extensional Data Format" "P6DDF bit of P6MR/P6LRGB1 or P6LRGB0 bit in P6DDCR/P6DIVU or P6DIVY bit in P6DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 7" base (ad:0xFEB00000+0xA700) width 10. group.long 0x00++0x03 line.long 0x00 "P7MR,Plane 7 Mode Register" bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P7MWR,Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P7MWX ,Plane 7 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P7DPY ,Plane 7 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P7DPY ,Plane 7 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P7SPXR,Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P7SPX ,Plane 7 Starting Position X" line.long 0x04 "P7SPYR,Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P7SPY ,Plane 7 Starting Position Y" line.long 0x08 "P7WASPR,Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P7WASPY ,Plane 7 Wrap Around Starting Position Y" line.long 0x0C "P7WAMWR,Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P7WAMWY ,Plane 7 Wrap Around Memory Width Y" line.long 0x10 "P7BTR,Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P7BTA ,Plane 7 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P7BTB ,Plane 7 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P7MLR,Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P7MLY ,Plane 7 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P7SWAPR,Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P7DIGN ,Plane 7 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P7SPQW ,Plane 7 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P7SPLW ,Plane 7 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P7SPWD ,Plane 7 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P7SPBY ,Plane 7 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P7DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P7DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P7SDFS ,Plane 7 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P7EDF ,Plane 7 Extensional Data Format" "P7DDF bit of P7MR/P7LRGB1 or P7LRGB0 bit in P7DDCR/P7DIVU or P7DIVY bit in P7DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 8" base (ad:0xFEB00000+0xA800) width 10. group.long 0x00++0x03 line.long 0x00 "P8MR,Plane 8 Mode Register" bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P8MWR,Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P8MWX ,Plane 8 Memory Width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P8DPY ,Plane 8 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P8DPY ,Plane 8 Display Position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P8SPXR,Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P8SPX ,Plane 8 Starting Position X" line.long 0x04 "P8SPYR,Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P8SPY ,Plane 8 Starting Position Y" line.long 0x08 "P8WASPR,Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P8WASPY ,Plane 8 Wrap Around Starting Position Y" line.long 0x0C "P8WAMWR,Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P8WAMWY ,Plane 8 Wrap Around Memory Width Y" line.long 0x10 "P8BTR,Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P8BTA ,Plane 8 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P8BTB ,Plane 8 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P8MLR,Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P8MLY ,Plane 8 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P8SWAPR,Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P8DIGN ,Plane 8 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P8SPQW ,Plane 8 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P8SPLW ,Plane 8 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P8SPWD ,Plane 8 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P8SPBY ,Plane 8 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P8DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P8DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P8SDFS ,Plane 8 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P8EDF ,Plane 8 Extensional Data Format" "P8DDF bit of P8MR/P8LRGB1 or P8LRGB0 bit in P8DDCR/P8DIVU or P8DIVY bit in P8DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.end base ad:0xFEB00000 tree "Display Capture Registers" tree "Display Capture 1 Registers" group.long 0xC100++0x7 line.long 0x00 "DC1MR,Display Capture 1 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC1MR Enabling Code" hexmask.long.byte 0x00 8.--15. 1. " DC1AR ,Display Capture 1 Alpha Ratio" bitfld.long 0x00 0. " DC1DF ,Display Capture 1 Data Format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC1MWR,Display Capture 1 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC1MWX ,Display Capture 1 Memory Width X" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long (0xC100+0x20)++0x03 line.long 0x00 "DC1SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC1SA ,Display Capture 1 Area Start Address" else group.long (0xC100+0x20)++0x03 line.long 0x00 "DC1SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC1SA ,Display Capture 1 Area Start Address" endif group.long (0xC100+0x50)++0x03 line.long 0x00 "DC1MLR,Display Capture 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC1MLY ,Display Capture 1 Memory Length Y" tree.end tree "Display Capture 2 Registers" group.long 0xC200++0x7 line.long 0x00 "DC2MR,Display Capture 2 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC2MR Enabling Code" hexmask.long.byte 0x00 8.--15. 1. " DC2AR ,Display Capture 2 Alpha Ratio" bitfld.long 0x00 0. " DC2DF ,Display Capture 2 Data Format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC2MWR,Display Capture 2 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC2MWX ,Display Capture 2 Memory Width X" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long (0xC200+0x20)++0x03 line.long 0x00 "DC2SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC2SA ,Display Capture 2 Area Start Address" else group.long (0xC200+0x20)++0x03 line.long 0x00 "DC2SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC2SA ,Display Capture 2 Area Start Address" endif group.long (0xC200+0x50)++0x03 line.long 0x00 "DC2MLR,Display Capture 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC2MLY ,Display Capture 2 Memory Length Y" tree.end tree.end tree "Color Palette 1 Registers" width 10. group.long 0x1000++0x3ff line.long 0x0 "CP1_0R,Color Palette 1 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP1_0A ,Color Palette 1_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP1_0R ,Color Palette 1_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP1_0G ,Color Palette 1_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP1_0B ,Color Palette 1_0 Blue" line.long 0x4 "CP1_1R,Color Palette 1 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP1_1A ,Color Palette 1_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP1_1R ,Color Palette 1_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP1_1G ,Color Palette 1_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP1_1B ,Color Palette 1_1 Blue" line.long 0x8 "CP1_2R,Color Palette 1 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP1_2A ,Color Palette 1_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP1_2R ,Color Palette 1_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP1_2G ,Color Palette 1_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP1_2B ,Color Palette 1_2 Blue" line.long 0xC "CP1_3R,Color Palette 1 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP1_3A ,Color Palette 1_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP1_3R ,Color Palette 1_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP1_3G ,Color Palette 1_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP1_3B ,Color Palette 1_3 Blue" line.long 0x10 "CP1_4R,Color Palette 1 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP1_4A ,Color Palette 1_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP1_4R ,Color Palette 1_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP1_4G ,Color Palette 1_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP1_4B ,Color Palette 1_4 Blue" line.long 0x14 "CP1_5R,Color Palette 1 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP1_5A ,Color Palette 1_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP1_5R ,Color Palette 1_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP1_5G ,Color Palette 1_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP1_5B ,Color Palette 1_5 Blue" line.long 0x18 "CP1_6R,Color Palette 1 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP1_6A ,Color Palette 1_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP1_6R ,Color Palette 1_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP1_6G ,Color Palette 1_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP1_6B ,Color Palette 1_6 Blue" line.long 0x1C "CP1_7R,Color Palette 1 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP1_7A ,Color Palette 1_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP1_7R ,Color Palette 1_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP1_7G ,Color Palette 1_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP1_7B ,Color Palette 1_7 Blue" line.long 0x20 "CP1_8R,Color Palette 1 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP1_8A ,Color Palette 1_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP1_8R ,Color Palette 1_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP1_8G ,Color Palette 1_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP1_8B ,Color Palette 1_8 Blue" line.long 0x24 "CP1_9R,Color Palette 1 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP1_9A ,Color Palette 1_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP1_9R ,Color Palette 1_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP1_9G ,Color Palette 1_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP1_9B ,Color Palette 1_9 Blue" line.long 0x28 "CP1_10R,Color Palette 1 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP1_10A ,Color Palette 1_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP1_10R ,Color Palette 1_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP1_10G ,Color Palette 1_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP1_10B ,Color Palette 1_10 Blue" line.long 0x2C "CP1_11R,Color Palette 1 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP1_11A ,Color Palette 1_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP1_11R ,Color Palette 1_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP1_11G ,Color Palette 1_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP1_11B ,Color Palette 1_11 Blue" line.long 0x30 "CP1_12R,Color Palette 1 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP1_12A ,Color Palette 1_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP1_12R ,Color Palette 1_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP1_12G ,Color Palette 1_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP1_12B ,Color Palette 1_12 Blue" line.long 0x34 "CP1_13R,Color Palette 1 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP1_13A ,Color Palette 1_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP1_13R ,Color Palette 1_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP1_13G ,Color Palette 1_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP1_13B ,Color Palette 1_13 Blue" line.long 0x38 "CP1_14R,Color Palette 1 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP1_14A ,Color Palette 1_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP1_14R ,Color Palette 1_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP1_14G ,Color Palette 1_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP1_14B ,Color Palette 1_14 Blue" line.long 0x3C "CP1_15R,Color Palette 1 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP1_15A ,Color Palette 1_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP1_15R ,Color Palette 1_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP1_15G ,Color Palette 1_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP1_15B ,Color Palette 1_15 Blue" line.long 0x40 "CP1_16R,Color Palette 1 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP1_16A ,Color Palette 1_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP1_16R ,Color Palette 1_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP1_16G ,Color Palette 1_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP1_16B ,Color Palette 1_16 Blue" line.long 0x44 "CP1_17R,Color Palette 1 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP1_17A ,Color Palette 1_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP1_17R ,Color Palette 1_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP1_17G ,Color Palette 1_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP1_17B ,Color Palette 1_17 Blue" line.long 0x48 "CP1_18R,Color Palette 1 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP1_18A ,Color Palette 1_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP1_18R ,Color Palette 1_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP1_18G ,Color Palette 1_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP1_18B ,Color Palette 1_18 Blue" line.long 0x4C "CP1_19R,Color Palette 1 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP1_19A ,Color Palette 1_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP1_19R ,Color Palette 1_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP1_19G ,Color Palette 1_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP1_19B ,Color Palette 1_19 Blue" line.long 0x50 "CP1_20R,Color Palette 1 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP1_20A ,Color Palette 1_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP1_20R ,Color Palette 1_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP1_20G ,Color Palette 1_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP1_20B ,Color Palette 1_20 Blue" line.long 0x54 "CP1_21R,Color Palette 1 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP1_21A ,Color Palette 1_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP1_21R ,Color Palette 1_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP1_21G ,Color Palette 1_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP1_21B ,Color Palette 1_21 Blue" line.long 0x58 "CP1_22R,Color Palette 1 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP1_22A ,Color Palette 1_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP1_22R ,Color Palette 1_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP1_22G ,Color Palette 1_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP1_22B ,Color Palette 1_22 Blue" line.long 0x5C "CP1_23R,Color Palette 1 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP1_23A ,Color Palette 1_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP1_23R ,Color Palette 1_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP1_23G ,Color Palette 1_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP1_23B ,Color Palette 1_23 Blue" line.long 0x60 "CP1_24R,Color Palette 1 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP1_24A ,Color Palette 1_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP1_24R ,Color Palette 1_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP1_24G ,Color Palette 1_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP1_24B ,Color Palette 1_24 Blue" line.long 0x64 "CP1_25R,Color Palette 1 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP1_25A ,Color Palette 1_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP1_25R ,Color Palette 1_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP1_25G ,Color Palette 1_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP1_25B ,Color Palette 1_25 Blue" line.long 0x68 "CP1_26R,Color Palette 1 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP1_26A ,Color Palette 1_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP1_26R ,Color Palette 1_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP1_26G ,Color Palette 1_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP1_26B ,Color Palette 1_26 Blue" line.long 0x6C "CP1_27R,Color Palette 1 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP1_27A ,Color Palette 1_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP1_27R ,Color Palette 1_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP1_27G ,Color Palette 1_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP1_27B ,Color Palette 1_27 Blue" line.long 0x70 "CP1_28R,Color Palette 1 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP1_28A ,Color Palette 1_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP1_28R ,Color Palette 1_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP1_28G ,Color Palette 1_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP1_28B ,Color Palette 1_28 Blue" line.long 0x74 "CP1_29R,Color Palette 1 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP1_29A ,Color Palette 1_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP1_29R ,Color Palette 1_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP1_29G ,Color Palette 1_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP1_29B ,Color Palette 1_29 Blue" line.long 0x78 "CP1_30R,Color Palette 1 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP1_30A ,Color Palette 1_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP1_30R ,Color Palette 1_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP1_30G ,Color Palette 1_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP1_30B ,Color Palette 1_30 Blue" line.long 0x7C "CP1_31R,Color Palette 1 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP1_31A ,Color Palette 1_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP1_31R ,Color Palette 1_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP1_31G ,Color Palette 1_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP1_31B ,Color Palette 1_31 Blue" line.long 0x80 "CP1_32R,Color Palette 1 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP1_32A ,Color Palette 1_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP1_32R ,Color Palette 1_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP1_32G ,Color Palette 1_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP1_32B ,Color Palette 1_32 Blue" line.long 0x84 "CP1_33R,Color Palette 1 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP1_33A ,Color Palette 1_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP1_33R ,Color Palette 1_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP1_33G ,Color Palette 1_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP1_33B ,Color Palette 1_33 Blue" line.long 0x88 "CP1_34R,Color Palette 1 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP1_34A ,Color Palette 1_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP1_34R ,Color Palette 1_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP1_34G ,Color Palette 1_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP1_34B ,Color Palette 1_34 Blue" line.long 0x8C "CP1_35R,Color Palette 1 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP1_35A ,Color Palette 1_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP1_35R ,Color Palette 1_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP1_35G ,Color Palette 1_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP1_35B ,Color Palette 1_35 Blue" line.long 0x90 "CP1_36R,Color Palette 1 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP1_36A ,Color Palette 1_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP1_36R ,Color Palette 1_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP1_36G ,Color Palette 1_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP1_36B ,Color Palette 1_36 Blue" line.long 0x94 "CP1_37R,Color Palette 1 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP1_37A ,Color Palette 1_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP1_37R ,Color Palette 1_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP1_37G ,Color Palette 1_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP1_37B ,Color Palette 1_37 Blue" line.long 0x98 "CP1_38R,Color Palette 1 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP1_38A ,Color Palette 1_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP1_38R ,Color Palette 1_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP1_38G ,Color Palette 1_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP1_38B ,Color Palette 1_38 Blue" line.long 0x9C "CP1_39R,Color Palette 1 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP1_39A ,Color Palette 1_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP1_39R ,Color Palette 1_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP1_39G ,Color Palette 1_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP1_39B ,Color Palette 1_39 Blue" line.long 0xA0 "CP1_40R,Color Palette 1 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP1_40A ,Color Palette 1_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP1_40R ,Color Palette 1_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP1_40G ,Color Palette 1_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP1_40B ,Color Palette 1_40 Blue" line.long 0xA4 "CP1_41R,Color Palette 1 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP1_41A ,Color Palette 1_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP1_41R ,Color Palette 1_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP1_41G ,Color Palette 1_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP1_41B ,Color Palette 1_41 Blue" line.long 0xA8 "CP1_42R,Color Palette 1 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP1_42A ,Color Palette 1_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP1_42R ,Color Palette 1_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP1_42G ,Color Palette 1_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP1_42B ,Color Palette 1_42 Blue" line.long 0xAC "CP1_43R,Color Palette 1 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP1_43A ,Color Palette 1_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP1_43R ,Color Palette 1_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP1_43G ,Color Palette 1_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP1_43B ,Color Palette 1_43 Blue" line.long 0xB0 "CP1_44R,Color Palette 1 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP1_44A ,Color Palette 1_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP1_44R ,Color Palette 1_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP1_44G ,Color Palette 1_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP1_44B ,Color Palette 1_44 Blue" line.long 0xB4 "CP1_45R,Color Palette 1 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP1_45A ,Color Palette 1_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP1_45R ,Color Palette 1_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP1_45G ,Color Palette 1_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP1_45B ,Color Palette 1_45 Blue" line.long 0xB8 "CP1_46R,Color Palette 1 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP1_46A ,Color Palette 1_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP1_46R ,Color Palette 1_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP1_46G ,Color Palette 1_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP1_46B ,Color Palette 1_46 Blue" line.long 0xBC "CP1_47R,Color Palette 1 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP1_47A ,Color Palette 1_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP1_47R ,Color Palette 1_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP1_47G ,Color Palette 1_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP1_47B ,Color Palette 1_47 Blue" line.long 0xC0 "CP1_48R,Color Palette 1 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP1_48A ,Color Palette 1_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP1_48R ,Color Palette 1_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP1_48G ,Color Palette 1_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP1_48B ,Color Palette 1_48 Blue" line.long 0xC4 "CP1_49R,Color Palette 1 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP1_49A ,Color Palette 1_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP1_49R ,Color Palette 1_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP1_49G ,Color Palette 1_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP1_49B ,Color Palette 1_49 Blue" line.long 0xC8 "CP1_50R,Color Palette 1 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP1_50A ,Color Palette 1_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP1_50R ,Color Palette 1_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP1_50G ,Color Palette 1_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP1_50B ,Color Palette 1_50 Blue" line.long 0xCC "CP1_51R,Color Palette 1 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP1_51A ,Color Palette 1_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP1_51R ,Color Palette 1_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP1_51G ,Color Palette 1_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP1_51B ,Color Palette 1_51 Blue" line.long 0xD0 "CP1_52R,Color Palette 1 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP1_52A ,Color Palette 1_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP1_52R ,Color Palette 1_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP1_52G ,Color Palette 1_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP1_52B ,Color Palette 1_52 Blue" line.long 0xD4 "CP1_53R,Color Palette 1 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP1_53A ,Color Palette 1_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP1_53R ,Color Palette 1_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP1_53G ,Color Palette 1_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP1_53B ,Color Palette 1_53 Blue" line.long 0xD8 "CP1_54R,Color Palette 1 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP1_54A ,Color Palette 1_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP1_54R ,Color Palette 1_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP1_54G ,Color Palette 1_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP1_54B ,Color Palette 1_54 Blue" line.long 0xDC "CP1_55R,Color Palette 1 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP1_55A ,Color Palette 1_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP1_55R ,Color Palette 1_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP1_55G ,Color Palette 1_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP1_55B ,Color Palette 1_55 Blue" line.long 0xE0 "CP1_56R,Color Palette 1 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP1_56A ,Color Palette 1_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP1_56R ,Color Palette 1_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP1_56G ,Color Palette 1_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP1_56B ,Color Palette 1_56 Blue" line.long 0xE4 "CP1_57R,Color Palette 1 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP1_57A ,Color Palette 1_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP1_57R ,Color Palette 1_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP1_57G ,Color Palette 1_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP1_57B ,Color Palette 1_57 Blue" line.long 0xE8 "CP1_58R,Color Palette 1 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP1_58A ,Color Palette 1_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP1_58R ,Color Palette 1_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP1_58G ,Color Palette 1_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP1_58B ,Color Palette 1_58 Blue" line.long 0xEC "CP1_59R,Color Palette 1 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP1_59A ,Color Palette 1_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP1_59R ,Color Palette 1_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP1_59G ,Color Palette 1_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP1_59B ,Color Palette 1_59 Blue" line.long 0xF0 "CP1_60R,Color Palette 1 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP1_60A ,Color Palette 1_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP1_60R ,Color Palette 1_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP1_60G ,Color Palette 1_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP1_60B ,Color Palette 1_60 Blue" line.long 0xF4 "CP1_61R,Color Palette 1 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP1_61A ,Color Palette 1_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP1_61R ,Color Palette 1_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP1_61G ,Color Palette 1_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP1_61B ,Color Palette 1_61 Blue" line.long 0xF8 "CP1_62R,Color Palette 1 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP1_62A ,Color Palette 1_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP1_62R ,Color Palette 1_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP1_62G ,Color Palette 1_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP1_62B ,Color Palette 1_62 Blue" line.long 0xFC "CP1_63R,Color Palette 1 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP1_63A ,Color Palette 1_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP1_63R ,Color Palette 1_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP1_63G ,Color Palette 1_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP1_63B ,Color Palette 1_63 Blue" line.long 0x100 "CP1_64R,Color Palette 1 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP1_64A ,Color Palette 1_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP1_64R ,Color Palette 1_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP1_64G ,Color Palette 1_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP1_64B ,Color Palette 1_64 Blue" line.long 0x104 "CP1_65R,Color Palette 1 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP1_65A ,Color Palette 1_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP1_65R ,Color Palette 1_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP1_65G ,Color Palette 1_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP1_65B ,Color Palette 1_65 Blue" line.long 0x108 "CP1_66R,Color Palette 1 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP1_66A ,Color Palette 1_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP1_66R ,Color Palette 1_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP1_66G ,Color Palette 1_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP1_66B ,Color Palette 1_66 Blue" line.long 0x10C "CP1_67R,Color Palette 1 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP1_67A ,Color Palette 1_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP1_67R ,Color Palette 1_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP1_67G ,Color Palette 1_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP1_67B ,Color Palette 1_67 Blue" line.long 0x110 "CP1_68R,Color Palette 1 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP1_68A ,Color Palette 1_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP1_68R ,Color Palette 1_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP1_68G ,Color Palette 1_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP1_68B ,Color Palette 1_68 Blue" line.long 0x114 "CP1_69R,Color Palette 1 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP1_69A ,Color Palette 1_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP1_69R ,Color Palette 1_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP1_69G ,Color Palette 1_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP1_69B ,Color Palette 1_69 Blue" line.long 0x118 "CP1_70R,Color Palette 1 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP1_70A ,Color Palette 1_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP1_70R ,Color Palette 1_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP1_70G ,Color Palette 1_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP1_70B ,Color Palette 1_70 Blue" line.long 0x11C "CP1_71R,Color Palette 1 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP1_71A ,Color Palette 1_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP1_71R ,Color Palette 1_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP1_71G ,Color Palette 1_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP1_71B ,Color Palette 1_71 Blue" line.long 0x120 "CP1_72R,Color Palette 1 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP1_72A ,Color Palette 1_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP1_72R ,Color Palette 1_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP1_72G ,Color Palette 1_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP1_72B ,Color Palette 1_72 Blue" line.long 0x124 "CP1_73R,Color Palette 1 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP1_73A ,Color Palette 1_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP1_73R ,Color Palette 1_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP1_73G ,Color Palette 1_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP1_73B ,Color Palette 1_73 Blue" line.long 0x128 "CP1_74R,Color Palette 1 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP1_74A ,Color Palette 1_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP1_74R ,Color Palette 1_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP1_74G ,Color Palette 1_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP1_74B ,Color Palette 1_74 Blue" line.long 0x12C "CP1_75R,Color Palette 1 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP1_75A ,Color Palette 1_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP1_75R ,Color Palette 1_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP1_75G ,Color Palette 1_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP1_75B ,Color Palette 1_75 Blue" line.long 0x130 "CP1_76R,Color Palette 1 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP1_76A ,Color Palette 1_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP1_76R ,Color Palette 1_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP1_76G ,Color Palette 1_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP1_76B ,Color Palette 1_76 Blue" line.long 0x134 "CP1_77R,Color Palette 1 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP1_77A ,Color Palette 1_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP1_77R ,Color Palette 1_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP1_77G ,Color Palette 1_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP1_77B ,Color Palette 1_77 Blue" line.long 0x138 "CP1_78R,Color Palette 1 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP1_78A ,Color Palette 1_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP1_78R ,Color Palette 1_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP1_78G ,Color Palette 1_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP1_78B ,Color Palette 1_78 Blue" line.long 0x13C "CP1_79R,Color Palette 1 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP1_79A ,Color Palette 1_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP1_79R ,Color Palette 1_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP1_79G ,Color Palette 1_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP1_79B ,Color Palette 1_79 Blue" line.long 0x140 "CP1_80R,Color Palette 1 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP1_80A ,Color Palette 1_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP1_80R ,Color Palette 1_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP1_80G ,Color Palette 1_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP1_80B ,Color Palette 1_80 Blue" line.long 0x144 "CP1_81R,Color Palette 1 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP1_81A ,Color Palette 1_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP1_81R ,Color Palette 1_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP1_81G ,Color Palette 1_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP1_81B ,Color Palette 1_81 Blue" line.long 0x148 "CP1_82R,Color Palette 1 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP1_82A ,Color Palette 1_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP1_82R ,Color Palette 1_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP1_82G ,Color Palette 1_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP1_82B ,Color Palette 1_82 Blue" line.long 0x14C "CP1_83R,Color Palette 1 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP1_83A ,Color Palette 1_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP1_83R ,Color Palette 1_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP1_83G ,Color Palette 1_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP1_83B ,Color Palette 1_83 Blue" line.long 0x150 "CP1_84R,Color Palette 1 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP1_84A ,Color Palette 1_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP1_84R ,Color Palette 1_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP1_84G ,Color Palette 1_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP1_84B ,Color Palette 1_84 Blue" line.long 0x154 "CP1_85R,Color Palette 1 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP1_85A ,Color Palette 1_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP1_85R ,Color Palette 1_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP1_85G ,Color Palette 1_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP1_85B ,Color Palette 1_85 Blue" line.long 0x158 "CP1_86R,Color Palette 1 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP1_86A ,Color Palette 1_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP1_86R ,Color Palette 1_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP1_86G ,Color Palette 1_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP1_86B ,Color Palette 1_86 Blue" line.long 0x15C "CP1_87R,Color Palette 1 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP1_87A ,Color Palette 1_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP1_87R ,Color Palette 1_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP1_87G ,Color Palette 1_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP1_87B ,Color Palette 1_87 Blue" line.long 0x160 "CP1_88R,Color Palette 1 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP1_88A ,Color Palette 1_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP1_88R ,Color Palette 1_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP1_88G ,Color Palette 1_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP1_88B ,Color Palette 1_88 Blue" line.long 0x164 "CP1_89R,Color Palette 1 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP1_89A ,Color Palette 1_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP1_89R ,Color Palette 1_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP1_89G ,Color Palette 1_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP1_89B ,Color Palette 1_89 Blue" line.long 0x168 "CP1_90R,Color Palette 1 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP1_90A ,Color Palette 1_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP1_90R ,Color Palette 1_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP1_90G ,Color Palette 1_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP1_90B ,Color Palette 1_90 Blue" line.long 0x16C "CP1_91R,Color Palette 1 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP1_91A ,Color Palette 1_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP1_91R ,Color Palette 1_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP1_91G ,Color Palette 1_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP1_91B ,Color Palette 1_91 Blue" line.long 0x170 "CP1_92R,Color Palette 1 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP1_92A ,Color Palette 1_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP1_92R ,Color Palette 1_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP1_92G ,Color Palette 1_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP1_92B ,Color Palette 1_92 Blue" line.long 0x174 "CP1_93R,Color Palette 1 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP1_93A ,Color Palette 1_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP1_93R ,Color Palette 1_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP1_93G ,Color Palette 1_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP1_93B ,Color Palette 1_93 Blue" line.long 0x178 "CP1_94R,Color Palette 1 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP1_94A ,Color Palette 1_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP1_94R ,Color Palette 1_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP1_94G ,Color Palette 1_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP1_94B ,Color Palette 1_94 Blue" line.long 0x17C "CP1_95R,Color Palette 1 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP1_95A ,Color Palette 1_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP1_95R ,Color Palette 1_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP1_95G ,Color Palette 1_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP1_95B ,Color Palette 1_95 Blue" line.long 0x180 "CP1_96R,Color Palette 1 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP1_96A ,Color Palette 1_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP1_96R ,Color Palette 1_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP1_96G ,Color Palette 1_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP1_96B ,Color Palette 1_96 Blue" line.long 0x184 "CP1_97R,Color Palette 1 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP1_97A ,Color Palette 1_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP1_97R ,Color Palette 1_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP1_97G ,Color Palette 1_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP1_97B ,Color Palette 1_97 Blue" line.long 0x188 "CP1_98R,Color Palette 1 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP1_98A ,Color Palette 1_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP1_98R ,Color Palette 1_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP1_98G ,Color Palette 1_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP1_98B ,Color Palette 1_98 Blue" line.long 0x18C "CP1_99R,Color Palette 1 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP1_99A ,Color Palette 1_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP1_99R ,Color Palette 1_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP1_99G ,Color Palette 1_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP1_99B ,Color Palette 1_99 Blue" line.long 0x190 "CP1_100R,Color Palette 1 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP1_100A ,Color Palette 1_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP1_100R ,Color Palette 1_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP1_100G ,Color Palette 1_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP1_100B ,Color Palette 1_100 Blue" line.long 0x194 "CP1_101R,Color Palette 1 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP1_101A ,Color Palette 1_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP1_101R ,Color Palette 1_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP1_101G ,Color Palette 1_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP1_101B ,Color Palette 1_101 Blue" line.long 0x198 "CP1_102R,Color Palette 1 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP1_102A ,Color Palette 1_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP1_102R ,Color Palette 1_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP1_102G ,Color Palette 1_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP1_102B ,Color Palette 1_102 Blue" line.long 0x19C "CP1_103R,Color Palette 1 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP1_103A ,Color Palette 1_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP1_103R ,Color Palette 1_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP1_103G ,Color Palette 1_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP1_103B ,Color Palette 1_103 Blue" line.long 0x1A0 "CP1_104R,Color Palette 1 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP1_104A ,Color Palette 1_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP1_104R ,Color Palette 1_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP1_104G ,Color Palette 1_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP1_104B ,Color Palette 1_104 Blue" line.long 0x1A4 "CP1_105R,Color Palette 1 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP1_105A ,Color Palette 1_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP1_105R ,Color Palette 1_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP1_105G ,Color Palette 1_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP1_105B ,Color Palette 1_105 Blue" line.long 0x1A8 "CP1_106R,Color Palette 1 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP1_106A ,Color Palette 1_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP1_106R ,Color Palette 1_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP1_106G ,Color Palette 1_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP1_106B ,Color Palette 1_106 Blue" line.long 0x1AC "CP1_107R,Color Palette 1 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP1_107A ,Color Palette 1_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP1_107R ,Color Palette 1_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP1_107G ,Color Palette 1_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP1_107B ,Color Palette 1_107 Blue" line.long 0x1B0 "CP1_108R,Color Palette 1 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP1_108A ,Color Palette 1_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP1_108R ,Color Palette 1_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP1_108G ,Color Palette 1_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP1_108B ,Color Palette 1_108 Blue" line.long 0x1B4 "CP1_109R,Color Palette 1 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP1_109A ,Color Palette 1_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP1_109R ,Color Palette 1_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP1_109G ,Color Palette 1_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP1_109B ,Color Palette 1_109 Blue" line.long 0x1B8 "CP1_110R,Color Palette 1 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP1_110A ,Color Palette 1_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP1_110R ,Color Palette 1_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP1_110G ,Color Palette 1_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP1_110B ,Color Palette 1_110 Blue" line.long 0x1BC "CP1_111R,Color Palette 1 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP1_111A ,Color Palette 1_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP1_111R ,Color Palette 1_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP1_111G ,Color Palette 1_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP1_111B ,Color Palette 1_111 Blue" line.long 0x1C0 "CP1_112R,Color Palette 1 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP1_112A ,Color Palette 1_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP1_112R ,Color Palette 1_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP1_112G ,Color Palette 1_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP1_112B ,Color Palette 1_112 Blue" line.long 0x1C4 "CP1_113R,Color Palette 1 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP1_113A ,Color Palette 1_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP1_113R ,Color Palette 1_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP1_113G ,Color Palette 1_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP1_113B ,Color Palette 1_113 Blue" line.long 0x1C8 "CP1_114R,Color Palette 1 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP1_114A ,Color Palette 1_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP1_114R ,Color Palette 1_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP1_114G ,Color Palette 1_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP1_114B ,Color Palette 1_114 Blue" line.long 0x1CC "CP1_115R,Color Palette 1 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP1_115A ,Color Palette 1_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP1_115R ,Color Palette 1_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP1_115G ,Color Palette 1_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP1_115B ,Color Palette 1_115 Blue" line.long 0x1D0 "CP1_116R,Color Palette 1 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP1_116A ,Color Palette 1_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP1_116R ,Color Palette 1_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP1_116G ,Color Palette 1_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP1_116B ,Color Palette 1_116 Blue" line.long 0x1D4 "CP1_117R,Color Palette 1 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP1_117A ,Color Palette 1_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP1_117R ,Color Palette 1_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP1_117G ,Color Palette 1_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP1_117B ,Color Palette 1_117 Blue" line.long 0x1D8 "CP1_118R,Color Palette 1 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP1_118A ,Color Palette 1_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP1_118R ,Color Palette 1_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP1_118G ,Color Palette 1_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP1_118B ,Color Palette 1_118 Blue" line.long 0x1DC "CP1_119R,Color Palette 1 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP1_119A ,Color Palette 1_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP1_119R ,Color Palette 1_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP1_119G ,Color Palette 1_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP1_119B ,Color Palette 1_119 Blue" line.long 0x1E0 "CP1_120R,Color Palette 1 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP1_120A ,Color Palette 1_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP1_120R ,Color Palette 1_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP1_120G ,Color Palette 1_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP1_120B ,Color Palette 1_120 Blue" line.long 0x1E4 "CP1_121R,Color Palette 1 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP1_121A ,Color Palette 1_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP1_121R ,Color Palette 1_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP1_121G ,Color Palette 1_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP1_121B ,Color Palette 1_121 Blue" line.long 0x1E8 "CP1_122R,Color Palette 1 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP1_122A ,Color Palette 1_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP1_122R ,Color Palette 1_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP1_122G ,Color Palette 1_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP1_122B ,Color Palette 1_122 Blue" line.long 0x1EC "CP1_123R,Color Palette 1 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP1_123A ,Color Palette 1_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP1_123R ,Color Palette 1_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP1_123G ,Color Palette 1_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP1_123B ,Color Palette 1_123 Blue" line.long 0x1F0 "CP1_124R,Color Palette 1 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP1_124A ,Color Palette 1_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP1_124R ,Color Palette 1_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP1_124G ,Color Palette 1_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP1_124B ,Color Palette 1_124 Blue" line.long 0x1F4 "CP1_125R,Color Palette 1 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP1_125A ,Color Palette 1_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP1_125R ,Color Palette 1_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP1_125G ,Color Palette 1_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP1_125B ,Color Palette 1_125 Blue" line.long 0x1F8 "CP1_126R,Color Palette 1 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP1_126A ,Color Palette 1_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP1_126R ,Color Palette 1_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP1_126G ,Color Palette 1_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP1_126B ,Color Palette 1_126 Blue" line.long 0x1FC "CP1_127R,Color Palette 1 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP1_127A ,Color Palette 1_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP1_127R ,Color Palette 1_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP1_127G ,Color Palette 1_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP1_127B ,Color Palette 1_127 Blue" line.long 0x200 "CP1_128R,Color Palette 1 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP1_128A ,Color Palette 1_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP1_128R ,Color Palette 1_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP1_128G ,Color Palette 1_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP1_128B ,Color Palette 1_128 Blue" line.long 0x204 "CP1_129R,Color Palette 1 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP1_129A ,Color Palette 1_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP1_129R ,Color Palette 1_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP1_129G ,Color Palette 1_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP1_129B ,Color Palette 1_129 Blue" line.long 0x208 "CP1_130R,Color Palette 1 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP1_130A ,Color Palette 1_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP1_130R ,Color Palette 1_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP1_130G ,Color Palette 1_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP1_130B ,Color Palette 1_130 Blue" line.long 0x20C "CP1_131R,Color Palette 1 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP1_131A ,Color Palette 1_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP1_131R ,Color Palette 1_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP1_131G ,Color Palette 1_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP1_131B ,Color Palette 1_131 Blue" line.long 0x210 "CP1_132R,Color Palette 1 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP1_132A ,Color Palette 1_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP1_132R ,Color Palette 1_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP1_132G ,Color Palette 1_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP1_132B ,Color Palette 1_132 Blue" line.long 0x214 "CP1_133R,Color Palette 1 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP1_133A ,Color Palette 1_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP1_133R ,Color Palette 1_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP1_133G ,Color Palette 1_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP1_133B ,Color Palette 1_133 Blue" line.long 0x218 "CP1_134R,Color Palette 1 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP1_134A ,Color Palette 1_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP1_134R ,Color Palette 1_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP1_134G ,Color Palette 1_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP1_134B ,Color Palette 1_134 Blue" line.long 0x21C "CP1_135R,Color Palette 1 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP1_135A ,Color Palette 1_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP1_135R ,Color Palette 1_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP1_135G ,Color Palette 1_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP1_135B ,Color Palette 1_135 Blue" line.long 0x220 "CP1_136R,Color Palette 1 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP1_136A ,Color Palette 1_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP1_136R ,Color Palette 1_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP1_136G ,Color Palette 1_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP1_136B ,Color Palette 1_136 Blue" line.long 0x224 "CP1_137R,Color Palette 1 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP1_137A ,Color Palette 1_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP1_137R ,Color Palette 1_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP1_137G ,Color Palette 1_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP1_137B ,Color Palette 1_137 Blue" line.long 0x228 "CP1_138R,Color Palette 1 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP1_138A ,Color Palette 1_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP1_138R ,Color Palette 1_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP1_138G ,Color Palette 1_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP1_138B ,Color Palette 1_138 Blue" line.long 0x22C "CP1_139R,Color Palette 1 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP1_139A ,Color Palette 1_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP1_139R ,Color Palette 1_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP1_139G ,Color Palette 1_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP1_139B ,Color Palette 1_139 Blue" line.long 0x230 "CP1_140R,Color Palette 1 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP1_140A ,Color Palette 1_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP1_140R ,Color Palette 1_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP1_140G ,Color Palette 1_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP1_140B ,Color Palette 1_140 Blue" line.long 0x234 "CP1_141R,Color Palette 1 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP1_141A ,Color Palette 1_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP1_141R ,Color Palette 1_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP1_141G ,Color Palette 1_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP1_141B ,Color Palette 1_141 Blue" line.long 0x238 "CP1_142R,Color Palette 1 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP1_142A ,Color Palette 1_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP1_142R ,Color Palette 1_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP1_142G ,Color Palette 1_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP1_142B ,Color Palette 1_142 Blue" line.long 0x23C "CP1_143R,Color Palette 1 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP1_143A ,Color Palette 1_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP1_143R ,Color Palette 1_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP1_143G ,Color Palette 1_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP1_143B ,Color Palette 1_143 Blue" line.long 0x240 "CP1_144R,Color Palette 1 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP1_144A ,Color Palette 1_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP1_144R ,Color Palette 1_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP1_144G ,Color Palette 1_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP1_144B ,Color Palette 1_144 Blue" line.long 0x244 "CP1_145R,Color Palette 1 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP1_145A ,Color Palette 1_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP1_145R ,Color Palette 1_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP1_145G ,Color Palette 1_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP1_145B ,Color Palette 1_145 Blue" line.long 0x248 "CP1_146R,Color Palette 1 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP1_146A ,Color Palette 1_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP1_146R ,Color Palette 1_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP1_146G ,Color Palette 1_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP1_146B ,Color Palette 1_146 Blue" line.long 0x24C "CP1_147R,Color Palette 1 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP1_147A ,Color Palette 1_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP1_147R ,Color Palette 1_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP1_147G ,Color Palette 1_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP1_147B ,Color Palette 1_147 Blue" line.long 0x250 "CP1_148R,Color Palette 1 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP1_148A ,Color Palette 1_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP1_148R ,Color Palette 1_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP1_148G ,Color Palette 1_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP1_148B ,Color Palette 1_148 Blue" line.long 0x254 "CP1_149R,Color Palette 1 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP1_149A ,Color Palette 1_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP1_149R ,Color Palette 1_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP1_149G ,Color Palette 1_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP1_149B ,Color Palette 1_149 Blue" line.long 0x258 "CP1_150R,Color Palette 1 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP1_150A ,Color Palette 1_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP1_150R ,Color Palette 1_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP1_150G ,Color Palette 1_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP1_150B ,Color Palette 1_150 Blue" line.long 0x25C "CP1_151R,Color Palette 1 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP1_151A ,Color Palette 1_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP1_151R ,Color Palette 1_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP1_151G ,Color Palette 1_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP1_151B ,Color Palette 1_151 Blue" line.long 0x260 "CP1_152R,Color Palette 1 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP1_152A ,Color Palette 1_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP1_152R ,Color Palette 1_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP1_152G ,Color Palette 1_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP1_152B ,Color Palette 1_152 Blue" line.long 0x264 "CP1_153R,Color Palette 1 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP1_153A ,Color Palette 1_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP1_153R ,Color Palette 1_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP1_153G ,Color Palette 1_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP1_153B ,Color Palette 1_153 Blue" line.long 0x268 "CP1_154R,Color Palette 1 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP1_154A ,Color Palette 1_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP1_154R ,Color Palette 1_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP1_154G ,Color Palette 1_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP1_154B ,Color Palette 1_154 Blue" line.long 0x26C "CP1_155R,Color Palette 1 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP1_155A ,Color Palette 1_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP1_155R ,Color Palette 1_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP1_155G ,Color Palette 1_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP1_155B ,Color Palette 1_155 Blue" line.long 0x270 "CP1_156R,Color Palette 1 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP1_156A ,Color Palette 1_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP1_156R ,Color Palette 1_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP1_156G ,Color Palette 1_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP1_156B ,Color Palette 1_156 Blue" line.long 0x274 "CP1_157R,Color Palette 1 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP1_157A ,Color Palette 1_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP1_157R ,Color Palette 1_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP1_157G ,Color Palette 1_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP1_157B ,Color Palette 1_157 Blue" line.long 0x278 "CP1_158R,Color Palette 1 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP1_158A ,Color Palette 1_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP1_158R ,Color Palette 1_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP1_158G ,Color Palette 1_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP1_158B ,Color Palette 1_158 Blue" line.long 0x27C "CP1_159R,Color Palette 1 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP1_159A ,Color Palette 1_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP1_159R ,Color Palette 1_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP1_159G ,Color Palette 1_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP1_159B ,Color Palette 1_159 Blue" line.long 0x280 "CP1_160R,Color Palette 1 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP1_160A ,Color Palette 1_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP1_160R ,Color Palette 1_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP1_160G ,Color Palette 1_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP1_160B ,Color Palette 1_160 Blue" line.long 0x284 "CP1_161R,Color Palette 1 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP1_161A ,Color Palette 1_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP1_161R ,Color Palette 1_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP1_161G ,Color Palette 1_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP1_161B ,Color Palette 1_161 Blue" line.long 0x288 "CP1_162R,Color Palette 1 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP1_162A ,Color Palette 1_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP1_162R ,Color Palette 1_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP1_162G ,Color Palette 1_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP1_162B ,Color Palette 1_162 Blue" line.long 0x28C "CP1_163R,Color Palette 1 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP1_163A ,Color Palette 1_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP1_163R ,Color Palette 1_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP1_163G ,Color Palette 1_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP1_163B ,Color Palette 1_163 Blue" line.long 0x290 "CP1_164R,Color Palette 1 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP1_164A ,Color Palette 1_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP1_164R ,Color Palette 1_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP1_164G ,Color Palette 1_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP1_164B ,Color Palette 1_164 Blue" line.long 0x294 "CP1_165R,Color Palette 1 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP1_165A ,Color Palette 1_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP1_165R ,Color Palette 1_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP1_165G ,Color Palette 1_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP1_165B ,Color Palette 1_165 Blue" line.long 0x298 "CP1_166R,Color Palette 1 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP1_166A ,Color Palette 1_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP1_166R ,Color Palette 1_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP1_166G ,Color Palette 1_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP1_166B ,Color Palette 1_166 Blue" line.long 0x29C "CP1_167R,Color Palette 1 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP1_167A ,Color Palette 1_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP1_167R ,Color Palette 1_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP1_167G ,Color Palette 1_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP1_167B ,Color Palette 1_167 Blue" line.long 0x2A0 "CP1_168R,Color Palette 1 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP1_168A ,Color Palette 1_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP1_168R ,Color Palette 1_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP1_168G ,Color Palette 1_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP1_168B ,Color Palette 1_168 Blue" line.long 0x2A4 "CP1_169R,Color Palette 1 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP1_169A ,Color Palette 1_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP1_169R ,Color Palette 1_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP1_169G ,Color Palette 1_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP1_169B ,Color Palette 1_169 Blue" line.long 0x2A8 "CP1_170R,Color Palette 1 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP1_170A ,Color Palette 1_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP1_170R ,Color Palette 1_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP1_170G ,Color Palette 1_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP1_170B ,Color Palette 1_170 Blue" line.long 0x2AC "CP1_171R,Color Palette 1 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP1_171A ,Color Palette 1_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP1_171R ,Color Palette 1_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP1_171G ,Color Palette 1_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP1_171B ,Color Palette 1_171 Blue" line.long 0x2B0 "CP1_172R,Color Palette 1 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP1_172A ,Color Palette 1_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP1_172R ,Color Palette 1_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP1_172G ,Color Palette 1_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP1_172B ,Color Palette 1_172 Blue" line.long 0x2B4 "CP1_173R,Color Palette 1 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP1_173A ,Color Palette 1_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP1_173R ,Color Palette 1_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP1_173G ,Color Palette 1_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP1_173B ,Color Palette 1_173 Blue" line.long 0x2B8 "CP1_174R,Color Palette 1 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP1_174A ,Color Palette 1_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP1_174R ,Color Palette 1_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP1_174G ,Color Palette 1_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP1_174B ,Color Palette 1_174 Blue" line.long 0x2BC "CP1_175R,Color Palette 1 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP1_175A ,Color Palette 1_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP1_175R ,Color Palette 1_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP1_175G ,Color Palette 1_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP1_175B ,Color Palette 1_175 Blue" line.long 0x2C0 "CP1_176R,Color Palette 1 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP1_176A ,Color Palette 1_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP1_176R ,Color Palette 1_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP1_176G ,Color Palette 1_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP1_176B ,Color Palette 1_176 Blue" line.long 0x2C4 "CP1_177R,Color Palette 1 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP1_177A ,Color Palette 1_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP1_177R ,Color Palette 1_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP1_177G ,Color Palette 1_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP1_177B ,Color Palette 1_177 Blue" line.long 0x2C8 "CP1_178R,Color Palette 1 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP1_178A ,Color Palette 1_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP1_178R ,Color Palette 1_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP1_178G ,Color Palette 1_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP1_178B ,Color Palette 1_178 Blue" line.long 0x2CC "CP1_179R,Color Palette 1 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP1_179A ,Color Palette 1_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP1_179R ,Color Palette 1_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP1_179G ,Color Palette 1_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP1_179B ,Color Palette 1_179 Blue" line.long 0x2D0 "CP1_180R,Color Palette 1 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP1_180A ,Color Palette 1_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP1_180R ,Color Palette 1_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP1_180G ,Color Palette 1_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP1_180B ,Color Palette 1_180 Blue" line.long 0x2D4 "CP1_181R,Color Palette 1 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP1_181A ,Color Palette 1_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP1_181R ,Color Palette 1_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP1_181G ,Color Palette 1_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP1_181B ,Color Palette 1_181 Blue" line.long 0x2D8 "CP1_182R,Color Palette 1 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP1_182A ,Color Palette 1_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP1_182R ,Color Palette 1_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP1_182G ,Color Palette 1_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP1_182B ,Color Palette 1_182 Blue" line.long 0x2DC "CP1_183R,Color Palette 1 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP1_183A ,Color Palette 1_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP1_183R ,Color Palette 1_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP1_183G ,Color Palette 1_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP1_183B ,Color Palette 1_183 Blue" line.long 0x2E0 "CP1_184R,Color Palette 1 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP1_184A ,Color Palette 1_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP1_184R ,Color Palette 1_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP1_184G ,Color Palette 1_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP1_184B ,Color Palette 1_184 Blue" line.long 0x2E4 "CP1_185R,Color Palette 1 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP1_185A ,Color Palette 1_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP1_185R ,Color Palette 1_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP1_185G ,Color Palette 1_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP1_185B ,Color Palette 1_185 Blue" line.long 0x2E8 "CP1_186R,Color Palette 1 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP1_186A ,Color Palette 1_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP1_186R ,Color Palette 1_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP1_186G ,Color Palette 1_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP1_186B ,Color Palette 1_186 Blue" line.long 0x2EC "CP1_187R,Color Palette 1 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP1_187A ,Color Palette 1_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP1_187R ,Color Palette 1_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP1_187G ,Color Palette 1_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP1_187B ,Color Palette 1_187 Blue" line.long 0x2F0 "CP1_188R,Color Palette 1 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP1_188A ,Color Palette 1_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP1_188R ,Color Palette 1_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP1_188G ,Color Palette 1_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP1_188B ,Color Palette 1_188 Blue" line.long 0x2F4 "CP1_189R,Color Palette 1 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP1_189A ,Color Palette 1_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP1_189R ,Color Palette 1_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP1_189G ,Color Palette 1_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP1_189B ,Color Palette 1_189 Blue" line.long 0x2F8 "CP1_190R,Color Palette 1 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP1_190A ,Color Palette 1_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP1_190R ,Color Palette 1_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP1_190G ,Color Palette 1_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP1_190B ,Color Palette 1_190 Blue" line.long 0x2FC "CP1_191R,Color Palette 1 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP1_191A ,Color Palette 1_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP1_191R ,Color Palette 1_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP1_191G ,Color Palette 1_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP1_191B ,Color Palette 1_191 Blue" line.long 0x300 "CP1_192R,Color Palette 1 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP1_192A ,Color Palette 1_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP1_192R ,Color Palette 1_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP1_192G ,Color Palette 1_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP1_192B ,Color Palette 1_192 Blue" line.long 0x304 "CP1_193R,Color Palette 1 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP1_193A ,Color Palette 1_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP1_193R ,Color Palette 1_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP1_193G ,Color Palette 1_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP1_193B ,Color Palette 1_193 Blue" line.long 0x308 "CP1_194R,Color Palette 1 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP1_194A ,Color Palette 1_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP1_194R ,Color Palette 1_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP1_194G ,Color Palette 1_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP1_194B ,Color Palette 1_194 Blue" line.long 0x30C "CP1_195R,Color Palette 1 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP1_195A ,Color Palette 1_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP1_195R ,Color Palette 1_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP1_195G ,Color Palette 1_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP1_195B ,Color Palette 1_195 Blue" line.long 0x310 "CP1_196R,Color Palette 1 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP1_196A ,Color Palette 1_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP1_196R ,Color Palette 1_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP1_196G ,Color Palette 1_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP1_196B ,Color Palette 1_196 Blue" line.long 0x314 "CP1_197R,Color Palette 1 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP1_197A ,Color Palette 1_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP1_197R ,Color Palette 1_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP1_197G ,Color Palette 1_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP1_197B ,Color Palette 1_197 Blue" line.long 0x318 "CP1_198R,Color Palette 1 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP1_198A ,Color Palette 1_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP1_198R ,Color Palette 1_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP1_198G ,Color Palette 1_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP1_198B ,Color Palette 1_198 Blue" line.long 0x31C "CP1_199R,Color Palette 1 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP1_199A ,Color Palette 1_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP1_199R ,Color Palette 1_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP1_199G ,Color Palette 1_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP1_199B ,Color Palette 1_199 Blue" line.long 0x320 "CP1_200R,Color Palette 1 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP1_200A ,Color Palette 1_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP1_200R ,Color Palette 1_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP1_200G ,Color Palette 1_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP1_200B ,Color Palette 1_200 Blue" line.long 0x324 "CP1_201R,Color Palette 1 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP1_201A ,Color Palette 1_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP1_201R ,Color Palette 1_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP1_201G ,Color Palette 1_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP1_201B ,Color Palette 1_201 Blue" line.long 0x328 "CP1_202R,Color Palette 1 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP1_202A ,Color Palette 1_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP1_202R ,Color Palette 1_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP1_202G ,Color Palette 1_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP1_202B ,Color Palette 1_202 Blue" line.long 0x32C "CP1_203R,Color Palette 1 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP1_203A ,Color Palette 1_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP1_203R ,Color Palette 1_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP1_203G ,Color Palette 1_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP1_203B ,Color Palette 1_203 Blue" line.long 0x330 "CP1_204R,Color Palette 1 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP1_204A ,Color Palette 1_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP1_204R ,Color Palette 1_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP1_204G ,Color Palette 1_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP1_204B ,Color Palette 1_204 Blue" line.long 0x334 "CP1_205R,Color Palette 1 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP1_205A ,Color Palette 1_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP1_205R ,Color Palette 1_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP1_205G ,Color Palette 1_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP1_205B ,Color Palette 1_205 Blue" line.long 0x338 "CP1_206R,Color Palette 1 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP1_206A ,Color Palette 1_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP1_206R ,Color Palette 1_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP1_206G ,Color Palette 1_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP1_206B ,Color Palette 1_206 Blue" line.long 0x33C "CP1_207R,Color Palette 1 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP1_207A ,Color Palette 1_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP1_207R ,Color Palette 1_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP1_207G ,Color Palette 1_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP1_207B ,Color Palette 1_207 Blue" line.long 0x340 "CP1_208R,Color Palette 1 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP1_208A ,Color Palette 1_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP1_208R ,Color Palette 1_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP1_208G ,Color Palette 1_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP1_208B ,Color Palette 1_208 Blue" line.long 0x344 "CP1_209R,Color Palette 1 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP1_209A ,Color Palette 1_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP1_209R ,Color Palette 1_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP1_209G ,Color Palette 1_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP1_209B ,Color Palette 1_209 Blue" line.long 0x348 "CP1_210R,Color Palette 1 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP1_210A ,Color Palette 1_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP1_210R ,Color Palette 1_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP1_210G ,Color Palette 1_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP1_210B ,Color Palette 1_210 Blue" line.long 0x34C "CP1_211R,Color Palette 1 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP1_211A ,Color Palette 1_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP1_211R ,Color Palette 1_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP1_211G ,Color Palette 1_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP1_211B ,Color Palette 1_211 Blue" line.long 0x350 "CP1_212R,Color Palette 1 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP1_212A ,Color Palette 1_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP1_212R ,Color Palette 1_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP1_212G ,Color Palette 1_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP1_212B ,Color Palette 1_212 Blue" line.long 0x354 "CP1_213R,Color Palette 1 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP1_213A ,Color Palette 1_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP1_213R ,Color Palette 1_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP1_213G ,Color Palette 1_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP1_213B ,Color Palette 1_213 Blue" line.long 0x358 "CP1_214R,Color Palette 1 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP1_214A ,Color Palette 1_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP1_214R ,Color Palette 1_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP1_214G ,Color Palette 1_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP1_214B ,Color Palette 1_214 Blue" line.long 0x35C "CP1_215R,Color Palette 1 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP1_215A ,Color Palette 1_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP1_215R ,Color Palette 1_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP1_215G ,Color Palette 1_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP1_215B ,Color Palette 1_215 Blue" line.long 0x360 "CP1_216R,Color Palette 1 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP1_216A ,Color Palette 1_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP1_216R ,Color Palette 1_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP1_216G ,Color Palette 1_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP1_216B ,Color Palette 1_216 Blue" line.long 0x364 "CP1_217R,Color Palette 1 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP1_217A ,Color Palette 1_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP1_217R ,Color Palette 1_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP1_217G ,Color Palette 1_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP1_217B ,Color Palette 1_217 Blue" line.long 0x368 "CP1_218R,Color Palette 1 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP1_218A ,Color Palette 1_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP1_218R ,Color Palette 1_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP1_218G ,Color Palette 1_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP1_218B ,Color Palette 1_218 Blue" line.long 0x36C "CP1_219R,Color Palette 1 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP1_219A ,Color Palette 1_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP1_219R ,Color Palette 1_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP1_219G ,Color Palette 1_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP1_219B ,Color Palette 1_219 Blue" line.long 0x370 "CP1_220R,Color Palette 1 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP1_220A ,Color Palette 1_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP1_220R ,Color Palette 1_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP1_220G ,Color Palette 1_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP1_220B ,Color Palette 1_220 Blue" line.long 0x374 "CP1_221R,Color Palette 1 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP1_221A ,Color Palette 1_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP1_221R ,Color Palette 1_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP1_221G ,Color Palette 1_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP1_221B ,Color Palette 1_221 Blue" line.long 0x378 "CP1_222R,Color Palette 1 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP1_222A ,Color Palette 1_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP1_222R ,Color Palette 1_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP1_222G ,Color Palette 1_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP1_222B ,Color Palette 1_222 Blue" line.long 0x37C "CP1_223R,Color Palette 1 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP1_223A ,Color Palette 1_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP1_223R ,Color Palette 1_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP1_223G ,Color Palette 1_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP1_223B ,Color Palette 1_223 Blue" line.long 0x380 "CP1_224R,Color Palette 1 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP1_224A ,Color Palette 1_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP1_224R ,Color Palette 1_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP1_224G ,Color Palette 1_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP1_224B ,Color Palette 1_224 Blue" line.long 0x384 "CP1_225R,Color Palette 1 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP1_225A ,Color Palette 1_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP1_225R ,Color Palette 1_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP1_225G ,Color Palette 1_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP1_225B ,Color Palette 1_225 Blue" line.long 0x388 "CP1_226R,Color Palette 1 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP1_226A ,Color Palette 1_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP1_226R ,Color Palette 1_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP1_226G ,Color Palette 1_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP1_226B ,Color Palette 1_226 Blue" line.long 0x38C "CP1_227R,Color Palette 1 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP1_227A ,Color Palette 1_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP1_227R ,Color Palette 1_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP1_227G ,Color Palette 1_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP1_227B ,Color Palette 1_227 Blue" line.long 0x390 "CP1_228R,Color Palette 1 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP1_228A ,Color Palette 1_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP1_228R ,Color Palette 1_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP1_228G ,Color Palette 1_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP1_228B ,Color Palette 1_228 Blue" line.long 0x394 "CP1_229R,Color Palette 1 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP1_229A ,Color Palette 1_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP1_229R ,Color Palette 1_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP1_229G ,Color Palette 1_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP1_229B ,Color Palette 1_229 Blue" line.long 0x398 "CP1_230R,Color Palette 1 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP1_230A ,Color Palette 1_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP1_230R ,Color Palette 1_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP1_230G ,Color Palette 1_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP1_230B ,Color Palette 1_230 Blue" line.long 0x39C "CP1_231R,Color Palette 1 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP1_231A ,Color Palette 1_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP1_231R ,Color Palette 1_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP1_231G ,Color Palette 1_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP1_231B ,Color Palette 1_231 Blue" line.long 0x3A0 "CP1_232R,Color Palette 1 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP1_232A ,Color Palette 1_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP1_232R ,Color Palette 1_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP1_232G ,Color Palette 1_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP1_232B ,Color Palette 1_232 Blue" line.long 0x3A4 "CP1_233R,Color Palette 1 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP1_233A ,Color Palette 1_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP1_233R ,Color Palette 1_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP1_233G ,Color Palette 1_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP1_233B ,Color Palette 1_233 Blue" line.long 0x3A8 "CP1_234R,Color Palette 1 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP1_234A ,Color Palette 1_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP1_234R ,Color Palette 1_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP1_234G ,Color Palette 1_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP1_234B ,Color Palette 1_234 Blue" line.long 0x3AC "CP1_235R,Color Palette 1 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP1_235A ,Color Palette 1_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP1_235R ,Color Palette 1_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP1_235G ,Color Palette 1_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP1_235B ,Color Palette 1_235 Blue" line.long 0x3B0 "CP1_236R,Color Palette 1 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP1_236A ,Color Palette 1_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP1_236R ,Color Palette 1_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP1_236G ,Color Palette 1_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP1_236B ,Color Palette 1_236 Blue" line.long 0x3B4 "CP1_237R,Color Palette 1 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP1_237A ,Color Palette 1_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP1_237R ,Color Palette 1_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP1_237G ,Color Palette 1_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP1_237B ,Color Palette 1_237 Blue" line.long 0x3B8 "CP1_238R,Color Palette 1 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP1_238A ,Color Palette 1_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP1_238R ,Color Palette 1_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP1_238G ,Color Palette 1_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP1_238B ,Color Palette 1_238 Blue" line.long 0x3BC "CP1_239R,Color Palette 1 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP1_239A ,Color Palette 1_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP1_239R ,Color Palette 1_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP1_239G ,Color Palette 1_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP1_239B ,Color Palette 1_239 Blue" line.long 0x3C0 "CP1_240R,Color Palette 1 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP1_240A ,Color Palette 1_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP1_240R ,Color Palette 1_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP1_240G ,Color Palette 1_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP1_240B ,Color Palette 1_240 Blue" line.long 0x3C4 "CP1_241R,Color Palette 1 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP1_241A ,Color Palette 1_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP1_241R ,Color Palette 1_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP1_241G ,Color Palette 1_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP1_241B ,Color Palette 1_241 Blue" line.long 0x3C8 "CP1_242R,Color Palette 1 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP1_242A ,Color Palette 1_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP1_242R ,Color Palette 1_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP1_242G ,Color Palette 1_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP1_242B ,Color Palette 1_242 Blue" line.long 0x3CC "CP1_243R,Color Palette 1 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP1_243A ,Color Palette 1_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP1_243R ,Color Palette 1_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP1_243G ,Color Palette 1_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP1_243B ,Color Palette 1_243 Blue" line.long 0x3D0 "CP1_244R,Color Palette 1 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP1_244A ,Color Palette 1_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP1_244R ,Color Palette 1_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP1_244G ,Color Palette 1_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP1_244B ,Color Palette 1_244 Blue" line.long 0x3D4 "CP1_245R,Color Palette 1 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP1_245A ,Color Palette 1_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP1_245R ,Color Palette 1_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP1_245G ,Color Palette 1_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP1_245B ,Color Palette 1_245 Blue" line.long 0x3D8 "CP1_246R,Color Palette 1 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP1_246A ,Color Palette 1_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP1_246R ,Color Palette 1_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP1_246G ,Color Palette 1_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP1_246B ,Color Palette 1_246 Blue" line.long 0x3DC "CP1_247R,Color Palette 1 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP1_247A ,Color Palette 1_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP1_247R ,Color Palette 1_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP1_247G ,Color Palette 1_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP1_247B ,Color Palette 1_247 Blue" line.long 0x3E0 "CP1_248R,Color Palette 1 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP1_248A ,Color Palette 1_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP1_248R ,Color Palette 1_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP1_248G ,Color Palette 1_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP1_248B ,Color Palette 1_248 Blue" line.long 0x3E4 "CP1_249R,Color Palette 1 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP1_249A ,Color Palette 1_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP1_249R ,Color Palette 1_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP1_249G ,Color Palette 1_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP1_249B ,Color Palette 1_249 Blue" line.long 0x3E8 "CP1_250R,Color Palette 1 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP1_250A ,Color Palette 1_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP1_250R ,Color Palette 1_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP1_250G ,Color Palette 1_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP1_250B ,Color Palette 1_250 Blue" line.long 0x3EC "CP1_251R,Color Palette 1 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP1_251A ,Color Palette 1_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP1_251R ,Color Palette 1_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP1_251G ,Color Palette 1_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP1_251B ,Color Palette 1_251 Blue" line.long 0x3F0 "CP1_252R,Color Palette 1 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP1_252A ,Color Palette 1_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP1_252R ,Color Palette 1_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP1_252G ,Color Palette 1_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP1_252B ,Color Palette 1_252 Blue" line.long 0x3F4 "CP1_253R,Color Palette 1 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP1_253A ,Color Palette 1_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP1_253R ,Color Palette 1_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP1_253G ,Color Palette 1_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP1_253B ,Color Palette 1_253 Blue" line.long 0x3F8 "CP1_254R,Color Palette 1 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP1_254A ,Color Palette 1_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP1_254R ,Color Palette 1_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP1_254G ,Color Palette 1_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP1_254B ,Color Palette 1_254 Blue" line.long 0x3FC "CP1_255R,Color Palette 1 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP1_255A ,Color Palette 1_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP1_255R ,Color Palette 1_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP1_255G ,Color Palette 1_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP1_255B ,Color Palette 1_255 Blue" tree.end tree "Color Palette 2 Registers" width 10. group.long 0x2000++0x3ff line.long 0x0 "CP2_0R,Color Palette 2 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP2_0A ,Color Palette 2_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP2_0R ,Color Palette 2_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP2_0G ,Color Palette 2_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP2_0B ,Color Palette 2_0 Blue" line.long 0x4 "CP2_1R,Color Palette 2 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP2_1A ,Color Palette 2_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP2_1R ,Color Palette 2_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP2_1G ,Color Palette 2_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP2_1B ,Color Palette 2_1 Blue" line.long 0x8 "CP2_2R,Color Palette 2 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP2_2A ,Color Palette 2_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP2_2R ,Color Palette 2_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP2_2G ,Color Palette 2_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP2_2B ,Color Palette 2_2 Blue" line.long 0xC "CP2_3R,Color Palette 2 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP2_3A ,Color Palette 2_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP2_3R ,Color Palette 2_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP2_3G ,Color Palette 2_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP2_3B ,Color Palette 2_3 Blue" line.long 0x10 "CP2_4R,Color Palette 2 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP2_4A ,Color Palette 2_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP2_4R ,Color Palette 2_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP2_4G ,Color Palette 2_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP2_4B ,Color Palette 2_4 Blue" line.long 0x14 "CP2_5R,Color Palette 2 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP2_5A ,Color Palette 2_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP2_5R ,Color Palette 2_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP2_5G ,Color Palette 2_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP2_5B ,Color Palette 2_5 Blue" line.long 0x18 "CP2_6R,Color Palette 2 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP2_6A ,Color Palette 2_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP2_6R ,Color Palette 2_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP2_6G ,Color Palette 2_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP2_6B ,Color Palette 2_6 Blue" line.long 0x1C "CP2_7R,Color Palette 2 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP2_7A ,Color Palette 2_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP2_7R ,Color Palette 2_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP2_7G ,Color Palette 2_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP2_7B ,Color Palette 2_7 Blue" line.long 0x20 "CP2_8R,Color Palette 2 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP2_8A ,Color Palette 2_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP2_8R ,Color Palette 2_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP2_8G ,Color Palette 2_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP2_8B ,Color Palette 2_8 Blue" line.long 0x24 "CP2_9R,Color Palette 2 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP2_9A ,Color Palette 2_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP2_9R ,Color Palette 2_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP2_9G ,Color Palette 2_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP2_9B ,Color Palette 2_9 Blue" line.long 0x28 "CP2_10R,Color Palette 2 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP2_10A ,Color Palette 2_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP2_10R ,Color Palette 2_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP2_10G ,Color Palette 2_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP2_10B ,Color Palette 2_10 Blue" line.long 0x2C "CP2_11R,Color Palette 2 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP2_11A ,Color Palette 2_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP2_11R ,Color Palette 2_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP2_11G ,Color Palette 2_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP2_11B ,Color Palette 2_11 Blue" line.long 0x30 "CP2_12R,Color Palette 2 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP2_12A ,Color Palette 2_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP2_12R ,Color Palette 2_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP2_12G ,Color Palette 2_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP2_12B ,Color Palette 2_12 Blue" line.long 0x34 "CP2_13R,Color Palette 2 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP2_13A ,Color Palette 2_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP2_13R ,Color Palette 2_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP2_13G ,Color Palette 2_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP2_13B ,Color Palette 2_13 Blue" line.long 0x38 "CP2_14R,Color Palette 2 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP2_14A ,Color Palette 2_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP2_14R ,Color Palette 2_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP2_14G ,Color Palette 2_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP2_14B ,Color Palette 2_14 Blue" line.long 0x3C "CP2_15R,Color Palette 2 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP2_15A ,Color Palette 2_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP2_15R ,Color Palette 2_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP2_15G ,Color Palette 2_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP2_15B ,Color Palette 2_15 Blue" line.long 0x40 "CP2_16R,Color Palette 2 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP2_16A ,Color Palette 2_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP2_16R ,Color Palette 2_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP2_16G ,Color Palette 2_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP2_16B ,Color Palette 2_16 Blue" line.long 0x44 "CP2_17R,Color Palette 2 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP2_17A ,Color Palette 2_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP2_17R ,Color Palette 2_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP2_17G ,Color Palette 2_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP2_17B ,Color Palette 2_17 Blue" line.long 0x48 "CP2_18R,Color Palette 2 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP2_18A ,Color Palette 2_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP2_18R ,Color Palette 2_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP2_18G ,Color Palette 2_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP2_18B ,Color Palette 2_18 Blue" line.long 0x4C "CP2_19R,Color Palette 2 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP2_19A ,Color Palette 2_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP2_19R ,Color Palette 2_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP2_19G ,Color Palette 2_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP2_19B ,Color Palette 2_19 Blue" line.long 0x50 "CP2_20R,Color Palette 2 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP2_20A ,Color Palette 2_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP2_20R ,Color Palette 2_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP2_20G ,Color Palette 2_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP2_20B ,Color Palette 2_20 Blue" line.long 0x54 "CP2_21R,Color Palette 2 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP2_21A ,Color Palette 2_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP2_21R ,Color Palette 2_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP2_21G ,Color Palette 2_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP2_21B ,Color Palette 2_21 Blue" line.long 0x58 "CP2_22R,Color Palette 2 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP2_22A ,Color Palette 2_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP2_22R ,Color Palette 2_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP2_22G ,Color Palette 2_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP2_22B ,Color Palette 2_22 Blue" line.long 0x5C "CP2_23R,Color Palette 2 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP2_23A ,Color Palette 2_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP2_23R ,Color Palette 2_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP2_23G ,Color Palette 2_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP2_23B ,Color Palette 2_23 Blue" line.long 0x60 "CP2_24R,Color Palette 2 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP2_24A ,Color Palette 2_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP2_24R ,Color Palette 2_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP2_24G ,Color Palette 2_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP2_24B ,Color Palette 2_24 Blue" line.long 0x64 "CP2_25R,Color Palette 2 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP2_25A ,Color Palette 2_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP2_25R ,Color Palette 2_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP2_25G ,Color Palette 2_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP2_25B ,Color Palette 2_25 Blue" line.long 0x68 "CP2_26R,Color Palette 2 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP2_26A ,Color Palette 2_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP2_26R ,Color Palette 2_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP2_26G ,Color Palette 2_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP2_26B ,Color Palette 2_26 Blue" line.long 0x6C "CP2_27R,Color Palette 2 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP2_27A ,Color Palette 2_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP2_27R ,Color Palette 2_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP2_27G ,Color Palette 2_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP2_27B ,Color Palette 2_27 Blue" line.long 0x70 "CP2_28R,Color Palette 2 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP2_28A ,Color Palette 2_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP2_28R ,Color Palette 2_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP2_28G ,Color Palette 2_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP2_28B ,Color Palette 2_28 Blue" line.long 0x74 "CP2_29R,Color Palette 2 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP2_29A ,Color Palette 2_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP2_29R ,Color Palette 2_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP2_29G ,Color Palette 2_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP2_29B ,Color Palette 2_29 Blue" line.long 0x78 "CP2_30R,Color Palette 2 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP2_30A ,Color Palette 2_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP2_30R ,Color Palette 2_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP2_30G ,Color Palette 2_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP2_30B ,Color Palette 2_30 Blue" line.long 0x7C "CP2_31R,Color Palette 2 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP2_31A ,Color Palette 2_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP2_31R ,Color Palette 2_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP2_31G ,Color Palette 2_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP2_31B ,Color Palette 2_31 Blue" line.long 0x80 "CP2_32R,Color Palette 2 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP2_32A ,Color Palette 2_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP2_32R ,Color Palette 2_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP2_32G ,Color Palette 2_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP2_32B ,Color Palette 2_32 Blue" line.long 0x84 "CP2_33R,Color Palette 2 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP2_33A ,Color Palette 2_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP2_33R ,Color Palette 2_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP2_33G ,Color Palette 2_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP2_33B ,Color Palette 2_33 Blue" line.long 0x88 "CP2_34R,Color Palette 2 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP2_34A ,Color Palette 2_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP2_34R ,Color Palette 2_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP2_34G ,Color Palette 2_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP2_34B ,Color Palette 2_34 Blue" line.long 0x8C "CP2_35R,Color Palette 2 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP2_35A ,Color Palette 2_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP2_35R ,Color Palette 2_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP2_35G ,Color Palette 2_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP2_35B ,Color Palette 2_35 Blue" line.long 0x90 "CP2_36R,Color Palette 2 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP2_36A ,Color Palette 2_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP2_36R ,Color Palette 2_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP2_36G ,Color Palette 2_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP2_36B ,Color Palette 2_36 Blue" line.long 0x94 "CP2_37R,Color Palette 2 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP2_37A ,Color Palette 2_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP2_37R ,Color Palette 2_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP2_37G ,Color Palette 2_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP2_37B ,Color Palette 2_37 Blue" line.long 0x98 "CP2_38R,Color Palette 2 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP2_38A ,Color Palette 2_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP2_38R ,Color Palette 2_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP2_38G ,Color Palette 2_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP2_38B ,Color Palette 2_38 Blue" line.long 0x9C "CP2_39R,Color Palette 2 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP2_39A ,Color Palette 2_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP2_39R ,Color Palette 2_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP2_39G ,Color Palette 2_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP2_39B ,Color Palette 2_39 Blue" line.long 0xA0 "CP2_40R,Color Palette 2 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP2_40A ,Color Palette 2_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP2_40R ,Color Palette 2_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP2_40G ,Color Palette 2_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP2_40B ,Color Palette 2_40 Blue" line.long 0xA4 "CP2_41R,Color Palette 2 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP2_41A ,Color Palette 2_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP2_41R ,Color Palette 2_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP2_41G ,Color Palette 2_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP2_41B ,Color Palette 2_41 Blue" line.long 0xA8 "CP2_42R,Color Palette 2 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP2_42A ,Color Palette 2_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP2_42R ,Color Palette 2_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP2_42G ,Color Palette 2_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP2_42B ,Color Palette 2_42 Blue" line.long 0xAC "CP2_43R,Color Palette 2 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP2_43A ,Color Palette 2_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP2_43R ,Color Palette 2_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP2_43G ,Color Palette 2_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP2_43B ,Color Palette 2_43 Blue" line.long 0xB0 "CP2_44R,Color Palette 2 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP2_44A ,Color Palette 2_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP2_44R ,Color Palette 2_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP2_44G ,Color Palette 2_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP2_44B ,Color Palette 2_44 Blue" line.long 0xB4 "CP2_45R,Color Palette 2 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP2_45A ,Color Palette 2_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP2_45R ,Color Palette 2_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP2_45G ,Color Palette 2_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP2_45B ,Color Palette 2_45 Blue" line.long 0xB8 "CP2_46R,Color Palette 2 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP2_46A ,Color Palette 2_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP2_46R ,Color Palette 2_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP2_46G ,Color Palette 2_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP2_46B ,Color Palette 2_46 Blue" line.long 0xBC "CP2_47R,Color Palette 2 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP2_47A ,Color Palette 2_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP2_47R ,Color Palette 2_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP2_47G ,Color Palette 2_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP2_47B ,Color Palette 2_47 Blue" line.long 0xC0 "CP2_48R,Color Palette 2 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP2_48A ,Color Palette 2_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP2_48R ,Color Palette 2_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP2_48G ,Color Palette 2_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP2_48B ,Color Palette 2_48 Blue" line.long 0xC4 "CP2_49R,Color Palette 2 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP2_49A ,Color Palette 2_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP2_49R ,Color Palette 2_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP2_49G ,Color Palette 2_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP2_49B ,Color Palette 2_49 Blue" line.long 0xC8 "CP2_50R,Color Palette 2 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP2_50A ,Color Palette 2_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP2_50R ,Color Palette 2_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP2_50G ,Color Palette 2_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP2_50B ,Color Palette 2_50 Blue" line.long 0xCC "CP2_51R,Color Palette 2 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP2_51A ,Color Palette 2_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP2_51R ,Color Palette 2_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP2_51G ,Color Palette 2_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP2_51B ,Color Palette 2_51 Blue" line.long 0xD0 "CP2_52R,Color Palette 2 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP2_52A ,Color Palette 2_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP2_52R ,Color Palette 2_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP2_52G ,Color Palette 2_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP2_52B ,Color Palette 2_52 Blue" line.long 0xD4 "CP2_53R,Color Palette 2 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP2_53A ,Color Palette 2_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP2_53R ,Color Palette 2_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP2_53G ,Color Palette 2_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP2_53B ,Color Palette 2_53 Blue" line.long 0xD8 "CP2_54R,Color Palette 2 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP2_54A ,Color Palette 2_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP2_54R ,Color Palette 2_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP2_54G ,Color Palette 2_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP2_54B ,Color Palette 2_54 Blue" line.long 0xDC "CP2_55R,Color Palette 2 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP2_55A ,Color Palette 2_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP2_55R ,Color Palette 2_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP2_55G ,Color Palette 2_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP2_55B ,Color Palette 2_55 Blue" line.long 0xE0 "CP2_56R,Color Palette 2 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP2_56A ,Color Palette 2_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP2_56R ,Color Palette 2_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP2_56G ,Color Palette 2_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP2_56B ,Color Palette 2_56 Blue" line.long 0xE4 "CP2_57R,Color Palette 2 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP2_57A ,Color Palette 2_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP2_57R ,Color Palette 2_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP2_57G ,Color Palette 2_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP2_57B ,Color Palette 2_57 Blue" line.long 0xE8 "CP2_58R,Color Palette 2 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP2_58A ,Color Palette 2_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP2_58R ,Color Palette 2_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP2_58G ,Color Palette 2_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP2_58B ,Color Palette 2_58 Blue" line.long 0xEC "CP2_59R,Color Palette 2 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP2_59A ,Color Palette 2_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP2_59R ,Color Palette 2_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP2_59G ,Color Palette 2_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP2_59B ,Color Palette 2_59 Blue" line.long 0xF0 "CP2_60R,Color Palette 2 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP2_60A ,Color Palette 2_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP2_60R ,Color Palette 2_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP2_60G ,Color Palette 2_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP2_60B ,Color Palette 2_60 Blue" line.long 0xF4 "CP2_61R,Color Palette 2 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP2_61A ,Color Palette 2_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP2_61R ,Color Palette 2_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP2_61G ,Color Palette 2_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP2_61B ,Color Palette 2_61 Blue" line.long 0xF8 "CP2_62R,Color Palette 2 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP2_62A ,Color Palette 2_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP2_62R ,Color Palette 2_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP2_62G ,Color Palette 2_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP2_62B ,Color Palette 2_62 Blue" line.long 0xFC "CP2_63R,Color Palette 2 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP2_63A ,Color Palette 2_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP2_63R ,Color Palette 2_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP2_63G ,Color Palette 2_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP2_63B ,Color Palette 2_63 Blue" line.long 0x100 "CP2_64R,Color Palette 2 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP2_64A ,Color Palette 2_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP2_64R ,Color Palette 2_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP2_64G ,Color Palette 2_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP2_64B ,Color Palette 2_64 Blue" line.long 0x104 "CP2_65R,Color Palette 2 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP2_65A ,Color Palette 2_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP2_65R ,Color Palette 2_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP2_65G ,Color Palette 2_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP2_65B ,Color Palette 2_65 Blue" line.long 0x108 "CP2_66R,Color Palette 2 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP2_66A ,Color Palette 2_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP2_66R ,Color Palette 2_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP2_66G ,Color Palette 2_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP2_66B ,Color Palette 2_66 Blue" line.long 0x10C "CP2_67R,Color Palette 2 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP2_67A ,Color Palette 2_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP2_67R ,Color Palette 2_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP2_67G ,Color Palette 2_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP2_67B ,Color Palette 2_67 Blue" line.long 0x110 "CP2_68R,Color Palette 2 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP2_68A ,Color Palette 2_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP2_68R ,Color Palette 2_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP2_68G ,Color Palette 2_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP2_68B ,Color Palette 2_68 Blue" line.long 0x114 "CP2_69R,Color Palette 2 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP2_69A ,Color Palette 2_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP2_69R ,Color Palette 2_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP2_69G ,Color Palette 2_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP2_69B ,Color Palette 2_69 Blue" line.long 0x118 "CP2_70R,Color Palette 2 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP2_70A ,Color Palette 2_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP2_70R ,Color Palette 2_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP2_70G ,Color Palette 2_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP2_70B ,Color Palette 2_70 Blue" line.long 0x11C "CP2_71R,Color Palette 2 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP2_71A ,Color Palette 2_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP2_71R ,Color Palette 2_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP2_71G ,Color Palette 2_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP2_71B ,Color Palette 2_71 Blue" line.long 0x120 "CP2_72R,Color Palette 2 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP2_72A ,Color Palette 2_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP2_72R ,Color Palette 2_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP2_72G ,Color Palette 2_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP2_72B ,Color Palette 2_72 Blue" line.long 0x124 "CP2_73R,Color Palette 2 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP2_73A ,Color Palette 2_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP2_73R ,Color Palette 2_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP2_73G ,Color Palette 2_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP2_73B ,Color Palette 2_73 Blue" line.long 0x128 "CP2_74R,Color Palette 2 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP2_74A ,Color Palette 2_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP2_74R ,Color Palette 2_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP2_74G ,Color Palette 2_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP2_74B ,Color Palette 2_74 Blue" line.long 0x12C "CP2_75R,Color Palette 2 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP2_75A ,Color Palette 2_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP2_75R ,Color Palette 2_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP2_75G ,Color Palette 2_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP2_75B ,Color Palette 2_75 Blue" line.long 0x130 "CP2_76R,Color Palette 2 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP2_76A ,Color Palette 2_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP2_76R ,Color Palette 2_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP2_76G ,Color Palette 2_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP2_76B ,Color Palette 2_76 Blue" line.long 0x134 "CP2_77R,Color Palette 2 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP2_77A ,Color Palette 2_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP2_77R ,Color Palette 2_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP2_77G ,Color Palette 2_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP2_77B ,Color Palette 2_77 Blue" line.long 0x138 "CP2_78R,Color Palette 2 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP2_78A ,Color Palette 2_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP2_78R ,Color Palette 2_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP2_78G ,Color Palette 2_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP2_78B ,Color Palette 2_78 Blue" line.long 0x13C "CP2_79R,Color Palette 2 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP2_79A ,Color Palette 2_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP2_79R ,Color Palette 2_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP2_79G ,Color Palette 2_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP2_79B ,Color Palette 2_79 Blue" line.long 0x140 "CP2_80R,Color Palette 2 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP2_80A ,Color Palette 2_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP2_80R ,Color Palette 2_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP2_80G ,Color Palette 2_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP2_80B ,Color Palette 2_80 Blue" line.long 0x144 "CP2_81R,Color Palette 2 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP2_81A ,Color Palette 2_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP2_81R ,Color Palette 2_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP2_81G ,Color Palette 2_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP2_81B ,Color Palette 2_81 Blue" line.long 0x148 "CP2_82R,Color Palette 2 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP2_82A ,Color Palette 2_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP2_82R ,Color Palette 2_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP2_82G ,Color Palette 2_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP2_82B ,Color Palette 2_82 Blue" line.long 0x14C "CP2_83R,Color Palette 2 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP2_83A ,Color Palette 2_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP2_83R ,Color Palette 2_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP2_83G ,Color Palette 2_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP2_83B ,Color Palette 2_83 Blue" line.long 0x150 "CP2_84R,Color Palette 2 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP2_84A ,Color Palette 2_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP2_84R ,Color Palette 2_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP2_84G ,Color Palette 2_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP2_84B ,Color Palette 2_84 Blue" line.long 0x154 "CP2_85R,Color Palette 2 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP2_85A ,Color Palette 2_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP2_85R ,Color Palette 2_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP2_85G ,Color Palette 2_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP2_85B ,Color Palette 2_85 Blue" line.long 0x158 "CP2_86R,Color Palette 2 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP2_86A ,Color Palette 2_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP2_86R ,Color Palette 2_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP2_86G ,Color Palette 2_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP2_86B ,Color Palette 2_86 Blue" line.long 0x15C "CP2_87R,Color Palette 2 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP2_87A ,Color Palette 2_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP2_87R ,Color Palette 2_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP2_87G ,Color Palette 2_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP2_87B ,Color Palette 2_87 Blue" line.long 0x160 "CP2_88R,Color Palette 2 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP2_88A ,Color Palette 2_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP2_88R ,Color Palette 2_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP2_88G ,Color Palette 2_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP2_88B ,Color Palette 2_88 Blue" line.long 0x164 "CP2_89R,Color Palette 2 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP2_89A ,Color Palette 2_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP2_89R ,Color Palette 2_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP2_89G ,Color Palette 2_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP2_89B ,Color Palette 2_89 Blue" line.long 0x168 "CP2_90R,Color Palette 2 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP2_90A ,Color Palette 2_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP2_90R ,Color Palette 2_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP2_90G ,Color Palette 2_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP2_90B ,Color Palette 2_90 Blue" line.long 0x16C "CP2_91R,Color Palette 2 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP2_91A ,Color Palette 2_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP2_91R ,Color Palette 2_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP2_91G ,Color Palette 2_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP2_91B ,Color Palette 2_91 Blue" line.long 0x170 "CP2_92R,Color Palette 2 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP2_92A ,Color Palette 2_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP2_92R ,Color Palette 2_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP2_92G ,Color Palette 2_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP2_92B ,Color Palette 2_92 Blue" line.long 0x174 "CP2_93R,Color Palette 2 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP2_93A ,Color Palette 2_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP2_93R ,Color Palette 2_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP2_93G ,Color Palette 2_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP2_93B ,Color Palette 2_93 Blue" line.long 0x178 "CP2_94R,Color Palette 2 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP2_94A ,Color Palette 2_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP2_94R ,Color Palette 2_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP2_94G ,Color Palette 2_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP2_94B ,Color Palette 2_94 Blue" line.long 0x17C "CP2_95R,Color Palette 2 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP2_95A ,Color Palette 2_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP2_95R ,Color Palette 2_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP2_95G ,Color Palette 2_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP2_95B ,Color Palette 2_95 Blue" line.long 0x180 "CP2_96R,Color Palette 2 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP2_96A ,Color Palette 2_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP2_96R ,Color Palette 2_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP2_96G ,Color Palette 2_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP2_96B ,Color Palette 2_96 Blue" line.long 0x184 "CP2_97R,Color Palette 2 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP2_97A ,Color Palette 2_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP2_97R ,Color Palette 2_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP2_97G ,Color Palette 2_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP2_97B ,Color Palette 2_97 Blue" line.long 0x188 "CP2_98R,Color Palette 2 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP2_98A ,Color Palette 2_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP2_98R ,Color Palette 2_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP2_98G ,Color Palette 2_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP2_98B ,Color Palette 2_98 Blue" line.long 0x18C "CP2_99R,Color Palette 2 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP2_99A ,Color Palette 2_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP2_99R ,Color Palette 2_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP2_99G ,Color Palette 2_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP2_99B ,Color Palette 2_99 Blue" line.long 0x190 "CP2_100R,Color Palette 2 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP2_100A ,Color Palette 2_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP2_100R ,Color Palette 2_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP2_100G ,Color Palette 2_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP2_100B ,Color Palette 2_100 Blue" line.long 0x194 "CP2_101R,Color Palette 2 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP2_101A ,Color Palette 2_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP2_101R ,Color Palette 2_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP2_101G ,Color Palette 2_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP2_101B ,Color Palette 2_101 Blue" line.long 0x198 "CP2_102R,Color Palette 2 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP2_102A ,Color Palette 2_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP2_102R ,Color Palette 2_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP2_102G ,Color Palette 2_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP2_102B ,Color Palette 2_102 Blue" line.long 0x19C "CP2_103R,Color Palette 2 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP2_103A ,Color Palette 2_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP2_103R ,Color Palette 2_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP2_103G ,Color Palette 2_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP2_103B ,Color Palette 2_103 Blue" line.long 0x1A0 "CP2_104R,Color Palette 2 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP2_104A ,Color Palette 2_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP2_104R ,Color Palette 2_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP2_104G ,Color Palette 2_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP2_104B ,Color Palette 2_104 Blue" line.long 0x1A4 "CP2_105R,Color Palette 2 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP2_105A ,Color Palette 2_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP2_105R ,Color Palette 2_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP2_105G ,Color Palette 2_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP2_105B ,Color Palette 2_105 Blue" line.long 0x1A8 "CP2_106R,Color Palette 2 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP2_106A ,Color Palette 2_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP2_106R ,Color Palette 2_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP2_106G ,Color Palette 2_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP2_106B ,Color Palette 2_106 Blue" line.long 0x1AC "CP2_107R,Color Palette 2 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP2_107A ,Color Palette 2_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP2_107R ,Color Palette 2_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP2_107G ,Color Palette 2_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP2_107B ,Color Palette 2_107 Blue" line.long 0x1B0 "CP2_108R,Color Palette 2 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP2_108A ,Color Palette 2_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP2_108R ,Color Palette 2_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP2_108G ,Color Palette 2_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP2_108B ,Color Palette 2_108 Blue" line.long 0x1B4 "CP2_109R,Color Palette 2 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP2_109A ,Color Palette 2_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP2_109R ,Color Palette 2_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP2_109G ,Color Palette 2_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP2_109B ,Color Palette 2_109 Blue" line.long 0x1B8 "CP2_110R,Color Palette 2 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP2_110A ,Color Palette 2_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP2_110R ,Color Palette 2_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP2_110G ,Color Palette 2_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP2_110B ,Color Palette 2_110 Blue" line.long 0x1BC "CP2_111R,Color Palette 2 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP2_111A ,Color Palette 2_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP2_111R ,Color Palette 2_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP2_111G ,Color Palette 2_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP2_111B ,Color Palette 2_111 Blue" line.long 0x1C0 "CP2_112R,Color Palette 2 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP2_112A ,Color Palette 2_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP2_112R ,Color Palette 2_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP2_112G ,Color Palette 2_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP2_112B ,Color Palette 2_112 Blue" line.long 0x1C4 "CP2_113R,Color Palette 2 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP2_113A ,Color Palette 2_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP2_113R ,Color Palette 2_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP2_113G ,Color Palette 2_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP2_113B ,Color Palette 2_113 Blue" line.long 0x1C8 "CP2_114R,Color Palette 2 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP2_114A ,Color Palette 2_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP2_114R ,Color Palette 2_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP2_114G ,Color Palette 2_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP2_114B ,Color Palette 2_114 Blue" line.long 0x1CC "CP2_115R,Color Palette 2 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP2_115A ,Color Palette 2_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP2_115R ,Color Palette 2_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP2_115G ,Color Palette 2_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP2_115B ,Color Palette 2_115 Blue" line.long 0x1D0 "CP2_116R,Color Palette 2 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP2_116A ,Color Palette 2_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP2_116R ,Color Palette 2_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP2_116G ,Color Palette 2_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP2_116B ,Color Palette 2_116 Blue" line.long 0x1D4 "CP2_117R,Color Palette 2 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP2_117A ,Color Palette 2_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP2_117R ,Color Palette 2_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP2_117G ,Color Palette 2_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP2_117B ,Color Palette 2_117 Blue" line.long 0x1D8 "CP2_118R,Color Palette 2 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP2_118A ,Color Palette 2_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP2_118R ,Color Palette 2_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP2_118G ,Color Palette 2_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP2_118B ,Color Palette 2_118 Blue" line.long 0x1DC "CP2_119R,Color Palette 2 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP2_119A ,Color Palette 2_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP2_119R ,Color Palette 2_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP2_119G ,Color Palette 2_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP2_119B ,Color Palette 2_119 Blue" line.long 0x1E0 "CP2_120R,Color Palette 2 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP2_120A ,Color Palette 2_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP2_120R ,Color Palette 2_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP2_120G ,Color Palette 2_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP2_120B ,Color Palette 2_120 Blue" line.long 0x1E4 "CP2_121R,Color Palette 2 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP2_121A ,Color Palette 2_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP2_121R ,Color Palette 2_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP2_121G ,Color Palette 2_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP2_121B ,Color Palette 2_121 Blue" line.long 0x1E8 "CP2_122R,Color Palette 2 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP2_122A ,Color Palette 2_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP2_122R ,Color Palette 2_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP2_122G ,Color Palette 2_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP2_122B ,Color Palette 2_122 Blue" line.long 0x1EC "CP2_123R,Color Palette 2 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP2_123A ,Color Palette 2_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP2_123R ,Color Palette 2_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP2_123G ,Color Palette 2_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP2_123B ,Color Palette 2_123 Blue" line.long 0x1F0 "CP2_124R,Color Palette 2 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP2_124A ,Color Palette 2_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP2_124R ,Color Palette 2_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP2_124G ,Color Palette 2_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP2_124B ,Color Palette 2_124 Blue" line.long 0x1F4 "CP2_125R,Color Palette 2 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP2_125A ,Color Palette 2_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP2_125R ,Color Palette 2_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP2_125G ,Color Palette 2_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP2_125B ,Color Palette 2_125 Blue" line.long 0x1F8 "CP2_126R,Color Palette 2 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP2_126A ,Color Palette 2_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP2_126R ,Color Palette 2_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP2_126G ,Color Palette 2_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP2_126B ,Color Palette 2_126 Blue" line.long 0x1FC "CP2_127R,Color Palette 2 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP2_127A ,Color Palette 2_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP2_127R ,Color Palette 2_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP2_127G ,Color Palette 2_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP2_127B ,Color Palette 2_127 Blue" line.long 0x200 "CP2_128R,Color Palette 2 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP2_128A ,Color Palette 2_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP2_128R ,Color Palette 2_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP2_128G ,Color Palette 2_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP2_128B ,Color Palette 2_128 Blue" line.long 0x204 "CP2_129R,Color Palette 2 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP2_129A ,Color Palette 2_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP2_129R ,Color Palette 2_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP2_129G ,Color Palette 2_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP2_129B ,Color Palette 2_129 Blue" line.long 0x208 "CP2_130R,Color Palette 2 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP2_130A ,Color Palette 2_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP2_130R ,Color Palette 2_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP2_130G ,Color Palette 2_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP2_130B ,Color Palette 2_130 Blue" line.long 0x20C "CP2_131R,Color Palette 2 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP2_131A ,Color Palette 2_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP2_131R ,Color Palette 2_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP2_131G ,Color Palette 2_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP2_131B ,Color Palette 2_131 Blue" line.long 0x210 "CP2_132R,Color Palette 2 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP2_132A ,Color Palette 2_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP2_132R ,Color Palette 2_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP2_132G ,Color Palette 2_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP2_132B ,Color Palette 2_132 Blue" line.long 0x214 "CP2_133R,Color Palette 2 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP2_133A ,Color Palette 2_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP2_133R ,Color Palette 2_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP2_133G ,Color Palette 2_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP2_133B ,Color Palette 2_133 Blue" line.long 0x218 "CP2_134R,Color Palette 2 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP2_134A ,Color Palette 2_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP2_134R ,Color Palette 2_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP2_134G ,Color Palette 2_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP2_134B ,Color Palette 2_134 Blue" line.long 0x21C "CP2_135R,Color Palette 2 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP2_135A ,Color Palette 2_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP2_135R ,Color Palette 2_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP2_135G ,Color Palette 2_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP2_135B ,Color Palette 2_135 Blue" line.long 0x220 "CP2_136R,Color Palette 2 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP2_136A ,Color Palette 2_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP2_136R ,Color Palette 2_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP2_136G ,Color Palette 2_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP2_136B ,Color Palette 2_136 Blue" line.long 0x224 "CP2_137R,Color Palette 2 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP2_137A ,Color Palette 2_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP2_137R ,Color Palette 2_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP2_137G ,Color Palette 2_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP2_137B ,Color Palette 2_137 Blue" line.long 0x228 "CP2_138R,Color Palette 2 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP2_138A ,Color Palette 2_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP2_138R ,Color Palette 2_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP2_138G ,Color Palette 2_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP2_138B ,Color Palette 2_138 Blue" line.long 0x22C "CP2_139R,Color Palette 2 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP2_139A ,Color Palette 2_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP2_139R ,Color Palette 2_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP2_139G ,Color Palette 2_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP2_139B ,Color Palette 2_139 Blue" line.long 0x230 "CP2_140R,Color Palette 2 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP2_140A ,Color Palette 2_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP2_140R ,Color Palette 2_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP2_140G ,Color Palette 2_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP2_140B ,Color Palette 2_140 Blue" line.long 0x234 "CP2_141R,Color Palette 2 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP2_141A ,Color Palette 2_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP2_141R ,Color Palette 2_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP2_141G ,Color Palette 2_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP2_141B ,Color Palette 2_141 Blue" line.long 0x238 "CP2_142R,Color Palette 2 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP2_142A ,Color Palette 2_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP2_142R ,Color Palette 2_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP2_142G ,Color Palette 2_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP2_142B ,Color Palette 2_142 Blue" line.long 0x23C "CP2_143R,Color Palette 2 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP2_143A ,Color Palette 2_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP2_143R ,Color Palette 2_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP2_143G ,Color Palette 2_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP2_143B ,Color Palette 2_143 Blue" line.long 0x240 "CP2_144R,Color Palette 2 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP2_144A ,Color Palette 2_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP2_144R ,Color Palette 2_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP2_144G ,Color Palette 2_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP2_144B ,Color Palette 2_144 Blue" line.long 0x244 "CP2_145R,Color Palette 2 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP2_145A ,Color Palette 2_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP2_145R ,Color Palette 2_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP2_145G ,Color Palette 2_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP2_145B ,Color Palette 2_145 Blue" line.long 0x248 "CP2_146R,Color Palette 2 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP2_146A ,Color Palette 2_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP2_146R ,Color Palette 2_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP2_146G ,Color Palette 2_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP2_146B ,Color Palette 2_146 Blue" line.long 0x24C "CP2_147R,Color Palette 2 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP2_147A ,Color Palette 2_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP2_147R ,Color Palette 2_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP2_147G ,Color Palette 2_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP2_147B ,Color Palette 2_147 Blue" line.long 0x250 "CP2_148R,Color Palette 2 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP2_148A ,Color Palette 2_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP2_148R ,Color Palette 2_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP2_148G ,Color Palette 2_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP2_148B ,Color Palette 2_148 Blue" line.long 0x254 "CP2_149R,Color Palette 2 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP2_149A ,Color Palette 2_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP2_149R ,Color Palette 2_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP2_149G ,Color Palette 2_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP2_149B ,Color Palette 2_149 Blue" line.long 0x258 "CP2_150R,Color Palette 2 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP2_150A ,Color Palette 2_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP2_150R ,Color Palette 2_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP2_150G ,Color Palette 2_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP2_150B ,Color Palette 2_150 Blue" line.long 0x25C "CP2_151R,Color Palette 2 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP2_151A ,Color Palette 2_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP2_151R ,Color Palette 2_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP2_151G ,Color Palette 2_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP2_151B ,Color Palette 2_151 Blue" line.long 0x260 "CP2_152R,Color Palette 2 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP2_152A ,Color Palette 2_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP2_152R ,Color Palette 2_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP2_152G ,Color Palette 2_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP2_152B ,Color Palette 2_152 Blue" line.long 0x264 "CP2_153R,Color Palette 2 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP2_153A ,Color Palette 2_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP2_153R ,Color Palette 2_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP2_153G ,Color Palette 2_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP2_153B ,Color Palette 2_153 Blue" line.long 0x268 "CP2_154R,Color Palette 2 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP2_154A ,Color Palette 2_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP2_154R ,Color Palette 2_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP2_154G ,Color Palette 2_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP2_154B ,Color Palette 2_154 Blue" line.long 0x26C "CP2_155R,Color Palette 2 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP2_155A ,Color Palette 2_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP2_155R ,Color Palette 2_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP2_155G ,Color Palette 2_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP2_155B ,Color Palette 2_155 Blue" line.long 0x270 "CP2_156R,Color Palette 2 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP2_156A ,Color Palette 2_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP2_156R ,Color Palette 2_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP2_156G ,Color Palette 2_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP2_156B ,Color Palette 2_156 Blue" line.long 0x274 "CP2_157R,Color Palette 2 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP2_157A ,Color Palette 2_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP2_157R ,Color Palette 2_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP2_157G ,Color Palette 2_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP2_157B ,Color Palette 2_157 Blue" line.long 0x278 "CP2_158R,Color Palette 2 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP2_158A ,Color Palette 2_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP2_158R ,Color Palette 2_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP2_158G ,Color Palette 2_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP2_158B ,Color Palette 2_158 Blue" line.long 0x27C "CP2_159R,Color Palette 2 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP2_159A ,Color Palette 2_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP2_159R ,Color Palette 2_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP2_159G ,Color Palette 2_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP2_159B ,Color Palette 2_159 Blue" line.long 0x280 "CP2_160R,Color Palette 2 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP2_160A ,Color Palette 2_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP2_160R ,Color Palette 2_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP2_160G ,Color Palette 2_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP2_160B ,Color Palette 2_160 Blue" line.long 0x284 "CP2_161R,Color Palette 2 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP2_161A ,Color Palette 2_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP2_161R ,Color Palette 2_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP2_161G ,Color Palette 2_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP2_161B ,Color Palette 2_161 Blue" line.long 0x288 "CP2_162R,Color Palette 2 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP2_162A ,Color Palette 2_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP2_162R ,Color Palette 2_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP2_162G ,Color Palette 2_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP2_162B ,Color Palette 2_162 Blue" line.long 0x28C "CP2_163R,Color Palette 2 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP2_163A ,Color Palette 2_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP2_163R ,Color Palette 2_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP2_163G ,Color Palette 2_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP2_163B ,Color Palette 2_163 Blue" line.long 0x290 "CP2_164R,Color Palette 2 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP2_164A ,Color Palette 2_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP2_164R ,Color Palette 2_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP2_164G ,Color Palette 2_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP2_164B ,Color Palette 2_164 Blue" line.long 0x294 "CP2_165R,Color Palette 2 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP2_165A ,Color Palette 2_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP2_165R ,Color Palette 2_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP2_165G ,Color Palette 2_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP2_165B ,Color Palette 2_165 Blue" line.long 0x298 "CP2_166R,Color Palette 2 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP2_166A ,Color Palette 2_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP2_166R ,Color Palette 2_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP2_166G ,Color Palette 2_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP2_166B ,Color Palette 2_166 Blue" line.long 0x29C "CP2_167R,Color Palette 2 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP2_167A ,Color Palette 2_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP2_167R ,Color Palette 2_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP2_167G ,Color Palette 2_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP2_167B ,Color Palette 2_167 Blue" line.long 0x2A0 "CP2_168R,Color Palette 2 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP2_168A ,Color Palette 2_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP2_168R ,Color Palette 2_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP2_168G ,Color Palette 2_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP2_168B ,Color Palette 2_168 Blue" line.long 0x2A4 "CP2_169R,Color Palette 2 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP2_169A ,Color Palette 2_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP2_169R ,Color Palette 2_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP2_169G ,Color Palette 2_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP2_169B ,Color Palette 2_169 Blue" line.long 0x2A8 "CP2_170R,Color Palette 2 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP2_170A ,Color Palette 2_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP2_170R ,Color Palette 2_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP2_170G ,Color Palette 2_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP2_170B ,Color Palette 2_170 Blue" line.long 0x2AC "CP2_171R,Color Palette 2 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP2_171A ,Color Palette 2_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP2_171R ,Color Palette 2_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP2_171G ,Color Palette 2_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP2_171B ,Color Palette 2_171 Blue" line.long 0x2B0 "CP2_172R,Color Palette 2 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP2_172A ,Color Palette 2_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP2_172R ,Color Palette 2_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP2_172G ,Color Palette 2_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP2_172B ,Color Palette 2_172 Blue" line.long 0x2B4 "CP2_173R,Color Palette 2 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP2_173A ,Color Palette 2_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP2_173R ,Color Palette 2_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP2_173G ,Color Palette 2_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP2_173B ,Color Palette 2_173 Blue" line.long 0x2B8 "CP2_174R,Color Palette 2 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP2_174A ,Color Palette 2_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP2_174R ,Color Palette 2_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP2_174G ,Color Palette 2_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP2_174B ,Color Palette 2_174 Blue" line.long 0x2BC "CP2_175R,Color Palette 2 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP2_175A ,Color Palette 2_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP2_175R ,Color Palette 2_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP2_175G ,Color Palette 2_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP2_175B ,Color Palette 2_175 Blue" line.long 0x2C0 "CP2_176R,Color Palette 2 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP2_176A ,Color Palette 2_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP2_176R ,Color Palette 2_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP2_176G ,Color Palette 2_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP2_176B ,Color Palette 2_176 Blue" line.long 0x2C4 "CP2_177R,Color Palette 2 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP2_177A ,Color Palette 2_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP2_177R ,Color Palette 2_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP2_177G ,Color Palette 2_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP2_177B ,Color Palette 2_177 Blue" line.long 0x2C8 "CP2_178R,Color Palette 2 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP2_178A ,Color Palette 2_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP2_178R ,Color Palette 2_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP2_178G ,Color Palette 2_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP2_178B ,Color Palette 2_178 Blue" line.long 0x2CC "CP2_179R,Color Palette 2 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP2_179A ,Color Palette 2_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP2_179R ,Color Palette 2_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP2_179G ,Color Palette 2_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP2_179B ,Color Palette 2_179 Blue" line.long 0x2D0 "CP2_180R,Color Palette 2 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP2_180A ,Color Palette 2_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP2_180R ,Color Palette 2_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP2_180G ,Color Palette 2_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP2_180B ,Color Palette 2_180 Blue" line.long 0x2D4 "CP2_181R,Color Palette 2 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP2_181A ,Color Palette 2_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP2_181R ,Color Palette 2_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP2_181G ,Color Palette 2_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP2_181B ,Color Palette 2_181 Blue" line.long 0x2D8 "CP2_182R,Color Palette 2 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP2_182A ,Color Palette 2_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP2_182R ,Color Palette 2_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP2_182G ,Color Palette 2_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP2_182B ,Color Palette 2_182 Blue" line.long 0x2DC "CP2_183R,Color Palette 2 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP2_183A ,Color Palette 2_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP2_183R ,Color Palette 2_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP2_183G ,Color Palette 2_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP2_183B ,Color Palette 2_183 Blue" line.long 0x2E0 "CP2_184R,Color Palette 2 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP2_184A ,Color Palette 2_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP2_184R ,Color Palette 2_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP2_184G ,Color Palette 2_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP2_184B ,Color Palette 2_184 Blue" line.long 0x2E4 "CP2_185R,Color Palette 2 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP2_185A ,Color Palette 2_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP2_185R ,Color Palette 2_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP2_185G ,Color Palette 2_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP2_185B ,Color Palette 2_185 Blue" line.long 0x2E8 "CP2_186R,Color Palette 2 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP2_186A ,Color Palette 2_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP2_186R ,Color Palette 2_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP2_186G ,Color Palette 2_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP2_186B ,Color Palette 2_186 Blue" line.long 0x2EC "CP2_187R,Color Palette 2 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP2_187A ,Color Palette 2_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP2_187R ,Color Palette 2_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP2_187G ,Color Palette 2_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP2_187B ,Color Palette 2_187 Blue" line.long 0x2F0 "CP2_188R,Color Palette 2 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP2_188A ,Color Palette 2_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP2_188R ,Color Palette 2_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP2_188G ,Color Palette 2_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP2_188B ,Color Palette 2_188 Blue" line.long 0x2F4 "CP2_189R,Color Palette 2 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP2_189A ,Color Palette 2_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP2_189R ,Color Palette 2_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP2_189G ,Color Palette 2_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP2_189B ,Color Palette 2_189 Blue" line.long 0x2F8 "CP2_190R,Color Palette 2 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP2_190A ,Color Palette 2_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP2_190R ,Color Palette 2_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP2_190G ,Color Palette 2_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP2_190B ,Color Palette 2_190 Blue" line.long 0x2FC "CP2_191R,Color Palette 2 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP2_191A ,Color Palette 2_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP2_191R ,Color Palette 2_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP2_191G ,Color Palette 2_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP2_191B ,Color Palette 2_191 Blue" line.long 0x300 "CP2_192R,Color Palette 2 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP2_192A ,Color Palette 2_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP2_192R ,Color Palette 2_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP2_192G ,Color Palette 2_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP2_192B ,Color Palette 2_192 Blue" line.long 0x304 "CP2_193R,Color Palette 2 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP2_193A ,Color Palette 2_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP2_193R ,Color Palette 2_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP2_193G ,Color Palette 2_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP2_193B ,Color Palette 2_193 Blue" line.long 0x308 "CP2_194R,Color Palette 2 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP2_194A ,Color Palette 2_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP2_194R ,Color Palette 2_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP2_194G ,Color Palette 2_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP2_194B ,Color Palette 2_194 Blue" line.long 0x30C "CP2_195R,Color Palette 2 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP2_195A ,Color Palette 2_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP2_195R ,Color Palette 2_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP2_195G ,Color Palette 2_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP2_195B ,Color Palette 2_195 Blue" line.long 0x310 "CP2_196R,Color Palette 2 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP2_196A ,Color Palette 2_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP2_196R ,Color Palette 2_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP2_196G ,Color Palette 2_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP2_196B ,Color Palette 2_196 Blue" line.long 0x314 "CP2_197R,Color Palette 2 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP2_197A ,Color Palette 2_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP2_197R ,Color Palette 2_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP2_197G ,Color Palette 2_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP2_197B ,Color Palette 2_197 Blue" line.long 0x318 "CP2_198R,Color Palette 2 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP2_198A ,Color Palette 2_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP2_198R ,Color Palette 2_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP2_198G ,Color Palette 2_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP2_198B ,Color Palette 2_198 Blue" line.long 0x31C "CP2_199R,Color Palette 2 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP2_199A ,Color Palette 2_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP2_199R ,Color Palette 2_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP2_199G ,Color Palette 2_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP2_199B ,Color Palette 2_199 Blue" line.long 0x320 "CP2_200R,Color Palette 2 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP2_200A ,Color Palette 2_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP2_200R ,Color Palette 2_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP2_200G ,Color Palette 2_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP2_200B ,Color Palette 2_200 Blue" line.long 0x324 "CP2_201R,Color Palette 2 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP2_201A ,Color Palette 2_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP2_201R ,Color Palette 2_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP2_201G ,Color Palette 2_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP2_201B ,Color Palette 2_201 Blue" line.long 0x328 "CP2_202R,Color Palette 2 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP2_202A ,Color Palette 2_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP2_202R ,Color Palette 2_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP2_202G ,Color Palette 2_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP2_202B ,Color Palette 2_202 Blue" line.long 0x32C "CP2_203R,Color Palette 2 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP2_203A ,Color Palette 2_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP2_203R ,Color Palette 2_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP2_203G ,Color Palette 2_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP2_203B ,Color Palette 2_203 Blue" line.long 0x330 "CP2_204R,Color Palette 2 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP2_204A ,Color Palette 2_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP2_204R ,Color Palette 2_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP2_204G ,Color Palette 2_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP2_204B ,Color Palette 2_204 Blue" line.long 0x334 "CP2_205R,Color Palette 2 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP2_205A ,Color Palette 2_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP2_205R ,Color Palette 2_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP2_205G ,Color Palette 2_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP2_205B ,Color Palette 2_205 Blue" line.long 0x338 "CP2_206R,Color Palette 2 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP2_206A ,Color Palette 2_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP2_206R ,Color Palette 2_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP2_206G ,Color Palette 2_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP2_206B ,Color Palette 2_206 Blue" line.long 0x33C "CP2_207R,Color Palette 2 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP2_207A ,Color Palette 2_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP2_207R ,Color Palette 2_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP2_207G ,Color Palette 2_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP2_207B ,Color Palette 2_207 Blue" line.long 0x340 "CP2_208R,Color Palette 2 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP2_208A ,Color Palette 2_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP2_208R ,Color Palette 2_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP2_208G ,Color Palette 2_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP2_208B ,Color Palette 2_208 Blue" line.long 0x344 "CP2_209R,Color Palette 2 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP2_209A ,Color Palette 2_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP2_209R ,Color Palette 2_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP2_209G ,Color Palette 2_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP2_209B ,Color Palette 2_209 Blue" line.long 0x348 "CP2_210R,Color Palette 2 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP2_210A ,Color Palette 2_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP2_210R ,Color Palette 2_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP2_210G ,Color Palette 2_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP2_210B ,Color Palette 2_210 Blue" line.long 0x34C "CP2_211R,Color Palette 2 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP2_211A ,Color Palette 2_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP2_211R ,Color Palette 2_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP2_211G ,Color Palette 2_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP2_211B ,Color Palette 2_211 Blue" line.long 0x350 "CP2_212R,Color Palette 2 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP2_212A ,Color Palette 2_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP2_212R ,Color Palette 2_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP2_212G ,Color Palette 2_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP2_212B ,Color Palette 2_212 Blue" line.long 0x354 "CP2_213R,Color Palette 2 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP2_213A ,Color Palette 2_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP2_213R ,Color Palette 2_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP2_213G ,Color Palette 2_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP2_213B ,Color Palette 2_213 Blue" line.long 0x358 "CP2_214R,Color Palette 2 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP2_214A ,Color Palette 2_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP2_214R ,Color Palette 2_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP2_214G ,Color Palette 2_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP2_214B ,Color Palette 2_214 Blue" line.long 0x35C "CP2_215R,Color Palette 2 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP2_215A ,Color Palette 2_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP2_215R ,Color Palette 2_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP2_215G ,Color Palette 2_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP2_215B ,Color Palette 2_215 Blue" line.long 0x360 "CP2_216R,Color Palette 2 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP2_216A ,Color Palette 2_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP2_216R ,Color Palette 2_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP2_216G ,Color Palette 2_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP2_216B ,Color Palette 2_216 Blue" line.long 0x364 "CP2_217R,Color Palette 2 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP2_217A ,Color Palette 2_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP2_217R ,Color Palette 2_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP2_217G ,Color Palette 2_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP2_217B ,Color Palette 2_217 Blue" line.long 0x368 "CP2_218R,Color Palette 2 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP2_218A ,Color Palette 2_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP2_218R ,Color Palette 2_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP2_218G ,Color Palette 2_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP2_218B ,Color Palette 2_218 Blue" line.long 0x36C "CP2_219R,Color Palette 2 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP2_219A ,Color Palette 2_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP2_219R ,Color Palette 2_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP2_219G ,Color Palette 2_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP2_219B ,Color Palette 2_219 Blue" line.long 0x370 "CP2_220R,Color Palette 2 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP2_220A ,Color Palette 2_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP2_220R ,Color Palette 2_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP2_220G ,Color Palette 2_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP2_220B ,Color Palette 2_220 Blue" line.long 0x374 "CP2_221R,Color Palette 2 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP2_221A ,Color Palette 2_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP2_221R ,Color Palette 2_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP2_221G ,Color Palette 2_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP2_221B ,Color Palette 2_221 Blue" line.long 0x378 "CP2_222R,Color Palette 2 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP2_222A ,Color Palette 2_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP2_222R ,Color Palette 2_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP2_222G ,Color Palette 2_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP2_222B ,Color Palette 2_222 Blue" line.long 0x37C "CP2_223R,Color Palette 2 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP2_223A ,Color Palette 2_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP2_223R ,Color Palette 2_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP2_223G ,Color Palette 2_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP2_223B ,Color Palette 2_223 Blue" line.long 0x380 "CP2_224R,Color Palette 2 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP2_224A ,Color Palette 2_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP2_224R ,Color Palette 2_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP2_224G ,Color Palette 2_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP2_224B ,Color Palette 2_224 Blue" line.long 0x384 "CP2_225R,Color Palette 2 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP2_225A ,Color Palette 2_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP2_225R ,Color Palette 2_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP2_225G ,Color Palette 2_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP2_225B ,Color Palette 2_225 Blue" line.long 0x388 "CP2_226R,Color Palette 2 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP2_226A ,Color Palette 2_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP2_226R ,Color Palette 2_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP2_226G ,Color Palette 2_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP2_226B ,Color Palette 2_226 Blue" line.long 0x38C "CP2_227R,Color Palette 2 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP2_227A ,Color Palette 2_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP2_227R ,Color Palette 2_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP2_227G ,Color Palette 2_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP2_227B ,Color Palette 2_227 Blue" line.long 0x390 "CP2_228R,Color Palette 2 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP2_228A ,Color Palette 2_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP2_228R ,Color Palette 2_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP2_228G ,Color Palette 2_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP2_228B ,Color Palette 2_228 Blue" line.long 0x394 "CP2_229R,Color Palette 2 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP2_229A ,Color Palette 2_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP2_229R ,Color Palette 2_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP2_229G ,Color Palette 2_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP2_229B ,Color Palette 2_229 Blue" line.long 0x398 "CP2_230R,Color Palette 2 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP2_230A ,Color Palette 2_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP2_230R ,Color Palette 2_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP2_230G ,Color Palette 2_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP2_230B ,Color Palette 2_230 Blue" line.long 0x39C "CP2_231R,Color Palette 2 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP2_231A ,Color Palette 2_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP2_231R ,Color Palette 2_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP2_231G ,Color Palette 2_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP2_231B ,Color Palette 2_231 Blue" line.long 0x3A0 "CP2_232R,Color Palette 2 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP2_232A ,Color Palette 2_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP2_232R ,Color Palette 2_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP2_232G ,Color Palette 2_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP2_232B ,Color Palette 2_232 Blue" line.long 0x3A4 "CP2_233R,Color Palette 2 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP2_233A ,Color Palette 2_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP2_233R ,Color Palette 2_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP2_233G ,Color Palette 2_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP2_233B ,Color Palette 2_233 Blue" line.long 0x3A8 "CP2_234R,Color Palette 2 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP2_234A ,Color Palette 2_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP2_234R ,Color Palette 2_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP2_234G ,Color Palette 2_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP2_234B ,Color Palette 2_234 Blue" line.long 0x3AC "CP2_235R,Color Palette 2 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP2_235A ,Color Palette 2_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP2_235R ,Color Palette 2_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP2_235G ,Color Palette 2_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP2_235B ,Color Palette 2_235 Blue" line.long 0x3B0 "CP2_236R,Color Palette 2 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP2_236A ,Color Palette 2_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP2_236R ,Color Palette 2_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP2_236G ,Color Palette 2_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP2_236B ,Color Palette 2_236 Blue" line.long 0x3B4 "CP2_237R,Color Palette 2 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP2_237A ,Color Palette 2_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP2_237R ,Color Palette 2_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP2_237G ,Color Palette 2_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP2_237B ,Color Palette 2_237 Blue" line.long 0x3B8 "CP2_238R,Color Palette 2 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP2_238A ,Color Palette 2_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP2_238R ,Color Palette 2_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP2_238G ,Color Palette 2_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP2_238B ,Color Palette 2_238 Blue" line.long 0x3BC "CP2_239R,Color Palette 2 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP2_239A ,Color Palette 2_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP2_239R ,Color Palette 2_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP2_239G ,Color Palette 2_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP2_239B ,Color Palette 2_239 Blue" line.long 0x3C0 "CP2_240R,Color Palette 2 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP2_240A ,Color Palette 2_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP2_240R ,Color Palette 2_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP2_240G ,Color Palette 2_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP2_240B ,Color Palette 2_240 Blue" line.long 0x3C4 "CP2_241R,Color Palette 2 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP2_241A ,Color Palette 2_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP2_241R ,Color Palette 2_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP2_241G ,Color Palette 2_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP2_241B ,Color Palette 2_241 Blue" line.long 0x3C8 "CP2_242R,Color Palette 2 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP2_242A ,Color Palette 2_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP2_242R ,Color Palette 2_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP2_242G ,Color Palette 2_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP2_242B ,Color Palette 2_242 Blue" line.long 0x3CC "CP2_243R,Color Palette 2 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP2_243A ,Color Palette 2_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP2_243R ,Color Palette 2_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP2_243G ,Color Palette 2_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP2_243B ,Color Palette 2_243 Blue" line.long 0x3D0 "CP2_244R,Color Palette 2 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP2_244A ,Color Palette 2_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP2_244R ,Color Palette 2_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP2_244G ,Color Palette 2_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP2_244B ,Color Palette 2_244 Blue" line.long 0x3D4 "CP2_245R,Color Palette 2 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP2_245A ,Color Palette 2_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP2_245R ,Color Palette 2_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP2_245G ,Color Palette 2_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP2_245B ,Color Palette 2_245 Blue" line.long 0x3D8 "CP2_246R,Color Palette 2 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP2_246A ,Color Palette 2_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP2_246R ,Color Palette 2_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP2_246G ,Color Palette 2_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP2_246B ,Color Palette 2_246 Blue" line.long 0x3DC "CP2_247R,Color Palette 2 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP2_247A ,Color Palette 2_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP2_247R ,Color Palette 2_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP2_247G ,Color Palette 2_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP2_247B ,Color Palette 2_247 Blue" line.long 0x3E0 "CP2_248R,Color Palette 2 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP2_248A ,Color Palette 2_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP2_248R ,Color Palette 2_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP2_248G ,Color Palette 2_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP2_248B ,Color Palette 2_248 Blue" line.long 0x3E4 "CP2_249R,Color Palette 2 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP2_249A ,Color Palette 2_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP2_249R ,Color Palette 2_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP2_249G ,Color Palette 2_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP2_249B ,Color Palette 2_249 Blue" line.long 0x3E8 "CP2_250R,Color Palette 2 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP2_250A ,Color Palette 2_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP2_250R ,Color Palette 2_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP2_250G ,Color Palette 2_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP2_250B ,Color Palette 2_250 Blue" line.long 0x3EC "CP2_251R,Color Palette 2 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP2_251A ,Color Palette 2_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP2_251R ,Color Palette 2_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP2_251G ,Color Palette 2_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP2_251B ,Color Palette 2_251 Blue" line.long 0x3F0 "CP2_252R,Color Palette 2 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP2_252A ,Color Palette 2_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP2_252R ,Color Palette 2_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP2_252G ,Color Palette 2_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP2_252B ,Color Palette 2_252 Blue" line.long 0x3F4 "CP2_253R,Color Palette 2 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP2_253A ,Color Palette 2_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP2_253R ,Color Palette 2_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP2_253G ,Color Palette 2_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP2_253B ,Color Palette 2_253 Blue" line.long 0x3F8 "CP2_254R,Color Palette 2 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP2_254A ,Color Palette 2_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP2_254R ,Color Palette 2_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP2_254G ,Color Palette 2_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP2_254B ,Color Palette 2_254 Blue" line.long 0x3FC "CP2_255R,Color Palette 2 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP2_255A ,Color Palette 2_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP2_255R ,Color Palette 2_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP2_255G ,Color Palette 2_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP2_255B ,Color Palette 2_255 Blue" tree.end tree "Color Palette 3 Registers" width 10. group.long 0x3000++0x3ff line.long 0x0 "CP3_0R,Color Palette 3 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP3_0A ,Color Palette 3_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP3_0R ,Color Palette 3_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP3_0G ,Color Palette 3_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP3_0B ,Color Palette 3_0 Blue" line.long 0x4 "CP3_1R,Color Palette 3 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP3_1A ,Color Palette 3_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP3_1R ,Color Palette 3_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP3_1G ,Color Palette 3_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP3_1B ,Color Palette 3_1 Blue" line.long 0x8 "CP3_2R,Color Palette 3 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP3_2A ,Color Palette 3_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP3_2R ,Color Palette 3_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP3_2G ,Color Palette 3_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP3_2B ,Color Palette 3_2 Blue" line.long 0xC "CP3_3R,Color Palette 3 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP3_3A ,Color Palette 3_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP3_3R ,Color Palette 3_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP3_3G ,Color Palette 3_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP3_3B ,Color Palette 3_3 Blue" line.long 0x10 "CP3_4R,Color Palette 3 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP3_4A ,Color Palette 3_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP3_4R ,Color Palette 3_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP3_4G ,Color Palette 3_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP3_4B ,Color Palette 3_4 Blue" line.long 0x14 "CP3_5R,Color Palette 3 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP3_5A ,Color Palette 3_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP3_5R ,Color Palette 3_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP3_5G ,Color Palette 3_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP3_5B ,Color Palette 3_5 Blue" line.long 0x18 "CP3_6R,Color Palette 3 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP3_6A ,Color Palette 3_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP3_6R ,Color Palette 3_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP3_6G ,Color Palette 3_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP3_6B ,Color Palette 3_6 Blue" line.long 0x1C "CP3_7R,Color Palette 3 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP3_7A ,Color Palette 3_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP3_7R ,Color Palette 3_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP3_7G ,Color Palette 3_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP3_7B ,Color Palette 3_7 Blue" line.long 0x20 "CP3_8R,Color Palette 3 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP3_8A ,Color Palette 3_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP3_8R ,Color Palette 3_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP3_8G ,Color Palette 3_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP3_8B ,Color Palette 3_8 Blue" line.long 0x24 "CP3_9R,Color Palette 3 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP3_9A ,Color Palette 3_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP3_9R ,Color Palette 3_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP3_9G ,Color Palette 3_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP3_9B ,Color Palette 3_9 Blue" line.long 0x28 "CP3_10R,Color Palette 3 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP3_10A ,Color Palette 3_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP3_10R ,Color Palette 3_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP3_10G ,Color Palette 3_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP3_10B ,Color Palette 3_10 Blue" line.long 0x2C "CP3_11R,Color Palette 3 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP3_11A ,Color Palette 3_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP3_11R ,Color Palette 3_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP3_11G ,Color Palette 3_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP3_11B ,Color Palette 3_11 Blue" line.long 0x30 "CP3_12R,Color Palette 3 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP3_12A ,Color Palette 3_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP3_12R ,Color Palette 3_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP3_12G ,Color Palette 3_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP3_12B ,Color Palette 3_12 Blue" line.long 0x34 "CP3_13R,Color Palette 3 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP3_13A ,Color Palette 3_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP3_13R ,Color Palette 3_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP3_13G ,Color Palette 3_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP3_13B ,Color Palette 3_13 Blue" line.long 0x38 "CP3_14R,Color Palette 3 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP3_14A ,Color Palette 3_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP3_14R ,Color Palette 3_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP3_14G ,Color Palette 3_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP3_14B ,Color Palette 3_14 Blue" line.long 0x3C "CP3_15R,Color Palette 3 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP3_15A ,Color Palette 3_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP3_15R ,Color Palette 3_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP3_15G ,Color Palette 3_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP3_15B ,Color Palette 3_15 Blue" line.long 0x40 "CP3_16R,Color Palette 3 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP3_16A ,Color Palette 3_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP3_16R ,Color Palette 3_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP3_16G ,Color Palette 3_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP3_16B ,Color Palette 3_16 Blue" line.long 0x44 "CP3_17R,Color Palette 3 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP3_17A ,Color Palette 3_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP3_17R ,Color Palette 3_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP3_17G ,Color Palette 3_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP3_17B ,Color Palette 3_17 Blue" line.long 0x48 "CP3_18R,Color Palette 3 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP3_18A ,Color Palette 3_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP3_18R ,Color Palette 3_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP3_18G ,Color Palette 3_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP3_18B ,Color Palette 3_18 Blue" line.long 0x4C "CP3_19R,Color Palette 3 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP3_19A ,Color Palette 3_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP3_19R ,Color Palette 3_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP3_19G ,Color Palette 3_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP3_19B ,Color Palette 3_19 Blue" line.long 0x50 "CP3_20R,Color Palette 3 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP3_20A ,Color Palette 3_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP3_20R ,Color Palette 3_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP3_20G ,Color Palette 3_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP3_20B ,Color Palette 3_20 Blue" line.long 0x54 "CP3_21R,Color Palette 3 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP3_21A ,Color Palette 3_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP3_21R ,Color Palette 3_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP3_21G ,Color Palette 3_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP3_21B ,Color Palette 3_21 Blue" line.long 0x58 "CP3_22R,Color Palette 3 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP3_22A ,Color Palette 3_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP3_22R ,Color Palette 3_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP3_22G ,Color Palette 3_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP3_22B ,Color Palette 3_22 Blue" line.long 0x5C "CP3_23R,Color Palette 3 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP3_23A ,Color Palette 3_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP3_23R ,Color Palette 3_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP3_23G ,Color Palette 3_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP3_23B ,Color Palette 3_23 Blue" line.long 0x60 "CP3_24R,Color Palette 3 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP3_24A ,Color Palette 3_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP3_24R ,Color Palette 3_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP3_24G ,Color Palette 3_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP3_24B ,Color Palette 3_24 Blue" line.long 0x64 "CP3_25R,Color Palette 3 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP3_25A ,Color Palette 3_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP3_25R ,Color Palette 3_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP3_25G ,Color Palette 3_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP3_25B ,Color Palette 3_25 Blue" line.long 0x68 "CP3_26R,Color Palette 3 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP3_26A ,Color Palette 3_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP3_26R ,Color Palette 3_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP3_26G ,Color Palette 3_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP3_26B ,Color Palette 3_26 Blue" line.long 0x6C "CP3_27R,Color Palette 3 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP3_27A ,Color Palette 3_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP3_27R ,Color Palette 3_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP3_27G ,Color Palette 3_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP3_27B ,Color Palette 3_27 Blue" line.long 0x70 "CP3_28R,Color Palette 3 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP3_28A ,Color Palette 3_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP3_28R ,Color Palette 3_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP3_28G ,Color Palette 3_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP3_28B ,Color Palette 3_28 Blue" line.long 0x74 "CP3_29R,Color Palette 3 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP3_29A ,Color Palette 3_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP3_29R ,Color Palette 3_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP3_29G ,Color Palette 3_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP3_29B ,Color Palette 3_29 Blue" line.long 0x78 "CP3_30R,Color Palette 3 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP3_30A ,Color Palette 3_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP3_30R ,Color Palette 3_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP3_30G ,Color Palette 3_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP3_30B ,Color Palette 3_30 Blue" line.long 0x7C "CP3_31R,Color Palette 3 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP3_31A ,Color Palette 3_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP3_31R ,Color Palette 3_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP3_31G ,Color Palette 3_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP3_31B ,Color Palette 3_31 Blue" line.long 0x80 "CP3_32R,Color Palette 3 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP3_32A ,Color Palette 3_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP3_32R ,Color Palette 3_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP3_32G ,Color Palette 3_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP3_32B ,Color Palette 3_32 Blue" line.long 0x84 "CP3_33R,Color Palette 3 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP3_33A ,Color Palette 3_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP3_33R ,Color Palette 3_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP3_33G ,Color Palette 3_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP3_33B ,Color Palette 3_33 Blue" line.long 0x88 "CP3_34R,Color Palette 3 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP3_34A ,Color Palette 3_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP3_34R ,Color Palette 3_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP3_34G ,Color Palette 3_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP3_34B ,Color Palette 3_34 Blue" line.long 0x8C "CP3_35R,Color Palette 3 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP3_35A ,Color Palette 3_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP3_35R ,Color Palette 3_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP3_35G ,Color Palette 3_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP3_35B ,Color Palette 3_35 Blue" line.long 0x90 "CP3_36R,Color Palette 3 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP3_36A ,Color Palette 3_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP3_36R ,Color Palette 3_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP3_36G ,Color Palette 3_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP3_36B ,Color Palette 3_36 Blue" line.long 0x94 "CP3_37R,Color Palette 3 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP3_37A ,Color Palette 3_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP3_37R ,Color Palette 3_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP3_37G ,Color Palette 3_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP3_37B ,Color Palette 3_37 Blue" line.long 0x98 "CP3_38R,Color Palette 3 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP3_38A ,Color Palette 3_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP3_38R ,Color Palette 3_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP3_38G ,Color Palette 3_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP3_38B ,Color Palette 3_38 Blue" line.long 0x9C "CP3_39R,Color Palette 3 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP3_39A ,Color Palette 3_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP3_39R ,Color Palette 3_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP3_39G ,Color Palette 3_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP3_39B ,Color Palette 3_39 Blue" line.long 0xA0 "CP3_40R,Color Palette 3 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP3_40A ,Color Palette 3_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP3_40R ,Color Palette 3_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP3_40G ,Color Palette 3_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP3_40B ,Color Palette 3_40 Blue" line.long 0xA4 "CP3_41R,Color Palette 3 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP3_41A ,Color Palette 3_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP3_41R ,Color Palette 3_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP3_41G ,Color Palette 3_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP3_41B ,Color Palette 3_41 Blue" line.long 0xA8 "CP3_42R,Color Palette 3 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP3_42A ,Color Palette 3_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP3_42R ,Color Palette 3_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP3_42G ,Color Palette 3_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP3_42B ,Color Palette 3_42 Blue" line.long 0xAC "CP3_43R,Color Palette 3 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP3_43A ,Color Palette 3_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP3_43R ,Color Palette 3_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP3_43G ,Color Palette 3_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP3_43B ,Color Palette 3_43 Blue" line.long 0xB0 "CP3_44R,Color Palette 3 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP3_44A ,Color Palette 3_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP3_44R ,Color Palette 3_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP3_44G ,Color Palette 3_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP3_44B ,Color Palette 3_44 Blue" line.long 0xB4 "CP3_45R,Color Palette 3 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP3_45A ,Color Palette 3_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP3_45R ,Color Palette 3_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP3_45G ,Color Palette 3_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP3_45B ,Color Palette 3_45 Blue" line.long 0xB8 "CP3_46R,Color Palette 3 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP3_46A ,Color Palette 3_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP3_46R ,Color Palette 3_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP3_46G ,Color Palette 3_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP3_46B ,Color Palette 3_46 Blue" line.long 0xBC "CP3_47R,Color Palette 3 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP3_47A ,Color Palette 3_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP3_47R ,Color Palette 3_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP3_47G ,Color Palette 3_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP3_47B ,Color Palette 3_47 Blue" line.long 0xC0 "CP3_48R,Color Palette 3 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP3_48A ,Color Palette 3_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP3_48R ,Color Palette 3_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP3_48G ,Color Palette 3_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP3_48B ,Color Palette 3_48 Blue" line.long 0xC4 "CP3_49R,Color Palette 3 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP3_49A ,Color Palette 3_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP3_49R ,Color Palette 3_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP3_49G ,Color Palette 3_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP3_49B ,Color Palette 3_49 Blue" line.long 0xC8 "CP3_50R,Color Palette 3 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP3_50A ,Color Palette 3_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP3_50R ,Color Palette 3_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP3_50G ,Color Palette 3_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP3_50B ,Color Palette 3_50 Blue" line.long 0xCC "CP3_51R,Color Palette 3 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP3_51A ,Color Palette 3_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP3_51R ,Color Palette 3_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP3_51G ,Color Palette 3_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP3_51B ,Color Palette 3_51 Blue" line.long 0xD0 "CP3_52R,Color Palette 3 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP3_52A ,Color Palette 3_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP3_52R ,Color Palette 3_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP3_52G ,Color Palette 3_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP3_52B ,Color Palette 3_52 Blue" line.long 0xD4 "CP3_53R,Color Palette 3 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP3_53A ,Color Palette 3_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP3_53R ,Color Palette 3_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP3_53G ,Color Palette 3_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP3_53B ,Color Palette 3_53 Blue" line.long 0xD8 "CP3_54R,Color Palette 3 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP3_54A ,Color Palette 3_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP3_54R ,Color Palette 3_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP3_54G ,Color Palette 3_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP3_54B ,Color Palette 3_54 Blue" line.long 0xDC "CP3_55R,Color Palette 3 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP3_55A ,Color Palette 3_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP3_55R ,Color Palette 3_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP3_55G ,Color Palette 3_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP3_55B ,Color Palette 3_55 Blue" line.long 0xE0 "CP3_56R,Color Palette 3 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP3_56A ,Color Palette 3_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP3_56R ,Color Palette 3_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP3_56G ,Color Palette 3_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP3_56B ,Color Palette 3_56 Blue" line.long 0xE4 "CP3_57R,Color Palette 3 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP3_57A ,Color Palette 3_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP3_57R ,Color Palette 3_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP3_57G ,Color Palette 3_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP3_57B ,Color Palette 3_57 Blue" line.long 0xE8 "CP3_58R,Color Palette 3 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP3_58A ,Color Palette 3_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP3_58R ,Color Palette 3_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP3_58G ,Color Palette 3_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP3_58B ,Color Palette 3_58 Blue" line.long 0xEC "CP3_59R,Color Palette 3 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP3_59A ,Color Palette 3_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP3_59R ,Color Palette 3_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP3_59G ,Color Palette 3_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP3_59B ,Color Palette 3_59 Blue" line.long 0xF0 "CP3_60R,Color Palette 3 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP3_60A ,Color Palette 3_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP3_60R ,Color Palette 3_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP3_60G ,Color Palette 3_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP3_60B ,Color Palette 3_60 Blue" line.long 0xF4 "CP3_61R,Color Palette 3 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP3_61A ,Color Palette 3_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP3_61R ,Color Palette 3_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP3_61G ,Color Palette 3_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP3_61B ,Color Palette 3_61 Blue" line.long 0xF8 "CP3_62R,Color Palette 3 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP3_62A ,Color Palette 3_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP3_62R ,Color Palette 3_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP3_62G ,Color Palette 3_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP3_62B ,Color Palette 3_62 Blue" line.long 0xFC "CP3_63R,Color Palette 3 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP3_63A ,Color Palette 3_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP3_63R ,Color Palette 3_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP3_63G ,Color Palette 3_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP3_63B ,Color Palette 3_63 Blue" line.long 0x100 "CP3_64R,Color Palette 3 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP3_64A ,Color Palette 3_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP3_64R ,Color Palette 3_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP3_64G ,Color Palette 3_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP3_64B ,Color Palette 3_64 Blue" line.long 0x104 "CP3_65R,Color Palette 3 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP3_65A ,Color Palette 3_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP3_65R ,Color Palette 3_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP3_65G ,Color Palette 3_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP3_65B ,Color Palette 3_65 Blue" line.long 0x108 "CP3_66R,Color Palette 3 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP3_66A ,Color Palette 3_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP3_66R ,Color Palette 3_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP3_66G ,Color Palette 3_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP3_66B ,Color Palette 3_66 Blue" line.long 0x10C "CP3_67R,Color Palette 3 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP3_67A ,Color Palette 3_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP3_67R ,Color Palette 3_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP3_67G ,Color Palette 3_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP3_67B ,Color Palette 3_67 Blue" line.long 0x110 "CP3_68R,Color Palette 3 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP3_68A ,Color Palette 3_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP3_68R ,Color Palette 3_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP3_68G ,Color Palette 3_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP3_68B ,Color Palette 3_68 Blue" line.long 0x114 "CP3_69R,Color Palette 3 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP3_69A ,Color Palette 3_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP3_69R ,Color Palette 3_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP3_69G ,Color Palette 3_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP3_69B ,Color Palette 3_69 Blue" line.long 0x118 "CP3_70R,Color Palette 3 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP3_70A ,Color Palette 3_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP3_70R ,Color Palette 3_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP3_70G ,Color Palette 3_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP3_70B ,Color Palette 3_70 Blue" line.long 0x11C "CP3_71R,Color Palette 3 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP3_71A ,Color Palette 3_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP3_71R ,Color Palette 3_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP3_71G ,Color Palette 3_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP3_71B ,Color Palette 3_71 Blue" line.long 0x120 "CP3_72R,Color Palette 3 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP3_72A ,Color Palette 3_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP3_72R ,Color Palette 3_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP3_72G ,Color Palette 3_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP3_72B ,Color Palette 3_72 Blue" line.long 0x124 "CP3_73R,Color Palette 3 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP3_73A ,Color Palette 3_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP3_73R ,Color Palette 3_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP3_73G ,Color Palette 3_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP3_73B ,Color Palette 3_73 Blue" line.long 0x128 "CP3_74R,Color Palette 3 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP3_74A ,Color Palette 3_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP3_74R ,Color Palette 3_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP3_74G ,Color Palette 3_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP3_74B ,Color Palette 3_74 Blue" line.long 0x12C "CP3_75R,Color Palette 3 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP3_75A ,Color Palette 3_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP3_75R ,Color Palette 3_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP3_75G ,Color Palette 3_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP3_75B ,Color Palette 3_75 Blue" line.long 0x130 "CP3_76R,Color Palette 3 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP3_76A ,Color Palette 3_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP3_76R ,Color Palette 3_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP3_76G ,Color Palette 3_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP3_76B ,Color Palette 3_76 Blue" line.long 0x134 "CP3_77R,Color Palette 3 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP3_77A ,Color Palette 3_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP3_77R ,Color Palette 3_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP3_77G ,Color Palette 3_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP3_77B ,Color Palette 3_77 Blue" line.long 0x138 "CP3_78R,Color Palette 3 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP3_78A ,Color Palette 3_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP3_78R ,Color Palette 3_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP3_78G ,Color Palette 3_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP3_78B ,Color Palette 3_78 Blue" line.long 0x13C "CP3_79R,Color Palette 3 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP3_79A ,Color Palette 3_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP3_79R ,Color Palette 3_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP3_79G ,Color Palette 3_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP3_79B ,Color Palette 3_79 Blue" line.long 0x140 "CP3_80R,Color Palette 3 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP3_80A ,Color Palette 3_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP3_80R ,Color Palette 3_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP3_80G ,Color Palette 3_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP3_80B ,Color Palette 3_80 Blue" line.long 0x144 "CP3_81R,Color Palette 3 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP3_81A ,Color Palette 3_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP3_81R ,Color Palette 3_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP3_81G ,Color Palette 3_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP3_81B ,Color Palette 3_81 Blue" line.long 0x148 "CP3_82R,Color Palette 3 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP3_82A ,Color Palette 3_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP3_82R ,Color Palette 3_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP3_82G ,Color Palette 3_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP3_82B ,Color Palette 3_82 Blue" line.long 0x14C "CP3_83R,Color Palette 3 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP3_83A ,Color Palette 3_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP3_83R ,Color Palette 3_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP3_83G ,Color Palette 3_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP3_83B ,Color Palette 3_83 Blue" line.long 0x150 "CP3_84R,Color Palette 3 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP3_84A ,Color Palette 3_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP3_84R ,Color Palette 3_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP3_84G ,Color Palette 3_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP3_84B ,Color Palette 3_84 Blue" line.long 0x154 "CP3_85R,Color Palette 3 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP3_85A ,Color Palette 3_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP3_85R ,Color Palette 3_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP3_85G ,Color Palette 3_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP3_85B ,Color Palette 3_85 Blue" line.long 0x158 "CP3_86R,Color Palette 3 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP3_86A ,Color Palette 3_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP3_86R ,Color Palette 3_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP3_86G ,Color Palette 3_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP3_86B ,Color Palette 3_86 Blue" line.long 0x15C "CP3_87R,Color Palette 3 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP3_87A ,Color Palette 3_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP3_87R ,Color Palette 3_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP3_87G ,Color Palette 3_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP3_87B ,Color Palette 3_87 Blue" line.long 0x160 "CP3_88R,Color Palette 3 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP3_88A ,Color Palette 3_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP3_88R ,Color Palette 3_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP3_88G ,Color Palette 3_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP3_88B ,Color Palette 3_88 Blue" line.long 0x164 "CP3_89R,Color Palette 3 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP3_89A ,Color Palette 3_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP3_89R ,Color Palette 3_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP3_89G ,Color Palette 3_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP3_89B ,Color Palette 3_89 Blue" line.long 0x168 "CP3_90R,Color Palette 3 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP3_90A ,Color Palette 3_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP3_90R ,Color Palette 3_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP3_90G ,Color Palette 3_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP3_90B ,Color Palette 3_90 Blue" line.long 0x16C "CP3_91R,Color Palette 3 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP3_91A ,Color Palette 3_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP3_91R ,Color Palette 3_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP3_91G ,Color Palette 3_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP3_91B ,Color Palette 3_91 Blue" line.long 0x170 "CP3_92R,Color Palette 3 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP3_92A ,Color Palette 3_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP3_92R ,Color Palette 3_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP3_92G ,Color Palette 3_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP3_92B ,Color Palette 3_92 Blue" line.long 0x174 "CP3_93R,Color Palette 3 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP3_93A ,Color Palette 3_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP3_93R ,Color Palette 3_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP3_93G ,Color Palette 3_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP3_93B ,Color Palette 3_93 Blue" line.long 0x178 "CP3_94R,Color Palette 3 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP3_94A ,Color Palette 3_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP3_94R ,Color Palette 3_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP3_94G ,Color Palette 3_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP3_94B ,Color Palette 3_94 Blue" line.long 0x17C "CP3_95R,Color Palette 3 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP3_95A ,Color Palette 3_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP3_95R ,Color Palette 3_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP3_95G ,Color Palette 3_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP3_95B ,Color Palette 3_95 Blue" line.long 0x180 "CP3_96R,Color Palette 3 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP3_96A ,Color Palette 3_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP3_96R ,Color Palette 3_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP3_96G ,Color Palette 3_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP3_96B ,Color Palette 3_96 Blue" line.long 0x184 "CP3_97R,Color Palette 3 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP3_97A ,Color Palette 3_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP3_97R ,Color Palette 3_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP3_97G ,Color Palette 3_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP3_97B ,Color Palette 3_97 Blue" line.long 0x188 "CP3_98R,Color Palette 3 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP3_98A ,Color Palette 3_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP3_98R ,Color Palette 3_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP3_98G ,Color Palette 3_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP3_98B ,Color Palette 3_98 Blue" line.long 0x18C "CP3_99R,Color Palette 3 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP3_99A ,Color Palette 3_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP3_99R ,Color Palette 3_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP3_99G ,Color Palette 3_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP3_99B ,Color Palette 3_99 Blue" line.long 0x190 "CP3_100R,Color Palette 3 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP3_100A ,Color Palette 3_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP3_100R ,Color Palette 3_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP3_100G ,Color Palette 3_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP3_100B ,Color Palette 3_100 Blue" line.long 0x194 "CP3_101R,Color Palette 3 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP3_101A ,Color Palette 3_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP3_101R ,Color Palette 3_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP3_101G ,Color Palette 3_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP3_101B ,Color Palette 3_101 Blue" line.long 0x198 "CP3_102R,Color Palette 3 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP3_102A ,Color Palette 3_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP3_102R ,Color Palette 3_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP3_102G ,Color Palette 3_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP3_102B ,Color Palette 3_102 Blue" line.long 0x19C "CP3_103R,Color Palette 3 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP3_103A ,Color Palette 3_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP3_103R ,Color Palette 3_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP3_103G ,Color Palette 3_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP3_103B ,Color Palette 3_103 Blue" line.long 0x1A0 "CP3_104R,Color Palette 3 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP3_104A ,Color Palette 3_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP3_104R ,Color Palette 3_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP3_104G ,Color Palette 3_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP3_104B ,Color Palette 3_104 Blue" line.long 0x1A4 "CP3_105R,Color Palette 3 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP3_105A ,Color Palette 3_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP3_105R ,Color Palette 3_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP3_105G ,Color Palette 3_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP3_105B ,Color Palette 3_105 Blue" line.long 0x1A8 "CP3_106R,Color Palette 3 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP3_106A ,Color Palette 3_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP3_106R ,Color Palette 3_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP3_106G ,Color Palette 3_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP3_106B ,Color Palette 3_106 Blue" line.long 0x1AC "CP3_107R,Color Palette 3 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP3_107A ,Color Palette 3_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP3_107R ,Color Palette 3_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP3_107G ,Color Palette 3_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP3_107B ,Color Palette 3_107 Blue" line.long 0x1B0 "CP3_108R,Color Palette 3 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP3_108A ,Color Palette 3_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP3_108R ,Color Palette 3_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP3_108G ,Color Palette 3_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP3_108B ,Color Palette 3_108 Blue" line.long 0x1B4 "CP3_109R,Color Palette 3 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP3_109A ,Color Palette 3_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP3_109R ,Color Palette 3_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP3_109G ,Color Palette 3_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP3_109B ,Color Palette 3_109 Blue" line.long 0x1B8 "CP3_110R,Color Palette 3 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP3_110A ,Color Palette 3_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP3_110R ,Color Palette 3_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP3_110G ,Color Palette 3_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP3_110B ,Color Palette 3_110 Blue" line.long 0x1BC "CP3_111R,Color Palette 3 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP3_111A ,Color Palette 3_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP3_111R ,Color Palette 3_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP3_111G ,Color Palette 3_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP3_111B ,Color Palette 3_111 Blue" line.long 0x1C0 "CP3_112R,Color Palette 3 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP3_112A ,Color Palette 3_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP3_112R ,Color Palette 3_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP3_112G ,Color Palette 3_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP3_112B ,Color Palette 3_112 Blue" line.long 0x1C4 "CP3_113R,Color Palette 3 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP3_113A ,Color Palette 3_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP3_113R ,Color Palette 3_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP3_113G ,Color Palette 3_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP3_113B ,Color Palette 3_113 Blue" line.long 0x1C8 "CP3_114R,Color Palette 3 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP3_114A ,Color Palette 3_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP3_114R ,Color Palette 3_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP3_114G ,Color Palette 3_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP3_114B ,Color Palette 3_114 Blue" line.long 0x1CC "CP3_115R,Color Palette 3 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP3_115A ,Color Palette 3_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP3_115R ,Color Palette 3_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP3_115G ,Color Palette 3_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP3_115B ,Color Palette 3_115 Blue" line.long 0x1D0 "CP3_116R,Color Palette 3 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP3_116A ,Color Palette 3_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP3_116R ,Color Palette 3_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP3_116G ,Color Palette 3_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP3_116B ,Color Palette 3_116 Blue" line.long 0x1D4 "CP3_117R,Color Palette 3 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP3_117A ,Color Palette 3_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP3_117R ,Color Palette 3_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP3_117G ,Color Palette 3_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP3_117B ,Color Palette 3_117 Blue" line.long 0x1D8 "CP3_118R,Color Palette 3 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP3_118A ,Color Palette 3_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP3_118R ,Color Palette 3_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP3_118G ,Color Palette 3_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP3_118B ,Color Palette 3_118 Blue" line.long 0x1DC "CP3_119R,Color Palette 3 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP3_119A ,Color Palette 3_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP3_119R ,Color Palette 3_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP3_119G ,Color Palette 3_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP3_119B ,Color Palette 3_119 Blue" line.long 0x1E0 "CP3_120R,Color Palette 3 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP3_120A ,Color Palette 3_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP3_120R ,Color Palette 3_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP3_120G ,Color Palette 3_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP3_120B ,Color Palette 3_120 Blue" line.long 0x1E4 "CP3_121R,Color Palette 3 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP3_121A ,Color Palette 3_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP3_121R ,Color Palette 3_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP3_121G ,Color Palette 3_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP3_121B ,Color Palette 3_121 Blue" line.long 0x1E8 "CP3_122R,Color Palette 3 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP3_122A ,Color Palette 3_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP3_122R ,Color Palette 3_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP3_122G ,Color Palette 3_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP3_122B ,Color Palette 3_122 Blue" line.long 0x1EC "CP3_123R,Color Palette 3 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP3_123A ,Color Palette 3_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP3_123R ,Color Palette 3_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP3_123G ,Color Palette 3_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP3_123B ,Color Palette 3_123 Blue" line.long 0x1F0 "CP3_124R,Color Palette 3 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP3_124A ,Color Palette 3_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP3_124R ,Color Palette 3_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP3_124G ,Color Palette 3_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP3_124B ,Color Palette 3_124 Blue" line.long 0x1F4 "CP3_125R,Color Palette 3 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP3_125A ,Color Palette 3_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP3_125R ,Color Palette 3_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP3_125G ,Color Palette 3_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP3_125B ,Color Palette 3_125 Blue" line.long 0x1F8 "CP3_126R,Color Palette 3 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP3_126A ,Color Palette 3_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP3_126R ,Color Palette 3_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP3_126G ,Color Palette 3_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP3_126B ,Color Palette 3_126 Blue" line.long 0x1FC "CP3_127R,Color Palette 3 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP3_127A ,Color Palette 3_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP3_127R ,Color Palette 3_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP3_127G ,Color Palette 3_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP3_127B ,Color Palette 3_127 Blue" line.long 0x200 "CP3_128R,Color Palette 3 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP3_128A ,Color Palette 3_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP3_128R ,Color Palette 3_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP3_128G ,Color Palette 3_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP3_128B ,Color Palette 3_128 Blue" line.long 0x204 "CP3_129R,Color Palette 3 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP3_129A ,Color Palette 3_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP3_129R ,Color Palette 3_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP3_129G ,Color Palette 3_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP3_129B ,Color Palette 3_129 Blue" line.long 0x208 "CP3_130R,Color Palette 3 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP3_130A ,Color Palette 3_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP3_130R ,Color Palette 3_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP3_130G ,Color Palette 3_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP3_130B ,Color Palette 3_130 Blue" line.long 0x20C "CP3_131R,Color Palette 3 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP3_131A ,Color Palette 3_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP3_131R ,Color Palette 3_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP3_131G ,Color Palette 3_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP3_131B ,Color Palette 3_131 Blue" line.long 0x210 "CP3_132R,Color Palette 3 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP3_132A ,Color Palette 3_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP3_132R ,Color Palette 3_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP3_132G ,Color Palette 3_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP3_132B ,Color Palette 3_132 Blue" line.long 0x214 "CP3_133R,Color Palette 3 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP3_133A ,Color Palette 3_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP3_133R ,Color Palette 3_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP3_133G ,Color Palette 3_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP3_133B ,Color Palette 3_133 Blue" line.long 0x218 "CP3_134R,Color Palette 3 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP3_134A ,Color Palette 3_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP3_134R ,Color Palette 3_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP3_134G ,Color Palette 3_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP3_134B ,Color Palette 3_134 Blue" line.long 0x21C "CP3_135R,Color Palette 3 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP3_135A ,Color Palette 3_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP3_135R ,Color Palette 3_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP3_135G ,Color Palette 3_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP3_135B ,Color Palette 3_135 Blue" line.long 0x220 "CP3_136R,Color Palette 3 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP3_136A ,Color Palette 3_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP3_136R ,Color Palette 3_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP3_136G ,Color Palette 3_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP3_136B ,Color Palette 3_136 Blue" line.long 0x224 "CP3_137R,Color Palette 3 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP3_137A ,Color Palette 3_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP3_137R ,Color Palette 3_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP3_137G ,Color Palette 3_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP3_137B ,Color Palette 3_137 Blue" line.long 0x228 "CP3_138R,Color Palette 3 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP3_138A ,Color Palette 3_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP3_138R ,Color Palette 3_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP3_138G ,Color Palette 3_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP3_138B ,Color Palette 3_138 Blue" line.long 0x22C "CP3_139R,Color Palette 3 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP3_139A ,Color Palette 3_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP3_139R ,Color Palette 3_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP3_139G ,Color Palette 3_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP3_139B ,Color Palette 3_139 Blue" line.long 0x230 "CP3_140R,Color Palette 3 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP3_140A ,Color Palette 3_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP3_140R ,Color Palette 3_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP3_140G ,Color Palette 3_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP3_140B ,Color Palette 3_140 Blue" line.long 0x234 "CP3_141R,Color Palette 3 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP3_141A ,Color Palette 3_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP3_141R ,Color Palette 3_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP3_141G ,Color Palette 3_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP3_141B ,Color Palette 3_141 Blue" line.long 0x238 "CP3_142R,Color Palette 3 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP3_142A ,Color Palette 3_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP3_142R ,Color Palette 3_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP3_142G ,Color Palette 3_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP3_142B ,Color Palette 3_142 Blue" line.long 0x23C "CP3_143R,Color Palette 3 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP3_143A ,Color Palette 3_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP3_143R ,Color Palette 3_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP3_143G ,Color Palette 3_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP3_143B ,Color Palette 3_143 Blue" line.long 0x240 "CP3_144R,Color Palette 3 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP3_144A ,Color Palette 3_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP3_144R ,Color Palette 3_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP3_144G ,Color Palette 3_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP3_144B ,Color Palette 3_144 Blue" line.long 0x244 "CP3_145R,Color Palette 3 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP3_145A ,Color Palette 3_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP3_145R ,Color Palette 3_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP3_145G ,Color Palette 3_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP3_145B ,Color Palette 3_145 Blue" line.long 0x248 "CP3_146R,Color Palette 3 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP3_146A ,Color Palette 3_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP3_146R ,Color Palette 3_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP3_146G ,Color Palette 3_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP3_146B ,Color Palette 3_146 Blue" line.long 0x24C "CP3_147R,Color Palette 3 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP3_147A ,Color Palette 3_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP3_147R ,Color Palette 3_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP3_147G ,Color Palette 3_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP3_147B ,Color Palette 3_147 Blue" line.long 0x250 "CP3_148R,Color Palette 3 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP3_148A ,Color Palette 3_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP3_148R ,Color Palette 3_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP3_148G ,Color Palette 3_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP3_148B ,Color Palette 3_148 Blue" line.long 0x254 "CP3_149R,Color Palette 3 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP3_149A ,Color Palette 3_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP3_149R ,Color Palette 3_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP3_149G ,Color Palette 3_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP3_149B ,Color Palette 3_149 Blue" line.long 0x258 "CP3_150R,Color Palette 3 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP3_150A ,Color Palette 3_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP3_150R ,Color Palette 3_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP3_150G ,Color Palette 3_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP3_150B ,Color Palette 3_150 Blue" line.long 0x25C "CP3_151R,Color Palette 3 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP3_151A ,Color Palette 3_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP3_151R ,Color Palette 3_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP3_151G ,Color Palette 3_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP3_151B ,Color Palette 3_151 Blue" line.long 0x260 "CP3_152R,Color Palette 3 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP3_152A ,Color Palette 3_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP3_152R ,Color Palette 3_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP3_152G ,Color Palette 3_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP3_152B ,Color Palette 3_152 Blue" line.long 0x264 "CP3_153R,Color Palette 3 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP3_153A ,Color Palette 3_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP3_153R ,Color Palette 3_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP3_153G ,Color Palette 3_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP3_153B ,Color Palette 3_153 Blue" line.long 0x268 "CP3_154R,Color Palette 3 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP3_154A ,Color Palette 3_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP3_154R ,Color Palette 3_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP3_154G ,Color Palette 3_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP3_154B ,Color Palette 3_154 Blue" line.long 0x26C "CP3_155R,Color Palette 3 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP3_155A ,Color Palette 3_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP3_155R ,Color Palette 3_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP3_155G ,Color Palette 3_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP3_155B ,Color Palette 3_155 Blue" line.long 0x270 "CP3_156R,Color Palette 3 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP3_156A ,Color Palette 3_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP3_156R ,Color Palette 3_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP3_156G ,Color Palette 3_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP3_156B ,Color Palette 3_156 Blue" line.long 0x274 "CP3_157R,Color Palette 3 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP3_157A ,Color Palette 3_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP3_157R ,Color Palette 3_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP3_157G ,Color Palette 3_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP3_157B ,Color Palette 3_157 Blue" line.long 0x278 "CP3_158R,Color Palette 3 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP3_158A ,Color Palette 3_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP3_158R ,Color Palette 3_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP3_158G ,Color Palette 3_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP3_158B ,Color Palette 3_158 Blue" line.long 0x27C "CP3_159R,Color Palette 3 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP3_159A ,Color Palette 3_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP3_159R ,Color Palette 3_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP3_159G ,Color Palette 3_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP3_159B ,Color Palette 3_159 Blue" line.long 0x280 "CP3_160R,Color Palette 3 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP3_160A ,Color Palette 3_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP3_160R ,Color Palette 3_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP3_160G ,Color Palette 3_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP3_160B ,Color Palette 3_160 Blue" line.long 0x284 "CP3_161R,Color Palette 3 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP3_161A ,Color Palette 3_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP3_161R ,Color Palette 3_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP3_161G ,Color Palette 3_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP3_161B ,Color Palette 3_161 Blue" line.long 0x288 "CP3_162R,Color Palette 3 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP3_162A ,Color Palette 3_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP3_162R ,Color Palette 3_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP3_162G ,Color Palette 3_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP3_162B ,Color Palette 3_162 Blue" line.long 0x28C "CP3_163R,Color Palette 3 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP3_163A ,Color Palette 3_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP3_163R ,Color Palette 3_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP3_163G ,Color Palette 3_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP3_163B ,Color Palette 3_163 Blue" line.long 0x290 "CP3_164R,Color Palette 3 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP3_164A ,Color Palette 3_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP3_164R ,Color Palette 3_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP3_164G ,Color Palette 3_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP3_164B ,Color Palette 3_164 Blue" line.long 0x294 "CP3_165R,Color Palette 3 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP3_165A ,Color Palette 3_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP3_165R ,Color Palette 3_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP3_165G ,Color Palette 3_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP3_165B ,Color Palette 3_165 Blue" line.long 0x298 "CP3_166R,Color Palette 3 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP3_166A ,Color Palette 3_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP3_166R ,Color Palette 3_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP3_166G ,Color Palette 3_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP3_166B ,Color Palette 3_166 Blue" line.long 0x29C "CP3_167R,Color Palette 3 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP3_167A ,Color Palette 3_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP3_167R ,Color Palette 3_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP3_167G ,Color Palette 3_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP3_167B ,Color Palette 3_167 Blue" line.long 0x2A0 "CP3_168R,Color Palette 3 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP3_168A ,Color Palette 3_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP3_168R ,Color Palette 3_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP3_168G ,Color Palette 3_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP3_168B ,Color Palette 3_168 Blue" line.long 0x2A4 "CP3_169R,Color Palette 3 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP3_169A ,Color Palette 3_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP3_169R ,Color Palette 3_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP3_169G ,Color Palette 3_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP3_169B ,Color Palette 3_169 Blue" line.long 0x2A8 "CP3_170R,Color Palette 3 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP3_170A ,Color Palette 3_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP3_170R ,Color Palette 3_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP3_170G ,Color Palette 3_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP3_170B ,Color Palette 3_170 Blue" line.long 0x2AC "CP3_171R,Color Palette 3 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP3_171A ,Color Palette 3_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP3_171R ,Color Palette 3_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP3_171G ,Color Palette 3_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP3_171B ,Color Palette 3_171 Blue" line.long 0x2B0 "CP3_172R,Color Palette 3 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP3_172A ,Color Palette 3_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP3_172R ,Color Palette 3_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP3_172G ,Color Palette 3_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP3_172B ,Color Palette 3_172 Blue" line.long 0x2B4 "CP3_173R,Color Palette 3 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP3_173A ,Color Palette 3_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP3_173R ,Color Palette 3_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP3_173G ,Color Palette 3_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP3_173B ,Color Palette 3_173 Blue" line.long 0x2B8 "CP3_174R,Color Palette 3 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP3_174A ,Color Palette 3_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP3_174R ,Color Palette 3_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP3_174G ,Color Palette 3_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP3_174B ,Color Palette 3_174 Blue" line.long 0x2BC "CP3_175R,Color Palette 3 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP3_175A ,Color Palette 3_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP3_175R ,Color Palette 3_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP3_175G ,Color Palette 3_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP3_175B ,Color Palette 3_175 Blue" line.long 0x2C0 "CP3_176R,Color Palette 3 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP3_176A ,Color Palette 3_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP3_176R ,Color Palette 3_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP3_176G ,Color Palette 3_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP3_176B ,Color Palette 3_176 Blue" line.long 0x2C4 "CP3_177R,Color Palette 3 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP3_177A ,Color Palette 3_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP3_177R ,Color Palette 3_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP3_177G ,Color Palette 3_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP3_177B ,Color Palette 3_177 Blue" line.long 0x2C8 "CP3_178R,Color Palette 3 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP3_178A ,Color Palette 3_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP3_178R ,Color Palette 3_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP3_178G ,Color Palette 3_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP3_178B ,Color Palette 3_178 Blue" line.long 0x2CC "CP3_179R,Color Palette 3 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP3_179A ,Color Palette 3_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP3_179R ,Color Palette 3_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP3_179G ,Color Palette 3_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP3_179B ,Color Palette 3_179 Blue" line.long 0x2D0 "CP3_180R,Color Palette 3 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP3_180A ,Color Palette 3_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP3_180R ,Color Palette 3_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP3_180G ,Color Palette 3_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP3_180B ,Color Palette 3_180 Blue" line.long 0x2D4 "CP3_181R,Color Palette 3 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP3_181A ,Color Palette 3_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP3_181R ,Color Palette 3_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP3_181G ,Color Palette 3_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP3_181B ,Color Palette 3_181 Blue" line.long 0x2D8 "CP3_182R,Color Palette 3 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP3_182A ,Color Palette 3_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP3_182R ,Color Palette 3_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP3_182G ,Color Palette 3_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP3_182B ,Color Palette 3_182 Blue" line.long 0x2DC "CP3_183R,Color Palette 3 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP3_183A ,Color Palette 3_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP3_183R ,Color Palette 3_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP3_183G ,Color Palette 3_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP3_183B ,Color Palette 3_183 Blue" line.long 0x2E0 "CP3_184R,Color Palette 3 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP3_184A ,Color Palette 3_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP3_184R ,Color Palette 3_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP3_184G ,Color Palette 3_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP3_184B ,Color Palette 3_184 Blue" line.long 0x2E4 "CP3_185R,Color Palette 3 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP3_185A ,Color Palette 3_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP3_185R ,Color Palette 3_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP3_185G ,Color Palette 3_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP3_185B ,Color Palette 3_185 Blue" line.long 0x2E8 "CP3_186R,Color Palette 3 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP3_186A ,Color Palette 3_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP3_186R ,Color Palette 3_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP3_186G ,Color Palette 3_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP3_186B ,Color Palette 3_186 Blue" line.long 0x2EC "CP3_187R,Color Palette 3 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP3_187A ,Color Palette 3_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP3_187R ,Color Palette 3_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP3_187G ,Color Palette 3_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP3_187B ,Color Palette 3_187 Blue" line.long 0x2F0 "CP3_188R,Color Palette 3 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP3_188A ,Color Palette 3_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP3_188R ,Color Palette 3_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP3_188G ,Color Palette 3_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP3_188B ,Color Palette 3_188 Blue" line.long 0x2F4 "CP3_189R,Color Palette 3 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP3_189A ,Color Palette 3_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP3_189R ,Color Palette 3_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP3_189G ,Color Palette 3_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP3_189B ,Color Palette 3_189 Blue" line.long 0x2F8 "CP3_190R,Color Palette 3 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP3_190A ,Color Palette 3_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP3_190R ,Color Palette 3_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP3_190G ,Color Palette 3_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP3_190B ,Color Palette 3_190 Blue" line.long 0x2FC "CP3_191R,Color Palette 3 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP3_191A ,Color Palette 3_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP3_191R ,Color Palette 3_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP3_191G ,Color Palette 3_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP3_191B ,Color Palette 3_191 Blue" line.long 0x300 "CP3_192R,Color Palette 3 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP3_192A ,Color Palette 3_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP3_192R ,Color Palette 3_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP3_192G ,Color Palette 3_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP3_192B ,Color Palette 3_192 Blue" line.long 0x304 "CP3_193R,Color Palette 3 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP3_193A ,Color Palette 3_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP3_193R ,Color Palette 3_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP3_193G ,Color Palette 3_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP3_193B ,Color Palette 3_193 Blue" line.long 0x308 "CP3_194R,Color Palette 3 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP3_194A ,Color Palette 3_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP3_194R ,Color Palette 3_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP3_194G ,Color Palette 3_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP3_194B ,Color Palette 3_194 Blue" line.long 0x30C "CP3_195R,Color Palette 3 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP3_195A ,Color Palette 3_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP3_195R ,Color Palette 3_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP3_195G ,Color Palette 3_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP3_195B ,Color Palette 3_195 Blue" line.long 0x310 "CP3_196R,Color Palette 3 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP3_196A ,Color Palette 3_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP3_196R ,Color Palette 3_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP3_196G ,Color Palette 3_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP3_196B ,Color Palette 3_196 Blue" line.long 0x314 "CP3_197R,Color Palette 3 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP3_197A ,Color Palette 3_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP3_197R ,Color Palette 3_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP3_197G ,Color Palette 3_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP3_197B ,Color Palette 3_197 Blue" line.long 0x318 "CP3_198R,Color Palette 3 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP3_198A ,Color Palette 3_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP3_198R ,Color Palette 3_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP3_198G ,Color Palette 3_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP3_198B ,Color Palette 3_198 Blue" line.long 0x31C "CP3_199R,Color Palette 3 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP3_199A ,Color Palette 3_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP3_199R ,Color Palette 3_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP3_199G ,Color Palette 3_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP3_199B ,Color Palette 3_199 Blue" line.long 0x320 "CP3_200R,Color Palette 3 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP3_200A ,Color Palette 3_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP3_200R ,Color Palette 3_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP3_200G ,Color Palette 3_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP3_200B ,Color Palette 3_200 Blue" line.long 0x324 "CP3_201R,Color Palette 3 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP3_201A ,Color Palette 3_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP3_201R ,Color Palette 3_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP3_201G ,Color Palette 3_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP3_201B ,Color Palette 3_201 Blue" line.long 0x328 "CP3_202R,Color Palette 3 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP3_202A ,Color Palette 3_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP3_202R ,Color Palette 3_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP3_202G ,Color Palette 3_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP3_202B ,Color Palette 3_202 Blue" line.long 0x32C "CP3_203R,Color Palette 3 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP3_203A ,Color Palette 3_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP3_203R ,Color Palette 3_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP3_203G ,Color Palette 3_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP3_203B ,Color Palette 3_203 Blue" line.long 0x330 "CP3_204R,Color Palette 3 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP3_204A ,Color Palette 3_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP3_204R ,Color Palette 3_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP3_204G ,Color Palette 3_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP3_204B ,Color Palette 3_204 Blue" line.long 0x334 "CP3_205R,Color Palette 3 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP3_205A ,Color Palette 3_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP3_205R ,Color Palette 3_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP3_205G ,Color Palette 3_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP3_205B ,Color Palette 3_205 Blue" line.long 0x338 "CP3_206R,Color Palette 3 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP3_206A ,Color Palette 3_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP3_206R ,Color Palette 3_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP3_206G ,Color Palette 3_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP3_206B ,Color Palette 3_206 Blue" line.long 0x33C "CP3_207R,Color Palette 3 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP3_207A ,Color Palette 3_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP3_207R ,Color Palette 3_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP3_207G ,Color Palette 3_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP3_207B ,Color Palette 3_207 Blue" line.long 0x340 "CP3_208R,Color Palette 3 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP3_208A ,Color Palette 3_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP3_208R ,Color Palette 3_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP3_208G ,Color Palette 3_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP3_208B ,Color Palette 3_208 Blue" line.long 0x344 "CP3_209R,Color Palette 3 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP3_209A ,Color Palette 3_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP3_209R ,Color Palette 3_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP3_209G ,Color Palette 3_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP3_209B ,Color Palette 3_209 Blue" line.long 0x348 "CP3_210R,Color Palette 3 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP3_210A ,Color Palette 3_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP3_210R ,Color Palette 3_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP3_210G ,Color Palette 3_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP3_210B ,Color Palette 3_210 Blue" line.long 0x34C "CP3_211R,Color Palette 3 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP3_211A ,Color Palette 3_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP3_211R ,Color Palette 3_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP3_211G ,Color Palette 3_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP3_211B ,Color Palette 3_211 Blue" line.long 0x350 "CP3_212R,Color Palette 3 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP3_212A ,Color Palette 3_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP3_212R ,Color Palette 3_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP3_212G ,Color Palette 3_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP3_212B ,Color Palette 3_212 Blue" line.long 0x354 "CP3_213R,Color Palette 3 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP3_213A ,Color Palette 3_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP3_213R ,Color Palette 3_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP3_213G ,Color Palette 3_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP3_213B ,Color Palette 3_213 Blue" line.long 0x358 "CP3_214R,Color Palette 3 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP3_214A ,Color Palette 3_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP3_214R ,Color Palette 3_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP3_214G ,Color Palette 3_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP3_214B ,Color Palette 3_214 Blue" line.long 0x35C "CP3_215R,Color Palette 3 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP3_215A ,Color Palette 3_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP3_215R ,Color Palette 3_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP3_215G ,Color Palette 3_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP3_215B ,Color Palette 3_215 Blue" line.long 0x360 "CP3_216R,Color Palette 3 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP3_216A ,Color Palette 3_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP3_216R ,Color Palette 3_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP3_216G ,Color Palette 3_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP3_216B ,Color Palette 3_216 Blue" line.long 0x364 "CP3_217R,Color Palette 3 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP3_217A ,Color Palette 3_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP3_217R ,Color Palette 3_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP3_217G ,Color Palette 3_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP3_217B ,Color Palette 3_217 Blue" line.long 0x368 "CP3_218R,Color Palette 3 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP3_218A ,Color Palette 3_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP3_218R ,Color Palette 3_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP3_218G ,Color Palette 3_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP3_218B ,Color Palette 3_218 Blue" line.long 0x36C "CP3_219R,Color Palette 3 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP3_219A ,Color Palette 3_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP3_219R ,Color Palette 3_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP3_219G ,Color Palette 3_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP3_219B ,Color Palette 3_219 Blue" line.long 0x370 "CP3_220R,Color Palette 3 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP3_220A ,Color Palette 3_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP3_220R ,Color Palette 3_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP3_220G ,Color Palette 3_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP3_220B ,Color Palette 3_220 Blue" line.long 0x374 "CP3_221R,Color Palette 3 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP3_221A ,Color Palette 3_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP3_221R ,Color Palette 3_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP3_221G ,Color Palette 3_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP3_221B ,Color Palette 3_221 Blue" line.long 0x378 "CP3_222R,Color Palette 3 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP3_222A ,Color Palette 3_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP3_222R ,Color Palette 3_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP3_222G ,Color Palette 3_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP3_222B ,Color Palette 3_222 Blue" line.long 0x37C "CP3_223R,Color Palette 3 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP3_223A ,Color Palette 3_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP3_223R ,Color Palette 3_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP3_223G ,Color Palette 3_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP3_223B ,Color Palette 3_223 Blue" line.long 0x380 "CP3_224R,Color Palette 3 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP3_224A ,Color Palette 3_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP3_224R ,Color Palette 3_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP3_224G ,Color Palette 3_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP3_224B ,Color Palette 3_224 Blue" line.long 0x384 "CP3_225R,Color Palette 3 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP3_225A ,Color Palette 3_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP3_225R ,Color Palette 3_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP3_225G ,Color Palette 3_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP3_225B ,Color Palette 3_225 Blue" line.long 0x388 "CP3_226R,Color Palette 3 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP3_226A ,Color Palette 3_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP3_226R ,Color Palette 3_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP3_226G ,Color Palette 3_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP3_226B ,Color Palette 3_226 Blue" line.long 0x38C "CP3_227R,Color Palette 3 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP3_227A ,Color Palette 3_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP3_227R ,Color Palette 3_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP3_227G ,Color Palette 3_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP3_227B ,Color Palette 3_227 Blue" line.long 0x390 "CP3_228R,Color Palette 3 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP3_228A ,Color Palette 3_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP3_228R ,Color Palette 3_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP3_228G ,Color Palette 3_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP3_228B ,Color Palette 3_228 Blue" line.long 0x394 "CP3_229R,Color Palette 3 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP3_229A ,Color Palette 3_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP3_229R ,Color Palette 3_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP3_229G ,Color Palette 3_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP3_229B ,Color Palette 3_229 Blue" line.long 0x398 "CP3_230R,Color Palette 3 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP3_230A ,Color Palette 3_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP3_230R ,Color Palette 3_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP3_230G ,Color Palette 3_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP3_230B ,Color Palette 3_230 Blue" line.long 0x39C "CP3_231R,Color Palette 3 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP3_231A ,Color Palette 3_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP3_231R ,Color Palette 3_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP3_231G ,Color Palette 3_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP3_231B ,Color Palette 3_231 Blue" line.long 0x3A0 "CP3_232R,Color Palette 3 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP3_232A ,Color Palette 3_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP3_232R ,Color Palette 3_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP3_232G ,Color Palette 3_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP3_232B ,Color Palette 3_232 Blue" line.long 0x3A4 "CP3_233R,Color Palette 3 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP3_233A ,Color Palette 3_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP3_233R ,Color Palette 3_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP3_233G ,Color Palette 3_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP3_233B ,Color Palette 3_233 Blue" line.long 0x3A8 "CP3_234R,Color Palette 3 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP3_234A ,Color Palette 3_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP3_234R ,Color Palette 3_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP3_234G ,Color Palette 3_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP3_234B ,Color Palette 3_234 Blue" line.long 0x3AC "CP3_235R,Color Palette 3 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP3_235A ,Color Palette 3_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP3_235R ,Color Palette 3_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP3_235G ,Color Palette 3_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP3_235B ,Color Palette 3_235 Blue" line.long 0x3B0 "CP3_236R,Color Palette 3 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP3_236A ,Color Palette 3_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP3_236R ,Color Palette 3_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP3_236G ,Color Palette 3_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP3_236B ,Color Palette 3_236 Blue" line.long 0x3B4 "CP3_237R,Color Palette 3 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP3_237A ,Color Palette 3_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP3_237R ,Color Palette 3_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP3_237G ,Color Palette 3_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP3_237B ,Color Palette 3_237 Blue" line.long 0x3B8 "CP3_238R,Color Palette 3 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP3_238A ,Color Palette 3_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP3_238R ,Color Palette 3_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP3_238G ,Color Palette 3_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP3_238B ,Color Palette 3_238 Blue" line.long 0x3BC "CP3_239R,Color Palette 3 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP3_239A ,Color Palette 3_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP3_239R ,Color Palette 3_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP3_239G ,Color Palette 3_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP3_239B ,Color Palette 3_239 Blue" line.long 0x3C0 "CP3_240R,Color Palette 3 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP3_240A ,Color Palette 3_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP3_240R ,Color Palette 3_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP3_240G ,Color Palette 3_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP3_240B ,Color Palette 3_240 Blue" line.long 0x3C4 "CP3_241R,Color Palette 3 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP3_241A ,Color Palette 3_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP3_241R ,Color Palette 3_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP3_241G ,Color Palette 3_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP3_241B ,Color Palette 3_241 Blue" line.long 0x3C8 "CP3_242R,Color Palette 3 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP3_242A ,Color Palette 3_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP3_242R ,Color Palette 3_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP3_242G ,Color Palette 3_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP3_242B ,Color Palette 3_242 Blue" line.long 0x3CC "CP3_243R,Color Palette 3 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP3_243A ,Color Palette 3_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP3_243R ,Color Palette 3_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP3_243G ,Color Palette 3_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP3_243B ,Color Palette 3_243 Blue" line.long 0x3D0 "CP3_244R,Color Palette 3 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP3_244A ,Color Palette 3_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP3_244R ,Color Palette 3_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP3_244G ,Color Palette 3_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP3_244B ,Color Palette 3_244 Blue" line.long 0x3D4 "CP3_245R,Color Palette 3 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP3_245A ,Color Palette 3_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP3_245R ,Color Palette 3_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP3_245G ,Color Palette 3_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP3_245B ,Color Palette 3_245 Blue" line.long 0x3D8 "CP3_246R,Color Palette 3 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP3_246A ,Color Palette 3_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP3_246R ,Color Palette 3_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP3_246G ,Color Palette 3_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP3_246B ,Color Palette 3_246 Blue" line.long 0x3DC "CP3_247R,Color Palette 3 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP3_247A ,Color Palette 3_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP3_247R ,Color Palette 3_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP3_247G ,Color Palette 3_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP3_247B ,Color Palette 3_247 Blue" line.long 0x3E0 "CP3_248R,Color Palette 3 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP3_248A ,Color Palette 3_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP3_248R ,Color Palette 3_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP3_248G ,Color Palette 3_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP3_248B ,Color Palette 3_248 Blue" line.long 0x3E4 "CP3_249R,Color Palette 3 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP3_249A ,Color Palette 3_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP3_249R ,Color Palette 3_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP3_249G ,Color Palette 3_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP3_249B ,Color Palette 3_249 Blue" line.long 0x3E8 "CP3_250R,Color Palette 3 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP3_250A ,Color Palette 3_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP3_250R ,Color Palette 3_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP3_250G ,Color Palette 3_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP3_250B ,Color Palette 3_250 Blue" line.long 0x3EC "CP3_251R,Color Palette 3 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP3_251A ,Color Palette 3_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP3_251R ,Color Palette 3_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP3_251G ,Color Palette 3_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP3_251B ,Color Palette 3_251 Blue" line.long 0x3F0 "CP3_252R,Color Palette 3 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP3_252A ,Color Palette 3_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP3_252R ,Color Palette 3_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP3_252G ,Color Palette 3_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP3_252B ,Color Palette 3_252 Blue" line.long 0x3F4 "CP3_253R,Color Palette 3 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP3_253A ,Color Palette 3_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP3_253R ,Color Palette 3_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP3_253G ,Color Palette 3_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP3_253B ,Color Palette 3_253 Blue" line.long 0x3F8 "CP3_254R,Color Palette 3 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP3_254A ,Color Palette 3_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP3_254R ,Color Palette 3_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP3_254G ,Color Palette 3_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP3_254B ,Color Palette 3_254 Blue" line.long 0x3FC "CP3_255R,Color Palette 3 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP3_255A ,Color Palette 3_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP3_255R ,Color Palette 3_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP3_255G ,Color Palette 3_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP3_255B ,Color Palette 3_255 Blue" tree.end tree "Color Palette 4 Registers" width 10. group.long 0x4000++0x4ff line.long 0x0 "CP4_0R,Color Palette 4 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP4_0A ,Color Palette 4_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP4_0R ,Color Palette 4_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP4_0G ,Color Palette 4_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP4_0B ,Color Palette 4_0 Blue" line.long 0x4 "CP4_1R,Color Palette 4 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP4_1A ,Color Palette 4_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP4_1R ,Color Palette 4_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP4_1G ,Color Palette 4_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP4_1B ,Color Palette 4_1 Blue" line.long 0x8 "CP4_2R,Color Palette 4 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP4_2A ,Color Palette 4_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP4_2R ,Color Palette 4_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP4_2G ,Color Palette 4_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP4_2B ,Color Palette 4_2 Blue" line.long 0xC "CP4_3R,Color Palette 4 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP4_3A ,Color Palette 4_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP4_3R ,Color Palette 4_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP4_3G ,Color Palette 4_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP4_3B ,Color Palette 4_3 Blue" line.long 0x10 "CP4_4R,Color Palette 4 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP4_4A ,Color Palette 4_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP4_4R ,Color Palette 4_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP4_4G ,Color Palette 4_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP4_4B ,Color Palette 4_4 Blue" line.long 0x14 "CP4_5R,Color Palette 4 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP4_5A ,Color Palette 4_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP4_5R ,Color Palette 4_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP4_5G ,Color Palette 4_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP4_5B ,Color Palette 4_5 Blue" line.long 0x18 "CP4_6R,Color Palette 4 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP4_6A ,Color Palette 4_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP4_6R ,Color Palette 4_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP4_6G ,Color Palette 4_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP4_6B ,Color Palette 4_6 Blue" line.long 0x1C "CP4_7R,Color Palette 4 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP4_7A ,Color Palette 4_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP4_7R ,Color Palette 4_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP4_7G ,Color Palette 4_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP4_7B ,Color Palette 4_7 Blue" line.long 0x20 "CP4_8R,Color Palette 4 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP4_8A ,Color Palette 4_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP4_8R ,Color Palette 4_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP4_8G ,Color Palette 4_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP4_8B ,Color Palette 4_8 Blue" line.long 0x24 "CP4_9R,Color Palette 4 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP4_9A ,Color Palette 4_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP4_9R ,Color Palette 4_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP4_9G ,Color Palette 4_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP4_9B ,Color Palette 4_9 Blue" line.long 0x28 "CP4_10R,Color Palette 4 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP4_10A ,Color Palette 4_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP4_10R ,Color Palette 4_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP4_10G ,Color Palette 4_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP4_10B ,Color Palette 4_10 Blue" line.long 0x2C "CP4_11R,Color Palette 4 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP4_11A ,Color Palette 4_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP4_11R ,Color Palette 4_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP4_11G ,Color Palette 4_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP4_11B ,Color Palette 4_11 Blue" line.long 0x30 "CP4_12R,Color Palette 4 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP4_12A ,Color Palette 4_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP4_12R ,Color Palette 4_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP4_12G ,Color Palette 4_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP4_12B ,Color Palette 4_12 Blue" line.long 0x34 "CP4_13R,Color Palette 4 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP4_13A ,Color Palette 4_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP4_13R ,Color Palette 4_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP4_13G ,Color Palette 4_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP4_13B ,Color Palette 4_13 Blue" line.long 0x38 "CP4_14R,Color Palette 4 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP4_14A ,Color Palette 4_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP4_14R ,Color Palette 4_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP4_14G ,Color Palette 4_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP4_14B ,Color Palette 4_14 Blue" line.long 0x3C "CP4_15R,Color Palette 4 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP4_15A ,Color Palette 4_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP4_15R ,Color Palette 4_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP4_15G ,Color Palette 4_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP4_15B ,Color Palette 4_15 Blue" line.long 0x40 "CP4_16R,Color Palette 4 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP4_16A ,Color Palette 4_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP4_16R ,Color Palette 4_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP4_16G ,Color Palette 4_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP4_16B ,Color Palette 4_16 Blue" line.long 0x44 "CP4_17R,Color Palette 4 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP4_17A ,Color Palette 4_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP4_17R ,Color Palette 4_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP4_17G ,Color Palette 4_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP4_17B ,Color Palette 4_17 Blue" line.long 0x48 "CP4_18R,Color Palette 4 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP4_18A ,Color Palette 4_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP4_18R ,Color Palette 4_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP4_18G ,Color Palette 4_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP4_18B ,Color Palette 4_18 Blue" line.long 0x4C "CP4_19R,Color Palette 4 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP4_19A ,Color Palette 4_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP4_19R ,Color Palette 4_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP4_19G ,Color Palette 4_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP4_19B ,Color Palette 4_19 Blue" line.long 0x50 "CP4_20R,Color Palette 4 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP4_20A ,Color Palette 4_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP4_20R ,Color Palette 4_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP4_20G ,Color Palette 4_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP4_20B ,Color Palette 4_20 Blue" line.long 0x54 "CP4_21R,Color Palette 4 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP4_21A ,Color Palette 4_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP4_21R ,Color Palette 4_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP4_21G ,Color Palette 4_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP4_21B ,Color Palette 4_21 Blue" line.long 0x58 "CP4_22R,Color Palette 4 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP4_22A ,Color Palette 4_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP4_22R ,Color Palette 4_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP4_22G ,Color Palette 4_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP4_22B ,Color Palette 4_22 Blue" line.long 0x5C "CP4_23R,Color Palette 4 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP4_23A ,Color Palette 4_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP4_23R ,Color Palette 4_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP4_23G ,Color Palette 4_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP4_23B ,Color Palette 4_23 Blue" line.long 0x60 "CP4_24R,Color Palette 4 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP4_24A ,Color Palette 4_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP4_24R ,Color Palette 4_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP4_24G ,Color Palette 4_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP4_24B ,Color Palette 4_24 Blue" line.long 0x64 "CP4_25R,Color Palette 4 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP4_25A ,Color Palette 4_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP4_25R ,Color Palette 4_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP4_25G ,Color Palette 4_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP4_25B ,Color Palette 4_25 Blue" line.long 0x68 "CP4_26R,Color Palette 4 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP4_26A ,Color Palette 4_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP4_26R ,Color Palette 4_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP4_26G ,Color Palette 4_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP4_26B ,Color Palette 4_26 Blue" line.long 0x6C "CP4_27R,Color Palette 4 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP4_27A ,Color Palette 4_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP4_27R ,Color Palette 4_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP4_27G ,Color Palette 4_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP4_27B ,Color Palette 4_27 Blue" line.long 0x70 "CP4_28R,Color Palette 4 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP4_28A ,Color Palette 4_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP4_28R ,Color Palette 4_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP4_28G ,Color Palette 4_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP4_28B ,Color Palette 4_28 Blue" line.long 0x74 "CP4_29R,Color Palette 4 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP4_29A ,Color Palette 4_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP4_29R ,Color Palette 4_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP4_29G ,Color Palette 4_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP4_29B ,Color Palette 4_29 Blue" line.long 0x78 "CP4_30R,Color Palette 4 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP4_30A ,Color Palette 4_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP4_30R ,Color Palette 4_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP4_30G ,Color Palette 4_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP4_30B ,Color Palette 4_30 Blue" line.long 0x7C "CP4_31R,Color Palette 4 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP4_31A ,Color Palette 4_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP4_31R ,Color Palette 4_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP4_31G ,Color Palette 4_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP4_31B ,Color Palette 4_31 Blue" line.long 0x80 "CP4_32R,Color Palette 4 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP4_32A ,Color Palette 4_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP4_32R ,Color Palette 4_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP4_32G ,Color Palette 4_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP4_32B ,Color Palette 4_32 Blue" line.long 0x84 "CP4_33R,Color Palette 4 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP4_33A ,Color Palette 4_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP4_33R ,Color Palette 4_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP4_33G ,Color Palette 4_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP4_33B ,Color Palette 4_33 Blue" line.long 0x88 "CP4_34R,Color Palette 4 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP4_34A ,Color Palette 4_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP4_34R ,Color Palette 4_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP4_34G ,Color Palette 4_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP4_34B ,Color Palette 4_34 Blue" line.long 0x8C "CP4_35R,Color Palette 4 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP4_35A ,Color Palette 4_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP4_35R ,Color Palette 4_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP4_35G ,Color Palette 4_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP4_35B ,Color Palette 4_35 Blue" line.long 0x90 "CP4_36R,Color Palette 4 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP4_36A ,Color Palette 4_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP4_36R ,Color Palette 4_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP4_36G ,Color Palette 4_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP4_36B ,Color Palette 4_36 Blue" line.long 0x94 "CP4_37R,Color Palette 4 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP4_37A ,Color Palette 4_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP4_37R ,Color Palette 4_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP4_37G ,Color Palette 4_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP4_37B ,Color Palette 4_37 Blue" line.long 0x98 "CP4_38R,Color Palette 4 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP4_38A ,Color Palette 4_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP4_38R ,Color Palette 4_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP4_38G ,Color Palette 4_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP4_38B ,Color Palette 4_38 Blue" line.long 0x9C "CP4_39R,Color Palette 4 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP4_39A ,Color Palette 4_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP4_39R ,Color Palette 4_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP4_39G ,Color Palette 4_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP4_39B ,Color Palette 4_39 Blue" line.long 0xA0 "CP4_40R,Color Palette 4 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP4_40A ,Color Palette 4_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP4_40R ,Color Palette 4_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP4_40G ,Color Palette 4_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP4_40B ,Color Palette 4_40 Blue" line.long 0xA4 "CP4_41R,Color Palette 4 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP4_41A ,Color Palette 4_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP4_41R ,Color Palette 4_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP4_41G ,Color Palette 4_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP4_41B ,Color Palette 4_41 Blue" line.long 0xA8 "CP4_42R,Color Palette 4 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP4_42A ,Color Palette 4_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP4_42R ,Color Palette 4_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP4_42G ,Color Palette 4_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP4_42B ,Color Palette 4_42 Blue" line.long 0xAC "CP4_43R,Color Palette 4 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP4_43A ,Color Palette 4_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP4_43R ,Color Palette 4_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP4_43G ,Color Palette 4_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP4_43B ,Color Palette 4_43 Blue" line.long 0xB0 "CP4_44R,Color Palette 4 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP4_44A ,Color Palette 4_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP4_44R ,Color Palette 4_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP4_44G ,Color Palette 4_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP4_44B ,Color Palette 4_44 Blue" line.long 0xB4 "CP4_45R,Color Palette 4 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP4_45A ,Color Palette 4_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP4_45R ,Color Palette 4_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP4_45G ,Color Palette 4_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP4_45B ,Color Palette 4_45 Blue" line.long 0xB8 "CP4_46R,Color Palette 4 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP4_46A ,Color Palette 4_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP4_46R ,Color Palette 4_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP4_46G ,Color Palette 4_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP4_46B ,Color Palette 4_46 Blue" line.long 0xBC "CP4_47R,Color Palette 4 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP4_47A ,Color Palette 4_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP4_47R ,Color Palette 4_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP4_47G ,Color Palette 4_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP4_47B ,Color Palette 4_47 Blue" line.long 0xC0 "CP4_48R,Color Palette 4 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP4_48A ,Color Palette 4_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP4_48R ,Color Palette 4_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP4_48G ,Color Palette 4_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP4_48B ,Color Palette 4_48 Blue" line.long 0xC4 "CP4_49R,Color Palette 4 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP4_49A ,Color Palette 4_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP4_49R ,Color Palette 4_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP4_49G ,Color Palette 4_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP4_49B ,Color Palette 4_49 Blue" line.long 0xC8 "CP4_50R,Color Palette 4 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP4_50A ,Color Palette 4_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP4_50R ,Color Palette 4_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP4_50G ,Color Palette 4_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP4_50B ,Color Palette 4_50 Blue" line.long 0xCC "CP4_51R,Color Palette 4 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP4_51A ,Color Palette 4_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP4_51R ,Color Palette 4_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP4_51G ,Color Palette 4_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP4_51B ,Color Palette 4_51 Blue" line.long 0xD0 "CP4_52R,Color Palette 4 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP4_52A ,Color Palette 4_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP4_52R ,Color Palette 4_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP4_52G ,Color Palette 4_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP4_52B ,Color Palette 4_52 Blue" line.long 0xD4 "CP4_53R,Color Palette 4 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP4_53A ,Color Palette 4_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP4_53R ,Color Palette 4_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP4_53G ,Color Palette 4_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP4_53B ,Color Palette 4_53 Blue" line.long 0xD8 "CP4_54R,Color Palette 4 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP4_54A ,Color Palette 4_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP4_54R ,Color Palette 4_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP4_54G ,Color Palette 4_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP4_54B ,Color Palette 4_54 Blue" line.long 0xDC "CP4_55R,Color Palette 4 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP4_55A ,Color Palette 4_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP4_55R ,Color Palette 4_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP4_55G ,Color Palette 4_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP4_55B ,Color Palette 4_55 Blue" line.long 0xE0 "CP4_56R,Color Palette 4 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP4_56A ,Color Palette 4_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP4_56R ,Color Palette 4_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP4_56G ,Color Palette 4_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP4_56B ,Color Palette 4_56 Blue" line.long 0xE4 "CP4_57R,Color Palette 4 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP4_57A ,Color Palette 4_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP4_57R ,Color Palette 4_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP4_57G ,Color Palette 4_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP4_57B ,Color Palette 4_57 Blue" line.long 0xE8 "CP4_58R,Color Palette 4 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP4_58A ,Color Palette 4_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP4_58R ,Color Palette 4_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP4_58G ,Color Palette 4_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP4_58B ,Color Palette 4_58 Blue" line.long 0xEC "CP4_59R,Color Palette 4 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP4_59A ,Color Palette 4_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP4_59R ,Color Palette 4_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP4_59G ,Color Palette 4_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP4_59B ,Color Palette 4_59 Blue" line.long 0xF0 "CP4_60R,Color Palette 4 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP4_60A ,Color Palette 4_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP4_60R ,Color Palette 4_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP4_60G ,Color Palette 4_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP4_60B ,Color Palette 4_60 Blue" line.long 0xF4 "CP4_61R,Color Palette 4 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP4_61A ,Color Palette 4_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP4_61R ,Color Palette 4_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP4_61G ,Color Palette 4_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP4_61B ,Color Palette 4_61 Blue" line.long 0xF8 "CP4_62R,Color Palette 4 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP4_62A ,Color Palette 4_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP4_62R ,Color Palette 4_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP4_62G ,Color Palette 4_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP4_62B ,Color Palette 4_62 Blue" line.long 0xFC "CP4_63R,Color Palette 4 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP4_63A ,Color Palette 4_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP4_63R ,Color Palette 4_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP4_63G ,Color Palette 4_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP4_63B ,Color Palette 4_63 Blue" line.long 0x100 "CP4_64R,Color Palette 4 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP4_64A ,Color Palette 4_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP4_64R ,Color Palette 4_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP4_64G ,Color Palette 4_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP4_64B ,Color Palette 4_64 Blue" line.long 0x104 "CP4_65R,Color Palette 4 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP4_65A ,Color Palette 4_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP4_65R ,Color Palette 4_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP4_65G ,Color Palette 4_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP4_65B ,Color Palette 4_65 Blue" line.long 0x108 "CP4_66R,Color Palette 4 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP4_66A ,Color Palette 4_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP4_66R ,Color Palette 4_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP4_66G ,Color Palette 4_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP4_66B ,Color Palette 4_66 Blue" line.long 0x10C "CP4_67R,Color Palette 4 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP4_67A ,Color Palette 4_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP4_67R ,Color Palette 4_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP4_67G ,Color Palette 4_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP4_67B ,Color Palette 4_67 Blue" line.long 0x110 "CP4_68R,Color Palette 4 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP4_68A ,Color Palette 4_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP4_68R ,Color Palette 4_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP4_68G ,Color Palette 4_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP4_68B ,Color Palette 4_68 Blue" line.long 0x114 "CP4_69R,Color Palette 4 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP4_69A ,Color Palette 4_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP4_69R ,Color Palette 4_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP4_69G ,Color Palette 4_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP4_69B ,Color Palette 4_69 Blue" line.long 0x118 "CP4_70R,Color Palette 4 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP4_70A ,Color Palette 4_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP4_70R ,Color Palette 4_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP4_70G ,Color Palette 4_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP4_70B ,Color Palette 4_70 Blue" line.long 0x11C "CP4_71R,Color Palette 4 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP4_71A ,Color Palette 4_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP4_71R ,Color Palette 4_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP4_71G ,Color Palette 4_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP4_71B ,Color Palette 4_71 Blue" line.long 0x120 "CP4_72R,Color Palette 4 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP4_72A ,Color Palette 4_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP4_72R ,Color Palette 4_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP4_72G ,Color Palette 4_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP4_72B ,Color Palette 4_72 Blue" line.long 0x124 "CP4_73R,Color Palette 4 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP4_73A ,Color Palette 4_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP4_73R ,Color Palette 4_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP4_73G ,Color Palette 4_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP4_73B ,Color Palette 4_73 Blue" line.long 0x128 "CP4_74R,Color Palette 4 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP4_74A ,Color Palette 4_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP4_74R ,Color Palette 4_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP4_74G ,Color Palette 4_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP4_74B ,Color Palette 4_74 Blue" line.long 0x12C "CP4_75R,Color Palette 4 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP4_75A ,Color Palette 4_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP4_75R ,Color Palette 4_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP4_75G ,Color Palette 4_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP4_75B ,Color Palette 4_75 Blue" line.long 0x130 "CP4_76R,Color Palette 4 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP4_76A ,Color Palette 4_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP4_76R ,Color Palette 4_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP4_76G ,Color Palette 4_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP4_76B ,Color Palette 4_76 Blue" line.long 0x134 "CP4_77R,Color Palette 4 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP4_77A ,Color Palette 4_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP4_77R ,Color Palette 4_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP4_77G ,Color Palette 4_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP4_77B ,Color Palette 4_77 Blue" line.long 0x138 "CP4_78R,Color Palette 4 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP4_78A ,Color Palette 4_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP4_78R ,Color Palette 4_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP4_78G ,Color Palette 4_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP4_78B ,Color Palette 4_78 Blue" line.long 0x13C "CP4_79R,Color Palette 4 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP4_79A ,Color Palette 4_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP4_79R ,Color Palette 4_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP4_79G ,Color Palette 4_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP4_79B ,Color Palette 4_79 Blue" line.long 0x140 "CP4_80R,Color Palette 4 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP4_80A ,Color Palette 4_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP4_80R ,Color Palette 4_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP4_80G ,Color Palette 4_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP4_80B ,Color Palette 4_80 Blue" line.long 0x144 "CP4_81R,Color Palette 4 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP4_81A ,Color Palette 4_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP4_81R ,Color Palette 4_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP4_81G ,Color Palette 4_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP4_81B ,Color Palette 4_81 Blue" line.long 0x148 "CP4_82R,Color Palette 4 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP4_82A ,Color Palette 4_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP4_82R ,Color Palette 4_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP4_82G ,Color Palette 4_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP4_82B ,Color Palette 4_82 Blue" line.long 0x14C "CP4_83R,Color Palette 4 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP4_83A ,Color Palette 4_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP4_83R ,Color Palette 4_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP4_83G ,Color Palette 4_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP4_83B ,Color Palette 4_83 Blue" line.long 0x150 "CP4_84R,Color Palette 4 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP4_84A ,Color Palette 4_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP4_84R ,Color Palette 4_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP4_84G ,Color Palette 4_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP4_84B ,Color Palette 4_84 Blue" line.long 0x154 "CP4_85R,Color Palette 4 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP4_85A ,Color Palette 4_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP4_85R ,Color Palette 4_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP4_85G ,Color Palette 4_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP4_85B ,Color Palette 4_85 Blue" line.long 0x158 "CP4_86R,Color Palette 4 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP4_86A ,Color Palette 4_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP4_86R ,Color Palette 4_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP4_86G ,Color Palette 4_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP4_86B ,Color Palette 4_86 Blue" line.long 0x15C "CP4_87R,Color Palette 4 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP4_87A ,Color Palette 4_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP4_87R ,Color Palette 4_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP4_87G ,Color Palette 4_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP4_87B ,Color Palette 4_87 Blue" line.long 0x160 "CP4_88R,Color Palette 4 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP4_88A ,Color Palette 4_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP4_88R ,Color Palette 4_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP4_88G ,Color Palette 4_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP4_88B ,Color Palette 4_88 Blue" line.long 0x164 "CP4_89R,Color Palette 4 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP4_89A ,Color Palette 4_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP4_89R ,Color Palette 4_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP4_89G ,Color Palette 4_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP4_89B ,Color Palette 4_89 Blue" line.long 0x168 "CP4_90R,Color Palette 4 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP4_90A ,Color Palette 4_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP4_90R ,Color Palette 4_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP4_90G ,Color Palette 4_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP4_90B ,Color Palette 4_90 Blue" line.long 0x16C "CP4_91R,Color Palette 4 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP4_91A ,Color Palette 4_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP4_91R ,Color Palette 4_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP4_91G ,Color Palette 4_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP4_91B ,Color Palette 4_91 Blue" line.long 0x170 "CP4_92R,Color Palette 4 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP4_92A ,Color Palette 4_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP4_92R ,Color Palette 4_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP4_92G ,Color Palette 4_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP4_92B ,Color Palette 4_92 Blue" line.long 0x174 "CP4_93R,Color Palette 4 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP4_93A ,Color Palette 4_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP4_93R ,Color Palette 4_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP4_93G ,Color Palette 4_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP4_93B ,Color Palette 4_93 Blue" line.long 0x178 "CP4_94R,Color Palette 4 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP4_94A ,Color Palette 4_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP4_94R ,Color Palette 4_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP4_94G ,Color Palette 4_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP4_94B ,Color Palette 4_94 Blue" line.long 0x17C "CP4_95R,Color Palette 4 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP4_95A ,Color Palette 4_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP4_95R ,Color Palette 4_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP4_95G ,Color Palette 4_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP4_95B ,Color Palette 4_95 Blue" line.long 0x180 "CP4_96R,Color Palette 4 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP4_96A ,Color Palette 4_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP4_96R ,Color Palette 4_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP4_96G ,Color Palette 4_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP4_96B ,Color Palette 4_96 Blue" line.long 0x184 "CP4_97R,Color Palette 4 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP4_97A ,Color Palette 4_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP4_97R ,Color Palette 4_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP4_97G ,Color Palette 4_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP4_97B ,Color Palette 4_97 Blue" line.long 0x188 "CP4_98R,Color Palette 4 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP4_98A ,Color Palette 4_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP4_98R ,Color Palette 4_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP4_98G ,Color Palette 4_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP4_98B ,Color Palette 4_98 Blue" line.long 0x18C "CP4_99R,Color Palette 4 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP4_99A ,Color Palette 4_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP4_99R ,Color Palette 4_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP4_99G ,Color Palette 4_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP4_99B ,Color Palette 4_99 Blue" line.long 0x190 "CP4_100R,Color Palette 4 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP4_100A ,Color Palette 4_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP4_100R ,Color Palette 4_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP4_100G ,Color Palette 4_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP4_100B ,Color Palette 4_100 Blue" line.long 0x194 "CP4_101R,Color Palette 4 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP4_101A ,Color Palette 4_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP4_101R ,Color Palette 4_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP4_101G ,Color Palette 4_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP4_101B ,Color Palette 4_101 Blue" line.long 0x198 "CP4_102R,Color Palette 4 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP4_102A ,Color Palette 4_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP4_102R ,Color Palette 4_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP4_102G ,Color Palette 4_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP4_102B ,Color Palette 4_102 Blue" line.long 0x19C "CP4_103R,Color Palette 4 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP4_103A ,Color Palette 4_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP4_103R ,Color Palette 4_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP4_103G ,Color Palette 4_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP4_103B ,Color Palette 4_103 Blue" line.long 0x1A0 "CP4_104R,Color Palette 4 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP4_104A ,Color Palette 4_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP4_104R ,Color Palette 4_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP4_104G ,Color Palette 4_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP4_104B ,Color Palette 4_104 Blue" line.long 0x1A4 "CP4_105R,Color Palette 4 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP4_105A ,Color Palette 4_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP4_105R ,Color Palette 4_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP4_105G ,Color Palette 4_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP4_105B ,Color Palette 4_105 Blue" line.long 0x1A8 "CP4_106R,Color Palette 4 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP4_106A ,Color Palette 4_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP4_106R ,Color Palette 4_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP4_106G ,Color Palette 4_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP4_106B ,Color Palette 4_106 Blue" line.long 0x1AC "CP4_107R,Color Palette 4 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP4_107A ,Color Palette 4_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP4_107R ,Color Palette 4_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP4_107G ,Color Palette 4_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP4_107B ,Color Palette 4_107 Blue" line.long 0x1B0 "CP4_108R,Color Palette 4 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP4_108A ,Color Palette 4_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP4_108R ,Color Palette 4_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP4_108G ,Color Palette 4_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP4_108B ,Color Palette 4_108 Blue" line.long 0x1B4 "CP4_109R,Color Palette 4 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP4_109A ,Color Palette 4_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP4_109R ,Color Palette 4_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP4_109G ,Color Palette 4_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP4_109B ,Color Palette 4_109 Blue" line.long 0x1B8 "CP4_110R,Color Palette 4 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP4_110A ,Color Palette 4_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP4_110R ,Color Palette 4_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP4_110G ,Color Palette 4_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP4_110B ,Color Palette 4_110 Blue" line.long 0x1BC "CP4_111R,Color Palette 4 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP4_111A ,Color Palette 4_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP4_111R ,Color Palette 4_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP4_111G ,Color Palette 4_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP4_111B ,Color Palette 4_111 Blue" line.long 0x1C0 "CP4_112R,Color Palette 4 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP4_112A ,Color Palette 4_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP4_112R ,Color Palette 4_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP4_112G ,Color Palette 4_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP4_112B ,Color Palette 4_112 Blue" line.long 0x1C4 "CP4_113R,Color Palette 4 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP4_113A ,Color Palette 4_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP4_113R ,Color Palette 4_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP4_113G ,Color Palette 4_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP4_113B ,Color Palette 4_113 Blue" line.long 0x1C8 "CP4_114R,Color Palette 4 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP4_114A ,Color Palette 4_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP4_114R ,Color Palette 4_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP4_114G ,Color Palette 4_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP4_114B ,Color Palette 4_114 Blue" line.long 0x1CC "CP4_115R,Color Palette 4 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP4_115A ,Color Palette 4_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP4_115R ,Color Palette 4_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP4_115G ,Color Palette 4_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP4_115B ,Color Palette 4_115 Blue" line.long 0x1D0 "CP4_116R,Color Palette 4 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP4_116A ,Color Palette 4_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP4_116R ,Color Palette 4_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP4_116G ,Color Palette 4_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP4_116B ,Color Palette 4_116 Blue" line.long 0x1D4 "CP4_117R,Color Palette 4 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP4_117A ,Color Palette 4_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP4_117R ,Color Palette 4_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP4_117G ,Color Palette 4_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP4_117B ,Color Palette 4_117 Blue" line.long 0x1D8 "CP4_118R,Color Palette 4 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP4_118A ,Color Palette 4_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP4_118R ,Color Palette 4_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP4_118G ,Color Palette 4_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP4_118B ,Color Palette 4_118 Blue" line.long 0x1DC "CP4_119R,Color Palette 4 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP4_119A ,Color Palette 4_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP4_119R ,Color Palette 4_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP4_119G ,Color Palette 4_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP4_119B ,Color Palette 4_119 Blue" line.long 0x1E0 "CP4_120R,Color Palette 4 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP4_120A ,Color Palette 4_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP4_120R ,Color Palette 4_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP4_120G ,Color Palette 4_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP4_120B ,Color Palette 4_120 Blue" line.long 0x1E4 "CP4_121R,Color Palette 4 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP4_121A ,Color Palette 4_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP4_121R ,Color Palette 4_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP4_121G ,Color Palette 4_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP4_121B ,Color Palette 4_121 Blue" line.long 0x1E8 "CP4_122R,Color Palette 4 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP4_122A ,Color Palette 4_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP4_122R ,Color Palette 4_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP4_122G ,Color Palette 4_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP4_122B ,Color Palette 4_122 Blue" line.long 0x1EC "CP4_123R,Color Palette 4 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP4_123A ,Color Palette 4_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP4_123R ,Color Palette 4_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP4_123G ,Color Palette 4_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP4_123B ,Color Palette 4_123 Blue" line.long 0x1F0 "CP4_124R,Color Palette 4 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP4_124A ,Color Palette 4_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP4_124R ,Color Palette 4_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP4_124G ,Color Palette 4_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP4_124B ,Color Palette 4_124 Blue" line.long 0x1F4 "CP4_125R,Color Palette 4 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP4_125A ,Color Palette 4_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP4_125R ,Color Palette 4_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP4_125G ,Color Palette 4_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP4_125B ,Color Palette 4_125 Blue" line.long 0x1F8 "CP4_126R,Color Palette 4 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP4_126A ,Color Palette 4_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP4_126R ,Color Palette 4_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP4_126G ,Color Palette 4_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP4_126B ,Color Palette 4_126 Blue" line.long 0x1FC "CP4_127R,Color Palette 4 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP4_127A ,Color Palette 4_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP4_127R ,Color Palette 4_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP4_127G ,Color Palette 4_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP4_127B ,Color Palette 4_127 Blue" line.long 0x200 "CP4_128R,Color Palette 4 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP4_128A ,Color Palette 4_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP4_128R ,Color Palette 4_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP4_128G ,Color Palette 4_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP4_128B ,Color Palette 4_128 Blue" line.long 0x204 "CP4_129R,Color Palette 4 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP4_129A ,Color Palette 4_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP4_129R ,Color Palette 4_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP4_129G ,Color Palette 4_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP4_129B ,Color Palette 4_129 Blue" line.long 0x208 "CP4_130R,Color Palette 4 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP4_130A ,Color Palette 4_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP4_130R ,Color Palette 4_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP4_130G ,Color Palette 4_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP4_130B ,Color Palette 4_130 Blue" line.long 0x20C "CP4_131R,Color Palette 4 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP4_131A ,Color Palette 4_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP4_131R ,Color Palette 4_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP4_131G ,Color Palette 4_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP4_131B ,Color Palette 4_131 Blue" line.long 0x210 "CP4_132R,Color Palette 4 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP4_132A ,Color Palette 4_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP4_132R ,Color Palette 4_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP4_132G ,Color Palette 4_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP4_132B ,Color Palette 4_132 Blue" line.long 0x214 "CP4_133R,Color Palette 4 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP4_133A ,Color Palette 4_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP4_133R ,Color Palette 4_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP4_133G ,Color Palette 4_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP4_133B ,Color Palette 4_133 Blue" line.long 0x218 "CP4_134R,Color Palette 4 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP4_134A ,Color Palette 4_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP4_134R ,Color Palette 4_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP4_134G ,Color Palette 4_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP4_134B ,Color Palette 4_134 Blue" line.long 0x21C "CP4_135R,Color Palette 4 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP4_135A ,Color Palette 4_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP4_135R ,Color Palette 4_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP4_135G ,Color Palette 4_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP4_135B ,Color Palette 4_135 Blue" line.long 0x220 "CP4_136R,Color Palette 4 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP4_136A ,Color Palette 4_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP4_136R ,Color Palette 4_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP4_136G ,Color Palette 4_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP4_136B ,Color Palette 4_136 Blue" line.long 0x224 "CP4_137R,Color Palette 4 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP4_137A ,Color Palette 4_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP4_137R ,Color Palette 4_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP4_137G ,Color Palette 4_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP4_137B ,Color Palette 4_137 Blue" line.long 0x228 "CP4_138R,Color Palette 4 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP4_138A ,Color Palette 4_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP4_138R ,Color Palette 4_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP4_138G ,Color Palette 4_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP4_138B ,Color Palette 4_138 Blue" line.long 0x22C "CP4_139R,Color Palette 4 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP4_139A ,Color Palette 4_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP4_139R ,Color Palette 4_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP4_139G ,Color Palette 4_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP4_139B ,Color Palette 4_139 Blue" line.long 0x230 "CP4_140R,Color Palette 4 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP4_140A ,Color Palette 4_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP4_140R ,Color Palette 4_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP4_140G ,Color Palette 4_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP4_140B ,Color Palette 4_140 Blue" line.long 0x234 "CP4_141R,Color Palette 4 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP4_141A ,Color Palette 4_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP4_141R ,Color Palette 4_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP4_141G ,Color Palette 4_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP4_141B ,Color Palette 4_141 Blue" line.long 0x238 "CP4_142R,Color Palette 4 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP4_142A ,Color Palette 4_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP4_142R ,Color Palette 4_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP4_142G ,Color Palette 4_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP4_142B ,Color Palette 4_142 Blue" line.long 0x23C "CP4_143R,Color Palette 4 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP4_143A ,Color Palette 4_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP4_143R ,Color Palette 4_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP4_143G ,Color Palette 4_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP4_143B ,Color Palette 4_143 Blue" line.long 0x240 "CP4_144R,Color Palette 4 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP4_144A ,Color Palette 4_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP4_144R ,Color Palette 4_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP4_144G ,Color Palette 4_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP4_144B ,Color Palette 4_144 Blue" line.long 0x244 "CP4_145R,Color Palette 4 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP4_145A ,Color Palette 4_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP4_145R ,Color Palette 4_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP4_145G ,Color Palette 4_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP4_145B ,Color Palette 4_145 Blue" line.long 0x248 "CP4_146R,Color Palette 4 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP4_146A ,Color Palette 4_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP4_146R ,Color Palette 4_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP4_146G ,Color Palette 4_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP4_146B ,Color Palette 4_146 Blue" line.long 0x24C "CP4_147R,Color Palette 4 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP4_147A ,Color Palette 4_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP4_147R ,Color Palette 4_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP4_147G ,Color Palette 4_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP4_147B ,Color Palette 4_147 Blue" line.long 0x250 "CP4_148R,Color Palette 4 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP4_148A ,Color Palette 4_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP4_148R ,Color Palette 4_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP4_148G ,Color Palette 4_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP4_148B ,Color Palette 4_148 Blue" line.long 0x254 "CP4_149R,Color Palette 4 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP4_149A ,Color Palette 4_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP4_149R ,Color Palette 4_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP4_149G ,Color Palette 4_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP4_149B ,Color Palette 4_149 Blue" line.long 0x258 "CP4_150R,Color Palette 4 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP4_150A ,Color Palette 4_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP4_150R ,Color Palette 4_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP4_150G ,Color Palette 4_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP4_150B ,Color Palette 4_150 Blue" line.long 0x25C "CP4_151R,Color Palette 4 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP4_151A ,Color Palette 4_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP4_151R ,Color Palette 4_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP4_151G ,Color Palette 4_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP4_151B ,Color Palette 4_151 Blue" line.long 0x260 "CP4_152R,Color Palette 4 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP4_152A ,Color Palette 4_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP4_152R ,Color Palette 4_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP4_152G ,Color Palette 4_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP4_152B ,Color Palette 4_152 Blue" line.long 0x264 "CP4_153R,Color Palette 4 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP4_153A ,Color Palette 4_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP4_153R ,Color Palette 4_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP4_153G ,Color Palette 4_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP4_153B ,Color Palette 4_153 Blue" line.long 0x268 "CP4_154R,Color Palette 4 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP4_154A ,Color Palette 4_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP4_154R ,Color Palette 4_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP4_154G ,Color Palette 4_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP4_154B ,Color Palette 4_154 Blue" line.long 0x26C "CP4_155R,Color Palette 4 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP4_155A ,Color Palette 4_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP4_155R ,Color Palette 4_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP4_155G ,Color Palette 4_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP4_155B ,Color Palette 4_155 Blue" line.long 0x270 "CP4_156R,Color Palette 4 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP4_156A ,Color Palette 4_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP4_156R ,Color Palette 4_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP4_156G ,Color Palette 4_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP4_156B ,Color Palette 4_156 Blue" line.long 0x274 "CP4_157R,Color Palette 4 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP4_157A ,Color Palette 4_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP4_157R ,Color Palette 4_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP4_157G ,Color Palette 4_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP4_157B ,Color Palette 4_157 Blue" line.long 0x278 "CP4_158R,Color Palette 4 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP4_158A ,Color Palette 4_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP4_158R ,Color Palette 4_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP4_158G ,Color Palette 4_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP4_158B ,Color Palette 4_158 Blue" line.long 0x27C "CP4_159R,Color Palette 4 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP4_159A ,Color Palette 4_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP4_159R ,Color Palette 4_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP4_159G ,Color Palette 4_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP4_159B ,Color Palette 4_159 Blue" line.long 0x280 "CP4_160R,Color Palette 4 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP4_160A ,Color Palette 4_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP4_160R ,Color Palette 4_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP4_160G ,Color Palette 4_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP4_160B ,Color Palette 4_160 Blue" line.long 0x284 "CP4_161R,Color Palette 4 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP4_161A ,Color Palette 4_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP4_161R ,Color Palette 4_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP4_161G ,Color Palette 4_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP4_161B ,Color Palette 4_161 Blue" line.long 0x288 "CP4_162R,Color Palette 4 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP4_162A ,Color Palette 4_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP4_162R ,Color Palette 4_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP4_162G ,Color Palette 4_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP4_162B ,Color Palette 4_162 Blue" line.long 0x28C "CP4_163R,Color Palette 4 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP4_163A ,Color Palette 4_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP4_163R ,Color Palette 4_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP4_163G ,Color Palette 4_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP4_163B ,Color Palette 4_163 Blue" line.long 0x290 "CP4_164R,Color Palette 4 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP4_164A ,Color Palette 4_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP4_164R ,Color Palette 4_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP4_164G ,Color Palette 4_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP4_164B ,Color Palette 4_164 Blue" line.long 0x294 "CP4_165R,Color Palette 4 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP4_165A ,Color Palette 4_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP4_165R ,Color Palette 4_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP4_165G ,Color Palette 4_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP4_165B ,Color Palette 4_165 Blue" line.long 0x298 "CP4_166R,Color Palette 4 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP4_166A ,Color Palette 4_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP4_166R ,Color Palette 4_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP4_166G ,Color Palette 4_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP4_166B ,Color Palette 4_166 Blue" line.long 0x29C "CP4_167R,Color Palette 4 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP4_167A ,Color Palette 4_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP4_167R ,Color Palette 4_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP4_167G ,Color Palette 4_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP4_167B ,Color Palette 4_167 Blue" line.long 0x2A0 "CP4_168R,Color Palette 4 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP4_168A ,Color Palette 4_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP4_168R ,Color Palette 4_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP4_168G ,Color Palette 4_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP4_168B ,Color Palette 4_168 Blue" line.long 0x2A4 "CP4_169R,Color Palette 4 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP4_169A ,Color Palette 4_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP4_169R ,Color Palette 4_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP4_169G ,Color Palette 4_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP4_169B ,Color Palette 4_169 Blue" line.long 0x2A8 "CP4_170R,Color Palette 4 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP4_170A ,Color Palette 4_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP4_170R ,Color Palette 4_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP4_170G ,Color Palette 4_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP4_170B ,Color Palette 4_170 Blue" line.long 0x2AC "CP4_171R,Color Palette 4 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP4_171A ,Color Palette 4_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP4_171R ,Color Palette 4_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP4_171G ,Color Palette 4_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP4_171B ,Color Palette 4_171 Blue" line.long 0x2B0 "CP4_172R,Color Palette 4 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP4_172A ,Color Palette 4_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP4_172R ,Color Palette 4_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP4_172G ,Color Palette 4_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP4_172B ,Color Palette 4_172 Blue" line.long 0x2B4 "CP4_173R,Color Palette 4 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP4_173A ,Color Palette 4_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP4_173R ,Color Palette 4_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP4_173G ,Color Palette 4_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP4_173B ,Color Palette 4_173 Blue" line.long 0x2B8 "CP4_174R,Color Palette 4 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP4_174A ,Color Palette 4_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP4_174R ,Color Palette 4_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP4_174G ,Color Palette 4_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP4_174B ,Color Palette 4_174 Blue" line.long 0x2BC "CP4_175R,Color Palette 4 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP4_175A ,Color Palette 4_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP4_175R ,Color Palette 4_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP4_175G ,Color Palette 4_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP4_175B ,Color Palette 4_175 Blue" line.long 0x2C0 "CP4_176R,Color Palette 4 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP4_176A ,Color Palette 4_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP4_176R ,Color Palette 4_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP4_176G ,Color Palette 4_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP4_176B ,Color Palette 4_176 Blue" line.long 0x2C4 "CP4_177R,Color Palette 4 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP4_177A ,Color Palette 4_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP4_177R ,Color Palette 4_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP4_177G ,Color Palette 4_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP4_177B ,Color Palette 4_177 Blue" line.long 0x2C8 "CP4_178R,Color Palette 4 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP4_178A ,Color Palette 4_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP4_178R ,Color Palette 4_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP4_178G ,Color Palette 4_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP4_178B ,Color Palette 4_178 Blue" line.long 0x2CC "CP4_179R,Color Palette 4 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP4_179A ,Color Palette 4_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP4_179R ,Color Palette 4_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP4_179G ,Color Palette 4_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP4_179B ,Color Palette 4_179 Blue" line.long 0x2D0 "CP4_180R,Color Palette 4 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP4_180A ,Color Palette 4_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP4_180R ,Color Palette 4_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP4_180G ,Color Palette 4_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP4_180B ,Color Palette 4_180 Blue" line.long 0x2D4 "CP4_181R,Color Palette 4 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP4_181A ,Color Palette 4_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP4_181R ,Color Palette 4_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP4_181G ,Color Palette 4_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP4_181B ,Color Palette 4_181 Blue" line.long 0x2D8 "CP4_182R,Color Palette 4 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP4_182A ,Color Palette 4_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP4_182R ,Color Palette 4_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP4_182G ,Color Palette 4_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP4_182B ,Color Palette 4_182 Blue" line.long 0x2DC "CP4_183R,Color Palette 4 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP4_183A ,Color Palette 4_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP4_183R ,Color Palette 4_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP4_183G ,Color Palette 4_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP4_183B ,Color Palette 4_183 Blue" line.long 0x2E0 "CP4_184R,Color Palette 4 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP4_184A ,Color Palette 4_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP4_184R ,Color Palette 4_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP4_184G ,Color Palette 4_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP4_184B ,Color Palette 4_184 Blue" line.long 0x2E4 "CP4_185R,Color Palette 4 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP4_185A ,Color Palette 4_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP4_185R ,Color Palette 4_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP4_185G ,Color Palette 4_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP4_185B ,Color Palette 4_185 Blue" line.long 0x2E8 "CP4_186R,Color Palette 4 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP4_186A ,Color Palette 4_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP4_186R ,Color Palette 4_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP4_186G ,Color Palette 4_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP4_186B ,Color Palette 4_186 Blue" line.long 0x2EC "CP4_187R,Color Palette 4 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP4_187A ,Color Palette 4_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP4_187R ,Color Palette 4_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP4_187G ,Color Palette 4_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP4_187B ,Color Palette 4_187 Blue" line.long 0x2F0 "CP4_188R,Color Palette 4 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP4_188A ,Color Palette 4_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP4_188R ,Color Palette 4_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP4_188G ,Color Palette 4_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP4_188B ,Color Palette 4_188 Blue" line.long 0x2F4 "CP4_189R,Color Palette 4 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP4_189A ,Color Palette 4_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP4_189R ,Color Palette 4_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP4_189G ,Color Palette 4_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP4_189B ,Color Palette 4_189 Blue" line.long 0x2F8 "CP4_190R,Color Palette 4 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP4_190A ,Color Palette 4_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP4_190R ,Color Palette 4_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP4_190G ,Color Palette 4_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP4_190B ,Color Palette 4_190 Blue" line.long 0x2FC "CP4_191R,Color Palette 4 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP4_191A ,Color Palette 4_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP4_191R ,Color Palette 4_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP4_191G ,Color Palette 4_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP4_191B ,Color Palette 4_191 Blue" line.long 0x300 "CP4_192R,Color Palette 4 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP4_192A ,Color Palette 4_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP4_192R ,Color Palette 4_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP4_192G ,Color Palette 4_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP4_192B ,Color Palette 4_192 Blue" line.long 0x304 "CP4_193R,Color Palette 4 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP4_193A ,Color Palette 4_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP4_193R ,Color Palette 4_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP4_193G ,Color Palette 4_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP4_193B ,Color Palette 4_193 Blue" line.long 0x308 "CP4_194R,Color Palette 4 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP4_194A ,Color Palette 4_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP4_194R ,Color Palette 4_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP4_194G ,Color Palette 4_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP4_194B ,Color Palette 4_194 Blue" line.long 0x30C "CP4_195R,Color Palette 4 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP4_195A ,Color Palette 4_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP4_195R ,Color Palette 4_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP4_195G ,Color Palette 4_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP4_195B ,Color Palette 4_195 Blue" line.long 0x310 "CP4_196R,Color Palette 4 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP4_196A ,Color Palette 4_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP4_196R ,Color Palette 4_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP4_196G ,Color Palette 4_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP4_196B ,Color Palette 4_196 Blue" line.long 0x314 "CP4_197R,Color Palette 4 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP4_197A ,Color Palette 4_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP4_197R ,Color Palette 4_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP4_197G ,Color Palette 4_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP4_197B ,Color Palette 4_197 Blue" line.long 0x318 "CP4_198R,Color Palette 4 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP4_198A ,Color Palette 4_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP4_198R ,Color Palette 4_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP4_198G ,Color Palette 4_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP4_198B ,Color Palette 4_198 Blue" line.long 0x31C "CP4_199R,Color Palette 4 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP4_199A ,Color Palette 4_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP4_199R ,Color Palette 4_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP4_199G ,Color Palette 4_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP4_199B ,Color Palette 4_199 Blue" line.long 0x320 "CP4_200R,Color Palette 4 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP4_200A ,Color Palette 4_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP4_200R ,Color Palette 4_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP4_200G ,Color Palette 4_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP4_200B ,Color Palette 4_200 Blue" line.long 0x324 "CP4_201R,Color Palette 4 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP4_201A ,Color Palette 4_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP4_201R ,Color Palette 4_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP4_201G ,Color Palette 4_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP4_201B ,Color Palette 4_201 Blue" line.long 0x328 "CP4_202R,Color Palette 4 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP4_202A ,Color Palette 4_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP4_202R ,Color Palette 4_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP4_202G ,Color Palette 4_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP4_202B ,Color Palette 4_202 Blue" line.long 0x32C "CP4_203R,Color Palette 4 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP4_203A ,Color Palette 4_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP4_203R ,Color Palette 4_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP4_203G ,Color Palette 4_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP4_203B ,Color Palette 4_203 Blue" line.long 0x330 "CP4_204R,Color Palette 4 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP4_204A ,Color Palette 4_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP4_204R ,Color Palette 4_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP4_204G ,Color Palette 4_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP4_204B ,Color Palette 4_204 Blue" line.long 0x334 "CP4_205R,Color Palette 4 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP4_205A ,Color Palette 4_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP4_205R ,Color Palette 4_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP4_205G ,Color Palette 4_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP4_205B ,Color Palette 4_205 Blue" line.long 0x338 "CP4_206R,Color Palette 4 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP4_206A ,Color Palette 4_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP4_206R ,Color Palette 4_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP4_206G ,Color Palette 4_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP4_206B ,Color Palette 4_206 Blue" line.long 0x33C "CP4_207R,Color Palette 4 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP4_207A ,Color Palette 4_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP4_207R ,Color Palette 4_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP4_207G ,Color Palette 4_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP4_207B ,Color Palette 4_207 Blue" line.long 0x340 "CP4_208R,Color Palette 4 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP4_208A ,Color Palette 4_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP4_208R ,Color Palette 4_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP4_208G ,Color Palette 4_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP4_208B ,Color Palette 4_208 Blue" line.long 0x344 "CP4_209R,Color Palette 4 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP4_209A ,Color Palette 4_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP4_209R ,Color Palette 4_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP4_209G ,Color Palette 4_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP4_209B ,Color Palette 4_209 Blue" line.long 0x348 "CP4_210R,Color Palette 4 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP4_210A ,Color Palette 4_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP4_210R ,Color Palette 4_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP4_210G ,Color Palette 4_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP4_210B ,Color Palette 4_210 Blue" line.long 0x34C "CP4_211R,Color Palette 4 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP4_211A ,Color Palette 4_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP4_211R ,Color Palette 4_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP4_211G ,Color Palette 4_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP4_211B ,Color Palette 4_211 Blue" line.long 0x350 "CP4_212R,Color Palette 4 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP4_212A ,Color Palette 4_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP4_212R ,Color Palette 4_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP4_212G ,Color Palette 4_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP4_212B ,Color Palette 4_212 Blue" line.long 0x354 "CP4_213R,Color Palette 4 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP4_213A ,Color Palette 4_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP4_213R ,Color Palette 4_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP4_213G ,Color Palette 4_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP4_213B ,Color Palette 4_213 Blue" line.long 0x358 "CP4_214R,Color Palette 4 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP4_214A ,Color Palette 4_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP4_214R ,Color Palette 4_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP4_214G ,Color Palette 4_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP4_214B ,Color Palette 4_214 Blue" line.long 0x35C "CP4_215R,Color Palette 4 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP4_215A ,Color Palette 4_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP4_215R ,Color Palette 4_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP4_215G ,Color Palette 4_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP4_215B ,Color Palette 4_215 Blue" line.long 0x360 "CP4_216R,Color Palette 4 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP4_216A ,Color Palette 4_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP4_216R ,Color Palette 4_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP4_216G ,Color Palette 4_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP4_216B ,Color Palette 4_216 Blue" line.long 0x364 "CP4_217R,Color Palette 4 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP4_217A ,Color Palette 4_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP4_217R ,Color Palette 4_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP4_217G ,Color Palette 4_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP4_217B ,Color Palette 4_217 Blue" line.long 0x368 "CP4_218R,Color Palette 4 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP4_218A ,Color Palette 4_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP4_218R ,Color Palette 4_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP4_218G ,Color Palette 4_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP4_218B ,Color Palette 4_218 Blue" line.long 0x36C "CP4_219R,Color Palette 4 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP4_219A ,Color Palette 4_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP4_219R ,Color Palette 4_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP4_219G ,Color Palette 4_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP4_219B ,Color Palette 4_219 Blue" line.long 0x370 "CP4_220R,Color Palette 4 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP4_220A ,Color Palette 4_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP4_220R ,Color Palette 4_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP4_220G ,Color Palette 4_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP4_220B ,Color Palette 4_220 Blue" line.long 0x374 "CP4_221R,Color Palette 4 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP4_221A ,Color Palette 4_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP4_221R ,Color Palette 4_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP4_221G ,Color Palette 4_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP4_221B ,Color Palette 4_221 Blue" line.long 0x378 "CP4_222R,Color Palette 4 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP4_222A ,Color Palette 4_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP4_222R ,Color Palette 4_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP4_222G ,Color Palette 4_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP4_222B ,Color Palette 4_222 Blue" line.long 0x37C "CP4_223R,Color Palette 4 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP4_223A ,Color Palette 4_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP4_223R ,Color Palette 4_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP4_223G ,Color Palette 4_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP4_223B ,Color Palette 4_223 Blue" line.long 0x380 "CP4_224R,Color Palette 4 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP4_224A ,Color Palette 4_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP4_224R ,Color Palette 4_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP4_224G ,Color Palette 4_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP4_224B ,Color Palette 4_224 Blue" line.long 0x384 "CP4_225R,Color Palette 4 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP4_225A ,Color Palette 4_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP4_225R ,Color Palette 4_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP4_225G ,Color Palette 4_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP4_225B ,Color Palette 4_225 Blue" line.long 0x388 "CP4_226R,Color Palette 4 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP4_226A ,Color Palette 4_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP4_226R ,Color Palette 4_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP4_226G ,Color Palette 4_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP4_226B ,Color Palette 4_226 Blue" line.long 0x38C "CP4_227R,Color Palette 4 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP4_227A ,Color Palette 4_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP4_227R ,Color Palette 4_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP4_227G ,Color Palette 4_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP4_227B ,Color Palette 4_227 Blue" line.long 0x390 "CP4_228R,Color Palette 4 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP4_228A ,Color Palette 4_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP4_228R ,Color Palette 4_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP4_228G ,Color Palette 4_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP4_228B ,Color Palette 4_228 Blue" line.long 0x394 "CP4_229R,Color Palette 4 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP4_229A ,Color Palette 4_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP4_229R ,Color Palette 4_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP4_229G ,Color Palette 4_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP4_229B ,Color Palette 4_229 Blue" line.long 0x398 "CP4_230R,Color Palette 4 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP4_230A ,Color Palette 4_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP4_230R ,Color Palette 4_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP4_230G ,Color Palette 4_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP4_230B ,Color Palette 4_230 Blue" line.long 0x39C "CP4_231R,Color Palette 4 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP4_231A ,Color Palette 4_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP4_231R ,Color Palette 4_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP4_231G ,Color Palette 4_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP4_231B ,Color Palette 4_231 Blue" line.long 0x3A0 "CP4_232R,Color Palette 4 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP4_232A ,Color Palette 4_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP4_232R ,Color Palette 4_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP4_232G ,Color Palette 4_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP4_232B ,Color Palette 4_232 Blue" line.long 0x3A4 "CP4_233R,Color Palette 4 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP4_233A ,Color Palette 4_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP4_233R ,Color Palette 4_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP4_233G ,Color Palette 4_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP4_233B ,Color Palette 4_233 Blue" line.long 0x3A8 "CP4_234R,Color Palette 4 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP4_234A ,Color Palette 4_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP4_234R ,Color Palette 4_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP4_234G ,Color Palette 4_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP4_234B ,Color Palette 4_234 Blue" line.long 0x3AC "CP4_235R,Color Palette 4 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP4_235A ,Color Palette 4_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP4_235R ,Color Palette 4_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP4_235G ,Color Palette 4_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP4_235B ,Color Palette 4_235 Blue" line.long 0x3B0 "CP4_236R,Color Palette 4 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP4_236A ,Color Palette 4_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP4_236R ,Color Palette 4_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP4_236G ,Color Palette 4_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP4_236B ,Color Palette 4_236 Blue" line.long 0x3B4 "CP4_237R,Color Palette 4 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP4_237A ,Color Palette 4_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP4_237R ,Color Palette 4_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP4_237G ,Color Palette 4_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP4_237B ,Color Palette 4_237 Blue" line.long 0x3B8 "CP4_238R,Color Palette 4 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP4_238A ,Color Palette 4_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP4_238R ,Color Palette 4_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP4_238G ,Color Palette 4_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP4_238B ,Color Palette 4_238 Blue" line.long 0x3BC "CP4_239R,Color Palette 4 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP4_239A ,Color Palette 4_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP4_239R ,Color Palette 4_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP4_239G ,Color Palette 4_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP4_239B ,Color Palette 4_239 Blue" line.long 0x3C0 "CP4_240R,Color Palette 4 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP4_240A ,Color Palette 4_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP4_240R ,Color Palette 4_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP4_240G ,Color Palette 4_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP4_240B ,Color Palette 4_240 Blue" line.long 0x3C4 "CP4_241R,Color Palette 4 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP4_241A ,Color Palette 4_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP4_241R ,Color Palette 4_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP4_241G ,Color Palette 4_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP4_241B ,Color Palette 4_241 Blue" line.long 0x3C8 "CP4_242R,Color Palette 4 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP4_242A ,Color Palette 4_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP4_242R ,Color Palette 4_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP4_242G ,Color Palette 4_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP4_242B ,Color Palette 4_242 Blue" line.long 0x3CC "CP4_243R,Color Palette 4 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP4_243A ,Color Palette 4_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP4_243R ,Color Palette 4_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP4_243G ,Color Palette 4_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP4_243B ,Color Palette 4_243 Blue" line.long 0x3D0 "CP4_244R,Color Palette 4 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP4_244A ,Color Palette 4_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP4_244R ,Color Palette 4_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP4_244G ,Color Palette 4_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP4_244B ,Color Palette 4_244 Blue" line.long 0x3D4 "CP4_245R,Color Palette 4 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP4_245A ,Color Palette 4_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP4_245R ,Color Palette 4_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP4_245G ,Color Palette 4_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP4_245B ,Color Palette 4_245 Blue" line.long 0x3D8 "CP4_246R,Color Palette 4 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP4_246A ,Color Palette 4_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP4_246R ,Color Palette 4_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP4_246G ,Color Palette 4_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP4_246B ,Color Palette 4_246 Blue" line.long 0x3DC "CP4_247R,Color Palette 4 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP4_247A ,Color Palette 4_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP4_247R ,Color Palette 4_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP4_247G ,Color Palette 4_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP4_247B ,Color Palette 4_247 Blue" line.long 0x3E0 "CP4_248R,Color Palette 4 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP4_248A ,Color Palette 4_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP4_248R ,Color Palette 4_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP4_248G ,Color Palette 4_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP4_248B ,Color Palette 4_248 Blue" line.long 0x3E4 "CP4_249R,Color Palette 4 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP4_249A ,Color Palette 4_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP4_249R ,Color Palette 4_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP4_249G ,Color Palette 4_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP4_249B ,Color Palette 4_249 Blue" line.long 0x3E8 "CP4_250R,Color Palette 4 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP4_250A ,Color Palette 4_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP4_250R ,Color Palette 4_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP4_250G ,Color Palette 4_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP4_250B ,Color Palette 4_250 Blue" line.long 0x3EC "CP4_251R,Color Palette 4 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP4_251A ,Color Palette 4_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP4_251R ,Color Palette 4_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP4_251G ,Color Palette 4_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP4_251B ,Color Palette 4_251 Blue" line.long 0x3F0 "CP4_252R,Color Palette 4 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP4_252A ,Color Palette 4_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP4_252R ,Color Palette 4_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP4_252G ,Color Palette 4_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP4_252B ,Color Palette 4_252 Blue" line.long 0x3F4 "CP4_253R,Color Palette 4 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP4_253A ,Color Palette 4_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP4_253R ,Color Palette 4_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP4_253G ,Color Palette 4_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP4_253B ,Color Palette 4_253 Blue" line.long 0x3F8 "CP4_254R,Color Palette 4 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP4_254A ,Color Palette 4_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP4_254R ,Color Palette 4_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP4_254G ,Color Palette 4_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP4_254B ,Color Palette 4_254 Blue" line.long 0x3FC "CP4_255R,Color Palette 4 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP4_255A ,Color Palette 4_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP4_255R ,Color Palette 4_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP4_255G ,Color Palette 4_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP4_255B ,Color Palette 4_255 Blue" tree.end width 9. base ad:0xFEB10000 tree "External Synchronization Control Registers" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0X01) group.long 0x00++0x03 line.long 0x00 "ESCR_0,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT Invert" "Not inverted,Inverted" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--5. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x00++0x03 line.long 0x00 "ESCR_0,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT Invert" "Not inverted,Inverted" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--4. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" endif group.long 0x04++0x03 line.long 0x00 "OTAR_0,Output Signal Timing Adjustment Register" bitfld.long 0x00 28.--30. " DEA ,DE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 24.--26. " CLAMPA ,CLAMP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 20.--22. " DRGBA ,Digital RGB Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 8.--10. " CDEA ,CDE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 4.--6. " DISPA ,DISP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 0.--2. " SYNCA ,SYNC Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" tree.end tree "Dual Display Output Control Registers" group.long 0x1000++0x3 line.long 0x00 "DORCR_0,Display Unit Output Route Control Register" bitfld.long 0x00 30. " PG_1_T ,Pin Generate 1 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 28. " DK_1_S ,Dot Clock Select 1" "Generator 0,Generator 1" textline " " bitfld.long 0x00 24.--25. " PG_1_D ,Pin Generate 1 Input Data Select" "Superposition processor 1,Superposition processor 2,Fixed to 0,DOOR" bitfld.long 0x00 21. " DR_0_D ,Display Output Route 0 Data Select" "Pin controller 1,Pin controller 1 at rising edge/Pin controller 2 at falling edge" textline " " bitfld.long 0x00 16.--17. " PG_0_D ,Pin Generate 0 Input Data Select" "Superposition processor 1,Superposition processor 2,Fixed to 0,DOOR" textline " " bitfld.long 0x00 4. " RGPV ,R-GP_2 V Blank Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 0. " DPRS ,Display Priority Register Select" "DPPR,DS_1_PR/DS_2_PR" group.long 0x1004++0x7 line.long 0x00 "DPTSR_0,Display Unit Plane Timing Select Register" bitfld.long 0x00 23. " P8DK ,Plane 8 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 22. " P7DK ,Plane 7 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 21. " P6DK ,Plane 6 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 20. " P5DK ,Plane 5 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 19. " P4DK ,Plane 4 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 18. " P3DK ,Plane 3 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 17. " P2DK ,Plane 2 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x00 16. " P1DK ,Plane 1 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 7. " P8TS ,Plane 8 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 6. " P7TS ,Plane 7 Timing Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 5. " P6TS ,Plane 6 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 4. " P5TS ,Plane 5 Timing Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 3. " P4TS ,Plane 4 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 2. " P3TS ,Plane 3 Timing Select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 1. " P2TS ,Plane 2 Timing Select" "Generator 0,Generator 1" bitfld.long 0x00 0. " P1TS ,Plane 1 Timing Select" "Generator 0,Generator 1" line.long 0x04 "DAPTSR_0,Display Unit Alpha Plane Timing Select Register" bitfld.long 0x04 17. " AP_2_DK ,Alpha Plane 2 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x04 16. " AP_1_DK ,Alpha Plane 1 Dot Clock Select" "Generator 0,Generator 1" textline " " bitfld.long 0x04 1. " AP_2_TS ,Alpha Plane 2 Dot Clock Select" "Generator 0,Generator 1" bitfld.long 0x04 0. " AP_1_TS ,Alpha Plane 1 Dot Clock Select" "Generator 0,Generator 1" group.long 0x1020++0x3 line.long 0x00 "DS_0_PR,Display Superimpose 0 Priority Register" bitfld.long 0x00 28.--31. " S0S8 ,Display Superimposition 0 Priority 8 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 24.--27. " S0S7 ,Display Superimposition 0 Priority 7 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 20.--23. " S0S6 ,Display Superimposition 0 Priority 6 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 16.--19. " S0S5 ,Display Superimposition 0 Priority 5 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 12.--15. " S0S4 ,Display Superimposition 0 Priority 4 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 8.--11. " S0S3 ,Display Superimposition 0 Priority 3 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 4.--7. " S0S2 ,Display Superimposition 0 Priority 2 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 0.--3. " S0S1 ,Display Superimposition 0 Priority 1 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." group.long 0x1024++0x3 line.long 0x00 "DS_1_PR,Display Superimpose 1 Priority Register" bitfld.long 0x00 28.--31. " S1S8 ,Display Superimposition 1 Priority 8 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 24.--27. " S1S7 ,Display Superimposition 1 Priority 7 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 20.--23. " S1S6 ,Display Superimposition 1 Priority 6 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 16.--19. " S1S5 ,Display Superimposition 1 Priority 5 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 12.--15. " S1S4 ,Display Superimposition 1 Priority 4 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 8.--11. " S1S3 ,Display Superimposition 1 Priority 3 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 4.--7. " S1S2 ,Display Superimposition 1 Priority 2 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 0.--3. " S12S1 ,Display Superimposition 1 Priority 1 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." tree.end width 7. tree "YC-RGB Conversion Coefficient Registers" tree "YC-RGB Conversion Before Superpositioning" group.long 0x1080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y Normalization Coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y Normalization Coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y Normalization Offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y Normalization Offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr Normalization Offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr Normalization Offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb Normalization Offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb Normalization Offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr Coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr Coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr Coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr Coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb Coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb Coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr Coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr Coefficient 1" tree.end tree "YC-RGB Conversion After Superpositioning" group.long 0x4080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y Normalization Coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y Normalization Coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y Normalization Offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y Normalization Offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr Normalization Offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr Normalization Offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb Normalization Offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb Normalization Offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr Coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr Coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr Coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr Coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb Coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb Coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr Coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr Coefficient 1" tree.end tree.end width 0xb tree.end tree "DU 1" base ad:0xFEB30000 width 13. tree "Display Control Registers" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "DSYSR_1,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input Pad Latch Timing Select" "Rising edge,Falling edge" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 16. " IUPD ,Internal Updating Disable" "No,Yes" textline " " bitfld.long 0x00 8.--9. " DRES/DEN ,Display Reset/Display Enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." else group.long 0x00++0x03 line.long 0x00 "DSYSR_1,Display Unit System Control Register" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 16. " IUPD ,Internal Updating Disable" "No,Yes" bitfld.long 0x00 8.--9. " DRES/DEN ,Display Reset/Display Enable" "Started (display DOOR),Started (display memory),Stopped,?..." textline " " bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." endif textline "" group.long 0x04++0x03 line.long 0x00 "DSMR_1,Display Mode Register" bitfld.long 0x00 28. " VSPM ,VSYNC Pin Mode" "VSYNC signal,CSYNC signal" bitfld.long 0x00 27. " ODPM ,ODDF Pin Mode" "ODDF signal,CLAMP signal" bitfld.long 0x00 25.--26. " DIPM ,DISP Pin Mode" "DISP signal,CSYNC signal,,DE signal" textline " " bitfld.long 0x00 24. " CSPM ,CSYNC Pin Mode" "CSYNC signal,HSYNC signal" bitfld.long 0x00 19. " DIL ,DISP Polarity Selection" "High-active,Polarity inverted" bitfld.long 0x00 18. " VSL ,VSYNC Polarity Selection" "Low-active,Polarity inverted" textline " " bitfld.long 0x00 17. " HSL ,HSYNC Polarity Selection" "Low-active,Polarity inverted" bitfld.long 0x00 16. " DDIS ,DISP Output Disable" "No,Yes" bitfld.long 0x00 15. " CDEL ,CDE Polarity Selection" "High-active,Polarity inverted" textline " " bitfld.long 0x00 13.--14. " CDEM ,CDE Output Mode" "Normal mode,Normal mode,Low level,High level" bitfld.long 0x00 12. " CDED ,CDE Disable" "No,Yes" bitfld.long 0x00 8. " ODEV ,ODD Signal Polarity Selection" "Low level,High level" textline " " bitfld.long 0x00 6.--7. " CSY ,CSYNC Mode" "Mode 0,,Mode 2,Mode 3" rgroup.long 0x08++0x03 line.long 0x00 "DSSR_1,Display Status Register" bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag(EXVSYNC)" "Detected,Not detected" bitfld.long 0x00 14. " FRM ,Frame Flag" "Low,High" bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Low,High" textline " " bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Low,High" wgroup.long 0x0C++0x03 line.long 0x00 "DSRCR_1,Display Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" group.long 0x10++0x03 line.long 0x00 "DIER_1,Display Unit Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "DEFR_1,Display Unit Extensional Function Enable Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR Enabling Code [0x7773]" bitfld.long 0x00 12. " EXSL ,External Sync Signal Select" "Post-divison clocks,Pre-divison clocks" bitfld.long 0x00 11. " EXVL ,External Vsync Latch Select" "Every clock cycle,Rising edge" base ad:0xFEB20000 rgroup.long 0x8008++0x3 line.long 0x00 "DD_1_SSR_1,Display Unit Domain 1 Status Register 1" bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag" "Not occurred,Occurred" bitfld.long 0x00 14. " FRM ,Frame Flag" "Not occurred,Occurred" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Not occurred,Occurred" bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "Not occurred,Occurred" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto Rendering Display Change Flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto Rendering Display Change Flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto Rendering Display Change Flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto Rendering Display Change Flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto Rendering Display Change Flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto Rendering Display Change Flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto Rendering Display Change Flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto Rendering Display Change Flag 1" "Not switched,Switched" wgroup.long 0x800C++0x03 line.long 0x00 "DD_1_DSRCR_1,Display Unit Domain 1 Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" group.long 0x10++0x3 line.long 0x00 "DD_1_IER_1,Display Unit Domain 1 Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" group.long 0x28++0x3 line.long 0x00 "DIDSR,Display Unit Input Dot Clock Select Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DIDSR Enabling Code" bitfld.long 0x00 12.--13. " LDCS_2 ,DU_2 LVDS Dot Clock Select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 10.--11. " LDCS_1 ,DU_1 LVDS Dot Clock Select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" textline " " bitfld.long 0x00 8.--9. " LDCS_0 ,DU_0 LVDS Dot Clock Select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 4.--5. " PDCS_2 ,DU_2 Pad Dot Clock Select" "DU_DOTCLKIN2,DU_DOTCLKIN0,DU_DOTCLKIN2,DU_DOTCLKIN1" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 Pad Dot Clock Select" "DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN2" textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 Pad Dot Clock Select" "DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN2" tree.end base ad:0xFEB30000 tree "Display Timing Generation Registers" width 11. group.long 0x40++0x1F line.long 0x00 "HDSR_1,Horizontal Display Start Register" hexmask.long.word 0x00 0.--9. 1. " HDS ,Horizontal Display Start" line.long 0x04 "HDER_1,Horizontal Display End Register" hexmask.long.word 0x04 0.--11. 1. " HDE ,Horizontal Display End" line.long 0x08 "VDSR_1,Vertical Display Start Register" hexmask.long.word 0x08 0.--8. 1. " VDS ,Vertical Display Start" line.long 0x0c "VDER_1,Vertical Display End Register" hexmask.long.word 0x0c 0.--10. 1. " VDE ,Vertical Display End" line.long 0x10 "HCR_1,Horizontal Cycle Register" hexmask.long.word 0x10 0.--11. 1. " HC ,Horizontal Cycle" line.long 0x14 "HSWR_1,Horizontal Sync Width Register" hexmask.long.word 0x14 0.--8. 1. " HSW ,Horizontal Sync Width" line.long 0x18 "VCR_1,Vertical Cycle Register" hexmask.long.word 0x18 0.--10. 1. " VC ,Vertical Cycle" line.long 0x1c "VSPR_1,Vertical Sync Point Register" hexmask.long.word 0x1c 0.--10. 1. " VSP ,Vertical Sync Point" if (((per.l(ad:0xFEB30000+0x04))&0x80)==0x80) group.long (0x60)++0x7 line.long 0x00 "EQWR_1,Equal Pulse Width Register" hexmask.long.byte 0x00 0.--6. 1. " EQW ,Equal Pulse Width" line.long 0x04 "SPWR_1,Serration Width Register" hexmask.long.word 0x04 0.--9. 1. " SPW ,Serration Width" else hgroup.long 0x60++0x3 hide.long 0x00 "EQWR_1,Equal Pulse Width Register" hgroup.long 0x64++0x3 hide.long 0x00 "SPWR_1,Separation Width Register" endif group.long 0x70++0xF line.long 0x00 "CLAMPSR_1,CLAMP Signal Start Register" hexmask.long.word 0x00 0.--11. 1. " CLAMPS ,CLAMP Signal Start" line.long 0x04 "CLAMPWR_1,CLAMP Signal Width Register" hexmask.long.word 0x04 0.--11. 1. " CLAMPW ,CLAMP Signal Width" line.long 0x08 "DESR_1,DE Signal Start Register" hexmask.long.word 0x08 0.--11. 1. " DES ,DE Signal Start" line.long 0x0c "DEWR_1,DE Signal Width Register" hexmask.long.word 0x0c 0.--11. 1. " DEW ,DE Signal Width" tree.end width 11. tree "Display Attribute Registers" group.long 0x80++0xF line.long 0x0 "CP_1_TR_1,Color Palette Transparent Color Register" bitfld.long 0x0 15. " CP_1_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x0 14. " CP_1_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x0 13. " CP_1_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x0 12. " CP_1_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x0 11. " CP_1_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x0 10. " CP_1_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x0 9. " CP_1_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x0 8. " CP_1_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x0 7. " CP_1_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x0 6. " CP_1_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x0 5. " CP_1_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x0 4. " CP_1_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x0 3. " CP_1_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x0 2. " CP_1_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x0 1. " CP_1_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x0 0. " CP_1_I0 ,Color Palette Index 0" "Not set,Set" line.long 0x4 "CP_2_TR_1,Color Palette Transparent Color Register" bitfld.long 0x4 15. " CP_2_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x4 14. " CP_2_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x4 13. " CP_2_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x4 12. " CP_2_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x4 11. " CP_2_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x4 10. " CP_2_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x4 9. " CP_2_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x4 8. " CP_2_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x4 7. " CP_2_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x4 6. " CP_2_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x4 5. " CP_2_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x4 4. " CP_2_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x4 3. " CP_2_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x4 2. " CP_2_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x4 1. " CP_2_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x4 0. " CP_2_I0 ,Color Palette Index 0" "Not set,Set" line.long 0x8 "CP_3_TR_1,Color Palette Transparent Color Register" bitfld.long 0x8 15. " CP_3_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0x8 14. " CP_3_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0x8 13. " CP_3_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0x8 12. " CP_3_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0x8 11. " CP_3_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0x8 10. " CP_3_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0x8 9. " CP_3_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0x8 8. " CP_3_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0x8 7. " CP_3_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0x8 6. " CP_3_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0x8 5. " CP_3_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0x8 4. " CP_3_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0x8 3. " CP_3_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0x8 2. " CP_3_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0x8 1. " CP_3_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0x8 0. " CP_3_I0 ,Color Palette Index 0" "Not set,Set" line.long 0xC "CP_4_TR_1,Color Palette Transparent Color Register" bitfld.long 0xC 15. " CP_4_IF ,Color Palette Index F" "Not set,Set" bitfld.long 0xC 14. " CP_4_IE ,Color Palette Index E" "Not set,Set" bitfld.long 0xC 13. " CP_4_ID ,Color Palette Index D" "Not set,Set" bitfld.long 0xC 12. " CP_4_IC ,Color Palette Index C" "Not set,Set" textline " " bitfld.long 0xC 11. " CP_4_IB ,Color Palette Index B" "Not set,Set" bitfld.long 0xC 10. " CP_4_IA ,Color Palette Index A" "Not set,Set" bitfld.long 0xC 9. " CP_4_I9 ,Color Palette Index 9" "Not set,Set" bitfld.long 0xC 8. " CP_4_I8 ,Color Palette Index 8" "Not set,Set" textline " " bitfld.long 0xC 7. " CP_4_I7 ,Color Palette Index 7" "Not set,Set" bitfld.long 0xC 6. " CP_4_I6 ,Color Palette Index 6" "Not set,Set" bitfld.long 0xC 5. " CP_4_I5 ,Color Palette Index 5" "Not set,Set" bitfld.long 0xC 4. " CP_4_I4 ,Color Palette Index 4" "Not set,Set" textline " " bitfld.long 0xC 3. " CP_4_I3 ,Color Palette Index 3" "Not set,Set" bitfld.long 0xC 2. " CP_4_I2 ,Color Palette Index 2" "Not set,Set" bitfld.long 0xC 1. " CP_4_I1 ,Color Palette Index 1" "Not set,Set" bitfld.long 0xC 0. " CP_4_I0 ,Color Palette Index 0" "Not set,Set" group.long 0x90++0xF line.long 0x00 "DOOR_1,Display-Off Mode Output Register" hexmask.long.byte 0x00 18.--23. 1. " DOR ,Display Off Mode Output Red" hexmask.long.byte 0x00 10.--15. 1. " DOG ,Display Off Mode Output Green" hexmask.long.byte 0x00 2.--7. 1. " DOB ,Display Off Mode Output Blue" line.long 0x04 "CDER_1,Color Detection Register" hexmask.long.byte 0x04 18.--23. 1. " CDR ,Color Detection Red" hexmask.long.byte 0x04 10.--15. 1. " CDG ,Color Detection Green" hexmask.long.byte 0x04 2.--7. 1. " CDB ,Color Detection Blue" line.long 0x08 "BPOR_1,Ground Color Register" hexmask.long.byte 0x08 18.--23. 1. " BPOR ,Background Plane Output Red" hexmask.long.byte 0x08 10.--15. 1. " BPOG ,Background Plane Output Green" hexmask.long.byte 0x08 2.--7. 1. " BPOB ,Background Plane Output Blue" line.long 0x0c "RINTOFSR_1,Raster Interrupt Offset Register" hexmask.long.word 0x0c 0.--10. 1. " RINTOFS ,Raster Interrupt Offset" tree.end tree.open "Display Planes 1-8" tree.end tree "Alpha-Ratio Planes 1-8" tree.end base ad:0xFEB30000 tree "Display Capture Registers" tree.end tree "Color Palette 1 Registers" tree.end tree "Color Palette 2 Registers" tree.end tree "Color Palette 3 Registers" tree.end tree "Color Palette 4 Registers" tree.end width 9. base ad:0xFEB30000 tree "External Synchronization Control Registers" if (((per.l(ad:0xFEB30000+0x20))&0x01)==0X01) group.long 0x00++0x03 line.long 0x00 "ESCR_1,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT Invert" "Not inverted,Inverted" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--5. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x00++0x03 line.long 0x00 "ESCR_1,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT Invert" "Not inverted,Inverted" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--4. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" endif group.long 0x04++0x03 line.long 0x00 "OTAR_1,Output Signal Timing Adjustment Register" bitfld.long 0x00 28.--30. " DEA ,DE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 24.--26. " CLAMPA ,CLAMP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 20.--22. " DRGBA ,Digital RGB Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 8.--10. " CDEA ,CDE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 4.--6. " DISPA ,DISP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 0.--2. " SYNCA ,SYNC Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" tree.end tree "Dual Display Output Control Registers" tree.end width 7. tree "YC-RGB Conversion Coefficient Registers" tree "YC-RGB Conversion Before Superpositioning" tree.end tree "YC-RGB Conversion After Superpositioning" tree.end tree.end width 0xb tree.end tree "DU 2" base ad:0xFEB40000 width 13. tree "Display Control Registers" if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "DSYSR_2,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input Pad Latch Timing Select" "Rising edge,Falling edge" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 16. " IUPD ,Internal Updating Disable" "No,Yes" textline " " bitfld.long 0x00 8.--9. " DRES/DEN ,Display Reset/Display Enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM ,Scan Mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" else group.long 0x00++0x03 line.long 0x00 "DSYSR_2,Display Unit System Control Register" bitfld.long 0x00 20. " DSEC ,Display Data Endian Change" "Not performed,Performed" bitfld.long 0x00 6.--7. " TVM ,TV Synchronization Mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." textline " " bitfld.long 0x00 4.--5. " SCM_1 ,Scan Mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" endif textline "" group.long 0x04++0x03 line.long 0x00 "DSMR_2,Display Mode Register" bitfld.long 0x00 28. " VSPM ,VSYNC Pin Mode" "VSYNC signal,CSYNC signal" bitfld.long 0x00 27. " ODPM ,ODDF Pin Mode" "ODDF signal,CLAMP signal" bitfld.long 0x00 25.--26. " DIPM ,DISP Pin Mode" "DISP signal,CSYNC signal,,DE signal" textline " " bitfld.long 0x00 24. " CSPM ,CSYNC Pin Mode" "CSYNC signal,HSYNC signal" bitfld.long 0x00 19. " DIL ,DISP Polarity Selection" "High-active,Polarity inverted" bitfld.long 0x00 18. " VSL ,VSYNC Polarity Selection" "Low-active,Polarity inverted" textline " " bitfld.long 0x00 17. " HSL ,HSYNC Polarity Selection" "Low-active,Polarity inverted" bitfld.long 0x00 16. " DDIS ,DISP Output Disable" "No,Yes" bitfld.long 0x00 15. " CDEL ,CDE Polarity Selection" "High-active,Polarity inverted" textline " " bitfld.long 0x00 13.--14. " CDEM ,CDE Output Mode" "Normal mode,Normal mode,Low level,High level" bitfld.long 0x00 12. " CDED ,CDE Disable" "No,Yes" bitfld.long 0x00 8. " ODEV ,ODD Signal Polarity Selection" "Low level,High level" textline " " bitfld.long 0x00 6.--7. " CSY ,CSYNC Mode" "Mode 0,,Mode 2,Mode 3" rgroup.long 0x08++0x03 line.long 0x00 "DSSR_2,Display Status Register" bitfld.long 0x00 30.--31. " VC_1_FB ,Video Capture Frame 1 Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 28.--29. " VC_0_FB ,Video Capture Frame 0 Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 26.--27. " VC_2_FB ,Video Capture 2 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 25. " DFB10 ,Display Frame Buffer 10 Flag" "AP_2_DSA_0_R,AP_2_DSA_1_R" bitfld.long 0x00 24. " DFB_9 ,Display Frame Buffer 9 Flag" "AP_1_DSA_0_R,AP_1_DSA_1_R" bitfld.long 0x00 23. " DFB_8 ,Display Frame Buffer 8 Flag" "P8DSA_0_R,P8DSA_1_R" textline " " bitfld.long 0x00 22. " DFB_7 ,Display Frame Buffer 7 Flag" "AP_7_DSA_0_R,AP_7_DSA_1_R" bitfld.long 0x00 21. " DFB_6 ,Display Frame Buffer 6 Flag" "AP_6_DSA_0_R,AP_6_DSA_1_R" bitfld.long 0x00 22. " DFB_5 ,Display Frame Buffer 5 Flag" "AP_5_DSA_0_R,AP_5_DSA_1_R" textline " " bitfld.long 0x00 19. " DFB_4 ,Display Frame Buffer 4 Flag" "P4DSA_0_R,P4DSA_1_R" bitfld.long 0x00 18. " DFB_3 ,Display Frame Buffer 3 Flag" "P3DSA_0_R,P3DSA_1_R" bitfld.long 0x00 17. " DFB_2 ,Display Frame Buffer 2 Flag" "P2DSA_0_R,P2DSA_1_R" textline " " bitfld.long 0x00 16. " DFB_1 ,Display Frame Buffer 1 Flag" "P1DSA_0_R,P1DSA_1_R" textline " " bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag(EXVSYNC)" "Detected,Not detected" bitfld.long 0x00 14. " FRM ,Frame Flag" "Low,High" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Low,High" bitfld.long 0x00 9. " RINT ,Raster Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK ,Horizontal Blanking Flag" "Low,High" wgroup.long 0x0C++0x03 line.long 0x00 "DSRCR_2,Display Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer Underflow Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" group.long 0x10++0x0b line.long 0x00 "DIER_2,Display Unit Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer Underflow Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" line.long 0x04 "CPCR_2,Color Palette Control Register" bitfld.long 0x04 19. " CP_4_CE ,Color Palette 4 Change Enable" "Disabled,Enabled" bitfld.long 0x04 18. " CP_3_CE ,Color Palette 3 Change Enable" "Disabled,Enabled" bitfld.long 0x04 17. " CP_2_CE ,Color Palette 2 Change Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " CP_1_CE ,Color Palette 1 Change Enable" "Disabled,Enabled" line.long 0x08 "DPPR_2,Display Plane Priority Register" bitfld.long 0x08 31. " DPE_8 ,Display Plane Priority 8 Enable" "Disabled,Enabled" bitfld.long 0x08 28.--30. " DPS_8 ,Display Plane Priority 8 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 27. " DPE_7 ,Display Plane Priority 7 Enable" "Disabled,Enabled" bitfld.long 0x08 24.--26. " DPS_7 ,Display Plane Priority 7 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 23. " DPE_6 ,Display Plane Priority 6 Enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " DPS_6 ,Display Plane Priority 6 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 19. " DPE_5 ,Display Plane Priority 5 Enable" "Disabled,Enabled" bitfld.long 0x08 16.--18. " DPS_5 ,Display Plane Priority 5 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 15. " DPE_4 ,Display Plane Priority 4 Enable" "Disabled,Enabled" bitfld.long 0x08 12.--14. " DPS_4 ,Display Plane Priority 4 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 11. " DPE_3 ,Display Plane Priority 3 Enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " DPS_3 ,Display Plane Priority 3 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 7. " DPE_2 ,Display Plane Priority 2 Enable" "Disabled,Enabled" bitfld.long 0x08 4.--6. " DPS_2 ,Display Plane Priority 2 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 3. " DPE_1 ,Display Plane Priority 1 Enable" "Disabled,Enabled" bitfld.long 0x08 0.--2. " DPS_1 ,Display Plane Priority 1 Select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" group.long 0x20++0x03 line.long 0x00 "DEFR_2,Display Unit Extensional Function Enable Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR Enabling Code [0x7773]" bitfld.long 0x00 12. " EXSL ,External Sync Signal Select" "Post-divison clocks,Pre-divison clocks" bitfld.long 0x00 11. " EXVL ,External Vsync Latch Select" "Every clock cycle,Rising edge" textline " " bitfld.long 0x00 5. " EXUP ,External Updating Mode" "Internal,External" bitfld.long 0x00 4. " VCUP ,Vertical Cycle Register Update Timing Select" "Falling VSYNC,Rising VSYNC" bitfld.long 0x00 0. " DEFE ,Display Unit Extensional Function Enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "DAPCR_2,Display Alpha Ratio Plane Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code To make DAPCR accessible [0x7773]" bitfld.long 0x00 4. " AP_2_E ,Alpha Ratio Plane 2 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " AP_1_E ,Alpha Ratio Plane 1 Enable" "Disabled,Enabled" if ((((per.l(ad:0xFEB40000+0x34))&0x1)==0x1)&&(((per.l(ad:0xFEB40000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_2,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display Capture A Bit 2 Function Select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display Capture Data 2 Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display Capture 2 Enable" "Disabled,Enabled" bitfld.long 0x00 5. " CAB ,Display Capture A Bit Function Select" "0,1" bitfld.long 0x00 4. " CDF ,Display Capture Data Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB40000+0x34))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_2,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 5. " CAB ,Display Capture A Bit Function Select" "0,1" bitfld.long 0x00 4. " CDF ,Display Capture Data Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB40000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_2,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display Capture A Bit 2 Function Select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display Capture Data 2 Format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display Capture 2 Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" else group.long 0x28++0x03 line.long 0x00 "DCPCR_2,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7773]" bitfld.long 0x00 0. " DCE ,Display Capture Enable" "Disabled,Enabled" endif group.long 0x34++0x03 line.long 0x00 "DEFR22,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7775]" bitfld.long 0x00 0. " DEFE_2_G ,Display Unit Extensional Function Enable SHNavi_2_G" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "DEFR32,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7776]" bitfld.long 0x00 0. " DEFE_3 ,Display Unit Extensional Function Enable from SH-Navi3" "Disabled,Enabled" group.long 0x3c++0x03 line.long 0x00 "DEFR42,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register Available Code [0x7777]" bitfld.long 0x00 5. " LRUO ,LRU Function Off" "No,yes" rgroup.long 0x60++0x03 line.long 0x00 "DVCSR_2,Display Unit Video Capture Status Register" bitfld.long 0x00 22.--23. " VC_3_FB_2 ,Video Capture 3 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 20.--21. " VC_2_FB_2 ,Video Capture 2 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 18.--19. " VC_1_FB_2 ,Video Capture 1 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 16.--17. " VC_0_FB_2 ,Video Capture 0 Frame Buffer Flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 6.--7. " VC_3_FB ,Video Capture 3 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 4.--5. " VC_2_FB ,Video Capture 2 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 2.--3. " VC_1_FB ,Video Capture 1 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 0.--1. " VC_0_FB ,Video Capture 0 Frame Buffer Flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" group.long 0xE0++0xB line.long 0x00 "DEFR52,Display Unit Extensional Function Enable Register 5" hexmask.long.byte 0x00 24.--31. 1. " CODE ,DEFR_5 Enabling Code [0x66]" bitfld.long 0x00 14.--15. " YCRGB_2 ,YC-RGB Select 2" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 12.--13. " YCRGB_1 ,YC-RGB Select 1" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" textline " " bitfld.long 0x00 10.--11. " DRC_1 ,DRC Select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 8.--9. " DRC_1 ,DRC Select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 2. " DRCS ,DRC Select" "Processor 0,Processor 1" textline " " bitfld.long 0x00 0. " DEFE_5 ,Display Unit Extensional Function Enable 5" "Disabled,Enabled" line.long 0x04 "DDLTR_2,Display Data Latency Adjustment Register" hexmask.long.word 0x04 16.--31. 1. " CODE ,DDLTR Enabling Code [0x7766]" bitfld.long 0x04 6. " DLAR_1 ,Display Data Latency Adjustment RGBYC2" "No delay,Delay" bitfld.long 0x04 5. " DLAY_1 ,Display Data Latency Adjustment YCRGB2" "No delay,Delay" textline " " bitfld.long 0x04 4. " DLAD_1 ,Display Data Latency Adjustment DRC1" "No delay,Delay" bitfld.long 0x04 1. " DLAY_0 ,Display Data Latency Adjustment YCRGB0" "No delay,Delay" bitfld.long 0x04 0. " DLAD_0 ,Display Data Latency Adjustment DRC0" "No delay,Delay" line.long 0x08 "DEFR62,Display Unit Extensional Function Enable Register 6" hexmask.long.word 0x08 16.--31. 1. " CODE ,DEFR_6 Enabling Code [0x7778]" bitfld.long 0x08 10.--11. " ODPM12 ,ODDF Pin Mode 22" "ODMP2,,DISP,CDE" bitfld.long 0x08 8.--9. " ODPM02 ,ODDF Pin Mode 12" "ODMP2,,DISP,CDE" textline " " bitfld.long 0x08 4. " TCNE_0 ,T-CON Enable 0" "Disabled,Enabled" bitfld.long 0x08 2. " MLOS_1 ,DMultiple Output Select 1" "24-bit,12-bit" base ad:0xFEB60000 rgroup.long 0x08++0x3 line.long 0x00 "DD_1_SSR_2,Display Unit Domain 1 Status Register 2" bitfld.long 0x00 15. " TVR ,TV Synchronization Error Flag" "Not occurred,Occurred" bitfld.long 0x00 14. " FRM ,Frame Flag" "Not occurred,Occurred" bitfld.long 0x00 12. " BUF ,Buffer Underflow Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical Blanking Flag" "Not occurred,Occurred" wgroup.long 0x0C++0x3 line.long 0x00 "DSRCR_2,Display Unit Domain 1 Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV Synchronization Signal Error Flag Clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame Flag Clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer Underflow Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical Blanking Flag Clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster Interrupt Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal Blanking Flag Clear" "No effect,Clear" group.long 0x10++0x3 line.long 0x00 "DD_1_IER_2,Display Unit Domain 1 Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal Error Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer Underflow Flag Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical Blanking Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster Interrupt Flag Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK Flag Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x7 line.long 0x00 "DEF_8_R2,Display Unit Extensional FunctionControl 8 Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF_8_Rm Enabling Code" bitfld.long 0x00 6. " VSCS ,VSP_1 Channel Select" "DU1/DU_0 plane 2,DU_2 plane 1" bitfld.long 0x00 4.--5. " DRGBS ,Digital RGB Output Select" "DU0,DU1,DU2,?..." textline " " bitfld.long 0x00 0. " DEFE_8 ,Display Unit Extensional Function Enable 8" "Disabled,Enabled" line.long 0x04 "DOFLR_2,Display Unit Output Signal Fixed Level Register 2" hexmask.long.word 0x04 16.--31. 1. " CODE ,DOFLR_2 Enabling Code" bitfld.long 0x04 13. " HSYCFL_1 ,HSYNC (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 12. " VSYCFL_1 ,VSYNC (DU1) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 11. " ODDFL_1 ,ODDF (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 10. " DISPFL_1 ,DISP (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 9. " CDEFL_1 ,CDE (DU1) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 8. " RGBFL_1 ,RGB (DU1) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 5. " HSYCFL_0 ,HSYNC (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 4. " VSYCFL_0 ,VSYNC (DU0) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 3. " ODDFL_0 ,ODDF (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 2. " DISPFL_0 ,DISP (DU0) Signal Fixed Low Level" "Normal,Fixed low" bitfld.long 0x04 1. " CDEFL_0 ,CDE (DU0) Signal Fixed Low Level" "Normal,Fixed low" textline " " bitfld.long 0x04 0. " RGBFL_0 ,RGB (DU0) Signal Fixed Low Level" "Normal,Fixed low" tree.end base ad:0xFEB40000 tree "Display Timing Generation Registers" width 11. group.long 0x40++0x1F line.long 0x00 "HDSR_2,Horizontal Display Start Register" hexmask.long.word 0x00 0.--9. 1. " HDS ,Horizontal Display Start" line.long 0x04 "HDER_2,Horizontal Display End Register" hexmask.long.word 0x04 0.--11. 1. " HDE ,Horizontal Display End" line.long 0x08 "VDSR_2,Vertical Display Start Register" hexmask.long.word 0x08 0.--8. 1. " VDS ,Vertical Display Start" line.long 0x0c "VDER_2,Vertical Display End Register" hexmask.long.word 0x0c 0.--10. 1. " VDE ,Vertical Display End" line.long 0x10 "HCR_2,Horizontal Cycle Register" hexmask.long.word 0x10 0.--11. 1. " HC ,Horizontal Cycle" line.long 0x14 "HSWR_2,Horizontal Sync Width Register" hexmask.long.word 0x14 0.--8. 1. " HSW ,Horizontal Sync Width" line.long 0x18 "VCR_2,Vertical Cycle Register" hexmask.long.word 0x18 0.--10. 1. " VC ,Vertical Cycle" line.long 0x1c "VSPR_2,Vertical Sync Point Register" hexmask.long.word 0x1c 0.--10. 1. " VSP ,Vertical Sync Point" if (((per.l(ad:0xFEB40000+0x04))&0x80)==0x80) group.long (0x60)++0x7 line.long 0x00 "EQWR_2,Equal Pulse Width Register" hexmask.long.byte 0x00 0.--6. 1. " EQW ,Equal Pulse Width" line.long 0x04 "SPWR_2,Serration Width Register" hexmask.long.word 0x04 0.--9. 1. " SPW ,Serration Width" else hgroup.long 0x60++0x3 hide.long 0x00 "EQWR_2,Equal Pulse Width Register" hgroup.long 0x64++0x3 hide.long 0x00 "SPWR_2,Separation Width Register" endif group.long 0x70++0xF line.long 0x00 "CLAMPSR_2,CLAMP Signal Start Register" hexmask.long.word 0x00 0.--11. 1. " CLAMPS ,CLAMP Signal Start" line.long 0x04 "CLAMPWR_2,CLAMP Signal Width Register" hexmask.long.word 0x04 0.--11. 1. " CLAMPW ,CLAMP Signal Width" line.long 0x08 "DESR_2,DE Signal Start Register" hexmask.long.word 0x08 0.--11. 1. " DES ,DE Signal Start" line.long 0x0c "DEWR_2,DE Signal Width Register" hexmask.long.word 0x0c 0.--11. 1. " DEW ,DE Signal Width" tree.end width 11. tree "Display Attribute Registers" group.long 0x90++0xF line.long 0x00 "DOOR_2,Display-Off Mode Output Register" hexmask.long.byte 0x00 18.--23. 1. " DOR ,Display Off Mode Output Red" hexmask.long.byte 0x00 10.--15. 1. " DOG ,Display Off Mode Output Green" hexmask.long.byte 0x00 2.--7. 1. " DOB ,Display Off Mode Output Blue" line.long 0x04 "CDER_2,Color Detection Register" hexmask.long.byte 0x04 18.--23. 1. " CDR ,Color Detection Red" hexmask.long.byte 0x04 10.--15. 1. " CDG ,Color Detection Green" hexmask.long.byte 0x04 2.--7. 1. " CDB ,Color Detection Blue" line.long 0x08 "BPOR_2,Ground Color Register" hexmask.long.byte 0x08 18.--23. 1. " BPOR ,Background Plane Output Red" hexmask.long.byte 0x08 10.--15. 1. " BPOG ,Background Plane Output Green" hexmask.long.byte 0x08 2.--7. 1. " BPOB ,Background Plane Output Blue" line.long 0x0c "RINTOFSR_2,Raster Interrupt Offset Register" hexmask.long.word 0x0c 0.--10. 1. " RINTOFS ,Raster Interrupt Offset" tree.end tree.open "Display Planes 1-8" tree.open "Display Plane 1" base (ad:0xFEB40000+0x100) width 10. group.long 0x00++0x03 line.long 0x00 "P1MR,Plane 1 Mode Register" bitfld.long 0x00 26.--27. " P1VISL ,Plane 1 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P1YCDF ,Plane 1 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P1TC ,Plane 1 Transparent Color" "P1TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P1SPM ,Plane 1 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P1CPSL ,Plane 1 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P1DDF ,Plane 1 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P1MWR,Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P1MWX ,Plane 1 Memory Width X" if (((per.l(ad:0xFEB40000+0x100))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P1ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P1ABIT ,Plane 1 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P1BRSL ,Plane 1 Blend Ratio Selection" "P1ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P1ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P1ALPHA ,Plane 1 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P1ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P1ABIT ,Plane 1 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P1ALPHA ,Plane 1 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P1DPY ,Plane 1 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P1DPY ,Plane 1 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P1SPXR,Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P1SPX ,Plane 1 Starting Position X" line.long 0x04 "P1SPYR,Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P1SPY ,Plane 1 Starting Position Y" line.long 0x08 "P1WASPR,Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P1WASPY ,Plane 1 Wrap Around Starting Position Y" line.long 0x0C "P1WAMWR,Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P1WAMWY ,Plane 1 Wrap Around Memory Width Y" line.long 0x10 "P1BTR,Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P1BTA ,Plane 1 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P1BTB ,Plane 1 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P1TC1R,Plane 1 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P1TC1 ,Plane 1 Transparent Color 1" line.long 0x04 "P1TC2R,Plane 1 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P1TC2 ,Plane 1 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P1TC3R,Plane 1 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P1TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P1TC3 ,Plane 1 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P1MLR,Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P1MLY ,Plane 1 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P1SWAPR,Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P1DIGN ,Plane 1 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P1SPQW ,Plane 1 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P1SPLW ,Plane 1 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P1SPWD ,Plane 1 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P1SPBY ,Plane 1 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P1DDCR,Plane 1 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P1DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P1LRGB1 ,Plane 1 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P1LRGB0 ,Plane 1 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P1DDCR2,Plane 1 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P1DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P1NV21 ,Plane 1 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P1Y420 ,Plane 1 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P1DIVU ,Plane 1 UV Data from Divided YUV" "P1DDF bit of P1MR,UV data" textline " " bitfld.long 0x00 0. " P1DIVY ,Plane 1 Y Data from Divided YUV" "P1DDF bit of P1MR,Y data" group.long 0x90++0x03 line.long 0x00 "P1DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P1DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P1SDFS ,Plane 1 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P1EDF ,Plane 1 Extensional Data Format" "P1DDF bit of P1MR/P1LRGB1 or P1LRGB0 bit in P1DDCR/P1DIVU or P1DIVY bit in P1DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 2" base (ad:0xFEB40000+0x200) width 10. group.long 0x00++0x03 line.long 0x00 "P2MR,Plane 2 Mode Register" bitfld.long 0x00 26.--27. " P2VISL ,Plane 2 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P2YCDF ,Plane 2 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P2TC ,Plane 2 Transparent Color" "P2TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P2SPM ,Plane 2 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P2CPSL ,Plane 2 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P2DDF ,Plane 2 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P2MWR,Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P2MWX ,Plane 2 Memory Width X" if (((per.l(ad:0xFEB40000+0x200))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P2ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P2ABIT ,Plane 2 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P2BRSL ,Plane 2 Blend Ratio Selection" "P2ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P2ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P2ALPHA ,Plane 2 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P2ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P2ABIT ,Plane 2 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P2ALPHA ,Plane 2 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P2DPY ,Plane 2 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P2DPY ,Plane 2 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P2SPXR,Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P2SPX ,Plane 2 Starting Position X" line.long 0x04 "P2SPYR,Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P2SPY ,Plane 2 Starting Position Y" line.long 0x08 "P2WASPR,Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P2WASPY ,Plane 2 Wrap Around Starting Position Y" line.long 0x0C "P2WAMWR,Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P2WAMWY ,Plane 2 Wrap Around Memory Width Y" line.long 0x10 "P2BTR,Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P2BTA ,Plane 2 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P2BTB ,Plane 2 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P2TC1R,Plane 2 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P2TC1 ,Plane 2 Transparent Color 1" line.long 0x04 "P2TC2R,Plane 2 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P2TC2 ,Plane 2 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P2TC3R,Plane 2 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P2TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P2TC3 ,Plane 2 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P2MLR,Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P2MLY ,Plane 2 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P2SWAPR,Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P2DIGN ,Plane 2 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P2SPQW ,Plane 2 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2SPLW ,Plane 2 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P2SPWD ,Plane 2 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P2SPBY ,Plane 2 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P2DDCR,Plane 2 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P2DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P2LRGB1 ,Plane 2 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P2LRGB0 ,Plane 2 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P2DDCR2,Plane 2 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P2DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P2NV21 ,Plane 2 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P2Y420 ,Plane 2 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P2DIVU ,Plane 2 UV Data from Divided YUV" "P2DDF bit of P2MR,UV data" textline " " bitfld.long 0x00 0. " P2DIVY ,Plane 2 Y Data from Divided YUV" "P2DDF bit of P2MR,Y data" group.long 0x90++0x03 line.long 0x00 "P2DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P2DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P2SDFS ,Plane 2 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P2EDF ,Plane 2 Extensional Data Format" "P2DDF bit of P2MR/P2LRGB1 or P2LRGB0 bit in P2DDCR/P2DIVU or P2DIVY bit in P2DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 3" base (ad:0xFEB40000+0x300) width 10. group.long 0x00++0x03 line.long 0x00 "P3MR,Plane 3 Mode Register" bitfld.long 0x00 26.--27. " P3VISL ,Plane 3 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P3YCDF ,Plane 3 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P3TC ,Plane 3 Transparent Color" "P3TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P3SPM ,Plane 3 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P3CPSL ,Plane 3 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P3DDF ,Plane 3 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P3MWR,Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P3MWX ,Plane 3 Memory Width X" if (((per.l(ad:0xFEB40000+0x300))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P3ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P3ABIT ,Plane 3 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P3BRSL ,Plane 3 Blend Ratio Selection" "P3ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P3ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P3ALPHA ,Plane 3 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P3ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P3ABIT ,Plane 3 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P3ALPHA ,Plane 3 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P3DPY ,Plane 3 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P3DPY ,Plane 3 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P3SPXR,Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P3SPX ,Plane 3 Starting Position X" line.long 0x04 "P3SPYR,Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P3SPY ,Plane 3 Starting Position Y" line.long 0x08 "P3WASPR,Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P3WASPY ,Plane 3 Wrap Around Starting Position Y" line.long 0x0C "P3WAMWR,Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P3WAMWY ,Plane 3 Wrap Around Memory Width Y" line.long 0x10 "P3BTR,Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P3BTA ,Plane 3 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P3BTB ,Plane 3 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P3TC1R,Plane 3 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P3TC1 ,Plane 3 Transparent Color 1" line.long 0x04 "P3TC2R,Plane 3 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P3TC2 ,Plane 3 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P3TC3R,Plane 3 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P3TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P3TC3 ,Plane 3 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P3MLR,Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P3MLY ,Plane 3 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P3SWAPR,Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P3DIGN ,Plane 3 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P3SPQW ,Plane 3 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P3SPLW ,Plane 3 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P3SPWD ,Plane 3 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P3SPBY ,Plane 3 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P3DDCR,Plane 3 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P3DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P3LRGB1 ,Plane 3 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P3LRGB0 ,Plane 3 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P3DDCR2,Plane 3 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P3DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P3NV21 ,Plane 3 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P3Y420 ,Plane 3 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P3DIVU ,Plane 3 UV Data from Divided YUV" "P3DDF bit of P3MR,UV data" textline " " bitfld.long 0x00 0. " P3DIVY ,Plane 3 Y Data from Divided YUV" "P3DDF bit of P3MR,Y data" group.long 0x90++0x03 line.long 0x00 "P3DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P3DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P3SDFS ,Plane 3 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P3EDF ,Plane 3 Extensional Data Format" "P3DDF bit of P3MR/P3LRGB1 or P3LRGB0 bit in P3DDCR/P3DIVU or P3DIVY bit in P3DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 4" base (ad:0xFEB40000+0x400) width 10. group.long 0x00++0x03 line.long 0x00 "P4MR,Plane 4 Mode Register" bitfld.long 0x00 26.--27. " P4VISL ,Plane 4 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P4YCDF ,Plane 4 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P4TC ,Plane 4 Transparent Color" "P4TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P4SPM ,Plane 4 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P4CPSL ,Plane 4 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P4DDF ,Plane 4 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P4MWR,Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P4MWX ,Plane 4 Memory Width X" if (((per.l(ad:0xFEB40000+0x400))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P4ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P4ABIT ,Plane 4 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P4BRSL ,Plane 4 Blend Ratio Selection" "P4ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P4ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P4ALPHA ,Plane 4 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P4ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P4ABIT ,Plane 4 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P4ALPHA ,Plane 4 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P4DPY ,Plane 4 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P4DPY ,Plane 4 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P4SPXR,Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P4SPX ,Plane 4 Starting Position X" line.long 0x04 "P4SPYR,Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P4SPY ,Plane 4 Starting Position Y" line.long 0x08 "P4WASPR,Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P4WASPY ,Plane 4 Wrap Around Starting Position Y" line.long 0x0C "P4WAMWR,Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P4WAMWY ,Plane 4 Wrap Around Memory Width Y" line.long 0x10 "P4BTR,Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P4BTA ,Plane 4 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P4BTB ,Plane 4 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P4TC1R,Plane 4 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P4TC1 ,Plane 4 Transparent Color 1" line.long 0x04 "P4TC2R,Plane 4 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P4TC2 ,Plane 4 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P4TC3R,Plane 4 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P4TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P4TC3 ,Plane 4 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P4MLR,Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P4MLY ,Plane 4 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P4SWAPR,Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P4DIGN ,Plane 4 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P4SPQW ,Plane 4 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P4SPLW ,Plane 4 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P4SPWD ,Plane 4 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P4SPBY ,Plane 4 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P4DDCR,Plane 4 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P4DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P4LRGB1 ,Plane 4 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P4LRGB0 ,Plane 4 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P4DDCR2,Plane 4 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P4DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P4NV21 ,Plane 4 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P4Y420 ,Plane 4 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P4DIVU ,Plane 4 UV Data from Divided YUV" "P4DDF bit of P4MR,UV data" textline " " bitfld.long 0x00 0. " P4DIVY ,Plane 4 Y Data from Divided YUV" "P4DDF bit of P4MR,Y data" group.long 0x90++0x03 line.long 0x00 "P4DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P4DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P4SDFS ,Plane 4 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P4EDF ,Plane 4 Extensional Data Format" "P4DDF bit of P4MR/P4LRGB1 or P4LRGB0 bit in P4DDCR/P4DIVU or P4DIVY bit in P4DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 5" base (ad:0xFEB40000+0x500) width 10. group.long 0x00++0x03 line.long 0x00 "P5MR,Plane 5 Mode Register" bitfld.long 0x00 26.--27. " P5VISL ,Plane 5 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P5YCDF ,Plane 5 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P5TC ,Plane 5 Transparent Color" "P5TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P5SPM ,Plane 5 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P5CPSL ,Plane 5 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P5DDF ,Plane 5 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P5MWR,Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P5MWX ,Plane 5 Memory Width X" if (((per.l(ad:0xFEB40000+0x500))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P5ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P5ABIT ,Plane 5 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P5BRSL ,Plane 5 Blend Ratio Selection" "P5ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P5ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P5ALPHA ,Plane 5 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P5ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P5ABIT ,Plane 5 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P5ALPHA ,Plane 5 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P5DPY ,Plane 5 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P5DPY ,Plane 5 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P5SPXR,Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P5SPX ,Plane 5 Starting Position X" line.long 0x04 "P5SPYR,Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P5SPY ,Plane 5 Starting Position Y" line.long 0x08 "P5WASPR,Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P5WASPY ,Plane 5 Wrap Around Starting Position Y" line.long 0x0C "P5WAMWR,Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P5WAMWY ,Plane 5 Wrap Around Memory Width Y" line.long 0x10 "P5BTR,Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P5BTA ,Plane 5 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P5BTB ,Plane 5 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P5TC1R,Plane 5 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P5TC1 ,Plane 5 Transparent Color 1" line.long 0x04 "P5TC2R,Plane 5 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P5TC2 ,Plane 5 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P5TC3R,Plane 5 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P5TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P5TC3 ,Plane 5 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P5MLR,Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P5MLY ,Plane 5 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P5SWAPR,Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P5DIGN ,Plane 5 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P5SPQW ,Plane 5 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P5SPLW ,Plane 5 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P5SPWD ,Plane 5 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P5SPBY ,Plane 5 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P5DDCR,Plane 5 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P5DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P5LRGB1 ,Plane 5 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P5LRGB0 ,Plane 5 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P5DDCR2,Plane 5 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P5DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P5NV21 ,Plane 5 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P5Y420 ,Plane 5 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P5DIVU ,Plane 5 UV Data from Divided YUV" "P5DDF bit of P5MR,UV data" textline " " bitfld.long 0x00 0. " P5DIVY ,Plane 5 Y Data from Divided YUV" "P5DDF bit of P5MR,Y data" group.long 0x90++0x03 line.long 0x00 "P5DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P5DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P5SDFS ,Plane 5 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P5EDF ,Plane 5 Extensional Data Format" "P5DDF bit of P5MR/P5LRGB1 or P5LRGB0 bit in P5DDCR/P5DIVU or P5DIVY bit in P5DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 6" base (ad:0xFEB40000+0x600) width 10. group.long 0x00++0x03 line.long 0x00 "P6MR,Plane 6 Mode Register" bitfld.long 0x00 26.--27. " P6VISL ,Plane 6 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P6YCDF ,Plane 6 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P6TC ,Plane 6 Transparent Color" "P6TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P6SPM ,Plane 6 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P6CPSL ,Plane 6 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P6DDF ,Plane 6 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P6MWR,Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P6MWX ,Plane 6 Memory Width X" if (((per.l(ad:0xFEB40000+0x600))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P6ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P6ABIT ,Plane 6 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P6BRSL ,Plane 6 Blend Ratio Selection" "P6ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P6ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P6ALPHA ,Plane 6 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P6ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P6ABIT ,Plane 6 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P6ALPHA ,Plane 6 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P6DPY ,Plane 6 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P6DPY ,Plane 6 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P6SPXR,Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P6SPX ,Plane 6 Starting Position X" line.long 0x04 "P6SPYR,Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P6SPY ,Plane 6 Starting Position Y" line.long 0x08 "P6WASPR,Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P6WASPY ,Plane 6 Wrap Around Starting Position Y" line.long 0x0C "P6WAMWR,Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P6WAMWY ,Plane 6 Wrap Around Memory Width Y" line.long 0x10 "P6BTR,Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P6BTA ,Plane 6 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P6BTB ,Plane 6 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P6TC1R,Plane 6 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P6TC1 ,Plane 6 Transparent Color 1" line.long 0x04 "P6TC2R,Plane 6 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P6TC2 ,Plane 6 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P6TC3R,Plane 6 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P6TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P6TC3 ,Plane 6 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P6MLR,Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P6MLY ,Plane 6 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P6SWAPR,Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P6DIGN ,Plane 6 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P6SPQW ,Plane 6 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P6SPLW ,Plane 6 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P6SPWD ,Plane 6 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P6SPBY ,Plane 6 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P6DDCR,Plane 6 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P6DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P6LRGB1 ,Plane 6 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P6LRGB0 ,Plane 6 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P6DDCR2,Plane 6 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P6DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P6NV21 ,Plane 6 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P6Y420 ,Plane 6 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P6DIVU ,Plane 6 UV Data from Divided YUV" "P6DDF bit of P6MR,UV data" textline " " bitfld.long 0x00 0. " P6DIVY ,Plane 6 Y Data from Divided YUV" "P6DDF bit of P6MR,Y data" group.long 0x90++0x03 line.long 0x00 "P6DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P6DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P6SDFS ,Plane 6 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P6EDF ,Plane 6 Extensional Data Format" "P6DDF bit of P6MR/P6LRGB1 or P6LRGB0 bit in P6DDCR/P6DIVU or P6DIVY bit in P6DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 7" base (ad:0xFEB40000+0x700) width 10. group.long 0x00++0x03 line.long 0x00 "P7MR,Plane 7 Mode Register" bitfld.long 0x00 26.--27. " P7VISL ,Plane 7 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P7YCDF ,Plane 7 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P7TC ,Plane 7 Transparent Color" "P7TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P7SPM ,Plane 7 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P7CPSL ,Plane 7 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P7DDF ,Plane 7 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P7MWR,Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P7MWX ,Plane 7 Memory Width X" if (((per.l(ad:0xFEB40000+0x700))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P7ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P7ABIT ,Plane 7 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P7BRSL ,Plane 7 Blend Ratio Selection" "P7ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P7ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P7ALPHA ,Plane 7 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P7ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P7ABIT ,Plane 7 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P7ALPHA ,Plane 7 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P7DPY ,Plane 7 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P7DPY ,Plane 7 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P7SPXR,Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P7SPX ,Plane 7 Starting Position X" line.long 0x04 "P7SPYR,Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P7SPY ,Plane 7 Starting Position Y" line.long 0x08 "P7WASPR,Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P7WASPY ,Plane 7 Wrap Around Starting Position Y" line.long 0x0C "P7WAMWR,Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P7WAMWY ,Plane 7 Wrap Around Memory Width Y" line.long 0x10 "P7BTR,Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P7BTA ,Plane 7 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P7BTB ,Plane 7 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P7TC1R,Plane 7 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P7TC1 ,Plane 7 Transparent Color 1" line.long 0x04 "P7TC2R,Plane 7 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P7TC2 ,Plane 7 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P7TC3R,Plane 7 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P7TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P7TC3 ,Plane 7 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P7MLR,Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P7MLY ,Plane 7 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P7SWAPR,Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P7DIGN ,Plane 7 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P7SPQW ,Plane 7 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P7SPLW ,Plane 7 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P7SPWD ,Plane 7 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P7SPBY ,Plane 7 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P7DDCR,Plane 7 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P7DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P7LRGB1 ,Plane 7 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P7LRGB0 ,Plane 7 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P7DDCR2,Plane 7 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P7DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P7NV21 ,Plane 7 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P7Y420 ,Plane 7 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P7DIVU ,Plane 7 UV Data from Divided YUV" "P7DDF bit of P7MR,UV data" textline " " bitfld.long 0x00 0. " P7DIVY ,Plane 7 Y Data from Divided YUV" "P7DDF bit of P7MR,Y data" group.long 0x90++0x03 line.long 0x00 "P7DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P7DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P7SDFS ,Plane 7 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P7EDF ,Plane 7 Extensional Data Format" "P7DDF bit of P7MR/P7LRGB1 or P7LRGB0 bit in P7DDCR/P7DIVU or P7DIVY bit in P7DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.open "Display Plane 8" base (ad:0xFEB40000+0x800) width 10. group.long 0x00++0x03 line.long 0x00 "P8MR,Plane 8 Mode Register" bitfld.long 0x00 26.--27. " P8VISL ,Plane 8 Vieo Input Select" "VIN0,VIN1,VIN2,VIN3" textline " " bitfld.long 0x00 20. " P8YCDF ,Plane 8 YC Data Format" "UYVY,YUYV" textline " " bitfld.long 0x00 17. " P8TC ,Plane 8 Transparent Color" "P8TC1R,CP1TR/CP4TR" textline " " bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P8SPM ,Plane 8 Super Impose Mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." textline " " bitfld.long 0x00 8.--10. " P8CPSL ,Plane 8 Color Palette Selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." textline " " bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" textline " " bitfld.long 0x00 0.--1. " P8DDF ,Plane 8 Display Data Format" "8bit/pixel,16bit/pixel,ARGB,YC" group.long 0x04++0x03 line.long 0x00 "P8MWR,Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P8MWX ,Plane 8 Memory Width X" if (((per.l(ad:0xFEB40000+0x800))&0x3)==0x00) group.long 0x08++0x03 line.long 0x00 "P8ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P8ABIT ,Plane 8 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " bitfld.long 0x00 8.--10. " P8BRSL ,Plane 8 Blend Ratio Selection" "P8ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P8ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P8ALPHA ,Plane 8 Blend Ratio" else group.long 0x08++0x03 line.long 0x00 "P8ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P8ABIT ,Plane 8 A Bit Function Select" "A=1,A=0,Regardless A,Regardless A" textline " " hexmask.long.byte 0x00 0.--7. 1. " P8ALPHA ,Plane 8 Blend Ratio" endif if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P8DPY ,Plane 8 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P8DPY ,Plane 8 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P8SPXR,Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P8SPX ,Plane 8 Starting Position X" line.long 0x04 "P8SPYR,Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P8SPY ,Plane 8 Starting Position Y" line.long 0x08 "P8WASPR,Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P8WASPY ,Plane 8 Wrap Around Starting Position Y" line.long 0x0C "P8WAMWR,Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P8WAMWY ,Plane 8 Wrap Around Memory Width Y" line.long 0x10 "P8BTR,Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P8BTA ,Plane 8 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P8BTB ,Plane 8 Blinking Cycle B" group.long 0x44++0x07 line.long 0x00 "P8TC1R,Plane 8 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P8TC1 ,Plane 8 Transparent Color 1" line.long 0x04 "P8TC2R,Plane 8 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P8TC2 ,Plane 8 Transparent Color 2" group.long 0x48++0x03 line.long 0x00 "P8TC3R,Plane 8 Transparent Color 3 Register" hexmask.long.byte 0x00 24.--31. 1. " CODE ,P8TC3R Enabling Code [0x66]" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " P8TC3 ,Plane 8 Transparent Color 3" group.long 0x50++0x03 line.long 0x00 "P8MLR,Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P8MLY ,Plane 8 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P8SWAPR,Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P8DIGN ,Plane 8 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P8SPQW ,Plane 8 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P8SPLW ,Plane 8 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P8SPWD ,Plane 8 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P8SPBY ,Plane 8 Byte Swap Enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P8DDCR,Plane 8 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P8DDCR Enabling Code [0x7775]" textline " " bitfld.long 0x00 11. " P8LRGB1 ,Plane 8 32 bits/pixel display control 1" "Not used,Used" textline " " bitfld.long 0x00 10. " P8LRGB0 ,Plane 8 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P8DDCR2,Plane 8 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P8DDCR2 Enabling Code [0x7776]" textline " " bitfld.long 0x00 5. " P8NV21 ,Plane 8 NV21 Data Format" "NV12 order,NV21 order" textline " " bitfld.long 0x00 4. " P8Y420 ,Plane 8 YUV420 Data Format" "YUV422,YUV420" textline " " bitfld.long 0x00 1. " P8DIVU ,Plane 8 UV Data from Divided YUV" "P8DDF bit of P8MR,UV data" textline " " bitfld.long 0x00 0. " P8DIVY ,Plane 8 Y Data from Divided YUV" "P8DDF bit of P8MR,Y data" group.long 0x90++0x03 line.long 0x00 "P8DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P8DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P8SDFS ,Plane 8 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P8EDF ,Plane 8 Extensional Data Format" "P8DDF bit of P8MR/P8LRGB1 or P8LRGB0 bit in P8DDCR/P8DIVU or P8DIVY bit in P8DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.end tree "Alpha-Ratio Planes 1-8" tree "Alpha-Ratio Plane 1" base (ad:0xFEB40000+0xA100) width 10. group.long 0x00++0x03 line.long 0x00 "P1MR,Plane 1 Mode Register" bitfld.long 0x00 16. " P1WAE ,Plane 1 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P1DC ,Plane 1 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P1BM ,Plane 1 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P1MWR,Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P1MWX ,Plane 1 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P1DPY ,Plane 1 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P1DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P1DSX ,Plane 1 Display Size X" line.long 0x04 "P1DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P1DSY ,Plane 1 Display Size Y" line.long 0x08 "P1DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P1DPX ,Plane 1 Display Position X" line.long 0x0C "P1DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P1DPY ,Plane 1 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P1DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P1DSA0 ,Plane 1 Display Domain Start Address 0" line.long 0x04 "P1DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P1DSA1 ,Plane 1 Display Domain Start Address 1" line.long 0x08 "P1DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P1DSA2 ,Plane 1 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P1SPXR,Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P1SPX ,Plane 1 Starting Position X" line.long 0x04 "P1SPYR,Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P1SPY ,Plane 1 Starting Position Y" line.long 0x08 "P1WASPR,Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P1WASPY ,Plane 1 Wrap Around Starting Position Y" line.long 0x0C "P1WAMWR,Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P1WAMWY ,Plane 1 Wrap Around Memory Width Y" line.long 0x10 "P1BTR,Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P1BTA ,Plane 1 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P1BTB ,Plane 1 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P1MLR,Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P1MLY ,Plane 1 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P1SWAPR,Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P1DIGN ,Plane 1 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P1SPQW ,Plane 1 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P1SPLW ,Plane 1 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P1SPWD ,Plane 1 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P1SPBY ,Plane 1 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P1DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P1DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P1SDFS ,Plane 1 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P1EDF ,Plane 1 Extensional Data Format" "P1DDF bit of P1MR/P1LRGB1 or P1LRGB0 bit in P1DDCR/P1DIVU or P1DIVY bit in P1DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 2" base (ad:0xFEB40000+0xA200) width 10. group.long 0x00++0x03 line.long 0x00 "P2MR,Plane 2 Mode Register" bitfld.long 0x00 16. " P2WAE ,Plane 2 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P2DC ,Plane 2 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P2BM ,Plane 2 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P2MWR,Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P2MWX ,Plane 2 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P2DPY ,Plane 2 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P2DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P2DSX ,Plane 2 Display Size X" line.long 0x04 "P2DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P2DSY ,Plane 2 Display Size Y" line.long 0x08 "P2DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P2DPX ,Plane 2 Display Position X" line.long 0x0C "P2DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P2DPY ,Plane 2 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P2DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P2DSA0 ,Plane 2 Display Domain Start Address 0" line.long 0x04 "P2DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P2DSA1 ,Plane 2 Display Domain Start Address 1" line.long 0x08 "P2DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P2DSA2 ,Plane 2 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P2SPXR,Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P2SPX ,Plane 2 Starting Position X" line.long 0x04 "P2SPYR,Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P2SPY ,Plane 2 Starting Position Y" line.long 0x08 "P2WASPR,Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P2WASPY ,Plane 2 Wrap Around Starting Position Y" line.long 0x0C "P2WAMWR,Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P2WAMWY ,Plane 2 Wrap Around Memory Width Y" line.long 0x10 "P2BTR,Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P2BTA ,Plane 2 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P2BTB ,Plane 2 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P2MLR,Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P2MLY ,Plane 2 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P2SWAPR,Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P2DIGN ,Plane 2 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P2SPQW ,Plane 2 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2SPLW ,Plane 2 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P2SPWD ,Plane 2 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P2SPBY ,Plane 2 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P2DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P2DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P2SDFS ,Plane 2 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P2EDF ,Plane 2 Extensional Data Format" "P2DDF bit of P2MR/P2LRGB1 or P2LRGB0 bit in P2DDCR/P2DIVU or P2DIVY bit in P2DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 3" base (ad:0xFEB40000+0xA300) width 10. group.long 0x00++0x03 line.long 0x00 "P3MR,Plane 3 Mode Register" bitfld.long 0x00 16. " P3WAE ,Plane 3 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P3DC ,Plane 3 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P3BM ,Plane 3 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P3MWR,Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P3MWX ,Plane 3 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P3DPY ,Plane 3 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P3DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P3DSX ,Plane 3 Display Size X" line.long 0x04 "P3DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P3DSY ,Plane 3 Display Size Y" line.long 0x08 "P3DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P3DPX ,Plane 3 Display Position X" line.long 0x0C "P3DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P3DPY ,Plane 3 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P3DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P3DSA0 ,Plane 3 Display Domain Start Address 0" line.long 0x04 "P3DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P3DSA1 ,Plane 3 Display Domain Start Address 1" line.long 0x08 "P3DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P3DSA2 ,Plane 3 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P3SPXR,Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P3SPX ,Plane 3 Starting Position X" line.long 0x04 "P3SPYR,Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P3SPY ,Plane 3 Starting Position Y" line.long 0x08 "P3WASPR,Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P3WASPY ,Plane 3 Wrap Around Starting Position Y" line.long 0x0C "P3WAMWR,Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P3WAMWY ,Plane 3 Wrap Around Memory Width Y" line.long 0x10 "P3BTR,Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P3BTA ,Plane 3 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P3BTB ,Plane 3 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P3MLR,Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P3MLY ,Plane 3 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P3SWAPR,Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P3DIGN ,Plane 3 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P3SPQW ,Plane 3 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P3SPLW ,Plane 3 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P3SPWD ,Plane 3 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P3SPBY ,Plane 3 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P3DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P3DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P3SDFS ,Plane 3 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P3EDF ,Plane 3 Extensional Data Format" "P3DDF bit of P3MR/P3LRGB1 or P3LRGB0 bit in P3DDCR/P3DIVU or P3DIVY bit in P3DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 4" base (ad:0xFEB40000+0xA400) width 10. group.long 0x00++0x03 line.long 0x00 "P4MR,Plane 4 Mode Register" bitfld.long 0x00 16. " P4WAE ,Plane 4 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P4DC ,Plane 4 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P4BM ,Plane 4 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P4MWR,Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P4MWX ,Plane 4 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P4DPY ,Plane 4 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P4DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P4DSX ,Plane 4 Display Size X" line.long 0x04 "P4DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P4DSY ,Plane 4 Display Size Y" line.long 0x08 "P4DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P4DPX ,Plane 4 Display Position X" line.long 0x0C "P4DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P4DPY ,Plane 4 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P4DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P4DSA0 ,Plane 4 Display Domain Start Address 0" line.long 0x04 "P4DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P4DSA1 ,Plane 4 Display Domain Start Address 1" line.long 0x08 "P4DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P4DSA2 ,Plane 4 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P4SPXR,Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P4SPX ,Plane 4 Starting Position X" line.long 0x04 "P4SPYR,Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P4SPY ,Plane 4 Starting Position Y" line.long 0x08 "P4WASPR,Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P4WASPY ,Plane 4 Wrap Around Starting Position Y" line.long 0x0C "P4WAMWR,Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P4WAMWY ,Plane 4 Wrap Around Memory Width Y" line.long 0x10 "P4BTR,Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P4BTA ,Plane 4 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P4BTB ,Plane 4 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P4MLR,Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P4MLY ,Plane 4 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P4SWAPR,Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P4DIGN ,Plane 4 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P4SPQW ,Plane 4 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P4SPLW ,Plane 4 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P4SPWD ,Plane 4 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P4SPBY ,Plane 4 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P4DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P4DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P4SDFS ,Plane 4 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P4EDF ,Plane 4 Extensional Data Format" "P4DDF bit of P4MR/P4LRGB1 or P4LRGB0 bit in P4DDCR/P4DIVU or P4DIVY bit in P4DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 5" base (ad:0xFEB40000+0xA500) width 10. group.long 0x00++0x03 line.long 0x00 "P5MR,Plane 5 Mode Register" bitfld.long 0x00 16. " P5WAE ,Plane 5 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P5DC ,Plane 5 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P5BM ,Plane 5 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P5MWR,Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P5MWX ,Plane 5 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P5DPY ,Plane 5 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P5DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P5DSX ,Plane 5 Display Size X" line.long 0x04 "P5DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P5DSY ,Plane 5 Display Size Y" line.long 0x08 "P5DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P5DPX ,Plane 5 Display Position X" line.long 0x0C "P5DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P5DPY ,Plane 5 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P5DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P5DSA0 ,Plane 5 Display Domain Start Address 0" line.long 0x04 "P5DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P5DSA1 ,Plane 5 Display Domain Start Address 1" line.long 0x08 "P5DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P5DSA2 ,Plane 5 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P5SPXR,Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P5SPX ,Plane 5 Starting Position X" line.long 0x04 "P5SPYR,Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P5SPY ,Plane 5 Starting Position Y" line.long 0x08 "P5WASPR,Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P5WASPY ,Plane 5 Wrap Around Starting Position Y" line.long 0x0C "P5WAMWR,Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P5WAMWY ,Plane 5 Wrap Around Memory Width Y" line.long 0x10 "P5BTR,Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P5BTA ,Plane 5 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P5BTB ,Plane 5 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P5MLR,Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P5MLY ,Plane 5 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P5SWAPR,Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P5DIGN ,Plane 5 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P5SPQW ,Plane 5 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P5SPLW ,Plane 5 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P5SPWD ,Plane 5 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P5SPBY ,Plane 5 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P5DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P5DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P5SDFS ,Plane 5 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P5EDF ,Plane 5 Extensional Data Format" "P5DDF bit of P5MR/P5LRGB1 or P5LRGB0 bit in P5DDCR/P5DIVU or P5DIVY bit in P5DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 6" base (ad:0xFEB40000+0xA600) width 10. group.long 0x00++0x03 line.long 0x00 "P6MR,Plane 6 Mode Register" bitfld.long 0x00 16. " P6WAE ,Plane 6 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P6DC ,Plane 6 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P6BM ,Plane 6 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P6MWR,Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P6MWX ,Plane 6 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P6DPY ,Plane 6 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P6DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P6DSX ,Plane 6 Display Size X" line.long 0x04 "P6DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P6DSY ,Plane 6 Display Size Y" line.long 0x08 "P6DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P6DPX ,Plane 6 Display Position X" line.long 0x0C "P6DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P6DPY ,Plane 6 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P6DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P6DSA0 ,Plane 6 Display Domain Start Address 0" line.long 0x04 "P6DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P6DSA1 ,Plane 6 Display Domain Start Address 1" line.long 0x08 "P6DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P6DSA2 ,Plane 6 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P6SPXR,Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P6SPX ,Plane 6 Starting Position X" line.long 0x04 "P6SPYR,Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P6SPY ,Plane 6 Starting Position Y" line.long 0x08 "P6WASPR,Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P6WASPY ,Plane 6 Wrap Around Starting Position Y" line.long 0x0C "P6WAMWR,Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P6WAMWY ,Plane 6 Wrap Around Memory Width Y" line.long 0x10 "P6BTR,Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P6BTA ,Plane 6 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P6BTB ,Plane 6 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P6MLR,Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P6MLY ,Plane 6 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P6SWAPR,Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P6DIGN ,Plane 6 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P6SPQW ,Plane 6 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P6SPLW ,Plane 6 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P6SPWD ,Plane 6 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P6SPBY ,Plane 6 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P6DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P6DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P6SDFS ,Plane 6 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P6EDF ,Plane 6 Extensional Data Format" "P6DDF bit of P6MR/P6LRGB1 or P6LRGB0 bit in P6DDCR/P6DIVU or P6DIVY bit in P6DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 7" base (ad:0xFEB40000+0xA700) width 10. group.long 0x00++0x03 line.long 0x00 "P7MR,Plane 7 Mode Register" bitfld.long 0x00 16. " P7WAE ,Plane 7 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7DC ,Plane 7 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P7BM ,Plane 7 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P7MWR,Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P7MWX ,Plane 7 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P7DPY ,Plane 7 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P7DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P7DSX ,Plane 7 Display Size X" line.long 0x04 "P7DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P7DSY ,Plane 7 Display Size Y" line.long 0x08 "P7DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P7DPX ,Plane 7 Display Position X" line.long 0x0C "P7DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P7DPY ,Plane 7 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P7DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P7DSA0 ,Plane 7 Display Domain Start Address 0" line.long 0x04 "P7DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P7DSA1 ,Plane 7 Display Domain Start Address 1" line.long 0x08 "P7DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P7DSA2 ,Plane 7 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P7SPXR,Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P7SPX ,Plane 7 Starting Position X" line.long 0x04 "P7SPYR,Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P7SPY ,Plane 7 Starting Position Y" line.long 0x08 "P7WASPR,Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P7WASPY ,Plane 7 Wrap Around Starting Position Y" line.long 0x0C "P7WAMWR,Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P7WAMWY ,Plane 7 Wrap Around Memory Width Y" line.long 0x10 "P7BTR,Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P7BTA ,Plane 7 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P7BTB ,Plane 7 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P7MLR,Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P7MLY ,Plane 7 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P7SWAPR,Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P7DIGN ,Plane 7 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P7SPQW ,Plane 7 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P7SPLW ,Plane 7 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P7SPWD ,Plane 7 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P7SPBY ,Plane 7 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P7DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P7DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P7SDFS ,Plane 7 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P7EDF ,Plane 7 Extensional Data Format" "P7DDF bit of P7MR/P7LRGB1 or P7LRGB0 bit in P7DDCR/P7DIVU or P7DIVY bit in P7DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree "Alpha-Ratio Plane 8" base (ad:0xFEB40000+0xA800) width 10. group.long 0x00++0x03 line.long 0x00 "P8MR,Plane 8 Mode Register" bitfld.long 0x00 16. " P8WAE ,Plane 8 Wrap Around Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P8DC ,Plane 8 Display Area Change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P8BM ,Plane 8 Buffer Mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "P8MWR,Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P8MWX ,Plane 8 Memory Width X" if (((per.l(ad:0xFEB40000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P8DPY ,Plane 8 Display Position Y" else group.long 0x10++0x0F line.long 0x00 "P8DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P8DSX ,Plane 8 Display Size X" line.long 0x04 "P8DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P8DSY ,Plane 8 Display Size Y" line.long 0x08 "P8DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P8DPX ,Plane 8 Display Position X" line.long 0x0C "P8DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P8DPY ,Plane 8 Display Position Y" endif if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" else group.long 0x20++0x0b line.long 0x00 "P8DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P8DSA0 ,Plane 8 Display Domain Start Address 0" line.long 0x04 "P8DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P8DSA1 ,Plane 8 Display Domain Start Address 1" line.long 0x08 "P8DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P8DSA2 ,Plane 8 Display Domain Start Address 2" endif group.long 0x30++0x13 line.long 0x00 "P8SPXR,Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P8SPX ,Plane 8 Starting Position X" line.long 0x04 "P8SPYR,Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P8SPY ,Plane 8 Starting Position Y" line.long 0x08 "P8WASPR,Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P8WASPY ,Plane 8 Wrap Around Starting Position Y" line.long 0x0C "P8WAMWR,Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P8WAMWY ,Plane 8 Wrap Around Memory Width Y" line.long 0x10 "P8BTR,Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P8BTA ,Plane 8 Blinking Cycle A" textline " " hexmask.long.byte 0x10 0.--7. 1. " P8BTB ,Plane 8 Blinking Cycle B" group.long 0x50++0x03 line.long 0x00 "P8MLR,Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P8MLY ,Plane 8 Memory Length Y" group.long 0x80++0x03 line.long 0x00 "P8SWAPR,Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR Enabling Code [0x7775]" textline " " bitfld.long 0x00 4. " P8DIGN ,Plane 8 Display Data Format Invalid" "Valid,Invalid" textline " " bitfld.long 0x00 3. " P8SPQW ,Plane 8 Quadword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P8SPLW ,Plane 8 Longword Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P8SPWD ,Plane 8 Word Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P8SPBY ,Plane 8 Byte Swap Enable" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "P8DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " Code ,P8DDCR4 Enabling Code [0x7766]" textline " " bitfld.long 0x00 4.--6. " P8SDFS ,Plane 8 Superimpose Data Format Select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " bitfld.long 0x00 0.--2. " P8EDF ,Plane 8 Extensional Data Format" "P8DDF bit of P8MR/P8LRGB1 or P8LRGB0 bit in P8DDCR/P8DIVU or P8DIVY bit in P8DDCR2,ARGB8888,RGB888,RGB666,?..." width 0xb tree.end tree.end base ad:0xFEB40000 tree "Display Capture Registers" tree "Display Capture 1 Registers" group.long 0xC100++0x7 line.long 0x00 "DC1MR,Display Capture 1 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC1MR Enabling Code" hexmask.long.byte 0x00 8.--15. 1. " DC1AR ,Display Capture 1 Alpha Ratio" bitfld.long 0x00 0. " DC1DF ,Display Capture 1 Data Format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC1MWR,Display Capture 1 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC1MWX ,Display Capture 1 Memory Width X" if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long (0xC100+0x20)++0x03 line.long 0x00 "DC1SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC1SA ,Display Capture 1 Area Start Address" else group.long (0xC100+0x20)++0x03 line.long 0x00 "DC1SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC1SA ,Display Capture 1 Area Start Address" endif group.long (0xC100+0x50)++0x03 line.long 0x00 "DC1MLR,Display Capture 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC1MLY ,Display Capture 1 Memory Length Y" tree.end tree "Display Capture 2 Registers" group.long 0xC200++0x7 line.long 0x00 "DC2MR,Display Capture 2 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC2MR Enabling Code" hexmask.long.byte 0x00 8.--15. 1. " DC2AR ,Display Capture 2 Alpha Ratio" bitfld.long 0x00 0. " DC2DF ,Display Capture 2 Data Format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC2MWR,Display Capture 2 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC2MWX ,Display Capture 2 Memory Width X" if (((per.l(ad:0xFEB40000+0x20))&0x01)==0x01) group.long (0xC200+0x20)++0x03 line.long 0x00 "DC2SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC2SA ,Display Capture 2 Area Start Address" else group.long (0xC200+0x20)++0x03 line.long 0x00 "DC2SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC2SA ,Display Capture 2 Area Start Address" endif group.long (0xC200+0x50)++0x03 line.long 0x00 "DC2MLR,Display Capture 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC2MLY ,Display Capture 2 Memory Length Y" tree.end tree.end tree "Color Palette 1 Registers" width 10. group.long 0x1000++0x3ff line.long 0x0 "CP1_0R,Color Palette 1 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP1_0A ,Color Palette 1_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP1_0R ,Color Palette 1_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP1_0G ,Color Palette 1_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP1_0B ,Color Palette 1_0 Blue" line.long 0x4 "CP1_1R,Color Palette 1 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP1_1A ,Color Palette 1_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP1_1R ,Color Palette 1_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP1_1G ,Color Palette 1_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP1_1B ,Color Palette 1_1 Blue" line.long 0x8 "CP1_2R,Color Palette 1 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP1_2A ,Color Palette 1_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP1_2R ,Color Palette 1_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP1_2G ,Color Palette 1_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP1_2B ,Color Palette 1_2 Blue" line.long 0xC "CP1_3R,Color Palette 1 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP1_3A ,Color Palette 1_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP1_3R ,Color Palette 1_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP1_3G ,Color Palette 1_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP1_3B ,Color Palette 1_3 Blue" line.long 0x10 "CP1_4R,Color Palette 1 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP1_4A ,Color Palette 1_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP1_4R ,Color Palette 1_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP1_4G ,Color Palette 1_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP1_4B ,Color Palette 1_4 Blue" line.long 0x14 "CP1_5R,Color Palette 1 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP1_5A ,Color Palette 1_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP1_5R ,Color Palette 1_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP1_5G ,Color Palette 1_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP1_5B ,Color Palette 1_5 Blue" line.long 0x18 "CP1_6R,Color Palette 1 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP1_6A ,Color Palette 1_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP1_6R ,Color Palette 1_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP1_6G ,Color Palette 1_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP1_6B ,Color Palette 1_6 Blue" line.long 0x1C "CP1_7R,Color Palette 1 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP1_7A ,Color Palette 1_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP1_7R ,Color Palette 1_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP1_7G ,Color Palette 1_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP1_7B ,Color Palette 1_7 Blue" line.long 0x20 "CP1_8R,Color Palette 1 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP1_8A ,Color Palette 1_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP1_8R ,Color Palette 1_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP1_8G ,Color Palette 1_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP1_8B ,Color Palette 1_8 Blue" line.long 0x24 "CP1_9R,Color Palette 1 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP1_9A ,Color Palette 1_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP1_9R ,Color Palette 1_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP1_9G ,Color Palette 1_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP1_9B ,Color Palette 1_9 Blue" line.long 0x28 "CP1_10R,Color Palette 1 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP1_10A ,Color Palette 1_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP1_10R ,Color Palette 1_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP1_10G ,Color Palette 1_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP1_10B ,Color Palette 1_10 Blue" line.long 0x2C "CP1_11R,Color Palette 1 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP1_11A ,Color Palette 1_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP1_11R ,Color Palette 1_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP1_11G ,Color Palette 1_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP1_11B ,Color Palette 1_11 Blue" line.long 0x30 "CP1_12R,Color Palette 1 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP1_12A ,Color Palette 1_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP1_12R ,Color Palette 1_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP1_12G ,Color Palette 1_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP1_12B ,Color Palette 1_12 Blue" line.long 0x34 "CP1_13R,Color Palette 1 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP1_13A ,Color Palette 1_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP1_13R ,Color Palette 1_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP1_13G ,Color Palette 1_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP1_13B ,Color Palette 1_13 Blue" line.long 0x38 "CP1_14R,Color Palette 1 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP1_14A ,Color Palette 1_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP1_14R ,Color Palette 1_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP1_14G ,Color Palette 1_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP1_14B ,Color Palette 1_14 Blue" line.long 0x3C "CP1_15R,Color Palette 1 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP1_15A ,Color Palette 1_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP1_15R ,Color Palette 1_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP1_15G ,Color Palette 1_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP1_15B ,Color Palette 1_15 Blue" line.long 0x40 "CP1_16R,Color Palette 1 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP1_16A ,Color Palette 1_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP1_16R ,Color Palette 1_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP1_16G ,Color Palette 1_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP1_16B ,Color Palette 1_16 Blue" line.long 0x44 "CP1_17R,Color Palette 1 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP1_17A ,Color Palette 1_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP1_17R ,Color Palette 1_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP1_17G ,Color Palette 1_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP1_17B ,Color Palette 1_17 Blue" line.long 0x48 "CP1_18R,Color Palette 1 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP1_18A ,Color Palette 1_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP1_18R ,Color Palette 1_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP1_18G ,Color Palette 1_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP1_18B ,Color Palette 1_18 Blue" line.long 0x4C "CP1_19R,Color Palette 1 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP1_19A ,Color Palette 1_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP1_19R ,Color Palette 1_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP1_19G ,Color Palette 1_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP1_19B ,Color Palette 1_19 Blue" line.long 0x50 "CP1_20R,Color Palette 1 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP1_20A ,Color Palette 1_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP1_20R ,Color Palette 1_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP1_20G ,Color Palette 1_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP1_20B ,Color Palette 1_20 Blue" line.long 0x54 "CP1_21R,Color Palette 1 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP1_21A ,Color Palette 1_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP1_21R ,Color Palette 1_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP1_21G ,Color Palette 1_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP1_21B ,Color Palette 1_21 Blue" line.long 0x58 "CP1_22R,Color Palette 1 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP1_22A ,Color Palette 1_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP1_22R ,Color Palette 1_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP1_22G ,Color Palette 1_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP1_22B ,Color Palette 1_22 Blue" line.long 0x5C "CP1_23R,Color Palette 1 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP1_23A ,Color Palette 1_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP1_23R ,Color Palette 1_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP1_23G ,Color Palette 1_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP1_23B ,Color Palette 1_23 Blue" line.long 0x60 "CP1_24R,Color Palette 1 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP1_24A ,Color Palette 1_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP1_24R ,Color Palette 1_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP1_24G ,Color Palette 1_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP1_24B ,Color Palette 1_24 Blue" line.long 0x64 "CP1_25R,Color Palette 1 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP1_25A ,Color Palette 1_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP1_25R ,Color Palette 1_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP1_25G ,Color Palette 1_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP1_25B ,Color Palette 1_25 Blue" line.long 0x68 "CP1_26R,Color Palette 1 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP1_26A ,Color Palette 1_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP1_26R ,Color Palette 1_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP1_26G ,Color Palette 1_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP1_26B ,Color Palette 1_26 Blue" line.long 0x6C "CP1_27R,Color Palette 1 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP1_27A ,Color Palette 1_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP1_27R ,Color Palette 1_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP1_27G ,Color Palette 1_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP1_27B ,Color Palette 1_27 Blue" line.long 0x70 "CP1_28R,Color Palette 1 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP1_28A ,Color Palette 1_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP1_28R ,Color Palette 1_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP1_28G ,Color Palette 1_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP1_28B ,Color Palette 1_28 Blue" line.long 0x74 "CP1_29R,Color Palette 1 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP1_29A ,Color Palette 1_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP1_29R ,Color Palette 1_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP1_29G ,Color Palette 1_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP1_29B ,Color Palette 1_29 Blue" line.long 0x78 "CP1_30R,Color Palette 1 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP1_30A ,Color Palette 1_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP1_30R ,Color Palette 1_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP1_30G ,Color Palette 1_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP1_30B ,Color Palette 1_30 Blue" line.long 0x7C "CP1_31R,Color Palette 1 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP1_31A ,Color Palette 1_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP1_31R ,Color Palette 1_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP1_31G ,Color Palette 1_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP1_31B ,Color Palette 1_31 Blue" line.long 0x80 "CP1_32R,Color Palette 1 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP1_32A ,Color Palette 1_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP1_32R ,Color Palette 1_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP1_32G ,Color Palette 1_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP1_32B ,Color Palette 1_32 Blue" line.long 0x84 "CP1_33R,Color Palette 1 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP1_33A ,Color Palette 1_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP1_33R ,Color Palette 1_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP1_33G ,Color Palette 1_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP1_33B ,Color Palette 1_33 Blue" line.long 0x88 "CP1_34R,Color Palette 1 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP1_34A ,Color Palette 1_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP1_34R ,Color Palette 1_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP1_34G ,Color Palette 1_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP1_34B ,Color Palette 1_34 Blue" line.long 0x8C "CP1_35R,Color Palette 1 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP1_35A ,Color Palette 1_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP1_35R ,Color Palette 1_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP1_35G ,Color Palette 1_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP1_35B ,Color Palette 1_35 Blue" line.long 0x90 "CP1_36R,Color Palette 1 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP1_36A ,Color Palette 1_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP1_36R ,Color Palette 1_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP1_36G ,Color Palette 1_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP1_36B ,Color Palette 1_36 Blue" line.long 0x94 "CP1_37R,Color Palette 1 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP1_37A ,Color Palette 1_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP1_37R ,Color Palette 1_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP1_37G ,Color Palette 1_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP1_37B ,Color Palette 1_37 Blue" line.long 0x98 "CP1_38R,Color Palette 1 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP1_38A ,Color Palette 1_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP1_38R ,Color Palette 1_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP1_38G ,Color Palette 1_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP1_38B ,Color Palette 1_38 Blue" line.long 0x9C "CP1_39R,Color Palette 1 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP1_39A ,Color Palette 1_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP1_39R ,Color Palette 1_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP1_39G ,Color Palette 1_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP1_39B ,Color Palette 1_39 Blue" line.long 0xA0 "CP1_40R,Color Palette 1 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP1_40A ,Color Palette 1_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP1_40R ,Color Palette 1_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP1_40G ,Color Palette 1_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP1_40B ,Color Palette 1_40 Blue" line.long 0xA4 "CP1_41R,Color Palette 1 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP1_41A ,Color Palette 1_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP1_41R ,Color Palette 1_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP1_41G ,Color Palette 1_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP1_41B ,Color Palette 1_41 Blue" line.long 0xA8 "CP1_42R,Color Palette 1 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP1_42A ,Color Palette 1_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP1_42R ,Color Palette 1_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP1_42G ,Color Palette 1_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP1_42B ,Color Palette 1_42 Blue" line.long 0xAC "CP1_43R,Color Palette 1 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP1_43A ,Color Palette 1_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP1_43R ,Color Palette 1_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP1_43G ,Color Palette 1_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP1_43B ,Color Palette 1_43 Blue" line.long 0xB0 "CP1_44R,Color Palette 1 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP1_44A ,Color Palette 1_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP1_44R ,Color Palette 1_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP1_44G ,Color Palette 1_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP1_44B ,Color Palette 1_44 Blue" line.long 0xB4 "CP1_45R,Color Palette 1 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP1_45A ,Color Palette 1_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP1_45R ,Color Palette 1_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP1_45G ,Color Palette 1_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP1_45B ,Color Palette 1_45 Blue" line.long 0xB8 "CP1_46R,Color Palette 1 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP1_46A ,Color Palette 1_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP1_46R ,Color Palette 1_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP1_46G ,Color Palette 1_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP1_46B ,Color Palette 1_46 Blue" line.long 0xBC "CP1_47R,Color Palette 1 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP1_47A ,Color Palette 1_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP1_47R ,Color Palette 1_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP1_47G ,Color Palette 1_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP1_47B ,Color Palette 1_47 Blue" line.long 0xC0 "CP1_48R,Color Palette 1 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP1_48A ,Color Palette 1_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP1_48R ,Color Palette 1_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP1_48G ,Color Palette 1_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP1_48B ,Color Palette 1_48 Blue" line.long 0xC4 "CP1_49R,Color Palette 1 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP1_49A ,Color Palette 1_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP1_49R ,Color Palette 1_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP1_49G ,Color Palette 1_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP1_49B ,Color Palette 1_49 Blue" line.long 0xC8 "CP1_50R,Color Palette 1 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP1_50A ,Color Palette 1_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP1_50R ,Color Palette 1_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP1_50G ,Color Palette 1_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP1_50B ,Color Palette 1_50 Blue" line.long 0xCC "CP1_51R,Color Palette 1 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP1_51A ,Color Palette 1_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP1_51R ,Color Palette 1_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP1_51G ,Color Palette 1_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP1_51B ,Color Palette 1_51 Blue" line.long 0xD0 "CP1_52R,Color Palette 1 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP1_52A ,Color Palette 1_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP1_52R ,Color Palette 1_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP1_52G ,Color Palette 1_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP1_52B ,Color Palette 1_52 Blue" line.long 0xD4 "CP1_53R,Color Palette 1 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP1_53A ,Color Palette 1_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP1_53R ,Color Palette 1_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP1_53G ,Color Palette 1_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP1_53B ,Color Palette 1_53 Blue" line.long 0xD8 "CP1_54R,Color Palette 1 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP1_54A ,Color Palette 1_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP1_54R ,Color Palette 1_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP1_54G ,Color Palette 1_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP1_54B ,Color Palette 1_54 Blue" line.long 0xDC "CP1_55R,Color Palette 1 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP1_55A ,Color Palette 1_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP1_55R ,Color Palette 1_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP1_55G ,Color Palette 1_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP1_55B ,Color Palette 1_55 Blue" line.long 0xE0 "CP1_56R,Color Palette 1 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP1_56A ,Color Palette 1_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP1_56R ,Color Palette 1_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP1_56G ,Color Palette 1_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP1_56B ,Color Palette 1_56 Blue" line.long 0xE4 "CP1_57R,Color Palette 1 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP1_57A ,Color Palette 1_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP1_57R ,Color Palette 1_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP1_57G ,Color Palette 1_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP1_57B ,Color Palette 1_57 Blue" line.long 0xE8 "CP1_58R,Color Palette 1 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP1_58A ,Color Palette 1_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP1_58R ,Color Palette 1_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP1_58G ,Color Palette 1_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP1_58B ,Color Palette 1_58 Blue" line.long 0xEC "CP1_59R,Color Palette 1 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP1_59A ,Color Palette 1_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP1_59R ,Color Palette 1_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP1_59G ,Color Palette 1_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP1_59B ,Color Palette 1_59 Blue" line.long 0xF0 "CP1_60R,Color Palette 1 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP1_60A ,Color Palette 1_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP1_60R ,Color Palette 1_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP1_60G ,Color Palette 1_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP1_60B ,Color Palette 1_60 Blue" line.long 0xF4 "CP1_61R,Color Palette 1 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP1_61A ,Color Palette 1_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP1_61R ,Color Palette 1_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP1_61G ,Color Palette 1_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP1_61B ,Color Palette 1_61 Blue" line.long 0xF8 "CP1_62R,Color Palette 1 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP1_62A ,Color Palette 1_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP1_62R ,Color Palette 1_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP1_62G ,Color Palette 1_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP1_62B ,Color Palette 1_62 Blue" line.long 0xFC "CP1_63R,Color Palette 1 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP1_63A ,Color Palette 1_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP1_63R ,Color Palette 1_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP1_63G ,Color Palette 1_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP1_63B ,Color Palette 1_63 Blue" line.long 0x100 "CP1_64R,Color Palette 1 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP1_64A ,Color Palette 1_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP1_64R ,Color Palette 1_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP1_64G ,Color Palette 1_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP1_64B ,Color Palette 1_64 Blue" line.long 0x104 "CP1_65R,Color Palette 1 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP1_65A ,Color Palette 1_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP1_65R ,Color Palette 1_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP1_65G ,Color Palette 1_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP1_65B ,Color Palette 1_65 Blue" line.long 0x108 "CP1_66R,Color Palette 1 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP1_66A ,Color Palette 1_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP1_66R ,Color Palette 1_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP1_66G ,Color Palette 1_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP1_66B ,Color Palette 1_66 Blue" line.long 0x10C "CP1_67R,Color Palette 1 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP1_67A ,Color Palette 1_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP1_67R ,Color Palette 1_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP1_67G ,Color Palette 1_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP1_67B ,Color Palette 1_67 Blue" line.long 0x110 "CP1_68R,Color Palette 1 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP1_68A ,Color Palette 1_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP1_68R ,Color Palette 1_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP1_68G ,Color Palette 1_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP1_68B ,Color Palette 1_68 Blue" line.long 0x114 "CP1_69R,Color Palette 1 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP1_69A ,Color Palette 1_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP1_69R ,Color Palette 1_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP1_69G ,Color Palette 1_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP1_69B ,Color Palette 1_69 Blue" line.long 0x118 "CP1_70R,Color Palette 1 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP1_70A ,Color Palette 1_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP1_70R ,Color Palette 1_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP1_70G ,Color Palette 1_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP1_70B ,Color Palette 1_70 Blue" line.long 0x11C "CP1_71R,Color Palette 1 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP1_71A ,Color Palette 1_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP1_71R ,Color Palette 1_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP1_71G ,Color Palette 1_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP1_71B ,Color Palette 1_71 Blue" line.long 0x120 "CP1_72R,Color Palette 1 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP1_72A ,Color Palette 1_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP1_72R ,Color Palette 1_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP1_72G ,Color Palette 1_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP1_72B ,Color Palette 1_72 Blue" line.long 0x124 "CP1_73R,Color Palette 1 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP1_73A ,Color Palette 1_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP1_73R ,Color Palette 1_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP1_73G ,Color Palette 1_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP1_73B ,Color Palette 1_73 Blue" line.long 0x128 "CP1_74R,Color Palette 1 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP1_74A ,Color Palette 1_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP1_74R ,Color Palette 1_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP1_74G ,Color Palette 1_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP1_74B ,Color Palette 1_74 Blue" line.long 0x12C "CP1_75R,Color Palette 1 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP1_75A ,Color Palette 1_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP1_75R ,Color Palette 1_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP1_75G ,Color Palette 1_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP1_75B ,Color Palette 1_75 Blue" line.long 0x130 "CP1_76R,Color Palette 1 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP1_76A ,Color Palette 1_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP1_76R ,Color Palette 1_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP1_76G ,Color Palette 1_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP1_76B ,Color Palette 1_76 Blue" line.long 0x134 "CP1_77R,Color Palette 1 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP1_77A ,Color Palette 1_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP1_77R ,Color Palette 1_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP1_77G ,Color Palette 1_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP1_77B ,Color Palette 1_77 Blue" line.long 0x138 "CP1_78R,Color Palette 1 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP1_78A ,Color Palette 1_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP1_78R ,Color Palette 1_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP1_78G ,Color Palette 1_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP1_78B ,Color Palette 1_78 Blue" line.long 0x13C "CP1_79R,Color Palette 1 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP1_79A ,Color Palette 1_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP1_79R ,Color Palette 1_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP1_79G ,Color Palette 1_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP1_79B ,Color Palette 1_79 Blue" line.long 0x140 "CP1_80R,Color Palette 1 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP1_80A ,Color Palette 1_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP1_80R ,Color Palette 1_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP1_80G ,Color Palette 1_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP1_80B ,Color Palette 1_80 Blue" line.long 0x144 "CP1_81R,Color Palette 1 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP1_81A ,Color Palette 1_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP1_81R ,Color Palette 1_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP1_81G ,Color Palette 1_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP1_81B ,Color Palette 1_81 Blue" line.long 0x148 "CP1_82R,Color Palette 1 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP1_82A ,Color Palette 1_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP1_82R ,Color Palette 1_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP1_82G ,Color Palette 1_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP1_82B ,Color Palette 1_82 Blue" line.long 0x14C "CP1_83R,Color Palette 1 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP1_83A ,Color Palette 1_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP1_83R ,Color Palette 1_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP1_83G ,Color Palette 1_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP1_83B ,Color Palette 1_83 Blue" line.long 0x150 "CP1_84R,Color Palette 1 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP1_84A ,Color Palette 1_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP1_84R ,Color Palette 1_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP1_84G ,Color Palette 1_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP1_84B ,Color Palette 1_84 Blue" line.long 0x154 "CP1_85R,Color Palette 1 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP1_85A ,Color Palette 1_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP1_85R ,Color Palette 1_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP1_85G ,Color Palette 1_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP1_85B ,Color Palette 1_85 Blue" line.long 0x158 "CP1_86R,Color Palette 1 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP1_86A ,Color Palette 1_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP1_86R ,Color Palette 1_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP1_86G ,Color Palette 1_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP1_86B ,Color Palette 1_86 Blue" line.long 0x15C "CP1_87R,Color Palette 1 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP1_87A ,Color Palette 1_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP1_87R ,Color Palette 1_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP1_87G ,Color Palette 1_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP1_87B ,Color Palette 1_87 Blue" line.long 0x160 "CP1_88R,Color Palette 1 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP1_88A ,Color Palette 1_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP1_88R ,Color Palette 1_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP1_88G ,Color Palette 1_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP1_88B ,Color Palette 1_88 Blue" line.long 0x164 "CP1_89R,Color Palette 1 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP1_89A ,Color Palette 1_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP1_89R ,Color Palette 1_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP1_89G ,Color Palette 1_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP1_89B ,Color Palette 1_89 Blue" line.long 0x168 "CP1_90R,Color Palette 1 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP1_90A ,Color Palette 1_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP1_90R ,Color Palette 1_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP1_90G ,Color Palette 1_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP1_90B ,Color Palette 1_90 Blue" line.long 0x16C "CP1_91R,Color Palette 1 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP1_91A ,Color Palette 1_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP1_91R ,Color Palette 1_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP1_91G ,Color Palette 1_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP1_91B ,Color Palette 1_91 Blue" line.long 0x170 "CP1_92R,Color Palette 1 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP1_92A ,Color Palette 1_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP1_92R ,Color Palette 1_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP1_92G ,Color Palette 1_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP1_92B ,Color Palette 1_92 Blue" line.long 0x174 "CP1_93R,Color Palette 1 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP1_93A ,Color Palette 1_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP1_93R ,Color Palette 1_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP1_93G ,Color Palette 1_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP1_93B ,Color Palette 1_93 Blue" line.long 0x178 "CP1_94R,Color Palette 1 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP1_94A ,Color Palette 1_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP1_94R ,Color Palette 1_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP1_94G ,Color Palette 1_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP1_94B ,Color Palette 1_94 Blue" line.long 0x17C "CP1_95R,Color Palette 1 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP1_95A ,Color Palette 1_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP1_95R ,Color Palette 1_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP1_95G ,Color Palette 1_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP1_95B ,Color Palette 1_95 Blue" line.long 0x180 "CP1_96R,Color Palette 1 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP1_96A ,Color Palette 1_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP1_96R ,Color Palette 1_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP1_96G ,Color Palette 1_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP1_96B ,Color Palette 1_96 Blue" line.long 0x184 "CP1_97R,Color Palette 1 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP1_97A ,Color Palette 1_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP1_97R ,Color Palette 1_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP1_97G ,Color Palette 1_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP1_97B ,Color Palette 1_97 Blue" line.long 0x188 "CP1_98R,Color Palette 1 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP1_98A ,Color Palette 1_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP1_98R ,Color Palette 1_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP1_98G ,Color Palette 1_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP1_98B ,Color Palette 1_98 Blue" line.long 0x18C "CP1_99R,Color Palette 1 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP1_99A ,Color Palette 1_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP1_99R ,Color Palette 1_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP1_99G ,Color Palette 1_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP1_99B ,Color Palette 1_99 Blue" line.long 0x190 "CP1_100R,Color Palette 1 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP1_100A ,Color Palette 1_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP1_100R ,Color Palette 1_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP1_100G ,Color Palette 1_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP1_100B ,Color Palette 1_100 Blue" line.long 0x194 "CP1_101R,Color Palette 1 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP1_101A ,Color Palette 1_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP1_101R ,Color Palette 1_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP1_101G ,Color Palette 1_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP1_101B ,Color Palette 1_101 Blue" line.long 0x198 "CP1_102R,Color Palette 1 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP1_102A ,Color Palette 1_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP1_102R ,Color Palette 1_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP1_102G ,Color Palette 1_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP1_102B ,Color Palette 1_102 Blue" line.long 0x19C "CP1_103R,Color Palette 1 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP1_103A ,Color Palette 1_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP1_103R ,Color Palette 1_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP1_103G ,Color Palette 1_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP1_103B ,Color Palette 1_103 Blue" line.long 0x1A0 "CP1_104R,Color Palette 1 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP1_104A ,Color Palette 1_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP1_104R ,Color Palette 1_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP1_104G ,Color Palette 1_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP1_104B ,Color Palette 1_104 Blue" line.long 0x1A4 "CP1_105R,Color Palette 1 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP1_105A ,Color Palette 1_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP1_105R ,Color Palette 1_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP1_105G ,Color Palette 1_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP1_105B ,Color Palette 1_105 Blue" line.long 0x1A8 "CP1_106R,Color Palette 1 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP1_106A ,Color Palette 1_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP1_106R ,Color Palette 1_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP1_106G ,Color Palette 1_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP1_106B ,Color Palette 1_106 Blue" line.long 0x1AC "CP1_107R,Color Palette 1 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP1_107A ,Color Palette 1_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP1_107R ,Color Palette 1_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP1_107G ,Color Palette 1_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP1_107B ,Color Palette 1_107 Blue" line.long 0x1B0 "CP1_108R,Color Palette 1 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP1_108A ,Color Palette 1_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP1_108R ,Color Palette 1_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP1_108G ,Color Palette 1_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP1_108B ,Color Palette 1_108 Blue" line.long 0x1B4 "CP1_109R,Color Palette 1 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP1_109A ,Color Palette 1_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP1_109R ,Color Palette 1_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP1_109G ,Color Palette 1_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP1_109B ,Color Palette 1_109 Blue" line.long 0x1B8 "CP1_110R,Color Palette 1 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP1_110A ,Color Palette 1_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP1_110R ,Color Palette 1_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP1_110G ,Color Palette 1_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP1_110B ,Color Palette 1_110 Blue" line.long 0x1BC "CP1_111R,Color Palette 1 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP1_111A ,Color Palette 1_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP1_111R ,Color Palette 1_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP1_111G ,Color Palette 1_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP1_111B ,Color Palette 1_111 Blue" line.long 0x1C0 "CP1_112R,Color Palette 1 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP1_112A ,Color Palette 1_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP1_112R ,Color Palette 1_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP1_112G ,Color Palette 1_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP1_112B ,Color Palette 1_112 Blue" line.long 0x1C4 "CP1_113R,Color Palette 1 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP1_113A ,Color Palette 1_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP1_113R ,Color Palette 1_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP1_113G ,Color Palette 1_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP1_113B ,Color Palette 1_113 Blue" line.long 0x1C8 "CP1_114R,Color Palette 1 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP1_114A ,Color Palette 1_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP1_114R ,Color Palette 1_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP1_114G ,Color Palette 1_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP1_114B ,Color Palette 1_114 Blue" line.long 0x1CC "CP1_115R,Color Palette 1 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP1_115A ,Color Palette 1_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP1_115R ,Color Palette 1_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP1_115G ,Color Palette 1_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP1_115B ,Color Palette 1_115 Blue" line.long 0x1D0 "CP1_116R,Color Palette 1 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP1_116A ,Color Palette 1_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP1_116R ,Color Palette 1_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP1_116G ,Color Palette 1_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP1_116B ,Color Palette 1_116 Blue" line.long 0x1D4 "CP1_117R,Color Palette 1 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP1_117A ,Color Palette 1_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP1_117R ,Color Palette 1_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP1_117G ,Color Palette 1_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP1_117B ,Color Palette 1_117 Blue" line.long 0x1D8 "CP1_118R,Color Palette 1 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP1_118A ,Color Palette 1_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP1_118R ,Color Palette 1_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP1_118G ,Color Palette 1_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP1_118B ,Color Palette 1_118 Blue" line.long 0x1DC "CP1_119R,Color Palette 1 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP1_119A ,Color Palette 1_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP1_119R ,Color Palette 1_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP1_119G ,Color Palette 1_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP1_119B ,Color Palette 1_119 Blue" line.long 0x1E0 "CP1_120R,Color Palette 1 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP1_120A ,Color Palette 1_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP1_120R ,Color Palette 1_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP1_120G ,Color Palette 1_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP1_120B ,Color Palette 1_120 Blue" line.long 0x1E4 "CP1_121R,Color Palette 1 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP1_121A ,Color Palette 1_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP1_121R ,Color Palette 1_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP1_121G ,Color Palette 1_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP1_121B ,Color Palette 1_121 Blue" line.long 0x1E8 "CP1_122R,Color Palette 1 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP1_122A ,Color Palette 1_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP1_122R ,Color Palette 1_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP1_122G ,Color Palette 1_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP1_122B ,Color Palette 1_122 Blue" line.long 0x1EC "CP1_123R,Color Palette 1 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP1_123A ,Color Palette 1_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP1_123R ,Color Palette 1_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP1_123G ,Color Palette 1_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP1_123B ,Color Palette 1_123 Blue" line.long 0x1F0 "CP1_124R,Color Palette 1 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP1_124A ,Color Palette 1_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP1_124R ,Color Palette 1_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP1_124G ,Color Palette 1_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP1_124B ,Color Palette 1_124 Blue" line.long 0x1F4 "CP1_125R,Color Palette 1 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP1_125A ,Color Palette 1_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP1_125R ,Color Palette 1_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP1_125G ,Color Palette 1_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP1_125B ,Color Palette 1_125 Blue" line.long 0x1F8 "CP1_126R,Color Palette 1 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP1_126A ,Color Palette 1_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP1_126R ,Color Palette 1_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP1_126G ,Color Palette 1_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP1_126B ,Color Palette 1_126 Blue" line.long 0x1FC "CP1_127R,Color Palette 1 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP1_127A ,Color Palette 1_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP1_127R ,Color Palette 1_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP1_127G ,Color Palette 1_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP1_127B ,Color Palette 1_127 Blue" line.long 0x200 "CP1_128R,Color Palette 1 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP1_128A ,Color Palette 1_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP1_128R ,Color Palette 1_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP1_128G ,Color Palette 1_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP1_128B ,Color Palette 1_128 Blue" line.long 0x204 "CP1_129R,Color Palette 1 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP1_129A ,Color Palette 1_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP1_129R ,Color Palette 1_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP1_129G ,Color Palette 1_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP1_129B ,Color Palette 1_129 Blue" line.long 0x208 "CP1_130R,Color Palette 1 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP1_130A ,Color Palette 1_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP1_130R ,Color Palette 1_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP1_130G ,Color Palette 1_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP1_130B ,Color Palette 1_130 Blue" line.long 0x20C "CP1_131R,Color Palette 1 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP1_131A ,Color Palette 1_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP1_131R ,Color Palette 1_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP1_131G ,Color Palette 1_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP1_131B ,Color Palette 1_131 Blue" line.long 0x210 "CP1_132R,Color Palette 1 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP1_132A ,Color Palette 1_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP1_132R ,Color Palette 1_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP1_132G ,Color Palette 1_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP1_132B ,Color Palette 1_132 Blue" line.long 0x214 "CP1_133R,Color Palette 1 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP1_133A ,Color Palette 1_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP1_133R ,Color Palette 1_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP1_133G ,Color Palette 1_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP1_133B ,Color Palette 1_133 Blue" line.long 0x218 "CP1_134R,Color Palette 1 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP1_134A ,Color Palette 1_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP1_134R ,Color Palette 1_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP1_134G ,Color Palette 1_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP1_134B ,Color Palette 1_134 Blue" line.long 0x21C "CP1_135R,Color Palette 1 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP1_135A ,Color Palette 1_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP1_135R ,Color Palette 1_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP1_135G ,Color Palette 1_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP1_135B ,Color Palette 1_135 Blue" line.long 0x220 "CP1_136R,Color Palette 1 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP1_136A ,Color Palette 1_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP1_136R ,Color Palette 1_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP1_136G ,Color Palette 1_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP1_136B ,Color Palette 1_136 Blue" line.long 0x224 "CP1_137R,Color Palette 1 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP1_137A ,Color Palette 1_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP1_137R ,Color Palette 1_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP1_137G ,Color Palette 1_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP1_137B ,Color Palette 1_137 Blue" line.long 0x228 "CP1_138R,Color Palette 1 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP1_138A ,Color Palette 1_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP1_138R ,Color Palette 1_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP1_138G ,Color Palette 1_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP1_138B ,Color Palette 1_138 Blue" line.long 0x22C "CP1_139R,Color Palette 1 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP1_139A ,Color Palette 1_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP1_139R ,Color Palette 1_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP1_139G ,Color Palette 1_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP1_139B ,Color Palette 1_139 Blue" line.long 0x230 "CP1_140R,Color Palette 1 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP1_140A ,Color Palette 1_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP1_140R ,Color Palette 1_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP1_140G ,Color Palette 1_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP1_140B ,Color Palette 1_140 Blue" line.long 0x234 "CP1_141R,Color Palette 1 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP1_141A ,Color Palette 1_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP1_141R ,Color Palette 1_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP1_141G ,Color Palette 1_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP1_141B ,Color Palette 1_141 Blue" line.long 0x238 "CP1_142R,Color Palette 1 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP1_142A ,Color Palette 1_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP1_142R ,Color Palette 1_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP1_142G ,Color Palette 1_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP1_142B ,Color Palette 1_142 Blue" line.long 0x23C "CP1_143R,Color Palette 1 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP1_143A ,Color Palette 1_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP1_143R ,Color Palette 1_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP1_143G ,Color Palette 1_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP1_143B ,Color Palette 1_143 Blue" line.long 0x240 "CP1_144R,Color Palette 1 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP1_144A ,Color Palette 1_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP1_144R ,Color Palette 1_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP1_144G ,Color Palette 1_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP1_144B ,Color Palette 1_144 Blue" line.long 0x244 "CP1_145R,Color Palette 1 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP1_145A ,Color Palette 1_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP1_145R ,Color Palette 1_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP1_145G ,Color Palette 1_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP1_145B ,Color Palette 1_145 Blue" line.long 0x248 "CP1_146R,Color Palette 1 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP1_146A ,Color Palette 1_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP1_146R ,Color Palette 1_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP1_146G ,Color Palette 1_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP1_146B ,Color Palette 1_146 Blue" line.long 0x24C "CP1_147R,Color Palette 1 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP1_147A ,Color Palette 1_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP1_147R ,Color Palette 1_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP1_147G ,Color Palette 1_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP1_147B ,Color Palette 1_147 Blue" line.long 0x250 "CP1_148R,Color Palette 1 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP1_148A ,Color Palette 1_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP1_148R ,Color Palette 1_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP1_148G ,Color Palette 1_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP1_148B ,Color Palette 1_148 Blue" line.long 0x254 "CP1_149R,Color Palette 1 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP1_149A ,Color Palette 1_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP1_149R ,Color Palette 1_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP1_149G ,Color Palette 1_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP1_149B ,Color Palette 1_149 Blue" line.long 0x258 "CP1_150R,Color Palette 1 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP1_150A ,Color Palette 1_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP1_150R ,Color Palette 1_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP1_150G ,Color Palette 1_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP1_150B ,Color Palette 1_150 Blue" line.long 0x25C "CP1_151R,Color Palette 1 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP1_151A ,Color Palette 1_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP1_151R ,Color Palette 1_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP1_151G ,Color Palette 1_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP1_151B ,Color Palette 1_151 Blue" line.long 0x260 "CP1_152R,Color Palette 1 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP1_152A ,Color Palette 1_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP1_152R ,Color Palette 1_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP1_152G ,Color Palette 1_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP1_152B ,Color Palette 1_152 Blue" line.long 0x264 "CP1_153R,Color Palette 1 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP1_153A ,Color Palette 1_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP1_153R ,Color Palette 1_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP1_153G ,Color Palette 1_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP1_153B ,Color Palette 1_153 Blue" line.long 0x268 "CP1_154R,Color Palette 1 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP1_154A ,Color Palette 1_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP1_154R ,Color Palette 1_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP1_154G ,Color Palette 1_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP1_154B ,Color Palette 1_154 Blue" line.long 0x26C "CP1_155R,Color Palette 1 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP1_155A ,Color Palette 1_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP1_155R ,Color Palette 1_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP1_155G ,Color Palette 1_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP1_155B ,Color Palette 1_155 Blue" line.long 0x270 "CP1_156R,Color Palette 1 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP1_156A ,Color Palette 1_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP1_156R ,Color Palette 1_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP1_156G ,Color Palette 1_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP1_156B ,Color Palette 1_156 Blue" line.long 0x274 "CP1_157R,Color Palette 1 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP1_157A ,Color Palette 1_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP1_157R ,Color Palette 1_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP1_157G ,Color Palette 1_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP1_157B ,Color Palette 1_157 Blue" line.long 0x278 "CP1_158R,Color Palette 1 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP1_158A ,Color Palette 1_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP1_158R ,Color Palette 1_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP1_158G ,Color Palette 1_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP1_158B ,Color Palette 1_158 Blue" line.long 0x27C "CP1_159R,Color Palette 1 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP1_159A ,Color Palette 1_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP1_159R ,Color Palette 1_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP1_159G ,Color Palette 1_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP1_159B ,Color Palette 1_159 Blue" line.long 0x280 "CP1_160R,Color Palette 1 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP1_160A ,Color Palette 1_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP1_160R ,Color Palette 1_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP1_160G ,Color Palette 1_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP1_160B ,Color Palette 1_160 Blue" line.long 0x284 "CP1_161R,Color Palette 1 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP1_161A ,Color Palette 1_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP1_161R ,Color Palette 1_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP1_161G ,Color Palette 1_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP1_161B ,Color Palette 1_161 Blue" line.long 0x288 "CP1_162R,Color Palette 1 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP1_162A ,Color Palette 1_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP1_162R ,Color Palette 1_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP1_162G ,Color Palette 1_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP1_162B ,Color Palette 1_162 Blue" line.long 0x28C "CP1_163R,Color Palette 1 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP1_163A ,Color Palette 1_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP1_163R ,Color Palette 1_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP1_163G ,Color Palette 1_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP1_163B ,Color Palette 1_163 Blue" line.long 0x290 "CP1_164R,Color Palette 1 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP1_164A ,Color Palette 1_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP1_164R ,Color Palette 1_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP1_164G ,Color Palette 1_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP1_164B ,Color Palette 1_164 Blue" line.long 0x294 "CP1_165R,Color Palette 1 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP1_165A ,Color Palette 1_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP1_165R ,Color Palette 1_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP1_165G ,Color Palette 1_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP1_165B ,Color Palette 1_165 Blue" line.long 0x298 "CP1_166R,Color Palette 1 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP1_166A ,Color Palette 1_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP1_166R ,Color Palette 1_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP1_166G ,Color Palette 1_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP1_166B ,Color Palette 1_166 Blue" line.long 0x29C "CP1_167R,Color Palette 1 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP1_167A ,Color Palette 1_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP1_167R ,Color Palette 1_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP1_167G ,Color Palette 1_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP1_167B ,Color Palette 1_167 Blue" line.long 0x2A0 "CP1_168R,Color Palette 1 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP1_168A ,Color Palette 1_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP1_168R ,Color Palette 1_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP1_168G ,Color Palette 1_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP1_168B ,Color Palette 1_168 Blue" line.long 0x2A4 "CP1_169R,Color Palette 1 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP1_169A ,Color Palette 1_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP1_169R ,Color Palette 1_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP1_169G ,Color Palette 1_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP1_169B ,Color Palette 1_169 Blue" line.long 0x2A8 "CP1_170R,Color Palette 1 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP1_170A ,Color Palette 1_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP1_170R ,Color Palette 1_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP1_170G ,Color Palette 1_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP1_170B ,Color Palette 1_170 Blue" line.long 0x2AC "CP1_171R,Color Palette 1 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP1_171A ,Color Palette 1_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP1_171R ,Color Palette 1_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP1_171G ,Color Palette 1_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP1_171B ,Color Palette 1_171 Blue" line.long 0x2B0 "CP1_172R,Color Palette 1 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP1_172A ,Color Palette 1_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP1_172R ,Color Palette 1_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP1_172G ,Color Palette 1_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP1_172B ,Color Palette 1_172 Blue" line.long 0x2B4 "CP1_173R,Color Palette 1 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP1_173A ,Color Palette 1_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP1_173R ,Color Palette 1_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP1_173G ,Color Palette 1_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP1_173B ,Color Palette 1_173 Blue" line.long 0x2B8 "CP1_174R,Color Palette 1 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP1_174A ,Color Palette 1_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP1_174R ,Color Palette 1_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP1_174G ,Color Palette 1_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP1_174B ,Color Palette 1_174 Blue" line.long 0x2BC "CP1_175R,Color Palette 1 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP1_175A ,Color Palette 1_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP1_175R ,Color Palette 1_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP1_175G ,Color Palette 1_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP1_175B ,Color Palette 1_175 Blue" line.long 0x2C0 "CP1_176R,Color Palette 1 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP1_176A ,Color Palette 1_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP1_176R ,Color Palette 1_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP1_176G ,Color Palette 1_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP1_176B ,Color Palette 1_176 Blue" line.long 0x2C4 "CP1_177R,Color Palette 1 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP1_177A ,Color Palette 1_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP1_177R ,Color Palette 1_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP1_177G ,Color Palette 1_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP1_177B ,Color Palette 1_177 Blue" line.long 0x2C8 "CP1_178R,Color Palette 1 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP1_178A ,Color Palette 1_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP1_178R ,Color Palette 1_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP1_178G ,Color Palette 1_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP1_178B ,Color Palette 1_178 Blue" line.long 0x2CC "CP1_179R,Color Palette 1 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP1_179A ,Color Palette 1_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP1_179R ,Color Palette 1_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP1_179G ,Color Palette 1_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP1_179B ,Color Palette 1_179 Blue" line.long 0x2D0 "CP1_180R,Color Palette 1 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP1_180A ,Color Palette 1_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP1_180R ,Color Palette 1_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP1_180G ,Color Palette 1_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP1_180B ,Color Palette 1_180 Blue" line.long 0x2D4 "CP1_181R,Color Palette 1 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP1_181A ,Color Palette 1_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP1_181R ,Color Palette 1_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP1_181G ,Color Palette 1_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP1_181B ,Color Palette 1_181 Blue" line.long 0x2D8 "CP1_182R,Color Palette 1 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP1_182A ,Color Palette 1_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP1_182R ,Color Palette 1_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP1_182G ,Color Palette 1_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP1_182B ,Color Palette 1_182 Blue" line.long 0x2DC "CP1_183R,Color Palette 1 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP1_183A ,Color Palette 1_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP1_183R ,Color Palette 1_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP1_183G ,Color Palette 1_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP1_183B ,Color Palette 1_183 Blue" line.long 0x2E0 "CP1_184R,Color Palette 1 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP1_184A ,Color Palette 1_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP1_184R ,Color Palette 1_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP1_184G ,Color Palette 1_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP1_184B ,Color Palette 1_184 Blue" line.long 0x2E4 "CP1_185R,Color Palette 1 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP1_185A ,Color Palette 1_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP1_185R ,Color Palette 1_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP1_185G ,Color Palette 1_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP1_185B ,Color Palette 1_185 Blue" line.long 0x2E8 "CP1_186R,Color Palette 1 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP1_186A ,Color Palette 1_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP1_186R ,Color Palette 1_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP1_186G ,Color Palette 1_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP1_186B ,Color Palette 1_186 Blue" line.long 0x2EC "CP1_187R,Color Palette 1 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP1_187A ,Color Palette 1_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP1_187R ,Color Palette 1_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP1_187G ,Color Palette 1_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP1_187B ,Color Palette 1_187 Blue" line.long 0x2F0 "CP1_188R,Color Palette 1 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP1_188A ,Color Palette 1_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP1_188R ,Color Palette 1_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP1_188G ,Color Palette 1_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP1_188B ,Color Palette 1_188 Blue" line.long 0x2F4 "CP1_189R,Color Palette 1 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP1_189A ,Color Palette 1_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP1_189R ,Color Palette 1_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP1_189G ,Color Palette 1_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP1_189B ,Color Palette 1_189 Blue" line.long 0x2F8 "CP1_190R,Color Palette 1 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP1_190A ,Color Palette 1_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP1_190R ,Color Palette 1_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP1_190G ,Color Palette 1_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP1_190B ,Color Palette 1_190 Blue" line.long 0x2FC "CP1_191R,Color Palette 1 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP1_191A ,Color Palette 1_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP1_191R ,Color Palette 1_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP1_191G ,Color Palette 1_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP1_191B ,Color Palette 1_191 Blue" line.long 0x300 "CP1_192R,Color Palette 1 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP1_192A ,Color Palette 1_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP1_192R ,Color Palette 1_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP1_192G ,Color Palette 1_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP1_192B ,Color Palette 1_192 Blue" line.long 0x304 "CP1_193R,Color Palette 1 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP1_193A ,Color Palette 1_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP1_193R ,Color Palette 1_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP1_193G ,Color Palette 1_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP1_193B ,Color Palette 1_193 Blue" line.long 0x308 "CP1_194R,Color Palette 1 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP1_194A ,Color Palette 1_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP1_194R ,Color Palette 1_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP1_194G ,Color Palette 1_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP1_194B ,Color Palette 1_194 Blue" line.long 0x30C "CP1_195R,Color Palette 1 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP1_195A ,Color Palette 1_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP1_195R ,Color Palette 1_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP1_195G ,Color Palette 1_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP1_195B ,Color Palette 1_195 Blue" line.long 0x310 "CP1_196R,Color Palette 1 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP1_196A ,Color Palette 1_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP1_196R ,Color Palette 1_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP1_196G ,Color Palette 1_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP1_196B ,Color Palette 1_196 Blue" line.long 0x314 "CP1_197R,Color Palette 1 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP1_197A ,Color Palette 1_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP1_197R ,Color Palette 1_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP1_197G ,Color Palette 1_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP1_197B ,Color Palette 1_197 Blue" line.long 0x318 "CP1_198R,Color Palette 1 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP1_198A ,Color Palette 1_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP1_198R ,Color Palette 1_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP1_198G ,Color Palette 1_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP1_198B ,Color Palette 1_198 Blue" line.long 0x31C "CP1_199R,Color Palette 1 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP1_199A ,Color Palette 1_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP1_199R ,Color Palette 1_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP1_199G ,Color Palette 1_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP1_199B ,Color Palette 1_199 Blue" line.long 0x320 "CP1_200R,Color Palette 1 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP1_200A ,Color Palette 1_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP1_200R ,Color Palette 1_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP1_200G ,Color Palette 1_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP1_200B ,Color Palette 1_200 Blue" line.long 0x324 "CP1_201R,Color Palette 1 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP1_201A ,Color Palette 1_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP1_201R ,Color Palette 1_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP1_201G ,Color Palette 1_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP1_201B ,Color Palette 1_201 Blue" line.long 0x328 "CP1_202R,Color Palette 1 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP1_202A ,Color Palette 1_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP1_202R ,Color Palette 1_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP1_202G ,Color Palette 1_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP1_202B ,Color Palette 1_202 Blue" line.long 0x32C "CP1_203R,Color Palette 1 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP1_203A ,Color Palette 1_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP1_203R ,Color Palette 1_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP1_203G ,Color Palette 1_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP1_203B ,Color Palette 1_203 Blue" line.long 0x330 "CP1_204R,Color Palette 1 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP1_204A ,Color Palette 1_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP1_204R ,Color Palette 1_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP1_204G ,Color Palette 1_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP1_204B ,Color Palette 1_204 Blue" line.long 0x334 "CP1_205R,Color Palette 1 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP1_205A ,Color Palette 1_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP1_205R ,Color Palette 1_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP1_205G ,Color Palette 1_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP1_205B ,Color Palette 1_205 Blue" line.long 0x338 "CP1_206R,Color Palette 1 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP1_206A ,Color Palette 1_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP1_206R ,Color Palette 1_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP1_206G ,Color Palette 1_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP1_206B ,Color Palette 1_206 Blue" line.long 0x33C "CP1_207R,Color Palette 1 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP1_207A ,Color Palette 1_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP1_207R ,Color Palette 1_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP1_207G ,Color Palette 1_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP1_207B ,Color Palette 1_207 Blue" line.long 0x340 "CP1_208R,Color Palette 1 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP1_208A ,Color Palette 1_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP1_208R ,Color Palette 1_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP1_208G ,Color Palette 1_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP1_208B ,Color Palette 1_208 Blue" line.long 0x344 "CP1_209R,Color Palette 1 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP1_209A ,Color Palette 1_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP1_209R ,Color Palette 1_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP1_209G ,Color Palette 1_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP1_209B ,Color Palette 1_209 Blue" line.long 0x348 "CP1_210R,Color Palette 1 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP1_210A ,Color Palette 1_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP1_210R ,Color Palette 1_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP1_210G ,Color Palette 1_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP1_210B ,Color Palette 1_210 Blue" line.long 0x34C "CP1_211R,Color Palette 1 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP1_211A ,Color Palette 1_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP1_211R ,Color Palette 1_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP1_211G ,Color Palette 1_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP1_211B ,Color Palette 1_211 Blue" line.long 0x350 "CP1_212R,Color Palette 1 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP1_212A ,Color Palette 1_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP1_212R ,Color Palette 1_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP1_212G ,Color Palette 1_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP1_212B ,Color Palette 1_212 Blue" line.long 0x354 "CP1_213R,Color Palette 1 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP1_213A ,Color Palette 1_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP1_213R ,Color Palette 1_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP1_213G ,Color Palette 1_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP1_213B ,Color Palette 1_213 Blue" line.long 0x358 "CP1_214R,Color Palette 1 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP1_214A ,Color Palette 1_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP1_214R ,Color Palette 1_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP1_214G ,Color Palette 1_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP1_214B ,Color Palette 1_214 Blue" line.long 0x35C "CP1_215R,Color Palette 1 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP1_215A ,Color Palette 1_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP1_215R ,Color Palette 1_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP1_215G ,Color Palette 1_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP1_215B ,Color Palette 1_215 Blue" line.long 0x360 "CP1_216R,Color Palette 1 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP1_216A ,Color Palette 1_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP1_216R ,Color Palette 1_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP1_216G ,Color Palette 1_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP1_216B ,Color Palette 1_216 Blue" line.long 0x364 "CP1_217R,Color Palette 1 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP1_217A ,Color Palette 1_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP1_217R ,Color Palette 1_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP1_217G ,Color Palette 1_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP1_217B ,Color Palette 1_217 Blue" line.long 0x368 "CP1_218R,Color Palette 1 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP1_218A ,Color Palette 1_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP1_218R ,Color Palette 1_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP1_218G ,Color Palette 1_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP1_218B ,Color Palette 1_218 Blue" line.long 0x36C "CP1_219R,Color Palette 1 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP1_219A ,Color Palette 1_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP1_219R ,Color Palette 1_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP1_219G ,Color Palette 1_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP1_219B ,Color Palette 1_219 Blue" line.long 0x370 "CP1_220R,Color Palette 1 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP1_220A ,Color Palette 1_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP1_220R ,Color Palette 1_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP1_220G ,Color Palette 1_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP1_220B ,Color Palette 1_220 Blue" line.long 0x374 "CP1_221R,Color Palette 1 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP1_221A ,Color Palette 1_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP1_221R ,Color Palette 1_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP1_221G ,Color Palette 1_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP1_221B ,Color Palette 1_221 Blue" line.long 0x378 "CP1_222R,Color Palette 1 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP1_222A ,Color Palette 1_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP1_222R ,Color Palette 1_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP1_222G ,Color Palette 1_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP1_222B ,Color Palette 1_222 Blue" line.long 0x37C "CP1_223R,Color Palette 1 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP1_223A ,Color Palette 1_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP1_223R ,Color Palette 1_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP1_223G ,Color Palette 1_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP1_223B ,Color Palette 1_223 Blue" line.long 0x380 "CP1_224R,Color Palette 1 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP1_224A ,Color Palette 1_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP1_224R ,Color Palette 1_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP1_224G ,Color Palette 1_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP1_224B ,Color Palette 1_224 Blue" line.long 0x384 "CP1_225R,Color Palette 1 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP1_225A ,Color Palette 1_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP1_225R ,Color Palette 1_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP1_225G ,Color Palette 1_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP1_225B ,Color Palette 1_225 Blue" line.long 0x388 "CP1_226R,Color Palette 1 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP1_226A ,Color Palette 1_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP1_226R ,Color Palette 1_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP1_226G ,Color Palette 1_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP1_226B ,Color Palette 1_226 Blue" line.long 0x38C "CP1_227R,Color Palette 1 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP1_227A ,Color Palette 1_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP1_227R ,Color Palette 1_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP1_227G ,Color Palette 1_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP1_227B ,Color Palette 1_227 Blue" line.long 0x390 "CP1_228R,Color Palette 1 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP1_228A ,Color Palette 1_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP1_228R ,Color Palette 1_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP1_228G ,Color Palette 1_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP1_228B ,Color Palette 1_228 Blue" line.long 0x394 "CP1_229R,Color Palette 1 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP1_229A ,Color Palette 1_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP1_229R ,Color Palette 1_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP1_229G ,Color Palette 1_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP1_229B ,Color Palette 1_229 Blue" line.long 0x398 "CP1_230R,Color Palette 1 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP1_230A ,Color Palette 1_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP1_230R ,Color Palette 1_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP1_230G ,Color Palette 1_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP1_230B ,Color Palette 1_230 Blue" line.long 0x39C "CP1_231R,Color Palette 1 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP1_231A ,Color Palette 1_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP1_231R ,Color Palette 1_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP1_231G ,Color Palette 1_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP1_231B ,Color Palette 1_231 Blue" line.long 0x3A0 "CP1_232R,Color Palette 1 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP1_232A ,Color Palette 1_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP1_232R ,Color Palette 1_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP1_232G ,Color Palette 1_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP1_232B ,Color Palette 1_232 Blue" line.long 0x3A4 "CP1_233R,Color Palette 1 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP1_233A ,Color Palette 1_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP1_233R ,Color Palette 1_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP1_233G ,Color Palette 1_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP1_233B ,Color Palette 1_233 Blue" line.long 0x3A8 "CP1_234R,Color Palette 1 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP1_234A ,Color Palette 1_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP1_234R ,Color Palette 1_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP1_234G ,Color Palette 1_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP1_234B ,Color Palette 1_234 Blue" line.long 0x3AC "CP1_235R,Color Palette 1 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP1_235A ,Color Palette 1_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP1_235R ,Color Palette 1_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP1_235G ,Color Palette 1_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP1_235B ,Color Palette 1_235 Blue" line.long 0x3B0 "CP1_236R,Color Palette 1 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP1_236A ,Color Palette 1_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP1_236R ,Color Palette 1_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP1_236G ,Color Palette 1_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP1_236B ,Color Palette 1_236 Blue" line.long 0x3B4 "CP1_237R,Color Palette 1 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP1_237A ,Color Palette 1_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP1_237R ,Color Palette 1_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP1_237G ,Color Palette 1_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP1_237B ,Color Palette 1_237 Blue" line.long 0x3B8 "CP1_238R,Color Palette 1 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP1_238A ,Color Palette 1_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP1_238R ,Color Palette 1_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP1_238G ,Color Palette 1_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP1_238B ,Color Palette 1_238 Blue" line.long 0x3BC "CP1_239R,Color Palette 1 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP1_239A ,Color Palette 1_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP1_239R ,Color Palette 1_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP1_239G ,Color Palette 1_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP1_239B ,Color Palette 1_239 Blue" line.long 0x3C0 "CP1_240R,Color Palette 1 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP1_240A ,Color Palette 1_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP1_240R ,Color Palette 1_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP1_240G ,Color Palette 1_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP1_240B ,Color Palette 1_240 Blue" line.long 0x3C4 "CP1_241R,Color Palette 1 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP1_241A ,Color Palette 1_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP1_241R ,Color Palette 1_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP1_241G ,Color Palette 1_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP1_241B ,Color Palette 1_241 Blue" line.long 0x3C8 "CP1_242R,Color Palette 1 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP1_242A ,Color Palette 1_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP1_242R ,Color Palette 1_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP1_242G ,Color Palette 1_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP1_242B ,Color Palette 1_242 Blue" line.long 0x3CC "CP1_243R,Color Palette 1 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP1_243A ,Color Palette 1_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP1_243R ,Color Palette 1_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP1_243G ,Color Palette 1_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP1_243B ,Color Palette 1_243 Blue" line.long 0x3D0 "CP1_244R,Color Palette 1 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP1_244A ,Color Palette 1_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP1_244R ,Color Palette 1_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP1_244G ,Color Palette 1_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP1_244B ,Color Palette 1_244 Blue" line.long 0x3D4 "CP1_245R,Color Palette 1 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP1_245A ,Color Palette 1_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP1_245R ,Color Palette 1_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP1_245G ,Color Palette 1_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP1_245B ,Color Palette 1_245 Blue" line.long 0x3D8 "CP1_246R,Color Palette 1 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP1_246A ,Color Palette 1_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP1_246R ,Color Palette 1_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP1_246G ,Color Palette 1_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP1_246B ,Color Palette 1_246 Blue" line.long 0x3DC "CP1_247R,Color Palette 1 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP1_247A ,Color Palette 1_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP1_247R ,Color Palette 1_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP1_247G ,Color Palette 1_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP1_247B ,Color Palette 1_247 Blue" line.long 0x3E0 "CP1_248R,Color Palette 1 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP1_248A ,Color Palette 1_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP1_248R ,Color Palette 1_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP1_248G ,Color Palette 1_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP1_248B ,Color Palette 1_248 Blue" line.long 0x3E4 "CP1_249R,Color Palette 1 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP1_249A ,Color Palette 1_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP1_249R ,Color Palette 1_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP1_249G ,Color Palette 1_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP1_249B ,Color Palette 1_249 Blue" line.long 0x3E8 "CP1_250R,Color Palette 1 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP1_250A ,Color Palette 1_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP1_250R ,Color Palette 1_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP1_250G ,Color Palette 1_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP1_250B ,Color Palette 1_250 Blue" line.long 0x3EC "CP1_251R,Color Palette 1 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP1_251A ,Color Palette 1_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP1_251R ,Color Palette 1_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP1_251G ,Color Palette 1_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP1_251B ,Color Palette 1_251 Blue" line.long 0x3F0 "CP1_252R,Color Palette 1 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP1_252A ,Color Palette 1_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP1_252R ,Color Palette 1_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP1_252G ,Color Palette 1_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP1_252B ,Color Palette 1_252 Blue" line.long 0x3F4 "CP1_253R,Color Palette 1 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP1_253A ,Color Palette 1_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP1_253R ,Color Palette 1_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP1_253G ,Color Palette 1_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP1_253B ,Color Palette 1_253 Blue" line.long 0x3F8 "CP1_254R,Color Palette 1 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP1_254A ,Color Palette 1_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP1_254R ,Color Palette 1_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP1_254G ,Color Palette 1_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP1_254B ,Color Palette 1_254 Blue" line.long 0x3FC "CP1_255R,Color Palette 1 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP1_255A ,Color Palette 1_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP1_255R ,Color Palette 1_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP1_255G ,Color Palette 1_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP1_255B ,Color Palette 1_255 Blue" tree.end tree "Color Palette 2 Registers" width 10. group.long 0x2000++0x3ff line.long 0x0 "CP2_0R,Color Palette 2 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP2_0A ,Color Palette 2_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP2_0R ,Color Palette 2_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP2_0G ,Color Palette 2_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP2_0B ,Color Palette 2_0 Blue" line.long 0x4 "CP2_1R,Color Palette 2 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP2_1A ,Color Palette 2_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP2_1R ,Color Palette 2_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP2_1G ,Color Palette 2_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP2_1B ,Color Palette 2_1 Blue" line.long 0x8 "CP2_2R,Color Palette 2 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP2_2A ,Color Palette 2_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP2_2R ,Color Palette 2_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP2_2G ,Color Palette 2_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP2_2B ,Color Palette 2_2 Blue" line.long 0xC "CP2_3R,Color Palette 2 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP2_3A ,Color Palette 2_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP2_3R ,Color Palette 2_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP2_3G ,Color Palette 2_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP2_3B ,Color Palette 2_3 Blue" line.long 0x10 "CP2_4R,Color Palette 2 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP2_4A ,Color Palette 2_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP2_4R ,Color Palette 2_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP2_4G ,Color Palette 2_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP2_4B ,Color Palette 2_4 Blue" line.long 0x14 "CP2_5R,Color Palette 2 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP2_5A ,Color Palette 2_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP2_5R ,Color Palette 2_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP2_5G ,Color Palette 2_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP2_5B ,Color Palette 2_5 Blue" line.long 0x18 "CP2_6R,Color Palette 2 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP2_6A ,Color Palette 2_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP2_6R ,Color Palette 2_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP2_6G ,Color Palette 2_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP2_6B ,Color Palette 2_6 Blue" line.long 0x1C "CP2_7R,Color Palette 2 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP2_7A ,Color Palette 2_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP2_7R ,Color Palette 2_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP2_7G ,Color Palette 2_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP2_7B ,Color Palette 2_7 Blue" line.long 0x20 "CP2_8R,Color Palette 2 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP2_8A ,Color Palette 2_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP2_8R ,Color Palette 2_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP2_8G ,Color Palette 2_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP2_8B ,Color Palette 2_8 Blue" line.long 0x24 "CP2_9R,Color Palette 2 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP2_9A ,Color Palette 2_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP2_9R ,Color Palette 2_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP2_9G ,Color Palette 2_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP2_9B ,Color Palette 2_9 Blue" line.long 0x28 "CP2_10R,Color Palette 2 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP2_10A ,Color Palette 2_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP2_10R ,Color Palette 2_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP2_10G ,Color Palette 2_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP2_10B ,Color Palette 2_10 Blue" line.long 0x2C "CP2_11R,Color Palette 2 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP2_11A ,Color Palette 2_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP2_11R ,Color Palette 2_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP2_11G ,Color Palette 2_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP2_11B ,Color Palette 2_11 Blue" line.long 0x30 "CP2_12R,Color Palette 2 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP2_12A ,Color Palette 2_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP2_12R ,Color Palette 2_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP2_12G ,Color Palette 2_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP2_12B ,Color Palette 2_12 Blue" line.long 0x34 "CP2_13R,Color Palette 2 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP2_13A ,Color Palette 2_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP2_13R ,Color Palette 2_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP2_13G ,Color Palette 2_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP2_13B ,Color Palette 2_13 Blue" line.long 0x38 "CP2_14R,Color Palette 2 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP2_14A ,Color Palette 2_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP2_14R ,Color Palette 2_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP2_14G ,Color Palette 2_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP2_14B ,Color Palette 2_14 Blue" line.long 0x3C "CP2_15R,Color Palette 2 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP2_15A ,Color Palette 2_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP2_15R ,Color Palette 2_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP2_15G ,Color Palette 2_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP2_15B ,Color Palette 2_15 Blue" line.long 0x40 "CP2_16R,Color Palette 2 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP2_16A ,Color Palette 2_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP2_16R ,Color Palette 2_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP2_16G ,Color Palette 2_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP2_16B ,Color Palette 2_16 Blue" line.long 0x44 "CP2_17R,Color Palette 2 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP2_17A ,Color Palette 2_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP2_17R ,Color Palette 2_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP2_17G ,Color Palette 2_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP2_17B ,Color Palette 2_17 Blue" line.long 0x48 "CP2_18R,Color Palette 2 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP2_18A ,Color Palette 2_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP2_18R ,Color Palette 2_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP2_18G ,Color Palette 2_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP2_18B ,Color Palette 2_18 Blue" line.long 0x4C "CP2_19R,Color Palette 2 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP2_19A ,Color Palette 2_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP2_19R ,Color Palette 2_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP2_19G ,Color Palette 2_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP2_19B ,Color Palette 2_19 Blue" line.long 0x50 "CP2_20R,Color Palette 2 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP2_20A ,Color Palette 2_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP2_20R ,Color Palette 2_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP2_20G ,Color Palette 2_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP2_20B ,Color Palette 2_20 Blue" line.long 0x54 "CP2_21R,Color Palette 2 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP2_21A ,Color Palette 2_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP2_21R ,Color Palette 2_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP2_21G ,Color Palette 2_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP2_21B ,Color Palette 2_21 Blue" line.long 0x58 "CP2_22R,Color Palette 2 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP2_22A ,Color Palette 2_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP2_22R ,Color Palette 2_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP2_22G ,Color Palette 2_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP2_22B ,Color Palette 2_22 Blue" line.long 0x5C "CP2_23R,Color Palette 2 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP2_23A ,Color Palette 2_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP2_23R ,Color Palette 2_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP2_23G ,Color Palette 2_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP2_23B ,Color Palette 2_23 Blue" line.long 0x60 "CP2_24R,Color Palette 2 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP2_24A ,Color Palette 2_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP2_24R ,Color Palette 2_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP2_24G ,Color Palette 2_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP2_24B ,Color Palette 2_24 Blue" line.long 0x64 "CP2_25R,Color Palette 2 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP2_25A ,Color Palette 2_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP2_25R ,Color Palette 2_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP2_25G ,Color Palette 2_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP2_25B ,Color Palette 2_25 Blue" line.long 0x68 "CP2_26R,Color Palette 2 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP2_26A ,Color Palette 2_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP2_26R ,Color Palette 2_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP2_26G ,Color Palette 2_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP2_26B ,Color Palette 2_26 Blue" line.long 0x6C "CP2_27R,Color Palette 2 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP2_27A ,Color Palette 2_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP2_27R ,Color Palette 2_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP2_27G ,Color Palette 2_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP2_27B ,Color Palette 2_27 Blue" line.long 0x70 "CP2_28R,Color Palette 2 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP2_28A ,Color Palette 2_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP2_28R ,Color Palette 2_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP2_28G ,Color Palette 2_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP2_28B ,Color Palette 2_28 Blue" line.long 0x74 "CP2_29R,Color Palette 2 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP2_29A ,Color Palette 2_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP2_29R ,Color Palette 2_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP2_29G ,Color Palette 2_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP2_29B ,Color Palette 2_29 Blue" line.long 0x78 "CP2_30R,Color Palette 2 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP2_30A ,Color Palette 2_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP2_30R ,Color Palette 2_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP2_30G ,Color Palette 2_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP2_30B ,Color Palette 2_30 Blue" line.long 0x7C "CP2_31R,Color Palette 2 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP2_31A ,Color Palette 2_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP2_31R ,Color Palette 2_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP2_31G ,Color Palette 2_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP2_31B ,Color Palette 2_31 Blue" line.long 0x80 "CP2_32R,Color Palette 2 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP2_32A ,Color Palette 2_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP2_32R ,Color Palette 2_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP2_32G ,Color Palette 2_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP2_32B ,Color Palette 2_32 Blue" line.long 0x84 "CP2_33R,Color Palette 2 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP2_33A ,Color Palette 2_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP2_33R ,Color Palette 2_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP2_33G ,Color Palette 2_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP2_33B ,Color Palette 2_33 Blue" line.long 0x88 "CP2_34R,Color Palette 2 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP2_34A ,Color Palette 2_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP2_34R ,Color Palette 2_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP2_34G ,Color Palette 2_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP2_34B ,Color Palette 2_34 Blue" line.long 0x8C "CP2_35R,Color Palette 2 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP2_35A ,Color Palette 2_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP2_35R ,Color Palette 2_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP2_35G ,Color Palette 2_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP2_35B ,Color Palette 2_35 Blue" line.long 0x90 "CP2_36R,Color Palette 2 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP2_36A ,Color Palette 2_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP2_36R ,Color Palette 2_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP2_36G ,Color Palette 2_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP2_36B ,Color Palette 2_36 Blue" line.long 0x94 "CP2_37R,Color Palette 2 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP2_37A ,Color Palette 2_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP2_37R ,Color Palette 2_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP2_37G ,Color Palette 2_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP2_37B ,Color Palette 2_37 Blue" line.long 0x98 "CP2_38R,Color Palette 2 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP2_38A ,Color Palette 2_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP2_38R ,Color Palette 2_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP2_38G ,Color Palette 2_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP2_38B ,Color Palette 2_38 Blue" line.long 0x9C "CP2_39R,Color Palette 2 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP2_39A ,Color Palette 2_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP2_39R ,Color Palette 2_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP2_39G ,Color Palette 2_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP2_39B ,Color Palette 2_39 Blue" line.long 0xA0 "CP2_40R,Color Palette 2 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP2_40A ,Color Palette 2_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP2_40R ,Color Palette 2_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP2_40G ,Color Palette 2_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP2_40B ,Color Palette 2_40 Blue" line.long 0xA4 "CP2_41R,Color Palette 2 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP2_41A ,Color Palette 2_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP2_41R ,Color Palette 2_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP2_41G ,Color Palette 2_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP2_41B ,Color Palette 2_41 Blue" line.long 0xA8 "CP2_42R,Color Palette 2 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP2_42A ,Color Palette 2_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP2_42R ,Color Palette 2_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP2_42G ,Color Palette 2_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP2_42B ,Color Palette 2_42 Blue" line.long 0xAC "CP2_43R,Color Palette 2 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP2_43A ,Color Palette 2_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP2_43R ,Color Palette 2_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP2_43G ,Color Palette 2_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP2_43B ,Color Palette 2_43 Blue" line.long 0xB0 "CP2_44R,Color Palette 2 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP2_44A ,Color Palette 2_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP2_44R ,Color Palette 2_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP2_44G ,Color Palette 2_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP2_44B ,Color Palette 2_44 Blue" line.long 0xB4 "CP2_45R,Color Palette 2 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP2_45A ,Color Palette 2_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP2_45R ,Color Palette 2_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP2_45G ,Color Palette 2_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP2_45B ,Color Palette 2_45 Blue" line.long 0xB8 "CP2_46R,Color Palette 2 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP2_46A ,Color Palette 2_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP2_46R ,Color Palette 2_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP2_46G ,Color Palette 2_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP2_46B ,Color Palette 2_46 Blue" line.long 0xBC "CP2_47R,Color Palette 2 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP2_47A ,Color Palette 2_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP2_47R ,Color Palette 2_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP2_47G ,Color Palette 2_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP2_47B ,Color Palette 2_47 Blue" line.long 0xC0 "CP2_48R,Color Palette 2 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP2_48A ,Color Palette 2_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP2_48R ,Color Palette 2_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP2_48G ,Color Palette 2_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP2_48B ,Color Palette 2_48 Blue" line.long 0xC4 "CP2_49R,Color Palette 2 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP2_49A ,Color Palette 2_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP2_49R ,Color Palette 2_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP2_49G ,Color Palette 2_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP2_49B ,Color Palette 2_49 Blue" line.long 0xC8 "CP2_50R,Color Palette 2 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP2_50A ,Color Palette 2_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP2_50R ,Color Palette 2_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP2_50G ,Color Palette 2_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP2_50B ,Color Palette 2_50 Blue" line.long 0xCC "CP2_51R,Color Palette 2 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP2_51A ,Color Palette 2_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP2_51R ,Color Palette 2_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP2_51G ,Color Palette 2_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP2_51B ,Color Palette 2_51 Blue" line.long 0xD0 "CP2_52R,Color Palette 2 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP2_52A ,Color Palette 2_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP2_52R ,Color Palette 2_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP2_52G ,Color Palette 2_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP2_52B ,Color Palette 2_52 Blue" line.long 0xD4 "CP2_53R,Color Palette 2 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP2_53A ,Color Palette 2_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP2_53R ,Color Palette 2_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP2_53G ,Color Palette 2_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP2_53B ,Color Palette 2_53 Blue" line.long 0xD8 "CP2_54R,Color Palette 2 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP2_54A ,Color Palette 2_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP2_54R ,Color Palette 2_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP2_54G ,Color Palette 2_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP2_54B ,Color Palette 2_54 Blue" line.long 0xDC "CP2_55R,Color Palette 2 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP2_55A ,Color Palette 2_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP2_55R ,Color Palette 2_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP2_55G ,Color Palette 2_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP2_55B ,Color Palette 2_55 Blue" line.long 0xE0 "CP2_56R,Color Palette 2 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP2_56A ,Color Palette 2_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP2_56R ,Color Palette 2_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP2_56G ,Color Palette 2_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP2_56B ,Color Palette 2_56 Blue" line.long 0xE4 "CP2_57R,Color Palette 2 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP2_57A ,Color Palette 2_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP2_57R ,Color Palette 2_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP2_57G ,Color Palette 2_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP2_57B ,Color Palette 2_57 Blue" line.long 0xE8 "CP2_58R,Color Palette 2 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP2_58A ,Color Palette 2_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP2_58R ,Color Palette 2_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP2_58G ,Color Palette 2_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP2_58B ,Color Palette 2_58 Blue" line.long 0xEC "CP2_59R,Color Palette 2 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP2_59A ,Color Palette 2_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP2_59R ,Color Palette 2_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP2_59G ,Color Palette 2_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP2_59B ,Color Palette 2_59 Blue" line.long 0xF0 "CP2_60R,Color Palette 2 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP2_60A ,Color Palette 2_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP2_60R ,Color Palette 2_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP2_60G ,Color Palette 2_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP2_60B ,Color Palette 2_60 Blue" line.long 0xF4 "CP2_61R,Color Palette 2 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP2_61A ,Color Palette 2_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP2_61R ,Color Palette 2_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP2_61G ,Color Palette 2_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP2_61B ,Color Palette 2_61 Blue" line.long 0xF8 "CP2_62R,Color Palette 2 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP2_62A ,Color Palette 2_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP2_62R ,Color Palette 2_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP2_62G ,Color Palette 2_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP2_62B ,Color Palette 2_62 Blue" line.long 0xFC "CP2_63R,Color Palette 2 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP2_63A ,Color Palette 2_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP2_63R ,Color Palette 2_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP2_63G ,Color Palette 2_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP2_63B ,Color Palette 2_63 Blue" line.long 0x100 "CP2_64R,Color Palette 2 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP2_64A ,Color Palette 2_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP2_64R ,Color Palette 2_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP2_64G ,Color Palette 2_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP2_64B ,Color Palette 2_64 Blue" line.long 0x104 "CP2_65R,Color Palette 2 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP2_65A ,Color Palette 2_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP2_65R ,Color Palette 2_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP2_65G ,Color Palette 2_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP2_65B ,Color Palette 2_65 Blue" line.long 0x108 "CP2_66R,Color Palette 2 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP2_66A ,Color Palette 2_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP2_66R ,Color Palette 2_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP2_66G ,Color Palette 2_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP2_66B ,Color Palette 2_66 Blue" line.long 0x10C "CP2_67R,Color Palette 2 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP2_67A ,Color Palette 2_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP2_67R ,Color Palette 2_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP2_67G ,Color Palette 2_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP2_67B ,Color Palette 2_67 Blue" line.long 0x110 "CP2_68R,Color Palette 2 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP2_68A ,Color Palette 2_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP2_68R ,Color Palette 2_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP2_68G ,Color Palette 2_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP2_68B ,Color Palette 2_68 Blue" line.long 0x114 "CP2_69R,Color Palette 2 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP2_69A ,Color Palette 2_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP2_69R ,Color Palette 2_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP2_69G ,Color Palette 2_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP2_69B ,Color Palette 2_69 Blue" line.long 0x118 "CP2_70R,Color Palette 2 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP2_70A ,Color Palette 2_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP2_70R ,Color Palette 2_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP2_70G ,Color Palette 2_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP2_70B ,Color Palette 2_70 Blue" line.long 0x11C "CP2_71R,Color Palette 2 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP2_71A ,Color Palette 2_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP2_71R ,Color Palette 2_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP2_71G ,Color Palette 2_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP2_71B ,Color Palette 2_71 Blue" line.long 0x120 "CP2_72R,Color Palette 2 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP2_72A ,Color Palette 2_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP2_72R ,Color Palette 2_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP2_72G ,Color Palette 2_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP2_72B ,Color Palette 2_72 Blue" line.long 0x124 "CP2_73R,Color Palette 2 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP2_73A ,Color Palette 2_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP2_73R ,Color Palette 2_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP2_73G ,Color Palette 2_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP2_73B ,Color Palette 2_73 Blue" line.long 0x128 "CP2_74R,Color Palette 2 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP2_74A ,Color Palette 2_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP2_74R ,Color Palette 2_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP2_74G ,Color Palette 2_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP2_74B ,Color Palette 2_74 Blue" line.long 0x12C "CP2_75R,Color Palette 2 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP2_75A ,Color Palette 2_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP2_75R ,Color Palette 2_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP2_75G ,Color Palette 2_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP2_75B ,Color Palette 2_75 Blue" line.long 0x130 "CP2_76R,Color Palette 2 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP2_76A ,Color Palette 2_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP2_76R ,Color Palette 2_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP2_76G ,Color Palette 2_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP2_76B ,Color Palette 2_76 Blue" line.long 0x134 "CP2_77R,Color Palette 2 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP2_77A ,Color Palette 2_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP2_77R ,Color Palette 2_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP2_77G ,Color Palette 2_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP2_77B ,Color Palette 2_77 Blue" line.long 0x138 "CP2_78R,Color Palette 2 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP2_78A ,Color Palette 2_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP2_78R ,Color Palette 2_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP2_78G ,Color Palette 2_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP2_78B ,Color Palette 2_78 Blue" line.long 0x13C "CP2_79R,Color Palette 2 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP2_79A ,Color Palette 2_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP2_79R ,Color Palette 2_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP2_79G ,Color Palette 2_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP2_79B ,Color Palette 2_79 Blue" line.long 0x140 "CP2_80R,Color Palette 2 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP2_80A ,Color Palette 2_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP2_80R ,Color Palette 2_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP2_80G ,Color Palette 2_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP2_80B ,Color Palette 2_80 Blue" line.long 0x144 "CP2_81R,Color Palette 2 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP2_81A ,Color Palette 2_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP2_81R ,Color Palette 2_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP2_81G ,Color Palette 2_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP2_81B ,Color Palette 2_81 Blue" line.long 0x148 "CP2_82R,Color Palette 2 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP2_82A ,Color Palette 2_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP2_82R ,Color Palette 2_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP2_82G ,Color Palette 2_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP2_82B ,Color Palette 2_82 Blue" line.long 0x14C "CP2_83R,Color Palette 2 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP2_83A ,Color Palette 2_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP2_83R ,Color Palette 2_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP2_83G ,Color Palette 2_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP2_83B ,Color Palette 2_83 Blue" line.long 0x150 "CP2_84R,Color Palette 2 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP2_84A ,Color Palette 2_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP2_84R ,Color Palette 2_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP2_84G ,Color Palette 2_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP2_84B ,Color Palette 2_84 Blue" line.long 0x154 "CP2_85R,Color Palette 2 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP2_85A ,Color Palette 2_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP2_85R ,Color Palette 2_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP2_85G ,Color Palette 2_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP2_85B ,Color Palette 2_85 Blue" line.long 0x158 "CP2_86R,Color Palette 2 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP2_86A ,Color Palette 2_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP2_86R ,Color Palette 2_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP2_86G ,Color Palette 2_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP2_86B ,Color Palette 2_86 Blue" line.long 0x15C "CP2_87R,Color Palette 2 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP2_87A ,Color Palette 2_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP2_87R ,Color Palette 2_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP2_87G ,Color Palette 2_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP2_87B ,Color Palette 2_87 Blue" line.long 0x160 "CP2_88R,Color Palette 2 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP2_88A ,Color Palette 2_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP2_88R ,Color Palette 2_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP2_88G ,Color Palette 2_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP2_88B ,Color Palette 2_88 Blue" line.long 0x164 "CP2_89R,Color Palette 2 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP2_89A ,Color Palette 2_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP2_89R ,Color Palette 2_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP2_89G ,Color Palette 2_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP2_89B ,Color Palette 2_89 Blue" line.long 0x168 "CP2_90R,Color Palette 2 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP2_90A ,Color Palette 2_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP2_90R ,Color Palette 2_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP2_90G ,Color Palette 2_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP2_90B ,Color Palette 2_90 Blue" line.long 0x16C "CP2_91R,Color Palette 2 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP2_91A ,Color Palette 2_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP2_91R ,Color Palette 2_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP2_91G ,Color Palette 2_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP2_91B ,Color Palette 2_91 Blue" line.long 0x170 "CP2_92R,Color Palette 2 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP2_92A ,Color Palette 2_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP2_92R ,Color Palette 2_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP2_92G ,Color Palette 2_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP2_92B ,Color Palette 2_92 Blue" line.long 0x174 "CP2_93R,Color Palette 2 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP2_93A ,Color Palette 2_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP2_93R ,Color Palette 2_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP2_93G ,Color Palette 2_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP2_93B ,Color Palette 2_93 Blue" line.long 0x178 "CP2_94R,Color Palette 2 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP2_94A ,Color Palette 2_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP2_94R ,Color Palette 2_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP2_94G ,Color Palette 2_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP2_94B ,Color Palette 2_94 Blue" line.long 0x17C "CP2_95R,Color Palette 2 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP2_95A ,Color Palette 2_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP2_95R ,Color Palette 2_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP2_95G ,Color Palette 2_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP2_95B ,Color Palette 2_95 Blue" line.long 0x180 "CP2_96R,Color Palette 2 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP2_96A ,Color Palette 2_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP2_96R ,Color Palette 2_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP2_96G ,Color Palette 2_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP2_96B ,Color Palette 2_96 Blue" line.long 0x184 "CP2_97R,Color Palette 2 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP2_97A ,Color Palette 2_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP2_97R ,Color Palette 2_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP2_97G ,Color Palette 2_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP2_97B ,Color Palette 2_97 Blue" line.long 0x188 "CP2_98R,Color Palette 2 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP2_98A ,Color Palette 2_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP2_98R ,Color Palette 2_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP2_98G ,Color Palette 2_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP2_98B ,Color Palette 2_98 Blue" line.long 0x18C "CP2_99R,Color Palette 2 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP2_99A ,Color Palette 2_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP2_99R ,Color Palette 2_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP2_99G ,Color Palette 2_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP2_99B ,Color Palette 2_99 Blue" line.long 0x190 "CP2_100R,Color Palette 2 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP2_100A ,Color Palette 2_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP2_100R ,Color Palette 2_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP2_100G ,Color Palette 2_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP2_100B ,Color Palette 2_100 Blue" line.long 0x194 "CP2_101R,Color Palette 2 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP2_101A ,Color Palette 2_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP2_101R ,Color Palette 2_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP2_101G ,Color Palette 2_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP2_101B ,Color Palette 2_101 Blue" line.long 0x198 "CP2_102R,Color Palette 2 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP2_102A ,Color Palette 2_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP2_102R ,Color Palette 2_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP2_102G ,Color Palette 2_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP2_102B ,Color Palette 2_102 Blue" line.long 0x19C "CP2_103R,Color Palette 2 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP2_103A ,Color Palette 2_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP2_103R ,Color Palette 2_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP2_103G ,Color Palette 2_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP2_103B ,Color Palette 2_103 Blue" line.long 0x1A0 "CP2_104R,Color Palette 2 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP2_104A ,Color Palette 2_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP2_104R ,Color Palette 2_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP2_104G ,Color Palette 2_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP2_104B ,Color Palette 2_104 Blue" line.long 0x1A4 "CP2_105R,Color Palette 2 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP2_105A ,Color Palette 2_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP2_105R ,Color Palette 2_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP2_105G ,Color Palette 2_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP2_105B ,Color Palette 2_105 Blue" line.long 0x1A8 "CP2_106R,Color Palette 2 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP2_106A ,Color Palette 2_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP2_106R ,Color Palette 2_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP2_106G ,Color Palette 2_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP2_106B ,Color Palette 2_106 Blue" line.long 0x1AC "CP2_107R,Color Palette 2 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP2_107A ,Color Palette 2_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP2_107R ,Color Palette 2_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP2_107G ,Color Palette 2_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP2_107B ,Color Palette 2_107 Blue" line.long 0x1B0 "CP2_108R,Color Palette 2 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP2_108A ,Color Palette 2_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP2_108R ,Color Palette 2_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP2_108G ,Color Palette 2_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP2_108B ,Color Palette 2_108 Blue" line.long 0x1B4 "CP2_109R,Color Palette 2 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP2_109A ,Color Palette 2_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP2_109R ,Color Palette 2_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP2_109G ,Color Palette 2_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP2_109B ,Color Palette 2_109 Blue" line.long 0x1B8 "CP2_110R,Color Palette 2 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP2_110A ,Color Palette 2_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP2_110R ,Color Palette 2_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP2_110G ,Color Palette 2_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP2_110B ,Color Palette 2_110 Blue" line.long 0x1BC "CP2_111R,Color Palette 2 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP2_111A ,Color Palette 2_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP2_111R ,Color Palette 2_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP2_111G ,Color Palette 2_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP2_111B ,Color Palette 2_111 Blue" line.long 0x1C0 "CP2_112R,Color Palette 2 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP2_112A ,Color Palette 2_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP2_112R ,Color Palette 2_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP2_112G ,Color Palette 2_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP2_112B ,Color Palette 2_112 Blue" line.long 0x1C4 "CP2_113R,Color Palette 2 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP2_113A ,Color Palette 2_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP2_113R ,Color Palette 2_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP2_113G ,Color Palette 2_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP2_113B ,Color Palette 2_113 Blue" line.long 0x1C8 "CP2_114R,Color Palette 2 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP2_114A ,Color Palette 2_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP2_114R ,Color Palette 2_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP2_114G ,Color Palette 2_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP2_114B ,Color Palette 2_114 Blue" line.long 0x1CC "CP2_115R,Color Palette 2 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP2_115A ,Color Palette 2_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP2_115R ,Color Palette 2_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP2_115G ,Color Palette 2_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP2_115B ,Color Palette 2_115 Blue" line.long 0x1D0 "CP2_116R,Color Palette 2 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP2_116A ,Color Palette 2_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP2_116R ,Color Palette 2_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP2_116G ,Color Palette 2_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP2_116B ,Color Palette 2_116 Blue" line.long 0x1D4 "CP2_117R,Color Palette 2 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP2_117A ,Color Palette 2_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP2_117R ,Color Palette 2_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP2_117G ,Color Palette 2_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP2_117B ,Color Palette 2_117 Blue" line.long 0x1D8 "CP2_118R,Color Palette 2 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP2_118A ,Color Palette 2_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP2_118R ,Color Palette 2_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP2_118G ,Color Palette 2_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP2_118B ,Color Palette 2_118 Blue" line.long 0x1DC "CP2_119R,Color Palette 2 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP2_119A ,Color Palette 2_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP2_119R ,Color Palette 2_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP2_119G ,Color Palette 2_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP2_119B ,Color Palette 2_119 Blue" line.long 0x1E0 "CP2_120R,Color Palette 2 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP2_120A ,Color Palette 2_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP2_120R ,Color Palette 2_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP2_120G ,Color Palette 2_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP2_120B ,Color Palette 2_120 Blue" line.long 0x1E4 "CP2_121R,Color Palette 2 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP2_121A ,Color Palette 2_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP2_121R ,Color Palette 2_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP2_121G ,Color Palette 2_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP2_121B ,Color Palette 2_121 Blue" line.long 0x1E8 "CP2_122R,Color Palette 2 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP2_122A ,Color Palette 2_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP2_122R ,Color Palette 2_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP2_122G ,Color Palette 2_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP2_122B ,Color Palette 2_122 Blue" line.long 0x1EC "CP2_123R,Color Palette 2 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP2_123A ,Color Palette 2_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP2_123R ,Color Palette 2_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP2_123G ,Color Palette 2_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP2_123B ,Color Palette 2_123 Blue" line.long 0x1F0 "CP2_124R,Color Palette 2 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP2_124A ,Color Palette 2_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP2_124R ,Color Palette 2_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP2_124G ,Color Palette 2_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP2_124B ,Color Palette 2_124 Blue" line.long 0x1F4 "CP2_125R,Color Palette 2 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP2_125A ,Color Palette 2_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP2_125R ,Color Palette 2_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP2_125G ,Color Palette 2_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP2_125B ,Color Palette 2_125 Blue" line.long 0x1F8 "CP2_126R,Color Palette 2 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP2_126A ,Color Palette 2_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP2_126R ,Color Palette 2_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP2_126G ,Color Palette 2_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP2_126B ,Color Palette 2_126 Blue" line.long 0x1FC "CP2_127R,Color Palette 2 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP2_127A ,Color Palette 2_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP2_127R ,Color Palette 2_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP2_127G ,Color Palette 2_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP2_127B ,Color Palette 2_127 Blue" line.long 0x200 "CP2_128R,Color Palette 2 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP2_128A ,Color Palette 2_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP2_128R ,Color Palette 2_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP2_128G ,Color Palette 2_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP2_128B ,Color Palette 2_128 Blue" line.long 0x204 "CP2_129R,Color Palette 2 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP2_129A ,Color Palette 2_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP2_129R ,Color Palette 2_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP2_129G ,Color Palette 2_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP2_129B ,Color Palette 2_129 Blue" line.long 0x208 "CP2_130R,Color Palette 2 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP2_130A ,Color Palette 2_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP2_130R ,Color Palette 2_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP2_130G ,Color Palette 2_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP2_130B ,Color Palette 2_130 Blue" line.long 0x20C "CP2_131R,Color Palette 2 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP2_131A ,Color Palette 2_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP2_131R ,Color Palette 2_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP2_131G ,Color Palette 2_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP2_131B ,Color Palette 2_131 Blue" line.long 0x210 "CP2_132R,Color Palette 2 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP2_132A ,Color Palette 2_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP2_132R ,Color Palette 2_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP2_132G ,Color Palette 2_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP2_132B ,Color Palette 2_132 Blue" line.long 0x214 "CP2_133R,Color Palette 2 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP2_133A ,Color Palette 2_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP2_133R ,Color Palette 2_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP2_133G ,Color Palette 2_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP2_133B ,Color Palette 2_133 Blue" line.long 0x218 "CP2_134R,Color Palette 2 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP2_134A ,Color Palette 2_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP2_134R ,Color Palette 2_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP2_134G ,Color Palette 2_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP2_134B ,Color Palette 2_134 Blue" line.long 0x21C "CP2_135R,Color Palette 2 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP2_135A ,Color Palette 2_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP2_135R ,Color Palette 2_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP2_135G ,Color Palette 2_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP2_135B ,Color Palette 2_135 Blue" line.long 0x220 "CP2_136R,Color Palette 2 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP2_136A ,Color Palette 2_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP2_136R ,Color Palette 2_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP2_136G ,Color Palette 2_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP2_136B ,Color Palette 2_136 Blue" line.long 0x224 "CP2_137R,Color Palette 2 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP2_137A ,Color Palette 2_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP2_137R ,Color Palette 2_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP2_137G ,Color Palette 2_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP2_137B ,Color Palette 2_137 Blue" line.long 0x228 "CP2_138R,Color Palette 2 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP2_138A ,Color Palette 2_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP2_138R ,Color Palette 2_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP2_138G ,Color Palette 2_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP2_138B ,Color Palette 2_138 Blue" line.long 0x22C "CP2_139R,Color Palette 2 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP2_139A ,Color Palette 2_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP2_139R ,Color Palette 2_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP2_139G ,Color Palette 2_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP2_139B ,Color Palette 2_139 Blue" line.long 0x230 "CP2_140R,Color Palette 2 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP2_140A ,Color Palette 2_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP2_140R ,Color Palette 2_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP2_140G ,Color Palette 2_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP2_140B ,Color Palette 2_140 Blue" line.long 0x234 "CP2_141R,Color Palette 2 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP2_141A ,Color Palette 2_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP2_141R ,Color Palette 2_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP2_141G ,Color Palette 2_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP2_141B ,Color Palette 2_141 Blue" line.long 0x238 "CP2_142R,Color Palette 2 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP2_142A ,Color Palette 2_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP2_142R ,Color Palette 2_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP2_142G ,Color Palette 2_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP2_142B ,Color Palette 2_142 Blue" line.long 0x23C "CP2_143R,Color Palette 2 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP2_143A ,Color Palette 2_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP2_143R ,Color Palette 2_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP2_143G ,Color Palette 2_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP2_143B ,Color Palette 2_143 Blue" line.long 0x240 "CP2_144R,Color Palette 2 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP2_144A ,Color Palette 2_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP2_144R ,Color Palette 2_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP2_144G ,Color Palette 2_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP2_144B ,Color Palette 2_144 Blue" line.long 0x244 "CP2_145R,Color Palette 2 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP2_145A ,Color Palette 2_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP2_145R ,Color Palette 2_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP2_145G ,Color Palette 2_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP2_145B ,Color Palette 2_145 Blue" line.long 0x248 "CP2_146R,Color Palette 2 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP2_146A ,Color Palette 2_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP2_146R ,Color Palette 2_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP2_146G ,Color Palette 2_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP2_146B ,Color Palette 2_146 Blue" line.long 0x24C "CP2_147R,Color Palette 2 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP2_147A ,Color Palette 2_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP2_147R ,Color Palette 2_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP2_147G ,Color Palette 2_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP2_147B ,Color Palette 2_147 Blue" line.long 0x250 "CP2_148R,Color Palette 2 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP2_148A ,Color Palette 2_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP2_148R ,Color Palette 2_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP2_148G ,Color Palette 2_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP2_148B ,Color Palette 2_148 Blue" line.long 0x254 "CP2_149R,Color Palette 2 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP2_149A ,Color Palette 2_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP2_149R ,Color Palette 2_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP2_149G ,Color Palette 2_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP2_149B ,Color Palette 2_149 Blue" line.long 0x258 "CP2_150R,Color Palette 2 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP2_150A ,Color Palette 2_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP2_150R ,Color Palette 2_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP2_150G ,Color Palette 2_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP2_150B ,Color Palette 2_150 Blue" line.long 0x25C "CP2_151R,Color Palette 2 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP2_151A ,Color Palette 2_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP2_151R ,Color Palette 2_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP2_151G ,Color Palette 2_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP2_151B ,Color Palette 2_151 Blue" line.long 0x260 "CP2_152R,Color Palette 2 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP2_152A ,Color Palette 2_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP2_152R ,Color Palette 2_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP2_152G ,Color Palette 2_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP2_152B ,Color Palette 2_152 Blue" line.long 0x264 "CP2_153R,Color Palette 2 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP2_153A ,Color Palette 2_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP2_153R ,Color Palette 2_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP2_153G ,Color Palette 2_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP2_153B ,Color Palette 2_153 Blue" line.long 0x268 "CP2_154R,Color Palette 2 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP2_154A ,Color Palette 2_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP2_154R ,Color Palette 2_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP2_154G ,Color Palette 2_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP2_154B ,Color Palette 2_154 Blue" line.long 0x26C "CP2_155R,Color Palette 2 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP2_155A ,Color Palette 2_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP2_155R ,Color Palette 2_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP2_155G ,Color Palette 2_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP2_155B ,Color Palette 2_155 Blue" line.long 0x270 "CP2_156R,Color Palette 2 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP2_156A ,Color Palette 2_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP2_156R ,Color Palette 2_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP2_156G ,Color Palette 2_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP2_156B ,Color Palette 2_156 Blue" line.long 0x274 "CP2_157R,Color Palette 2 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP2_157A ,Color Palette 2_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP2_157R ,Color Palette 2_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP2_157G ,Color Palette 2_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP2_157B ,Color Palette 2_157 Blue" line.long 0x278 "CP2_158R,Color Palette 2 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP2_158A ,Color Palette 2_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP2_158R ,Color Palette 2_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP2_158G ,Color Palette 2_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP2_158B ,Color Palette 2_158 Blue" line.long 0x27C "CP2_159R,Color Palette 2 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP2_159A ,Color Palette 2_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP2_159R ,Color Palette 2_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP2_159G ,Color Palette 2_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP2_159B ,Color Palette 2_159 Blue" line.long 0x280 "CP2_160R,Color Palette 2 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP2_160A ,Color Palette 2_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP2_160R ,Color Palette 2_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP2_160G ,Color Palette 2_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP2_160B ,Color Palette 2_160 Blue" line.long 0x284 "CP2_161R,Color Palette 2 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP2_161A ,Color Palette 2_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP2_161R ,Color Palette 2_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP2_161G ,Color Palette 2_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP2_161B ,Color Palette 2_161 Blue" line.long 0x288 "CP2_162R,Color Palette 2 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP2_162A ,Color Palette 2_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP2_162R ,Color Palette 2_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP2_162G ,Color Palette 2_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP2_162B ,Color Palette 2_162 Blue" line.long 0x28C "CP2_163R,Color Palette 2 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP2_163A ,Color Palette 2_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP2_163R ,Color Palette 2_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP2_163G ,Color Palette 2_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP2_163B ,Color Palette 2_163 Blue" line.long 0x290 "CP2_164R,Color Palette 2 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP2_164A ,Color Palette 2_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP2_164R ,Color Palette 2_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP2_164G ,Color Palette 2_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP2_164B ,Color Palette 2_164 Blue" line.long 0x294 "CP2_165R,Color Palette 2 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP2_165A ,Color Palette 2_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP2_165R ,Color Palette 2_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP2_165G ,Color Palette 2_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP2_165B ,Color Palette 2_165 Blue" line.long 0x298 "CP2_166R,Color Palette 2 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP2_166A ,Color Palette 2_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP2_166R ,Color Palette 2_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP2_166G ,Color Palette 2_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP2_166B ,Color Palette 2_166 Blue" line.long 0x29C "CP2_167R,Color Palette 2 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP2_167A ,Color Palette 2_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP2_167R ,Color Palette 2_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP2_167G ,Color Palette 2_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP2_167B ,Color Palette 2_167 Blue" line.long 0x2A0 "CP2_168R,Color Palette 2 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP2_168A ,Color Palette 2_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP2_168R ,Color Palette 2_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP2_168G ,Color Palette 2_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP2_168B ,Color Palette 2_168 Blue" line.long 0x2A4 "CP2_169R,Color Palette 2 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP2_169A ,Color Palette 2_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP2_169R ,Color Palette 2_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP2_169G ,Color Palette 2_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP2_169B ,Color Palette 2_169 Blue" line.long 0x2A8 "CP2_170R,Color Palette 2 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP2_170A ,Color Palette 2_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP2_170R ,Color Palette 2_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP2_170G ,Color Palette 2_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP2_170B ,Color Palette 2_170 Blue" line.long 0x2AC "CP2_171R,Color Palette 2 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP2_171A ,Color Palette 2_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP2_171R ,Color Palette 2_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP2_171G ,Color Palette 2_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP2_171B ,Color Palette 2_171 Blue" line.long 0x2B0 "CP2_172R,Color Palette 2 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP2_172A ,Color Palette 2_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP2_172R ,Color Palette 2_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP2_172G ,Color Palette 2_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP2_172B ,Color Palette 2_172 Blue" line.long 0x2B4 "CP2_173R,Color Palette 2 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP2_173A ,Color Palette 2_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP2_173R ,Color Palette 2_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP2_173G ,Color Palette 2_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP2_173B ,Color Palette 2_173 Blue" line.long 0x2B8 "CP2_174R,Color Palette 2 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP2_174A ,Color Palette 2_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP2_174R ,Color Palette 2_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP2_174G ,Color Palette 2_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP2_174B ,Color Palette 2_174 Blue" line.long 0x2BC "CP2_175R,Color Palette 2 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP2_175A ,Color Palette 2_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP2_175R ,Color Palette 2_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP2_175G ,Color Palette 2_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP2_175B ,Color Palette 2_175 Blue" line.long 0x2C0 "CP2_176R,Color Palette 2 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP2_176A ,Color Palette 2_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP2_176R ,Color Palette 2_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP2_176G ,Color Palette 2_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP2_176B ,Color Palette 2_176 Blue" line.long 0x2C4 "CP2_177R,Color Palette 2 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP2_177A ,Color Palette 2_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP2_177R ,Color Palette 2_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP2_177G ,Color Palette 2_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP2_177B ,Color Palette 2_177 Blue" line.long 0x2C8 "CP2_178R,Color Palette 2 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP2_178A ,Color Palette 2_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP2_178R ,Color Palette 2_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP2_178G ,Color Palette 2_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP2_178B ,Color Palette 2_178 Blue" line.long 0x2CC "CP2_179R,Color Palette 2 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP2_179A ,Color Palette 2_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP2_179R ,Color Palette 2_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP2_179G ,Color Palette 2_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP2_179B ,Color Palette 2_179 Blue" line.long 0x2D0 "CP2_180R,Color Palette 2 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP2_180A ,Color Palette 2_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP2_180R ,Color Palette 2_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP2_180G ,Color Palette 2_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP2_180B ,Color Palette 2_180 Blue" line.long 0x2D4 "CP2_181R,Color Palette 2 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP2_181A ,Color Palette 2_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP2_181R ,Color Palette 2_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP2_181G ,Color Palette 2_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP2_181B ,Color Palette 2_181 Blue" line.long 0x2D8 "CP2_182R,Color Palette 2 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP2_182A ,Color Palette 2_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP2_182R ,Color Palette 2_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP2_182G ,Color Palette 2_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP2_182B ,Color Palette 2_182 Blue" line.long 0x2DC "CP2_183R,Color Palette 2 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP2_183A ,Color Palette 2_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP2_183R ,Color Palette 2_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP2_183G ,Color Palette 2_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP2_183B ,Color Palette 2_183 Blue" line.long 0x2E0 "CP2_184R,Color Palette 2 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP2_184A ,Color Palette 2_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP2_184R ,Color Palette 2_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP2_184G ,Color Palette 2_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP2_184B ,Color Palette 2_184 Blue" line.long 0x2E4 "CP2_185R,Color Palette 2 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP2_185A ,Color Palette 2_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP2_185R ,Color Palette 2_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP2_185G ,Color Palette 2_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP2_185B ,Color Palette 2_185 Blue" line.long 0x2E8 "CP2_186R,Color Palette 2 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP2_186A ,Color Palette 2_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP2_186R ,Color Palette 2_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP2_186G ,Color Palette 2_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP2_186B ,Color Palette 2_186 Blue" line.long 0x2EC "CP2_187R,Color Palette 2 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP2_187A ,Color Palette 2_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP2_187R ,Color Palette 2_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP2_187G ,Color Palette 2_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP2_187B ,Color Palette 2_187 Blue" line.long 0x2F0 "CP2_188R,Color Palette 2 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP2_188A ,Color Palette 2_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP2_188R ,Color Palette 2_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP2_188G ,Color Palette 2_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP2_188B ,Color Palette 2_188 Blue" line.long 0x2F4 "CP2_189R,Color Palette 2 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP2_189A ,Color Palette 2_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP2_189R ,Color Palette 2_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP2_189G ,Color Palette 2_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP2_189B ,Color Palette 2_189 Blue" line.long 0x2F8 "CP2_190R,Color Palette 2 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP2_190A ,Color Palette 2_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP2_190R ,Color Palette 2_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP2_190G ,Color Palette 2_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP2_190B ,Color Palette 2_190 Blue" line.long 0x2FC "CP2_191R,Color Palette 2 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP2_191A ,Color Palette 2_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP2_191R ,Color Palette 2_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP2_191G ,Color Palette 2_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP2_191B ,Color Palette 2_191 Blue" line.long 0x300 "CP2_192R,Color Palette 2 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP2_192A ,Color Palette 2_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP2_192R ,Color Palette 2_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP2_192G ,Color Palette 2_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP2_192B ,Color Palette 2_192 Blue" line.long 0x304 "CP2_193R,Color Palette 2 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP2_193A ,Color Palette 2_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP2_193R ,Color Palette 2_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP2_193G ,Color Palette 2_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP2_193B ,Color Palette 2_193 Blue" line.long 0x308 "CP2_194R,Color Palette 2 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP2_194A ,Color Palette 2_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP2_194R ,Color Palette 2_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP2_194G ,Color Palette 2_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP2_194B ,Color Palette 2_194 Blue" line.long 0x30C "CP2_195R,Color Palette 2 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP2_195A ,Color Palette 2_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP2_195R ,Color Palette 2_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP2_195G ,Color Palette 2_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP2_195B ,Color Palette 2_195 Blue" line.long 0x310 "CP2_196R,Color Palette 2 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP2_196A ,Color Palette 2_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP2_196R ,Color Palette 2_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP2_196G ,Color Palette 2_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP2_196B ,Color Palette 2_196 Blue" line.long 0x314 "CP2_197R,Color Palette 2 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP2_197A ,Color Palette 2_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP2_197R ,Color Palette 2_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP2_197G ,Color Palette 2_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP2_197B ,Color Palette 2_197 Blue" line.long 0x318 "CP2_198R,Color Palette 2 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP2_198A ,Color Palette 2_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP2_198R ,Color Palette 2_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP2_198G ,Color Palette 2_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP2_198B ,Color Palette 2_198 Blue" line.long 0x31C "CP2_199R,Color Palette 2 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP2_199A ,Color Palette 2_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP2_199R ,Color Palette 2_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP2_199G ,Color Palette 2_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP2_199B ,Color Palette 2_199 Blue" line.long 0x320 "CP2_200R,Color Palette 2 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP2_200A ,Color Palette 2_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP2_200R ,Color Palette 2_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP2_200G ,Color Palette 2_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP2_200B ,Color Palette 2_200 Blue" line.long 0x324 "CP2_201R,Color Palette 2 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP2_201A ,Color Palette 2_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP2_201R ,Color Palette 2_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP2_201G ,Color Palette 2_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP2_201B ,Color Palette 2_201 Blue" line.long 0x328 "CP2_202R,Color Palette 2 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP2_202A ,Color Palette 2_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP2_202R ,Color Palette 2_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP2_202G ,Color Palette 2_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP2_202B ,Color Palette 2_202 Blue" line.long 0x32C "CP2_203R,Color Palette 2 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP2_203A ,Color Palette 2_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP2_203R ,Color Palette 2_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP2_203G ,Color Palette 2_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP2_203B ,Color Palette 2_203 Blue" line.long 0x330 "CP2_204R,Color Palette 2 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP2_204A ,Color Palette 2_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP2_204R ,Color Palette 2_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP2_204G ,Color Palette 2_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP2_204B ,Color Palette 2_204 Blue" line.long 0x334 "CP2_205R,Color Palette 2 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP2_205A ,Color Palette 2_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP2_205R ,Color Palette 2_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP2_205G ,Color Palette 2_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP2_205B ,Color Palette 2_205 Blue" line.long 0x338 "CP2_206R,Color Palette 2 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP2_206A ,Color Palette 2_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP2_206R ,Color Palette 2_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP2_206G ,Color Palette 2_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP2_206B ,Color Palette 2_206 Blue" line.long 0x33C "CP2_207R,Color Palette 2 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP2_207A ,Color Palette 2_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP2_207R ,Color Palette 2_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP2_207G ,Color Palette 2_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP2_207B ,Color Palette 2_207 Blue" line.long 0x340 "CP2_208R,Color Palette 2 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP2_208A ,Color Palette 2_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP2_208R ,Color Palette 2_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP2_208G ,Color Palette 2_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP2_208B ,Color Palette 2_208 Blue" line.long 0x344 "CP2_209R,Color Palette 2 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP2_209A ,Color Palette 2_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP2_209R ,Color Palette 2_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP2_209G ,Color Palette 2_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP2_209B ,Color Palette 2_209 Blue" line.long 0x348 "CP2_210R,Color Palette 2 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP2_210A ,Color Palette 2_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP2_210R ,Color Palette 2_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP2_210G ,Color Palette 2_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP2_210B ,Color Palette 2_210 Blue" line.long 0x34C "CP2_211R,Color Palette 2 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP2_211A ,Color Palette 2_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP2_211R ,Color Palette 2_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP2_211G ,Color Palette 2_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP2_211B ,Color Palette 2_211 Blue" line.long 0x350 "CP2_212R,Color Palette 2 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP2_212A ,Color Palette 2_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP2_212R ,Color Palette 2_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP2_212G ,Color Palette 2_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP2_212B ,Color Palette 2_212 Blue" line.long 0x354 "CP2_213R,Color Palette 2 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP2_213A ,Color Palette 2_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP2_213R ,Color Palette 2_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP2_213G ,Color Palette 2_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP2_213B ,Color Palette 2_213 Blue" line.long 0x358 "CP2_214R,Color Palette 2 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP2_214A ,Color Palette 2_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP2_214R ,Color Palette 2_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP2_214G ,Color Palette 2_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP2_214B ,Color Palette 2_214 Blue" line.long 0x35C "CP2_215R,Color Palette 2 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP2_215A ,Color Palette 2_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP2_215R ,Color Palette 2_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP2_215G ,Color Palette 2_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP2_215B ,Color Palette 2_215 Blue" line.long 0x360 "CP2_216R,Color Palette 2 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP2_216A ,Color Palette 2_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP2_216R ,Color Palette 2_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP2_216G ,Color Palette 2_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP2_216B ,Color Palette 2_216 Blue" line.long 0x364 "CP2_217R,Color Palette 2 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP2_217A ,Color Palette 2_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP2_217R ,Color Palette 2_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP2_217G ,Color Palette 2_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP2_217B ,Color Palette 2_217 Blue" line.long 0x368 "CP2_218R,Color Palette 2 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP2_218A ,Color Palette 2_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP2_218R ,Color Palette 2_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP2_218G ,Color Palette 2_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP2_218B ,Color Palette 2_218 Blue" line.long 0x36C "CP2_219R,Color Palette 2 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP2_219A ,Color Palette 2_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP2_219R ,Color Palette 2_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP2_219G ,Color Palette 2_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP2_219B ,Color Palette 2_219 Blue" line.long 0x370 "CP2_220R,Color Palette 2 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP2_220A ,Color Palette 2_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP2_220R ,Color Palette 2_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP2_220G ,Color Palette 2_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP2_220B ,Color Palette 2_220 Blue" line.long 0x374 "CP2_221R,Color Palette 2 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP2_221A ,Color Palette 2_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP2_221R ,Color Palette 2_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP2_221G ,Color Palette 2_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP2_221B ,Color Palette 2_221 Blue" line.long 0x378 "CP2_222R,Color Palette 2 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP2_222A ,Color Palette 2_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP2_222R ,Color Palette 2_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP2_222G ,Color Palette 2_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP2_222B ,Color Palette 2_222 Blue" line.long 0x37C "CP2_223R,Color Palette 2 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP2_223A ,Color Palette 2_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP2_223R ,Color Palette 2_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP2_223G ,Color Palette 2_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP2_223B ,Color Palette 2_223 Blue" line.long 0x380 "CP2_224R,Color Palette 2 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP2_224A ,Color Palette 2_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP2_224R ,Color Palette 2_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP2_224G ,Color Palette 2_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP2_224B ,Color Palette 2_224 Blue" line.long 0x384 "CP2_225R,Color Palette 2 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP2_225A ,Color Palette 2_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP2_225R ,Color Palette 2_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP2_225G ,Color Palette 2_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP2_225B ,Color Palette 2_225 Blue" line.long 0x388 "CP2_226R,Color Palette 2 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP2_226A ,Color Palette 2_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP2_226R ,Color Palette 2_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP2_226G ,Color Palette 2_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP2_226B ,Color Palette 2_226 Blue" line.long 0x38C "CP2_227R,Color Palette 2 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP2_227A ,Color Palette 2_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP2_227R ,Color Palette 2_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP2_227G ,Color Palette 2_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP2_227B ,Color Palette 2_227 Blue" line.long 0x390 "CP2_228R,Color Palette 2 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP2_228A ,Color Palette 2_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP2_228R ,Color Palette 2_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP2_228G ,Color Palette 2_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP2_228B ,Color Palette 2_228 Blue" line.long 0x394 "CP2_229R,Color Palette 2 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP2_229A ,Color Palette 2_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP2_229R ,Color Palette 2_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP2_229G ,Color Palette 2_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP2_229B ,Color Palette 2_229 Blue" line.long 0x398 "CP2_230R,Color Palette 2 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP2_230A ,Color Palette 2_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP2_230R ,Color Palette 2_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP2_230G ,Color Palette 2_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP2_230B ,Color Palette 2_230 Blue" line.long 0x39C "CP2_231R,Color Palette 2 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP2_231A ,Color Palette 2_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP2_231R ,Color Palette 2_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP2_231G ,Color Palette 2_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP2_231B ,Color Palette 2_231 Blue" line.long 0x3A0 "CP2_232R,Color Palette 2 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP2_232A ,Color Palette 2_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP2_232R ,Color Palette 2_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP2_232G ,Color Palette 2_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP2_232B ,Color Palette 2_232 Blue" line.long 0x3A4 "CP2_233R,Color Palette 2 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP2_233A ,Color Palette 2_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP2_233R ,Color Palette 2_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP2_233G ,Color Palette 2_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP2_233B ,Color Palette 2_233 Blue" line.long 0x3A8 "CP2_234R,Color Palette 2 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP2_234A ,Color Palette 2_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP2_234R ,Color Palette 2_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP2_234G ,Color Palette 2_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP2_234B ,Color Palette 2_234 Blue" line.long 0x3AC "CP2_235R,Color Palette 2 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP2_235A ,Color Palette 2_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP2_235R ,Color Palette 2_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP2_235G ,Color Palette 2_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP2_235B ,Color Palette 2_235 Blue" line.long 0x3B0 "CP2_236R,Color Palette 2 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP2_236A ,Color Palette 2_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP2_236R ,Color Palette 2_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP2_236G ,Color Palette 2_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP2_236B ,Color Palette 2_236 Blue" line.long 0x3B4 "CP2_237R,Color Palette 2 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP2_237A ,Color Palette 2_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP2_237R ,Color Palette 2_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP2_237G ,Color Palette 2_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP2_237B ,Color Palette 2_237 Blue" line.long 0x3B8 "CP2_238R,Color Palette 2 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP2_238A ,Color Palette 2_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP2_238R ,Color Palette 2_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP2_238G ,Color Palette 2_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP2_238B ,Color Palette 2_238 Blue" line.long 0x3BC "CP2_239R,Color Palette 2 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP2_239A ,Color Palette 2_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP2_239R ,Color Palette 2_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP2_239G ,Color Palette 2_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP2_239B ,Color Palette 2_239 Blue" line.long 0x3C0 "CP2_240R,Color Palette 2 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP2_240A ,Color Palette 2_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP2_240R ,Color Palette 2_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP2_240G ,Color Palette 2_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP2_240B ,Color Palette 2_240 Blue" line.long 0x3C4 "CP2_241R,Color Palette 2 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP2_241A ,Color Palette 2_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP2_241R ,Color Palette 2_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP2_241G ,Color Palette 2_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP2_241B ,Color Palette 2_241 Blue" line.long 0x3C8 "CP2_242R,Color Palette 2 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP2_242A ,Color Palette 2_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP2_242R ,Color Palette 2_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP2_242G ,Color Palette 2_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP2_242B ,Color Palette 2_242 Blue" line.long 0x3CC "CP2_243R,Color Palette 2 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP2_243A ,Color Palette 2_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP2_243R ,Color Palette 2_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP2_243G ,Color Palette 2_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP2_243B ,Color Palette 2_243 Blue" line.long 0x3D0 "CP2_244R,Color Palette 2 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP2_244A ,Color Palette 2_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP2_244R ,Color Palette 2_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP2_244G ,Color Palette 2_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP2_244B ,Color Palette 2_244 Blue" line.long 0x3D4 "CP2_245R,Color Palette 2 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP2_245A ,Color Palette 2_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP2_245R ,Color Palette 2_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP2_245G ,Color Palette 2_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP2_245B ,Color Palette 2_245 Blue" line.long 0x3D8 "CP2_246R,Color Palette 2 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP2_246A ,Color Palette 2_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP2_246R ,Color Palette 2_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP2_246G ,Color Palette 2_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP2_246B ,Color Palette 2_246 Blue" line.long 0x3DC "CP2_247R,Color Palette 2 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP2_247A ,Color Palette 2_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP2_247R ,Color Palette 2_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP2_247G ,Color Palette 2_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP2_247B ,Color Palette 2_247 Blue" line.long 0x3E0 "CP2_248R,Color Palette 2 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP2_248A ,Color Palette 2_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP2_248R ,Color Palette 2_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP2_248G ,Color Palette 2_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP2_248B ,Color Palette 2_248 Blue" line.long 0x3E4 "CP2_249R,Color Palette 2 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP2_249A ,Color Palette 2_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP2_249R ,Color Palette 2_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP2_249G ,Color Palette 2_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP2_249B ,Color Palette 2_249 Blue" line.long 0x3E8 "CP2_250R,Color Palette 2 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP2_250A ,Color Palette 2_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP2_250R ,Color Palette 2_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP2_250G ,Color Palette 2_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP2_250B ,Color Palette 2_250 Blue" line.long 0x3EC "CP2_251R,Color Palette 2 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP2_251A ,Color Palette 2_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP2_251R ,Color Palette 2_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP2_251G ,Color Palette 2_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP2_251B ,Color Palette 2_251 Blue" line.long 0x3F0 "CP2_252R,Color Palette 2 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP2_252A ,Color Palette 2_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP2_252R ,Color Palette 2_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP2_252G ,Color Palette 2_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP2_252B ,Color Palette 2_252 Blue" line.long 0x3F4 "CP2_253R,Color Palette 2 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP2_253A ,Color Palette 2_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP2_253R ,Color Palette 2_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP2_253G ,Color Palette 2_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP2_253B ,Color Palette 2_253 Blue" line.long 0x3F8 "CP2_254R,Color Palette 2 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP2_254A ,Color Palette 2_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP2_254R ,Color Palette 2_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP2_254G ,Color Palette 2_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP2_254B ,Color Palette 2_254 Blue" line.long 0x3FC "CP2_255R,Color Palette 2 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP2_255A ,Color Palette 2_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP2_255R ,Color Palette 2_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP2_255G ,Color Palette 2_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP2_255B ,Color Palette 2_255 Blue" tree.end tree "Color Palette 3 Registers" width 10. group.long 0x3000++0x3ff line.long 0x0 "CP3_0R,Color Palette 3 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP3_0A ,Color Palette 3_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP3_0R ,Color Palette 3_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP3_0G ,Color Palette 3_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP3_0B ,Color Palette 3_0 Blue" line.long 0x4 "CP3_1R,Color Palette 3 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP3_1A ,Color Palette 3_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP3_1R ,Color Palette 3_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP3_1G ,Color Palette 3_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP3_1B ,Color Palette 3_1 Blue" line.long 0x8 "CP3_2R,Color Palette 3 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP3_2A ,Color Palette 3_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP3_2R ,Color Palette 3_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP3_2G ,Color Palette 3_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP3_2B ,Color Palette 3_2 Blue" line.long 0xC "CP3_3R,Color Palette 3 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP3_3A ,Color Palette 3_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP3_3R ,Color Palette 3_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP3_3G ,Color Palette 3_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP3_3B ,Color Palette 3_3 Blue" line.long 0x10 "CP3_4R,Color Palette 3 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP3_4A ,Color Palette 3_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP3_4R ,Color Palette 3_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP3_4G ,Color Palette 3_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP3_4B ,Color Palette 3_4 Blue" line.long 0x14 "CP3_5R,Color Palette 3 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP3_5A ,Color Palette 3_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP3_5R ,Color Palette 3_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP3_5G ,Color Palette 3_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP3_5B ,Color Palette 3_5 Blue" line.long 0x18 "CP3_6R,Color Palette 3 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP3_6A ,Color Palette 3_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP3_6R ,Color Palette 3_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP3_6G ,Color Palette 3_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP3_6B ,Color Palette 3_6 Blue" line.long 0x1C "CP3_7R,Color Palette 3 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP3_7A ,Color Palette 3_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP3_7R ,Color Palette 3_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP3_7G ,Color Palette 3_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP3_7B ,Color Palette 3_7 Blue" line.long 0x20 "CP3_8R,Color Palette 3 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP3_8A ,Color Palette 3_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP3_8R ,Color Palette 3_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP3_8G ,Color Palette 3_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP3_8B ,Color Palette 3_8 Blue" line.long 0x24 "CP3_9R,Color Palette 3 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP3_9A ,Color Palette 3_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP3_9R ,Color Palette 3_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP3_9G ,Color Palette 3_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP3_9B ,Color Palette 3_9 Blue" line.long 0x28 "CP3_10R,Color Palette 3 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP3_10A ,Color Palette 3_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP3_10R ,Color Palette 3_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP3_10G ,Color Palette 3_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP3_10B ,Color Palette 3_10 Blue" line.long 0x2C "CP3_11R,Color Palette 3 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP3_11A ,Color Palette 3_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP3_11R ,Color Palette 3_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP3_11G ,Color Palette 3_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP3_11B ,Color Palette 3_11 Blue" line.long 0x30 "CP3_12R,Color Palette 3 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP3_12A ,Color Palette 3_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP3_12R ,Color Palette 3_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP3_12G ,Color Palette 3_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP3_12B ,Color Palette 3_12 Blue" line.long 0x34 "CP3_13R,Color Palette 3 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP3_13A ,Color Palette 3_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP3_13R ,Color Palette 3_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP3_13G ,Color Palette 3_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP3_13B ,Color Palette 3_13 Blue" line.long 0x38 "CP3_14R,Color Palette 3 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP3_14A ,Color Palette 3_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP3_14R ,Color Palette 3_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP3_14G ,Color Palette 3_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP3_14B ,Color Palette 3_14 Blue" line.long 0x3C "CP3_15R,Color Palette 3 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP3_15A ,Color Palette 3_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP3_15R ,Color Palette 3_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP3_15G ,Color Palette 3_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP3_15B ,Color Palette 3_15 Blue" line.long 0x40 "CP3_16R,Color Palette 3 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP3_16A ,Color Palette 3_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP3_16R ,Color Palette 3_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP3_16G ,Color Palette 3_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP3_16B ,Color Palette 3_16 Blue" line.long 0x44 "CP3_17R,Color Palette 3 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP3_17A ,Color Palette 3_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP3_17R ,Color Palette 3_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP3_17G ,Color Palette 3_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP3_17B ,Color Palette 3_17 Blue" line.long 0x48 "CP3_18R,Color Palette 3 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP3_18A ,Color Palette 3_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP3_18R ,Color Palette 3_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP3_18G ,Color Palette 3_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP3_18B ,Color Palette 3_18 Blue" line.long 0x4C "CP3_19R,Color Palette 3 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP3_19A ,Color Palette 3_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP3_19R ,Color Palette 3_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP3_19G ,Color Palette 3_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP3_19B ,Color Palette 3_19 Blue" line.long 0x50 "CP3_20R,Color Palette 3 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP3_20A ,Color Palette 3_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP3_20R ,Color Palette 3_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP3_20G ,Color Palette 3_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP3_20B ,Color Palette 3_20 Blue" line.long 0x54 "CP3_21R,Color Palette 3 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP3_21A ,Color Palette 3_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP3_21R ,Color Palette 3_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP3_21G ,Color Palette 3_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP3_21B ,Color Palette 3_21 Blue" line.long 0x58 "CP3_22R,Color Palette 3 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP3_22A ,Color Palette 3_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP3_22R ,Color Palette 3_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP3_22G ,Color Palette 3_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP3_22B ,Color Palette 3_22 Blue" line.long 0x5C "CP3_23R,Color Palette 3 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP3_23A ,Color Palette 3_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP3_23R ,Color Palette 3_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP3_23G ,Color Palette 3_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP3_23B ,Color Palette 3_23 Blue" line.long 0x60 "CP3_24R,Color Palette 3 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP3_24A ,Color Palette 3_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP3_24R ,Color Palette 3_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP3_24G ,Color Palette 3_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP3_24B ,Color Palette 3_24 Blue" line.long 0x64 "CP3_25R,Color Palette 3 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP3_25A ,Color Palette 3_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP3_25R ,Color Palette 3_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP3_25G ,Color Palette 3_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP3_25B ,Color Palette 3_25 Blue" line.long 0x68 "CP3_26R,Color Palette 3 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP3_26A ,Color Palette 3_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP3_26R ,Color Palette 3_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP3_26G ,Color Palette 3_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP3_26B ,Color Palette 3_26 Blue" line.long 0x6C "CP3_27R,Color Palette 3 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP3_27A ,Color Palette 3_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP3_27R ,Color Palette 3_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP3_27G ,Color Palette 3_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP3_27B ,Color Palette 3_27 Blue" line.long 0x70 "CP3_28R,Color Palette 3 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP3_28A ,Color Palette 3_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP3_28R ,Color Palette 3_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP3_28G ,Color Palette 3_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP3_28B ,Color Palette 3_28 Blue" line.long 0x74 "CP3_29R,Color Palette 3 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP3_29A ,Color Palette 3_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP3_29R ,Color Palette 3_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP3_29G ,Color Palette 3_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP3_29B ,Color Palette 3_29 Blue" line.long 0x78 "CP3_30R,Color Palette 3 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP3_30A ,Color Palette 3_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP3_30R ,Color Palette 3_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP3_30G ,Color Palette 3_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP3_30B ,Color Palette 3_30 Blue" line.long 0x7C "CP3_31R,Color Palette 3 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP3_31A ,Color Palette 3_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP3_31R ,Color Palette 3_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP3_31G ,Color Palette 3_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP3_31B ,Color Palette 3_31 Blue" line.long 0x80 "CP3_32R,Color Palette 3 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP3_32A ,Color Palette 3_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP3_32R ,Color Palette 3_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP3_32G ,Color Palette 3_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP3_32B ,Color Palette 3_32 Blue" line.long 0x84 "CP3_33R,Color Palette 3 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP3_33A ,Color Palette 3_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP3_33R ,Color Palette 3_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP3_33G ,Color Palette 3_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP3_33B ,Color Palette 3_33 Blue" line.long 0x88 "CP3_34R,Color Palette 3 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP3_34A ,Color Palette 3_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP3_34R ,Color Palette 3_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP3_34G ,Color Palette 3_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP3_34B ,Color Palette 3_34 Blue" line.long 0x8C "CP3_35R,Color Palette 3 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP3_35A ,Color Palette 3_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP3_35R ,Color Palette 3_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP3_35G ,Color Palette 3_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP3_35B ,Color Palette 3_35 Blue" line.long 0x90 "CP3_36R,Color Palette 3 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP3_36A ,Color Palette 3_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP3_36R ,Color Palette 3_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP3_36G ,Color Palette 3_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP3_36B ,Color Palette 3_36 Blue" line.long 0x94 "CP3_37R,Color Palette 3 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP3_37A ,Color Palette 3_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP3_37R ,Color Palette 3_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP3_37G ,Color Palette 3_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP3_37B ,Color Palette 3_37 Blue" line.long 0x98 "CP3_38R,Color Palette 3 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP3_38A ,Color Palette 3_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP3_38R ,Color Palette 3_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP3_38G ,Color Palette 3_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP3_38B ,Color Palette 3_38 Blue" line.long 0x9C "CP3_39R,Color Palette 3 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP3_39A ,Color Palette 3_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP3_39R ,Color Palette 3_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP3_39G ,Color Palette 3_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP3_39B ,Color Palette 3_39 Blue" line.long 0xA0 "CP3_40R,Color Palette 3 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP3_40A ,Color Palette 3_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP3_40R ,Color Palette 3_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP3_40G ,Color Palette 3_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP3_40B ,Color Palette 3_40 Blue" line.long 0xA4 "CP3_41R,Color Palette 3 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP3_41A ,Color Palette 3_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP3_41R ,Color Palette 3_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP3_41G ,Color Palette 3_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP3_41B ,Color Palette 3_41 Blue" line.long 0xA8 "CP3_42R,Color Palette 3 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP3_42A ,Color Palette 3_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP3_42R ,Color Palette 3_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP3_42G ,Color Palette 3_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP3_42B ,Color Palette 3_42 Blue" line.long 0xAC "CP3_43R,Color Palette 3 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP3_43A ,Color Palette 3_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP3_43R ,Color Palette 3_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP3_43G ,Color Palette 3_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP3_43B ,Color Palette 3_43 Blue" line.long 0xB0 "CP3_44R,Color Palette 3 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP3_44A ,Color Palette 3_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP3_44R ,Color Palette 3_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP3_44G ,Color Palette 3_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP3_44B ,Color Palette 3_44 Blue" line.long 0xB4 "CP3_45R,Color Palette 3 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP3_45A ,Color Palette 3_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP3_45R ,Color Palette 3_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP3_45G ,Color Palette 3_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP3_45B ,Color Palette 3_45 Blue" line.long 0xB8 "CP3_46R,Color Palette 3 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP3_46A ,Color Palette 3_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP3_46R ,Color Palette 3_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP3_46G ,Color Palette 3_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP3_46B ,Color Palette 3_46 Blue" line.long 0xBC "CP3_47R,Color Palette 3 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP3_47A ,Color Palette 3_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP3_47R ,Color Palette 3_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP3_47G ,Color Palette 3_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP3_47B ,Color Palette 3_47 Blue" line.long 0xC0 "CP3_48R,Color Palette 3 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP3_48A ,Color Palette 3_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP3_48R ,Color Palette 3_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP3_48G ,Color Palette 3_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP3_48B ,Color Palette 3_48 Blue" line.long 0xC4 "CP3_49R,Color Palette 3 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP3_49A ,Color Palette 3_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP3_49R ,Color Palette 3_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP3_49G ,Color Palette 3_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP3_49B ,Color Palette 3_49 Blue" line.long 0xC8 "CP3_50R,Color Palette 3 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP3_50A ,Color Palette 3_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP3_50R ,Color Palette 3_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP3_50G ,Color Palette 3_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP3_50B ,Color Palette 3_50 Blue" line.long 0xCC "CP3_51R,Color Palette 3 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP3_51A ,Color Palette 3_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP3_51R ,Color Palette 3_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP3_51G ,Color Palette 3_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP3_51B ,Color Palette 3_51 Blue" line.long 0xD0 "CP3_52R,Color Palette 3 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP3_52A ,Color Palette 3_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP3_52R ,Color Palette 3_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP3_52G ,Color Palette 3_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP3_52B ,Color Palette 3_52 Blue" line.long 0xD4 "CP3_53R,Color Palette 3 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP3_53A ,Color Palette 3_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP3_53R ,Color Palette 3_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP3_53G ,Color Palette 3_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP3_53B ,Color Palette 3_53 Blue" line.long 0xD8 "CP3_54R,Color Palette 3 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP3_54A ,Color Palette 3_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP3_54R ,Color Palette 3_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP3_54G ,Color Palette 3_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP3_54B ,Color Palette 3_54 Blue" line.long 0xDC "CP3_55R,Color Palette 3 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP3_55A ,Color Palette 3_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP3_55R ,Color Palette 3_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP3_55G ,Color Palette 3_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP3_55B ,Color Palette 3_55 Blue" line.long 0xE0 "CP3_56R,Color Palette 3 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP3_56A ,Color Palette 3_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP3_56R ,Color Palette 3_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP3_56G ,Color Palette 3_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP3_56B ,Color Palette 3_56 Blue" line.long 0xE4 "CP3_57R,Color Palette 3 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP3_57A ,Color Palette 3_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP3_57R ,Color Palette 3_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP3_57G ,Color Palette 3_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP3_57B ,Color Palette 3_57 Blue" line.long 0xE8 "CP3_58R,Color Palette 3 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP3_58A ,Color Palette 3_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP3_58R ,Color Palette 3_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP3_58G ,Color Palette 3_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP3_58B ,Color Palette 3_58 Blue" line.long 0xEC "CP3_59R,Color Palette 3 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP3_59A ,Color Palette 3_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP3_59R ,Color Palette 3_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP3_59G ,Color Palette 3_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP3_59B ,Color Palette 3_59 Blue" line.long 0xF0 "CP3_60R,Color Palette 3 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP3_60A ,Color Palette 3_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP3_60R ,Color Palette 3_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP3_60G ,Color Palette 3_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP3_60B ,Color Palette 3_60 Blue" line.long 0xF4 "CP3_61R,Color Palette 3 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP3_61A ,Color Palette 3_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP3_61R ,Color Palette 3_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP3_61G ,Color Palette 3_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP3_61B ,Color Palette 3_61 Blue" line.long 0xF8 "CP3_62R,Color Palette 3 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP3_62A ,Color Palette 3_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP3_62R ,Color Palette 3_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP3_62G ,Color Palette 3_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP3_62B ,Color Palette 3_62 Blue" line.long 0xFC "CP3_63R,Color Palette 3 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP3_63A ,Color Palette 3_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP3_63R ,Color Palette 3_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP3_63G ,Color Palette 3_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP3_63B ,Color Palette 3_63 Blue" line.long 0x100 "CP3_64R,Color Palette 3 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP3_64A ,Color Palette 3_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP3_64R ,Color Palette 3_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP3_64G ,Color Palette 3_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP3_64B ,Color Palette 3_64 Blue" line.long 0x104 "CP3_65R,Color Palette 3 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP3_65A ,Color Palette 3_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP3_65R ,Color Palette 3_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP3_65G ,Color Palette 3_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP3_65B ,Color Palette 3_65 Blue" line.long 0x108 "CP3_66R,Color Palette 3 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP3_66A ,Color Palette 3_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP3_66R ,Color Palette 3_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP3_66G ,Color Palette 3_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP3_66B ,Color Palette 3_66 Blue" line.long 0x10C "CP3_67R,Color Palette 3 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP3_67A ,Color Palette 3_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP3_67R ,Color Palette 3_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP3_67G ,Color Palette 3_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP3_67B ,Color Palette 3_67 Blue" line.long 0x110 "CP3_68R,Color Palette 3 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP3_68A ,Color Palette 3_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP3_68R ,Color Palette 3_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP3_68G ,Color Palette 3_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP3_68B ,Color Palette 3_68 Blue" line.long 0x114 "CP3_69R,Color Palette 3 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP3_69A ,Color Palette 3_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP3_69R ,Color Palette 3_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP3_69G ,Color Palette 3_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP3_69B ,Color Palette 3_69 Blue" line.long 0x118 "CP3_70R,Color Palette 3 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP3_70A ,Color Palette 3_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP3_70R ,Color Palette 3_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP3_70G ,Color Palette 3_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP3_70B ,Color Palette 3_70 Blue" line.long 0x11C "CP3_71R,Color Palette 3 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP3_71A ,Color Palette 3_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP3_71R ,Color Palette 3_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP3_71G ,Color Palette 3_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP3_71B ,Color Palette 3_71 Blue" line.long 0x120 "CP3_72R,Color Palette 3 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP3_72A ,Color Palette 3_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP3_72R ,Color Palette 3_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP3_72G ,Color Palette 3_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP3_72B ,Color Palette 3_72 Blue" line.long 0x124 "CP3_73R,Color Palette 3 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP3_73A ,Color Palette 3_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP3_73R ,Color Palette 3_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP3_73G ,Color Palette 3_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP3_73B ,Color Palette 3_73 Blue" line.long 0x128 "CP3_74R,Color Palette 3 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP3_74A ,Color Palette 3_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP3_74R ,Color Palette 3_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP3_74G ,Color Palette 3_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP3_74B ,Color Palette 3_74 Blue" line.long 0x12C "CP3_75R,Color Palette 3 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP3_75A ,Color Palette 3_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP3_75R ,Color Palette 3_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP3_75G ,Color Palette 3_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP3_75B ,Color Palette 3_75 Blue" line.long 0x130 "CP3_76R,Color Palette 3 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP3_76A ,Color Palette 3_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP3_76R ,Color Palette 3_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP3_76G ,Color Palette 3_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP3_76B ,Color Palette 3_76 Blue" line.long 0x134 "CP3_77R,Color Palette 3 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP3_77A ,Color Palette 3_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP3_77R ,Color Palette 3_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP3_77G ,Color Palette 3_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP3_77B ,Color Palette 3_77 Blue" line.long 0x138 "CP3_78R,Color Palette 3 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP3_78A ,Color Palette 3_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP3_78R ,Color Palette 3_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP3_78G ,Color Palette 3_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP3_78B ,Color Palette 3_78 Blue" line.long 0x13C "CP3_79R,Color Palette 3 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP3_79A ,Color Palette 3_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP3_79R ,Color Palette 3_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP3_79G ,Color Palette 3_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP3_79B ,Color Palette 3_79 Blue" line.long 0x140 "CP3_80R,Color Palette 3 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP3_80A ,Color Palette 3_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP3_80R ,Color Palette 3_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP3_80G ,Color Palette 3_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP3_80B ,Color Palette 3_80 Blue" line.long 0x144 "CP3_81R,Color Palette 3 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP3_81A ,Color Palette 3_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP3_81R ,Color Palette 3_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP3_81G ,Color Palette 3_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP3_81B ,Color Palette 3_81 Blue" line.long 0x148 "CP3_82R,Color Palette 3 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP3_82A ,Color Palette 3_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP3_82R ,Color Palette 3_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP3_82G ,Color Palette 3_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP3_82B ,Color Palette 3_82 Blue" line.long 0x14C "CP3_83R,Color Palette 3 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP3_83A ,Color Palette 3_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP3_83R ,Color Palette 3_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP3_83G ,Color Palette 3_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP3_83B ,Color Palette 3_83 Blue" line.long 0x150 "CP3_84R,Color Palette 3 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP3_84A ,Color Palette 3_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP3_84R ,Color Palette 3_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP3_84G ,Color Palette 3_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP3_84B ,Color Palette 3_84 Blue" line.long 0x154 "CP3_85R,Color Palette 3 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP3_85A ,Color Palette 3_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP3_85R ,Color Palette 3_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP3_85G ,Color Palette 3_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP3_85B ,Color Palette 3_85 Blue" line.long 0x158 "CP3_86R,Color Palette 3 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP3_86A ,Color Palette 3_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP3_86R ,Color Palette 3_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP3_86G ,Color Palette 3_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP3_86B ,Color Palette 3_86 Blue" line.long 0x15C "CP3_87R,Color Palette 3 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP3_87A ,Color Palette 3_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP3_87R ,Color Palette 3_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP3_87G ,Color Palette 3_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP3_87B ,Color Palette 3_87 Blue" line.long 0x160 "CP3_88R,Color Palette 3 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP3_88A ,Color Palette 3_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP3_88R ,Color Palette 3_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP3_88G ,Color Palette 3_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP3_88B ,Color Palette 3_88 Blue" line.long 0x164 "CP3_89R,Color Palette 3 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP3_89A ,Color Palette 3_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP3_89R ,Color Palette 3_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP3_89G ,Color Palette 3_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP3_89B ,Color Palette 3_89 Blue" line.long 0x168 "CP3_90R,Color Palette 3 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP3_90A ,Color Palette 3_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP3_90R ,Color Palette 3_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP3_90G ,Color Palette 3_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP3_90B ,Color Palette 3_90 Blue" line.long 0x16C "CP3_91R,Color Palette 3 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP3_91A ,Color Palette 3_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP3_91R ,Color Palette 3_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP3_91G ,Color Palette 3_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP3_91B ,Color Palette 3_91 Blue" line.long 0x170 "CP3_92R,Color Palette 3 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP3_92A ,Color Palette 3_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP3_92R ,Color Palette 3_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP3_92G ,Color Palette 3_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP3_92B ,Color Palette 3_92 Blue" line.long 0x174 "CP3_93R,Color Palette 3 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP3_93A ,Color Palette 3_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP3_93R ,Color Palette 3_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP3_93G ,Color Palette 3_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP3_93B ,Color Palette 3_93 Blue" line.long 0x178 "CP3_94R,Color Palette 3 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP3_94A ,Color Palette 3_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP3_94R ,Color Palette 3_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP3_94G ,Color Palette 3_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP3_94B ,Color Palette 3_94 Blue" line.long 0x17C "CP3_95R,Color Palette 3 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP3_95A ,Color Palette 3_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP3_95R ,Color Palette 3_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP3_95G ,Color Palette 3_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP3_95B ,Color Palette 3_95 Blue" line.long 0x180 "CP3_96R,Color Palette 3 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP3_96A ,Color Palette 3_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP3_96R ,Color Palette 3_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP3_96G ,Color Palette 3_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP3_96B ,Color Palette 3_96 Blue" line.long 0x184 "CP3_97R,Color Palette 3 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP3_97A ,Color Palette 3_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP3_97R ,Color Palette 3_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP3_97G ,Color Palette 3_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP3_97B ,Color Palette 3_97 Blue" line.long 0x188 "CP3_98R,Color Palette 3 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP3_98A ,Color Palette 3_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP3_98R ,Color Palette 3_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP3_98G ,Color Palette 3_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP3_98B ,Color Palette 3_98 Blue" line.long 0x18C "CP3_99R,Color Palette 3 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP3_99A ,Color Palette 3_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP3_99R ,Color Palette 3_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP3_99G ,Color Palette 3_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP3_99B ,Color Palette 3_99 Blue" line.long 0x190 "CP3_100R,Color Palette 3 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP3_100A ,Color Palette 3_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP3_100R ,Color Palette 3_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP3_100G ,Color Palette 3_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP3_100B ,Color Palette 3_100 Blue" line.long 0x194 "CP3_101R,Color Palette 3 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP3_101A ,Color Palette 3_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP3_101R ,Color Palette 3_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP3_101G ,Color Palette 3_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP3_101B ,Color Palette 3_101 Blue" line.long 0x198 "CP3_102R,Color Palette 3 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP3_102A ,Color Palette 3_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP3_102R ,Color Palette 3_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP3_102G ,Color Palette 3_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP3_102B ,Color Palette 3_102 Blue" line.long 0x19C "CP3_103R,Color Palette 3 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP3_103A ,Color Palette 3_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP3_103R ,Color Palette 3_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP3_103G ,Color Palette 3_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP3_103B ,Color Palette 3_103 Blue" line.long 0x1A0 "CP3_104R,Color Palette 3 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP3_104A ,Color Palette 3_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP3_104R ,Color Palette 3_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP3_104G ,Color Palette 3_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP3_104B ,Color Palette 3_104 Blue" line.long 0x1A4 "CP3_105R,Color Palette 3 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP3_105A ,Color Palette 3_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP3_105R ,Color Palette 3_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP3_105G ,Color Palette 3_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP3_105B ,Color Palette 3_105 Blue" line.long 0x1A8 "CP3_106R,Color Palette 3 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP3_106A ,Color Palette 3_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP3_106R ,Color Palette 3_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP3_106G ,Color Palette 3_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP3_106B ,Color Palette 3_106 Blue" line.long 0x1AC "CP3_107R,Color Palette 3 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP3_107A ,Color Palette 3_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP3_107R ,Color Palette 3_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP3_107G ,Color Palette 3_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP3_107B ,Color Palette 3_107 Blue" line.long 0x1B0 "CP3_108R,Color Palette 3 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP3_108A ,Color Palette 3_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP3_108R ,Color Palette 3_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP3_108G ,Color Palette 3_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP3_108B ,Color Palette 3_108 Blue" line.long 0x1B4 "CP3_109R,Color Palette 3 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP3_109A ,Color Palette 3_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP3_109R ,Color Palette 3_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP3_109G ,Color Palette 3_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP3_109B ,Color Palette 3_109 Blue" line.long 0x1B8 "CP3_110R,Color Palette 3 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP3_110A ,Color Palette 3_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP3_110R ,Color Palette 3_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP3_110G ,Color Palette 3_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP3_110B ,Color Palette 3_110 Blue" line.long 0x1BC "CP3_111R,Color Palette 3 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP3_111A ,Color Palette 3_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP3_111R ,Color Palette 3_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP3_111G ,Color Palette 3_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP3_111B ,Color Palette 3_111 Blue" line.long 0x1C0 "CP3_112R,Color Palette 3 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP3_112A ,Color Palette 3_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP3_112R ,Color Palette 3_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP3_112G ,Color Palette 3_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP3_112B ,Color Palette 3_112 Blue" line.long 0x1C4 "CP3_113R,Color Palette 3 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP3_113A ,Color Palette 3_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP3_113R ,Color Palette 3_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP3_113G ,Color Palette 3_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP3_113B ,Color Palette 3_113 Blue" line.long 0x1C8 "CP3_114R,Color Palette 3 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP3_114A ,Color Palette 3_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP3_114R ,Color Palette 3_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP3_114G ,Color Palette 3_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP3_114B ,Color Palette 3_114 Blue" line.long 0x1CC "CP3_115R,Color Palette 3 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP3_115A ,Color Palette 3_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP3_115R ,Color Palette 3_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP3_115G ,Color Palette 3_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP3_115B ,Color Palette 3_115 Blue" line.long 0x1D0 "CP3_116R,Color Palette 3 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP3_116A ,Color Palette 3_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP3_116R ,Color Palette 3_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP3_116G ,Color Palette 3_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP3_116B ,Color Palette 3_116 Blue" line.long 0x1D4 "CP3_117R,Color Palette 3 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP3_117A ,Color Palette 3_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP3_117R ,Color Palette 3_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP3_117G ,Color Palette 3_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP3_117B ,Color Palette 3_117 Blue" line.long 0x1D8 "CP3_118R,Color Palette 3 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP3_118A ,Color Palette 3_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP3_118R ,Color Palette 3_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP3_118G ,Color Palette 3_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP3_118B ,Color Palette 3_118 Blue" line.long 0x1DC "CP3_119R,Color Palette 3 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP3_119A ,Color Palette 3_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP3_119R ,Color Palette 3_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP3_119G ,Color Palette 3_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP3_119B ,Color Palette 3_119 Blue" line.long 0x1E0 "CP3_120R,Color Palette 3 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP3_120A ,Color Palette 3_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP3_120R ,Color Palette 3_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP3_120G ,Color Palette 3_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP3_120B ,Color Palette 3_120 Blue" line.long 0x1E4 "CP3_121R,Color Palette 3 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP3_121A ,Color Palette 3_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP3_121R ,Color Palette 3_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP3_121G ,Color Palette 3_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP3_121B ,Color Palette 3_121 Blue" line.long 0x1E8 "CP3_122R,Color Palette 3 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP3_122A ,Color Palette 3_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP3_122R ,Color Palette 3_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP3_122G ,Color Palette 3_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP3_122B ,Color Palette 3_122 Blue" line.long 0x1EC "CP3_123R,Color Palette 3 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP3_123A ,Color Palette 3_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP3_123R ,Color Palette 3_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP3_123G ,Color Palette 3_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP3_123B ,Color Palette 3_123 Blue" line.long 0x1F0 "CP3_124R,Color Palette 3 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP3_124A ,Color Palette 3_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP3_124R ,Color Palette 3_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP3_124G ,Color Palette 3_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP3_124B ,Color Palette 3_124 Blue" line.long 0x1F4 "CP3_125R,Color Palette 3 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP3_125A ,Color Palette 3_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP3_125R ,Color Palette 3_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP3_125G ,Color Palette 3_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP3_125B ,Color Palette 3_125 Blue" line.long 0x1F8 "CP3_126R,Color Palette 3 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP3_126A ,Color Palette 3_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP3_126R ,Color Palette 3_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP3_126G ,Color Palette 3_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP3_126B ,Color Palette 3_126 Blue" line.long 0x1FC "CP3_127R,Color Palette 3 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP3_127A ,Color Palette 3_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP3_127R ,Color Palette 3_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP3_127G ,Color Palette 3_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP3_127B ,Color Palette 3_127 Blue" line.long 0x200 "CP3_128R,Color Palette 3 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP3_128A ,Color Palette 3_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP3_128R ,Color Palette 3_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP3_128G ,Color Palette 3_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP3_128B ,Color Palette 3_128 Blue" line.long 0x204 "CP3_129R,Color Palette 3 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP3_129A ,Color Palette 3_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP3_129R ,Color Palette 3_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP3_129G ,Color Palette 3_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP3_129B ,Color Palette 3_129 Blue" line.long 0x208 "CP3_130R,Color Palette 3 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP3_130A ,Color Palette 3_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP3_130R ,Color Palette 3_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP3_130G ,Color Palette 3_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP3_130B ,Color Palette 3_130 Blue" line.long 0x20C "CP3_131R,Color Palette 3 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP3_131A ,Color Palette 3_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP3_131R ,Color Palette 3_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP3_131G ,Color Palette 3_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP3_131B ,Color Palette 3_131 Blue" line.long 0x210 "CP3_132R,Color Palette 3 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP3_132A ,Color Palette 3_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP3_132R ,Color Palette 3_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP3_132G ,Color Palette 3_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP3_132B ,Color Palette 3_132 Blue" line.long 0x214 "CP3_133R,Color Palette 3 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP3_133A ,Color Palette 3_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP3_133R ,Color Palette 3_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP3_133G ,Color Palette 3_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP3_133B ,Color Palette 3_133 Blue" line.long 0x218 "CP3_134R,Color Palette 3 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP3_134A ,Color Palette 3_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP3_134R ,Color Palette 3_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP3_134G ,Color Palette 3_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP3_134B ,Color Palette 3_134 Blue" line.long 0x21C "CP3_135R,Color Palette 3 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP3_135A ,Color Palette 3_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP3_135R ,Color Palette 3_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP3_135G ,Color Palette 3_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP3_135B ,Color Palette 3_135 Blue" line.long 0x220 "CP3_136R,Color Palette 3 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP3_136A ,Color Palette 3_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP3_136R ,Color Palette 3_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP3_136G ,Color Palette 3_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP3_136B ,Color Palette 3_136 Blue" line.long 0x224 "CP3_137R,Color Palette 3 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP3_137A ,Color Palette 3_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP3_137R ,Color Palette 3_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP3_137G ,Color Palette 3_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP3_137B ,Color Palette 3_137 Blue" line.long 0x228 "CP3_138R,Color Palette 3 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP3_138A ,Color Palette 3_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP3_138R ,Color Palette 3_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP3_138G ,Color Palette 3_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP3_138B ,Color Palette 3_138 Blue" line.long 0x22C "CP3_139R,Color Palette 3 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP3_139A ,Color Palette 3_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP3_139R ,Color Palette 3_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP3_139G ,Color Palette 3_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP3_139B ,Color Palette 3_139 Blue" line.long 0x230 "CP3_140R,Color Palette 3 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP3_140A ,Color Palette 3_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP3_140R ,Color Palette 3_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP3_140G ,Color Palette 3_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP3_140B ,Color Palette 3_140 Blue" line.long 0x234 "CP3_141R,Color Palette 3 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP3_141A ,Color Palette 3_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP3_141R ,Color Palette 3_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP3_141G ,Color Palette 3_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP3_141B ,Color Palette 3_141 Blue" line.long 0x238 "CP3_142R,Color Palette 3 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP3_142A ,Color Palette 3_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP3_142R ,Color Palette 3_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP3_142G ,Color Palette 3_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP3_142B ,Color Palette 3_142 Blue" line.long 0x23C "CP3_143R,Color Palette 3 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP3_143A ,Color Palette 3_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP3_143R ,Color Palette 3_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP3_143G ,Color Palette 3_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP3_143B ,Color Palette 3_143 Blue" line.long 0x240 "CP3_144R,Color Palette 3 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP3_144A ,Color Palette 3_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP3_144R ,Color Palette 3_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP3_144G ,Color Palette 3_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP3_144B ,Color Palette 3_144 Blue" line.long 0x244 "CP3_145R,Color Palette 3 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP3_145A ,Color Palette 3_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP3_145R ,Color Palette 3_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP3_145G ,Color Palette 3_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP3_145B ,Color Palette 3_145 Blue" line.long 0x248 "CP3_146R,Color Palette 3 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP3_146A ,Color Palette 3_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP3_146R ,Color Palette 3_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP3_146G ,Color Palette 3_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP3_146B ,Color Palette 3_146 Blue" line.long 0x24C "CP3_147R,Color Palette 3 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP3_147A ,Color Palette 3_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP3_147R ,Color Palette 3_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP3_147G ,Color Palette 3_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP3_147B ,Color Palette 3_147 Blue" line.long 0x250 "CP3_148R,Color Palette 3 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP3_148A ,Color Palette 3_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP3_148R ,Color Palette 3_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP3_148G ,Color Palette 3_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP3_148B ,Color Palette 3_148 Blue" line.long 0x254 "CP3_149R,Color Palette 3 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP3_149A ,Color Palette 3_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP3_149R ,Color Palette 3_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP3_149G ,Color Palette 3_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP3_149B ,Color Palette 3_149 Blue" line.long 0x258 "CP3_150R,Color Palette 3 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP3_150A ,Color Palette 3_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP3_150R ,Color Palette 3_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP3_150G ,Color Palette 3_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP3_150B ,Color Palette 3_150 Blue" line.long 0x25C "CP3_151R,Color Palette 3 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP3_151A ,Color Palette 3_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP3_151R ,Color Palette 3_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP3_151G ,Color Palette 3_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP3_151B ,Color Palette 3_151 Blue" line.long 0x260 "CP3_152R,Color Palette 3 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP3_152A ,Color Palette 3_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP3_152R ,Color Palette 3_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP3_152G ,Color Palette 3_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP3_152B ,Color Palette 3_152 Blue" line.long 0x264 "CP3_153R,Color Palette 3 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP3_153A ,Color Palette 3_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP3_153R ,Color Palette 3_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP3_153G ,Color Palette 3_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP3_153B ,Color Palette 3_153 Blue" line.long 0x268 "CP3_154R,Color Palette 3 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP3_154A ,Color Palette 3_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP3_154R ,Color Palette 3_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP3_154G ,Color Palette 3_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP3_154B ,Color Palette 3_154 Blue" line.long 0x26C "CP3_155R,Color Palette 3 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP3_155A ,Color Palette 3_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP3_155R ,Color Palette 3_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP3_155G ,Color Palette 3_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP3_155B ,Color Palette 3_155 Blue" line.long 0x270 "CP3_156R,Color Palette 3 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP3_156A ,Color Palette 3_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP3_156R ,Color Palette 3_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP3_156G ,Color Palette 3_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP3_156B ,Color Palette 3_156 Blue" line.long 0x274 "CP3_157R,Color Palette 3 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP3_157A ,Color Palette 3_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP3_157R ,Color Palette 3_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP3_157G ,Color Palette 3_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP3_157B ,Color Palette 3_157 Blue" line.long 0x278 "CP3_158R,Color Palette 3 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP3_158A ,Color Palette 3_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP3_158R ,Color Palette 3_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP3_158G ,Color Palette 3_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP3_158B ,Color Palette 3_158 Blue" line.long 0x27C "CP3_159R,Color Palette 3 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP3_159A ,Color Palette 3_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP3_159R ,Color Palette 3_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP3_159G ,Color Palette 3_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP3_159B ,Color Palette 3_159 Blue" line.long 0x280 "CP3_160R,Color Palette 3 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP3_160A ,Color Palette 3_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP3_160R ,Color Palette 3_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP3_160G ,Color Palette 3_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP3_160B ,Color Palette 3_160 Blue" line.long 0x284 "CP3_161R,Color Palette 3 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP3_161A ,Color Palette 3_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP3_161R ,Color Palette 3_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP3_161G ,Color Palette 3_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP3_161B ,Color Palette 3_161 Blue" line.long 0x288 "CP3_162R,Color Palette 3 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP3_162A ,Color Palette 3_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP3_162R ,Color Palette 3_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP3_162G ,Color Palette 3_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP3_162B ,Color Palette 3_162 Blue" line.long 0x28C "CP3_163R,Color Palette 3 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP3_163A ,Color Palette 3_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP3_163R ,Color Palette 3_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP3_163G ,Color Palette 3_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP3_163B ,Color Palette 3_163 Blue" line.long 0x290 "CP3_164R,Color Palette 3 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP3_164A ,Color Palette 3_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP3_164R ,Color Palette 3_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP3_164G ,Color Palette 3_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP3_164B ,Color Palette 3_164 Blue" line.long 0x294 "CP3_165R,Color Palette 3 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP3_165A ,Color Palette 3_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP3_165R ,Color Palette 3_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP3_165G ,Color Palette 3_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP3_165B ,Color Palette 3_165 Blue" line.long 0x298 "CP3_166R,Color Palette 3 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP3_166A ,Color Palette 3_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP3_166R ,Color Palette 3_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP3_166G ,Color Palette 3_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP3_166B ,Color Palette 3_166 Blue" line.long 0x29C "CP3_167R,Color Palette 3 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP3_167A ,Color Palette 3_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP3_167R ,Color Palette 3_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP3_167G ,Color Palette 3_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP3_167B ,Color Palette 3_167 Blue" line.long 0x2A0 "CP3_168R,Color Palette 3 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP3_168A ,Color Palette 3_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP3_168R ,Color Palette 3_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP3_168G ,Color Palette 3_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP3_168B ,Color Palette 3_168 Blue" line.long 0x2A4 "CP3_169R,Color Palette 3 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP3_169A ,Color Palette 3_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP3_169R ,Color Palette 3_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP3_169G ,Color Palette 3_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP3_169B ,Color Palette 3_169 Blue" line.long 0x2A8 "CP3_170R,Color Palette 3 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP3_170A ,Color Palette 3_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP3_170R ,Color Palette 3_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP3_170G ,Color Palette 3_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP3_170B ,Color Palette 3_170 Blue" line.long 0x2AC "CP3_171R,Color Palette 3 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP3_171A ,Color Palette 3_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP3_171R ,Color Palette 3_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP3_171G ,Color Palette 3_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP3_171B ,Color Palette 3_171 Blue" line.long 0x2B0 "CP3_172R,Color Palette 3 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP3_172A ,Color Palette 3_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP3_172R ,Color Palette 3_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP3_172G ,Color Palette 3_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP3_172B ,Color Palette 3_172 Blue" line.long 0x2B4 "CP3_173R,Color Palette 3 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP3_173A ,Color Palette 3_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP3_173R ,Color Palette 3_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP3_173G ,Color Palette 3_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP3_173B ,Color Palette 3_173 Blue" line.long 0x2B8 "CP3_174R,Color Palette 3 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP3_174A ,Color Palette 3_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP3_174R ,Color Palette 3_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP3_174G ,Color Palette 3_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP3_174B ,Color Palette 3_174 Blue" line.long 0x2BC "CP3_175R,Color Palette 3 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP3_175A ,Color Palette 3_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP3_175R ,Color Palette 3_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP3_175G ,Color Palette 3_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP3_175B ,Color Palette 3_175 Blue" line.long 0x2C0 "CP3_176R,Color Palette 3 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP3_176A ,Color Palette 3_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP3_176R ,Color Palette 3_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP3_176G ,Color Palette 3_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP3_176B ,Color Palette 3_176 Blue" line.long 0x2C4 "CP3_177R,Color Palette 3 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP3_177A ,Color Palette 3_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP3_177R ,Color Palette 3_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP3_177G ,Color Palette 3_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP3_177B ,Color Palette 3_177 Blue" line.long 0x2C8 "CP3_178R,Color Palette 3 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP3_178A ,Color Palette 3_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP3_178R ,Color Palette 3_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP3_178G ,Color Palette 3_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP3_178B ,Color Palette 3_178 Blue" line.long 0x2CC "CP3_179R,Color Palette 3 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP3_179A ,Color Palette 3_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP3_179R ,Color Palette 3_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP3_179G ,Color Palette 3_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP3_179B ,Color Palette 3_179 Blue" line.long 0x2D0 "CP3_180R,Color Palette 3 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP3_180A ,Color Palette 3_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP3_180R ,Color Palette 3_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP3_180G ,Color Palette 3_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP3_180B ,Color Palette 3_180 Blue" line.long 0x2D4 "CP3_181R,Color Palette 3 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP3_181A ,Color Palette 3_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP3_181R ,Color Palette 3_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP3_181G ,Color Palette 3_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP3_181B ,Color Palette 3_181 Blue" line.long 0x2D8 "CP3_182R,Color Palette 3 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP3_182A ,Color Palette 3_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP3_182R ,Color Palette 3_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP3_182G ,Color Palette 3_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP3_182B ,Color Palette 3_182 Blue" line.long 0x2DC "CP3_183R,Color Palette 3 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP3_183A ,Color Palette 3_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP3_183R ,Color Palette 3_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP3_183G ,Color Palette 3_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP3_183B ,Color Palette 3_183 Blue" line.long 0x2E0 "CP3_184R,Color Palette 3 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP3_184A ,Color Palette 3_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP3_184R ,Color Palette 3_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP3_184G ,Color Palette 3_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP3_184B ,Color Palette 3_184 Blue" line.long 0x2E4 "CP3_185R,Color Palette 3 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP3_185A ,Color Palette 3_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP3_185R ,Color Palette 3_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP3_185G ,Color Palette 3_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP3_185B ,Color Palette 3_185 Blue" line.long 0x2E8 "CP3_186R,Color Palette 3 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP3_186A ,Color Palette 3_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP3_186R ,Color Palette 3_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP3_186G ,Color Palette 3_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP3_186B ,Color Palette 3_186 Blue" line.long 0x2EC "CP3_187R,Color Palette 3 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP3_187A ,Color Palette 3_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP3_187R ,Color Palette 3_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP3_187G ,Color Palette 3_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP3_187B ,Color Palette 3_187 Blue" line.long 0x2F0 "CP3_188R,Color Palette 3 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP3_188A ,Color Palette 3_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP3_188R ,Color Palette 3_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP3_188G ,Color Palette 3_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP3_188B ,Color Palette 3_188 Blue" line.long 0x2F4 "CP3_189R,Color Palette 3 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP3_189A ,Color Palette 3_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP3_189R ,Color Palette 3_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP3_189G ,Color Palette 3_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP3_189B ,Color Palette 3_189 Blue" line.long 0x2F8 "CP3_190R,Color Palette 3 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP3_190A ,Color Palette 3_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP3_190R ,Color Palette 3_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP3_190G ,Color Palette 3_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP3_190B ,Color Palette 3_190 Blue" line.long 0x2FC "CP3_191R,Color Palette 3 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP3_191A ,Color Palette 3_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP3_191R ,Color Palette 3_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP3_191G ,Color Palette 3_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP3_191B ,Color Palette 3_191 Blue" line.long 0x300 "CP3_192R,Color Palette 3 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP3_192A ,Color Palette 3_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP3_192R ,Color Palette 3_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP3_192G ,Color Palette 3_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP3_192B ,Color Palette 3_192 Blue" line.long 0x304 "CP3_193R,Color Palette 3 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP3_193A ,Color Palette 3_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP3_193R ,Color Palette 3_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP3_193G ,Color Palette 3_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP3_193B ,Color Palette 3_193 Blue" line.long 0x308 "CP3_194R,Color Palette 3 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP3_194A ,Color Palette 3_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP3_194R ,Color Palette 3_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP3_194G ,Color Palette 3_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP3_194B ,Color Palette 3_194 Blue" line.long 0x30C "CP3_195R,Color Palette 3 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP3_195A ,Color Palette 3_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP3_195R ,Color Palette 3_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP3_195G ,Color Palette 3_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP3_195B ,Color Palette 3_195 Blue" line.long 0x310 "CP3_196R,Color Palette 3 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP3_196A ,Color Palette 3_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP3_196R ,Color Palette 3_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP3_196G ,Color Palette 3_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP3_196B ,Color Palette 3_196 Blue" line.long 0x314 "CP3_197R,Color Palette 3 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP3_197A ,Color Palette 3_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP3_197R ,Color Palette 3_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP3_197G ,Color Palette 3_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP3_197B ,Color Palette 3_197 Blue" line.long 0x318 "CP3_198R,Color Palette 3 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP3_198A ,Color Palette 3_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP3_198R ,Color Palette 3_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP3_198G ,Color Palette 3_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP3_198B ,Color Palette 3_198 Blue" line.long 0x31C "CP3_199R,Color Palette 3 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP3_199A ,Color Palette 3_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP3_199R ,Color Palette 3_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP3_199G ,Color Palette 3_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP3_199B ,Color Palette 3_199 Blue" line.long 0x320 "CP3_200R,Color Palette 3 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP3_200A ,Color Palette 3_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP3_200R ,Color Palette 3_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP3_200G ,Color Palette 3_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP3_200B ,Color Palette 3_200 Blue" line.long 0x324 "CP3_201R,Color Palette 3 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP3_201A ,Color Palette 3_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP3_201R ,Color Palette 3_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP3_201G ,Color Palette 3_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP3_201B ,Color Palette 3_201 Blue" line.long 0x328 "CP3_202R,Color Palette 3 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP3_202A ,Color Palette 3_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP3_202R ,Color Palette 3_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP3_202G ,Color Palette 3_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP3_202B ,Color Palette 3_202 Blue" line.long 0x32C "CP3_203R,Color Palette 3 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP3_203A ,Color Palette 3_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP3_203R ,Color Palette 3_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP3_203G ,Color Palette 3_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP3_203B ,Color Palette 3_203 Blue" line.long 0x330 "CP3_204R,Color Palette 3 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP3_204A ,Color Palette 3_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP3_204R ,Color Palette 3_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP3_204G ,Color Palette 3_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP3_204B ,Color Palette 3_204 Blue" line.long 0x334 "CP3_205R,Color Palette 3 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP3_205A ,Color Palette 3_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP3_205R ,Color Palette 3_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP3_205G ,Color Palette 3_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP3_205B ,Color Palette 3_205 Blue" line.long 0x338 "CP3_206R,Color Palette 3 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP3_206A ,Color Palette 3_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP3_206R ,Color Palette 3_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP3_206G ,Color Palette 3_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP3_206B ,Color Palette 3_206 Blue" line.long 0x33C "CP3_207R,Color Palette 3 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP3_207A ,Color Palette 3_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP3_207R ,Color Palette 3_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP3_207G ,Color Palette 3_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP3_207B ,Color Palette 3_207 Blue" line.long 0x340 "CP3_208R,Color Palette 3 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP3_208A ,Color Palette 3_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP3_208R ,Color Palette 3_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP3_208G ,Color Palette 3_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP3_208B ,Color Palette 3_208 Blue" line.long 0x344 "CP3_209R,Color Palette 3 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP3_209A ,Color Palette 3_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP3_209R ,Color Palette 3_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP3_209G ,Color Palette 3_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP3_209B ,Color Palette 3_209 Blue" line.long 0x348 "CP3_210R,Color Palette 3 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP3_210A ,Color Palette 3_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP3_210R ,Color Palette 3_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP3_210G ,Color Palette 3_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP3_210B ,Color Palette 3_210 Blue" line.long 0x34C "CP3_211R,Color Palette 3 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP3_211A ,Color Palette 3_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP3_211R ,Color Palette 3_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP3_211G ,Color Palette 3_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP3_211B ,Color Palette 3_211 Blue" line.long 0x350 "CP3_212R,Color Palette 3 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP3_212A ,Color Palette 3_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP3_212R ,Color Palette 3_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP3_212G ,Color Palette 3_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP3_212B ,Color Palette 3_212 Blue" line.long 0x354 "CP3_213R,Color Palette 3 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP3_213A ,Color Palette 3_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP3_213R ,Color Palette 3_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP3_213G ,Color Palette 3_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP3_213B ,Color Palette 3_213 Blue" line.long 0x358 "CP3_214R,Color Palette 3 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP3_214A ,Color Palette 3_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP3_214R ,Color Palette 3_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP3_214G ,Color Palette 3_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP3_214B ,Color Palette 3_214 Blue" line.long 0x35C "CP3_215R,Color Palette 3 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP3_215A ,Color Palette 3_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP3_215R ,Color Palette 3_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP3_215G ,Color Palette 3_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP3_215B ,Color Palette 3_215 Blue" line.long 0x360 "CP3_216R,Color Palette 3 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP3_216A ,Color Palette 3_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP3_216R ,Color Palette 3_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP3_216G ,Color Palette 3_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP3_216B ,Color Palette 3_216 Blue" line.long 0x364 "CP3_217R,Color Palette 3 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP3_217A ,Color Palette 3_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP3_217R ,Color Palette 3_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP3_217G ,Color Palette 3_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP3_217B ,Color Palette 3_217 Blue" line.long 0x368 "CP3_218R,Color Palette 3 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP3_218A ,Color Palette 3_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP3_218R ,Color Palette 3_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP3_218G ,Color Palette 3_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP3_218B ,Color Palette 3_218 Blue" line.long 0x36C "CP3_219R,Color Palette 3 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP3_219A ,Color Palette 3_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP3_219R ,Color Palette 3_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP3_219G ,Color Palette 3_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP3_219B ,Color Palette 3_219 Blue" line.long 0x370 "CP3_220R,Color Palette 3 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP3_220A ,Color Palette 3_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP3_220R ,Color Palette 3_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP3_220G ,Color Palette 3_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP3_220B ,Color Palette 3_220 Blue" line.long 0x374 "CP3_221R,Color Palette 3 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP3_221A ,Color Palette 3_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP3_221R ,Color Palette 3_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP3_221G ,Color Palette 3_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP3_221B ,Color Palette 3_221 Blue" line.long 0x378 "CP3_222R,Color Palette 3 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP3_222A ,Color Palette 3_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP3_222R ,Color Palette 3_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP3_222G ,Color Palette 3_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP3_222B ,Color Palette 3_222 Blue" line.long 0x37C "CP3_223R,Color Palette 3 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP3_223A ,Color Palette 3_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP3_223R ,Color Palette 3_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP3_223G ,Color Palette 3_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP3_223B ,Color Palette 3_223 Blue" line.long 0x380 "CP3_224R,Color Palette 3 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP3_224A ,Color Palette 3_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP3_224R ,Color Palette 3_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP3_224G ,Color Palette 3_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP3_224B ,Color Palette 3_224 Blue" line.long 0x384 "CP3_225R,Color Palette 3 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP3_225A ,Color Palette 3_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP3_225R ,Color Palette 3_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP3_225G ,Color Palette 3_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP3_225B ,Color Palette 3_225 Blue" line.long 0x388 "CP3_226R,Color Palette 3 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP3_226A ,Color Palette 3_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP3_226R ,Color Palette 3_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP3_226G ,Color Palette 3_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP3_226B ,Color Palette 3_226 Blue" line.long 0x38C "CP3_227R,Color Palette 3 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP3_227A ,Color Palette 3_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP3_227R ,Color Palette 3_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP3_227G ,Color Palette 3_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP3_227B ,Color Palette 3_227 Blue" line.long 0x390 "CP3_228R,Color Palette 3 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP3_228A ,Color Palette 3_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP3_228R ,Color Palette 3_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP3_228G ,Color Palette 3_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP3_228B ,Color Palette 3_228 Blue" line.long 0x394 "CP3_229R,Color Palette 3 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP3_229A ,Color Palette 3_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP3_229R ,Color Palette 3_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP3_229G ,Color Palette 3_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP3_229B ,Color Palette 3_229 Blue" line.long 0x398 "CP3_230R,Color Palette 3 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP3_230A ,Color Palette 3_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP3_230R ,Color Palette 3_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP3_230G ,Color Palette 3_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP3_230B ,Color Palette 3_230 Blue" line.long 0x39C "CP3_231R,Color Palette 3 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP3_231A ,Color Palette 3_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP3_231R ,Color Palette 3_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP3_231G ,Color Palette 3_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP3_231B ,Color Palette 3_231 Blue" line.long 0x3A0 "CP3_232R,Color Palette 3 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP3_232A ,Color Palette 3_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP3_232R ,Color Palette 3_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP3_232G ,Color Palette 3_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP3_232B ,Color Palette 3_232 Blue" line.long 0x3A4 "CP3_233R,Color Palette 3 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP3_233A ,Color Palette 3_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP3_233R ,Color Palette 3_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP3_233G ,Color Palette 3_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP3_233B ,Color Palette 3_233 Blue" line.long 0x3A8 "CP3_234R,Color Palette 3 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP3_234A ,Color Palette 3_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP3_234R ,Color Palette 3_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP3_234G ,Color Palette 3_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP3_234B ,Color Palette 3_234 Blue" line.long 0x3AC "CP3_235R,Color Palette 3 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP3_235A ,Color Palette 3_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP3_235R ,Color Palette 3_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP3_235G ,Color Palette 3_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP3_235B ,Color Palette 3_235 Blue" line.long 0x3B0 "CP3_236R,Color Palette 3 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP3_236A ,Color Palette 3_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP3_236R ,Color Palette 3_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP3_236G ,Color Palette 3_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP3_236B ,Color Palette 3_236 Blue" line.long 0x3B4 "CP3_237R,Color Palette 3 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP3_237A ,Color Palette 3_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP3_237R ,Color Palette 3_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP3_237G ,Color Palette 3_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP3_237B ,Color Palette 3_237 Blue" line.long 0x3B8 "CP3_238R,Color Palette 3 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP3_238A ,Color Palette 3_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP3_238R ,Color Palette 3_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP3_238G ,Color Palette 3_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP3_238B ,Color Palette 3_238 Blue" line.long 0x3BC "CP3_239R,Color Palette 3 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP3_239A ,Color Palette 3_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP3_239R ,Color Palette 3_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP3_239G ,Color Palette 3_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP3_239B ,Color Palette 3_239 Blue" line.long 0x3C0 "CP3_240R,Color Palette 3 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP3_240A ,Color Palette 3_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP3_240R ,Color Palette 3_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP3_240G ,Color Palette 3_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP3_240B ,Color Palette 3_240 Blue" line.long 0x3C4 "CP3_241R,Color Palette 3 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP3_241A ,Color Palette 3_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP3_241R ,Color Palette 3_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP3_241G ,Color Palette 3_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP3_241B ,Color Palette 3_241 Blue" line.long 0x3C8 "CP3_242R,Color Palette 3 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP3_242A ,Color Palette 3_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP3_242R ,Color Palette 3_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP3_242G ,Color Palette 3_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP3_242B ,Color Palette 3_242 Blue" line.long 0x3CC "CP3_243R,Color Palette 3 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP3_243A ,Color Palette 3_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP3_243R ,Color Palette 3_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP3_243G ,Color Palette 3_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP3_243B ,Color Palette 3_243 Blue" line.long 0x3D0 "CP3_244R,Color Palette 3 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP3_244A ,Color Palette 3_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP3_244R ,Color Palette 3_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP3_244G ,Color Palette 3_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP3_244B ,Color Palette 3_244 Blue" line.long 0x3D4 "CP3_245R,Color Palette 3 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP3_245A ,Color Palette 3_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP3_245R ,Color Palette 3_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP3_245G ,Color Palette 3_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP3_245B ,Color Palette 3_245 Blue" line.long 0x3D8 "CP3_246R,Color Palette 3 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP3_246A ,Color Palette 3_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP3_246R ,Color Palette 3_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP3_246G ,Color Palette 3_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP3_246B ,Color Palette 3_246 Blue" line.long 0x3DC "CP3_247R,Color Palette 3 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP3_247A ,Color Palette 3_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP3_247R ,Color Palette 3_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP3_247G ,Color Palette 3_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP3_247B ,Color Palette 3_247 Blue" line.long 0x3E0 "CP3_248R,Color Palette 3 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP3_248A ,Color Palette 3_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP3_248R ,Color Palette 3_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP3_248G ,Color Palette 3_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP3_248B ,Color Palette 3_248 Blue" line.long 0x3E4 "CP3_249R,Color Palette 3 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP3_249A ,Color Palette 3_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP3_249R ,Color Palette 3_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP3_249G ,Color Palette 3_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP3_249B ,Color Palette 3_249 Blue" line.long 0x3E8 "CP3_250R,Color Palette 3 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP3_250A ,Color Palette 3_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP3_250R ,Color Palette 3_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP3_250G ,Color Palette 3_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP3_250B ,Color Palette 3_250 Blue" line.long 0x3EC "CP3_251R,Color Palette 3 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP3_251A ,Color Palette 3_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP3_251R ,Color Palette 3_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP3_251G ,Color Palette 3_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP3_251B ,Color Palette 3_251 Blue" line.long 0x3F0 "CP3_252R,Color Palette 3 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP3_252A ,Color Palette 3_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP3_252R ,Color Palette 3_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP3_252G ,Color Palette 3_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP3_252B ,Color Palette 3_252 Blue" line.long 0x3F4 "CP3_253R,Color Palette 3 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP3_253A ,Color Palette 3_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP3_253R ,Color Palette 3_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP3_253G ,Color Palette 3_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP3_253B ,Color Palette 3_253 Blue" line.long 0x3F8 "CP3_254R,Color Palette 3 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP3_254A ,Color Palette 3_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP3_254R ,Color Palette 3_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP3_254G ,Color Palette 3_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP3_254B ,Color Palette 3_254 Blue" line.long 0x3FC "CP3_255R,Color Palette 3 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP3_255A ,Color Palette 3_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP3_255R ,Color Palette 3_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP3_255G ,Color Palette 3_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP3_255B ,Color Palette 3_255 Blue" tree.end tree "Color Palette 4 Registers" width 10. group.long 0x4000++0x4ff line.long 0x0 "CP4_0R,Color Palette 4 Register 0" hexmask.long.byte 0x0 24.--31. 1. " CP4_0A ,Color Palette 4_0 Blend Ratio" hexmask.long.byte 0x0 18.--23. 1. " CP4_0R ,Color Palette 4_0 Red" textline " " hexmask.long.byte 0x0 10.--15. 1. " CP4_0G ,Color Palette 4_0 Green" hexmask.long.byte 0x0 2.--7. 1. " CP4_0B ,Color Palette 4_0 Blue" line.long 0x4 "CP4_1R,Color Palette 4 Register 1" hexmask.long.byte 0x4 24.--31. 1. " CP4_1A ,Color Palette 4_1 Blend Ratio" hexmask.long.byte 0x4 18.--23. 1. " CP4_1R ,Color Palette 4_1 Red" textline " " hexmask.long.byte 0x4 10.--15. 1. " CP4_1G ,Color Palette 4_1 Green" hexmask.long.byte 0x4 2.--7. 1. " CP4_1B ,Color Palette 4_1 Blue" line.long 0x8 "CP4_2R,Color Palette 4 Register 2" hexmask.long.byte 0x8 24.--31. 1. " CP4_2A ,Color Palette 4_2 Blend Ratio" hexmask.long.byte 0x8 18.--23. 1. " CP4_2R ,Color Palette 4_2 Red" textline " " hexmask.long.byte 0x8 10.--15. 1. " CP4_2G ,Color Palette 4_2 Green" hexmask.long.byte 0x8 2.--7. 1. " CP4_2B ,Color Palette 4_2 Blue" line.long 0xC "CP4_3R,Color Palette 4 Register 3" hexmask.long.byte 0xC 24.--31. 1. " CP4_3A ,Color Palette 4_3 Blend Ratio" hexmask.long.byte 0xC 18.--23. 1. " CP4_3R ,Color Palette 4_3 Red" textline " " hexmask.long.byte 0xC 10.--15. 1. " CP4_3G ,Color Palette 4_3 Green" hexmask.long.byte 0xC 2.--7. 1. " CP4_3B ,Color Palette 4_3 Blue" line.long 0x10 "CP4_4R,Color Palette 4 Register 4" hexmask.long.byte 0x10 24.--31. 1. " CP4_4A ,Color Palette 4_4 Blend Ratio" hexmask.long.byte 0x10 18.--23. 1. " CP4_4R ,Color Palette 4_4 Red" textline " " hexmask.long.byte 0x10 10.--15. 1. " CP4_4G ,Color Palette 4_4 Green" hexmask.long.byte 0x10 2.--7. 1. " CP4_4B ,Color Palette 4_4 Blue" line.long 0x14 "CP4_5R,Color Palette 4 Register 5" hexmask.long.byte 0x14 24.--31. 1. " CP4_5A ,Color Palette 4_5 Blend Ratio" hexmask.long.byte 0x14 18.--23. 1. " CP4_5R ,Color Palette 4_5 Red" textline " " hexmask.long.byte 0x14 10.--15. 1. " CP4_5G ,Color Palette 4_5 Green" hexmask.long.byte 0x14 2.--7. 1. " CP4_5B ,Color Palette 4_5 Blue" line.long 0x18 "CP4_6R,Color Palette 4 Register 6" hexmask.long.byte 0x18 24.--31. 1. " CP4_6A ,Color Palette 4_6 Blend Ratio" hexmask.long.byte 0x18 18.--23. 1. " CP4_6R ,Color Palette 4_6 Red" textline " " hexmask.long.byte 0x18 10.--15. 1. " CP4_6G ,Color Palette 4_6 Green" hexmask.long.byte 0x18 2.--7. 1. " CP4_6B ,Color Palette 4_6 Blue" line.long 0x1C "CP4_7R,Color Palette 4 Register 7" hexmask.long.byte 0x1C 24.--31. 1. " CP4_7A ,Color Palette 4_7 Blend Ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP4_7R ,Color Palette 4_7 Red" textline " " hexmask.long.byte 0x1C 10.--15. 1. " CP4_7G ,Color Palette 4_7 Green" hexmask.long.byte 0x1C 2.--7. 1. " CP4_7B ,Color Palette 4_7 Blue" line.long 0x20 "CP4_8R,Color Palette 4 Register 8" hexmask.long.byte 0x20 24.--31. 1. " CP4_8A ,Color Palette 4_8 Blend Ratio" hexmask.long.byte 0x20 18.--23. 1. " CP4_8R ,Color Palette 4_8 Red" textline " " hexmask.long.byte 0x20 10.--15. 1. " CP4_8G ,Color Palette 4_8 Green" hexmask.long.byte 0x20 2.--7. 1. " CP4_8B ,Color Palette 4_8 Blue" line.long 0x24 "CP4_9R,Color Palette 4 Register 9" hexmask.long.byte 0x24 24.--31. 1. " CP4_9A ,Color Palette 4_9 Blend Ratio" hexmask.long.byte 0x24 18.--23. 1. " CP4_9R ,Color Palette 4_9 Red" textline " " hexmask.long.byte 0x24 10.--15. 1. " CP4_9G ,Color Palette 4_9 Green" hexmask.long.byte 0x24 2.--7. 1. " CP4_9B ,Color Palette 4_9 Blue" line.long 0x28 "CP4_10R,Color Palette 4 Register 10" hexmask.long.byte 0x28 24.--31. 1. " CP4_10A ,Color Palette 4_10 Blend Ratio" hexmask.long.byte 0x28 18.--23. 1. " CP4_10R ,Color Palette 4_10 Red" textline " " hexmask.long.byte 0x28 10.--15. 1. " CP4_10G ,Color Palette 4_10 Green" hexmask.long.byte 0x28 2.--7. 1. " CP4_10B ,Color Palette 4_10 Blue" line.long 0x2C "CP4_11R,Color Palette 4 Register 11" hexmask.long.byte 0x2C 24.--31. 1. " CP4_11A ,Color Palette 4_11 Blend Ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP4_11R ,Color Palette 4_11 Red" textline " " hexmask.long.byte 0x2C 10.--15. 1. " CP4_11G ,Color Palette 4_11 Green" hexmask.long.byte 0x2C 2.--7. 1. " CP4_11B ,Color Palette 4_11 Blue" line.long 0x30 "CP4_12R,Color Palette 4 Register 12" hexmask.long.byte 0x30 24.--31. 1. " CP4_12A ,Color Palette 4_12 Blend Ratio" hexmask.long.byte 0x30 18.--23. 1. " CP4_12R ,Color Palette 4_12 Red" textline " " hexmask.long.byte 0x30 10.--15. 1. " CP4_12G ,Color Palette 4_12 Green" hexmask.long.byte 0x30 2.--7. 1. " CP4_12B ,Color Palette 4_12 Blue" line.long 0x34 "CP4_13R,Color Palette 4 Register 13" hexmask.long.byte 0x34 24.--31. 1. " CP4_13A ,Color Palette 4_13 Blend Ratio" hexmask.long.byte 0x34 18.--23. 1. " CP4_13R ,Color Palette 4_13 Red" textline " " hexmask.long.byte 0x34 10.--15. 1. " CP4_13G ,Color Palette 4_13 Green" hexmask.long.byte 0x34 2.--7. 1. " CP4_13B ,Color Palette 4_13 Blue" line.long 0x38 "CP4_14R,Color Palette 4 Register 14" hexmask.long.byte 0x38 24.--31. 1. " CP4_14A ,Color Palette 4_14 Blend Ratio" hexmask.long.byte 0x38 18.--23. 1. " CP4_14R ,Color Palette 4_14 Red" textline " " hexmask.long.byte 0x38 10.--15. 1. " CP4_14G ,Color Palette 4_14 Green" hexmask.long.byte 0x38 2.--7. 1. " CP4_14B ,Color Palette 4_14 Blue" line.long 0x3C "CP4_15R,Color Palette 4 Register 15" hexmask.long.byte 0x3C 24.--31. 1. " CP4_15A ,Color Palette 4_15 Blend Ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP4_15R ,Color Palette 4_15 Red" textline " " hexmask.long.byte 0x3C 10.--15. 1. " CP4_15G ,Color Palette 4_15 Green" hexmask.long.byte 0x3C 2.--7. 1. " CP4_15B ,Color Palette 4_15 Blue" line.long 0x40 "CP4_16R,Color Palette 4 Register 16" hexmask.long.byte 0x40 24.--31. 1. " CP4_16A ,Color Palette 4_16 Blend Ratio" hexmask.long.byte 0x40 18.--23. 1. " CP4_16R ,Color Palette 4_16 Red" textline " " hexmask.long.byte 0x40 10.--15. 1. " CP4_16G ,Color Palette 4_16 Green" hexmask.long.byte 0x40 2.--7. 1. " CP4_16B ,Color Palette 4_16 Blue" line.long 0x44 "CP4_17R,Color Palette 4 Register 17" hexmask.long.byte 0x44 24.--31. 1. " CP4_17A ,Color Palette 4_17 Blend Ratio" hexmask.long.byte 0x44 18.--23. 1. " CP4_17R ,Color Palette 4_17 Red" textline " " hexmask.long.byte 0x44 10.--15. 1. " CP4_17G ,Color Palette 4_17 Green" hexmask.long.byte 0x44 2.--7. 1. " CP4_17B ,Color Palette 4_17 Blue" line.long 0x48 "CP4_18R,Color Palette 4 Register 18" hexmask.long.byte 0x48 24.--31. 1. " CP4_18A ,Color Palette 4_18 Blend Ratio" hexmask.long.byte 0x48 18.--23. 1. " CP4_18R ,Color Palette 4_18 Red" textline " " hexmask.long.byte 0x48 10.--15. 1. " CP4_18G ,Color Palette 4_18 Green" hexmask.long.byte 0x48 2.--7. 1. " CP4_18B ,Color Palette 4_18 Blue" line.long 0x4C "CP4_19R,Color Palette 4 Register 19" hexmask.long.byte 0x4C 24.--31. 1. " CP4_19A ,Color Palette 4_19 Blend Ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP4_19R ,Color Palette 4_19 Red" textline " " hexmask.long.byte 0x4C 10.--15. 1. " CP4_19G ,Color Palette 4_19 Green" hexmask.long.byte 0x4C 2.--7. 1. " CP4_19B ,Color Palette 4_19 Blue" line.long 0x50 "CP4_20R,Color Palette 4 Register 20" hexmask.long.byte 0x50 24.--31. 1. " CP4_20A ,Color Palette 4_20 Blend Ratio" hexmask.long.byte 0x50 18.--23. 1. " CP4_20R ,Color Palette 4_20 Red" textline " " hexmask.long.byte 0x50 10.--15. 1. " CP4_20G ,Color Palette 4_20 Green" hexmask.long.byte 0x50 2.--7. 1. " CP4_20B ,Color Palette 4_20 Blue" line.long 0x54 "CP4_21R,Color Palette 4 Register 21" hexmask.long.byte 0x54 24.--31. 1. " CP4_21A ,Color Palette 4_21 Blend Ratio" hexmask.long.byte 0x54 18.--23. 1. " CP4_21R ,Color Palette 4_21 Red" textline " " hexmask.long.byte 0x54 10.--15. 1. " CP4_21G ,Color Palette 4_21 Green" hexmask.long.byte 0x54 2.--7. 1. " CP4_21B ,Color Palette 4_21 Blue" line.long 0x58 "CP4_22R,Color Palette 4 Register 22" hexmask.long.byte 0x58 24.--31. 1. " CP4_22A ,Color Palette 4_22 Blend Ratio" hexmask.long.byte 0x58 18.--23. 1. " CP4_22R ,Color Palette 4_22 Red" textline " " hexmask.long.byte 0x58 10.--15. 1. " CP4_22G ,Color Palette 4_22 Green" hexmask.long.byte 0x58 2.--7. 1. " CP4_22B ,Color Palette 4_22 Blue" line.long 0x5C "CP4_23R,Color Palette 4 Register 23" hexmask.long.byte 0x5C 24.--31. 1. " CP4_23A ,Color Palette 4_23 Blend Ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP4_23R ,Color Palette 4_23 Red" textline " " hexmask.long.byte 0x5C 10.--15. 1. " CP4_23G ,Color Palette 4_23 Green" hexmask.long.byte 0x5C 2.--7. 1. " CP4_23B ,Color Palette 4_23 Blue" line.long 0x60 "CP4_24R,Color Palette 4 Register 24" hexmask.long.byte 0x60 24.--31. 1. " CP4_24A ,Color Palette 4_24 Blend Ratio" hexmask.long.byte 0x60 18.--23. 1. " CP4_24R ,Color Palette 4_24 Red" textline " " hexmask.long.byte 0x60 10.--15. 1. " CP4_24G ,Color Palette 4_24 Green" hexmask.long.byte 0x60 2.--7. 1. " CP4_24B ,Color Palette 4_24 Blue" line.long 0x64 "CP4_25R,Color Palette 4 Register 25" hexmask.long.byte 0x64 24.--31. 1. " CP4_25A ,Color Palette 4_25 Blend Ratio" hexmask.long.byte 0x64 18.--23. 1. " CP4_25R ,Color Palette 4_25 Red" textline " " hexmask.long.byte 0x64 10.--15. 1. " CP4_25G ,Color Palette 4_25 Green" hexmask.long.byte 0x64 2.--7. 1. " CP4_25B ,Color Palette 4_25 Blue" line.long 0x68 "CP4_26R,Color Palette 4 Register 26" hexmask.long.byte 0x68 24.--31. 1. " CP4_26A ,Color Palette 4_26 Blend Ratio" hexmask.long.byte 0x68 18.--23. 1. " CP4_26R ,Color Palette 4_26 Red" textline " " hexmask.long.byte 0x68 10.--15. 1. " CP4_26G ,Color Palette 4_26 Green" hexmask.long.byte 0x68 2.--7. 1. " CP4_26B ,Color Palette 4_26 Blue" line.long 0x6C "CP4_27R,Color Palette 4 Register 27" hexmask.long.byte 0x6C 24.--31. 1. " CP4_27A ,Color Palette 4_27 Blend Ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP4_27R ,Color Palette 4_27 Red" textline " " hexmask.long.byte 0x6C 10.--15. 1. " CP4_27G ,Color Palette 4_27 Green" hexmask.long.byte 0x6C 2.--7. 1. " CP4_27B ,Color Palette 4_27 Blue" line.long 0x70 "CP4_28R,Color Palette 4 Register 28" hexmask.long.byte 0x70 24.--31. 1. " CP4_28A ,Color Palette 4_28 Blend Ratio" hexmask.long.byte 0x70 18.--23. 1. " CP4_28R ,Color Palette 4_28 Red" textline " " hexmask.long.byte 0x70 10.--15. 1. " CP4_28G ,Color Palette 4_28 Green" hexmask.long.byte 0x70 2.--7. 1. " CP4_28B ,Color Palette 4_28 Blue" line.long 0x74 "CP4_29R,Color Palette 4 Register 29" hexmask.long.byte 0x74 24.--31. 1. " CP4_29A ,Color Palette 4_29 Blend Ratio" hexmask.long.byte 0x74 18.--23. 1. " CP4_29R ,Color Palette 4_29 Red" textline " " hexmask.long.byte 0x74 10.--15. 1. " CP4_29G ,Color Palette 4_29 Green" hexmask.long.byte 0x74 2.--7. 1. " CP4_29B ,Color Palette 4_29 Blue" line.long 0x78 "CP4_30R,Color Palette 4 Register 30" hexmask.long.byte 0x78 24.--31. 1. " CP4_30A ,Color Palette 4_30 Blend Ratio" hexmask.long.byte 0x78 18.--23. 1. " CP4_30R ,Color Palette 4_30 Red" textline " " hexmask.long.byte 0x78 10.--15. 1. " CP4_30G ,Color Palette 4_30 Green" hexmask.long.byte 0x78 2.--7. 1. " CP4_30B ,Color Palette 4_30 Blue" line.long 0x7C "CP4_31R,Color Palette 4 Register 31" hexmask.long.byte 0x7C 24.--31. 1. " CP4_31A ,Color Palette 4_31 Blend Ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP4_31R ,Color Palette 4_31 Red" textline " " hexmask.long.byte 0x7C 10.--15. 1. " CP4_31G ,Color Palette 4_31 Green" hexmask.long.byte 0x7C 2.--7. 1. " CP4_31B ,Color Palette 4_31 Blue" line.long 0x80 "CP4_32R,Color Palette 4 Register 32" hexmask.long.byte 0x80 24.--31. 1. " CP4_32A ,Color Palette 4_32 Blend Ratio" hexmask.long.byte 0x80 18.--23. 1. " CP4_32R ,Color Palette 4_32 Red" textline " " hexmask.long.byte 0x80 10.--15. 1. " CP4_32G ,Color Palette 4_32 Green" hexmask.long.byte 0x80 2.--7. 1. " CP4_32B ,Color Palette 4_32 Blue" line.long 0x84 "CP4_33R,Color Palette 4 Register 33" hexmask.long.byte 0x84 24.--31. 1. " CP4_33A ,Color Palette 4_33 Blend Ratio" hexmask.long.byte 0x84 18.--23. 1. " CP4_33R ,Color Palette 4_33 Red" textline " " hexmask.long.byte 0x84 10.--15. 1. " CP4_33G ,Color Palette 4_33 Green" hexmask.long.byte 0x84 2.--7. 1. " CP4_33B ,Color Palette 4_33 Blue" line.long 0x88 "CP4_34R,Color Palette 4 Register 34" hexmask.long.byte 0x88 24.--31. 1. " CP4_34A ,Color Palette 4_34 Blend Ratio" hexmask.long.byte 0x88 18.--23. 1. " CP4_34R ,Color Palette 4_34 Red" textline " " hexmask.long.byte 0x88 10.--15. 1. " CP4_34G ,Color Palette 4_34 Green" hexmask.long.byte 0x88 2.--7. 1. " CP4_34B ,Color Palette 4_34 Blue" line.long 0x8C "CP4_35R,Color Palette 4 Register 35" hexmask.long.byte 0x8C 24.--31. 1. " CP4_35A ,Color Palette 4_35 Blend Ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP4_35R ,Color Palette 4_35 Red" textline " " hexmask.long.byte 0x8C 10.--15. 1. " CP4_35G ,Color Palette 4_35 Green" hexmask.long.byte 0x8C 2.--7. 1. " CP4_35B ,Color Palette 4_35 Blue" line.long 0x90 "CP4_36R,Color Palette 4 Register 36" hexmask.long.byte 0x90 24.--31. 1. " CP4_36A ,Color Palette 4_36 Blend Ratio" hexmask.long.byte 0x90 18.--23. 1. " CP4_36R ,Color Palette 4_36 Red" textline " " hexmask.long.byte 0x90 10.--15. 1. " CP4_36G ,Color Palette 4_36 Green" hexmask.long.byte 0x90 2.--7. 1. " CP4_36B ,Color Palette 4_36 Blue" line.long 0x94 "CP4_37R,Color Palette 4 Register 37" hexmask.long.byte 0x94 24.--31. 1. " CP4_37A ,Color Palette 4_37 Blend Ratio" hexmask.long.byte 0x94 18.--23. 1. " CP4_37R ,Color Palette 4_37 Red" textline " " hexmask.long.byte 0x94 10.--15. 1. " CP4_37G ,Color Palette 4_37 Green" hexmask.long.byte 0x94 2.--7. 1. " CP4_37B ,Color Palette 4_37 Blue" line.long 0x98 "CP4_38R,Color Palette 4 Register 38" hexmask.long.byte 0x98 24.--31. 1. " CP4_38A ,Color Palette 4_38 Blend Ratio" hexmask.long.byte 0x98 18.--23. 1. " CP4_38R ,Color Palette 4_38 Red" textline " " hexmask.long.byte 0x98 10.--15. 1. " CP4_38G ,Color Palette 4_38 Green" hexmask.long.byte 0x98 2.--7. 1. " CP4_38B ,Color Palette 4_38 Blue" line.long 0x9C "CP4_39R,Color Palette 4 Register 39" hexmask.long.byte 0x9C 24.--31. 1. " CP4_39A ,Color Palette 4_39 Blend Ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP4_39R ,Color Palette 4_39 Red" textline " " hexmask.long.byte 0x9C 10.--15. 1. " CP4_39G ,Color Palette 4_39 Green" hexmask.long.byte 0x9C 2.--7. 1. " CP4_39B ,Color Palette 4_39 Blue" line.long 0xA0 "CP4_40R,Color Palette 4 Register 40" hexmask.long.byte 0xA0 24.--31. 1. " CP4_40A ,Color Palette 4_40 Blend Ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP4_40R ,Color Palette 4_40 Red" textline " " hexmask.long.byte 0xA0 10.--15. 1. " CP4_40G ,Color Palette 4_40 Green" hexmask.long.byte 0xA0 2.--7. 1. " CP4_40B ,Color Palette 4_40 Blue" line.long 0xA4 "CP4_41R,Color Palette 4 Register 41" hexmask.long.byte 0xA4 24.--31. 1. " CP4_41A ,Color Palette 4_41 Blend Ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP4_41R ,Color Palette 4_41 Red" textline " " hexmask.long.byte 0xA4 10.--15. 1. " CP4_41G ,Color Palette 4_41 Green" hexmask.long.byte 0xA4 2.--7. 1. " CP4_41B ,Color Palette 4_41 Blue" line.long 0xA8 "CP4_42R,Color Palette 4 Register 42" hexmask.long.byte 0xA8 24.--31. 1. " CP4_42A ,Color Palette 4_42 Blend Ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP4_42R ,Color Palette 4_42 Red" textline " " hexmask.long.byte 0xA8 10.--15. 1. " CP4_42G ,Color Palette 4_42 Green" hexmask.long.byte 0xA8 2.--7. 1. " CP4_42B ,Color Palette 4_42 Blue" line.long 0xAC "CP4_43R,Color Palette 4 Register 43" hexmask.long.byte 0xAC 24.--31. 1. " CP4_43A ,Color Palette 4_43 Blend Ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP4_43R ,Color Palette 4_43 Red" textline " " hexmask.long.byte 0xAC 10.--15. 1. " CP4_43G ,Color Palette 4_43 Green" hexmask.long.byte 0xAC 2.--7. 1. " CP4_43B ,Color Palette 4_43 Blue" line.long 0xB0 "CP4_44R,Color Palette 4 Register 44" hexmask.long.byte 0xB0 24.--31. 1. " CP4_44A ,Color Palette 4_44 Blend Ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP4_44R ,Color Palette 4_44 Red" textline " " hexmask.long.byte 0xB0 10.--15. 1. " CP4_44G ,Color Palette 4_44 Green" hexmask.long.byte 0xB0 2.--7. 1. " CP4_44B ,Color Palette 4_44 Blue" line.long 0xB4 "CP4_45R,Color Palette 4 Register 45" hexmask.long.byte 0xB4 24.--31. 1. " CP4_45A ,Color Palette 4_45 Blend Ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP4_45R ,Color Palette 4_45 Red" textline " " hexmask.long.byte 0xB4 10.--15. 1. " CP4_45G ,Color Palette 4_45 Green" hexmask.long.byte 0xB4 2.--7. 1. " CP4_45B ,Color Palette 4_45 Blue" line.long 0xB8 "CP4_46R,Color Palette 4 Register 46" hexmask.long.byte 0xB8 24.--31. 1. " CP4_46A ,Color Palette 4_46 Blend Ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP4_46R ,Color Palette 4_46 Red" textline " " hexmask.long.byte 0xB8 10.--15. 1. " CP4_46G ,Color Palette 4_46 Green" hexmask.long.byte 0xB8 2.--7. 1. " CP4_46B ,Color Palette 4_46 Blue" line.long 0xBC "CP4_47R,Color Palette 4 Register 47" hexmask.long.byte 0xBC 24.--31. 1. " CP4_47A ,Color Palette 4_47 Blend Ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP4_47R ,Color Palette 4_47 Red" textline " " hexmask.long.byte 0xBC 10.--15. 1. " CP4_47G ,Color Palette 4_47 Green" hexmask.long.byte 0xBC 2.--7. 1. " CP4_47B ,Color Palette 4_47 Blue" line.long 0xC0 "CP4_48R,Color Palette 4 Register 48" hexmask.long.byte 0xC0 24.--31. 1. " CP4_48A ,Color Palette 4_48 Blend Ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP4_48R ,Color Palette 4_48 Red" textline " " hexmask.long.byte 0xC0 10.--15. 1. " CP4_48G ,Color Palette 4_48 Green" hexmask.long.byte 0xC0 2.--7. 1. " CP4_48B ,Color Palette 4_48 Blue" line.long 0xC4 "CP4_49R,Color Palette 4 Register 49" hexmask.long.byte 0xC4 24.--31. 1. " CP4_49A ,Color Palette 4_49 Blend Ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP4_49R ,Color Palette 4_49 Red" textline " " hexmask.long.byte 0xC4 10.--15. 1. " CP4_49G ,Color Palette 4_49 Green" hexmask.long.byte 0xC4 2.--7. 1. " CP4_49B ,Color Palette 4_49 Blue" line.long 0xC8 "CP4_50R,Color Palette 4 Register 50" hexmask.long.byte 0xC8 24.--31. 1. " CP4_50A ,Color Palette 4_50 Blend Ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP4_50R ,Color Palette 4_50 Red" textline " " hexmask.long.byte 0xC8 10.--15. 1. " CP4_50G ,Color Palette 4_50 Green" hexmask.long.byte 0xC8 2.--7. 1. " CP4_50B ,Color Palette 4_50 Blue" line.long 0xCC "CP4_51R,Color Palette 4 Register 51" hexmask.long.byte 0xCC 24.--31. 1. " CP4_51A ,Color Palette 4_51 Blend Ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP4_51R ,Color Palette 4_51 Red" textline " " hexmask.long.byte 0xCC 10.--15. 1. " CP4_51G ,Color Palette 4_51 Green" hexmask.long.byte 0xCC 2.--7. 1. " CP4_51B ,Color Palette 4_51 Blue" line.long 0xD0 "CP4_52R,Color Palette 4 Register 52" hexmask.long.byte 0xD0 24.--31. 1. " CP4_52A ,Color Palette 4_52 Blend Ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP4_52R ,Color Palette 4_52 Red" textline " " hexmask.long.byte 0xD0 10.--15. 1. " CP4_52G ,Color Palette 4_52 Green" hexmask.long.byte 0xD0 2.--7. 1. " CP4_52B ,Color Palette 4_52 Blue" line.long 0xD4 "CP4_53R,Color Palette 4 Register 53" hexmask.long.byte 0xD4 24.--31. 1. " CP4_53A ,Color Palette 4_53 Blend Ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP4_53R ,Color Palette 4_53 Red" textline " " hexmask.long.byte 0xD4 10.--15. 1. " CP4_53G ,Color Palette 4_53 Green" hexmask.long.byte 0xD4 2.--7. 1. " CP4_53B ,Color Palette 4_53 Blue" line.long 0xD8 "CP4_54R,Color Palette 4 Register 54" hexmask.long.byte 0xD8 24.--31. 1. " CP4_54A ,Color Palette 4_54 Blend Ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP4_54R ,Color Palette 4_54 Red" textline " " hexmask.long.byte 0xD8 10.--15. 1. " CP4_54G ,Color Palette 4_54 Green" hexmask.long.byte 0xD8 2.--7. 1. " CP4_54B ,Color Palette 4_54 Blue" line.long 0xDC "CP4_55R,Color Palette 4 Register 55" hexmask.long.byte 0xDC 24.--31. 1. " CP4_55A ,Color Palette 4_55 Blend Ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP4_55R ,Color Palette 4_55 Red" textline " " hexmask.long.byte 0xDC 10.--15. 1. " CP4_55G ,Color Palette 4_55 Green" hexmask.long.byte 0xDC 2.--7. 1. " CP4_55B ,Color Palette 4_55 Blue" line.long 0xE0 "CP4_56R,Color Palette 4 Register 56" hexmask.long.byte 0xE0 24.--31. 1. " CP4_56A ,Color Palette 4_56 Blend Ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP4_56R ,Color Palette 4_56 Red" textline " " hexmask.long.byte 0xE0 10.--15. 1. " CP4_56G ,Color Palette 4_56 Green" hexmask.long.byte 0xE0 2.--7. 1. " CP4_56B ,Color Palette 4_56 Blue" line.long 0xE4 "CP4_57R,Color Palette 4 Register 57" hexmask.long.byte 0xE4 24.--31. 1. " CP4_57A ,Color Palette 4_57 Blend Ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP4_57R ,Color Palette 4_57 Red" textline " " hexmask.long.byte 0xE4 10.--15. 1. " CP4_57G ,Color Palette 4_57 Green" hexmask.long.byte 0xE4 2.--7. 1. " CP4_57B ,Color Palette 4_57 Blue" line.long 0xE8 "CP4_58R,Color Palette 4 Register 58" hexmask.long.byte 0xE8 24.--31. 1. " CP4_58A ,Color Palette 4_58 Blend Ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP4_58R ,Color Palette 4_58 Red" textline " " hexmask.long.byte 0xE8 10.--15. 1. " CP4_58G ,Color Palette 4_58 Green" hexmask.long.byte 0xE8 2.--7. 1. " CP4_58B ,Color Palette 4_58 Blue" line.long 0xEC "CP4_59R,Color Palette 4 Register 59" hexmask.long.byte 0xEC 24.--31. 1. " CP4_59A ,Color Palette 4_59 Blend Ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP4_59R ,Color Palette 4_59 Red" textline " " hexmask.long.byte 0xEC 10.--15. 1. " CP4_59G ,Color Palette 4_59 Green" hexmask.long.byte 0xEC 2.--7. 1. " CP4_59B ,Color Palette 4_59 Blue" line.long 0xF0 "CP4_60R,Color Palette 4 Register 60" hexmask.long.byte 0xF0 24.--31. 1. " CP4_60A ,Color Palette 4_60 Blend Ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP4_60R ,Color Palette 4_60 Red" textline " " hexmask.long.byte 0xF0 10.--15. 1. " CP4_60G ,Color Palette 4_60 Green" hexmask.long.byte 0xF0 2.--7. 1. " CP4_60B ,Color Palette 4_60 Blue" line.long 0xF4 "CP4_61R,Color Palette 4 Register 61" hexmask.long.byte 0xF4 24.--31. 1. " CP4_61A ,Color Palette 4_61 Blend Ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP4_61R ,Color Palette 4_61 Red" textline " " hexmask.long.byte 0xF4 10.--15. 1. " CP4_61G ,Color Palette 4_61 Green" hexmask.long.byte 0xF4 2.--7. 1. " CP4_61B ,Color Palette 4_61 Blue" line.long 0xF8 "CP4_62R,Color Palette 4 Register 62" hexmask.long.byte 0xF8 24.--31. 1. " CP4_62A ,Color Palette 4_62 Blend Ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP4_62R ,Color Palette 4_62 Red" textline " " hexmask.long.byte 0xF8 10.--15. 1. " CP4_62G ,Color Palette 4_62 Green" hexmask.long.byte 0xF8 2.--7. 1. " CP4_62B ,Color Palette 4_62 Blue" line.long 0xFC "CP4_63R,Color Palette 4 Register 63" hexmask.long.byte 0xFC 24.--31. 1. " CP4_63A ,Color Palette 4_63 Blend Ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP4_63R ,Color Palette 4_63 Red" textline " " hexmask.long.byte 0xFC 10.--15. 1. " CP4_63G ,Color Palette 4_63 Green" hexmask.long.byte 0xFC 2.--7. 1. " CP4_63B ,Color Palette 4_63 Blue" line.long 0x100 "CP4_64R,Color Palette 4 Register 64" hexmask.long.byte 0x100 24.--31. 1. " CP4_64A ,Color Palette 4_64 Blend Ratio" hexmask.long.byte 0x100 18.--23. 1. " CP4_64R ,Color Palette 4_64 Red" textline " " hexmask.long.byte 0x100 10.--15. 1. " CP4_64G ,Color Palette 4_64 Green" hexmask.long.byte 0x100 2.--7. 1. " CP4_64B ,Color Palette 4_64 Blue" line.long 0x104 "CP4_65R,Color Palette 4 Register 65" hexmask.long.byte 0x104 24.--31. 1. " CP4_65A ,Color Palette 4_65 Blend Ratio" hexmask.long.byte 0x104 18.--23. 1. " CP4_65R ,Color Palette 4_65 Red" textline " " hexmask.long.byte 0x104 10.--15. 1. " CP4_65G ,Color Palette 4_65 Green" hexmask.long.byte 0x104 2.--7. 1. " CP4_65B ,Color Palette 4_65 Blue" line.long 0x108 "CP4_66R,Color Palette 4 Register 66" hexmask.long.byte 0x108 24.--31. 1. " CP4_66A ,Color Palette 4_66 Blend Ratio" hexmask.long.byte 0x108 18.--23. 1. " CP4_66R ,Color Palette 4_66 Red" textline " " hexmask.long.byte 0x108 10.--15. 1. " CP4_66G ,Color Palette 4_66 Green" hexmask.long.byte 0x108 2.--7. 1. " CP4_66B ,Color Palette 4_66 Blue" line.long 0x10C "CP4_67R,Color Palette 4 Register 67" hexmask.long.byte 0x10C 24.--31. 1. " CP4_67A ,Color Palette 4_67 Blend Ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP4_67R ,Color Palette 4_67 Red" textline " " hexmask.long.byte 0x10C 10.--15. 1. " CP4_67G ,Color Palette 4_67 Green" hexmask.long.byte 0x10C 2.--7. 1. " CP4_67B ,Color Palette 4_67 Blue" line.long 0x110 "CP4_68R,Color Palette 4 Register 68" hexmask.long.byte 0x110 24.--31. 1. " CP4_68A ,Color Palette 4_68 Blend Ratio" hexmask.long.byte 0x110 18.--23. 1. " CP4_68R ,Color Palette 4_68 Red" textline " " hexmask.long.byte 0x110 10.--15. 1. " CP4_68G ,Color Palette 4_68 Green" hexmask.long.byte 0x110 2.--7. 1. " CP4_68B ,Color Palette 4_68 Blue" line.long 0x114 "CP4_69R,Color Palette 4 Register 69" hexmask.long.byte 0x114 24.--31. 1. " CP4_69A ,Color Palette 4_69 Blend Ratio" hexmask.long.byte 0x114 18.--23. 1. " CP4_69R ,Color Palette 4_69 Red" textline " " hexmask.long.byte 0x114 10.--15. 1. " CP4_69G ,Color Palette 4_69 Green" hexmask.long.byte 0x114 2.--7. 1. " CP4_69B ,Color Palette 4_69 Blue" line.long 0x118 "CP4_70R,Color Palette 4 Register 70" hexmask.long.byte 0x118 24.--31. 1. " CP4_70A ,Color Palette 4_70 Blend Ratio" hexmask.long.byte 0x118 18.--23. 1. " CP4_70R ,Color Palette 4_70 Red" textline " " hexmask.long.byte 0x118 10.--15. 1. " CP4_70G ,Color Palette 4_70 Green" hexmask.long.byte 0x118 2.--7. 1. " CP4_70B ,Color Palette 4_70 Blue" line.long 0x11C "CP4_71R,Color Palette 4 Register 71" hexmask.long.byte 0x11C 24.--31. 1. " CP4_71A ,Color Palette 4_71 Blend Ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP4_71R ,Color Palette 4_71 Red" textline " " hexmask.long.byte 0x11C 10.--15. 1. " CP4_71G ,Color Palette 4_71 Green" hexmask.long.byte 0x11C 2.--7. 1. " CP4_71B ,Color Palette 4_71 Blue" line.long 0x120 "CP4_72R,Color Palette 4 Register 72" hexmask.long.byte 0x120 24.--31. 1. " CP4_72A ,Color Palette 4_72 Blend Ratio" hexmask.long.byte 0x120 18.--23. 1. " CP4_72R ,Color Palette 4_72 Red" textline " " hexmask.long.byte 0x120 10.--15. 1. " CP4_72G ,Color Palette 4_72 Green" hexmask.long.byte 0x120 2.--7. 1. " CP4_72B ,Color Palette 4_72 Blue" line.long 0x124 "CP4_73R,Color Palette 4 Register 73" hexmask.long.byte 0x124 24.--31. 1. " CP4_73A ,Color Palette 4_73 Blend Ratio" hexmask.long.byte 0x124 18.--23. 1. " CP4_73R ,Color Palette 4_73 Red" textline " " hexmask.long.byte 0x124 10.--15. 1. " CP4_73G ,Color Palette 4_73 Green" hexmask.long.byte 0x124 2.--7. 1. " CP4_73B ,Color Palette 4_73 Blue" line.long 0x128 "CP4_74R,Color Palette 4 Register 74" hexmask.long.byte 0x128 24.--31. 1. " CP4_74A ,Color Palette 4_74 Blend Ratio" hexmask.long.byte 0x128 18.--23. 1. " CP4_74R ,Color Palette 4_74 Red" textline " " hexmask.long.byte 0x128 10.--15. 1. " CP4_74G ,Color Palette 4_74 Green" hexmask.long.byte 0x128 2.--7. 1. " CP4_74B ,Color Palette 4_74 Blue" line.long 0x12C "CP4_75R,Color Palette 4 Register 75" hexmask.long.byte 0x12C 24.--31. 1. " CP4_75A ,Color Palette 4_75 Blend Ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP4_75R ,Color Palette 4_75 Red" textline " " hexmask.long.byte 0x12C 10.--15. 1. " CP4_75G ,Color Palette 4_75 Green" hexmask.long.byte 0x12C 2.--7. 1. " CP4_75B ,Color Palette 4_75 Blue" line.long 0x130 "CP4_76R,Color Palette 4 Register 76" hexmask.long.byte 0x130 24.--31. 1. " CP4_76A ,Color Palette 4_76 Blend Ratio" hexmask.long.byte 0x130 18.--23. 1. " CP4_76R ,Color Palette 4_76 Red" textline " " hexmask.long.byte 0x130 10.--15. 1. " CP4_76G ,Color Palette 4_76 Green" hexmask.long.byte 0x130 2.--7. 1. " CP4_76B ,Color Palette 4_76 Blue" line.long 0x134 "CP4_77R,Color Palette 4 Register 77" hexmask.long.byte 0x134 24.--31. 1. " CP4_77A ,Color Palette 4_77 Blend Ratio" hexmask.long.byte 0x134 18.--23. 1. " CP4_77R ,Color Palette 4_77 Red" textline " " hexmask.long.byte 0x134 10.--15. 1. " CP4_77G ,Color Palette 4_77 Green" hexmask.long.byte 0x134 2.--7. 1. " CP4_77B ,Color Palette 4_77 Blue" line.long 0x138 "CP4_78R,Color Palette 4 Register 78" hexmask.long.byte 0x138 24.--31. 1. " CP4_78A ,Color Palette 4_78 Blend Ratio" hexmask.long.byte 0x138 18.--23. 1. " CP4_78R ,Color Palette 4_78 Red" textline " " hexmask.long.byte 0x138 10.--15. 1. " CP4_78G ,Color Palette 4_78 Green" hexmask.long.byte 0x138 2.--7. 1. " CP4_78B ,Color Palette 4_78 Blue" line.long 0x13C "CP4_79R,Color Palette 4 Register 79" hexmask.long.byte 0x13C 24.--31. 1. " CP4_79A ,Color Palette 4_79 Blend Ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP4_79R ,Color Palette 4_79 Red" textline " " hexmask.long.byte 0x13C 10.--15. 1. " CP4_79G ,Color Palette 4_79 Green" hexmask.long.byte 0x13C 2.--7. 1. " CP4_79B ,Color Palette 4_79 Blue" line.long 0x140 "CP4_80R,Color Palette 4 Register 80" hexmask.long.byte 0x140 24.--31. 1. " CP4_80A ,Color Palette 4_80 Blend Ratio" hexmask.long.byte 0x140 18.--23. 1. " CP4_80R ,Color Palette 4_80 Red" textline " " hexmask.long.byte 0x140 10.--15. 1. " CP4_80G ,Color Palette 4_80 Green" hexmask.long.byte 0x140 2.--7. 1. " CP4_80B ,Color Palette 4_80 Blue" line.long 0x144 "CP4_81R,Color Palette 4 Register 81" hexmask.long.byte 0x144 24.--31. 1. " CP4_81A ,Color Palette 4_81 Blend Ratio" hexmask.long.byte 0x144 18.--23. 1. " CP4_81R ,Color Palette 4_81 Red" textline " " hexmask.long.byte 0x144 10.--15. 1. " CP4_81G ,Color Palette 4_81 Green" hexmask.long.byte 0x144 2.--7. 1. " CP4_81B ,Color Palette 4_81 Blue" line.long 0x148 "CP4_82R,Color Palette 4 Register 82" hexmask.long.byte 0x148 24.--31. 1. " CP4_82A ,Color Palette 4_82 Blend Ratio" hexmask.long.byte 0x148 18.--23. 1. " CP4_82R ,Color Palette 4_82 Red" textline " " hexmask.long.byte 0x148 10.--15. 1. " CP4_82G ,Color Palette 4_82 Green" hexmask.long.byte 0x148 2.--7. 1. " CP4_82B ,Color Palette 4_82 Blue" line.long 0x14C "CP4_83R,Color Palette 4 Register 83" hexmask.long.byte 0x14C 24.--31. 1. " CP4_83A ,Color Palette 4_83 Blend Ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP4_83R ,Color Palette 4_83 Red" textline " " hexmask.long.byte 0x14C 10.--15. 1. " CP4_83G ,Color Palette 4_83 Green" hexmask.long.byte 0x14C 2.--7. 1. " CP4_83B ,Color Palette 4_83 Blue" line.long 0x150 "CP4_84R,Color Palette 4 Register 84" hexmask.long.byte 0x150 24.--31. 1. " CP4_84A ,Color Palette 4_84 Blend Ratio" hexmask.long.byte 0x150 18.--23. 1. " CP4_84R ,Color Palette 4_84 Red" textline " " hexmask.long.byte 0x150 10.--15. 1. " CP4_84G ,Color Palette 4_84 Green" hexmask.long.byte 0x150 2.--7. 1. " CP4_84B ,Color Palette 4_84 Blue" line.long 0x154 "CP4_85R,Color Palette 4 Register 85" hexmask.long.byte 0x154 24.--31. 1. " CP4_85A ,Color Palette 4_85 Blend Ratio" hexmask.long.byte 0x154 18.--23. 1. " CP4_85R ,Color Palette 4_85 Red" textline " " hexmask.long.byte 0x154 10.--15. 1. " CP4_85G ,Color Palette 4_85 Green" hexmask.long.byte 0x154 2.--7. 1. " CP4_85B ,Color Palette 4_85 Blue" line.long 0x158 "CP4_86R,Color Palette 4 Register 86" hexmask.long.byte 0x158 24.--31. 1. " CP4_86A ,Color Palette 4_86 Blend Ratio" hexmask.long.byte 0x158 18.--23. 1. " CP4_86R ,Color Palette 4_86 Red" textline " " hexmask.long.byte 0x158 10.--15. 1. " CP4_86G ,Color Palette 4_86 Green" hexmask.long.byte 0x158 2.--7. 1. " CP4_86B ,Color Palette 4_86 Blue" line.long 0x15C "CP4_87R,Color Palette 4 Register 87" hexmask.long.byte 0x15C 24.--31. 1. " CP4_87A ,Color Palette 4_87 Blend Ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP4_87R ,Color Palette 4_87 Red" textline " " hexmask.long.byte 0x15C 10.--15. 1. " CP4_87G ,Color Palette 4_87 Green" hexmask.long.byte 0x15C 2.--7. 1. " CP4_87B ,Color Palette 4_87 Blue" line.long 0x160 "CP4_88R,Color Palette 4 Register 88" hexmask.long.byte 0x160 24.--31. 1. " CP4_88A ,Color Palette 4_88 Blend Ratio" hexmask.long.byte 0x160 18.--23. 1. " CP4_88R ,Color Palette 4_88 Red" textline " " hexmask.long.byte 0x160 10.--15. 1. " CP4_88G ,Color Palette 4_88 Green" hexmask.long.byte 0x160 2.--7. 1. " CP4_88B ,Color Palette 4_88 Blue" line.long 0x164 "CP4_89R,Color Palette 4 Register 89" hexmask.long.byte 0x164 24.--31. 1. " CP4_89A ,Color Palette 4_89 Blend Ratio" hexmask.long.byte 0x164 18.--23. 1. " CP4_89R ,Color Palette 4_89 Red" textline " " hexmask.long.byte 0x164 10.--15. 1. " CP4_89G ,Color Palette 4_89 Green" hexmask.long.byte 0x164 2.--7. 1. " CP4_89B ,Color Palette 4_89 Blue" line.long 0x168 "CP4_90R,Color Palette 4 Register 90" hexmask.long.byte 0x168 24.--31. 1. " CP4_90A ,Color Palette 4_90 Blend Ratio" hexmask.long.byte 0x168 18.--23. 1. " CP4_90R ,Color Palette 4_90 Red" textline " " hexmask.long.byte 0x168 10.--15. 1. " CP4_90G ,Color Palette 4_90 Green" hexmask.long.byte 0x168 2.--7. 1. " CP4_90B ,Color Palette 4_90 Blue" line.long 0x16C "CP4_91R,Color Palette 4 Register 91" hexmask.long.byte 0x16C 24.--31. 1. " CP4_91A ,Color Palette 4_91 Blend Ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP4_91R ,Color Palette 4_91 Red" textline " " hexmask.long.byte 0x16C 10.--15. 1. " CP4_91G ,Color Palette 4_91 Green" hexmask.long.byte 0x16C 2.--7. 1. " CP4_91B ,Color Palette 4_91 Blue" line.long 0x170 "CP4_92R,Color Palette 4 Register 92" hexmask.long.byte 0x170 24.--31. 1. " CP4_92A ,Color Palette 4_92 Blend Ratio" hexmask.long.byte 0x170 18.--23. 1. " CP4_92R ,Color Palette 4_92 Red" textline " " hexmask.long.byte 0x170 10.--15. 1. " CP4_92G ,Color Palette 4_92 Green" hexmask.long.byte 0x170 2.--7. 1. " CP4_92B ,Color Palette 4_92 Blue" line.long 0x174 "CP4_93R,Color Palette 4 Register 93" hexmask.long.byte 0x174 24.--31. 1. " CP4_93A ,Color Palette 4_93 Blend Ratio" hexmask.long.byte 0x174 18.--23. 1. " CP4_93R ,Color Palette 4_93 Red" textline " " hexmask.long.byte 0x174 10.--15. 1. " CP4_93G ,Color Palette 4_93 Green" hexmask.long.byte 0x174 2.--7. 1. " CP4_93B ,Color Palette 4_93 Blue" line.long 0x178 "CP4_94R,Color Palette 4 Register 94" hexmask.long.byte 0x178 24.--31. 1. " CP4_94A ,Color Palette 4_94 Blend Ratio" hexmask.long.byte 0x178 18.--23. 1. " CP4_94R ,Color Palette 4_94 Red" textline " " hexmask.long.byte 0x178 10.--15. 1. " CP4_94G ,Color Palette 4_94 Green" hexmask.long.byte 0x178 2.--7. 1. " CP4_94B ,Color Palette 4_94 Blue" line.long 0x17C "CP4_95R,Color Palette 4 Register 95" hexmask.long.byte 0x17C 24.--31. 1. " CP4_95A ,Color Palette 4_95 Blend Ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP4_95R ,Color Palette 4_95 Red" textline " " hexmask.long.byte 0x17C 10.--15. 1. " CP4_95G ,Color Palette 4_95 Green" hexmask.long.byte 0x17C 2.--7. 1. " CP4_95B ,Color Palette 4_95 Blue" line.long 0x180 "CP4_96R,Color Palette 4 Register 96" hexmask.long.byte 0x180 24.--31. 1. " CP4_96A ,Color Palette 4_96 Blend Ratio" hexmask.long.byte 0x180 18.--23. 1. " CP4_96R ,Color Palette 4_96 Red" textline " " hexmask.long.byte 0x180 10.--15. 1. " CP4_96G ,Color Palette 4_96 Green" hexmask.long.byte 0x180 2.--7. 1. " CP4_96B ,Color Palette 4_96 Blue" line.long 0x184 "CP4_97R,Color Palette 4 Register 97" hexmask.long.byte 0x184 24.--31. 1. " CP4_97A ,Color Palette 4_97 Blend Ratio" hexmask.long.byte 0x184 18.--23. 1. " CP4_97R ,Color Palette 4_97 Red" textline " " hexmask.long.byte 0x184 10.--15. 1. " CP4_97G ,Color Palette 4_97 Green" hexmask.long.byte 0x184 2.--7. 1. " CP4_97B ,Color Palette 4_97 Blue" line.long 0x188 "CP4_98R,Color Palette 4 Register 98" hexmask.long.byte 0x188 24.--31. 1. " CP4_98A ,Color Palette 4_98 Blend Ratio" hexmask.long.byte 0x188 18.--23. 1. " CP4_98R ,Color Palette 4_98 Red" textline " " hexmask.long.byte 0x188 10.--15. 1. " CP4_98G ,Color Palette 4_98 Green" hexmask.long.byte 0x188 2.--7. 1. " CP4_98B ,Color Palette 4_98 Blue" line.long 0x18C "CP4_99R,Color Palette 4 Register 99" hexmask.long.byte 0x18C 24.--31. 1. " CP4_99A ,Color Palette 4_99 Blend Ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP4_99R ,Color Palette 4_99 Red" textline " " hexmask.long.byte 0x18C 10.--15. 1. " CP4_99G ,Color Palette 4_99 Green" hexmask.long.byte 0x18C 2.--7. 1. " CP4_99B ,Color Palette 4_99 Blue" line.long 0x190 "CP4_100R,Color Palette 4 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP4_100A ,Color Palette 4_100 Blend Ratio" hexmask.long.byte 0x190 18.--23. 1. " CP4_100R ,Color Palette 4_100 Red" textline " " hexmask.long.byte 0x190 10.--15. 1. " CP4_100G ,Color Palette 4_100 Green" hexmask.long.byte 0x190 2.--7. 1. " CP4_100B ,Color Palette 4_100 Blue" line.long 0x194 "CP4_101R,Color Palette 4 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP4_101A ,Color Palette 4_101 Blend Ratio" hexmask.long.byte 0x194 18.--23. 1. " CP4_101R ,Color Palette 4_101 Red" textline " " hexmask.long.byte 0x194 10.--15. 1. " CP4_101G ,Color Palette 4_101 Green" hexmask.long.byte 0x194 2.--7. 1. " CP4_101B ,Color Palette 4_101 Blue" line.long 0x198 "CP4_102R,Color Palette 4 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP4_102A ,Color Palette 4_102 Blend Ratio" hexmask.long.byte 0x198 18.--23. 1. " CP4_102R ,Color Palette 4_102 Red" textline " " hexmask.long.byte 0x198 10.--15. 1. " CP4_102G ,Color Palette 4_102 Green" hexmask.long.byte 0x198 2.--7. 1. " CP4_102B ,Color Palette 4_102 Blue" line.long 0x19C "CP4_103R,Color Palette 4 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP4_103A ,Color Palette 4_103 Blend Ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP4_103R ,Color Palette 4_103 Red" textline " " hexmask.long.byte 0x19C 10.--15. 1. " CP4_103G ,Color Palette 4_103 Green" hexmask.long.byte 0x19C 2.--7. 1. " CP4_103B ,Color Palette 4_103 Blue" line.long 0x1A0 "CP4_104R,Color Palette 4 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP4_104A ,Color Palette 4_104 Blend Ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP4_104R ,Color Palette 4_104 Red" textline " " hexmask.long.byte 0x1A0 10.--15. 1. " CP4_104G ,Color Palette 4_104 Green" hexmask.long.byte 0x1A0 2.--7. 1. " CP4_104B ,Color Palette 4_104 Blue" line.long 0x1A4 "CP4_105R,Color Palette 4 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP4_105A ,Color Palette 4_105 Blend Ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP4_105R ,Color Palette 4_105 Red" textline " " hexmask.long.byte 0x1A4 10.--15. 1. " CP4_105G ,Color Palette 4_105 Green" hexmask.long.byte 0x1A4 2.--7. 1. " CP4_105B ,Color Palette 4_105 Blue" line.long 0x1A8 "CP4_106R,Color Palette 4 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP4_106A ,Color Palette 4_106 Blend Ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP4_106R ,Color Palette 4_106 Red" textline " " hexmask.long.byte 0x1A8 10.--15. 1. " CP4_106G ,Color Palette 4_106 Green" hexmask.long.byte 0x1A8 2.--7. 1. " CP4_106B ,Color Palette 4_106 Blue" line.long 0x1AC "CP4_107R,Color Palette 4 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP4_107A ,Color Palette 4_107 Blend Ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP4_107R ,Color Palette 4_107 Red" textline " " hexmask.long.byte 0x1AC 10.--15. 1. " CP4_107G ,Color Palette 4_107 Green" hexmask.long.byte 0x1AC 2.--7. 1. " CP4_107B ,Color Palette 4_107 Blue" line.long 0x1B0 "CP4_108R,Color Palette 4 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP4_108A ,Color Palette 4_108 Blend Ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP4_108R ,Color Palette 4_108 Red" textline " " hexmask.long.byte 0x1B0 10.--15. 1. " CP4_108G ,Color Palette 4_108 Green" hexmask.long.byte 0x1B0 2.--7. 1. " CP4_108B ,Color Palette 4_108 Blue" line.long 0x1B4 "CP4_109R,Color Palette 4 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP4_109A ,Color Palette 4_109 Blend Ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP4_109R ,Color Palette 4_109 Red" textline " " hexmask.long.byte 0x1B4 10.--15. 1. " CP4_109G ,Color Palette 4_109 Green" hexmask.long.byte 0x1B4 2.--7. 1. " CP4_109B ,Color Palette 4_109 Blue" line.long 0x1B8 "CP4_110R,Color Palette 4 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP4_110A ,Color Palette 4_110 Blend Ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP4_110R ,Color Palette 4_110 Red" textline " " hexmask.long.byte 0x1B8 10.--15. 1. " CP4_110G ,Color Palette 4_110 Green" hexmask.long.byte 0x1B8 2.--7. 1. " CP4_110B ,Color Palette 4_110 Blue" line.long 0x1BC "CP4_111R,Color Palette 4 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP4_111A ,Color Palette 4_111 Blend Ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP4_111R ,Color Palette 4_111 Red" textline " " hexmask.long.byte 0x1BC 10.--15. 1. " CP4_111G ,Color Palette 4_111 Green" hexmask.long.byte 0x1BC 2.--7. 1. " CP4_111B ,Color Palette 4_111 Blue" line.long 0x1C0 "CP4_112R,Color Palette 4 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP4_112A ,Color Palette 4_112 Blend Ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP4_112R ,Color Palette 4_112 Red" textline " " hexmask.long.byte 0x1C0 10.--15. 1. " CP4_112G ,Color Palette 4_112 Green" hexmask.long.byte 0x1C0 2.--7. 1. " CP4_112B ,Color Palette 4_112 Blue" line.long 0x1C4 "CP4_113R,Color Palette 4 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP4_113A ,Color Palette 4_113 Blend Ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP4_113R ,Color Palette 4_113 Red" textline " " hexmask.long.byte 0x1C4 10.--15. 1. " CP4_113G ,Color Palette 4_113 Green" hexmask.long.byte 0x1C4 2.--7. 1. " CP4_113B ,Color Palette 4_113 Blue" line.long 0x1C8 "CP4_114R,Color Palette 4 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP4_114A ,Color Palette 4_114 Blend Ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP4_114R ,Color Palette 4_114 Red" textline " " hexmask.long.byte 0x1C8 10.--15. 1. " CP4_114G ,Color Palette 4_114 Green" hexmask.long.byte 0x1C8 2.--7. 1. " CP4_114B ,Color Palette 4_114 Blue" line.long 0x1CC "CP4_115R,Color Palette 4 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP4_115A ,Color Palette 4_115 Blend Ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP4_115R ,Color Palette 4_115 Red" textline " " hexmask.long.byte 0x1CC 10.--15. 1. " CP4_115G ,Color Palette 4_115 Green" hexmask.long.byte 0x1CC 2.--7. 1. " CP4_115B ,Color Palette 4_115 Blue" line.long 0x1D0 "CP4_116R,Color Palette 4 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP4_116A ,Color Palette 4_116 Blend Ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP4_116R ,Color Palette 4_116 Red" textline " " hexmask.long.byte 0x1D0 10.--15. 1. " CP4_116G ,Color Palette 4_116 Green" hexmask.long.byte 0x1D0 2.--7. 1. " CP4_116B ,Color Palette 4_116 Blue" line.long 0x1D4 "CP4_117R,Color Palette 4 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP4_117A ,Color Palette 4_117 Blend Ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP4_117R ,Color Palette 4_117 Red" textline " " hexmask.long.byte 0x1D4 10.--15. 1. " CP4_117G ,Color Palette 4_117 Green" hexmask.long.byte 0x1D4 2.--7. 1. " CP4_117B ,Color Palette 4_117 Blue" line.long 0x1D8 "CP4_118R,Color Palette 4 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP4_118A ,Color Palette 4_118 Blend Ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP4_118R ,Color Palette 4_118 Red" textline " " hexmask.long.byte 0x1D8 10.--15. 1. " CP4_118G ,Color Palette 4_118 Green" hexmask.long.byte 0x1D8 2.--7. 1. " CP4_118B ,Color Palette 4_118 Blue" line.long 0x1DC "CP4_119R,Color Palette 4 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP4_119A ,Color Palette 4_119 Blend Ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP4_119R ,Color Palette 4_119 Red" textline " " hexmask.long.byte 0x1DC 10.--15. 1. " CP4_119G ,Color Palette 4_119 Green" hexmask.long.byte 0x1DC 2.--7. 1. " CP4_119B ,Color Palette 4_119 Blue" line.long 0x1E0 "CP4_120R,Color Palette 4 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP4_120A ,Color Palette 4_120 Blend Ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP4_120R ,Color Palette 4_120 Red" textline " " hexmask.long.byte 0x1E0 10.--15. 1. " CP4_120G ,Color Palette 4_120 Green" hexmask.long.byte 0x1E0 2.--7. 1. " CP4_120B ,Color Palette 4_120 Blue" line.long 0x1E4 "CP4_121R,Color Palette 4 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP4_121A ,Color Palette 4_121 Blend Ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP4_121R ,Color Palette 4_121 Red" textline " " hexmask.long.byte 0x1E4 10.--15. 1. " CP4_121G ,Color Palette 4_121 Green" hexmask.long.byte 0x1E4 2.--7. 1. " CP4_121B ,Color Palette 4_121 Blue" line.long 0x1E8 "CP4_122R,Color Palette 4 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP4_122A ,Color Palette 4_122 Blend Ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP4_122R ,Color Palette 4_122 Red" textline " " hexmask.long.byte 0x1E8 10.--15. 1. " CP4_122G ,Color Palette 4_122 Green" hexmask.long.byte 0x1E8 2.--7. 1. " CP4_122B ,Color Palette 4_122 Blue" line.long 0x1EC "CP4_123R,Color Palette 4 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP4_123A ,Color Palette 4_123 Blend Ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP4_123R ,Color Palette 4_123 Red" textline " " hexmask.long.byte 0x1EC 10.--15. 1. " CP4_123G ,Color Palette 4_123 Green" hexmask.long.byte 0x1EC 2.--7. 1. " CP4_123B ,Color Palette 4_123 Blue" line.long 0x1F0 "CP4_124R,Color Palette 4 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP4_124A ,Color Palette 4_124 Blend Ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP4_124R ,Color Palette 4_124 Red" textline " " hexmask.long.byte 0x1F0 10.--15. 1. " CP4_124G ,Color Palette 4_124 Green" hexmask.long.byte 0x1F0 2.--7. 1. " CP4_124B ,Color Palette 4_124 Blue" line.long 0x1F4 "CP4_125R,Color Palette 4 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP4_125A ,Color Palette 4_125 Blend Ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP4_125R ,Color Palette 4_125 Red" textline " " hexmask.long.byte 0x1F4 10.--15. 1. " CP4_125G ,Color Palette 4_125 Green" hexmask.long.byte 0x1F4 2.--7. 1. " CP4_125B ,Color Palette 4_125 Blue" line.long 0x1F8 "CP4_126R,Color Palette 4 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP4_126A ,Color Palette 4_126 Blend Ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP4_126R ,Color Palette 4_126 Red" textline " " hexmask.long.byte 0x1F8 10.--15. 1. " CP4_126G ,Color Palette 4_126 Green" hexmask.long.byte 0x1F8 2.--7. 1. " CP4_126B ,Color Palette 4_126 Blue" line.long 0x1FC "CP4_127R,Color Palette 4 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP4_127A ,Color Palette 4_127 Blend Ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP4_127R ,Color Palette 4_127 Red" textline " " hexmask.long.byte 0x1FC 10.--15. 1. " CP4_127G ,Color Palette 4_127 Green" hexmask.long.byte 0x1FC 2.--7. 1. " CP4_127B ,Color Palette 4_127 Blue" line.long 0x200 "CP4_128R,Color Palette 4 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP4_128A ,Color Palette 4_128 Blend Ratio" hexmask.long.byte 0x200 18.--23. 1. " CP4_128R ,Color Palette 4_128 Red" textline " " hexmask.long.byte 0x200 10.--15. 1. " CP4_128G ,Color Palette 4_128 Green" hexmask.long.byte 0x200 2.--7. 1. " CP4_128B ,Color Palette 4_128 Blue" line.long 0x204 "CP4_129R,Color Palette 4 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP4_129A ,Color Palette 4_129 Blend Ratio" hexmask.long.byte 0x204 18.--23. 1. " CP4_129R ,Color Palette 4_129 Red" textline " " hexmask.long.byte 0x204 10.--15. 1. " CP4_129G ,Color Palette 4_129 Green" hexmask.long.byte 0x204 2.--7. 1. " CP4_129B ,Color Palette 4_129 Blue" line.long 0x208 "CP4_130R,Color Palette 4 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP4_130A ,Color Palette 4_130 Blend Ratio" hexmask.long.byte 0x208 18.--23. 1. " CP4_130R ,Color Palette 4_130 Red" textline " " hexmask.long.byte 0x208 10.--15. 1. " CP4_130G ,Color Palette 4_130 Green" hexmask.long.byte 0x208 2.--7. 1. " CP4_130B ,Color Palette 4_130 Blue" line.long 0x20C "CP4_131R,Color Palette 4 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP4_131A ,Color Palette 4_131 Blend Ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP4_131R ,Color Palette 4_131 Red" textline " " hexmask.long.byte 0x20C 10.--15. 1. " CP4_131G ,Color Palette 4_131 Green" hexmask.long.byte 0x20C 2.--7. 1. " CP4_131B ,Color Palette 4_131 Blue" line.long 0x210 "CP4_132R,Color Palette 4 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP4_132A ,Color Palette 4_132 Blend Ratio" hexmask.long.byte 0x210 18.--23. 1. " CP4_132R ,Color Palette 4_132 Red" textline " " hexmask.long.byte 0x210 10.--15. 1. " CP4_132G ,Color Palette 4_132 Green" hexmask.long.byte 0x210 2.--7. 1. " CP4_132B ,Color Palette 4_132 Blue" line.long 0x214 "CP4_133R,Color Palette 4 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP4_133A ,Color Palette 4_133 Blend Ratio" hexmask.long.byte 0x214 18.--23. 1. " CP4_133R ,Color Palette 4_133 Red" textline " " hexmask.long.byte 0x214 10.--15. 1. " CP4_133G ,Color Palette 4_133 Green" hexmask.long.byte 0x214 2.--7. 1. " CP4_133B ,Color Palette 4_133 Blue" line.long 0x218 "CP4_134R,Color Palette 4 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP4_134A ,Color Palette 4_134 Blend Ratio" hexmask.long.byte 0x218 18.--23. 1. " CP4_134R ,Color Palette 4_134 Red" textline " " hexmask.long.byte 0x218 10.--15. 1. " CP4_134G ,Color Palette 4_134 Green" hexmask.long.byte 0x218 2.--7. 1. " CP4_134B ,Color Palette 4_134 Blue" line.long 0x21C "CP4_135R,Color Palette 4 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP4_135A ,Color Palette 4_135 Blend Ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP4_135R ,Color Palette 4_135 Red" textline " " hexmask.long.byte 0x21C 10.--15. 1. " CP4_135G ,Color Palette 4_135 Green" hexmask.long.byte 0x21C 2.--7. 1. " CP4_135B ,Color Palette 4_135 Blue" line.long 0x220 "CP4_136R,Color Palette 4 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP4_136A ,Color Palette 4_136 Blend Ratio" hexmask.long.byte 0x220 18.--23. 1. " CP4_136R ,Color Palette 4_136 Red" textline " " hexmask.long.byte 0x220 10.--15. 1. " CP4_136G ,Color Palette 4_136 Green" hexmask.long.byte 0x220 2.--7. 1. " CP4_136B ,Color Palette 4_136 Blue" line.long 0x224 "CP4_137R,Color Palette 4 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP4_137A ,Color Palette 4_137 Blend Ratio" hexmask.long.byte 0x224 18.--23. 1. " CP4_137R ,Color Palette 4_137 Red" textline " " hexmask.long.byte 0x224 10.--15. 1. " CP4_137G ,Color Palette 4_137 Green" hexmask.long.byte 0x224 2.--7. 1. " CP4_137B ,Color Palette 4_137 Blue" line.long 0x228 "CP4_138R,Color Palette 4 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP4_138A ,Color Palette 4_138 Blend Ratio" hexmask.long.byte 0x228 18.--23. 1. " CP4_138R ,Color Palette 4_138 Red" textline " " hexmask.long.byte 0x228 10.--15. 1. " CP4_138G ,Color Palette 4_138 Green" hexmask.long.byte 0x228 2.--7. 1. " CP4_138B ,Color Palette 4_138 Blue" line.long 0x22C "CP4_139R,Color Palette 4 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP4_139A ,Color Palette 4_139 Blend Ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP4_139R ,Color Palette 4_139 Red" textline " " hexmask.long.byte 0x22C 10.--15. 1. " CP4_139G ,Color Palette 4_139 Green" hexmask.long.byte 0x22C 2.--7. 1. " CP4_139B ,Color Palette 4_139 Blue" line.long 0x230 "CP4_140R,Color Palette 4 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP4_140A ,Color Palette 4_140 Blend Ratio" hexmask.long.byte 0x230 18.--23. 1. " CP4_140R ,Color Palette 4_140 Red" textline " " hexmask.long.byte 0x230 10.--15. 1. " CP4_140G ,Color Palette 4_140 Green" hexmask.long.byte 0x230 2.--7. 1. " CP4_140B ,Color Palette 4_140 Blue" line.long 0x234 "CP4_141R,Color Palette 4 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP4_141A ,Color Palette 4_141 Blend Ratio" hexmask.long.byte 0x234 18.--23. 1. " CP4_141R ,Color Palette 4_141 Red" textline " " hexmask.long.byte 0x234 10.--15. 1. " CP4_141G ,Color Palette 4_141 Green" hexmask.long.byte 0x234 2.--7. 1. " CP4_141B ,Color Palette 4_141 Blue" line.long 0x238 "CP4_142R,Color Palette 4 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP4_142A ,Color Palette 4_142 Blend Ratio" hexmask.long.byte 0x238 18.--23. 1. " CP4_142R ,Color Palette 4_142 Red" textline " " hexmask.long.byte 0x238 10.--15. 1. " CP4_142G ,Color Palette 4_142 Green" hexmask.long.byte 0x238 2.--7. 1. " CP4_142B ,Color Palette 4_142 Blue" line.long 0x23C "CP4_143R,Color Palette 4 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP4_143A ,Color Palette 4_143 Blend Ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP4_143R ,Color Palette 4_143 Red" textline " " hexmask.long.byte 0x23C 10.--15. 1. " CP4_143G ,Color Palette 4_143 Green" hexmask.long.byte 0x23C 2.--7. 1. " CP4_143B ,Color Palette 4_143 Blue" line.long 0x240 "CP4_144R,Color Palette 4 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP4_144A ,Color Palette 4_144 Blend Ratio" hexmask.long.byte 0x240 18.--23. 1. " CP4_144R ,Color Palette 4_144 Red" textline " " hexmask.long.byte 0x240 10.--15. 1. " CP4_144G ,Color Palette 4_144 Green" hexmask.long.byte 0x240 2.--7. 1. " CP4_144B ,Color Palette 4_144 Blue" line.long 0x244 "CP4_145R,Color Palette 4 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP4_145A ,Color Palette 4_145 Blend Ratio" hexmask.long.byte 0x244 18.--23. 1. " CP4_145R ,Color Palette 4_145 Red" textline " " hexmask.long.byte 0x244 10.--15. 1. " CP4_145G ,Color Palette 4_145 Green" hexmask.long.byte 0x244 2.--7. 1. " CP4_145B ,Color Palette 4_145 Blue" line.long 0x248 "CP4_146R,Color Palette 4 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP4_146A ,Color Palette 4_146 Blend Ratio" hexmask.long.byte 0x248 18.--23. 1. " CP4_146R ,Color Palette 4_146 Red" textline " " hexmask.long.byte 0x248 10.--15. 1. " CP4_146G ,Color Palette 4_146 Green" hexmask.long.byte 0x248 2.--7. 1. " CP4_146B ,Color Palette 4_146 Blue" line.long 0x24C "CP4_147R,Color Palette 4 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP4_147A ,Color Palette 4_147 Blend Ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP4_147R ,Color Palette 4_147 Red" textline " " hexmask.long.byte 0x24C 10.--15. 1. " CP4_147G ,Color Palette 4_147 Green" hexmask.long.byte 0x24C 2.--7. 1. " CP4_147B ,Color Palette 4_147 Blue" line.long 0x250 "CP4_148R,Color Palette 4 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP4_148A ,Color Palette 4_148 Blend Ratio" hexmask.long.byte 0x250 18.--23. 1. " CP4_148R ,Color Palette 4_148 Red" textline " " hexmask.long.byte 0x250 10.--15. 1. " CP4_148G ,Color Palette 4_148 Green" hexmask.long.byte 0x250 2.--7. 1. " CP4_148B ,Color Palette 4_148 Blue" line.long 0x254 "CP4_149R,Color Palette 4 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP4_149A ,Color Palette 4_149 Blend Ratio" hexmask.long.byte 0x254 18.--23. 1. " CP4_149R ,Color Palette 4_149 Red" textline " " hexmask.long.byte 0x254 10.--15. 1. " CP4_149G ,Color Palette 4_149 Green" hexmask.long.byte 0x254 2.--7. 1. " CP4_149B ,Color Palette 4_149 Blue" line.long 0x258 "CP4_150R,Color Palette 4 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP4_150A ,Color Palette 4_150 Blend Ratio" hexmask.long.byte 0x258 18.--23. 1. " CP4_150R ,Color Palette 4_150 Red" textline " " hexmask.long.byte 0x258 10.--15. 1. " CP4_150G ,Color Palette 4_150 Green" hexmask.long.byte 0x258 2.--7. 1. " CP4_150B ,Color Palette 4_150 Blue" line.long 0x25C "CP4_151R,Color Palette 4 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP4_151A ,Color Palette 4_151 Blend Ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP4_151R ,Color Palette 4_151 Red" textline " " hexmask.long.byte 0x25C 10.--15. 1. " CP4_151G ,Color Palette 4_151 Green" hexmask.long.byte 0x25C 2.--7. 1. " CP4_151B ,Color Palette 4_151 Blue" line.long 0x260 "CP4_152R,Color Palette 4 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP4_152A ,Color Palette 4_152 Blend Ratio" hexmask.long.byte 0x260 18.--23. 1. " CP4_152R ,Color Palette 4_152 Red" textline " " hexmask.long.byte 0x260 10.--15. 1. " CP4_152G ,Color Palette 4_152 Green" hexmask.long.byte 0x260 2.--7. 1. " CP4_152B ,Color Palette 4_152 Blue" line.long 0x264 "CP4_153R,Color Palette 4 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP4_153A ,Color Palette 4_153 Blend Ratio" hexmask.long.byte 0x264 18.--23. 1. " CP4_153R ,Color Palette 4_153 Red" textline " " hexmask.long.byte 0x264 10.--15. 1. " CP4_153G ,Color Palette 4_153 Green" hexmask.long.byte 0x264 2.--7. 1. " CP4_153B ,Color Palette 4_153 Blue" line.long 0x268 "CP4_154R,Color Palette 4 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP4_154A ,Color Palette 4_154 Blend Ratio" hexmask.long.byte 0x268 18.--23. 1. " CP4_154R ,Color Palette 4_154 Red" textline " " hexmask.long.byte 0x268 10.--15. 1. " CP4_154G ,Color Palette 4_154 Green" hexmask.long.byte 0x268 2.--7. 1. " CP4_154B ,Color Palette 4_154 Blue" line.long 0x26C "CP4_155R,Color Palette 4 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP4_155A ,Color Palette 4_155 Blend Ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP4_155R ,Color Palette 4_155 Red" textline " " hexmask.long.byte 0x26C 10.--15. 1. " CP4_155G ,Color Palette 4_155 Green" hexmask.long.byte 0x26C 2.--7. 1. " CP4_155B ,Color Palette 4_155 Blue" line.long 0x270 "CP4_156R,Color Palette 4 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP4_156A ,Color Palette 4_156 Blend Ratio" hexmask.long.byte 0x270 18.--23. 1. " CP4_156R ,Color Palette 4_156 Red" textline " " hexmask.long.byte 0x270 10.--15. 1. " CP4_156G ,Color Palette 4_156 Green" hexmask.long.byte 0x270 2.--7. 1. " CP4_156B ,Color Palette 4_156 Blue" line.long 0x274 "CP4_157R,Color Palette 4 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP4_157A ,Color Palette 4_157 Blend Ratio" hexmask.long.byte 0x274 18.--23. 1. " CP4_157R ,Color Palette 4_157 Red" textline " " hexmask.long.byte 0x274 10.--15. 1. " CP4_157G ,Color Palette 4_157 Green" hexmask.long.byte 0x274 2.--7. 1. " CP4_157B ,Color Palette 4_157 Blue" line.long 0x278 "CP4_158R,Color Palette 4 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP4_158A ,Color Palette 4_158 Blend Ratio" hexmask.long.byte 0x278 18.--23. 1. " CP4_158R ,Color Palette 4_158 Red" textline " " hexmask.long.byte 0x278 10.--15. 1. " CP4_158G ,Color Palette 4_158 Green" hexmask.long.byte 0x278 2.--7. 1. " CP4_158B ,Color Palette 4_158 Blue" line.long 0x27C "CP4_159R,Color Palette 4 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP4_159A ,Color Palette 4_159 Blend Ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP4_159R ,Color Palette 4_159 Red" textline " " hexmask.long.byte 0x27C 10.--15. 1. " CP4_159G ,Color Palette 4_159 Green" hexmask.long.byte 0x27C 2.--7. 1. " CP4_159B ,Color Palette 4_159 Blue" line.long 0x280 "CP4_160R,Color Palette 4 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP4_160A ,Color Palette 4_160 Blend Ratio" hexmask.long.byte 0x280 18.--23. 1. " CP4_160R ,Color Palette 4_160 Red" textline " " hexmask.long.byte 0x280 10.--15. 1. " CP4_160G ,Color Palette 4_160 Green" hexmask.long.byte 0x280 2.--7. 1. " CP4_160B ,Color Palette 4_160 Blue" line.long 0x284 "CP4_161R,Color Palette 4 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP4_161A ,Color Palette 4_161 Blend Ratio" hexmask.long.byte 0x284 18.--23. 1. " CP4_161R ,Color Palette 4_161 Red" textline " " hexmask.long.byte 0x284 10.--15. 1. " CP4_161G ,Color Palette 4_161 Green" hexmask.long.byte 0x284 2.--7. 1. " CP4_161B ,Color Palette 4_161 Blue" line.long 0x288 "CP4_162R,Color Palette 4 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP4_162A ,Color Palette 4_162 Blend Ratio" hexmask.long.byte 0x288 18.--23. 1. " CP4_162R ,Color Palette 4_162 Red" textline " " hexmask.long.byte 0x288 10.--15. 1. " CP4_162G ,Color Palette 4_162 Green" hexmask.long.byte 0x288 2.--7. 1. " CP4_162B ,Color Palette 4_162 Blue" line.long 0x28C "CP4_163R,Color Palette 4 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP4_163A ,Color Palette 4_163 Blend Ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP4_163R ,Color Palette 4_163 Red" textline " " hexmask.long.byte 0x28C 10.--15. 1. " CP4_163G ,Color Palette 4_163 Green" hexmask.long.byte 0x28C 2.--7. 1. " CP4_163B ,Color Palette 4_163 Blue" line.long 0x290 "CP4_164R,Color Palette 4 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP4_164A ,Color Palette 4_164 Blend Ratio" hexmask.long.byte 0x290 18.--23. 1. " CP4_164R ,Color Palette 4_164 Red" textline " " hexmask.long.byte 0x290 10.--15. 1. " CP4_164G ,Color Palette 4_164 Green" hexmask.long.byte 0x290 2.--7. 1. " CP4_164B ,Color Palette 4_164 Blue" line.long 0x294 "CP4_165R,Color Palette 4 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP4_165A ,Color Palette 4_165 Blend Ratio" hexmask.long.byte 0x294 18.--23. 1. " CP4_165R ,Color Palette 4_165 Red" textline " " hexmask.long.byte 0x294 10.--15. 1. " CP4_165G ,Color Palette 4_165 Green" hexmask.long.byte 0x294 2.--7. 1. " CP4_165B ,Color Palette 4_165 Blue" line.long 0x298 "CP4_166R,Color Palette 4 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP4_166A ,Color Palette 4_166 Blend Ratio" hexmask.long.byte 0x298 18.--23. 1. " CP4_166R ,Color Palette 4_166 Red" textline " " hexmask.long.byte 0x298 10.--15. 1. " CP4_166G ,Color Palette 4_166 Green" hexmask.long.byte 0x298 2.--7. 1. " CP4_166B ,Color Palette 4_166 Blue" line.long 0x29C "CP4_167R,Color Palette 4 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP4_167A ,Color Palette 4_167 Blend Ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP4_167R ,Color Palette 4_167 Red" textline " " hexmask.long.byte 0x29C 10.--15. 1. " CP4_167G ,Color Palette 4_167 Green" hexmask.long.byte 0x29C 2.--7. 1. " CP4_167B ,Color Palette 4_167 Blue" line.long 0x2A0 "CP4_168R,Color Palette 4 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP4_168A ,Color Palette 4_168 Blend Ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP4_168R ,Color Palette 4_168 Red" textline " " hexmask.long.byte 0x2A0 10.--15. 1. " CP4_168G ,Color Palette 4_168 Green" hexmask.long.byte 0x2A0 2.--7. 1. " CP4_168B ,Color Palette 4_168 Blue" line.long 0x2A4 "CP4_169R,Color Palette 4 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP4_169A ,Color Palette 4_169 Blend Ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP4_169R ,Color Palette 4_169 Red" textline " " hexmask.long.byte 0x2A4 10.--15. 1. " CP4_169G ,Color Palette 4_169 Green" hexmask.long.byte 0x2A4 2.--7. 1. " CP4_169B ,Color Palette 4_169 Blue" line.long 0x2A8 "CP4_170R,Color Palette 4 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP4_170A ,Color Palette 4_170 Blend Ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP4_170R ,Color Palette 4_170 Red" textline " " hexmask.long.byte 0x2A8 10.--15. 1. " CP4_170G ,Color Palette 4_170 Green" hexmask.long.byte 0x2A8 2.--7. 1. " CP4_170B ,Color Palette 4_170 Blue" line.long 0x2AC "CP4_171R,Color Palette 4 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP4_171A ,Color Palette 4_171 Blend Ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP4_171R ,Color Palette 4_171 Red" textline " " hexmask.long.byte 0x2AC 10.--15. 1. " CP4_171G ,Color Palette 4_171 Green" hexmask.long.byte 0x2AC 2.--7. 1. " CP4_171B ,Color Palette 4_171 Blue" line.long 0x2B0 "CP4_172R,Color Palette 4 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP4_172A ,Color Palette 4_172 Blend Ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP4_172R ,Color Palette 4_172 Red" textline " " hexmask.long.byte 0x2B0 10.--15. 1. " CP4_172G ,Color Palette 4_172 Green" hexmask.long.byte 0x2B0 2.--7. 1. " CP4_172B ,Color Palette 4_172 Blue" line.long 0x2B4 "CP4_173R,Color Palette 4 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP4_173A ,Color Palette 4_173 Blend Ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP4_173R ,Color Palette 4_173 Red" textline " " hexmask.long.byte 0x2B4 10.--15. 1. " CP4_173G ,Color Palette 4_173 Green" hexmask.long.byte 0x2B4 2.--7. 1. " CP4_173B ,Color Palette 4_173 Blue" line.long 0x2B8 "CP4_174R,Color Palette 4 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP4_174A ,Color Palette 4_174 Blend Ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP4_174R ,Color Palette 4_174 Red" textline " " hexmask.long.byte 0x2B8 10.--15. 1. " CP4_174G ,Color Palette 4_174 Green" hexmask.long.byte 0x2B8 2.--7. 1. " CP4_174B ,Color Palette 4_174 Blue" line.long 0x2BC "CP4_175R,Color Palette 4 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP4_175A ,Color Palette 4_175 Blend Ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP4_175R ,Color Palette 4_175 Red" textline " " hexmask.long.byte 0x2BC 10.--15. 1. " CP4_175G ,Color Palette 4_175 Green" hexmask.long.byte 0x2BC 2.--7. 1. " CP4_175B ,Color Palette 4_175 Blue" line.long 0x2C0 "CP4_176R,Color Palette 4 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP4_176A ,Color Palette 4_176 Blend Ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP4_176R ,Color Palette 4_176 Red" textline " " hexmask.long.byte 0x2C0 10.--15. 1. " CP4_176G ,Color Palette 4_176 Green" hexmask.long.byte 0x2C0 2.--7. 1. " CP4_176B ,Color Palette 4_176 Blue" line.long 0x2C4 "CP4_177R,Color Palette 4 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP4_177A ,Color Palette 4_177 Blend Ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP4_177R ,Color Palette 4_177 Red" textline " " hexmask.long.byte 0x2C4 10.--15. 1. " CP4_177G ,Color Palette 4_177 Green" hexmask.long.byte 0x2C4 2.--7. 1. " CP4_177B ,Color Palette 4_177 Blue" line.long 0x2C8 "CP4_178R,Color Palette 4 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP4_178A ,Color Palette 4_178 Blend Ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP4_178R ,Color Palette 4_178 Red" textline " " hexmask.long.byte 0x2C8 10.--15. 1. " CP4_178G ,Color Palette 4_178 Green" hexmask.long.byte 0x2C8 2.--7. 1. " CP4_178B ,Color Palette 4_178 Blue" line.long 0x2CC "CP4_179R,Color Palette 4 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP4_179A ,Color Palette 4_179 Blend Ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP4_179R ,Color Palette 4_179 Red" textline " " hexmask.long.byte 0x2CC 10.--15. 1. " CP4_179G ,Color Palette 4_179 Green" hexmask.long.byte 0x2CC 2.--7. 1. " CP4_179B ,Color Palette 4_179 Blue" line.long 0x2D0 "CP4_180R,Color Palette 4 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP4_180A ,Color Palette 4_180 Blend Ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP4_180R ,Color Palette 4_180 Red" textline " " hexmask.long.byte 0x2D0 10.--15. 1. " CP4_180G ,Color Palette 4_180 Green" hexmask.long.byte 0x2D0 2.--7. 1. " CP4_180B ,Color Palette 4_180 Blue" line.long 0x2D4 "CP4_181R,Color Palette 4 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP4_181A ,Color Palette 4_181 Blend Ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP4_181R ,Color Palette 4_181 Red" textline " " hexmask.long.byte 0x2D4 10.--15. 1. " CP4_181G ,Color Palette 4_181 Green" hexmask.long.byte 0x2D4 2.--7. 1. " CP4_181B ,Color Palette 4_181 Blue" line.long 0x2D8 "CP4_182R,Color Palette 4 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP4_182A ,Color Palette 4_182 Blend Ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP4_182R ,Color Palette 4_182 Red" textline " " hexmask.long.byte 0x2D8 10.--15. 1. " CP4_182G ,Color Palette 4_182 Green" hexmask.long.byte 0x2D8 2.--7. 1. " CP4_182B ,Color Palette 4_182 Blue" line.long 0x2DC "CP4_183R,Color Palette 4 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP4_183A ,Color Palette 4_183 Blend Ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP4_183R ,Color Palette 4_183 Red" textline " " hexmask.long.byte 0x2DC 10.--15. 1. " CP4_183G ,Color Palette 4_183 Green" hexmask.long.byte 0x2DC 2.--7. 1. " CP4_183B ,Color Palette 4_183 Blue" line.long 0x2E0 "CP4_184R,Color Palette 4 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP4_184A ,Color Palette 4_184 Blend Ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP4_184R ,Color Palette 4_184 Red" textline " " hexmask.long.byte 0x2E0 10.--15. 1. " CP4_184G ,Color Palette 4_184 Green" hexmask.long.byte 0x2E0 2.--7. 1. " CP4_184B ,Color Palette 4_184 Blue" line.long 0x2E4 "CP4_185R,Color Palette 4 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP4_185A ,Color Palette 4_185 Blend Ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP4_185R ,Color Palette 4_185 Red" textline " " hexmask.long.byte 0x2E4 10.--15. 1. " CP4_185G ,Color Palette 4_185 Green" hexmask.long.byte 0x2E4 2.--7. 1. " CP4_185B ,Color Palette 4_185 Blue" line.long 0x2E8 "CP4_186R,Color Palette 4 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP4_186A ,Color Palette 4_186 Blend Ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP4_186R ,Color Palette 4_186 Red" textline " " hexmask.long.byte 0x2E8 10.--15. 1. " CP4_186G ,Color Palette 4_186 Green" hexmask.long.byte 0x2E8 2.--7. 1. " CP4_186B ,Color Palette 4_186 Blue" line.long 0x2EC "CP4_187R,Color Palette 4 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP4_187A ,Color Palette 4_187 Blend Ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP4_187R ,Color Palette 4_187 Red" textline " " hexmask.long.byte 0x2EC 10.--15. 1. " CP4_187G ,Color Palette 4_187 Green" hexmask.long.byte 0x2EC 2.--7. 1. " CP4_187B ,Color Palette 4_187 Blue" line.long 0x2F0 "CP4_188R,Color Palette 4 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP4_188A ,Color Palette 4_188 Blend Ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP4_188R ,Color Palette 4_188 Red" textline " " hexmask.long.byte 0x2F0 10.--15. 1. " CP4_188G ,Color Palette 4_188 Green" hexmask.long.byte 0x2F0 2.--7. 1. " CP4_188B ,Color Palette 4_188 Blue" line.long 0x2F4 "CP4_189R,Color Palette 4 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP4_189A ,Color Palette 4_189 Blend Ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP4_189R ,Color Palette 4_189 Red" textline " " hexmask.long.byte 0x2F4 10.--15. 1. " CP4_189G ,Color Palette 4_189 Green" hexmask.long.byte 0x2F4 2.--7. 1. " CP4_189B ,Color Palette 4_189 Blue" line.long 0x2F8 "CP4_190R,Color Palette 4 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP4_190A ,Color Palette 4_190 Blend Ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP4_190R ,Color Palette 4_190 Red" textline " " hexmask.long.byte 0x2F8 10.--15. 1. " CP4_190G ,Color Palette 4_190 Green" hexmask.long.byte 0x2F8 2.--7. 1. " CP4_190B ,Color Palette 4_190 Blue" line.long 0x2FC "CP4_191R,Color Palette 4 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP4_191A ,Color Palette 4_191 Blend Ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP4_191R ,Color Palette 4_191 Red" textline " " hexmask.long.byte 0x2FC 10.--15. 1. " CP4_191G ,Color Palette 4_191 Green" hexmask.long.byte 0x2FC 2.--7. 1. " CP4_191B ,Color Palette 4_191 Blue" line.long 0x300 "CP4_192R,Color Palette 4 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP4_192A ,Color Palette 4_192 Blend Ratio" hexmask.long.byte 0x300 18.--23. 1. " CP4_192R ,Color Palette 4_192 Red" textline " " hexmask.long.byte 0x300 10.--15. 1. " CP4_192G ,Color Palette 4_192 Green" hexmask.long.byte 0x300 2.--7. 1. " CP4_192B ,Color Palette 4_192 Blue" line.long 0x304 "CP4_193R,Color Palette 4 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP4_193A ,Color Palette 4_193 Blend Ratio" hexmask.long.byte 0x304 18.--23. 1. " CP4_193R ,Color Palette 4_193 Red" textline " " hexmask.long.byte 0x304 10.--15. 1. " CP4_193G ,Color Palette 4_193 Green" hexmask.long.byte 0x304 2.--7. 1. " CP4_193B ,Color Palette 4_193 Blue" line.long 0x308 "CP4_194R,Color Palette 4 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP4_194A ,Color Palette 4_194 Blend Ratio" hexmask.long.byte 0x308 18.--23. 1. " CP4_194R ,Color Palette 4_194 Red" textline " " hexmask.long.byte 0x308 10.--15. 1. " CP4_194G ,Color Palette 4_194 Green" hexmask.long.byte 0x308 2.--7. 1. " CP4_194B ,Color Palette 4_194 Blue" line.long 0x30C "CP4_195R,Color Palette 4 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP4_195A ,Color Palette 4_195 Blend Ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP4_195R ,Color Palette 4_195 Red" textline " " hexmask.long.byte 0x30C 10.--15. 1. " CP4_195G ,Color Palette 4_195 Green" hexmask.long.byte 0x30C 2.--7. 1. " CP4_195B ,Color Palette 4_195 Blue" line.long 0x310 "CP4_196R,Color Palette 4 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP4_196A ,Color Palette 4_196 Blend Ratio" hexmask.long.byte 0x310 18.--23. 1. " CP4_196R ,Color Palette 4_196 Red" textline " " hexmask.long.byte 0x310 10.--15. 1. " CP4_196G ,Color Palette 4_196 Green" hexmask.long.byte 0x310 2.--7. 1. " CP4_196B ,Color Palette 4_196 Blue" line.long 0x314 "CP4_197R,Color Palette 4 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP4_197A ,Color Palette 4_197 Blend Ratio" hexmask.long.byte 0x314 18.--23. 1. " CP4_197R ,Color Palette 4_197 Red" textline " " hexmask.long.byte 0x314 10.--15. 1. " CP4_197G ,Color Palette 4_197 Green" hexmask.long.byte 0x314 2.--7. 1. " CP4_197B ,Color Palette 4_197 Blue" line.long 0x318 "CP4_198R,Color Palette 4 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP4_198A ,Color Palette 4_198 Blend Ratio" hexmask.long.byte 0x318 18.--23. 1. " CP4_198R ,Color Palette 4_198 Red" textline " " hexmask.long.byte 0x318 10.--15. 1. " CP4_198G ,Color Palette 4_198 Green" hexmask.long.byte 0x318 2.--7. 1. " CP4_198B ,Color Palette 4_198 Blue" line.long 0x31C "CP4_199R,Color Palette 4 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP4_199A ,Color Palette 4_199 Blend Ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP4_199R ,Color Palette 4_199 Red" textline " " hexmask.long.byte 0x31C 10.--15. 1. " CP4_199G ,Color Palette 4_199 Green" hexmask.long.byte 0x31C 2.--7. 1. " CP4_199B ,Color Palette 4_199 Blue" line.long 0x320 "CP4_200R,Color Palette 4 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP4_200A ,Color Palette 4_200 Blend Ratio" hexmask.long.byte 0x320 18.--23. 1. " CP4_200R ,Color Palette 4_200 Red" textline " " hexmask.long.byte 0x320 10.--15. 1. " CP4_200G ,Color Palette 4_200 Green" hexmask.long.byte 0x320 2.--7. 1. " CP4_200B ,Color Palette 4_200 Blue" line.long 0x324 "CP4_201R,Color Palette 4 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP4_201A ,Color Palette 4_201 Blend Ratio" hexmask.long.byte 0x324 18.--23. 1. " CP4_201R ,Color Palette 4_201 Red" textline " " hexmask.long.byte 0x324 10.--15. 1. " CP4_201G ,Color Palette 4_201 Green" hexmask.long.byte 0x324 2.--7. 1. " CP4_201B ,Color Palette 4_201 Blue" line.long 0x328 "CP4_202R,Color Palette 4 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP4_202A ,Color Palette 4_202 Blend Ratio" hexmask.long.byte 0x328 18.--23. 1. " CP4_202R ,Color Palette 4_202 Red" textline " " hexmask.long.byte 0x328 10.--15. 1. " CP4_202G ,Color Palette 4_202 Green" hexmask.long.byte 0x328 2.--7. 1. " CP4_202B ,Color Palette 4_202 Blue" line.long 0x32C "CP4_203R,Color Palette 4 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP4_203A ,Color Palette 4_203 Blend Ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP4_203R ,Color Palette 4_203 Red" textline " " hexmask.long.byte 0x32C 10.--15. 1. " CP4_203G ,Color Palette 4_203 Green" hexmask.long.byte 0x32C 2.--7. 1. " CP4_203B ,Color Palette 4_203 Blue" line.long 0x330 "CP4_204R,Color Palette 4 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP4_204A ,Color Palette 4_204 Blend Ratio" hexmask.long.byte 0x330 18.--23. 1. " CP4_204R ,Color Palette 4_204 Red" textline " " hexmask.long.byte 0x330 10.--15. 1. " CP4_204G ,Color Palette 4_204 Green" hexmask.long.byte 0x330 2.--7. 1. " CP4_204B ,Color Palette 4_204 Blue" line.long 0x334 "CP4_205R,Color Palette 4 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP4_205A ,Color Palette 4_205 Blend Ratio" hexmask.long.byte 0x334 18.--23. 1. " CP4_205R ,Color Palette 4_205 Red" textline " " hexmask.long.byte 0x334 10.--15. 1. " CP4_205G ,Color Palette 4_205 Green" hexmask.long.byte 0x334 2.--7. 1. " CP4_205B ,Color Palette 4_205 Blue" line.long 0x338 "CP4_206R,Color Palette 4 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP4_206A ,Color Palette 4_206 Blend Ratio" hexmask.long.byte 0x338 18.--23. 1. " CP4_206R ,Color Palette 4_206 Red" textline " " hexmask.long.byte 0x338 10.--15. 1. " CP4_206G ,Color Palette 4_206 Green" hexmask.long.byte 0x338 2.--7. 1. " CP4_206B ,Color Palette 4_206 Blue" line.long 0x33C "CP4_207R,Color Palette 4 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP4_207A ,Color Palette 4_207 Blend Ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP4_207R ,Color Palette 4_207 Red" textline " " hexmask.long.byte 0x33C 10.--15. 1. " CP4_207G ,Color Palette 4_207 Green" hexmask.long.byte 0x33C 2.--7. 1. " CP4_207B ,Color Palette 4_207 Blue" line.long 0x340 "CP4_208R,Color Palette 4 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP4_208A ,Color Palette 4_208 Blend Ratio" hexmask.long.byte 0x340 18.--23. 1. " CP4_208R ,Color Palette 4_208 Red" textline " " hexmask.long.byte 0x340 10.--15. 1. " CP4_208G ,Color Palette 4_208 Green" hexmask.long.byte 0x340 2.--7. 1. " CP4_208B ,Color Palette 4_208 Blue" line.long 0x344 "CP4_209R,Color Palette 4 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP4_209A ,Color Palette 4_209 Blend Ratio" hexmask.long.byte 0x344 18.--23. 1. " CP4_209R ,Color Palette 4_209 Red" textline " " hexmask.long.byte 0x344 10.--15. 1. " CP4_209G ,Color Palette 4_209 Green" hexmask.long.byte 0x344 2.--7. 1. " CP4_209B ,Color Palette 4_209 Blue" line.long 0x348 "CP4_210R,Color Palette 4 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP4_210A ,Color Palette 4_210 Blend Ratio" hexmask.long.byte 0x348 18.--23. 1. " CP4_210R ,Color Palette 4_210 Red" textline " " hexmask.long.byte 0x348 10.--15. 1. " CP4_210G ,Color Palette 4_210 Green" hexmask.long.byte 0x348 2.--7. 1. " CP4_210B ,Color Palette 4_210 Blue" line.long 0x34C "CP4_211R,Color Palette 4 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP4_211A ,Color Palette 4_211 Blend Ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP4_211R ,Color Palette 4_211 Red" textline " " hexmask.long.byte 0x34C 10.--15. 1. " CP4_211G ,Color Palette 4_211 Green" hexmask.long.byte 0x34C 2.--7. 1. " CP4_211B ,Color Palette 4_211 Blue" line.long 0x350 "CP4_212R,Color Palette 4 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP4_212A ,Color Palette 4_212 Blend Ratio" hexmask.long.byte 0x350 18.--23. 1. " CP4_212R ,Color Palette 4_212 Red" textline " " hexmask.long.byte 0x350 10.--15. 1. " CP4_212G ,Color Palette 4_212 Green" hexmask.long.byte 0x350 2.--7. 1. " CP4_212B ,Color Palette 4_212 Blue" line.long 0x354 "CP4_213R,Color Palette 4 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP4_213A ,Color Palette 4_213 Blend Ratio" hexmask.long.byte 0x354 18.--23. 1. " CP4_213R ,Color Palette 4_213 Red" textline " " hexmask.long.byte 0x354 10.--15. 1. " CP4_213G ,Color Palette 4_213 Green" hexmask.long.byte 0x354 2.--7. 1. " CP4_213B ,Color Palette 4_213 Blue" line.long 0x358 "CP4_214R,Color Palette 4 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP4_214A ,Color Palette 4_214 Blend Ratio" hexmask.long.byte 0x358 18.--23. 1. " CP4_214R ,Color Palette 4_214 Red" textline " " hexmask.long.byte 0x358 10.--15. 1. " CP4_214G ,Color Palette 4_214 Green" hexmask.long.byte 0x358 2.--7. 1. " CP4_214B ,Color Palette 4_214 Blue" line.long 0x35C "CP4_215R,Color Palette 4 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP4_215A ,Color Palette 4_215 Blend Ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP4_215R ,Color Palette 4_215 Red" textline " " hexmask.long.byte 0x35C 10.--15. 1. " CP4_215G ,Color Palette 4_215 Green" hexmask.long.byte 0x35C 2.--7. 1. " CP4_215B ,Color Palette 4_215 Blue" line.long 0x360 "CP4_216R,Color Palette 4 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP4_216A ,Color Palette 4_216 Blend Ratio" hexmask.long.byte 0x360 18.--23. 1. " CP4_216R ,Color Palette 4_216 Red" textline " " hexmask.long.byte 0x360 10.--15. 1. " CP4_216G ,Color Palette 4_216 Green" hexmask.long.byte 0x360 2.--7. 1. " CP4_216B ,Color Palette 4_216 Blue" line.long 0x364 "CP4_217R,Color Palette 4 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP4_217A ,Color Palette 4_217 Blend Ratio" hexmask.long.byte 0x364 18.--23. 1. " CP4_217R ,Color Palette 4_217 Red" textline " " hexmask.long.byte 0x364 10.--15. 1. " CP4_217G ,Color Palette 4_217 Green" hexmask.long.byte 0x364 2.--7. 1. " CP4_217B ,Color Palette 4_217 Blue" line.long 0x368 "CP4_218R,Color Palette 4 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP4_218A ,Color Palette 4_218 Blend Ratio" hexmask.long.byte 0x368 18.--23. 1. " CP4_218R ,Color Palette 4_218 Red" textline " " hexmask.long.byte 0x368 10.--15. 1. " CP4_218G ,Color Palette 4_218 Green" hexmask.long.byte 0x368 2.--7. 1. " CP4_218B ,Color Palette 4_218 Blue" line.long 0x36C "CP4_219R,Color Palette 4 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP4_219A ,Color Palette 4_219 Blend Ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP4_219R ,Color Palette 4_219 Red" textline " " hexmask.long.byte 0x36C 10.--15. 1. " CP4_219G ,Color Palette 4_219 Green" hexmask.long.byte 0x36C 2.--7. 1. " CP4_219B ,Color Palette 4_219 Blue" line.long 0x370 "CP4_220R,Color Palette 4 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP4_220A ,Color Palette 4_220 Blend Ratio" hexmask.long.byte 0x370 18.--23. 1. " CP4_220R ,Color Palette 4_220 Red" textline " " hexmask.long.byte 0x370 10.--15. 1. " CP4_220G ,Color Palette 4_220 Green" hexmask.long.byte 0x370 2.--7. 1. " CP4_220B ,Color Palette 4_220 Blue" line.long 0x374 "CP4_221R,Color Palette 4 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP4_221A ,Color Palette 4_221 Blend Ratio" hexmask.long.byte 0x374 18.--23. 1. " CP4_221R ,Color Palette 4_221 Red" textline " " hexmask.long.byte 0x374 10.--15. 1. " CP4_221G ,Color Palette 4_221 Green" hexmask.long.byte 0x374 2.--7. 1. " CP4_221B ,Color Palette 4_221 Blue" line.long 0x378 "CP4_222R,Color Palette 4 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP4_222A ,Color Palette 4_222 Blend Ratio" hexmask.long.byte 0x378 18.--23. 1. " CP4_222R ,Color Palette 4_222 Red" textline " " hexmask.long.byte 0x378 10.--15. 1. " CP4_222G ,Color Palette 4_222 Green" hexmask.long.byte 0x378 2.--7. 1. " CP4_222B ,Color Palette 4_222 Blue" line.long 0x37C "CP4_223R,Color Palette 4 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP4_223A ,Color Palette 4_223 Blend Ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP4_223R ,Color Palette 4_223 Red" textline " " hexmask.long.byte 0x37C 10.--15. 1. " CP4_223G ,Color Palette 4_223 Green" hexmask.long.byte 0x37C 2.--7. 1. " CP4_223B ,Color Palette 4_223 Blue" line.long 0x380 "CP4_224R,Color Palette 4 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP4_224A ,Color Palette 4_224 Blend Ratio" hexmask.long.byte 0x380 18.--23. 1. " CP4_224R ,Color Palette 4_224 Red" textline " " hexmask.long.byte 0x380 10.--15. 1. " CP4_224G ,Color Palette 4_224 Green" hexmask.long.byte 0x380 2.--7. 1. " CP4_224B ,Color Palette 4_224 Blue" line.long 0x384 "CP4_225R,Color Palette 4 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP4_225A ,Color Palette 4_225 Blend Ratio" hexmask.long.byte 0x384 18.--23. 1. " CP4_225R ,Color Palette 4_225 Red" textline " " hexmask.long.byte 0x384 10.--15. 1. " CP4_225G ,Color Palette 4_225 Green" hexmask.long.byte 0x384 2.--7. 1. " CP4_225B ,Color Palette 4_225 Blue" line.long 0x388 "CP4_226R,Color Palette 4 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP4_226A ,Color Palette 4_226 Blend Ratio" hexmask.long.byte 0x388 18.--23. 1. " CP4_226R ,Color Palette 4_226 Red" textline " " hexmask.long.byte 0x388 10.--15. 1. " CP4_226G ,Color Palette 4_226 Green" hexmask.long.byte 0x388 2.--7. 1. " CP4_226B ,Color Palette 4_226 Blue" line.long 0x38C "CP4_227R,Color Palette 4 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP4_227A ,Color Palette 4_227 Blend Ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP4_227R ,Color Palette 4_227 Red" textline " " hexmask.long.byte 0x38C 10.--15. 1. " CP4_227G ,Color Palette 4_227 Green" hexmask.long.byte 0x38C 2.--7. 1. " CP4_227B ,Color Palette 4_227 Blue" line.long 0x390 "CP4_228R,Color Palette 4 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP4_228A ,Color Palette 4_228 Blend Ratio" hexmask.long.byte 0x390 18.--23. 1. " CP4_228R ,Color Palette 4_228 Red" textline " " hexmask.long.byte 0x390 10.--15. 1. " CP4_228G ,Color Palette 4_228 Green" hexmask.long.byte 0x390 2.--7. 1. " CP4_228B ,Color Palette 4_228 Blue" line.long 0x394 "CP4_229R,Color Palette 4 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP4_229A ,Color Palette 4_229 Blend Ratio" hexmask.long.byte 0x394 18.--23. 1. " CP4_229R ,Color Palette 4_229 Red" textline " " hexmask.long.byte 0x394 10.--15. 1. " CP4_229G ,Color Palette 4_229 Green" hexmask.long.byte 0x394 2.--7. 1. " CP4_229B ,Color Palette 4_229 Blue" line.long 0x398 "CP4_230R,Color Palette 4 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP4_230A ,Color Palette 4_230 Blend Ratio" hexmask.long.byte 0x398 18.--23. 1. " CP4_230R ,Color Palette 4_230 Red" textline " " hexmask.long.byte 0x398 10.--15. 1. " CP4_230G ,Color Palette 4_230 Green" hexmask.long.byte 0x398 2.--7. 1. " CP4_230B ,Color Palette 4_230 Blue" line.long 0x39C "CP4_231R,Color Palette 4 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP4_231A ,Color Palette 4_231 Blend Ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP4_231R ,Color Palette 4_231 Red" textline " " hexmask.long.byte 0x39C 10.--15. 1. " CP4_231G ,Color Palette 4_231 Green" hexmask.long.byte 0x39C 2.--7. 1. " CP4_231B ,Color Palette 4_231 Blue" line.long 0x3A0 "CP4_232R,Color Palette 4 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP4_232A ,Color Palette 4_232 Blend Ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP4_232R ,Color Palette 4_232 Red" textline " " hexmask.long.byte 0x3A0 10.--15. 1. " CP4_232G ,Color Palette 4_232 Green" hexmask.long.byte 0x3A0 2.--7. 1. " CP4_232B ,Color Palette 4_232 Blue" line.long 0x3A4 "CP4_233R,Color Palette 4 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP4_233A ,Color Palette 4_233 Blend Ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP4_233R ,Color Palette 4_233 Red" textline " " hexmask.long.byte 0x3A4 10.--15. 1. " CP4_233G ,Color Palette 4_233 Green" hexmask.long.byte 0x3A4 2.--7. 1. " CP4_233B ,Color Palette 4_233 Blue" line.long 0x3A8 "CP4_234R,Color Palette 4 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP4_234A ,Color Palette 4_234 Blend Ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP4_234R ,Color Palette 4_234 Red" textline " " hexmask.long.byte 0x3A8 10.--15. 1. " CP4_234G ,Color Palette 4_234 Green" hexmask.long.byte 0x3A8 2.--7. 1. " CP4_234B ,Color Palette 4_234 Blue" line.long 0x3AC "CP4_235R,Color Palette 4 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP4_235A ,Color Palette 4_235 Blend Ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP4_235R ,Color Palette 4_235 Red" textline " " hexmask.long.byte 0x3AC 10.--15. 1. " CP4_235G ,Color Palette 4_235 Green" hexmask.long.byte 0x3AC 2.--7. 1. " CP4_235B ,Color Palette 4_235 Blue" line.long 0x3B0 "CP4_236R,Color Palette 4 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP4_236A ,Color Palette 4_236 Blend Ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP4_236R ,Color Palette 4_236 Red" textline " " hexmask.long.byte 0x3B0 10.--15. 1. " CP4_236G ,Color Palette 4_236 Green" hexmask.long.byte 0x3B0 2.--7. 1. " CP4_236B ,Color Palette 4_236 Blue" line.long 0x3B4 "CP4_237R,Color Palette 4 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP4_237A ,Color Palette 4_237 Blend Ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP4_237R ,Color Palette 4_237 Red" textline " " hexmask.long.byte 0x3B4 10.--15. 1. " CP4_237G ,Color Palette 4_237 Green" hexmask.long.byte 0x3B4 2.--7. 1. " CP4_237B ,Color Palette 4_237 Blue" line.long 0x3B8 "CP4_238R,Color Palette 4 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP4_238A ,Color Palette 4_238 Blend Ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP4_238R ,Color Palette 4_238 Red" textline " " hexmask.long.byte 0x3B8 10.--15. 1. " CP4_238G ,Color Palette 4_238 Green" hexmask.long.byte 0x3B8 2.--7. 1. " CP4_238B ,Color Palette 4_238 Blue" line.long 0x3BC "CP4_239R,Color Palette 4 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP4_239A ,Color Palette 4_239 Blend Ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP4_239R ,Color Palette 4_239 Red" textline " " hexmask.long.byte 0x3BC 10.--15. 1. " CP4_239G ,Color Palette 4_239 Green" hexmask.long.byte 0x3BC 2.--7. 1. " CP4_239B ,Color Palette 4_239 Blue" line.long 0x3C0 "CP4_240R,Color Palette 4 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP4_240A ,Color Palette 4_240 Blend Ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP4_240R ,Color Palette 4_240 Red" textline " " hexmask.long.byte 0x3C0 10.--15. 1. " CP4_240G ,Color Palette 4_240 Green" hexmask.long.byte 0x3C0 2.--7. 1. " CP4_240B ,Color Palette 4_240 Blue" line.long 0x3C4 "CP4_241R,Color Palette 4 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP4_241A ,Color Palette 4_241 Blend Ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP4_241R ,Color Palette 4_241 Red" textline " " hexmask.long.byte 0x3C4 10.--15. 1. " CP4_241G ,Color Palette 4_241 Green" hexmask.long.byte 0x3C4 2.--7. 1. " CP4_241B ,Color Palette 4_241 Blue" line.long 0x3C8 "CP4_242R,Color Palette 4 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP4_242A ,Color Palette 4_242 Blend Ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP4_242R ,Color Palette 4_242 Red" textline " " hexmask.long.byte 0x3C8 10.--15. 1. " CP4_242G ,Color Palette 4_242 Green" hexmask.long.byte 0x3C8 2.--7. 1. " CP4_242B ,Color Palette 4_242 Blue" line.long 0x3CC "CP4_243R,Color Palette 4 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP4_243A ,Color Palette 4_243 Blend Ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP4_243R ,Color Palette 4_243 Red" textline " " hexmask.long.byte 0x3CC 10.--15. 1. " CP4_243G ,Color Palette 4_243 Green" hexmask.long.byte 0x3CC 2.--7. 1. " CP4_243B ,Color Palette 4_243 Blue" line.long 0x3D0 "CP4_244R,Color Palette 4 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP4_244A ,Color Palette 4_244 Blend Ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP4_244R ,Color Palette 4_244 Red" textline " " hexmask.long.byte 0x3D0 10.--15. 1. " CP4_244G ,Color Palette 4_244 Green" hexmask.long.byte 0x3D0 2.--7. 1. " CP4_244B ,Color Palette 4_244 Blue" line.long 0x3D4 "CP4_245R,Color Palette 4 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP4_245A ,Color Palette 4_245 Blend Ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP4_245R ,Color Palette 4_245 Red" textline " " hexmask.long.byte 0x3D4 10.--15. 1. " CP4_245G ,Color Palette 4_245 Green" hexmask.long.byte 0x3D4 2.--7. 1. " CP4_245B ,Color Palette 4_245 Blue" line.long 0x3D8 "CP4_246R,Color Palette 4 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP4_246A ,Color Palette 4_246 Blend Ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP4_246R ,Color Palette 4_246 Red" textline " " hexmask.long.byte 0x3D8 10.--15. 1. " CP4_246G ,Color Palette 4_246 Green" hexmask.long.byte 0x3D8 2.--7. 1. " CP4_246B ,Color Palette 4_246 Blue" line.long 0x3DC "CP4_247R,Color Palette 4 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP4_247A ,Color Palette 4_247 Blend Ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP4_247R ,Color Palette 4_247 Red" textline " " hexmask.long.byte 0x3DC 10.--15. 1. " CP4_247G ,Color Palette 4_247 Green" hexmask.long.byte 0x3DC 2.--7. 1. " CP4_247B ,Color Palette 4_247 Blue" line.long 0x3E0 "CP4_248R,Color Palette 4 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP4_248A ,Color Palette 4_248 Blend Ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP4_248R ,Color Palette 4_248 Red" textline " " hexmask.long.byte 0x3E0 10.--15. 1. " CP4_248G ,Color Palette 4_248 Green" hexmask.long.byte 0x3E0 2.--7. 1. " CP4_248B ,Color Palette 4_248 Blue" line.long 0x3E4 "CP4_249R,Color Palette 4 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP4_249A ,Color Palette 4_249 Blend Ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP4_249R ,Color Palette 4_249 Red" textline " " hexmask.long.byte 0x3E4 10.--15. 1. " CP4_249G ,Color Palette 4_249 Green" hexmask.long.byte 0x3E4 2.--7. 1. " CP4_249B ,Color Palette 4_249 Blue" line.long 0x3E8 "CP4_250R,Color Palette 4 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP4_250A ,Color Palette 4_250 Blend Ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP4_250R ,Color Palette 4_250 Red" textline " " hexmask.long.byte 0x3E8 10.--15. 1. " CP4_250G ,Color Palette 4_250 Green" hexmask.long.byte 0x3E8 2.--7. 1. " CP4_250B ,Color Palette 4_250 Blue" line.long 0x3EC "CP4_251R,Color Palette 4 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP4_251A ,Color Palette 4_251 Blend Ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP4_251R ,Color Palette 4_251 Red" textline " " hexmask.long.byte 0x3EC 10.--15. 1. " CP4_251G ,Color Palette 4_251 Green" hexmask.long.byte 0x3EC 2.--7. 1. " CP4_251B ,Color Palette 4_251 Blue" line.long 0x3F0 "CP4_252R,Color Palette 4 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP4_252A ,Color Palette 4_252 Blend Ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP4_252R ,Color Palette 4_252 Red" textline " " hexmask.long.byte 0x3F0 10.--15. 1. " CP4_252G ,Color Palette 4_252 Green" hexmask.long.byte 0x3F0 2.--7. 1. " CP4_252B ,Color Palette 4_252 Blue" line.long 0x3F4 "CP4_253R,Color Palette 4 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP4_253A ,Color Palette 4_253 Blend Ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP4_253R ,Color Palette 4_253 Red" textline " " hexmask.long.byte 0x3F4 10.--15. 1. " CP4_253G ,Color Palette 4_253 Green" hexmask.long.byte 0x3F4 2.--7. 1. " CP4_253B ,Color Palette 4_253 Blue" line.long 0x3F8 "CP4_254R,Color Palette 4 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP4_254A ,Color Palette 4_254 Blend Ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP4_254R ,Color Palette 4_254 Red" textline " " hexmask.long.byte 0x3F8 10.--15. 1. " CP4_254G ,Color Palette 4_254 Green" hexmask.long.byte 0x3F8 2.--7. 1. " CP4_254B ,Color Palette 4_254 Blue" line.long 0x3FC "CP4_255R,Color Palette 4 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP4_255A ,Color Palette 4_255 Blend Ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP4_255R ,Color Palette 4_255 Red" textline " " hexmask.long.byte 0x3FC 10.--15. 1. " CP4_255G ,Color Palette 4_255 Green" hexmask.long.byte 0x3FC 2.--7. 1. " CP4_255B ,Color Palette 4_255 Blue" tree.end width 9. base ad:0xFEB50000 tree "External Synchronization Control Registers" if (((per.l(ad:0xFEB40000+0x20))&0x01)==0X01) group.long 0x00++0x03 line.long 0x00 "ESCR_2,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT Invert" "Not inverted,Inverted" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--5. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x00++0x03 line.long 0x00 "ESCR_2,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT Invert" "Not inverted,Inverted" bitfld.long 0x00 20. " DCLKSEL ,DCLKIN Select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT Disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC Select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--4. " FRQSEL ,Dot Clock Frequency Ratio Selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" endif group.long 0x04++0x03 line.long 0x00 "OTAR_2,Output Signal Timing Adjustment Register" bitfld.long 0x00 28.--30. " DEA ,DE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 24.--26. " CLAMPA ,CLAMP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 20.--22. " DRGBA ,Digital RGB Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 8.--10. " CDEA ,CDE Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 4.--6. " DISPA ,DISP Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 0.--2. " SYNCA ,SYNC Output Timing Adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" tree.end tree "Dual Display Output Control Registers" group.long 0x1000++0x3 line.long 0x00 "DORCR_2,Display Unit Output Route Control Register" bitfld.long 0x00 0. " DPRS ,Display Priority Register Select" "DPPR,DS_1_PR/DS_2_PR" group.long 0x1020++0x3 line.long 0x00 "DS_0_PR,Display Superimpose 0 Priority Register" bitfld.long 0x00 28.--31. " S0S8 ,Display Superimposition 0 Priority 8 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 24.--27. " S0S7 ,Display Superimposition 0 Priority 7 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 20.--23. " S0S6 ,Display Superimposition 0 Priority 6 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 16.--19. " S0S5 ,Display Superimposition 0 Priority 5 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 12.--15. " S0S4 ,Display Superimposition 0 Priority 4 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 8.--11. " S0S3 ,Display Superimposition 0 Priority 3 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 4.--7. " S0S2 ,Display Superimposition 0 Priority 2 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 0.--3. " S0S1 ,Display Superimposition 0 Priority 1 Select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." tree.end width 7. tree "YC-RGB Conversion Coefficient Registers" tree "YC-RGB Conversion Before Superpositioning" group.long 0x1080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y Normalization Coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y Normalization Coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y Normalization Offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y Normalization Offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr Normalization Offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr Normalization Offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb Normalization Offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb Normalization Offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr Coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr Coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr Coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr Coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb Coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb Coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr Coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr Coefficient 1" tree.end tree "YC-RGB Conversion After Superpositioning" group.long 0x4080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y Normalization Coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y Normalization Coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y Normalization Offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y Normalization Offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr Normalization Offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr Normalization Offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb Normalization Offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb Normalization Offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr Coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr Coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr Coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr Coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb Coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb Coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr Coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr Coefficient 1" tree.end tree.end width 0xb tree.end tree.end tree.open "LVDS (LVDS Interface)" tree "LVDS 0" base ad:0xFEB90000 width 10. group.long 0x00++0x3 line.long 0x00 "LVDCR0,LVDS Control Register 0" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 15. " DUSEL ,DU Channel Select" "DU0,TCON" else bitfld.long 0x00 15. " DUSEL ,DU Channel Select" "DU0,?..." endif textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 8.--11. " LVMD ,LVDS Mode" "MODE0,MODE1,MODE2,MODE3,MODE4,MODE5,MODE6,MODE7,?..." textline " " bitfld.long 0x00 4. " PLLON ,PLL Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PWD ,Power Down mode" "Enabled,Disabled" else bitfld.long 0x00 12. " DMD ,Double Edge Input Select" "Single edge,Double edge" bitfld.long 0x00 8.--11. " LVMD ,LVDS Mode" "MODE0,MODE1,MODE2,MODE3,MODE4,MODE5,MODE6,MODE7,?..." textline " " bitfld.long 0x00 4. " PLLEN ,PLL Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BEN ,BIAS Enable" "Disabled,Enabled" bitfld.long 0x00 1. " LVEN ,LVDS Enable Bit" "Disabled,Enabled" endif textline " " bitfld.long 0x00 0. " LVRES ,LVDS Reset Bit" "No reset,Reset" group.long 0x04++0xF line.long 0x00 "LVDCR1,LVDS Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 8. " CH3STBY ,CH3 Control" "Standby mode,Operating mode" bitfld.long 0x00 6. " CH2STBY ,CH2 Control" "Standby mode,Operating mode" textline " " bitfld.long 0x00 4. " CH1STBY ,CH1 Control" "Standby mode,Operating mode" bitfld.long 0x00 2. " CH0STBY ,CH0 Control" "Standby mode,Operating mode" bitfld.long 0x00 0. " CLKSTBY ,CLK Control" "Standby mode,Operating mode" else bitfld.long 0x00 15. " CKSEL ,CLK Signal Select 0" "DU,Du_clkin pin" bitfld.long 0x00 8.--9. " CH3STBY ,CH3 Control" "Standby mode,,,Operating mode" bitfld.long 0x00 6.--7. " CH2STBY ,CH2 Control" "Standby mode,,,Operating mode" textline " " bitfld.long 0x00 4.--5. " CH1STBY ,CH1 Control" "Standby mode,,,Operating mode" bitfld.long 0x00 2.--3. " CH0STBY ,CH0 Control" "Standby mode,,,Operating mode" bitfld.long 0x00 0.--1. " CLKSTBY ,CLK Control" "Standby mode,,,Operating mode" endif line.long 0x04 "LVDPLLCR,PLL Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") hexmask.long.tbyte 0x04 0.--18. 1. " PLLDIVCNT ,PLL Setting" else sif (cpu()=="RCARM2") rbitfld.long 0x04 14. " CEEN ,PLLCLK Control" "Off,On" else bitfld.long 0x04 14. " CEEN ,PLLCLK Control" "Off,On" endif bitfld.long 0x04 13. " FBEN ,PLL Feedback CLK Control" "Off,On" bitfld.long 0x04 12. " COSEL ,PLLCLK Select" "Undivided clk,Divided clk" textline " " hexmask.long.word 0x04 0.--10. 1. " PLLDLYCNT ,PLL Setting" endif line.long 0x08 "LVDCTRCR,CTR Control Register" bitfld.long 0x08 12.--14. " CTR3SEL ,CTR3 Select" "0,Odd/even,CDE,?..." bitfld.long 0x08 8.--10. " CTR2SEL ,CTR2 Select" "DISP,Odd/even,CDE,HSYNC,VSYNC,?..." bitfld.long 0x08 4.--6. " CTR1SEL ,CTR1 Select" "VSYNC,DISP,Odd/even,CDE,HSYNC,?..." textline " " bitfld.long 0x08 0.--2. " CTR0SEL ,CTR0 Select" "HSYNC,VSYNC,DISP,Odd/even,CDE,?..." line.long 0x0C "LVDCHCR,CH Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x0C 12.--14. " CH3SEL ,CH3 Select" "CH3,CH0,CH1,CH2,?..." bitfld.long 0x0C 8.--10. " CH2SEL ,CH2 Select" "CH2,CH3,CH0,CH1,?..." bitfld.long 0x0C 4.--6. " CH1SEL ,CH1 Select" "CH1,CH2,CH3,CH0,?..." textline " " bitfld.long 0x0C 0.--2. " CH0SEL ,CH0 Select" "CH0,CH1,CH2,CH3,?..." else bitfld.long 0x0C 12.--13. " CH3SEL ,CH3 Select" "CH3,CH0,CH1,CH2" bitfld.long 0x0C 8.--9. " CH2SEL ,CH2 Select" "CH2,CH3,CH0,CH1" bitfld.long 0x0C 4.--5. " CH1SEL ,CH1 Select" "CH1,CH2,CH3,CH0" textline " " bitfld.long 0x0C 0.--1. " CH0SEL ,CH0 Select" "CH0,CH1,CH2,CH3" endif width 0xB tree.end tree "LVDS 1" base ad:0xFEB94000 width 10. group.long 0x00++0x3 line.long 0x00 "LVDCR0,LVDS Control Register 0" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 15. " DUSEL ,DU Channel Select" "DU0,TCON" else bitfld.long 0x00 15. " DUSEL ,DU Channel Select" "DU1,DU2" endif textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 8.--11. " LVMD ,LVDS Mode" "MODE0,MODE1,MODE2,MODE3,MODE4,MODE5,MODE6,MODE7,?..." textline " " bitfld.long 0x00 4. " PLLON ,PLL Enable" "Disabled,Enabled" bitfld.long 0x00 2. " PWD ,Power Down mode" "Enabled,Disabled" else bitfld.long 0x00 12. " DMD ,Double Edge Input Select" "Single edge,Double edge" bitfld.long 0x00 8.--11. " LVMD ,LVDS Mode" "MODE0,MODE1,MODE2,MODE3,MODE4,MODE5,MODE6,MODE7,?..." textline " " bitfld.long 0x00 4. " PLLEN ,PLL Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BEN ,BIAS Enable" "Disabled,Enabled" bitfld.long 0x00 1. " LVEN ,LVDS Enable Bit" "Disabled,Enabled" endif textline " " bitfld.long 0x00 0. " LVRES ,LVDS Reset Bit" "No reset,Reset" group.long 0x04++0xF line.long 0x00 "LVDCR1,LVDS Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 8. " CH3STBY ,CH3 Control" "Standby mode,Operating mode" bitfld.long 0x00 6. " CH2STBY ,CH2 Control" "Standby mode,Operating mode" textline " " bitfld.long 0x00 4. " CH1STBY ,CH1 Control" "Standby mode,Operating mode" bitfld.long 0x00 2. " CH0STBY ,CH0 Control" "Standby mode,Operating mode" bitfld.long 0x00 0. " CLKSTBY ,CLK Control" "Standby mode,Operating mode" else bitfld.long 0x00 15. " CKSEL ,CLK Signal Select 0" "DU,Du_clkin pin" bitfld.long 0x00 8.--9. " CH3STBY ,CH3 Control" "Standby mode,,,Operating mode" bitfld.long 0x00 6.--7. " CH2STBY ,CH2 Control" "Standby mode,,,Operating mode" textline " " bitfld.long 0x00 4.--5. " CH1STBY ,CH1 Control" "Standby mode,,,Operating mode" bitfld.long 0x00 2.--3. " CH0STBY ,CH0 Control" "Standby mode,,,Operating mode" bitfld.long 0x00 0.--1. " CLKSTBY ,CLK Control" "Standby mode,,,Operating mode" endif line.long 0x04 "LVDPLLCR,PLL Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") hexmask.long.tbyte 0x04 0.--18. 1. " PLLDIVCNT ,PLL Setting" else sif (cpu()=="RCARM2") rbitfld.long 0x04 14. " CEEN ,PLLCLK Control" "Off,On" else bitfld.long 0x04 14. " CEEN ,PLLCLK Control" "Off,On" endif bitfld.long 0x04 13. " FBEN ,PLL Feedback CLK Control" "Off,On" bitfld.long 0x04 12. " COSEL ,PLLCLK Select" "Undivided clk,Divided clk" textline " " hexmask.long.word 0x04 0.--10. 1. " PLLDLYCNT ,PLL Setting" endif line.long 0x08 "LVDCTRCR,CTR Control Register" bitfld.long 0x08 12.--14. " CTR3SEL ,CTR3 Select" "0,Odd/even,CDE,?..." bitfld.long 0x08 8.--10. " CTR2SEL ,CTR2 Select" "DISP,Odd/even,CDE,HSYNC,VSYNC,?..." bitfld.long 0x08 4.--6. " CTR1SEL ,CTR1 Select" "VSYNC,DISP,Odd/even,CDE,HSYNC,?..." textline " " bitfld.long 0x08 0.--2. " CTR0SEL ,CTR0 Select" "HSYNC,VSYNC,DISP,Odd/even,CDE,?..." line.long 0x0C "LVDCHCR,CH Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x0C 12.--14. " CH3SEL ,CH3 Select" "CH3,CH0,CH1,CH2,?..." bitfld.long 0x0C 8.--10. " CH2SEL ,CH2 Select" "CH2,CH3,CH0,CH1,?..." bitfld.long 0x0C 4.--6. " CH1SEL ,CH1 Select" "CH1,CH2,CH3,CH0,?..." textline " " bitfld.long 0x0C 0.--2. " CH0SEL ,CH0 Select" "CH0,CH1,CH2,CH3,?..." else bitfld.long 0x0C 12.--13. " CH3SEL ,CH3 Select" "CH3,CH0,CH1,CH2" bitfld.long 0x0C 8.--9. " CH2SEL ,CH2 Select" "CH2,CH3,CH0,CH1" bitfld.long 0x0C 4.--5. " CH1SEL ,CH1 Select" "CH1,CH2,CH3,CH0" textline " " bitfld.long 0x0C 0.--1. " CH0SEL ,CH0 Select" "CH0,CH1,CH2,CH3" endif width 0xB tree.end tree.end tree.open "VIN (Video Input Module)" tree "Channel 0" base ad:0xE6EF0000 width 9. group.long 0x00++0x03 line.long 0x00 "V0MC,Video 0 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V0MS,Video 0 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V0FC,Video 0 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V0SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V0ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V0SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V0EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V0SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V0ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V0SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V0EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V0IS,Video 0 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V0MB1,Video 0 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V0MB2,Video 0 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V0MB3,Video 0 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V0LC,Video 0 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V0IE,Video 0 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V0INTS,Video 0 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V0SI,Video 0 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF0000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V0YS,Video 0 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V0XS,Video 0 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V0DMR,Video 0 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V0DMR2,Video 0 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V0UVAOF,Video 0 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V0CSCC1,Video 0 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V0CSCC2,Video 0 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V0CSCC3,Video 0 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V0CSCC1,Video 0 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V0CSCC2,Video 0 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V0CSCC3,Video 0 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V0C1A,Video 0 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C1B,Video 0 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C1C,Video 0 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V0C2A,Video 0 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C2B,Video 0 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C2C,Video 0 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V0C3A,Video 0 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C3B,Video 0 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C3C,Video 0 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V0C4A,Video 0 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C4B,Video 0 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C4C,Video 0 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V0C5A,Video 0 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C5B,Video 0 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C5C,Video 0 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V0C6A,Video 0 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C6B,Video 0 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C6C,Video 0 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V0C7A,Video 0 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C7B,Video 0 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C7C,Video 0 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V0C8A,Video 0 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C8B,Video 0 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C8C,Video 0 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V0C1A,Video 0 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C1B,Video 0 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C1C,Video 0 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V0C2A,Video 0 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C2B,Video 0 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C2C,Video 0 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V0C3A,Video 0 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C3B,Video 0 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C3C,Video 0 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V0C4A,Video 0 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C4B,Video 0 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C4C,Video 0 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V0C5A,Video 0 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C5B,Video 0 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C5C,Video 0 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V0C6A,Video 0 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C6B,Video 0 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C6C,Video 0 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V0C7A,Video 0 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C7B,Video 0 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C7C,Video 0 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V0C8A,Video 0 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C8B,Video 0 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C8C,Video 0 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" endif group.long 0x228++0x23 line.long 0x00 "V0YCCR1,Video 0 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V0YCCR2,Video 0 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V0YCCR3,Video 0 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V0CBCCR1,Video 0 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V0CBCCR2,Video 0 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V0CBCCR3,Video 0 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation Sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V0CRCCR1,Video 0 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V0CRCCR2,Video 0 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V0CRCCR3,Video 0 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift Down Volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" else group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V0YCCR1,Video 0 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V0YCCR2,Video 0 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V0YCCR3,Video 0 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V0CBCCR1,Video 0 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V0CBCCR2,Video 0 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V0CBCCR3,Video 0 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V0CRCCR1,Video 0 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V0CRCCR2,Video 0 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V0CRCCR3,Video 0 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V0CSCE1,Video 0 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V0CSCE2,Video 0 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V0CSCE3,Video 0 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V0CSCE4,Video 0 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V0SRCSEL,Video 0 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 1" base ad:0xE6EF1000 width 9. group.long 0x00++0x03 line.long 0x00 "V1MC,Video 1 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V1MS,Video 1 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V1FC,Video 1 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V1SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V1ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V1SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V1EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V1SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V1ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V1SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V1EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V1IS,Video 1 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V1MB1,Video 1 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V1MB2,Video 1 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V1MB3,Video 1 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V1LC,Video 1 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V1IE,Video 1 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V1INTS,Video 1 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V1SI,Video 1 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF1000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V1YS,Video 1 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V1XS,Video 1 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V1DMR,Video 1 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V1DMR2,Video 1 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V1UVAOF,Video 1 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V1CSCC1,Video 1 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V1CSCC2,Video 1 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V1CSCC3,Video 1 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V1CSCC1,Video 1 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V1CSCC2,Video 1 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V1CSCC3,Video 1 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V1C1A,Video 1 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C1B,Video 1 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C1C,Video 1 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V1C2A,Video 1 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C2B,Video 1 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C2C,Video 1 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V1C3A,Video 1 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C3B,Video 1 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C3C,Video 1 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V1C4A,Video 1 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C4B,Video 1 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C4C,Video 1 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V1C5A,Video 1 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C5B,Video 1 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C5C,Video 1 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V1C6A,Video 1 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C6B,Video 1 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C6C,Video 1 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V1C7A,Video 1 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C7B,Video 1 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C7C,Video 1 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V1C8A,Video 1 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C8B,Video 1 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C8C,Video 1 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V1C1A,Video 1 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C1B,Video 1 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C1C,Video 1 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V1C2A,Video 1 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C2B,Video 1 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C2C,Video 1 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V1C3A,Video 1 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C3B,Video 1 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C3C,Video 1 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V1C4A,Video 1 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C4B,Video 1 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C4C,Video 1 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V1C5A,Video 1 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C5B,Video 1 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C5C,Video 1 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V1C6A,Video 1 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C6B,Video 1 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C6C,Video 1 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V1C7A,Video 1 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C7B,Video 1 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C7C,Video 1 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V1C8A,Video 1 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C8B,Video 1 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C8C,Video 1 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" endif group.long 0x228++0x23 line.long 0x00 "V1YCCR1,Video 1 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V1YCCR2,Video 1 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V1YCCR3,Video 1 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V1CBCCR1,Video 1 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V1CBCCR2,Video 1 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V1CBCCR3,Video 1 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation Sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V1CRCCR1,Video 1 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V1CRCCR2,Video 1 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V1CRCCR3,Video 1 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift Down Volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" else group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V1YCCR1,Video 1 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V1YCCR2,Video 1 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V1YCCR3,Video 1 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V1CBCCR1,Video 1 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V1CBCCR2,Video 1 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V1CBCCR3,Video 1 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V1CRCCR1,Video 1 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V1CRCCR2,Video 1 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V1CRCCR3,Video 1 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V1CSCE1,Video 1 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V1CSCE2,Video 1 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V1CSCE3,Video 1 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V1CSCE4,Video 1 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V1SRCSEL,Video 1 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 2" base ad:0xE6EF2000 width 9. group.long 0x00++0x03 line.long 0x00 "V2MC,Video 2 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V2MS,Video 2 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V2FC,Video 2 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V2SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V2ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V2SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V2EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V2SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V2ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V2SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V2EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V2IS,Video 2 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V2MB1,Video 2 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V2MB2,Video 2 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V2MB3,Video 2 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V2LC,Video 2 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V2IE,Video 2 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V2INTS,Video 2 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V2SI,Video 2 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF2000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V2MTC,Video 2 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V2YS,Video 2 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V2XS,Video 2 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V2DMR,Video 2 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V2DMR2,Video 2 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V2UVAOF,Video 2 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V2CSCC1,Video 2 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V2CSCC2,Video 2 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V2CSCC3,Video 2 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V2CSCC1,Video 2 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V2CSCC2,Video 2 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V2CSCC3,Video 2 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V2C1A,Video 2 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C1B,Video 2 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C1C,Video 2 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V2C2A,Video 2 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C2B,Video 2 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C2C,Video 2 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V2C3A,Video 2 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C3B,Video 2 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C3C,Video 2 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V2C4A,Video 2 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C4B,Video 2 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C4C,Video 2 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V2C5A,Video 2 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C5B,Video 2 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C5C,Video 2 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V2C6A,Video 2 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C6B,Video 2 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C6C,Video 2 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V2C7A,Video 2 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C7B,Video 2 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C7C,Video 2 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V2C8A,Video 2 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C8B,Video 2 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C8C,Video 2 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V2C1A,Video 2 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C1B,Video 2 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C1C,Video 2 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V2C2A,Video 2 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C2B,Video 2 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C2C,Video 2 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V2C3A,Video 2 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C3B,Video 2 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C3C,Video 2 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V2C4A,Video 2 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C4B,Video 2 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C4C,Video 2 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V2C5A,Video 2 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C5B,Video 2 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C5C,Video 2 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V2C6A,Video 2 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C6B,Video 2 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C6C,Video 2 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V2C7A,Video 2 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V2C7B,Video 2 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V2C7C,Video 2 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V2LUTP,Video 2 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V2LUTD,Video 2 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else endif else group.long 0x100++0x07 line.long 0x00 "V2LUTP,Video 2 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V2LUTD,Video 2 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V2YCCR1,Video 2 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V2YCCR2,Video 2 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V2YCCR3,Video 2 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V2CBCCR1,Video 2 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V2CBCCR2,Video 2 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V2CBCCR3,Video 2 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V2CRCCR1,Video 2 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V2CRCCR2,Video 2 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V2CRCCR3,Video 2 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V2SRCSEL,Video 2 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 3" base ad:0xE6EF3000 width 9. group.long 0x00++0x03 line.long 0x00 "V3MC,Video 3 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V3MS,Video 3 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V3FC,Video 3 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V3SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V3ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V3SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V3EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V3SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V3ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V3SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V3EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V3IS,Video 3 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V3MB1,Video 3 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V3MB2,Video 3 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V3MB3,Video 3 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V3LC,Video 3 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V3IE,Video 3 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V3INTS,Video 3 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V3SI,Video 3 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF3000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V3MTC,Video 3 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V3YS,Video 3 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V3XS,Video 3 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V3DMR,Video 3 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V3DMR2,Video 3 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V3UVAOF,Video 3 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") else group.long 0x64++0x0B line.long 0x00 "V3CSCC1,Video 3 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V3CSCC2,Video 3 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V3CSCC3,Video 3 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V3C1A,Video 3 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C1B,Video 3 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C1C,Video 3 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V3C2A,Video 3 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C2B,Video 3 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C2C,Video 3 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V3C3A,Video 3 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C3B,Video 3 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C3C,Video 3 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V3C4A,Video 3 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C4B,Video 3 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C4C,Video 3 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V3C5A,Video 3 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C5B,Video 3 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C5C,Video 3 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V3C6A,Video 3 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C6B,Video 3 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C6C,Video 3 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V3C7A,Video 3 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C7B,Video 3 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C7C,Video 3 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V3C8A,Video 3 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C8B,Video 3 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C8C,Video 3 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V3C1A,Video 3 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C1B,Video 3 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C1C,Video 3 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V3C2A,Video 3 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C2B,Video 3 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C2C,Video 3 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V3C3A,Video 3 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C3B,Video 3 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C3C,Video 3 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V3C4A,Video 3 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C4B,Video 3 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C4C,Video 3 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V3C5A,Video 3 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C5B,Video 3 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C5C,Video 3 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V3C6A,Video 3 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C6B,Video 3 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C6C,Video 3 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V3C7A,Video 3 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V3C7B,Video 3 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V3C7C,Video 3 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V3LUTP,Video 3 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V3LUTD,Video 3 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else endif else endif sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V3SRCSEL,Video 3 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree.end tree.open "IMR-X2 (Distortion Correction Engine)" tree "Channel 0" base ad:0xFEAD0000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 0. " TRA ,Trap- rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CFS_set/clr ,Color Format Select" "YUV,RGB" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " UVS_set/clr ,UV Select" "YUV422,YUV420" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance processing precision in the source side" "8-bbp,10-bbp" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DY10_set/clr ,Luminance processing precision in the destination side" "8-bbp,10-bbp" sif (cpu()=="RCARH2") setclrfld.long 0x00 6. 0x04 6. 0x08 6. " RGBS_set/clr ,RGB Select" "ARGB1555,RGB565" else setclrfld.long 0x00 6. 0x04 6. 0x08 6. " RGBS_set/clr ,RGB Select" "RGB565,Separate Y/UV" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" hexmask.long.word 0x00 0.--15. 1. " TCOL ,Triangle Drawing Color" group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SYVWRW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVSR ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif sif (cpu()=="RCARH2") hexmask.long.word 0x0c 0.--10. 1. " YMAX ,Y Clip MAX" else hexmask.long.word 0x0c 0.--9. 1. " YMAX ,Y Clip MAX" endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif group.long 0xA0++0x03 line.long 0x00 "LINEMR,Line mode register" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " EOLS_set/clr ,Line End Drawing Mode" "No last vertex,Last vertex" tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (x+0x1000)--(x+0x1FFC) /long" tree.end endif width 0xb tree.end tree "Channel 1" base ad:0xFEAF0000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 0. " TRA ,Trap- rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CFS_set/clr ,Color Format Select" "YUV,RGB" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " UVS_set/clr ,UV Select" "YUV422,YUV420" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance processing precision in the source side" "8-bbp,10-bbp" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " DY10_set/clr ,Luminance processing precision in the destination side" "8-bbp,10-bbp" sif (cpu()=="RCARH2") setclrfld.long 0x00 6. 0x04 6. 0x08 6. " RGBS_set/clr ,RGB Select" "ARGB1555,RGB565" else setclrfld.long 0x00 6. 0x04 6. 0x08 6. " RGBS_set/clr ,RGB Select" "RGB565,Separate Y/UV" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" hexmask.long.word 0x00 0.--15. 1. " TCOL ,Triangle Drawing Color" group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SYVWRW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVSR ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif sif (cpu()=="RCARH2") hexmask.long.word 0x0c 0.--10. 1. " YMAX ,Y Clip MAX" else hexmask.long.word 0x0c 0.--9. 1. " YMAX ,Y Clip MAX" endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif group.long 0xA0++0x03 line.long 0x00 "LINEMR,Line mode register" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " EOLS_set/clr ,Line End Drawing Mode" "No last vertex,Last vertex" tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (x+0x1000)--(x+0x1FFC) /long" tree.end endif width 0xb tree.end tree.end tree.open "IMR-LSX2 (Distortion Correction Engine)" tree "Channel 0" base ad:0xFE860000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree "Channel 1" base ad:0xFE870000 width 9. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SFE ,Separate Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARS ,Auto Rendering Start" "No,Yes" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFO ,Line Memory Frame Overflow" "No overflow,Overflow" bitfld.long 0x00 8. " LMO ,Line Memory Mesh Overflow" "No overflow,Overflow" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.long 0x00 7. " SFS ,Separate Field" "Even,Odd" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 5. " REN ,Drawing-in-Progress Flag" "Not in progress,In progress" textline " " endif bitfld.long 0x00 6. " DSA ,Destination Start Address" "DSAR,DSAR2" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" textline " " bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap - rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 9. " LFOCLR ,Line Memory Frame Overflow Flag Clear" "No effect,Clear" bitfld.long 0x00 8. " LMOCLR ,Line Memory Mesh Overflow Flag Clear" "No effect,Clear" textline " " endif bitfld.long 0x00 2. " INTCLR ,INT Instruction Decode Flag Clear" "No effect,Clear" bitfld.long 0x00 1. " IERCLR ,Illegal Instruction Decode Flag Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " TRACLR ,Rendering Operation Completed Flag Clear" "No effect,Clear" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " TRAENB ,TRA Interrupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") rgroup.long 0x1C++0x3 line.long 0x00 "DLSP,DL Stack Pointer Register" endif rgroup.long 0x20++0x03 line.long 0x00 "DLPR,DL Status Register" sif (cpu()=="R8A7792X") group.long 0x28++0x03 line.long 0x00 "EDLR,Executed DL Status Register" hexmask.long.word 0x00 0.--15. 1. " EDL ,Executed DL status" endif tree.end tree "Memory Control Registers" group.long 0x30++0x07 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" sif (cpu()=="R8A7792X") group.long 0x38++0x03 line.long 0x00 "SSAR,Source Start Address Register" hexmask.long 0x00 5.--31. 0x20 " SSAR ,SRC Area Start Address" group.long 0x3c++0x07 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--13. 1. " DSTR ,Memory width of the DST area" line.long 0x04 "SSTR,Source Stride Register" hexmask.long.word 0x04 0.--12. 1. " SSTR ,Memory width of the SRC area" else group.long 0x3c++0x03 line.long 0x00 "DSTR,Destination Stride Register" hexmask.long.word 0x00 0.--12. 1. " DST ,Memory width of the DST area" endif group.long 0x48++0x0b line.long 0x00 "DSAR2,Destination Start Address Register 2" hexmask.long 0x00 5.--31. 0x20 " DSA2 ,Destination Start Address 2" line.long 0x04 "DLSAR2,DL Start Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DLSA2 ,DL Start Address" line.long 0x08 "DSOR,Destination Start Offset Address Register" hexmask.long 0x08 5.--31. 0x20 " DSOFSTA ,Destination Start Offset Address" tree.end tree "Rendering Control Register" group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" sif (cpu()=="R8A7792X") setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter Register Specification Mode" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter Register Specification Mode" "DL,YLCPR" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter Register Specification Mode" "DL,YLCPR" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CP16E_set/clr ,Copy 16-bit Mode" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SY12_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/10-bpp,12-bpp" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SY10_set/clr ,Luminance Processing of Source Data Precision" "8-bpp/12-bpp,10-bpp" textline " " endif setclrfld.long 0x00 10. 0x04 10. 0x08 10. " YOM_set/clr ,CbCr Data Output Mode" "Y and CbCr data,Y data" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 9. 0x04 9. 0x08 9. " Y12_set/clr ,Sets the precision of Y data when it is output" "8-bpp,12-bpp" textline " " endif setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Sets the precision of Y data when it is output" "8-bpp,10-bpp" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " YISM_set/clr ,Selects the output format for YUV data" "Interleave YUV,Separate Y/UV" textline " " sif (cpu()=="R8A7792X") setclrfld.long 0x00 5.--6. 0x04 5.--6. 0x08 5.--6. " SUV ,Color Difference Processing of Source Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 3.--4. 0x04 3.--4. 0x08 3.--4. " DUV ,Color Difference of Output Data Precision" "8-bpp,10-bpp,12-bpp,?..." setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE ,Luminance Correction Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TXTM ,Texture Data Read Memory" "Line,External" endif sif (cpu()=="R8A7792X") group.long 0xE4++0x03 line.long 0x00 "CMRCR2,Rendering Mode Register 2" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " LUTE ,Lookup table enable" "Disabled,Enabled" endif group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counter clockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" group.long 0x6c++0x03 line.long 0x00 "TRICR,Triangle Color Register" bitfld.long 0x00 31. " YCFORM ,For interleave output changes the order of Y and U/V" "Not changed,Changed" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 26.--27. " TCY3 ,When Y is to be output in 12 bpp specifies bits 11 and 10 of color Y for single-color drawing" "0,1,2,3" textline " " endif bitfld.long 0x00 24.--25. " TCY2 ,When Y is to be output in 10 bits specifies the upper 2 bits of color Y for monochrome drawing" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " TCV ,Specifies color V for monochrome drawing with the TRI instruction" hexmask.long.byte 0x00 8.--15. 1. " TCU ,Specifies color U for monochrome drawing with the TRI instruction" textline " " hexmask.long.byte 0x00 0.--7. 1. " TCY ,Specifies color Y for monochrome drawing with the TRI instruction" sif (cpu()=="R8A7792X") group.long 0xA0++0x03 line.long 0x00 "TRICR2,Triangle Color Register 2 " bitfld.long 0x00 26.--27. " TCV12 ,When V is to be output in 12 bpp specifies bits 11 and 10 of color V for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. " TCV10 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" textline " " bitfld.long 0x00 10.--11. " TCU12 ,When U is to be output in 12 bpp specifies bits 11 and 10 of color U for single-color drawing" "0,1,2,3" hexmask.long.word 0x00 0.--9. 1. " TCU10 ,When U is to be output in 10/12 bpp specifies bits 9 to 0 of color U for single-color drawing" endif group.long 0x70++0x0B line.long 0x00 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x00 8. " DDP ,Destination coordinates described in the DL and the registers related to the setting of destination coordinates" "Integer,Fixed-point" textline " " bitfld.long 0x00 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x04 "SUSR,Width Register" hexmask.long.word 0x04 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x04 0.--10. 1. " SVW ,Source width - 1" line.long 0x08 "SVSR,Source Height Register" hexmask.long.word 0x08 0.--10. 1. " SVS ,Height (vertical size) of the source" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" sif (cpu()=="R8A7792X") hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" endif else group.long 0x80++0x1f line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--9. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--9. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--9. 1. " XMAX ,X Clip MAX" line.long 0x0c "YMAXR,MAX Clipping Y Register" endif hexmask.long.word 0x0c 0.--11. 1. " YMAX ,Y Clip MAX" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" else line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--10. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--10. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--10. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1c "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1c 0.--10. 1. " AMYO ,Automatic Mesh Y Origin" endif tree.end sif (cpu()!="RCARH2")&&(cpu()!="R8A7792X") tree "Bud Access Control Register" group.long 0x100++0x07 line.long 0x00 "MACR1,Memory Access Control Register 1" bitfld.long 0x00 31. " QWSWPI ,Selects the endian of 64-bit units of 128 bits in the instruction fetch field (DL)" "Big,Little" bitfld.long 0x00 30. " QWSWPIC ,Selects the endian of 64-bit units of 128 bits for pixels" "Big,Little" textline " " bitfld.long 0x00 12. " EMAM ,Extended Memory Address Mode" "29-bit address,32-bit address" bitfld.long 0x00 9. " LWSWAP ,Selects the endian of a 64-bit unit in the instruction fetch field (DL)" "Big,Little" line.long 0x04 "MACR2,Memory Access Control Register 2" bitfld.long 0x04 15. " EDSWP ,Selects the endian of a 64-bit unit for pixels" "Big,Little" tree.end endif tree "Line Memory Control Registers" group.long 0xA00++0x0b line.long 0x00 "LSPR,Start Line Set Register" hexmask.long.word 0x00 0.--9. 1. " LSPR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x04 "LEPR,End Line Set Register" hexmask.long.word 0x04 0.--9. 1. " LEPR ,Number of the line beyond which the IMR-LSX does not leave the drawing waiting state after the execution of the SYNCW instruction" line.long 0x08 "LMSR,Mesh Sizer Register" sif (cpu()=="R8A7792X") bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,?..." else bitfld.long 0x08 0.--2. " LMSR ,Number of lines required to leave the drawing waiting state after the execution of the SYNCW instruction" ",,2,3,4,?..." endif group.long 0xA20++0x0b line.long 0x00 "LMCR,Line Memory Control Register" sif (cpu()=="R8A7792X") bitfld.long 0x00 14. " VIM ,Video Input Mode" "VIN,iVDP1C" bitfld.long 0x00 13. " JPE ,JPEG Image Format Select" "H.264,JPEG" bitfld.long 0x00 12. " ROSEL ,Capture Source iVDP1C Module Select" "Input 0,Input 1" textline " " endif sif (cpu()=="R8A7792X") bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,?..." else bitfld.long 0x00 8.--9. " DATSEL ,Capture-Source Module Select" "VIN0,VIN1,VIN2,VIN3" endif line.long 0x04 "LMSPPCR,Line Memory Pre-Clip Start Register" hexmask.long.word 0x04 0.--10. 1. " SPPC ,Pre-Clipping Start Point" line.long 0x08 "LMEPPCR,Line Memory Pre-Clip End Register" hexmask.long.word 0x08 0.--10. 1. " EPPC ,Pre-Clipping End Point" tree.end sif (cpu()=="R8A7792X") tree "Rendering Correction Registers" group.long 0xB0++0x03 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMIN ,Minimum luminance value when luminance correction is applied" group.long 0xB4++0x03 line.long 0x00 "UBMINR,Minimum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMIN ,Minimum U value when hue correction is applied" group.long 0xB8++0x03 line.long 0x00 "VRMINR,Minimum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMIN ,Minimum V value when hue correction is applied" group.long 0xBC++0x03 line.long 0x00 "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x00 0.--11. 1. " YLMAX ,Maximum luminance value when luminance correction is applied" group.long 0xC0++0x03 line.long 0x00 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.word 0x00 0.--11. 1. " UBMAX ,Maximum U value when hue correction is applied" group.long 0xC4++0x03 line.long 0x00 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.word 0x00 0.--11. 1. " VRMAX ,Maximum V value when hue correction is applied" group.long 0xD0++0x03 line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Number of bits after the decimal point for the value specified as the luminance correction scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,Number of bits after the decimal point for the value specified as the hue correction U value scale value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,Number of bits after the decimal point for the value specified as the hue correction V value scale value" "0,1,2,3,4,5,6,7" group.long 0xD4++0x03 line.long 0x00 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x00 8.--15. 1. " LSCAL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " LOFST ,Offset parameter" group.long 0xD8++0x03 line.long 0x00 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x00 8.--15. 1. " UBSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " UBOFS ,Offset parameter" group.long 0xDC++0x03 line.long 0x00 "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x00 8.--15. 1. " VRSCL ,Scale parameter" hexmask.long.byte 0x00 0.--7. 1. " VROFS ,Offset parameter" tree.end endif sif (cpu()=="R8A7792X") tree "Lookup Table Data Registers" group.long 0x1000++0x3 line.long 0x00 "LUTDR,Lookup Table Data Register" button "LUT" "d (lsx+0x1000)--(lsx+0x1FFC) /long" tree.end endif width 0xb tree.end tree.end tree.open "VPC (Video Processing Unit Cache)" tree "Channel 0" base ad:0xFE908000 width 8. group.long 0x04++0x03 line.long 0x00 "VPCCTL,Control Register" bitfld.long 0x00 28. " F64 ,64 Byte/Line cache mode" "Disabled,Enabled" bitfld.long 0x00 12. " LWSWAP ,Longword swap" "Not swapped,Swapped" bitfld.long 0x00 2.--3. " STRIDE ,VPC stride setting" "256-byte,512-byte,1024-byte,2048-byte" textline " " bitfld.long 0x00 1. " CLR ,VPC clear" "No effect,Cleared" bitfld.long 0x00 0. " ENB ,VPC enable" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "VPCSTS,Status Register" bitfld.long 0x00 0. " IDL ,VPC idle" "Busy,Idle" sif (cpu()=="RCARM2")||cpuis("R8A77940") group.long 0x78++0x03 line.long 0x00 "VPCCFG,Configuration Register" bitfld.long 0x00 19.--21. " CTLH ,Tile height size setting for chroma data" "32,64,128,256,512,16,," bitfld.long 0x00 16.--18. " CTLW ,Tile width size setting for chroma data" "32,64,128,256,512,16,," bitfld.long 0x00 5.--7. " YTLH ,Tile height size setting for luminance data" "32,64,128,256,512,16,," textline " " bitfld.long 0x00 2.--4. " YTLW ,Tile width size setting for luminance data" "32,64,128,256,512,16,," bitfld.long 0x00 1. " TL ,Tile mode setting" "Linear,Tile" bitfld.long 0x00 0. " MODE ,VPC addressing mode select" ",XY addressing" elif (cpu()=="R8A77470") textline " " group.long 0x78++0x03 line.long 0x00 "VPCCFG,Configuration Register" bitfld.long 0x00 19.--21. " CTLH ,Tile height size setting for chroma data" "32,64,128,256,512,16,?..." bitfld.long 0x00 16.--18. " CTLW ,Tile width size setting for chroma data" "32,64,128,256,512,16,?..." bitfld.long 0x00 5.--7. " YTLH ,Tile height size setting for luminance data" "32,64,128,256,512,16,?..." textline " " bitfld.long 0x00 2.--4. " YTLW ,Tile width size setting for luminance data" "32,64,128,256,512,16,?..." bitfld.long 0x00 1. " TL ,Tile mode setting" "Linear,Tile" bitfld.long 0x00 0. " MODE ,VPC addressing mode select" "Linear addressing,XY addressing" textline " " base ad:0xFE960380 group.long 0x00++0x03 line.long 0x00 "VPC0XY,XY Setting Register For Ch0" bitfld.long 0x00 4.--11. " STRIDE ,STRIDE bit" "32,64,128,256,512,16,?..." bitfld.long 0x00 3. " AC ,AC bit" "0,1" bitfld.long 0x00 1. " BT ,BT bit" "0,1" bitfld.long 0x00 0. " AD ,AD bit" "0,1" endif width 0x0B tree.end tree "Channel 1" base ad:0xFE918000 width 8. group.long 0x04++0x03 line.long 0x00 "VPCCTL,Control Register" bitfld.long 0x00 28. " F64 ,64 Byte/Line cache mode" "Disabled,Enabled" bitfld.long 0x00 12. " LWSWAP ,Longword swap" "Not swapped,Swapped" bitfld.long 0x00 2.--3. " STRIDE ,VPC stride setting" "256-byte,512-byte,1024-byte,2048-byte" textline " " bitfld.long 0x00 1. " CLR ,VPC clear" "No effect,Cleared" bitfld.long 0x00 0. " ENB ,VPC enable" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "VPCSTS,Status Register" bitfld.long 0x00 0. " IDL ,VPC idle" "Busy,Idle" sif (cpu()=="RCARM2")||cpuis("R8A77940") group.long 0x78++0x03 line.long 0x00 "VPCCFG,Configuration Register" bitfld.long 0x00 19.--21. " CTLH ,Tile height size setting for chroma data" "32,64,128,256,512,16,," bitfld.long 0x00 16.--18. " CTLW ,Tile width size setting for chroma data" "32,64,128,256,512,16,," bitfld.long 0x00 5.--7. " YTLH ,Tile height size setting for luminance data" "32,64,128,256,512,16,," textline " " bitfld.long 0x00 2.--4. " YTLW ,Tile width size setting for luminance data" "32,64,128,256,512,16,," bitfld.long 0x00 1. " TL ,Tile mode setting" "Linear,Tile" bitfld.long 0x00 0. " MODE ,VPC addressing mode select" ",XY addressing" elif (cpu()=="R8A77470") textline " " group.long 0x78++0x03 line.long 0x00 "VPCCFG,Configuration Register" bitfld.long 0x00 19.--21. " CTLH ,Tile height size setting for chroma data" "32,64,128,256,512,16,?..." bitfld.long 0x00 16.--18. " CTLW ,Tile width size setting for chroma data" "32,64,128,256,512,16,?..." bitfld.long 0x00 5.--7. " YTLH ,Tile height size setting for luminance data" "32,64,128,256,512,16,?..." textline " " bitfld.long 0x00 2.--4. " YTLW ,Tile width size setting for luminance data" "32,64,128,256,512,16,?..." bitfld.long 0x00 1. " TL ,Tile mode setting" "Linear,Tile" bitfld.long 0x00 0. " MODE ,VPC addressing mode select" "Linear addressing,XY addressing" textline " " base ad:0xFE960380 group.long 0x00++0x03 line.long 0x00 "VPC0XY,XY Setting Register For Ch0" bitfld.long 0x00 4.--11. " STRIDE ,STRIDE bit" "32,64,128,256,512,16,?..." bitfld.long 0x00 3. " AC ,AC bit" "0,1" bitfld.long 0x00 1. " BT ,BT bit" "0,1" bitfld.long 0x00 0. " AD ,AD bit" "0,1" endif width 0x0B tree.end tree.end tree.open "FDP1 (Fine Display Processor)" tree "Channel 0" base ad:0xFE940000 width 21. tree "General Control Registers" if (((per.l(ad:0xFE940000+0x08))&0x1)==0x1) group.long 0x00++0x03 line.long 0x00 "CTL_CMD,FDP1 Start Register" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" endif group.long 0x04++0x07 line.long 0x00 "CTL_SGCMD,Sync Generator Register" bitfld.long 0x00 0. " SGEN ,V-Sync generator enable" "Disabled,Enabled" line.long 0x04 "CTL_REGEND,Register Set End Register" bitfld.long 0x04 0. " REGEND ,Register set end flag" "Not set,Set" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77470")&&!cpuis("R8A77440")&&!cpuis("R8A77420")&&!cpuis("R8A77430")&&!cpuis("R8A77450") group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 9. " SMW ,SMW" "0,1" bitfld.long 0x00 8. " WR ,WR" "0,1" bitfld.long 0x00 3. " SMR ,SMR" "0,1" textline " " bitfld.long 0x00 2. " RD2 ,RD2" "0,1" bitfld.long 0x00 1. " RD1 ,RD1" "0,1" bitfld.long 0x00 0. " RD0 ,RD0" "0,1" else if (((per.l(ad:0xFE940000+0x10))&0x10)==0x00) if (((per.l(ad:0xFE940000+0x100))&0x07)==0x00) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,Second field,,,,,,,,Otherwise" elif (((per.l(ad:0xFE940000+0x100))&0x07)==0x01) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field/Fixed 2D,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,,,,,,,,," elif (((per.l(ad:0xFE940000+0x100))&0x07)==0x02) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,Second field,,,,,,,,Otherwise" elif (((per.l(ad:0xFE940000+0x100))&0x07)==0x03) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,Previous field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," elif (((per.l(ad:0xFE940000+0x100))&0x07)==0x04) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,Next field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," endif else if (((per.l(ad:0xFE940000+0x100))&0x07)==0x01) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field/Fixed 2D,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,,,,,,,,," else group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Progressive Mode,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," endif endif endif textline " " group.long 0x10++0x07 line.long 0x00 "CTL_OPMODE,Operation Mode Register" bitfld.long 0x00 4. " PRG ,Progressive mode" "Interlace,Progressive" bitfld.long 0x00 0.--1. " VIMD , V-Interruption mode" "Interrupt,Best Effort,No interrupt,?..." line.long 0x04 "CTL_VPERIOD,V-Period Register" sif !cpuis("R8A77440")&&!cpuis("R8A77420")&&!cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R8A77470") group.long 0x18++0x03 line.long 0x00 "CTL_CLKCTRL,Clock Control Register" bitfld.long 0x00 0. " CSTP_N ,CSTP_N" ",1" endif group.long 0x1C++0x03 line.long 0x00 "CTL_SRESET,Software Reset Register" bitfld.long 0x00 0. " SRST ,FDP1 software reset" "No reset,Reset" rgroup.long 0x24++0x07 line.long 0x00 "CTL_STATUS,Operating Status Register" hexmask.long.word 0x00 16.--31. 1. " VINT_CNT ,V-Sync interrupt counter status" bitfld.long 0x00 10. " SGREGSET ,Register set end status" "Not set,Set" bitfld.long 0x00 9. " SGVERR ,V-Sync end error status" "No error,Error" textline " " bitfld.long 0x00 8. " SGFREND ,Frame end status" "Not finished,Finished" bitfld.long 0x00 0. " BSY ,FDP1 operating status" "Stopped,Operated" line.long 0x04 "CTL_VCYCLE_STAT,V-Cycles Status Register" group.long 0x38++0x07 line.long 0x00 "CTL_IRQENB,Interrupt Enable Register" bitfld.long 0x00 16. " VERE ,Interrupt enable for V-Sync end error" "Disabled,Enabled" bitfld.long 0x00 4. " VINTE ,Interrupt enable for V-Sync" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for frame end" "Disabled,Enabled" line.long 0x04 "CTL_IRQSTA,Interrupt Status Register" bitfld.long 0x04 16. " VER ,Interrupt status for V-Sync end error" "No interrupt,Interrupt" bitfld.long 0x04 4. " VINT ,Interrupt status for V-Sync" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for frame end" "No interrupt,Interrupt" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") group.long 0x40++0x03 line.long 0x00 "CTL_IRQFSET,Interrupt Control Register" sif !cpuis("RCAR?3*")&&!cpuis("R8A77960*")&&!cpuis("R8A77951")&&!cpuis("R8A77951-*")&&!cpuis("R8A77995")&&!cpuis("R8A77990") bitfld.long 0x00 16. " VERS ,VERS" "0," bitfld.long 0x00 4. " VINTS ,VINTS" "0," textline " " endif bitfld.long 0x00 0. " FRES ,FRES" "0," endif tree.end width 19. tree "RPF Control Registers" group.long 0x60++0x0B line.long 0x00 "RPF_SIZE,Source Picture Size Register" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*") hexmask.long.word 0x00 16.--26. 1. " HSIZE ,Horizontal source picture size" hexmask.long.word 0x00 0.--10. 1. " VSIZE ,Vertical source picture size" else hexmask.long.word 0x00 16.--28. 1. " HSIZE ,Horizontal source picture size" hexmask.long.word 0x00 0.--12. 1. " VSIZE ,Vertical source picture size" endif line.long 0x04 "RPF_FORMAT,Source Picture Format Register" bitfld.long 0x04 16. " CIPM ,CIPM" "0,1" bitfld.long 0x04 13. " RSPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x04 12. " RSPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x04 8. " CF ,Current field" "Top,Bottom" hexmask.long.byte 0x04 0.--6. 1. " RDFMT ,RPF input image format setting" line.long 0x08 "RPF_PSTRIDE,Source Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " SRC_STRD_Y ,Memory stride of source picture Y plane" hexmask.long.word 0x08 0.--15. 1. " SRC_STRD_C ,Memory stride of source picture C plane" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A774*") group.long 0x6C++0x0B line.long 0x00 "RPF0_ADDR_Y,RPF0 Source Component-Y Address Register" line.long 0x04 "RPF0_ADDR_C0,RPF0 Source Component-C0 Address Register" line.long 0x08 "RPF0_ADDR_C1,RPF0 Source Component-C1 Address Register" group.long 0x78++0x0B line.long 0x00 "RPF1_ADDR_Y,RPF1 Source Component-Y Address Register" line.long 0x04 "RPF1_ADDR_C0,RPF1 Source Component-C0 Address Register" line.long 0x08 "RPF1_ADDR_C1,RPF1 Source Component-C1 Address Register" group.long 0x84++0x0B line.long 0x00 "RPF2_ADDR_Y,RPF2 Source Component-Y Address Register" line.long 0x04 "RPF2_ADDR_C0,RPF2 Source Component-C0 Address Register" line.long 0x08 "RPF2_ADDR_C1,RPF2 Source Component-C1 Address Register" else group.long 0x6C++0x03 line.long 0x00 "RPF0_ADDR_Y,RPF0 Source Component Y Address Register" group.long 0x78++0x03 line.long 0x00 "RPF1_ADDR_Y,RPF1 Source Component Y Address Register" group.long 0x7C++0x03 line.long 0x00 "RPF1_ADDR_C0,RPF1 Source Component C0 Address Register" group.long 0x80++0x03 line.long 0x00 "RPF1_ADDR_C1,RPF1 Source Component C1 Address Register" group.long 0x84++0x03 line.long 0x00 "RPF2_ADDR_Y,RPF2 Source Component Y Address Register" endif group.long 0x90++0x07 line.long 0x00 "RPF_SMSK_ADDR,Still Mask Address Register" line.long 0x04 "RPF_SWAP,RPF Data Swap Register" bitfld.long 0x04 3. " ISWAP[3] ,Input long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x04 2. " ISWAP[2] ,Input long word (32-bit) swap" "Not swapped,Swapped" bitfld.long 0x04 1. " ISWAP[1] ,Input word (16-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x04 0. " ISWAP[0] ,Input byte (8-bit) swap" "Not swapped,Swapped" tree.end width 17. tree "WPF Control Registers" group.long 0xC0++0x1B line.long 0x00 "WPF_FORMAT,Destination Picture Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*") bitfld.long 0x00 20. " FCNL ,Frame compress near lossless in FCPF" "Not compressed,Compressed" endif textline " " bitfld.long 0x00 15. " WSPYCS ,WPF output mode setting 1" "0,1" bitfld.long 0x00 14. " WSPUVS ,WPF output mode setting 2" "0,1" textline " " sif !cpuis("R8A774*") bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." else bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" endif bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr[16.235/240]->RGB[0.255],BT.601 YCbCr[0.255]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" line.long 0x04 "WPF_RNDCTL,Destination Picture Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction selection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." line.long 0x08 "WPF_PSTRIDE,Destination Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " DST_STRD_Y ,Memory stride of destination picture Y/RGB plane" hexmask.long.word 0x08 0.--15. 1. " DST_STRD_C ,Memory stride of destination picture C plane" line.long 0x0C "WPF_ADDR_Y,Destination Component-Y Address Register" line.long 0x10 "WPF_ADDR_C0,Destination Component-C0 Address Register" line.long 0x14 "WPF_ADDR_C1,Destination Component-C1 Address Register" line.long 0x18 "WPF_SWAP,WPF Data Swap Register" bitfld.long 0x18 7. " SSWAP[3] ,Long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 6. " SSWAP[2] ,Long word (32-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 5. " SSWAP[1] ,Word (16-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 4. " SSWAP[0] ,Byte (8-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 3. " 0SWAP[3] ,Output long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 2. " 0SWAP[2] ,Output long word (32-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 1. " 0SWAP[1] ,Output word (16-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 0. " 0SWAP[0] ,Output byte (8-bit) swap" "Not swapped,Swapped" tree.end width 21. tree "IPC Control Registers" group.long 0x100++0x0F line.long 0x00 "IPC_MODE,IPC Mode Register" bitfld.long 0x00 8. " DLI ,DLI" "0,1" bitfld.long 0x00 0.--2. " DIM ,De-Interlacing mode" "Adaptive 2D/3D,Fixed 2D,Fixed 3D,Select previous,Select next,?..." line.long 0x04 "IPC_SMSK_THRESH,Still Mask Threshold Register" bitfld.long 0x04 16. " FSM0 ,FSM0" "0,1" hexmask.long.byte 0x04 0.--7. 1. " SMSK_TH ,SMSK_TH" line.long 0x08 "IPC_COMB_DET,Comb Detection Parameter Register" hexmask.long.byte 0x08 16.--23. 1. " CMB_OFST ,CMB_OFST" hexmask.long.byte 0x08 8.--15. 1. " CMB_MAX ,CMB_MAX" hexmask.long.byte 0x08 0.--7. 1. " CMB_GRAD ,CMB_GRAD" line.long 0x0C "IPC_MOTDEC,Motion Decision Parameter Register" hexmask.long.byte 0x0C 8.--15. 1. " MOV_COEF ,MOV_COEF" hexmask.long.byte 0x0C 0.--7. 1. " STL_COEF ,STL_COEF" group.long 0x120++0x17 line.long 0x00 "IPC_DLI_BLEND,DLI Blend Parameter Register" hexmask.long.byte 0x00 16.--23. 1. " BLD_GRAD ,BLD_GRAD" hexmask.long.byte 0x00 8.--15. 1. " BLD_MAX ,BLD_MAX" hexmask.long.byte 0x00 0.--7. 1. " BLD_OFST ,BLD_OFST" line.long 0x04 "IPC_DLI_HGAIN,DLI Horizontal Frequency Gain Register" hexmask.long.byte 0x04 16.--23. 1. " HG_GRAD ,HG_GRAD" hexmask.long.byte 0x04 8.--15. 1. " HG_OFST ,HG_OFST" hexmask.long.byte 0x04 0.--7. 1. " HG_MAX ,HG_MAX" line.long 0x08 "IPC_DLI_SPRS,DLI Suppression Parameter register" hexmask.long.byte 0x08 16.--23. 1. " SPRS_GRAD ,SPRS_GRAD" hexmask.long.byte 0x08 8.--15. 1. " SPRS_OFST ,SPRS_OFST" hexmask.long.byte 0x08 0.--7. 1. " SPRS_MAX ,SPRS_MAX" line.long 0x0C "IPC_DLI_ANGLE,DLI Angle Parameter Register" hexmask.long.byte 0x0C 16.--23. 1. " ASEL45 ,ASEL45" hexmask.long.byte 0x0C 8.--15. 1. " ASEL22 ,ASEL22" hexmask.long.byte 0x0C 0.--7. 1. " ASEL15 ,ASEL15" line.long 0x10 "IPC_DLI_ISOPIX0,DLI Isolated Pixel Parameter Register 0" hexmask.long.byte 0x10 24.--31. 1. " IPIX_MAX45 ,IPIX_MAX45" hexmask.long.byte 0x10 16.--23. 1. " IPIX_GRAD45 ,IPIX_GRAD45" hexmask.long.byte 0x10 8.--15. 1. " IPIX_MAX22 ,IPIX_MAX22" textline " " hexmask.long.byte 0x10 0.--7. 1. " IPIX_GRAD22 ,IPIX_GRAD22" line.long 0x14 "IPC_DLI_ISOPIX1,DLI Isolated Pixel Parameter Register 1" hexmask.long.byte 0x14 8.--15. 1. " IPIX_MAX15 ,IPIX_MAX15" hexmask.long.byte 0x14 0.--7. 1. " IPIX_GRAD15 ,IPIX_GRAD15" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") group.long 0x140++0x07 line.long 0x00 "IPC_SENSOR_TH0,IPC Sensor Threshold Register 0" hexmask.long.byte 0x00 24.--31. 1. " VFQ_TH ,VFQ_TH" hexmask.long.byte 0x00 16.--23. 1. " HFQ_TH ,HFQ_TH" hexmask.long.byte 0x00 8.--15. 1. " DIF_TH ,DIF_TH" textline " " hexmask.long.byte 0x00 0.--7. 1. " SAD_TH ,SAD_TH" line.long 0x04 "IPC_SENSOR_TH1,IPC Sensor Threshold Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") hexmask.long.byte 0x04 16.--23. 1. " DETECTOR_SEL ,DETECTOR_SEL" else bitfld.long 0x04 16.--20. 1. " DETECTOR_SEL ,DETECTOR_SEL" "0,?..." endif hexmask.long.byte 0x04 8.--15. 1. " COMB_TH ,COMB_TH" textline " " hexmask.long.byte 0x04 0.--7. 1. " FREQ_TH ,FREQ_TH" group.long 0x170++0x0F line.long 0x00 "SENSOR_CTL0,Sensor Control Register 0" bitfld.long 0x00 12.--15. " FRM_LVTH ,FRM_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " FLD_LVTH ,FLD_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " FD_EN ,FD_EN" "0,1" line.long 0x04 "SENSOR_CTL1,Sensor Control Register 1" hexmask.long.word 0x04 16.--28. 1. " XS ,XS" hexmask.long.word 0x04 0.--12. 1. " YS ,YS" line.long 0x08 "SENSOR_CTL2,Sensor Control Register 2" hexmask.long.word 0x08 16.--28. 1. " XE ,XE" hexmask.long.word 0x08 0.--12. 1. " YE ,YE" line.long 0x0C "SENSOR_CTL3,Sensor Control Register 3" hexmask.long.word 0x0C 16.--28. 1. " POSX0 ,POSX0" hexmask.long.word 0x0C 0.--12. 1. " POSX1 ,POSX1" textline " " rgroup.long 0x180++0x03 line.long 0x00 "SENSOR_0,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x184++0x03 line.long 0x00 "SENSOR_1,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x188++0x03 line.long 0x00 "SENSOR_2,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x18C++0x03 line.long 0x00 "SENSOR_3,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x190++0x03 line.long 0x00 "SENSOR_4,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x194++0x03 line.long 0x00 "SENSOR_5,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x198++0x03 line.long 0x00 "SENSOR_6,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x19C++0x03 line.long 0x00 "SENSOR_7,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A0++0x03 line.long 0x00 "SENSOR_8,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A4++0x03 line.long 0x00 "SENSOR_9,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A8++0x03 line.long 0x00 "SENSOR_10,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1AC++0x03 line.long 0x00 "SENSOR_11,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B0++0x03 line.long 0x00 "SENSOR_12,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B4++0x03 line.long 0x00 "SENSOR_13,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B8++0x03 line.long 0x00 "SENSOR_14,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1BC++0x03 line.long 0x00 "SENSOR_15,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C0++0x03 line.long 0x00 "SENSOR_16,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C4++0x03 line.long 0x00 "SENSOR_17,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" endif group.long 0x1E0++0x03 line.long 0x00 "IPC_LMEM,Line Memory Pixel Number Register" hexmask.long.word 0x00 0.--11. 1. " PNUM ,PNUM" sif cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") rgroup.long 0x800++0x03 line.long 0x00 "IP_INTDATA,IP Internal Data" endif tree.end width 10. sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A774*") tree "MDET" group.long 0x2000++0x03 line.long 0x00 "MDET,2D Likelihood/2D-3D Blending Coefficient (Alpha)" button "MDET" "d (ad:0xFE940000+0x2000)--(ad:0xFE940000+0x23FF) /long" tree.end elif cpuis("R8A774*") width 14. textline " " group.long 0x1000++0x03 line.long 0x00 "LUT_DIF_ADJ,LUT DIF_ADJ" button "LUT_DIF_ADJ" "d (ad:0xFE940000+0x1000)--(ad:0xFE940000+0x13FF) /long" group.long 0x1400++0x03 line.long 0x00 "LUT_SAD_ADJ,LUT SAD_ADJ" button "LUT_SAD_ADJ" "d (ad:0xFE940000+0x1400)--(ad:0xFE940000+0x17FF) /long" group.long 0x1800++0x03 line.long 0x00 "LUT_BLD_GAIN,LUT BLD_GAIN" button "LUT_BLD_GAIN" "d (ad:0xFE940000+0x1800)--(ad:0xFE940000+0x1BFF) /long" group.long 0x1C00++0x03 line.long 0x00 "LUT_DIF_GAIN,LUT DIF_GAIN" button "LUT_DIF_GAIN" "d (ad:0xFE940000+0x1C00)--(ad:0xFE940000+0x1FFF) /long" group.long 0x2000++0x03 line.long 0x00 "LUT_MDET,LUT MDET" button "LUT_MDET" "d (ad:0xFE940000+0x2000)--(ad:0xFE940000+0x23FF) /long" else width 14. textline " " group.long 0x1000++0x03 line.long 0x00 "LUT_DIF_ADJ,LUT DIF_ADJ" button "LUT_DIF_ADJ" "d (ad:0xFE940000+0x1000)--(ad:0xFE940000+0x1402) /long" group.long 0x1400++0x03 line.long 0x00 "LUT_SAD_ADJ,LUT SAD_ADJ" button "LUT_SAD_ADJ" "d (ad:0xFE940000+0x1400)--(ad:0xFE940000+0x1802) /long" group.long 0x1800++0x03 line.long 0x00 "LUT_BLD_GAIN,LUT BLD_GAIN" button "LUT_BLD_GAIN" "d (ad:0xFE940000+0x1800)--(ad:0xFE940000+0x1C02) /long" group.long 0x1C00++0x03 line.long 0x00 "LUT_DIF_GAIN,LUT DIF_GAIN" button "LUT_DIF_GAIN" "d (ad:0xFE940000+0x1C00)--(ad:0xFE940000+0x2002) /long" group.long 0x2000++0x03 line.long 0x00 "LUT_MDET,LUT MDET" button "LUT_MDET" "d (ad:0xFE940000+0x2000)--(ad:0xFE940000+0x2402) /long" endif width 0x0B tree.end tree "Channel 1" base ad:0xFE944000 width 21. tree "General Control Registers" if (((per.l(ad:0xFE944000+0x08))&0x1)==0x1) group.long 0x00++0x03 line.long 0x00 "CTL_CMD,FDP1 Start Register" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" endif group.long 0x04++0x07 line.long 0x00 "CTL_SGCMD,Sync Generator Register" bitfld.long 0x00 0. " SGEN ,V-Sync generator enable" "Disabled,Enabled" line.long 0x04 "CTL_REGEND,Register Set End Register" bitfld.long 0x04 0. " REGEND ,Register set end flag" "Not set,Set" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77470")&&!cpuis("R8A77440")&&!cpuis("R8A77420")&&!cpuis("R8A77430")&&!cpuis("R8A77450") group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 9. " SMW ,SMW" "0,1" bitfld.long 0x00 8. " WR ,WR" "0,1" bitfld.long 0x00 3. " SMR ,SMR" "0,1" textline " " bitfld.long 0x00 2. " RD2 ,RD2" "0,1" bitfld.long 0x00 1. " RD1 ,RD1" "0,1" bitfld.long 0x00 0. " RD0 ,RD0" "0,1" else if (((per.l(ad:0xFE944000+0x10))&0x10)==0x00) if (((per.l(ad:0xFE944000+0x100))&0x07)==0x00) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,Second field,,,,,,,,Otherwise" elif (((per.l(ad:0xFE944000+0x100))&0x07)==0x01) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field/Fixed 2D,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,,,,,,,,," elif (((per.l(ad:0xFE944000+0x100))&0x07)==0x02) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,Second field,,,,,,,,Otherwise" elif (((per.l(ad:0xFE944000+0x100))&0x07)==0x03) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,Previous field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," elif (((per.l(ad:0xFE944000+0x100))&0x07)==0x04) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,Next field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," endif else if (((per.l(ad:0xFE944000+0x100))&0x07)==0x01) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field/Fixed 2D,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,,,,,,,,," else group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Progressive Mode,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," endif endif endif textline " " group.long 0x10++0x07 line.long 0x00 "CTL_OPMODE,Operation Mode Register" bitfld.long 0x00 4. " PRG ,Progressive mode" "Interlace,Progressive" bitfld.long 0x00 0.--1. " VIMD , V-Interruption mode" "Interrupt,Best Effort,No interrupt,?..." line.long 0x04 "CTL_VPERIOD,V-Period Register" sif !cpuis("R8A77440")&&!cpuis("R8A77420")&&!cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R8A77470") group.long 0x18++0x03 line.long 0x00 "CTL_CLKCTRL,Clock Control Register" bitfld.long 0x00 0. " CSTP_N ,CSTP_N" ",1" endif group.long 0x1C++0x03 line.long 0x00 "CTL_SRESET,Software Reset Register" bitfld.long 0x00 0. " SRST ,FDP1 software reset" "No reset,Reset" rgroup.long 0x24++0x07 line.long 0x00 "CTL_STATUS,Operating Status Register" hexmask.long.word 0x00 16.--31. 1. " VINT_CNT ,V-Sync interrupt counter status" bitfld.long 0x00 10. " SGREGSET ,Register set end status" "Not set,Set" bitfld.long 0x00 9. " SGVERR ,V-Sync end error status" "No error,Error" textline " " bitfld.long 0x00 8. " SGFREND ,Frame end status" "Not finished,Finished" bitfld.long 0x00 0. " BSY ,FDP1 operating status" "Stopped,Operated" line.long 0x04 "CTL_VCYCLE_STAT,V-Cycles Status Register" group.long 0x38++0x07 line.long 0x00 "CTL_IRQENB,Interrupt Enable Register" bitfld.long 0x00 16. " VERE ,Interrupt enable for V-Sync end error" "Disabled,Enabled" bitfld.long 0x00 4. " VINTE ,Interrupt enable for V-Sync" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for frame end" "Disabled,Enabled" line.long 0x04 "CTL_IRQSTA,Interrupt Status Register" bitfld.long 0x04 16. " VER ,Interrupt status for V-Sync end error" "No interrupt,Interrupt" bitfld.long 0x04 4. " VINT ,Interrupt status for V-Sync" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for frame end" "No interrupt,Interrupt" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") group.long 0x40++0x03 line.long 0x00 "CTL_IRQFSET,Interrupt Control Register" sif !cpuis("RCAR?3*")&&!cpuis("R8A77960*")&&!cpuis("R8A77951")&&!cpuis("R8A77951-*")&&!cpuis("R8A77995")&&!cpuis("R8A77990") bitfld.long 0x00 16. " VERS ,VERS" "0," bitfld.long 0x00 4. " VINTS ,VINTS" "0," textline " " endif bitfld.long 0x00 0. " FRES ,FRES" "0," endif tree.end width 19. tree "RPF Control Registers" group.long 0x60++0x0B line.long 0x00 "RPF_SIZE,Source Picture Size Register" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*") hexmask.long.word 0x00 16.--26. 1. " HSIZE ,Horizontal source picture size" hexmask.long.word 0x00 0.--10. 1. " VSIZE ,Vertical source picture size" else hexmask.long.word 0x00 16.--28. 1. " HSIZE ,Horizontal source picture size" hexmask.long.word 0x00 0.--12. 1. " VSIZE ,Vertical source picture size" endif line.long 0x04 "RPF_FORMAT,Source Picture Format Register" bitfld.long 0x04 16. " CIPM ,CIPM" "0,1" bitfld.long 0x04 13. " RSPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x04 12. " RSPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x04 8. " CF ,Current field" "Top,Bottom" hexmask.long.byte 0x04 0.--6. 1. " RDFMT ,RPF input image format setting" line.long 0x08 "RPF_PSTRIDE,Source Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " SRC_STRD_Y ,Memory stride of source picture Y plane" hexmask.long.word 0x08 0.--15. 1. " SRC_STRD_C ,Memory stride of source picture C plane" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A774*") group.long 0x6C++0x0B line.long 0x00 "RPF0_ADDR_Y,RPF0 Source Component-Y Address Register" line.long 0x04 "RPF0_ADDR_C0,RPF0 Source Component-C0 Address Register" line.long 0x08 "RPF0_ADDR_C1,RPF0 Source Component-C1 Address Register" group.long 0x78++0x0B line.long 0x00 "RPF1_ADDR_Y,RPF1 Source Component-Y Address Register" line.long 0x04 "RPF1_ADDR_C0,RPF1 Source Component-C0 Address Register" line.long 0x08 "RPF1_ADDR_C1,RPF1 Source Component-C1 Address Register" group.long 0x84++0x0B line.long 0x00 "RPF2_ADDR_Y,RPF2 Source Component-Y Address Register" line.long 0x04 "RPF2_ADDR_C0,RPF2 Source Component-C0 Address Register" line.long 0x08 "RPF2_ADDR_C1,RPF2 Source Component-C1 Address Register" else group.long 0x6C++0x03 line.long 0x00 "RPF0_ADDR_Y,RPF0 Source Component Y Address Register" group.long 0x78++0x03 line.long 0x00 "RPF1_ADDR_Y,RPF1 Source Component Y Address Register" group.long 0x7C++0x03 line.long 0x00 "RPF1_ADDR_C0,RPF1 Source Component C0 Address Register" group.long 0x80++0x03 line.long 0x00 "RPF1_ADDR_C1,RPF1 Source Component C1 Address Register" group.long 0x84++0x03 line.long 0x00 "RPF2_ADDR_Y,RPF2 Source Component Y Address Register" endif group.long 0x90++0x07 line.long 0x00 "RPF_SMSK_ADDR,Still Mask Address Register" line.long 0x04 "RPF_SWAP,RPF Data Swap Register" bitfld.long 0x04 3. " ISWAP[3] ,Input long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x04 2. " ISWAP[2] ,Input long word (32-bit) swap" "Not swapped,Swapped" bitfld.long 0x04 1. " ISWAP[1] ,Input word (16-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x04 0. " ISWAP[0] ,Input byte (8-bit) swap" "Not swapped,Swapped" tree.end width 17. tree "WPF Control Registers" group.long 0xC0++0x1B line.long 0x00 "WPF_FORMAT,Destination Picture Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*") bitfld.long 0x00 20. " FCNL ,Frame compress near lossless in FCPF" "Not compressed,Compressed" endif textline " " bitfld.long 0x00 15. " WSPYCS ,WPF output mode setting 1" "0,1" bitfld.long 0x00 14. " WSPUVS ,WPF output mode setting 2" "0,1" textline " " sif !cpuis("R8A774*") bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." else bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" endif bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr[16.235/240]->RGB[0.255],BT.601 YCbCr[0.255]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" line.long 0x04 "WPF_RNDCTL,Destination Picture Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction selection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." line.long 0x08 "WPF_PSTRIDE,Destination Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " DST_STRD_Y ,Memory stride of destination picture Y/RGB plane" hexmask.long.word 0x08 0.--15. 1. " DST_STRD_C ,Memory stride of destination picture C plane" line.long 0x0C "WPF_ADDR_Y,Destination Component-Y Address Register" line.long 0x10 "WPF_ADDR_C0,Destination Component-C0 Address Register" line.long 0x14 "WPF_ADDR_C1,Destination Component-C1 Address Register" line.long 0x18 "WPF_SWAP,WPF Data Swap Register" bitfld.long 0x18 7. " SSWAP[3] ,Long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 6. " SSWAP[2] ,Long word (32-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 5. " SSWAP[1] ,Word (16-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 4. " SSWAP[0] ,Byte (8-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 3. " 0SWAP[3] ,Output long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 2. " 0SWAP[2] ,Output long word (32-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 1. " 0SWAP[1] ,Output word (16-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 0. " 0SWAP[0] ,Output byte (8-bit) swap" "Not swapped,Swapped" tree.end width 21. tree "IPC Control Registers" group.long 0x100++0x0F line.long 0x00 "IPC_MODE,IPC Mode Register" bitfld.long 0x00 8. " DLI ,DLI" "0,1" bitfld.long 0x00 0.--2. " DIM ,De-Interlacing mode" "Adaptive 2D/3D,Fixed 2D,Fixed 3D,Select previous,Select next,?..." line.long 0x04 "IPC_SMSK_THRESH,Still Mask Threshold Register" bitfld.long 0x04 16. " FSM0 ,FSM0" "0,1" hexmask.long.byte 0x04 0.--7. 1. " SMSK_TH ,SMSK_TH" line.long 0x08 "IPC_COMB_DET,Comb Detection Parameter Register" hexmask.long.byte 0x08 16.--23. 1. " CMB_OFST ,CMB_OFST" hexmask.long.byte 0x08 8.--15. 1. " CMB_MAX ,CMB_MAX" hexmask.long.byte 0x08 0.--7. 1. " CMB_GRAD ,CMB_GRAD" line.long 0x0C "IPC_MOTDEC,Motion Decision Parameter Register" hexmask.long.byte 0x0C 8.--15. 1. " MOV_COEF ,MOV_COEF" hexmask.long.byte 0x0C 0.--7. 1. " STL_COEF ,STL_COEF" group.long 0x120++0x17 line.long 0x00 "IPC_DLI_BLEND,DLI Blend Parameter Register" hexmask.long.byte 0x00 16.--23. 1. " BLD_GRAD ,BLD_GRAD" hexmask.long.byte 0x00 8.--15. 1. " BLD_MAX ,BLD_MAX" hexmask.long.byte 0x00 0.--7. 1. " BLD_OFST ,BLD_OFST" line.long 0x04 "IPC_DLI_HGAIN,DLI Horizontal Frequency Gain Register" hexmask.long.byte 0x04 16.--23. 1. " HG_GRAD ,HG_GRAD" hexmask.long.byte 0x04 8.--15. 1. " HG_OFST ,HG_OFST" hexmask.long.byte 0x04 0.--7. 1. " HG_MAX ,HG_MAX" line.long 0x08 "IPC_DLI_SPRS,DLI Suppression Parameter register" hexmask.long.byte 0x08 16.--23. 1. " SPRS_GRAD ,SPRS_GRAD" hexmask.long.byte 0x08 8.--15. 1. " SPRS_OFST ,SPRS_OFST" hexmask.long.byte 0x08 0.--7. 1. " SPRS_MAX ,SPRS_MAX" line.long 0x0C "IPC_DLI_ANGLE,DLI Angle Parameter Register" hexmask.long.byte 0x0C 16.--23. 1. " ASEL45 ,ASEL45" hexmask.long.byte 0x0C 8.--15. 1. " ASEL22 ,ASEL22" hexmask.long.byte 0x0C 0.--7. 1. " ASEL15 ,ASEL15" line.long 0x10 "IPC_DLI_ISOPIX0,DLI Isolated Pixel Parameter Register 0" hexmask.long.byte 0x10 24.--31. 1. " IPIX_MAX45 ,IPIX_MAX45" hexmask.long.byte 0x10 16.--23. 1. " IPIX_GRAD45 ,IPIX_GRAD45" hexmask.long.byte 0x10 8.--15. 1. " IPIX_MAX22 ,IPIX_MAX22" textline " " hexmask.long.byte 0x10 0.--7. 1. " IPIX_GRAD22 ,IPIX_GRAD22" line.long 0x14 "IPC_DLI_ISOPIX1,DLI Isolated Pixel Parameter Register 1" hexmask.long.byte 0x14 8.--15. 1. " IPIX_MAX15 ,IPIX_MAX15" hexmask.long.byte 0x14 0.--7. 1. " IPIX_GRAD15 ,IPIX_GRAD15" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") group.long 0x140++0x07 line.long 0x00 "IPC_SENSOR_TH0,IPC Sensor Threshold Register 0" hexmask.long.byte 0x00 24.--31. 1. " VFQ_TH ,VFQ_TH" hexmask.long.byte 0x00 16.--23. 1. " HFQ_TH ,HFQ_TH" hexmask.long.byte 0x00 8.--15. 1. " DIF_TH ,DIF_TH" textline " " hexmask.long.byte 0x00 0.--7. 1. " SAD_TH ,SAD_TH" line.long 0x04 "IPC_SENSOR_TH1,IPC Sensor Threshold Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") hexmask.long.byte 0x04 16.--23. 1. " DETECTOR_SEL ,DETECTOR_SEL" else bitfld.long 0x04 16.--20. 1. " DETECTOR_SEL ,DETECTOR_SEL" "0,?..." endif hexmask.long.byte 0x04 8.--15. 1. " COMB_TH ,COMB_TH" textline " " hexmask.long.byte 0x04 0.--7. 1. " FREQ_TH ,FREQ_TH" group.long 0x170++0x0F line.long 0x00 "SENSOR_CTL0,Sensor Control Register 0" bitfld.long 0x00 12.--15. " FRM_LVTH ,FRM_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " FLD_LVTH ,FLD_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " FD_EN ,FD_EN" "0,1" line.long 0x04 "SENSOR_CTL1,Sensor Control Register 1" hexmask.long.word 0x04 16.--28. 1. " XS ,XS" hexmask.long.word 0x04 0.--12. 1. " YS ,YS" line.long 0x08 "SENSOR_CTL2,Sensor Control Register 2" hexmask.long.word 0x08 16.--28. 1. " XE ,XE" hexmask.long.word 0x08 0.--12. 1. " YE ,YE" line.long 0x0C "SENSOR_CTL3,Sensor Control Register 3" hexmask.long.word 0x0C 16.--28. 1. " POSX0 ,POSX0" hexmask.long.word 0x0C 0.--12. 1. " POSX1 ,POSX1" textline " " rgroup.long 0x180++0x03 line.long 0x00 "SENSOR_0,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x184++0x03 line.long 0x00 "SENSOR_1,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x188++0x03 line.long 0x00 "SENSOR_2,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x18C++0x03 line.long 0x00 "SENSOR_3,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x190++0x03 line.long 0x00 "SENSOR_4,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x194++0x03 line.long 0x00 "SENSOR_5,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x198++0x03 line.long 0x00 "SENSOR_6,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x19C++0x03 line.long 0x00 "SENSOR_7,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A0++0x03 line.long 0x00 "SENSOR_8,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A4++0x03 line.long 0x00 "SENSOR_9,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A8++0x03 line.long 0x00 "SENSOR_10,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1AC++0x03 line.long 0x00 "SENSOR_11,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B0++0x03 line.long 0x00 "SENSOR_12,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B4++0x03 line.long 0x00 "SENSOR_13,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B8++0x03 line.long 0x00 "SENSOR_14,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1BC++0x03 line.long 0x00 "SENSOR_15,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C0++0x03 line.long 0x00 "SENSOR_16,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C4++0x03 line.long 0x00 "SENSOR_17,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" endif group.long 0x1E0++0x03 line.long 0x00 "IPC_LMEM,Line Memory Pixel Number Register" hexmask.long.word 0x00 0.--11. 1. " PNUM ,PNUM" sif cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") rgroup.long 0x800++0x03 line.long 0x00 "IP_INTDATA,IP Internal Data" endif tree.end width 10. sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A774*") tree "MDET" group.long 0x2000++0x03 line.long 0x00 "MDET,2D Likelihood/2D-3D Blending Coefficient (Alpha)" button "MDET" "d (ad:0xFE944000+0x2000)--(ad:0xFE944000+0x23FF) /long" tree.end elif cpuis("R8A774*") width 14. textline " " group.long 0x1000++0x03 line.long 0x00 "LUT_DIF_ADJ,LUT DIF_ADJ" button "LUT_DIF_ADJ" "d (ad:0xFE944000+0x1000)--(ad:0xFE944000+0x13FF) /long" group.long 0x1400++0x03 line.long 0x00 "LUT_SAD_ADJ,LUT SAD_ADJ" button "LUT_SAD_ADJ" "d (ad:0xFE944000+0x1400)--(ad:0xFE944000+0x17FF) /long" group.long 0x1800++0x03 line.long 0x00 "LUT_BLD_GAIN,LUT BLD_GAIN" button "LUT_BLD_GAIN" "d (ad:0xFE944000+0x1800)--(ad:0xFE944000+0x1BFF) /long" group.long 0x1C00++0x03 line.long 0x00 "LUT_DIF_GAIN,LUT DIF_GAIN" button "LUT_DIF_GAIN" "d (ad:0xFE944000+0x1C00)--(ad:0xFE944000+0x1FFF) /long" group.long 0x2000++0x03 line.long 0x00 "LUT_MDET,LUT MDET" button "LUT_MDET" "d (ad:0xFE944000+0x2000)--(ad:0xFE944000+0x23FF) /long" else width 14. textline " " group.long 0x1000++0x03 line.long 0x00 "LUT_DIF_ADJ,LUT DIF_ADJ" button "LUT_DIF_ADJ" "d (ad:0xFE944000+0x1000)--(ad:0xFE944000+0x1402) /long" group.long 0x1400++0x03 line.long 0x00 "LUT_SAD_ADJ,LUT SAD_ADJ" button "LUT_SAD_ADJ" "d (ad:0xFE944000+0x1400)--(ad:0xFE944000+0x1802) /long" group.long 0x1800++0x03 line.long 0x00 "LUT_BLD_GAIN,LUT BLD_GAIN" button "LUT_BLD_GAIN" "d (ad:0xFE944000+0x1800)--(ad:0xFE944000+0x1C02) /long" group.long 0x1C00++0x03 line.long 0x00 "LUT_DIF_GAIN,LUT DIF_GAIN" button "LUT_DIF_GAIN" "d (ad:0xFE944000+0x1C00)--(ad:0xFE944000+0x2002) /long" group.long 0x2000++0x03 line.long 0x00 "LUT_MDET,LUT MDET" button "LUT_MDET" "d (ad:0xFE944000+0x2000)--(ad:0xFE944000+0x2402) /long" endif width 0x0B tree.end tree "Channel 2" base ad:0xFE948000 width 21. tree "General Control Registers" if (((per.l(ad:0xFE948000+0x08))&0x1)==0x1) group.long 0x00++0x03 line.long 0x00 "CTL_CMD,FDP1 Start Register" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" endif group.long 0x04++0x07 line.long 0x00 "CTL_SGCMD,Sync Generator Register" bitfld.long 0x00 0. " SGEN ,V-Sync generator enable" "Disabled,Enabled" line.long 0x04 "CTL_REGEND,Register Set End Register" bitfld.long 0x04 0. " REGEND ,Register set end flag" "Not set,Set" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77470")&&!cpuis("R8A77440")&&!cpuis("R8A77420")&&!cpuis("R8A77430")&&!cpuis("R8A77450") group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 9. " SMW ,SMW" "0,1" bitfld.long 0x00 8. " WR ,WR" "0,1" bitfld.long 0x00 3. " SMR ,SMR" "0,1" textline " " bitfld.long 0x00 2. " RD2 ,RD2" "0,1" bitfld.long 0x00 1. " RD1 ,RD1" "0,1" bitfld.long 0x00 0. " RD0 ,RD0" "0,1" else if (((per.l(ad:0xFE948000+0x10))&0x10)==0x00) if (((per.l(ad:0xFE948000+0x100))&0x07)==0x00) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,Second field,,,,,,,,Otherwise" elif (((per.l(ad:0xFE948000+0x100))&0x07)==0x01) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field/Fixed 2D,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,,,,,,,,," elif (((per.l(ad:0xFE948000+0x100))&0x07)==0x02) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,Second field,,,,,,,,Otherwise" elif (((per.l(ad:0xFE948000+0x100))&0x07)==0x03) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,Previous field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," elif (((per.l(ad:0xFE948000+0x100))&0x07)==0x04) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,Next field,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," endif else if (((per.l(ad:0xFE948000+0x100))&0x07)==0x01) group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Final field/Fixed 2D,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,First field,,,,,,,,,,,,," else group.long 0x0C++0x03 line.long 0x00 "CTL_CHACT,Channel Activation Register" bitfld.long 0x00 0.--3. 8.--9. " SMW|WR|SMR|RD2|RD1|RD0 ,SMW|WR|SMR|RD2|RD1|RD0" ",,,,,,,,,,,,,,,,,,Progressive Mode,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," endif endif endif textline " " group.long 0x10++0x07 line.long 0x00 "CTL_OPMODE,Operation Mode Register" bitfld.long 0x00 4. " PRG ,Progressive mode" "Interlace,Progressive" bitfld.long 0x00 0.--1. " VIMD , V-Interruption mode" "Interrupt,Best Effort,No interrupt,?..." line.long 0x04 "CTL_VPERIOD,V-Period Register" sif !cpuis("R8A77440")&&!cpuis("R8A77420")&&!cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R8A77470") group.long 0x18++0x03 line.long 0x00 "CTL_CLKCTRL,Clock Control Register" bitfld.long 0x00 0. " CSTP_N ,CSTP_N" ",1" endif group.long 0x1C++0x03 line.long 0x00 "CTL_SRESET,Software Reset Register" bitfld.long 0x00 0. " SRST ,FDP1 software reset" "No reset,Reset" rgroup.long 0x24++0x07 line.long 0x00 "CTL_STATUS,Operating Status Register" hexmask.long.word 0x00 16.--31. 1. " VINT_CNT ,V-Sync interrupt counter status" bitfld.long 0x00 10. " SGREGSET ,Register set end status" "Not set,Set" bitfld.long 0x00 9. " SGVERR ,V-Sync end error status" "No error,Error" textline " " bitfld.long 0x00 8. " SGFREND ,Frame end status" "Not finished,Finished" bitfld.long 0x00 0. " BSY ,FDP1 operating status" "Stopped,Operated" line.long 0x04 "CTL_VCYCLE_STAT,V-Cycles Status Register" group.long 0x38++0x07 line.long 0x00 "CTL_IRQENB,Interrupt Enable Register" bitfld.long 0x00 16. " VERE ,Interrupt enable for V-Sync end error" "Disabled,Enabled" bitfld.long 0x00 4. " VINTE ,Interrupt enable for V-Sync" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for frame end" "Disabled,Enabled" line.long 0x04 "CTL_IRQSTA,Interrupt Status Register" bitfld.long 0x04 16. " VER ,Interrupt status for V-Sync end error" "No interrupt,Interrupt" bitfld.long 0x04 4. " VINT ,Interrupt status for V-Sync" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for frame end" "No interrupt,Interrupt" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") group.long 0x40++0x03 line.long 0x00 "CTL_IRQFSET,Interrupt Control Register" sif !cpuis("RCAR?3*")&&!cpuis("R8A77960*")&&!cpuis("R8A77951")&&!cpuis("R8A77951-*")&&!cpuis("R8A77995")&&!cpuis("R8A77990") bitfld.long 0x00 16. " VERS ,VERS" "0," bitfld.long 0x00 4. " VINTS ,VINTS" "0," textline " " endif bitfld.long 0x00 0. " FRES ,FRES" "0," endif tree.end width 19. tree "RPF Control Registers" group.long 0x60++0x0B line.long 0x00 "RPF_SIZE,Source Picture Size Register" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*") hexmask.long.word 0x00 16.--26. 1. " HSIZE ,Horizontal source picture size" hexmask.long.word 0x00 0.--10. 1. " VSIZE ,Vertical source picture size" else hexmask.long.word 0x00 16.--28. 1. " HSIZE ,Horizontal source picture size" hexmask.long.word 0x00 0.--12. 1. " VSIZE ,Vertical source picture size" endif line.long 0x04 "RPF_FORMAT,Source Picture Format Register" bitfld.long 0x04 16. " CIPM ,CIPM" "0,1" bitfld.long 0x04 13. " RSPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x04 12. " RSPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x04 8. " CF ,Current field" "Top,Bottom" hexmask.long.byte 0x04 0.--6. 1. " RDFMT ,RPF input image format setting" line.long 0x08 "RPF_PSTRIDE,Source Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " SRC_STRD_Y ,Memory stride of source picture Y plane" hexmask.long.word 0x08 0.--15. 1. " SRC_STRD_C ,Memory stride of source picture C plane" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A774*") group.long 0x6C++0x0B line.long 0x00 "RPF0_ADDR_Y,RPF0 Source Component-Y Address Register" line.long 0x04 "RPF0_ADDR_C0,RPF0 Source Component-C0 Address Register" line.long 0x08 "RPF0_ADDR_C1,RPF0 Source Component-C1 Address Register" group.long 0x78++0x0B line.long 0x00 "RPF1_ADDR_Y,RPF1 Source Component-Y Address Register" line.long 0x04 "RPF1_ADDR_C0,RPF1 Source Component-C0 Address Register" line.long 0x08 "RPF1_ADDR_C1,RPF1 Source Component-C1 Address Register" group.long 0x84++0x0B line.long 0x00 "RPF2_ADDR_Y,RPF2 Source Component-Y Address Register" line.long 0x04 "RPF2_ADDR_C0,RPF2 Source Component-C0 Address Register" line.long 0x08 "RPF2_ADDR_C1,RPF2 Source Component-C1 Address Register" else group.long 0x6C++0x03 line.long 0x00 "RPF0_ADDR_Y,RPF0 Source Component Y Address Register" group.long 0x78++0x03 line.long 0x00 "RPF1_ADDR_Y,RPF1 Source Component Y Address Register" group.long 0x7C++0x03 line.long 0x00 "RPF1_ADDR_C0,RPF1 Source Component C0 Address Register" group.long 0x80++0x03 line.long 0x00 "RPF1_ADDR_C1,RPF1 Source Component C1 Address Register" group.long 0x84++0x03 line.long 0x00 "RPF2_ADDR_Y,RPF2 Source Component Y Address Register" endif group.long 0x90++0x07 line.long 0x00 "RPF_SMSK_ADDR,Still Mask Address Register" line.long 0x04 "RPF_SWAP,RPF Data Swap Register" bitfld.long 0x04 3. " ISWAP[3] ,Input long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x04 2. " ISWAP[2] ,Input long word (32-bit) swap" "Not swapped,Swapped" bitfld.long 0x04 1. " ISWAP[1] ,Input word (16-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x04 0. " ISWAP[0] ,Input byte (8-bit) swap" "Not swapped,Swapped" tree.end width 17. tree "WPF Control Registers" group.long 0xC0++0x1B line.long 0x00 "WPF_FORMAT,Destination Picture Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*") bitfld.long 0x00 20. " FCNL ,Frame compress near lossless in FCPF" "Not compressed,Compressed" endif textline " " bitfld.long 0x00 15. " WSPYCS ,WPF output mode setting 1" "0,1" bitfld.long 0x00 14. " WSPUVS ,WPF output mode setting 2" "0,1" textline " " sif !cpuis("R8A774*") bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." else bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,,Enabled" endif bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr[16.235/240]->RGB[0.255],BT.601 YCbCr[0.255]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" line.long 0x04 "WPF_RNDCTL,Destination Picture Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction selection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." line.long 0x08 "WPF_PSTRIDE,Destination Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " DST_STRD_Y ,Memory stride of destination picture Y/RGB plane" hexmask.long.word 0x08 0.--15. 1. " DST_STRD_C ,Memory stride of destination picture C plane" line.long 0x0C "WPF_ADDR_Y,Destination Component-Y Address Register" line.long 0x10 "WPF_ADDR_C0,Destination Component-C0 Address Register" line.long 0x14 "WPF_ADDR_C1,Destination Component-C1 Address Register" line.long 0x18 "WPF_SWAP,WPF Data Swap Register" bitfld.long 0x18 7. " SSWAP[3] ,Long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 6. " SSWAP[2] ,Long word (32-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 5. " SSWAP[1] ,Word (16-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 4. " SSWAP[0] ,Byte (8-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 3. " 0SWAP[3] ,Output long long word (64-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 2. " 0SWAP[2] ,Output long word (32-bit) swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 1. " 0SWAP[1] ,Output word (16-bit) swap" "Not swapped,Swapped" bitfld.long 0x18 0. " 0SWAP[0] ,Output byte (8-bit) swap" "Not swapped,Swapped" tree.end width 21. tree "IPC Control Registers" group.long 0x100++0x0F line.long 0x00 "IPC_MODE,IPC Mode Register" bitfld.long 0x00 8. " DLI ,DLI" "0,1" bitfld.long 0x00 0.--2. " DIM ,De-Interlacing mode" "Adaptive 2D/3D,Fixed 2D,Fixed 3D,Select previous,Select next,?..." line.long 0x04 "IPC_SMSK_THRESH,Still Mask Threshold Register" bitfld.long 0x04 16. " FSM0 ,FSM0" "0,1" hexmask.long.byte 0x04 0.--7. 1. " SMSK_TH ,SMSK_TH" line.long 0x08 "IPC_COMB_DET,Comb Detection Parameter Register" hexmask.long.byte 0x08 16.--23. 1. " CMB_OFST ,CMB_OFST" hexmask.long.byte 0x08 8.--15. 1. " CMB_MAX ,CMB_MAX" hexmask.long.byte 0x08 0.--7. 1. " CMB_GRAD ,CMB_GRAD" line.long 0x0C "IPC_MOTDEC,Motion Decision Parameter Register" hexmask.long.byte 0x0C 8.--15. 1. " MOV_COEF ,MOV_COEF" hexmask.long.byte 0x0C 0.--7. 1. " STL_COEF ,STL_COEF" group.long 0x120++0x17 line.long 0x00 "IPC_DLI_BLEND,DLI Blend Parameter Register" hexmask.long.byte 0x00 16.--23. 1. " BLD_GRAD ,BLD_GRAD" hexmask.long.byte 0x00 8.--15. 1. " BLD_MAX ,BLD_MAX" hexmask.long.byte 0x00 0.--7. 1. " BLD_OFST ,BLD_OFST" line.long 0x04 "IPC_DLI_HGAIN,DLI Horizontal Frequency Gain Register" hexmask.long.byte 0x04 16.--23. 1. " HG_GRAD ,HG_GRAD" hexmask.long.byte 0x04 8.--15. 1. " HG_OFST ,HG_OFST" hexmask.long.byte 0x04 0.--7. 1. " HG_MAX ,HG_MAX" line.long 0x08 "IPC_DLI_SPRS,DLI Suppression Parameter register" hexmask.long.byte 0x08 16.--23. 1. " SPRS_GRAD ,SPRS_GRAD" hexmask.long.byte 0x08 8.--15. 1. " SPRS_OFST ,SPRS_OFST" hexmask.long.byte 0x08 0.--7. 1. " SPRS_MAX ,SPRS_MAX" line.long 0x0C "IPC_DLI_ANGLE,DLI Angle Parameter Register" hexmask.long.byte 0x0C 16.--23. 1. " ASEL45 ,ASEL45" hexmask.long.byte 0x0C 8.--15. 1. " ASEL22 ,ASEL22" hexmask.long.byte 0x0C 0.--7. 1. " ASEL15 ,ASEL15" line.long 0x10 "IPC_DLI_ISOPIX0,DLI Isolated Pixel Parameter Register 0" hexmask.long.byte 0x10 24.--31. 1. " IPIX_MAX45 ,IPIX_MAX45" hexmask.long.byte 0x10 16.--23. 1. " IPIX_GRAD45 ,IPIX_GRAD45" hexmask.long.byte 0x10 8.--15. 1. " IPIX_MAX22 ,IPIX_MAX22" textline " " hexmask.long.byte 0x10 0.--7. 1. " IPIX_GRAD22 ,IPIX_GRAD22" line.long 0x14 "IPC_DLI_ISOPIX1,DLI Isolated Pixel Parameter Register 1" hexmask.long.byte 0x14 8.--15. 1. " IPIX_MAX15 ,IPIX_MAX15" hexmask.long.byte 0x14 0.--7. 1. " IPIX_GRAD15 ,IPIX_GRAD15" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") group.long 0x140++0x07 line.long 0x00 "IPC_SENSOR_TH0,IPC Sensor Threshold Register 0" hexmask.long.byte 0x00 24.--31. 1. " VFQ_TH ,VFQ_TH" hexmask.long.byte 0x00 16.--23. 1. " HFQ_TH ,HFQ_TH" hexmask.long.byte 0x00 8.--15. 1. " DIF_TH ,DIF_TH" textline " " hexmask.long.byte 0x00 0.--7. 1. " SAD_TH ,SAD_TH" line.long 0x04 "IPC_SENSOR_TH1,IPC Sensor Threshold Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") hexmask.long.byte 0x04 16.--23. 1. " DETECTOR_SEL ,DETECTOR_SEL" else bitfld.long 0x04 16.--20. 1. " DETECTOR_SEL ,DETECTOR_SEL" "0,?..." endif hexmask.long.byte 0x04 8.--15. 1. " COMB_TH ,COMB_TH" textline " " hexmask.long.byte 0x04 0.--7. 1. " FREQ_TH ,FREQ_TH" group.long 0x170++0x0F line.long 0x00 "SENSOR_CTL0,Sensor Control Register 0" bitfld.long 0x00 12.--15. " FRM_LVTH ,FRM_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " FLD_LVTH ,FLD_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " FD_EN ,FD_EN" "0,1" line.long 0x04 "SENSOR_CTL1,Sensor Control Register 1" hexmask.long.word 0x04 16.--28. 1. " XS ,XS" hexmask.long.word 0x04 0.--12. 1. " YS ,YS" line.long 0x08 "SENSOR_CTL2,Sensor Control Register 2" hexmask.long.word 0x08 16.--28. 1. " XE ,XE" hexmask.long.word 0x08 0.--12. 1. " YE ,YE" line.long 0x0C "SENSOR_CTL3,Sensor Control Register 3" hexmask.long.word 0x0C 16.--28. 1. " POSX0 ,POSX0" hexmask.long.word 0x0C 0.--12. 1. " POSX1 ,POSX1" textline " " rgroup.long 0x180++0x03 line.long 0x00 "SENSOR_0,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x184++0x03 line.long 0x00 "SENSOR_1,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x188++0x03 line.long 0x00 "SENSOR_2,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x18C++0x03 line.long 0x00 "SENSOR_3,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x190++0x03 line.long 0x00 "SENSOR_4,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x194++0x03 line.long 0x00 "SENSOR_5,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x198++0x03 line.long 0x00 "SENSOR_6,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x19C++0x03 line.long 0x00 "SENSOR_7,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A0++0x03 line.long 0x00 "SENSOR_8,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A4++0x03 line.long 0x00 "SENSOR_9,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A8++0x03 line.long 0x00 "SENSOR_10,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1AC++0x03 line.long 0x00 "SENSOR_11,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B0++0x03 line.long 0x00 "SENSOR_12,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B4++0x03 line.long 0x00 "SENSOR_13,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B8++0x03 line.long 0x00 "SENSOR_14,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1BC++0x03 line.long 0x00 "SENSOR_15,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C0++0x03 line.long 0x00 "SENSOR_16,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C4++0x03 line.long 0x00 "SENSOR_17,Sensor Register" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" endif group.long 0x1E0++0x03 line.long 0x00 "IPC_LMEM,Line Memory Pixel Number Register" hexmask.long.word 0x00 0.--11. 1. " PNUM ,PNUM" sif cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A774*") rgroup.long 0x800++0x03 line.long 0x00 "IP_INTDATA,IP Internal Data" endif tree.end width 10. sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A774*") tree "MDET" group.long 0x2000++0x03 line.long 0x00 "MDET,2D Likelihood/2D-3D Blending Coefficient (Alpha)" button "MDET" "d (ad:0xFE948000+0x2000)--(ad:0xFE948000+0x23FF) /long" tree.end elif cpuis("R8A774*") width 14. textline " " group.long 0x1000++0x03 line.long 0x00 "LUT_DIF_ADJ,LUT DIF_ADJ" button "LUT_DIF_ADJ" "d (ad:0xFE948000+0x1000)--(ad:0xFE948000+0x13FF) /long" group.long 0x1400++0x03 line.long 0x00 "LUT_SAD_ADJ,LUT SAD_ADJ" button "LUT_SAD_ADJ" "d (ad:0xFE948000+0x1400)--(ad:0xFE948000+0x17FF) /long" group.long 0x1800++0x03 line.long 0x00 "LUT_BLD_GAIN,LUT BLD_GAIN" button "LUT_BLD_GAIN" "d (ad:0xFE948000+0x1800)--(ad:0xFE948000+0x1BFF) /long" group.long 0x1C00++0x03 line.long 0x00 "LUT_DIF_GAIN,LUT DIF_GAIN" button "LUT_DIF_GAIN" "d (ad:0xFE948000+0x1C00)--(ad:0xFE948000+0x1FFF) /long" group.long 0x2000++0x03 line.long 0x00 "LUT_MDET,LUT MDET" button "LUT_MDET" "d (ad:0xFE948000+0x2000)--(ad:0xFE948000+0x23FF) /long" else width 14. textline " " group.long 0x1000++0x03 line.long 0x00 "LUT_DIF_ADJ,LUT DIF_ADJ" button "LUT_DIF_ADJ" "d (ad:0xFE948000+0x1000)--(ad:0xFE948000+0x1402) /long" group.long 0x1400++0x03 line.long 0x00 "LUT_SAD_ADJ,LUT SAD_ADJ" button "LUT_SAD_ADJ" "d (ad:0xFE948000+0x1400)--(ad:0xFE948000+0x1802) /long" group.long 0x1800++0x03 line.long 0x00 "LUT_BLD_GAIN,LUT BLD_GAIN" button "LUT_BLD_GAIN" "d (ad:0xFE948000+0x1800)--(ad:0xFE948000+0x1C02) /long" group.long 0x1C00++0x03 line.long 0x00 "LUT_DIF_GAIN,LUT DIF_GAIN" button "LUT_DIF_GAIN" "d (ad:0xFE948000+0x1C00)--(ad:0xFE948000+0x2002) /long" group.long 0x2000++0x03 line.long 0x00 "LUT_MDET,LUT MDET" button "LUT_MDET" "d (ad:0xFE948000+0x2000)--(ad:0xFE948000+0x2402) /long" endif width 0x0B tree.end tree.end tree.open "VSP1" tree "VSPR" base ad:0xFE920000 width 20. tree "General control registers" group.long 0x0++0x03 line.long 0x00 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x4++0x03 line.long 0x00 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x8++0x03 line.long 0x00 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0xC++0x03 line.long 0x00 "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x18++0x03 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic clock stop control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic clock stop control 2" group.long 0x28++0x03 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 software reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 software reset" "No reset,Reset" bitfld.long 0x00 1. " SRST1 ,WPF1 software reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " SRST0 ,WPF0 software reset" "No reset,Reset" rgroup.long 0x38++0x03 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 operating status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 operating status" "Stopped,Operated" bitfld.long 0x00 9. " SYS1_ACT ,WPF1 operating status" "Stopped,Operated" textline " " bitfld.long 0x00 8. " SYS0_ACT ,WPF0 operating status" "Stopped,Operated" group.long 0x48++0x07 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (frame end)" "No interrupt,Interrupt" group.long 0x50++0x07 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (frame end)" "No interrupt,Interrupt" group.long 0x58++0x07 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (frame end)" "No interrupt,Interrupt" group.long 0x60++0x07 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (frame end)" "No interrupt,Interrupt" group.long 0x78++0x07 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for display start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for display read data end" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 line data read end of RFP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 line data read end of RFP3" "Disabled,Enabled" bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 line data read end of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 line data read end of RFP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 line data read end of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for display start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for display read data end" "No interrupt,Interrupt" bitfld.long 0x04 4. " LNE4 ,Interrupt status for 1 line data read end of RFP4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 line data read end of RFP3" "No interrupt,Interrupt" bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 line data read end of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 line data read end of RFP1" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 line data read end of RFP0" "No interrupt,Interrupt" group.long 0x84++0x03 line.long 0x00 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF0 output lines" group.long 0x88++0x03 line.long 0x00 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF1 output lines" group.long 0x8C++0x03 line.long 0x00 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF2 output lines" group.long 0x90++0x03 line.long 0x00 "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF3 output lines" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display list control setting" bitfld.long 0x00 12. " DC2 ,Display list control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display list control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display list control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous frame mode for header-less display list" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less display list mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display list enable/disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display list data swapping in longword units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display list data swapping in word units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display list data swapping in byte units" "Disabled,Enabled" group.long 0x11C++0x07 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No wait for polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended display list command control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 5. " DLPRI ,Display list control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display list control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended display list" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display list body size register 0" bitfld.long 0x04 24. " UPD0 ,Update flag" "Not downloaded,Downloaded" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less display list body size" tree.end width 24. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" group.long 0x700++0x4B "RPF 4" line.long 0x00 "VI6_RPF4_SRC_BSIZE,RPF4 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF4_SRC_ESIZE,RPF4 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF4_INFMT,RPF4 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF4_DSWAP,RPF4 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF4_LOC,RPF4 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF4_ALPH_SEL,RPF4 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF4_VRTCOL_SET,RPF4 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF4_MSKCTRL,RPF4 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF4_MSKSET0,RPF4 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF4_MSKSET1,RPF4 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF4_CKEY_CTRL,RPF4 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF4_CKEY_SET0,RPF4 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF4_CKEY_SET1,RPF4 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF4_SRCM_PSTRIDE,RPF4 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF4_SRCM_ASTRIDE,RPF4 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF4_SRCM_ADDR_Y,RPF4 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF4_SRCM_ADDR_C0,RPF4 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF4_SRCM_ADDR_C1,RPF4 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF4_SRCM_ADDR_AI,RPF4 Source Alpha Address Register" tree.end width 25. tree "WPF Control Registers" group.long 0x1000++0x0B line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1000+0x0C)++0x03 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1000+0x10)++0x07 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE920000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1100++0x0B line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1100+0x0C)++0x03 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1100+0x10)++0x07 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE920000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1200++0x0B line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1200+0x0C)++0x03 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1200+0x10)++0x07 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE920000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1300++0x0B line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1300+0x0C)++0x03 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1300+0x10)++0x07 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE920000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif tree.end width 22. tree "DPR Control Registers" sif !cpuis("R8A77440") group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2010++0x03 line.long 0x00 "VI6_DPR_RPF4_ROUTE,RPF4 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF4 ,RPF4 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2010++0x03 line.long 0x00 "VI6_DPR_RPF4_ROUTE,RPF4 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF4 ,RPF4 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif cpuis("R8A77450")||cpuis("R8A77430") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif !cpuis("R8A77440") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x202C++0x03 line.long 0x00 "VI6_DPR_UDS1_ROUTE,UDS1 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2030++0x03 line.long 0x00 "VI6_DPR_UDS2_ROUTE,UDS2 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x2054++0x07 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target node index for HGO histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target node index for HGT histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. sif !cpuis("R8A77440") tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end else tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end endif width 23. sif !cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R8A77440") tree "UDS Control Registers" if (((per.l(ad:0xFE920000+0x2300))&0x100000)==0x000000) group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2300++0x0F line.long 0x00 "VI6_UDS0_SCALE,Scaling Factor Register 0" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS0_ALPTH,Alpha Data Threshold Setting Register 0" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS0_ALPVAL,Alpha Data Replacing Value Setting Register 0" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS0_PASS_BWIDTH,Passband Register 0" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2300+0x18)++0x03 line.long 0x00 "VI6_UDS0_IPC,2D IPC Setting Register 0" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2300+0x24)++0x07 line.long 0x00 "VI6_UDS0_CLIP_SIZE,UDS Output Size Clipping Register 0" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS0_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE920000+0x2400))&0x100000)==0x000000) group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2400++0x0F line.long 0x00 "VI6_UDS1_SCALE,Scaling Factor Register 1" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS1_ALPTH,Alpha Data Threshold Setting Register 1" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS1_ALPVAL,Alpha Data Replacing Value Setting Register 1" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS1_PASS_BWIDTH,Passband Register 1" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2400+0x18)++0x03 line.long 0x00 "VI6_UDS1_IPC,2D IPC Setting Register 1" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2400+0x24)++0x07 line.long 0x00 "VI6_UDS1_CLIP_SIZE,UDS Output Size Clipping Register 1" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS1_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE920000+0x2500))&0x100000)==0x000000) group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2500++0x0F line.long 0x00 "VI6_UDS2_SCALE,Scaling Factor Register 2" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS2_ALPTH,Alpha Data Threshold Setting Register 2" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS2_ALPVAL,Alpha Data Replacing Value Setting Register 2" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS2_PASS_BWIDTH,Passband Register 2" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2500+0x18)++0x03 line.long 0x00 "VI6_UDS2_IPC,2D IPC Setting Register 2" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2500+0x24)++0x07 line.long 0x00 "VI6_UDS2_CLIP_SIZE,UDS Output Size Clipping Register 2" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS2_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" tree.end endif width 14. tree "LUT Control Register" group.long 0x2800++0x03 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT enable/disable" "Disabled,Enabled" tree.end width 14. sif !cpuis("R8A77440") tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" sif cpuis("R8A774*") bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " endif bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end else tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end endif width 14. tree "HST Control Register" group.long 0x2A00++0x03 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV conversion enable/disable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x03 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV conversion enable/disable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color data normalization" "Not divided,Divided" bitfld.long 0x00 19. " D3ON ,Dithering enable of BRU input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering enable of BRU input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering enable of BRU input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering enable of BRU input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF horizontal size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF vertical size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal coordinate of virtual RPF location on master layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical coordinate of virtual RPF location on master layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed alpha of virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation type of blending/ROP unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input selection for DST side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x14 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x14 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation type of blending/ROP unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x1C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of blending/ROP unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x24 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha creation expression" "0,1" bitfld.long 0x24 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation type of blending/ROP unit D" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit D" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x2C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input selection for DST side of ROP unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 21. tree "HGO Control Registers" group.long 0x3000++0x2F line.long 0x00 "VI6_HGO_OFFSET,HGO Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Horizontal offset of histogram detection window" line.long 0x04 "VI6_HGO_SIZE,HGO Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram source component setting" "Disabled,Enabled" bitfld.long 0x08 6. " OFSB_R ,Offset binary mode for R/Cr/H component" "Straight,Offset" bitfld.long 0x08 5. " OFSB_G ,Offset binary mode for G/Y/S/max(RGB) component" "Straight,Offset" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset binary mode for B/Cb/V component" "Straight,Offset" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." line.long 0x0C "VI6_HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x10 "VI6_HGO_LB0_H,HGO Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x10 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x10 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x14 "VI6_HGO_LB0_V,HGO Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x14 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x14 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x18 "VI6_HGO_LB1_H,HGO Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x18 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x18 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x1C "VI6_HGO_LB1_V,HGO Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x1C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x1C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x20 "VI6_HGO_LB2_H,HGO Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x20 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x20 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x24 "VI6_HGO_LB2_V,HGO Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x24 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x24 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x28 "VI6_HGO_LB3_H,HGO Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x28 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x28 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x2C "VI6_HGO_LB3_V,HGO Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x2C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x2C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3030++0x03 line.long 0x00 "VI6_HGO_R_HISTO_0 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-R in the value range-0 " rgroup.long 0x3034++0x03 line.long 0x00 "VI6_HGO_R_HISTO_1 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-R in the value range-1 " rgroup.long 0x3038++0x03 line.long 0x00 "VI6_HGO_R_HISTO_2 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-R in the value range-2 " rgroup.long 0x303C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_3 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-R in the value range-3 " rgroup.long 0x3040++0x03 line.long 0x00 "VI6_HGO_R_HISTO_4 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-R in the value range-4 " rgroup.long 0x3044++0x03 line.long 0x00 "VI6_HGO_R_HISTO_5 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-R in the value range-5 " rgroup.long 0x3048++0x03 line.long 0x00 "VI6_HGO_R_HISTO_6 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-R in the value range-6 " rgroup.long 0x304C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_7 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-R in the value range-7 " rgroup.long 0x3050++0x03 line.long 0x00 "VI6_HGO_R_HISTO_8 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-R in the value range-8 " rgroup.long 0x3054++0x03 line.long 0x00 "VI6_HGO_R_HISTO_9 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-R in the value range-9 " rgroup.long 0x3058++0x03 line.long 0x00 "VI6_HGO_R_HISTO_10,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-R in the value range-10" rgroup.long 0x305C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_11,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-R in the value range-11" rgroup.long 0x3060++0x03 line.long 0x00 "VI6_HGO_R_HISTO_12,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-R in the value range-12" rgroup.long 0x3064++0x03 line.long 0x00 "VI6_HGO_R_HISTO_13,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-R in the value range-13" rgroup.long 0x3068++0x03 line.long 0x00 "VI6_HGO_R_HISTO_14,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-R in the value range-14" rgroup.long 0x306C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_15,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-R in the value range-15" rgroup.long 0x3070++0x03 line.long 0x00 "VI6_HGO_R_HISTO_16,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-R in the value range-16" rgroup.long 0x3074++0x03 line.long 0x00 "VI6_HGO_R_HISTO_17,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-R in the value range-17" rgroup.long 0x3078++0x03 line.long 0x00 "VI6_HGO_R_HISTO_18,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-R in the value range-18" rgroup.long 0x307C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_19,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-R in the value range-19" rgroup.long 0x3080++0x03 line.long 0x00 "VI6_HGO_R_HISTO_20,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-R in the value range-20" rgroup.long 0x3084++0x03 line.long 0x00 "VI6_HGO_R_HISTO_21,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-R in the value range-21" rgroup.long 0x3088++0x03 line.long 0x00 "VI6_HGO_R_HISTO_22,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-R in the value range-22" rgroup.long 0x308C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_23,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-R in the value range-23" rgroup.long 0x3090++0x03 line.long 0x00 "VI6_HGO_R_HISTO_24,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-R in the value range-24" rgroup.long 0x3094++0x03 line.long 0x00 "VI6_HGO_R_HISTO_25,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-R in the value range-25" rgroup.long 0x3098++0x03 line.long 0x00 "VI6_HGO_R_HISTO_26,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-R in the value range-26" rgroup.long 0x309C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_27,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-R in the value range-27" rgroup.long 0x30A0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_28,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-R in the value range-28" rgroup.long 0x30A4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_29,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-R in the value range-29" rgroup.long 0x30A8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_30,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-R in the value range-30" rgroup.long 0x30AC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_31,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-R in the value range-31" rgroup.long 0x30B0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_32,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-R in the value range-32" rgroup.long 0x30B4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_33,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-R in the value range-33" rgroup.long 0x30B8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_34,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-R in the value range-34" rgroup.long 0x30BC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_35,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-R in the value range-35" rgroup.long 0x30C0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_36,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-R in the value range-36" rgroup.long 0x30C4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_37,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-R in the value range-37" rgroup.long 0x30C8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_38,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-R in the value range-38" rgroup.long 0x30CC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_39,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-R in the value range-39" rgroup.long 0x30D0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_40,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-R in the value range-40" rgroup.long 0x30D4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_41,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-R in the value range-41" rgroup.long 0x30D8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_42,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-R in the value range-42" rgroup.long 0x30DC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_43,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-R in the value range-43" rgroup.long 0x30E0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_44,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-R in the value range-44" rgroup.long 0x30E4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_45,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-R in the value range-45" rgroup.long 0x30E8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_46,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-R in the value range-46" rgroup.long 0x30EC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_47,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-R in the value range-47" rgroup.long 0x30F0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_48,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-R in the value range-48" rgroup.long 0x30F4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_49,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-R in the value range-49" rgroup.long 0x30F8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_50,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-R in the value range-50" rgroup.long 0x30FC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_51,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-R in the value range-51" rgroup.long 0x3100++0x03 line.long 0x00 "VI6_HGO_R_HISTO_52,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-R in the value range-52" rgroup.long 0x3104++0x03 line.long 0x00 "VI6_HGO_R_HISTO_53,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-R in the value range-53" rgroup.long 0x3108++0x03 line.long 0x00 "VI6_HGO_R_HISTO_54,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-R in the value range-54" rgroup.long 0x310C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_55,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-R in the value range-55" rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_R_HISTO_56,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-R in the value range-56" rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_R_HISTO_57,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-R in the value range-57" rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_R_HISTO_58,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-R in the value range-58" rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_59,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-R in the value range-59" rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_R_HISTO_60,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-R in the value range-60" rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_R_HISTO_61,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-R in the value range-61" rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_R_HISTO_62,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-R in the value range-62" rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_63,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-R in the value range-63" rgroup.long 0x3130++0x0B line.long 0x00 "VI6_HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-R" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-R" line.long 0x04 "VI6_HGO_R_SUM,HGO Component-R Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-R" line.long 0x08 "VI6_HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-R" "0,1" sif (!cpuis("R8A774*")) rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3130++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3134++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3138++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x313C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" else rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x3210++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x3214++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x3218++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x321C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x3220++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x3224++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x3228++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x322C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3230++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3234++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3238++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x323C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" endif rgroup.long 0x3240++0x0B line.long 0x00 "VI6_HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-G" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-G" line.long 0x04 "VI6_HGO_G_SUM,HGO Component-G Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-G" line.long 0x08 "VI6_HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-G" "0,1" rgroup.long 0x3250++0x03 line.long 0x00 "VI6_HGO_B_HISTO_0 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-B in the value range-0 " rgroup.long 0x3254++0x03 line.long 0x00 "VI6_HGO_B_HISTO_1 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-B in the value range-1 " rgroup.long 0x3258++0x03 line.long 0x00 "VI6_HGO_B_HISTO_2 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-B in the value range-2 " rgroup.long 0x325C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_3 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-B in the value range-3 " rgroup.long 0x3260++0x03 line.long 0x00 "VI6_HGO_B_HISTO_4 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-B in the value range-4 " rgroup.long 0x3264++0x03 line.long 0x00 "VI6_HGO_B_HISTO_5 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-B in the value range-5 " rgroup.long 0x3268++0x03 line.long 0x00 "VI6_HGO_B_HISTO_6 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-B in the value range-6 " rgroup.long 0x326C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_7 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-B in the value range-7 " rgroup.long 0x3270++0x03 line.long 0x00 "VI6_HGO_B_HISTO_8 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-B in the value range-8 " rgroup.long 0x3274++0x03 line.long 0x00 "VI6_HGO_B_HISTO_9 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-B in the value range-9 " rgroup.long 0x3278++0x03 line.long 0x00 "VI6_HGO_B_HISTO_10,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-B in the value range-10" rgroup.long 0x327C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_11,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-B in the value range-11" rgroup.long 0x3280++0x03 line.long 0x00 "VI6_HGO_B_HISTO_12,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-B in the value range-12" rgroup.long 0x3284++0x03 line.long 0x00 "VI6_HGO_B_HISTO_13,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-B in the value range-13" rgroup.long 0x3288++0x03 line.long 0x00 "VI6_HGO_B_HISTO_14,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-B in the value range-14" rgroup.long 0x328C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_15,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-B in the value range-15" rgroup.long 0x3290++0x03 line.long 0x00 "VI6_HGO_B_HISTO_16,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-B in the value range-16" rgroup.long 0x3294++0x03 line.long 0x00 "VI6_HGO_B_HISTO_17,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-B in the value range-17" rgroup.long 0x3298++0x03 line.long 0x00 "VI6_HGO_B_HISTO_18,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-B in the value range-18" rgroup.long 0x329C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_19,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-B in the value range-19" rgroup.long 0x32A0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_20,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-B in the value range-20" rgroup.long 0x32A4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_21,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-B in the value range-21" rgroup.long 0x32A8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_22,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-B in the value range-22" rgroup.long 0x32AC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_23,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-B in the value range-23" rgroup.long 0x32B0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_24,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-B in the value range-24" rgroup.long 0x32B4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_25,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-B in the value range-25" rgroup.long 0x32B8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_26,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-B in the value range-26" rgroup.long 0x32BC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_27,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-B in the value range-27" rgroup.long 0x32C0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_28,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-B in the value range-28" rgroup.long 0x32C4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_29,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-B in the value range-29" rgroup.long 0x32C8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_30,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-B in the value range-30" rgroup.long 0x32CC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_31,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-B in the value range-31" rgroup.long 0x32D0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_32,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-B in the value range-32" rgroup.long 0x32D4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_33,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-B in the value range-33" rgroup.long 0x32D8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_34,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-B in the value range-34" rgroup.long 0x32DC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_35,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-B in the value range-35" rgroup.long 0x32E0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_36,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-B in the value range-36" rgroup.long 0x32E4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_37,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-B in the value range-37" rgroup.long 0x32E8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_38,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-B in the value range-38" rgroup.long 0x32EC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_39,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-B in the value range-39" rgroup.long 0x32F0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_40,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-B in the value range-40" rgroup.long 0x32F4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_41,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-B in the value range-41" rgroup.long 0x32F8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_42,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-B in the value range-42" rgroup.long 0x32FC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_43,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-B in the value range-43" rgroup.long 0x3300++0x03 line.long 0x00 "VI6_HGO_B_HISTO_44,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-B in the value range-44" rgroup.long 0x3304++0x03 line.long 0x00 "VI6_HGO_B_HISTO_45,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-B in the value range-45" rgroup.long 0x3308++0x03 line.long 0x00 "VI6_HGO_B_HISTO_46,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-B in the value range-46" rgroup.long 0x330C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_47,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-B in the value range-47" rgroup.long 0x3310++0x03 line.long 0x00 "VI6_HGO_B_HISTO_48,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-B in the value range-48" rgroup.long 0x3314++0x03 line.long 0x00 "VI6_HGO_B_HISTO_49,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-B in the value range-49" rgroup.long 0x3318++0x03 line.long 0x00 "VI6_HGO_B_HISTO_50,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-B in the value range-50" rgroup.long 0x331C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_51,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-B in the value range-51" rgroup.long 0x3320++0x03 line.long 0x00 "VI6_HGO_B_HISTO_52,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-B in the value range-52" rgroup.long 0x3324++0x03 line.long 0x00 "VI6_HGO_B_HISTO_53,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-B in the value range-53" rgroup.long 0x3328++0x03 line.long 0x00 "VI6_HGO_B_HISTO_54,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-B in the value range-54" rgroup.long 0x332C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_55,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-B in the value range-55" rgroup.long 0x3330++0x03 line.long 0x00 "VI6_HGO_B_HISTO_56,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-B in the value range-56" rgroup.long 0x3334++0x03 line.long 0x00 "VI6_HGO_B_HISTO_57,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-B in the value range-57" rgroup.long 0x3338++0x03 line.long 0x00 "VI6_HGO_B_HISTO_58,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-B in the value range-58" rgroup.long 0x333C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_59,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-B in the value range-59" rgroup.long 0x3340++0x03 line.long 0x00 "VI6_HGO_B_HISTO_60,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-B in the value range-60" rgroup.long 0x3344++0x03 line.long 0x00 "VI6_HGO_B_HISTO_61,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-B in the value range-61" rgroup.long 0x3348++0x03 line.long 0x00 "VI6_HGO_B_HISTO_62,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-B in the value range-62" rgroup.long 0x334C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_63,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-B in the value range-63" rgroup.long 0x3350++0x0B line.long 0x00 "VI6_HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of Component-B" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of Component-B" line.long 0x04 "VI6_HGO_B_SUM,HGO Component-B Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of Component-B" line.long 0x08 "VI6_HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for Component-B" "0,1" wgroup.long 0x33FC++0x03 line.long 0x00 "VI6_HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end width 20. sif !cpuis("R8A77440") tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection Zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end else tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister For LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register For LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister For LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register For LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister For LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register For LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister For LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register For LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of Hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of Hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of Hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of Hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of Hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of Hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of Hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of Hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of Hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of Hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of Hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of Hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of Hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of Hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of Hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of Hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of Hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of Hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of Hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of Hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of Hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of Hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of Hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of Hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of Hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of Hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of Hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of Hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of Hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of Hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of Hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of Hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end endif width 15. sif !cpuis("R8A77440") tree "LIF Control Registers" group.long 0x3B00++0x07 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer threshold for start ready notification to display module" bitfld.long 0x00 4. " CFMT ,Chroma format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External display module selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Enable/Disable of data output to external display module" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer threshold for clock stop in dynamic clock control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer threshold for clock start in dynamic clock control" tree.end else endif width 18. tree "Security Control Registers" group.long 0x3D00++0x07 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure attribute for Display List 3 registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure attribute for Display List 2 registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure attribute for Display List 1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure attribute for Display List 0 registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure attribute for WPF3 registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure attribute for WPF2 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure attribute for WPF1 registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure attribute for WPF0 registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure attribute for RPF4 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure attribute for RPF3 registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure attribute for RPF2 registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure attribute for RPF1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure attribute for RPF0 registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure attribute for LIF registers" "Non-secure,Secure" bitfld.long 0x04 13. " SCHGT ,Secure attribute for HGT registers" "Non-secure,Secure" bitfld.long 0x04 12. " SCHGO ,Secure attribute for HGO registers" "Non-secure,Secure" textline " " bitfld.long 0x04 10. " SCBRU ,Secure attribute for BRU registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure attribute for HSI registers" "Non-secure,Secure" bitfld.long 0x04 8. " SCHST ,Secure attribute for HST registers" "Non-secure,Secure" textline " " bitfld.long 0x04 7. " SCCLU ,Secure attribute for CLU registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure attribute for LUT registers" "Non-secure,Secure" bitfld.long 0x04 3. " SCUDS2 ,Secure attribute for UDS2 registers" "Non-secure,Secure" textline " " bitfld.long 0x04 2. " SCUDS1 ,Secure attribute for UDS1 registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure attribute for UDS0 registers" "Non-secure,Secure" bitfld.long 0x04 0. " SCSRU ,Secure attribute for SRU registers" "Non-secure,Secure" tree.end width 15. tree "CLUT" group.long 0x4000++0x03 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE920000+0x4000)--(ad:0xFE920000+0x43FF) /long" group.long 0x4400++0x03 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE920000+0x4000)--(ad:0xFE920000+0x43FF) /long" group.long 0x4800++0x03 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE920000+0x4000)--(ad:0xFE920000+0x43FF) /long" group.long 0x4C00++0x03 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE920000+0x4000)--(ad:0xFE920000+0x43FF) /long" tree.end width 14. tree "LUT" group.long 0x7000++0x03 "1D-LUT" line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE920000+0x7000)--(ad:0xFE920000+0x73FF) /long" sif !cpuis("R8A77440") group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" else group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" endif tree.end width 0xB tree.end tree "VSPS" base ad:0xFE928000 width 20. tree "General control registers" group.long 0x0++0x03 line.long 0x00 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x4++0x03 line.long 0x00 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x8++0x03 line.long 0x00 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0xC++0x03 line.long 0x00 "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x18++0x03 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic clock stop control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic clock stop control 2" group.long 0x28++0x03 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 software reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 software reset" "No reset,Reset" bitfld.long 0x00 1. " SRST1 ,WPF1 software reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " SRST0 ,WPF0 software reset" "No reset,Reset" rgroup.long 0x38++0x03 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 operating status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 operating status" "Stopped,Operated" bitfld.long 0x00 9. " SYS1_ACT ,WPF1 operating status" "Stopped,Operated" textline " " bitfld.long 0x00 8. " SYS0_ACT ,WPF0 operating status" "Stopped,Operated" group.long 0x48++0x07 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (frame end)" "No interrupt,Interrupt" group.long 0x50++0x07 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (frame end)" "No interrupt,Interrupt" group.long 0x58++0x07 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (frame end)" "No interrupt,Interrupt" group.long 0x60++0x07 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (frame end)" "No interrupt,Interrupt" group.long 0x78++0x07 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for display start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for display read data end" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 line data read end of RFP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 line data read end of RFP3" "Disabled,Enabled" bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 line data read end of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 line data read end of RFP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 line data read end of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for display start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for display read data end" "No interrupt,Interrupt" bitfld.long 0x04 4. " LNE4 ,Interrupt status for 1 line data read end of RFP4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 line data read end of RFP3" "No interrupt,Interrupt" bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 line data read end of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 line data read end of RFP1" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 line data read end of RFP0" "No interrupt,Interrupt" group.long 0x84++0x03 line.long 0x00 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF0 output lines" group.long 0x88++0x03 line.long 0x00 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF1 output lines" group.long 0x8C++0x03 line.long 0x00 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF2 output lines" group.long 0x90++0x03 line.long 0x00 "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF3 output lines" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display list control setting" bitfld.long 0x00 12. " DC2 ,Display list control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display list control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display list control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous frame mode for header-less display list" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less display list mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display list enable/disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display list data swapping in longword units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display list data swapping in word units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display list data swapping in byte units" "Disabled,Enabled" group.long 0x11C++0x07 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No wait for polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended display list command control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 5. " DLPRI ,Display list control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display list control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended display list" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display list body size register 0" bitfld.long 0x04 24. " UPD0 ,Update flag" "Not downloaded,Downloaded" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less display list body size" tree.end width 24. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" group.long 0x700++0x4B "RPF 4" line.long 0x00 "VI6_RPF4_SRC_BSIZE,RPF4 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF4_SRC_ESIZE,RPF4 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF4_INFMT,RPF4 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF4_DSWAP,RPF4 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF4_LOC,RPF4 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF4_ALPH_SEL,RPF4 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF4_VRTCOL_SET,RPF4 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF4_MSKCTRL,RPF4 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF4_MSKSET0,RPF4 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF4_MSKSET1,RPF4 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF4_CKEY_CTRL,RPF4 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF4_CKEY_SET0,RPF4 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF4_CKEY_SET1,RPF4 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF4_SRCM_PSTRIDE,RPF4 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF4_SRCM_ASTRIDE,RPF4 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF4_SRCM_ADDR_Y,RPF4 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF4_SRCM_ADDR_C0,RPF4 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF4_SRCM_ADDR_C1,RPF4 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF4_SRCM_ADDR_AI,RPF4 Source Alpha Address Register" tree.end width 25. tree "WPF Control Registers" group.long 0x1000++0x0B line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1000+0x0C)++0x03 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1000+0x10)++0x07 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1100++0x0B line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1100+0x0C)++0x03 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1100+0x10)++0x07 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1200++0x0B line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1200+0x0C)++0x03 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1200+0x10)++0x07 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1300++0x0B line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1300+0x0C)++0x03 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1300+0x10)++0x07 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif tree.end width 22. tree "DPR Control Registers" sif !cpuis("R8A77440") group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2010++0x03 line.long 0x00 "VI6_DPR_RPF4_ROUTE,RPF4 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF4 ,RPF4 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2010++0x03 line.long 0x00 "VI6_DPR_RPF4_ROUTE,RPF4 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF4 ,RPF4 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif cpuis("R8A77450")||cpuis("R8A77430") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif !cpuis("R8A77440") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x202C++0x03 line.long 0x00 "VI6_DPR_UDS1_ROUTE,UDS1 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2030++0x03 line.long 0x00 "VI6_DPR_UDS2_ROUTE,UDS2 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x2054++0x07 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target node index for HGO histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target node index for HGT histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. sif !cpuis("R8A77440") tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end else tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end endif width 23. sif !cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R8A77440") tree "UDS Control Registers" if (((per.l(ad:0xFE928000+0x2300))&0x100000)==0x000000) group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2300++0x0F line.long 0x00 "VI6_UDS0_SCALE,Scaling Factor Register 0" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS0_ALPTH,Alpha Data Threshold Setting Register 0" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS0_ALPVAL,Alpha Data Replacing Value Setting Register 0" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS0_PASS_BWIDTH,Passband Register 0" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2300+0x18)++0x03 line.long 0x00 "VI6_UDS0_IPC,2D IPC Setting Register 0" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2300+0x24)++0x07 line.long 0x00 "VI6_UDS0_CLIP_SIZE,UDS Output Size Clipping Register 0" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS0_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE928000+0x2400))&0x100000)==0x000000) group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2400++0x0F line.long 0x00 "VI6_UDS1_SCALE,Scaling Factor Register 1" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS1_ALPTH,Alpha Data Threshold Setting Register 1" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS1_ALPVAL,Alpha Data Replacing Value Setting Register 1" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS1_PASS_BWIDTH,Passband Register 1" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2400+0x18)++0x03 line.long 0x00 "VI6_UDS1_IPC,2D IPC Setting Register 1" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2400+0x24)++0x07 line.long 0x00 "VI6_UDS1_CLIP_SIZE,UDS Output Size Clipping Register 1" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS1_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE928000+0x2500))&0x100000)==0x000000) group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2500++0x0F line.long 0x00 "VI6_UDS2_SCALE,Scaling Factor Register 2" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS2_ALPTH,Alpha Data Threshold Setting Register 2" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS2_ALPVAL,Alpha Data Replacing Value Setting Register 2" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS2_PASS_BWIDTH,Passband Register 2" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2500+0x18)++0x03 line.long 0x00 "VI6_UDS2_IPC,2D IPC Setting Register 2" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2500+0x24)++0x07 line.long 0x00 "VI6_UDS2_CLIP_SIZE,UDS Output Size Clipping Register 2" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS2_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" tree.end endif width 14. tree "LUT Control Register" group.long 0x2800++0x03 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT enable/disable" "Disabled,Enabled" tree.end width 14. sif !cpuis("R8A77440") tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" sif cpuis("R8A774*") bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " endif bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end else tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end endif width 14. tree "HST Control Register" group.long 0x2A00++0x03 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV conversion enable/disable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x03 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV conversion enable/disable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color data normalization" "Not divided,Divided" bitfld.long 0x00 19. " D3ON ,Dithering enable of BRU input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering enable of BRU input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering enable of BRU input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering enable of BRU input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF horizontal size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF vertical size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal coordinate of virtual RPF location on master layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical coordinate of virtual RPF location on master layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed alpha of virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation type of blending/ROP unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input selection for DST side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x14 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x14 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation type of blending/ROP unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x1C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of blending/ROP unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x24 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha creation expression" "0,1" bitfld.long 0x24 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation type of blending/ROP unit D" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit D" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x2C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input selection for DST side of ROP unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 21. tree "HGO Control Registers" group.long 0x3000++0x2F line.long 0x00 "VI6_HGO_OFFSET,HGO Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Horizontal offset of histogram detection window" line.long 0x04 "VI6_HGO_SIZE,HGO Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram source component setting" "Disabled,Enabled" bitfld.long 0x08 6. " OFSB_R ,Offset binary mode for R/Cr/H component" "Straight,Offset" bitfld.long 0x08 5. " OFSB_G ,Offset binary mode for G/Y/S/max(RGB) component" "Straight,Offset" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset binary mode for B/Cb/V component" "Straight,Offset" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." line.long 0x0C "VI6_HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x10 "VI6_HGO_LB0_H,HGO Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x10 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x10 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x14 "VI6_HGO_LB0_V,HGO Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x14 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x14 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x18 "VI6_HGO_LB1_H,HGO Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x18 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x18 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x1C "VI6_HGO_LB1_V,HGO Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x1C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x1C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x20 "VI6_HGO_LB2_H,HGO Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x20 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x20 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x24 "VI6_HGO_LB2_V,HGO Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x24 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x24 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x28 "VI6_HGO_LB3_H,HGO Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x28 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x28 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x2C "VI6_HGO_LB3_V,HGO Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x2C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x2C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3030++0x03 line.long 0x00 "VI6_HGO_R_HISTO_0 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-R in the value range-0 " rgroup.long 0x3034++0x03 line.long 0x00 "VI6_HGO_R_HISTO_1 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-R in the value range-1 " rgroup.long 0x3038++0x03 line.long 0x00 "VI6_HGO_R_HISTO_2 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-R in the value range-2 " rgroup.long 0x303C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_3 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-R in the value range-3 " rgroup.long 0x3040++0x03 line.long 0x00 "VI6_HGO_R_HISTO_4 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-R in the value range-4 " rgroup.long 0x3044++0x03 line.long 0x00 "VI6_HGO_R_HISTO_5 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-R in the value range-5 " rgroup.long 0x3048++0x03 line.long 0x00 "VI6_HGO_R_HISTO_6 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-R in the value range-6 " rgroup.long 0x304C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_7 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-R in the value range-7 " rgroup.long 0x3050++0x03 line.long 0x00 "VI6_HGO_R_HISTO_8 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-R in the value range-8 " rgroup.long 0x3054++0x03 line.long 0x00 "VI6_HGO_R_HISTO_9 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-R in the value range-9 " rgroup.long 0x3058++0x03 line.long 0x00 "VI6_HGO_R_HISTO_10,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-R in the value range-10" rgroup.long 0x305C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_11,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-R in the value range-11" rgroup.long 0x3060++0x03 line.long 0x00 "VI6_HGO_R_HISTO_12,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-R in the value range-12" rgroup.long 0x3064++0x03 line.long 0x00 "VI6_HGO_R_HISTO_13,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-R in the value range-13" rgroup.long 0x3068++0x03 line.long 0x00 "VI6_HGO_R_HISTO_14,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-R in the value range-14" rgroup.long 0x306C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_15,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-R in the value range-15" rgroup.long 0x3070++0x03 line.long 0x00 "VI6_HGO_R_HISTO_16,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-R in the value range-16" rgroup.long 0x3074++0x03 line.long 0x00 "VI6_HGO_R_HISTO_17,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-R in the value range-17" rgroup.long 0x3078++0x03 line.long 0x00 "VI6_HGO_R_HISTO_18,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-R in the value range-18" rgroup.long 0x307C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_19,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-R in the value range-19" rgroup.long 0x3080++0x03 line.long 0x00 "VI6_HGO_R_HISTO_20,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-R in the value range-20" rgroup.long 0x3084++0x03 line.long 0x00 "VI6_HGO_R_HISTO_21,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-R in the value range-21" rgroup.long 0x3088++0x03 line.long 0x00 "VI6_HGO_R_HISTO_22,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-R in the value range-22" rgroup.long 0x308C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_23,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-R in the value range-23" rgroup.long 0x3090++0x03 line.long 0x00 "VI6_HGO_R_HISTO_24,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-R in the value range-24" rgroup.long 0x3094++0x03 line.long 0x00 "VI6_HGO_R_HISTO_25,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-R in the value range-25" rgroup.long 0x3098++0x03 line.long 0x00 "VI6_HGO_R_HISTO_26,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-R in the value range-26" rgroup.long 0x309C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_27,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-R in the value range-27" rgroup.long 0x30A0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_28,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-R in the value range-28" rgroup.long 0x30A4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_29,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-R in the value range-29" rgroup.long 0x30A8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_30,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-R in the value range-30" rgroup.long 0x30AC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_31,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-R in the value range-31" rgroup.long 0x30B0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_32,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-R in the value range-32" rgroup.long 0x30B4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_33,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-R in the value range-33" rgroup.long 0x30B8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_34,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-R in the value range-34" rgroup.long 0x30BC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_35,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-R in the value range-35" rgroup.long 0x30C0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_36,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-R in the value range-36" rgroup.long 0x30C4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_37,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-R in the value range-37" rgroup.long 0x30C8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_38,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-R in the value range-38" rgroup.long 0x30CC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_39,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-R in the value range-39" rgroup.long 0x30D0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_40,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-R in the value range-40" rgroup.long 0x30D4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_41,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-R in the value range-41" rgroup.long 0x30D8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_42,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-R in the value range-42" rgroup.long 0x30DC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_43,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-R in the value range-43" rgroup.long 0x30E0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_44,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-R in the value range-44" rgroup.long 0x30E4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_45,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-R in the value range-45" rgroup.long 0x30E8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_46,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-R in the value range-46" rgroup.long 0x30EC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_47,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-R in the value range-47" rgroup.long 0x30F0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_48,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-R in the value range-48" rgroup.long 0x30F4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_49,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-R in the value range-49" rgroup.long 0x30F8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_50,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-R in the value range-50" rgroup.long 0x30FC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_51,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-R in the value range-51" rgroup.long 0x3100++0x03 line.long 0x00 "VI6_HGO_R_HISTO_52,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-R in the value range-52" rgroup.long 0x3104++0x03 line.long 0x00 "VI6_HGO_R_HISTO_53,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-R in the value range-53" rgroup.long 0x3108++0x03 line.long 0x00 "VI6_HGO_R_HISTO_54,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-R in the value range-54" rgroup.long 0x310C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_55,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-R in the value range-55" rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_R_HISTO_56,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-R in the value range-56" rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_R_HISTO_57,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-R in the value range-57" rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_R_HISTO_58,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-R in the value range-58" rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_59,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-R in the value range-59" rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_R_HISTO_60,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-R in the value range-60" rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_R_HISTO_61,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-R in the value range-61" rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_R_HISTO_62,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-R in the value range-62" rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_63,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-R in the value range-63" rgroup.long 0x3130++0x0B line.long 0x00 "VI6_HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-R" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-R" line.long 0x04 "VI6_HGO_R_SUM,HGO Component-R Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-R" line.long 0x08 "VI6_HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-R" "0,1" sif (!cpuis("R8A774*")) rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3130++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3134++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3138++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x313C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" else rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x3210++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x3214++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x3218++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x321C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x3220++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x3224++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x3228++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x322C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3230++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3234++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3238++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x323C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" endif rgroup.long 0x3240++0x0B line.long 0x00 "VI6_HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-G" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-G" line.long 0x04 "VI6_HGO_G_SUM,HGO Component-G Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-G" line.long 0x08 "VI6_HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-G" "0,1" rgroup.long 0x3250++0x03 line.long 0x00 "VI6_HGO_B_HISTO_0 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-B in the value range-0 " rgroup.long 0x3254++0x03 line.long 0x00 "VI6_HGO_B_HISTO_1 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-B in the value range-1 " rgroup.long 0x3258++0x03 line.long 0x00 "VI6_HGO_B_HISTO_2 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-B in the value range-2 " rgroup.long 0x325C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_3 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-B in the value range-3 " rgroup.long 0x3260++0x03 line.long 0x00 "VI6_HGO_B_HISTO_4 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-B in the value range-4 " rgroup.long 0x3264++0x03 line.long 0x00 "VI6_HGO_B_HISTO_5 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-B in the value range-5 " rgroup.long 0x3268++0x03 line.long 0x00 "VI6_HGO_B_HISTO_6 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-B in the value range-6 " rgroup.long 0x326C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_7 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-B in the value range-7 " rgroup.long 0x3270++0x03 line.long 0x00 "VI6_HGO_B_HISTO_8 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-B in the value range-8 " rgroup.long 0x3274++0x03 line.long 0x00 "VI6_HGO_B_HISTO_9 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-B in the value range-9 " rgroup.long 0x3278++0x03 line.long 0x00 "VI6_HGO_B_HISTO_10,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-B in the value range-10" rgroup.long 0x327C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_11,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-B in the value range-11" rgroup.long 0x3280++0x03 line.long 0x00 "VI6_HGO_B_HISTO_12,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-B in the value range-12" rgroup.long 0x3284++0x03 line.long 0x00 "VI6_HGO_B_HISTO_13,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-B in the value range-13" rgroup.long 0x3288++0x03 line.long 0x00 "VI6_HGO_B_HISTO_14,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-B in the value range-14" rgroup.long 0x328C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_15,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-B in the value range-15" rgroup.long 0x3290++0x03 line.long 0x00 "VI6_HGO_B_HISTO_16,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-B in the value range-16" rgroup.long 0x3294++0x03 line.long 0x00 "VI6_HGO_B_HISTO_17,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-B in the value range-17" rgroup.long 0x3298++0x03 line.long 0x00 "VI6_HGO_B_HISTO_18,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-B in the value range-18" rgroup.long 0x329C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_19,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-B in the value range-19" rgroup.long 0x32A0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_20,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-B in the value range-20" rgroup.long 0x32A4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_21,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-B in the value range-21" rgroup.long 0x32A8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_22,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-B in the value range-22" rgroup.long 0x32AC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_23,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-B in the value range-23" rgroup.long 0x32B0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_24,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-B in the value range-24" rgroup.long 0x32B4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_25,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-B in the value range-25" rgroup.long 0x32B8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_26,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-B in the value range-26" rgroup.long 0x32BC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_27,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-B in the value range-27" rgroup.long 0x32C0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_28,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-B in the value range-28" rgroup.long 0x32C4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_29,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-B in the value range-29" rgroup.long 0x32C8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_30,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-B in the value range-30" rgroup.long 0x32CC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_31,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-B in the value range-31" rgroup.long 0x32D0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_32,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-B in the value range-32" rgroup.long 0x32D4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_33,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-B in the value range-33" rgroup.long 0x32D8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_34,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-B in the value range-34" rgroup.long 0x32DC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_35,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-B in the value range-35" rgroup.long 0x32E0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_36,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-B in the value range-36" rgroup.long 0x32E4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_37,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-B in the value range-37" rgroup.long 0x32E8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_38,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-B in the value range-38" rgroup.long 0x32EC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_39,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-B in the value range-39" rgroup.long 0x32F0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_40,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-B in the value range-40" rgroup.long 0x32F4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_41,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-B in the value range-41" rgroup.long 0x32F8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_42,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-B in the value range-42" rgroup.long 0x32FC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_43,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-B in the value range-43" rgroup.long 0x3300++0x03 line.long 0x00 "VI6_HGO_B_HISTO_44,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-B in the value range-44" rgroup.long 0x3304++0x03 line.long 0x00 "VI6_HGO_B_HISTO_45,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-B in the value range-45" rgroup.long 0x3308++0x03 line.long 0x00 "VI6_HGO_B_HISTO_46,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-B in the value range-46" rgroup.long 0x330C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_47,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-B in the value range-47" rgroup.long 0x3310++0x03 line.long 0x00 "VI6_HGO_B_HISTO_48,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-B in the value range-48" rgroup.long 0x3314++0x03 line.long 0x00 "VI6_HGO_B_HISTO_49,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-B in the value range-49" rgroup.long 0x3318++0x03 line.long 0x00 "VI6_HGO_B_HISTO_50,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-B in the value range-50" rgroup.long 0x331C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_51,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-B in the value range-51" rgroup.long 0x3320++0x03 line.long 0x00 "VI6_HGO_B_HISTO_52,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-B in the value range-52" rgroup.long 0x3324++0x03 line.long 0x00 "VI6_HGO_B_HISTO_53,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-B in the value range-53" rgroup.long 0x3328++0x03 line.long 0x00 "VI6_HGO_B_HISTO_54,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-B in the value range-54" rgroup.long 0x332C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_55,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-B in the value range-55" rgroup.long 0x3330++0x03 line.long 0x00 "VI6_HGO_B_HISTO_56,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-B in the value range-56" rgroup.long 0x3334++0x03 line.long 0x00 "VI6_HGO_B_HISTO_57,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-B in the value range-57" rgroup.long 0x3338++0x03 line.long 0x00 "VI6_HGO_B_HISTO_58,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-B in the value range-58" rgroup.long 0x333C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_59,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-B in the value range-59" rgroup.long 0x3340++0x03 line.long 0x00 "VI6_HGO_B_HISTO_60,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-B in the value range-60" rgroup.long 0x3344++0x03 line.long 0x00 "VI6_HGO_B_HISTO_61,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-B in the value range-61" rgroup.long 0x3348++0x03 line.long 0x00 "VI6_HGO_B_HISTO_62,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-B in the value range-62" rgroup.long 0x334C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_63,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-B in the value range-63" rgroup.long 0x3350++0x0B line.long 0x00 "VI6_HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of Component-B" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of Component-B" line.long 0x04 "VI6_HGO_B_SUM,HGO Component-B Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of Component-B" line.long 0x08 "VI6_HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for Component-B" "0,1" wgroup.long 0x33FC++0x03 line.long 0x00 "VI6_HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end width 20. sif !cpuis("R8A77440") tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection Zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end else tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister For LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register For LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister For LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register For LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister For LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register For LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister For LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register For LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of Hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of Hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of Hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of Hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of Hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of Hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of Hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of Hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of Hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of Hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of Hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of Hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of Hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of Hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of Hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of Hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of Hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of Hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of Hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of Hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of Hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of Hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of Hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of Hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of Hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of Hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of Hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of Hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of Hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of Hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of Hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of Hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end endif width 15. sif !cpuis("R8A77440") tree "LIF Control Registers" group.long 0x3B00++0x07 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer threshold for start ready notification to display module" bitfld.long 0x00 4. " CFMT ,Chroma format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External display module selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Enable/Disable of data output to external display module" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer threshold for clock stop in dynamic clock control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer threshold for clock start in dynamic clock control" tree.end else endif width 18. tree "Security Control Registers" group.long 0x3D00++0x07 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure attribute for Display List 3 registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure attribute for Display List 2 registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure attribute for Display List 1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure attribute for Display List 0 registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure attribute for WPF3 registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure attribute for WPF2 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure attribute for WPF1 registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure attribute for WPF0 registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure attribute for RPF4 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure attribute for RPF3 registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure attribute for RPF2 registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure attribute for RPF1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure attribute for RPF0 registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure attribute for LIF registers" "Non-secure,Secure" bitfld.long 0x04 13. " SCHGT ,Secure attribute for HGT registers" "Non-secure,Secure" bitfld.long 0x04 12. " SCHGO ,Secure attribute for HGO registers" "Non-secure,Secure" textline " " bitfld.long 0x04 10. " SCBRU ,Secure attribute for BRU registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure attribute for HSI registers" "Non-secure,Secure" bitfld.long 0x04 8. " SCHST ,Secure attribute for HST registers" "Non-secure,Secure" textline " " bitfld.long 0x04 7. " SCCLU ,Secure attribute for CLU registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure attribute for LUT registers" "Non-secure,Secure" bitfld.long 0x04 3. " SCUDS2 ,Secure attribute for UDS2 registers" "Non-secure,Secure" textline " " bitfld.long 0x04 2. " SCUDS1 ,Secure attribute for UDS1 registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure attribute for UDS0 registers" "Non-secure,Secure" bitfld.long 0x04 0. " SCSRU ,Secure attribute for SRU registers" "Non-secure,Secure" tree.end width 15. tree "CLUT" group.long 0x4000++0x03 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE928000+0x4000)--(ad:0xFE928000+0x43FF) /long" group.long 0x4400++0x03 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE928000+0x4000)--(ad:0xFE928000+0x43FF) /long" group.long 0x4800++0x03 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE928000+0x4000)--(ad:0xFE928000+0x43FF) /long" group.long 0x4C00++0x03 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE928000+0x4000)--(ad:0xFE928000+0x43FF) /long" tree.end width 14. tree "LUT" group.long 0x7000++0x03 "1D-LUT" line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE928000+0x7000)--(ad:0xFE928000+0x73FF) /long" sif !cpuis("R8A77440") group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" else group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" endif tree.end width 0xB tree.end tree "VSPD0" base ad:0xFE930000 width 20. tree "General control registers" group.long 0x0++0x03 line.long 0x00 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x4++0x03 line.long 0x00 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x8++0x03 line.long 0x00 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0xC++0x03 line.long 0x00 "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x18++0x03 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic clock stop control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic clock stop control 2" group.long 0x28++0x03 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 software reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 software reset" "No reset,Reset" bitfld.long 0x00 1. " SRST1 ,WPF1 software reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " SRST0 ,WPF0 software reset" "No reset,Reset" rgroup.long 0x38++0x03 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 operating status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 operating status" "Stopped,Operated" bitfld.long 0x00 9. " SYS1_ACT ,WPF1 operating status" "Stopped,Operated" textline " " bitfld.long 0x00 8. " SYS0_ACT ,WPF0 operating status" "Stopped,Operated" group.long 0x48++0x07 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (frame end)" "No interrupt,Interrupt" group.long 0x50++0x07 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (frame end)" "No interrupt,Interrupt" group.long 0x58++0x07 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (frame end)" "No interrupt,Interrupt" group.long 0x60++0x07 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (frame end)" "No interrupt,Interrupt" group.long 0x78++0x07 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for display start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for display read data end" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 line data read end of RFP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 line data read end of RFP3" "Disabled,Enabled" bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 line data read end of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 line data read end of RFP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 line data read end of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for display start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for display read data end" "No interrupt,Interrupt" bitfld.long 0x04 4. " LNE4 ,Interrupt status for 1 line data read end of RFP4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 line data read end of RFP3" "No interrupt,Interrupt" bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 line data read end of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 line data read end of RFP1" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 line data read end of RFP0" "No interrupt,Interrupt" group.long 0x84++0x03 line.long 0x00 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF0 output lines" group.long 0x88++0x03 line.long 0x00 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF1 output lines" group.long 0x8C++0x03 line.long 0x00 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF2 output lines" group.long 0x90++0x03 line.long 0x00 "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF3 output lines" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display list control setting" bitfld.long 0x00 12. " DC2 ,Display list control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display list control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display list control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous frame mode for header-less display list" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less display list mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display list enable/disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display list data swapping in longword units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display list data swapping in word units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display list data swapping in byte units" "Disabled,Enabled" group.long 0x11C++0x07 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No wait for polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended display list command control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 5. " DLPRI ,Display list control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display list control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended display list" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display list body size register 0" bitfld.long 0x04 24. " UPD0 ,Update flag" "Not downloaded,Downloaded" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less display list body size" tree.end width 24. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" tree.end width 25. tree "WPF Control Registers" group.long 0x1000++0x0B line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1000+0x0C)++0x03 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1000+0x10)++0x07 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1100++0x0B line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1100+0x0C)++0x03 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1100+0x10)++0x07 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1200++0x0B line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1200+0x0C)++0x03 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1200+0x10)++0x07 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1300++0x0B line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1300+0x0C)++0x03 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1300+0x10)++0x07 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif tree.end width 22. tree "DPR Control Registers" sif !cpuis("R8A77440") group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2010++0x03 line.long 0x00 "VI6_DPR_RPF4_ROUTE,RPF4 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF4 ,RPF4 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif cpuis("R8A77450")||cpuis("R8A77430") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif !cpuis("R8A77440") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x202C++0x03 line.long 0x00 "VI6_DPR_UDS1_ROUTE,UDS1 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2030++0x03 line.long 0x00 "VI6_DPR_UDS2_ROUTE,UDS2 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x2054++0x07 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target node index for HGO histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target node index for HGT histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. sif !cpuis("R8A77440") tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end else tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end endif width 23. sif !cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R8A77440") tree "UDS Control Registers" if (((per.l(ad:0xFE930000+0x2300))&0x100000)==0x000000) group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2300++0x0F line.long 0x00 "VI6_UDS0_SCALE,Scaling Factor Register 0" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS0_ALPTH,Alpha Data Threshold Setting Register 0" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS0_ALPVAL,Alpha Data Replacing Value Setting Register 0" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS0_PASS_BWIDTH,Passband Register 0" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2300+0x18)++0x03 line.long 0x00 "VI6_UDS0_IPC,2D IPC Setting Register 0" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2300+0x24)++0x07 line.long 0x00 "VI6_UDS0_CLIP_SIZE,UDS Output Size Clipping Register 0" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS0_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE930000+0x2400))&0x100000)==0x000000) group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2400++0x0F line.long 0x00 "VI6_UDS1_SCALE,Scaling Factor Register 1" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS1_ALPTH,Alpha Data Threshold Setting Register 1" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS1_ALPVAL,Alpha Data Replacing Value Setting Register 1" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS1_PASS_BWIDTH,Passband Register 1" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2400+0x18)++0x03 line.long 0x00 "VI6_UDS1_IPC,2D IPC Setting Register 1" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2400+0x24)++0x07 line.long 0x00 "VI6_UDS1_CLIP_SIZE,UDS Output Size Clipping Register 1" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS1_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE930000+0x2500))&0x100000)==0x000000) group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2500++0x0F line.long 0x00 "VI6_UDS2_SCALE,Scaling Factor Register 2" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS2_ALPTH,Alpha Data Threshold Setting Register 2" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS2_ALPVAL,Alpha Data Replacing Value Setting Register 2" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS2_PASS_BWIDTH,Passband Register 2" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2500+0x18)++0x03 line.long 0x00 "VI6_UDS2_IPC,2D IPC Setting Register 2" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2500+0x24)++0x07 line.long 0x00 "VI6_UDS2_CLIP_SIZE,UDS Output Size Clipping Register 2" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS2_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" tree.end endif width 14. tree "LUT Control Register" group.long 0x2800++0x03 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT enable/disable" "Disabled,Enabled" tree.end width 14. sif !cpuis("R8A77440") tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" sif cpuis("R8A774*") bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " endif bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end else tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end endif width 14. tree "HST Control Register" group.long 0x2A00++0x03 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV conversion enable/disable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x03 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV conversion enable/disable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color data normalization" "Not divided,Divided" bitfld.long 0x00 19. " D3ON ,Dithering enable of BRU input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering enable of BRU input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering enable of BRU input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering enable of BRU input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF horizontal size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF vertical size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal coordinate of virtual RPF location on master layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical coordinate of virtual RPF location on master layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed alpha of virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation type of blending/ROP unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input selection for DST side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x14 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x14 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation type of blending/ROP unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x1C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of blending/ROP unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x24 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha creation expression" "0,1" bitfld.long 0x24 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation type of blending/ROP unit D" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit D" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x2C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input selection for DST side of ROP unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 21. tree "HGO Control Registers" group.long 0x3000++0x2F line.long 0x00 "VI6_HGO_OFFSET,HGO Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Horizontal offset of histogram detection window" line.long 0x04 "VI6_HGO_SIZE,HGO Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram source component setting" "Disabled,Enabled" bitfld.long 0x08 6. " OFSB_R ,Offset binary mode for R/Cr/H component" "Straight,Offset" bitfld.long 0x08 5. " OFSB_G ,Offset binary mode for G/Y/S/max(RGB) component" "Straight,Offset" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset binary mode for B/Cb/V component" "Straight,Offset" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." line.long 0x0C "VI6_HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x10 "VI6_HGO_LB0_H,HGO Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x10 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x10 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x14 "VI6_HGO_LB0_V,HGO Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x14 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x14 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x18 "VI6_HGO_LB1_H,HGO Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x18 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x18 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x1C "VI6_HGO_LB1_V,HGO Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x1C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x1C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x20 "VI6_HGO_LB2_H,HGO Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x20 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x20 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x24 "VI6_HGO_LB2_V,HGO Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x24 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x24 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x28 "VI6_HGO_LB3_H,HGO Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x28 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x28 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x2C "VI6_HGO_LB3_V,HGO Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x2C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x2C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3030++0x03 line.long 0x00 "VI6_HGO_R_HISTO_0 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-R in the value range-0 " rgroup.long 0x3034++0x03 line.long 0x00 "VI6_HGO_R_HISTO_1 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-R in the value range-1 " rgroup.long 0x3038++0x03 line.long 0x00 "VI6_HGO_R_HISTO_2 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-R in the value range-2 " rgroup.long 0x303C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_3 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-R in the value range-3 " rgroup.long 0x3040++0x03 line.long 0x00 "VI6_HGO_R_HISTO_4 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-R in the value range-4 " rgroup.long 0x3044++0x03 line.long 0x00 "VI6_HGO_R_HISTO_5 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-R in the value range-5 " rgroup.long 0x3048++0x03 line.long 0x00 "VI6_HGO_R_HISTO_6 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-R in the value range-6 " rgroup.long 0x304C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_7 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-R in the value range-7 " rgroup.long 0x3050++0x03 line.long 0x00 "VI6_HGO_R_HISTO_8 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-R in the value range-8 " rgroup.long 0x3054++0x03 line.long 0x00 "VI6_HGO_R_HISTO_9 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-R in the value range-9 " rgroup.long 0x3058++0x03 line.long 0x00 "VI6_HGO_R_HISTO_10,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-R in the value range-10" rgroup.long 0x305C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_11,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-R in the value range-11" rgroup.long 0x3060++0x03 line.long 0x00 "VI6_HGO_R_HISTO_12,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-R in the value range-12" rgroup.long 0x3064++0x03 line.long 0x00 "VI6_HGO_R_HISTO_13,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-R in the value range-13" rgroup.long 0x3068++0x03 line.long 0x00 "VI6_HGO_R_HISTO_14,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-R in the value range-14" rgroup.long 0x306C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_15,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-R in the value range-15" rgroup.long 0x3070++0x03 line.long 0x00 "VI6_HGO_R_HISTO_16,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-R in the value range-16" rgroup.long 0x3074++0x03 line.long 0x00 "VI6_HGO_R_HISTO_17,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-R in the value range-17" rgroup.long 0x3078++0x03 line.long 0x00 "VI6_HGO_R_HISTO_18,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-R in the value range-18" rgroup.long 0x307C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_19,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-R in the value range-19" rgroup.long 0x3080++0x03 line.long 0x00 "VI6_HGO_R_HISTO_20,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-R in the value range-20" rgroup.long 0x3084++0x03 line.long 0x00 "VI6_HGO_R_HISTO_21,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-R in the value range-21" rgroup.long 0x3088++0x03 line.long 0x00 "VI6_HGO_R_HISTO_22,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-R in the value range-22" rgroup.long 0x308C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_23,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-R in the value range-23" rgroup.long 0x3090++0x03 line.long 0x00 "VI6_HGO_R_HISTO_24,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-R in the value range-24" rgroup.long 0x3094++0x03 line.long 0x00 "VI6_HGO_R_HISTO_25,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-R in the value range-25" rgroup.long 0x3098++0x03 line.long 0x00 "VI6_HGO_R_HISTO_26,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-R in the value range-26" rgroup.long 0x309C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_27,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-R in the value range-27" rgroup.long 0x30A0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_28,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-R in the value range-28" rgroup.long 0x30A4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_29,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-R in the value range-29" rgroup.long 0x30A8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_30,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-R in the value range-30" rgroup.long 0x30AC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_31,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-R in the value range-31" rgroup.long 0x30B0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_32,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-R in the value range-32" rgroup.long 0x30B4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_33,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-R in the value range-33" rgroup.long 0x30B8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_34,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-R in the value range-34" rgroup.long 0x30BC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_35,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-R in the value range-35" rgroup.long 0x30C0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_36,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-R in the value range-36" rgroup.long 0x30C4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_37,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-R in the value range-37" rgroup.long 0x30C8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_38,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-R in the value range-38" rgroup.long 0x30CC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_39,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-R in the value range-39" rgroup.long 0x30D0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_40,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-R in the value range-40" rgroup.long 0x30D4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_41,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-R in the value range-41" rgroup.long 0x30D8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_42,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-R in the value range-42" rgroup.long 0x30DC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_43,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-R in the value range-43" rgroup.long 0x30E0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_44,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-R in the value range-44" rgroup.long 0x30E4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_45,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-R in the value range-45" rgroup.long 0x30E8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_46,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-R in the value range-46" rgroup.long 0x30EC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_47,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-R in the value range-47" rgroup.long 0x30F0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_48,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-R in the value range-48" rgroup.long 0x30F4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_49,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-R in the value range-49" rgroup.long 0x30F8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_50,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-R in the value range-50" rgroup.long 0x30FC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_51,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-R in the value range-51" rgroup.long 0x3100++0x03 line.long 0x00 "VI6_HGO_R_HISTO_52,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-R in the value range-52" rgroup.long 0x3104++0x03 line.long 0x00 "VI6_HGO_R_HISTO_53,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-R in the value range-53" rgroup.long 0x3108++0x03 line.long 0x00 "VI6_HGO_R_HISTO_54,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-R in the value range-54" rgroup.long 0x310C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_55,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-R in the value range-55" rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_R_HISTO_56,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-R in the value range-56" rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_R_HISTO_57,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-R in the value range-57" rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_R_HISTO_58,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-R in the value range-58" rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_59,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-R in the value range-59" rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_R_HISTO_60,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-R in the value range-60" rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_R_HISTO_61,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-R in the value range-61" rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_R_HISTO_62,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-R in the value range-62" rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_63,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-R in the value range-63" rgroup.long 0x3130++0x0B line.long 0x00 "VI6_HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-R" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-R" line.long 0x04 "VI6_HGO_R_SUM,HGO Component-R Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-R" line.long 0x08 "VI6_HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-R" "0,1" sif (!cpuis("R8A774*")) rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3130++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3134++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3138++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x313C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" else rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x3210++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x3214++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x3218++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x321C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x3220++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x3224++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x3228++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x322C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3230++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3234++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3238++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x323C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" endif rgroup.long 0x3240++0x0B line.long 0x00 "VI6_HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-G" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-G" line.long 0x04 "VI6_HGO_G_SUM,HGO Component-G Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-G" line.long 0x08 "VI6_HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-G" "0,1" rgroup.long 0x3250++0x03 line.long 0x00 "VI6_HGO_B_HISTO_0 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-B in the value range-0 " rgroup.long 0x3254++0x03 line.long 0x00 "VI6_HGO_B_HISTO_1 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-B in the value range-1 " rgroup.long 0x3258++0x03 line.long 0x00 "VI6_HGO_B_HISTO_2 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-B in the value range-2 " rgroup.long 0x325C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_3 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-B in the value range-3 " rgroup.long 0x3260++0x03 line.long 0x00 "VI6_HGO_B_HISTO_4 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-B in the value range-4 " rgroup.long 0x3264++0x03 line.long 0x00 "VI6_HGO_B_HISTO_5 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-B in the value range-5 " rgroup.long 0x3268++0x03 line.long 0x00 "VI6_HGO_B_HISTO_6 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-B in the value range-6 " rgroup.long 0x326C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_7 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-B in the value range-7 " rgroup.long 0x3270++0x03 line.long 0x00 "VI6_HGO_B_HISTO_8 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-B in the value range-8 " rgroup.long 0x3274++0x03 line.long 0x00 "VI6_HGO_B_HISTO_9 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-B in the value range-9 " rgroup.long 0x3278++0x03 line.long 0x00 "VI6_HGO_B_HISTO_10,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-B in the value range-10" rgroup.long 0x327C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_11,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-B in the value range-11" rgroup.long 0x3280++0x03 line.long 0x00 "VI6_HGO_B_HISTO_12,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-B in the value range-12" rgroup.long 0x3284++0x03 line.long 0x00 "VI6_HGO_B_HISTO_13,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-B in the value range-13" rgroup.long 0x3288++0x03 line.long 0x00 "VI6_HGO_B_HISTO_14,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-B in the value range-14" rgroup.long 0x328C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_15,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-B in the value range-15" rgroup.long 0x3290++0x03 line.long 0x00 "VI6_HGO_B_HISTO_16,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-B in the value range-16" rgroup.long 0x3294++0x03 line.long 0x00 "VI6_HGO_B_HISTO_17,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-B in the value range-17" rgroup.long 0x3298++0x03 line.long 0x00 "VI6_HGO_B_HISTO_18,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-B in the value range-18" rgroup.long 0x329C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_19,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-B in the value range-19" rgroup.long 0x32A0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_20,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-B in the value range-20" rgroup.long 0x32A4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_21,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-B in the value range-21" rgroup.long 0x32A8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_22,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-B in the value range-22" rgroup.long 0x32AC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_23,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-B in the value range-23" rgroup.long 0x32B0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_24,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-B in the value range-24" rgroup.long 0x32B4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_25,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-B in the value range-25" rgroup.long 0x32B8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_26,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-B in the value range-26" rgroup.long 0x32BC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_27,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-B in the value range-27" rgroup.long 0x32C0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_28,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-B in the value range-28" rgroup.long 0x32C4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_29,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-B in the value range-29" rgroup.long 0x32C8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_30,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-B in the value range-30" rgroup.long 0x32CC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_31,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-B in the value range-31" rgroup.long 0x32D0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_32,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-B in the value range-32" rgroup.long 0x32D4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_33,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-B in the value range-33" rgroup.long 0x32D8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_34,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-B in the value range-34" rgroup.long 0x32DC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_35,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-B in the value range-35" rgroup.long 0x32E0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_36,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-B in the value range-36" rgroup.long 0x32E4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_37,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-B in the value range-37" rgroup.long 0x32E8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_38,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-B in the value range-38" rgroup.long 0x32EC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_39,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-B in the value range-39" rgroup.long 0x32F0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_40,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-B in the value range-40" rgroup.long 0x32F4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_41,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-B in the value range-41" rgroup.long 0x32F8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_42,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-B in the value range-42" rgroup.long 0x32FC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_43,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-B in the value range-43" rgroup.long 0x3300++0x03 line.long 0x00 "VI6_HGO_B_HISTO_44,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-B in the value range-44" rgroup.long 0x3304++0x03 line.long 0x00 "VI6_HGO_B_HISTO_45,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-B in the value range-45" rgroup.long 0x3308++0x03 line.long 0x00 "VI6_HGO_B_HISTO_46,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-B in the value range-46" rgroup.long 0x330C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_47,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-B in the value range-47" rgroup.long 0x3310++0x03 line.long 0x00 "VI6_HGO_B_HISTO_48,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-B in the value range-48" rgroup.long 0x3314++0x03 line.long 0x00 "VI6_HGO_B_HISTO_49,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-B in the value range-49" rgroup.long 0x3318++0x03 line.long 0x00 "VI6_HGO_B_HISTO_50,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-B in the value range-50" rgroup.long 0x331C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_51,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-B in the value range-51" rgroup.long 0x3320++0x03 line.long 0x00 "VI6_HGO_B_HISTO_52,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-B in the value range-52" rgroup.long 0x3324++0x03 line.long 0x00 "VI6_HGO_B_HISTO_53,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-B in the value range-53" rgroup.long 0x3328++0x03 line.long 0x00 "VI6_HGO_B_HISTO_54,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-B in the value range-54" rgroup.long 0x332C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_55,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-B in the value range-55" rgroup.long 0x3330++0x03 line.long 0x00 "VI6_HGO_B_HISTO_56,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-B in the value range-56" rgroup.long 0x3334++0x03 line.long 0x00 "VI6_HGO_B_HISTO_57,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-B in the value range-57" rgroup.long 0x3338++0x03 line.long 0x00 "VI6_HGO_B_HISTO_58,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-B in the value range-58" rgroup.long 0x333C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_59,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-B in the value range-59" rgroup.long 0x3340++0x03 line.long 0x00 "VI6_HGO_B_HISTO_60,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-B in the value range-60" rgroup.long 0x3344++0x03 line.long 0x00 "VI6_HGO_B_HISTO_61,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-B in the value range-61" rgroup.long 0x3348++0x03 line.long 0x00 "VI6_HGO_B_HISTO_62,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-B in the value range-62" rgroup.long 0x334C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_63,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-B in the value range-63" rgroup.long 0x3350++0x0B line.long 0x00 "VI6_HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of Component-B" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of Component-B" line.long 0x04 "VI6_HGO_B_SUM,HGO Component-B Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of Component-B" line.long 0x08 "VI6_HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for Component-B" "0,1" wgroup.long 0x33FC++0x03 line.long 0x00 "VI6_HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end width 20. sif !cpuis("R8A77440") tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection Zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end else tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister For LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register For LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister For LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register For LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister For LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register For LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister For LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register For LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of Hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of Hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of Hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of Hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of Hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of Hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of Hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of Hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of Hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of Hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of Hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of Hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of Hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of Hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of Hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of Hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of Hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of Hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of Hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of Hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of Hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of Hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of Hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of Hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of Hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of Hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of Hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of Hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of Hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of Hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of Hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of Hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end endif width 15. sif !cpuis("R8A77440") tree "LIF Control Registers" group.long 0x3B00++0x07 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer threshold for start ready notification to display module" bitfld.long 0x00 4. " CFMT ,Chroma format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External display module selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Enable/Disable of data output to external display module" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer threshold for clock stop in dynamic clock control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer threshold for clock start in dynamic clock control" tree.end else endif width 18. tree "Security Control Registers" group.long 0x3D00++0x07 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure attribute for Display List 3 registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure attribute for Display List 2 registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure attribute for Display List 1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure attribute for Display List 0 registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure attribute for WPF3 registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure attribute for WPF2 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure attribute for WPF1 registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure attribute for WPF0 registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure attribute for RPF4 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure attribute for RPF3 registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure attribute for RPF2 registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure attribute for RPF1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure attribute for RPF0 registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure attribute for LIF registers" "Non-secure,Secure" bitfld.long 0x04 13. " SCHGT ,Secure attribute for HGT registers" "Non-secure,Secure" bitfld.long 0x04 12. " SCHGO ,Secure attribute for HGO registers" "Non-secure,Secure" textline " " bitfld.long 0x04 10. " SCBRU ,Secure attribute for BRU registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure attribute for HSI registers" "Non-secure,Secure" bitfld.long 0x04 8. " SCHST ,Secure attribute for HST registers" "Non-secure,Secure" textline " " bitfld.long 0x04 7. " SCCLU ,Secure attribute for CLU registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure attribute for LUT registers" "Non-secure,Secure" bitfld.long 0x04 3. " SCUDS2 ,Secure attribute for UDS2 registers" "Non-secure,Secure" textline " " bitfld.long 0x04 2. " SCUDS1 ,Secure attribute for UDS1 registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure attribute for UDS0 registers" "Non-secure,Secure" bitfld.long 0x04 0. " SCSRU ,Secure attribute for SRU registers" "Non-secure,Secure" tree.end width 15. tree "CLUT" group.long 0x4000++0x03 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE930000+0x4000)--(ad:0xFE930000+0x43FF) /long" group.long 0x4400++0x03 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE930000+0x4000)--(ad:0xFE930000+0x43FF) /long" group.long 0x4800++0x03 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE930000+0x4000)--(ad:0xFE930000+0x43FF) /long" group.long 0x4C00++0x03 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE930000+0x4000)--(ad:0xFE930000+0x43FF) /long" tree.end width 14. tree "LUT" group.long 0x7000++0x03 "1D-LUT" line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE930000+0x7000)--(ad:0xFE930000+0x73FF) /long" sif !cpuis("R8A77440") group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" else group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" endif tree.end width 0xB tree.end tree "VSPD1" base ad:0xFE938000 width 20. tree "General control registers" group.long 0x0++0x03 line.long 0x00 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x4++0x03 line.long 0x00 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x8++0x03 line.long 0x00 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0xC++0x03 line.long 0x00 "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0x00 0. " STRCMD ,Start command" "Not started,Started" group.long 0x18++0x03 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic clock stop control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic clock stop control 2" group.long 0x28++0x03 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 software reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 software reset" "No reset,Reset" bitfld.long 0x00 1. " SRST1 ,WPF1 software reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " SRST0 ,WPF0 software reset" "No reset,Reset" rgroup.long 0x38++0x03 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 operating status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 operating status" "Stopped,Operated" bitfld.long 0x00 9. " SYS1_ACT ,WPF1 operating status" "Stopped,Operated" textline " " bitfld.long 0x00 8. " SYS0_ACT ,WPF0 operating status" "Stopped,Operated" group.long 0x48++0x07 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (frame end)" "No interrupt,Interrupt" group.long 0x50++0x07 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (frame end)" "No interrupt,Interrupt" group.long 0x58++0x07 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (frame end)" "No interrupt,Interrupt" group.long 0x60++0x07 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (display list frame end)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (frame end)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (display list frame end)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (frame end)" "No interrupt,Interrupt" group.long 0x78++0x07 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for display start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for display read data end" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 line data read end of RFP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 line data read end of RFP3" "Disabled,Enabled" bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 line data read end of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 line data read end of RFP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 line data read end of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for display start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for display read data end" "No interrupt,Interrupt" bitfld.long 0x04 4. " LNE4 ,Interrupt status for 1 line data read end of RFP4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 line data read end of RFP3" "No interrupt,Interrupt" bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 line data read end of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 line data read end of RFP1" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 line data read end of RFP0" "No interrupt,Interrupt" group.long 0x84++0x03 line.long 0x00 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF0 output lines" group.long 0x88++0x03 line.long 0x00 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF1 output lines" group.long 0x8C++0x03 line.long 0x00 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF2 output lines" group.long 0x90++0x03 line.long 0x00 "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0x00 0.--20. 1. " LINE_CNT ,Number of WPF3 output lines" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display list control setting" bitfld.long 0x00 12. " DC2 ,Display list control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display list control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display list control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous frame mode for header-less display list" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less display list mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display list enable/disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display list data swapping in longword units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display list data swapping in word units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display list data swapping in byte units" "Disabled,Enabled" group.long 0x11C++0x07 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No wait for polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended display list command control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 5. " DLPRI ,Display list control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display list control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended display list" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display list body size register 0" bitfld.long 0x04 24. " UPD0 ,Update flag" "Not downloaded,Downloaded" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less display list body size" tree.end width 24. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal size of RPF basic read area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical size of RPF basic read area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF extended horizontal read size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF extended vertical read size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual input enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal chrominance interpolation method setting" "Nearest-neighbor,Bilinear" textline " " bitfld.long 0x08 15. " SPYCS ,RPF input mode setting 1" "0,1" bitfld.long 0x08 14. " SPUVS ,RPF input mode setting 2" "0,1" textline " " bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit color data extension method setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color space conversion enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF input image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " A_WDS ,Alpha plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 8. " A_BTS ,Alpha plane data swapping in Byte units" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " P_LLS ,Picture plane data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture plane data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture plane data swapping in word units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture plane data swapping in byte units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal coordinate of sublayer display location on master layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical coordinate of sublayer display location on master layer" line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha format and processing method select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP operation setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" textline " " bitfld.long 0x14 23. " BSEL ,Alpha bit count conversion selection for 1-bit mask generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" bitfld.long 0x14 18.--19. " AEXT ,Lower-bit alpha value extension method set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-bit alpha value output when 1-bit alpha value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-bit alpha value output when 1-Bit alpha value is 1" line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-input fixed alpha value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-input fixed R/Cr component value" textline " " hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-input fixed G/Y component value" hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-input fixed B/Cb component value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask generation specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr comparison value for 1-bit alpha generation" textline " " hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y comparison Value for 1-bit alpha generation" hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb comparison value for 1-bit alpha generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-source input alpha value when 1-bit alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-source input R/Cr value when 1-bit alpha is 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-source input G/Y value when 1-bit alpha is 0 " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-source input B/Cb value when 1-bit alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-source input alpha value when 1-bit alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-source input R/Cr value when 1-bit alpha is 1" textline " " hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-source input G/Y value when 1-bit alpha is 1" hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-source input B/Cb value when 1-bit alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color replacement control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison color data setting 1 enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " SAPE0 ,Comparison color data setting 0 enable/disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha data in color keying color information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y component data in color keying color information" hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb component data in color keying color information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha data in color keying color information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr component data in color keying color information" textline " " hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y component data in color keying color information" hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb component data in color keying color information" line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory stride of source picture Y/RGB plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory stride of source picture C plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory stride of source alpha plane" line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" tree.end width 25. tree "WPF Control Registers" group.long 0x1000++0x0B line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1000+0x0C)++0x03 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1000+0x10)++0x07 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1100++0x0B line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1100+0x0C)++0x03 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1100+0x10)++0x07 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1200++0x0B line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1200+0x0C)++0x03 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1200+0x10)++0x07 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif group.long 0x1300++0x0B line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF start enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 start enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 start enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 start enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x04 0.--11. 1. " HCL_SIZE ,Horizontal clipping size setting" else hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal clipping size setting" endif line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical size clipping enable/disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical size clipping offset value setting" textline " " sif cpuis("R8A774*") hexmask.long.word 0x08 0.--11. 1. " VCL_SIZE ,Vertical size clipping offset value setting" else hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical size clipping offset value setting" endif group.long (0x1300+0x0C)++0x03 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD value in output packed data" bitfld.long 0x00 23. " PXA ,PAD data select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 16. " FLP ,Vertical flipping select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output mode setting 1" "0,1" textline " " bitfld.long 0x00 14. " SPUVS ,WPF output mode setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering enable/disable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 9.--11. " WRTM ,CSC conversion expression setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." bitfld.long 0x00 8. " CSC ,Color space conversion setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF output image format setting" group.long (0x1300+0x10)++0x07 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF output data swapping in LONG LWORD units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF output data swapping in longword units" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_WDS ,WPF output data swapping in word units" "Disabled,Enabled" bitfld.long 0x00 0. " P_BTS ,WPF output data swapping in byte units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit count reduction methodSelection for data storage in packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit count reduction method selection for data storage in PAD" "Truncated,Rounded,Compared,?..." textline " " hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for conversion to 1-Bit alpha data" bitfld.long 0x04 12.--13. " CLMD ,Color data clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory stride of destination picture Y/RGB plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory stride of destination picture C plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE938000+0x3B00))&0x1)==0x1) group.long 0x1034++0x03 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display data write back control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display data write back control 0" "Disabled,Enabled" endif tree.end width 22. tree "DPR Control Registers" sif !cpuis("R8A77440") group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2010++0x03 line.long 0x00 "VI6_DPR_RPF4_ROUTE,RPF4 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF4 ,RPF4 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2000++0x03 line.long 0x00 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF0 ,RPF0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2004++0x03 line.long 0x00 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF1 ,RPF1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2008++0x03 line.long 0x00 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF2 ,RPF2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x200C++0x03 line.long 0x00 "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0x00 0.--5. " RT_RPF3 ,RPF3 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2014++0x03 line.long 0x00 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF0 ,WPF0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2018++0x03 line.long 0x00 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF1 ,WPF1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x201C++0x03 line.long 0x00 "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF2 ,WPF2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2020++0x03 line.long 0x00 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x00 8.--13. " FP_WPF3 ,WPF3 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif cpuis("R8A77450")||cpuis("R8A77430") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif !cpuis("R8A77440") group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for SRU" textline " " bitfld.long 0x00 8.--13. " FP ,SRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x202C++0x03 line.long 0x00 "VI6_DPR_UDS1_ROUTE,UDS1 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS1 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS1 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2030++0x03 line.long 0x00 "VI6_DPR_UDS2_ROUTE,UDS2 Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,UDS2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for LUT" textline " " bitfld.long 0x00 8.--13. " FP ,LUT internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,LUT target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for CLU" textline " " bitfld.long 0x00 8.--13. " FP ,CLU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HST" textline " " bitfld.long 0x00 8.--13. " FP ,HST internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for HSI" textline " " bitfld.long 0x00 8.--13. " FP ,HSI internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" textline " " bitfld.long 0x00 8.--13. " FP ,BRU internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x2024++0x03 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x03 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x203C++0x03 line.long 0x00 "VI6_DPR_LUT_ROUTE,LUT Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x03 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x03 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x03 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed alpha output value for $2" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x03 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" bitfld.long 0x00 8.--13. " FP ,$2 internal operation timing setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,$2 target node value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x2054++0x07 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target node index for HGO histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target node index for HGT histogram sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. sif !cpuis("R8A77440") tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end else tree "SRU Control Registers" group.long 0x2200++0x0B line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super resolution parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super resolution parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super resolution parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super resolution parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super resolution parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super resolution processing enable/disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super resolution parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super resolution parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super resolution parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super resolution parameter 8" tree.end endif width 23. sif !cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R8A77440") tree "UDS Control Registers" if (((per.l(ad:0xFE938000+0x2300))&0x100000)==0x000000) group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2300++0x03 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2300++0x0F line.long 0x00 "VI6_UDS0_SCALE,Scaling Factor Register 0" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS0_ALPTH,Alpha Data Threshold Setting Register 0" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS0_ALPVAL,Alpha Data Replacing Value Setting Register 0" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS0_PASS_BWIDTH,Passband Register 0" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2300+0x18)++0x03 line.long 0x00 "VI6_UDS0_IPC,2D IPC Setting Register 0" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2300+0x24)++0x07 line.long 0x00 "VI6_UDS0_CLIP_SIZE,UDS Output Size Clipping Register 0" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS0_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE938000+0x2400))&0x100000)==0x000000) group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2400++0x03 "UDS 1 Registers" line.long 0x00 "VI6_UDS1_CTRL,Scaling Control Register 1" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS1_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2400++0x0F line.long 0x00 "VI6_UDS1_SCALE,Scaling Factor Register 1" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS1_ALPTH,Alpha Data Threshold Setting Register 1" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS1_ALPVAL,Alpha Data Replacing Value Setting Register 1" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS1_PASS_BWIDTH,Passband Register 1" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2400+0x18)++0x03 line.long 0x00 "VI6_UDS1_IPC,2D IPC Setting Register 1" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2400+0x24)++0x07 line.long 0x00 "VI6_UDS1_CLIP_SIZE,UDS Output Size Clipping Register 1" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS1_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" if (((per.l(ad:0xFE938000+0x2500))&0x100000)==0x000000) group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighbor interpolation characteristic control" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Disabled,Enabled" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 17. " NE_GY ,G/Y interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 16. " NE_BCB ,B/Cb interpolation method when bilinear/nearest neighbor interpolation is selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" else group.long 0x2500++0x03 "UDS 2 Registers" line.long 0x00 "VI6_UDS2_CTRL,Scaling Control Register 2" bitfld.long 0x00 30. " AMD ,Pixel count at scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for insufficient clipping size" "Copying pixels,VI6_UDS2_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or nearest neighborInterpolation characteristic Control" "Not improved,Improved" textline " " bitfld.long 0x00 25. " AON ,Scale-up/down of alpha plane" "Not performed,Performed" bitfld.long 0x00 24. " ATHON ,Alpha output data threshold comparison enable/disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel component interpolation method at scale-up/down" "Bilinear/Nearest neighbor,Multi tap" textline " " bitfld.long 0x00 19. " NE_A ,Alpha interpolation method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function enable/disable select" "Disabled,Enabled" endif group.long 0x2500++0x0F line.long 0x00 "VI6_UDS2_SCALE,Scaling Factor Register 2" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (integral part) of horizontal scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (fractional Part) of horizontal scaling factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (integral part) of vertical scaling factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (fractional part) of vertical scaling factor" line.long 0x04 "VI6_UDS2_ALPTH,Alpha Data Threshold Setting Register 2" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha data threshold setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha data threshold setting 0" line.long 0x08 "VI6_UDS2_ALPVAL,Alpha Data Replacing Value Setting Register 2" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing alpha value setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing alpha value setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing alpha value setting 0" line.long 0x0C "VI6_UDS2_PASS_BWIDTH,Passband Register 2" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal signal passband at image scale-up/down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical signal passband at image scale-up/down" group.long (0x2500+0x18)++0x03 line.long 0x00 "VI6_UDS2_IPC,2D IPC Setting Register 2" bitfld.long 0x00 27. " FIELD ,Top/Bottom field select" "Top,Bottom" sif !cpuis("R8A774*") hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" endif group.long (0x2500+0x24)++0x07 line.long 0x00 "VI6_UDS2_CLIP_SIZE,UDS Output Size Clipping Register 2" sif cpuis("R8A774*") hexmask.long.word 0x00 16.--27. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--11. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" else hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping size of horizontal pixel count after scale-up/-down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping size of vertical pixel count after scale-up/-down" endif line.long 0x04 "VI6_UDS2_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr component of fill color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y component of fill color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb component of fill color" tree.end endif width 14. tree "LUT Control Register" group.long 0x2800++0x03 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT enable/disable" "Disabled,Enabled" tree.end width 14. sif !cpuis("R8A77440") tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" sif cpuis("R8A774*") bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " endif bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end else tree "CLU Control Register" group.long 0x2900++0x03 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Disabled,Enabled" bitfld.long 0x00 24. " MVS ,Max Value Stretch" "Method 0,Method 1" textline " " bitfld.long 0x00 14.--15. " AX1I ,Input control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input control 1 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output control 0 in 2D mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output control 1 in 2D mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output control 2 in 2D mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT dimension number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable/disable" "Disabled,Enabled" tree.end endif width 14. tree "HST Control Register" group.long 0x2A00++0x03 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV conversion enable/disable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x03 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV conversion enable/disable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color data normalization" "Not divided,Divided" bitfld.long 0x00 19. " D3ON ,Dithering enable of BRU input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering enable of BRU input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering enable of BRU input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering enable of BRU input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF horizontal size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF vertical size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal coordinate of virtual RPF location on master layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical coordinate of virtual RPF location on master layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed alpha of virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation type of blending/ROP unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input selection for DST side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x14 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x14 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation type of blending/ROP unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x1C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of blending/ROP unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x24 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha creation expression" "0,1" bitfld.long 0x24 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation type of blending/ROP unit D" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input selection for SRC side of blending/ROP unit D" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending expression selection" "0,1" bitfld.long 0x2C 28.--30. " CCMDX ,Blending coefficient X selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending coefficient Y selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending alpha creation expression" "0,1" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha creation coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha creation coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed alpha value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed alpha value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input selection for DST side of ROP unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " AROP ,Alpha data ROP operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 21. tree "HGO Control Registers" group.long 0x3000++0x2F line.long 0x00 "VI6_HGO_OFFSET,HGO Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Horizontal offset of histogram detection window" line.long 0x04 "VI6_HGO_SIZE,HGO Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram source component setting" "Disabled,Enabled" bitfld.long 0x08 6. " OFSB_R ,Offset binary mode for R/Cr/H component" "Straight,Offset" bitfld.long 0x08 5. " OFSB_G ,Offset binary mode for G/Y/S/max(RGB) component" "Straight,Offset" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset binary mode for B/Cb/V component" "Straight,Offset" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." line.long 0x0C "VI6_HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x10 "VI6_HGO_LB0_H,HGO Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x10 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x10 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x14 "VI6_HGO_LB0_V,HGO Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x14 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x14 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x18 "VI6_HGO_LB1_H,HGO Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x18 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x18 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x1C "VI6_HGO_LB1_V,HGO Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x1C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x1C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x20 "VI6_HGO_LB2_H,HGO Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x20 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x20 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x24 "VI6_HGO_LB2_V,HGO Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x24 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x24 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x28 "VI6_HGO_LB3_H,HGO Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x28 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x28 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x2C "VI6_HGO_LB3_V,HGO Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x2C 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x2C 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3030++0x03 line.long 0x00 "VI6_HGO_R_HISTO_0 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-R in the value range-0 " rgroup.long 0x3034++0x03 line.long 0x00 "VI6_HGO_R_HISTO_1 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-R in the value range-1 " rgroup.long 0x3038++0x03 line.long 0x00 "VI6_HGO_R_HISTO_2 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-R in the value range-2 " rgroup.long 0x303C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_3 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-R in the value range-3 " rgroup.long 0x3040++0x03 line.long 0x00 "VI6_HGO_R_HISTO_4 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-R in the value range-4 " rgroup.long 0x3044++0x03 line.long 0x00 "VI6_HGO_R_HISTO_5 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-R in the value range-5 " rgroup.long 0x3048++0x03 line.long 0x00 "VI6_HGO_R_HISTO_6 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-R in the value range-6 " rgroup.long 0x304C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_7 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-R in the value range-7 " rgroup.long 0x3050++0x03 line.long 0x00 "VI6_HGO_R_HISTO_8 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-R in the value range-8 " rgroup.long 0x3054++0x03 line.long 0x00 "VI6_HGO_R_HISTO_9 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-R in the value range-9 " rgroup.long 0x3058++0x03 line.long 0x00 "VI6_HGO_R_HISTO_10,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-R in the value range-10" rgroup.long 0x305C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_11,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-R in the value range-11" rgroup.long 0x3060++0x03 line.long 0x00 "VI6_HGO_R_HISTO_12,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-R in the value range-12" rgroup.long 0x3064++0x03 line.long 0x00 "VI6_HGO_R_HISTO_13,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-R in the value range-13" rgroup.long 0x3068++0x03 line.long 0x00 "VI6_HGO_R_HISTO_14,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-R in the value range-14" rgroup.long 0x306C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_15,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-R in the value range-15" rgroup.long 0x3070++0x03 line.long 0x00 "VI6_HGO_R_HISTO_16,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-R in the value range-16" rgroup.long 0x3074++0x03 line.long 0x00 "VI6_HGO_R_HISTO_17,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-R in the value range-17" rgroup.long 0x3078++0x03 line.long 0x00 "VI6_HGO_R_HISTO_18,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-R in the value range-18" rgroup.long 0x307C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_19,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-R in the value range-19" rgroup.long 0x3080++0x03 line.long 0x00 "VI6_HGO_R_HISTO_20,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-R in the value range-20" rgroup.long 0x3084++0x03 line.long 0x00 "VI6_HGO_R_HISTO_21,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-R in the value range-21" rgroup.long 0x3088++0x03 line.long 0x00 "VI6_HGO_R_HISTO_22,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-R in the value range-22" rgroup.long 0x308C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_23,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-R in the value range-23" rgroup.long 0x3090++0x03 line.long 0x00 "VI6_HGO_R_HISTO_24,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-R in the value range-24" rgroup.long 0x3094++0x03 line.long 0x00 "VI6_HGO_R_HISTO_25,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-R in the value range-25" rgroup.long 0x3098++0x03 line.long 0x00 "VI6_HGO_R_HISTO_26,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-R in the value range-26" rgroup.long 0x309C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_27,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-R in the value range-27" rgroup.long 0x30A0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_28,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-R in the value range-28" rgroup.long 0x30A4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_29,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-R in the value range-29" rgroup.long 0x30A8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_30,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-R in the value range-30" rgroup.long 0x30AC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_31,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-R in the value range-31" rgroup.long 0x30B0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_32,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-R in the value range-32" rgroup.long 0x30B4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_33,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-R in the value range-33" rgroup.long 0x30B8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_34,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-R in the value range-34" rgroup.long 0x30BC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_35,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-R in the value range-35" rgroup.long 0x30C0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_36,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-R in the value range-36" rgroup.long 0x30C4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_37,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-R in the value range-37" rgroup.long 0x30C8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_38,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-R in the value range-38" rgroup.long 0x30CC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_39,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-R in the value range-39" rgroup.long 0x30D0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_40,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-R in the value range-40" rgroup.long 0x30D4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_41,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-R in the value range-41" rgroup.long 0x30D8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_42,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-R in the value range-42" rgroup.long 0x30DC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_43,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-R in the value range-43" rgroup.long 0x30E0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_44,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-R in the value range-44" rgroup.long 0x30E4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_45,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-R in the value range-45" rgroup.long 0x30E8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_46,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-R in the value range-46" rgroup.long 0x30EC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_47,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-R in the value range-47" rgroup.long 0x30F0++0x03 line.long 0x00 "VI6_HGO_R_HISTO_48,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-R in the value range-48" rgroup.long 0x30F4++0x03 line.long 0x00 "VI6_HGO_R_HISTO_49,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-R in the value range-49" rgroup.long 0x30F8++0x03 line.long 0x00 "VI6_HGO_R_HISTO_50,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-R in the value range-50" rgroup.long 0x30FC++0x03 line.long 0x00 "VI6_HGO_R_HISTO_51,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-R in the value range-51" rgroup.long 0x3100++0x03 line.long 0x00 "VI6_HGO_R_HISTO_52,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-R in the value range-52" rgroup.long 0x3104++0x03 line.long 0x00 "VI6_HGO_R_HISTO_53,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-R in the value range-53" rgroup.long 0x3108++0x03 line.long 0x00 "VI6_HGO_R_HISTO_54,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-R in the value range-54" rgroup.long 0x310C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_55,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-R in the value range-55" rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_R_HISTO_56,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-R in the value range-56" rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_R_HISTO_57,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-R in the value range-57" rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_R_HISTO_58,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-R in the value range-58" rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_59,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-R in the value range-59" rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_R_HISTO_60,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-R in the value range-60" rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_R_HISTO_61,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-R in the value range-61" rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_R_HISTO_62,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-R in the value range-62" rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_R_HISTO_63,HGO Component-R Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-R in the value range-63" rgroup.long 0x3130++0x0B line.long 0x00 "VI6_HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-R" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-R" line.long 0x04 "VI6_HGO_R_SUM,HGO Component-R Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-R" line.long 0x08 "VI6_HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-R" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-R" "0,1" sif (!cpuis("R8A774*")) rgroup.long 0x3110++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3114++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3118++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x311C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3120++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3124++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3128++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x312C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3130++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3134++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3138++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x313C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" else rgroup.long 0x3140++0x03 line.long 0x00 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-G in the value range-0 " rgroup.long 0x3144++0x03 line.long 0x00 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-G in the value range-1 " rgroup.long 0x3148++0x03 line.long 0x00 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-G in the value range-2 " rgroup.long 0x314C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-G in the value range-3 " rgroup.long 0x3150++0x03 line.long 0x00 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-G in the value range-4 " rgroup.long 0x3154++0x03 line.long 0x00 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-G in the value range-5 " rgroup.long 0x3158++0x03 line.long 0x00 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-G in the value range-6 " rgroup.long 0x315C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-G in the value range-7 " rgroup.long 0x3160++0x03 line.long 0x00 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-G in the value range-8 " rgroup.long 0x3164++0x03 line.long 0x00 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-G in the value range-9 " rgroup.long 0x3168++0x03 line.long 0x00 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-G in the value range-10" rgroup.long 0x316C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-G in the value range-11" rgroup.long 0x3170++0x03 line.long 0x00 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-G in the value range-12" rgroup.long 0x3174++0x03 line.long 0x00 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-G in the value range-13" rgroup.long 0x3178++0x03 line.long 0x00 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-G in the value range-14" rgroup.long 0x317C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-G in the value range-15" rgroup.long 0x3180++0x03 line.long 0x00 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-G in the value range-16" rgroup.long 0x3184++0x03 line.long 0x00 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-G in the value range-17" rgroup.long 0x3188++0x03 line.long 0x00 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-G in the value range-18" rgroup.long 0x318C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-G in the value range-19" rgroup.long 0x3190++0x03 line.long 0x00 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-G in the value range-20" rgroup.long 0x3194++0x03 line.long 0x00 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-G in the value range-21" rgroup.long 0x3198++0x03 line.long 0x00 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-G in the value range-22" rgroup.long 0x319C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-G in the value range-23" rgroup.long 0x31A0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-G in the value range-24" rgroup.long 0x31A4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-G in the value range-25" rgroup.long 0x31A8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-G in the value range-26" rgroup.long 0x31AC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-G in the value range-27" rgroup.long 0x31B0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-G in the value range-28" rgroup.long 0x31B4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-G in the value range-29" rgroup.long 0x31B8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-G in the value range-30" rgroup.long 0x31BC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-G in the value range-31" rgroup.long 0x31C0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-G in the value range-32" rgroup.long 0x31C4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-G in the value range-33" rgroup.long 0x31C8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-G in the value range-34" rgroup.long 0x31CC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-G in the value range-35" rgroup.long 0x31D0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-G in the value range-36" rgroup.long 0x31D4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-G in the value range-37" rgroup.long 0x31D8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-G in the value range-38" rgroup.long 0x31DC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-G in the value range-39" rgroup.long 0x31E0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-G in the value range-40" rgroup.long 0x31E4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-G in the value range-41" rgroup.long 0x31E8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-G in the value range-42" rgroup.long 0x31EC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-G in the value range-43" rgroup.long 0x31F0++0x03 line.long 0x00 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-G in the value range-44" rgroup.long 0x31F4++0x03 line.long 0x00 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-G in the value range-45" rgroup.long 0x31F8++0x03 line.long 0x00 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-G in the value range-46" rgroup.long 0x31FC++0x03 line.long 0x00 "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-G in the value range-47" rgroup.long 0x3200++0x03 line.long 0x00 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-G in the value range-48" rgroup.long 0x3204++0x03 line.long 0x00 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-G in the value range-49" rgroup.long 0x3208++0x03 line.long 0x00 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-G in the value range-50" rgroup.long 0x320C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-G in the value range-51" rgroup.long 0x3210++0x03 line.long 0x00 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-G in the value range-52" rgroup.long 0x3214++0x03 line.long 0x00 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-G in the value range-53" rgroup.long 0x3218++0x03 line.long 0x00 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-G in the value range-54" rgroup.long 0x321C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-G in the value range-55" rgroup.long 0x3220++0x03 line.long 0x00 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-G in the value range-56" rgroup.long 0x3224++0x03 line.long 0x00 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-G in the value range-57" rgroup.long 0x3228++0x03 line.long 0x00 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-G in the value range-58" rgroup.long 0x322C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-G in the value range-59" rgroup.long 0x3230++0x03 line.long 0x00 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-G in the value range-60" rgroup.long 0x3234++0x03 line.long 0x00 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-G in the value range-61" rgroup.long 0x3238++0x03 line.long 0x00 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-G in the value range-62" rgroup.long 0x323C++0x03 line.long 0x00 "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-G in the value range-63" endif rgroup.long 0x3240++0x0B line.long 0x00 "VI6_HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of component-G" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of component-G" line.long 0x04 "VI6_HGO_G_SUM,HGO Component-G Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of component-G" line.long 0x08 "VI6_HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for component-G" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-G" "0,1" rgroup.long 0x3250++0x03 line.long 0x00 "VI6_HGO_B_HISTO_0 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_0 ,Frequency of component-B in the value range-0 " rgroup.long 0x3254++0x03 line.long 0x00 "VI6_HGO_B_HISTO_1 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_1 ,Frequency of component-B in the value range-1 " rgroup.long 0x3258++0x03 line.long 0x00 "VI6_HGO_B_HISTO_2 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_2 ,Frequency of component-B in the value range-2 " rgroup.long 0x325C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_3 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_3 ,Frequency of component-B in the value range-3 " rgroup.long 0x3260++0x03 line.long 0x00 "VI6_HGO_B_HISTO_4 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_4 ,Frequency of component-B in the value range-4 " rgroup.long 0x3264++0x03 line.long 0x00 "VI6_HGO_B_HISTO_5 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_5 ,Frequency of component-B in the value range-5 " rgroup.long 0x3268++0x03 line.long 0x00 "VI6_HGO_B_HISTO_6 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_6 ,Frequency of component-B in the value range-6 " rgroup.long 0x326C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_7 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_7 ,Frequency of component-B in the value range-7 " rgroup.long 0x3270++0x03 line.long 0x00 "VI6_HGO_B_HISTO_8 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_8 ,Frequency of component-B in the value range-8 " rgroup.long 0x3274++0x03 line.long 0x00 "VI6_HGO_B_HISTO_9 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_9 ,Frequency of component-B in the value range-9 " rgroup.long 0x3278++0x03 line.long 0x00 "VI6_HGO_B_HISTO_10,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_10 ,Frequency of component-B in the value range-10" rgroup.long 0x327C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_11,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_11 ,Frequency of component-B in the value range-11" rgroup.long 0x3280++0x03 line.long 0x00 "VI6_HGO_B_HISTO_12,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_12 ,Frequency of component-B in the value range-12" rgroup.long 0x3284++0x03 line.long 0x00 "VI6_HGO_B_HISTO_13,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_13 ,Frequency of component-B in the value range-13" rgroup.long 0x3288++0x03 line.long 0x00 "VI6_HGO_B_HISTO_14,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_14 ,Frequency of component-B in the value range-14" rgroup.long 0x328C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_15,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_15 ,Frequency of component-B in the value range-15" rgroup.long 0x3290++0x03 line.long 0x00 "VI6_HGO_B_HISTO_16,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_16 ,Frequency of component-B in the value range-16" rgroup.long 0x3294++0x03 line.long 0x00 "VI6_HGO_B_HISTO_17,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_17 ,Frequency of component-B in the value range-17" rgroup.long 0x3298++0x03 line.long 0x00 "VI6_HGO_B_HISTO_18,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_18 ,Frequency of component-B in the value range-18" rgroup.long 0x329C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_19,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_19 ,Frequency of component-B in the value range-19" rgroup.long 0x32A0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_20,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_20 ,Frequency of component-B in the value range-20" rgroup.long 0x32A4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_21,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_21 ,Frequency of component-B in the value range-21" rgroup.long 0x32A8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_22,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_22 ,Frequency of component-B in the value range-22" rgroup.long 0x32AC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_23,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_23 ,Frequency of component-B in the value range-23" rgroup.long 0x32B0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_24,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_24 ,Frequency of component-B in the value range-24" rgroup.long 0x32B4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_25,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_25 ,Frequency of component-B in the value range-25" rgroup.long 0x32B8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_26,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_26 ,Frequency of component-B in the value range-26" rgroup.long 0x32BC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_27,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_27 ,Frequency of component-B in the value range-27" rgroup.long 0x32C0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_28,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_28 ,Frequency of component-B in the value range-28" rgroup.long 0x32C4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_29,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_29 ,Frequency of component-B in the value range-29" rgroup.long 0x32C8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_30,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_30 ,Frequency of component-B in the value range-30" rgroup.long 0x32CC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_31,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_31 ,Frequency of component-B in the value range-31" rgroup.long 0x32D0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_32,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_32 ,Frequency of component-B in the value range-32" rgroup.long 0x32D4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_33,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_33 ,Frequency of component-B in the value range-33" rgroup.long 0x32D8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_34,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_34 ,Frequency of component-B in the value range-34" rgroup.long 0x32DC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_35,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_35 ,Frequency of component-B in the value range-35" rgroup.long 0x32E0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_36,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_36 ,Frequency of component-B in the value range-36" rgroup.long 0x32E4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_37,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_37 ,Frequency of component-B in the value range-37" rgroup.long 0x32E8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_38,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_38 ,Frequency of component-B in the value range-38" rgroup.long 0x32EC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_39,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_39 ,Frequency of component-B in the value range-39" rgroup.long 0x32F0++0x03 line.long 0x00 "VI6_HGO_B_HISTO_40,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_40 ,Frequency of component-B in the value range-40" rgroup.long 0x32F4++0x03 line.long 0x00 "VI6_HGO_B_HISTO_41,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_41 ,Frequency of component-B in the value range-41" rgroup.long 0x32F8++0x03 line.long 0x00 "VI6_HGO_B_HISTO_42,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_42 ,Frequency of component-B in the value range-42" rgroup.long 0x32FC++0x03 line.long 0x00 "VI6_HGO_B_HISTO_43,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_43 ,Frequency of component-B in the value range-43" rgroup.long 0x3300++0x03 line.long 0x00 "VI6_HGO_B_HISTO_44,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_44 ,Frequency of component-B in the value range-44" rgroup.long 0x3304++0x03 line.long 0x00 "VI6_HGO_B_HISTO_45,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_45 ,Frequency of component-B in the value range-45" rgroup.long 0x3308++0x03 line.long 0x00 "VI6_HGO_B_HISTO_46,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_46 ,Frequency of component-B in the value range-46" rgroup.long 0x330C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_47,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_47 ,Frequency of component-B in the value range-47" rgroup.long 0x3310++0x03 line.long 0x00 "VI6_HGO_B_HISTO_48,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_48 ,Frequency of component-B in the value range-48" rgroup.long 0x3314++0x03 line.long 0x00 "VI6_HGO_B_HISTO_49,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_49 ,Frequency of component-B in the value range-49" rgroup.long 0x3318++0x03 line.long 0x00 "VI6_HGO_B_HISTO_50,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_50 ,Frequency of component-B in the value range-50" rgroup.long 0x331C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_51,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_51 ,Frequency of component-B in the value range-51" rgroup.long 0x3320++0x03 line.long 0x00 "VI6_HGO_B_HISTO_52,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_52 ,Frequency of component-B in the value range-52" rgroup.long 0x3324++0x03 line.long 0x00 "VI6_HGO_B_HISTO_53,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_53 ,Frequency of component-B in the value range-53" rgroup.long 0x3328++0x03 line.long 0x00 "VI6_HGO_B_HISTO_54,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_54 ,Frequency of component-B in the value range-54" rgroup.long 0x332C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_55,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_55 ,Frequency of component-B in the value range-55" rgroup.long 0x3330++0x03 line.long 0x00 "VI6_HGO_B_HISTO_56,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_56 ,Frequency of component-B in the value range-56" rgroup.long 0x3334++0x03 line.long 0x00 "VI6_HGO_B_HISTO_57,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_57 ,Frequency of component-B in the value range-57" rgroup.long 0x3338++0x03 line.long 0x00 "VI6_HGO_B_HISTO_58,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_58 ,Frequency of component-B in the value range-58" rgroup.long 0x333C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_59,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_59 ,Frequency of component-B in the value range-59" rgroup.long 0x3340++0x03 line.long 0x00 "VI6_HGO_B_HISTO_60,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_60 ,Frequency of component-B in the value range-60" rgroup.long 0x3344++0x03 line.long 0x00 "VI6_HGO_B_HISTO_61,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_61 ,Frequency of component-B in the value range-61" rgroup.long 0x3348++0x03 line.long 0x00 "VI6_HGO_B_HISTO_62,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_62 ,Frequency of component-B in the value range-62" rgroup.long 0x334C++0x03 line.long 0x00 "VI6_HGO_B_HISTO_63,HGO Component-B Histogram Register" hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_63 ,Frequency of component-B in the value range-63" rgroup.long 0x3350++0x0B line.long 0x00 "VI6_HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL ,Maximum value of Component-B" hexmask.long.byte 0x00 0.--7. 1. " MINVAL ,Minimum value of Component-B" line.long 0x04 "VI6_HGO_B_SUM,HGO Component-B Sum Register" hexmask.long 0x04 0.--29. 1. " SUMVAL ,Sum of Component-B" line.long 0x08 "VI6_HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX1 ,Letter box detection result 1 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 1. " LTRBOX2 ,Letter box detection result 2 of zone-0/1 for Component-B" "0,1" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for Component-B" "0,1" wgroup.long 0x33FC++0x03 line.long 0x00 "VI6_HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end width 20. sif !cpuis("R8A77440") tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection Zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end else tree "HGT Control Registers" group.long 0x3400++0x0B line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical offset of histogram detection window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical size of histogram detection window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical pixel skipping mode for histogram detection" "Disabled,1/2,1/4,?..." group.long 0x340C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_0 ,Lower boundary value for hue area - 0 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_0 ,Upper boundary value for hue area - 0 " group.long 0x3410++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_1 ,Lower boundary value for hue area - 1 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_1 ,Upper boundary value for hue area - 1 " group.long 0x3414++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_2 ,Lower boundary value for hue area - 2 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_2 ,Upper boundary value for hue area - 2 " group.long 0x3418++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_3 ,Lower boundary value for hue area - 3 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_3 ,Upper boundary value for hue area - 3 " group.long 0x341C++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_4 ,Lower boundary value for hue area - 4 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_4 ,Upper boundary value for hue area - 4 " group.long 0x3420++0x03 line.long 0x00 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x00 16.--23. 1. " HUE_LOWER_5 ,Lower boundary value for hue area - 5 " hexmask.long.byte 0x00 0.--7. 1. " HUE_UPPER_5 ,Upper boundary value for hue area - 5 " group.long 0x3424++0x23 line.long 0x00 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " BLACK_TH ,Threshold for black level determination in letter box detection" line.long 0x04 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister For LB Detection Zone-0" hexmask.long.word 0x04 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x04 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-0" line.long 0x08 "VI6_HGT_LB0_V,HGT Vertical Position Register For LB Detection Zone-0" hexmask.long.word 0x08 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x08 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-0" line.long 0x0C "VI6_HGT_LB1_H,HGT Horizontal PositionRegister For LB Detection Zone-1" hexmask.long.word 0x0C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x0C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-1" line.long 0x10 "VI6_HGT_LB1_V,HGT Vertical Position Register For LB Detection Zone-1" hexmask.long.word 0x10 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x10 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-1" line.long 0x14 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister For LB Detection Zone-2" hexmask.long.word 0x14 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x14 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-2" line.long 0x18 "VI6_HGT_LB2_V,HGT Vertical Position Register For LB Detection Zone-2" hexmask.long.word 0x18 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x18 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-2" line.long 0x1C "VI6_HGT_LB3_H,HGT Horizontal PositionRegister For LB Detection Zone-3" hexmask.long.word 0x1C 16.--29. 1. " HPOS0 ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x1C 0.--13. 1. " HPOS1 ,Horizontal end position for letter box detection zone-3" line.long 0x20 "VI6_HGT_LB3_V,HGT Vertical Position Register For LB Detection Zone-3" hexmask.long.word 0x20 16.--29. 1. " VPOS0 ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x20 0.--13. 1. " VPOS1 ,Vertical end position for letter box detection zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted frequency of Hue area-0 and saturation area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted frequency of Hue area-0 and saturation area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted frequency of Hue area-0 and saturation area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted frequency of Hue area-0 and saturation area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted frequency of Hue area-0 and saturation area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted frequency of Hue area-0 and saturation area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted frequency of Hue area-0 and saturation area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted frequency of Hue area-0 and saturation area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted frequency of Hue area-0 and saturation area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted frequency of Hue area-0 and saturation area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted frequency of Hue area-0 and saturation area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted frequency of Hue area-0 and saturation area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted frequency of Hue area-0 and saturation area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted frequency of Hue area-0 and saturation area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted frequency of Hue area-0 and saturation area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted frequency of Hue area-0 and saturation area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted frequency of Hue area-0 and saturation area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted frequency of Hue area-0 and saturation area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted frequency of Hue area-0 and saturation area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted frequency of Hue area-0 and saturation area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted frequency of Hue area-0 and saturation area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted frequency of Hue area-0 and saturation area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted frequency of Hue area-0 and saturation area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted frequency of Hue area-0 and saturation area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted frequency of Hue area-0 and saturation area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted frequency of Hue area-0 and saturation area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted frequency of Hue area-0 and saturation area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted frequency of Hue area-0 and saturation area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted frequency of Hue area-0 and saturation area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted frequency of Hue area-0 and saturation area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted frequency of Hue area-0 and saturation area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted frequency of Hue area-0 and saturation area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted frequency of Hue area-1 and saturation area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted frequency of Hue area-1 and saturation area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted frequency of Hue area-1 and saturation area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted frequency of Hue area-1 and saturation area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted frequency of Hue area-1 and saturation area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted frequency of Hue area-1 and saturation area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted frequency of Hue area-1 and saturation area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted frequency of Hue area-1 and saturation area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted frequency of Hue area-1 and saturation area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted frequency of Hue area-1 and saturation area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted frequency of Hue area-1 and saturation area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted frequency of Hue area-1 and saturation area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted frequency of Hue area-1 and saturation area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted frequency of Hue area-1 and saturation area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted frequency of Hue area-1 and saturation area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted frequency of Hue area-1 and saturation area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted frequency of Hue area-1 and saturation area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted frequency of Hue area-1 and saturation area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted frequency of Hue area-1 and saturation area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted frequency of Hue area-1 and saturation area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted frequency of Hue area-1 and saturation area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted frequency of Hue area-1 and saturation area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted frequency of Hue area-1 and saturation area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted frequency of Hue area-1 and saturation area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted frequency of Hue area-1 and saturation area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted frequency of Hue area-1 and saturation area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted frequency of Hue area-1 and saturation area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted frequency of Hue area-1 and saturation area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted frequency of Hue area-1 and saturation area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted frequency of Hue area-1 and saturation area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted frequency of Hue area-1 and saturation area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted frequency of Hue area-1 and saturation area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted frequency of Hue area-2 and saturation area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted frequency of Hue area-2 and saturation area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted frequency of Hue area-2 and saturation area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted frequency of Hue area-2 and saturation area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted frequency of Hue area-2 and saturation area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted frequency of Hue area-2 and saturation area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted frequency of Hue area-2 and saturation area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted frequency of Hue area-2 and saturation area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted frequency of Hue area-2 and saturation area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted frequency of Hue area-2 and saturation area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted frequency of Hue area-2 and saturation area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted frequency of Hue area-2 and saturation area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted frequency of Hue area-2 and saturation area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted frequency of Hue area-2 and saturation area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted frequency of Hue area-2 and saturation area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted frequency of Hue area-2 and saturation area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted frequency of Hue area-2 and saturation area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted frequency of Hue area-2 and saturation area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted frequency of Hue area-2 and saturation area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted frequency of Hue area-2 and saturation area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted frequency of Hue area-2 and saturation area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted frequency of Hue area-2 and saturation area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted frequency of Hue area-2 and saturation area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted frequency of Hue area-2 and saturation area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted frequency of Hue area-2 and saturation area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted frequency of Hue area-2 and saturation area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted frequency of Hue area-2 and saturation area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted frequency of Hue area-2 and saturation area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted frequency of Hue area-2 and saturation area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted frequency of Hue area-2 and saturation area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted frequency of Hue area-2 and saturation area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted frequency of Hue area-2 and saturation area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted frequency of Hue area-3 and saturation area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted frequency of Hue area-3 and saturation area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted frequency of Hue area-3 and saturation area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted frequency of Hue area-3 and saturation area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted frequency of Hue area-3 and saturation area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted frequency of Hue area-3 and saturation area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted frequency of Hue area-3 and saturation area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted frequency of Hue area-3 and saturation area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted frequency of Hue area-3 and saturation area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted frequency of Hue area-3 and saturation area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted frequency of Hue area-3 and saturation area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted frequency of Hue area-3 and saturation area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted frequency of Hue area-3 and saturation area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted frequency of Hue area-3 and saturation area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted frequency of Hue area-3 and saturation area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted frequency of Hue area-3 and saturation area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted frequency of Hue area-3 and saturation area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted frequency of Hue area-3 and saturation area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted frequency of Hue area-3 and saturation area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted frequency of Hue area-3 and saturation area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted frequency of Hue area-3 and saturation area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted frequency of Hue area-3 and saturation area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted frequency of Hue area-3 and saturation area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted frequency of Hue area-3 and saturation area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted frequency of Hue area-3 and saturation area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted frequency of Hue area-3 and saturation area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted frequency of Hue area-3 and saturation area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted frequency of Hue area-3 and saturation area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted frequency of Hue area-3 and saturation area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted frequency of Hue area-3 and saturation area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted frequency of Hue area-3 and saturation area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted frequency of Hue area-3 and saturation area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted frequency of Hue area-4 and saturation area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted frequency of Hue area-4 and saturation area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted frequency of Hue area-4 and saturation area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted frequency of Hue area-4 and saturation area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted frequency of Hue area-4 and saturation area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted frequency of Hue area-4 and saturation area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted frequency of Hue area-4 and saturation area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted frequency of Hue area-4 and saturation area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted frequency of Hue area-4 and saturation area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted frequency of Hue area-4 and saturation area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted frequency of Hue area-4 and saturation area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted frequency of Hue area-4 and saturation area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted frequency of Hue area-4 and saturation area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted frequency of Hue area-4 and saturation area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted frequency of Hue area-4 and saturation area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted frequency of Hue area-4 and saturation area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted frequency of Hue area-4 and saturation area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted frequency of Hue area-4 and saturation area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted frequency of Hue area-4 and saturation area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted frequency of Hue area-4 and saturation area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted frequency of Hue area-4 and saturation area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted frequency of Hue area-4 and saturation area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted frequency of Hue area-4 and saturation area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted frequency of Hue area-4 and saturation area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted frequency of Hue area-4 and saturation area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted frequency of Hue area-4 and saturation area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted frequency of Hue area-4 and saturation area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted frequency of Hue area-4 and saturation area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted frequency of Hue area-4 and saturation area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted frequency of Hue area-4 and saturation area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted frequency of Hue area-4 and saturation area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted frequency of Hue area-4 and saturation area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted frequency of Hue area-5 and saturation area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted frequency of Hue area-5 and saturation area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted frequency of Hue area-5 and saturation area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted frequency of Hue area-5 and saturation area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted frequency of Hue area-5 and saturation area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted frequency of Hue area-5 and saturation area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted frequency of Hue area-5 and saturation area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted frequency of Hue area-5 and saturation area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted frequency of Hue area-5 and saturation area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted frequency of Hue area-5 and saturation area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted frequency of Hue area-5 and saturation area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted frequency of Hue area-5 and saturation area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted frequency of Hue area-5 and saturation area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted frequency of Hue area-5 and saturation area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted frequency of Hue area-5 and saturation area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted frequency of Hue area-5 and saturation area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted frequency of Hue area-5 and saturation area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted frequency of Hue area-5 and saturation area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted frequency of Hue area-5 and saturation area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted frequency of Hue area-5 and saturation area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted frequency of Hue area-5 and saturation area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted frequency of Hue area-5 and saturation area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted frequency of Hue area-5 and saturation area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted frequency of Hue area-5 and saturation area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted frequency of Hue area-5 and saturation area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted frequency of Hue area-5 and saturation area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted frequency of Hue area-5 and saturation area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted frequency of Hue area-5 and saturation area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted frequency of Hue area-5 and saturation area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted frequency of Hue area-5 and saturation area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted frequency of Hue area-5 and saturation area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted frequency of Hue area-5 and saturation area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum value of S components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum value of S components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter box detection result #1 of zone-0/1 for V component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter box detection result #2 of zone-0/1 for V component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter box detection result of zone-2/3 for V component" "0,1" wgroup.long 0x37FC++0x03 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register reset" "No reset,Reset" tree.end endif width 15. sif !cpuis("R8A77440") tree "LIF Control Registers" group.long 0x3B00++0x07 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer threshold for start ready notification to display module" bitfld.long 0x00 4. " CFMT ,Chroma format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External display module selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Enable/Disable of data output to external display module" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer threshold for clock stop in dynamic clock control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer threshold for clock start in dynamic clock control" tree.end else endif width 18. tree "Security Control Registers" group.long 0x3D00++0x07 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure attribute for Display List 3 registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure attribute for Display List 2 registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure attribute for Display List 1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure attribute for Display List 0 registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure attribute for WPF3 registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure attribute for WPF2 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure attribute for WPF1 registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure attribute for WPF0 registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure attribute for RPF4 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure attribute for RPF3 registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure attribute for RPF2 registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure attribute for RPF1 registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure attribute for RPF0 registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure attribute for LIF registers" "Non-secure,Secure" bitfld.long 0x04 13. " SCHGT ,Secure attribute for HGT registers" "Non-secure,Secure" bitfld.long 0x04 12. " SCHGO ,Secure attribute for HGO registers" "Non-secure,Secure" textline " " bitfld.long 0x04 10. " SCBRU ,Secure attribute for BRU registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure attribute for HSI registers" "Non-secure,Secure" bitfld.long 0x04 8. " SCHST ,Secure attribute for HST registers" "Non-secure,Secure" textline " " bitfld.long 0x04 7. " SCCLU ,Secure attribute for CLU registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure attribute for LUT registers" "Non-secure,Secure" bitfld.long 0x04 3. " SCUDS2 ,Secure attribute for UDS2 registers" "Non-secure,Secure" textline " " bitfld.long 0x04 2. " SCUDS1 ,Secure attribute for UDS1 registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure attribute for UDS0 registers" "Non-secure,Secure" bitfld.long 0x04 0. " SCSRU ,Secure attribute for SRU registers" "Non-secure,Secure" tree.end width 15. tree "CLUT" group.long 0x4000++0x03 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE938000+0x4000)--(ad:0xFE938000+0x43FF) /long" group.long 0x4400++0x03 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE938000+0x4000)--(ad:0xFE938000+0x43FF) /long" group.long 0x4800++0x03 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE938000+0x4000)--(ad:0xFE938000+0x43FF) /long" group.long 0x4C00++0x03 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE938000+0x4000)--(ad:0xFE938000+0x43FF) /long" tree.end width 14. tree "LUT" group.long 0x7000++0x03 "1D-LUT" line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE938000+0x7000)--(ad:0xFE938000+0x73FF) /long" sif !cpuis("R8A77440") group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" else group.long 0x7400++0x07 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate value of first axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate value of second axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate value of third axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component value of first axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component value of second axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component value of third axis" endif tree.end width 0xB tree.end tree.end tree "JPU (JPEG Processing Unit)" base ad:0xFE980000 width 0xa group.long 0x00++0x07 line.long 0x00 "JCMOD,JPEG Code Mode Register" bitfld.long 0x00 8. " SOIC ,SOI Marker Delete" "Exists,Deleted" bitfld.long 0x00 7. " PCTR ,Image Data Input Control" "0,1" bitfld.long 0x00 5.--6. " MSKIP ,Marker Skip Mode" "Marker,No marker,?..." textline " " bitfld.long 0x00 4. " CCNT ,Code Amount Count Mode" "Disabled,Enabled" bitfld.long 0x00 3. " DSP ,Encoding/Decoding Set" "Encoding,Decoding" bitfld.long 0x00 0.--2. " REDU ,Subsampling Set" ",4:2:2,4:2:0,?..." line.long 0x04 "JCCMD,JPEG Code Command Register" bitfld.long 0x04 12. " SRST ,Software Reset" "No reset,Reset" bitfld.long 0x04 11. " RWCMD ,Reload Buffer Write Restart Command" "Not restarted,Restarted" bitfld.long 0x04 10. " RRCMD ,Reload Buffer Read Restart Command" "Not restarted,Restarted" textline " " bitfld.long 0x04 9. " LCMD1 ,External Line Buffer Processing Restart Command" "Not restarted,Restarted" bitfld.long 0x04 8. " LCMD2 ,External Line Buffer Process Restart Command" "Not restarted,Restarted" bitfld.long 0x04 7. " BRST ,Bus Reset" "No reset,Reset" textline " " bitfld.long 0x04 2. " JEND ,Interrupt Signal Clear Command" "Not Cleared,Cleared" bitfld.long 0x04 1. " JRST ,JPEG Core Processing-Stopped Revoke Command" "Not Cleared,Cleared" bitfld.long 0x04 0. " JSRT ,JPEG Core Process Start Command" "Not started,Started" rgroup.long 0x08++0x03 line.long 0x00 "JCSTS,JPEG Code Status Register" bitfld.long 0x00 0. " STS ,Operating State" "Not in operation,Encoding or decoding" group.long 0x0c++0x1f line.long 0x00 "JCQTN,JPEG Code Quantization Table Number Register" bitfld.long 0x00 4.--5. " QT3 ,Quantization table number for the third color component" "0,1,2,3" bitfld.long 0x00 2.--3. " QT2 ,Quantization table number for the second color component" "0,1,2,3" bitfld.long 0x00 0.--1. " QT1 ,Quantization table number for the first color component" "0,1,2,3" line.long 0x04 "JCHTN,JPEG Code Huffman Table Number Register" bitfld.long 0x04 5. " HTA3 ,Huffman table number (AC) for the third color component" "0,1" bitfld.long 0x04 4. " HTD3 ,Huffman table number (DC) for the third color component" "0,1" bitfld.long 0x04 3. " HTA2 ,Huffman table number (AC) for the second color component" "0,1" bitfld.long 0x04 2. " HTD2 ,Huffman table number (DC) for the second color component" "0,1" bitfld.long 0x04 1. " HTA1 ,Huffman table number (AC) for the first color component" "0,1" bitfld.long 0x04 0. " HTD1 ,Huffman table number (DC) for the first color component" "0,1" line.long 0x08 "JCDRIU,JPEG Code DRI Upper Register" hexmask.long.byte 0x08 0.--7. 1. " DRIU ,Upper Bytes of MCUs Preceding RST Marker" line.long 0x0c "JCDRID,JPEG Code DRI Lower Register" hexmask.long.byte 0x0c 0.--7. 1. " DRID ,Lower Bytes of MCUs Preceding RST Marker" line.long 0x10 "JCVSZU,JPEG Code Vertical Size Upper Register" hexmask.long.byte 0x10 0.--7. 1. " VSZU ,Upper Bytes of Vertical Image Size" line.long 0x14 "JCVSZD,JPEG Code Vertical Size Lower Register" hexmask.long.byte 0x14 0.--7. 1. " VSZD ,Lower Bytes of Vertical Image Size" line.long 0x18 "JCHSZU,JPEG Code Horizontal Size Upper Register" hexmask.long.byte 0x18 0.--7. 1. " HSZU ,Upper Bytes of Horizontal Image Size" line.long 0x1c "JCHSZD,JPEG Coded Horizontal Size Lower Register" hexmask.long.byte 0x1c 0.--7. 1. " HSZD ,Lower Bytes of Horizontal Image Size" rgroup.long 0x2c++0xb line.long 0x00 "JCDTCU,JPEG Code Data Count Upper Register" hexmask.long.byte 0x00 0.--7. 1. " DCU ,Upper bytes for the counted amount of data to be encoded" line.long 0x04 "JCDTCM,JPEG Code Data Count Middle Register" hexmask.long.byte 0x04 0.--7. 1. " DCM ,Middle bytes for the counted amount of data to be encoded" line.long 0x08 "JCDTCD,JPEG Code Data Count Lower Register" hexmask.long.byte 0x08 0.--7. 1. " DCD ,Lower bytes of the counted amount of data to be encoded" group.long 0x38++0xb line.long 0x00 "JINTE,JPEG Interrupt Enable Register" bitfld.long 0x00 14. " INT14 ,Interrupt is generated at every address reloading for coded data reading" "Not generated,Generated" bitfld.long 0x00 13. " INT13 ,Interrupt is generated at every address reloading for coded data writing" "Not generated,Generated" bitfld.long 0x00 12. " INT12 ,Interrupt is generated at every transmission completion of Y in multiples of 16 lines" "Not generated,Generated" textline " " bitfld.long 0x00 11. " INT11 ,Interrupt is generated at every transmission completion of Y in multiples of 8 lines" "Not generated,Generated" bitfld.long 0x00 10. " INT10 ,Interrupt of transfer to the external buffer end is generated" "Not generated,Generated" bitfld.long 0x00 7. " INT7 ,Interrupt is generated when the number of data in the restart interval is not correct" "Not generated,Generated" textline " " bitfld.long 0x00 6. " INT6 ,Interrupt is generated when the total number is not correct" "Not generated,Generated" bitfld.long 0x00 5. " INT5 ,Interrupt is generated when the last MCU number is not correct" "Not generated,Generated" bitfld.long 0x00 3. " INT3 ,Interrupt is generated when the image size and the subsampling setting can be read" "Not generated,Generated" line.long 0x04 "JINTS,JPEG Interrupt Status Register" bitfld.long 0x04 14. " INS14 ,Address is reloaded during stream data reading" "Not reloaded,Reloaded" bitfld.long 0x04 13. " INS13 ,Address is reloaded during stream data writing" "Not reloaded,Reloaded" bitfld.long 0x04 12. " INS12 ,Transfer of Y in multiples of 16 lines is completed" "Not completed,Completed" bitfld.long 0x04 11. " INS11 ,Transfer of Y in multiples of 8 lines is completed" "Not completed,Completed" textline " " bitfld.long 0x04 10. " INS10 ,All result data have been completely transferred" "Not transferred,transferred" bitfld.long 0x04 6. " INS6 ,JPEG completes the encoding process normally" "Not completed,completed" bitfld.long 0x04 5. " INS5 ,Encoded data error occurs" "Not occurred,occurred" bitfld.long 0x04 3. " INS3 ,image size and subsampling setting can be read" "Not readable,Readable" line.long 0x08 "JCDERR,JPEG Code Decode Error Register" bitfld.long 0x08 0.--3. " ERR ,Error Code" "Normal,SIO not detected: SIO not detected until EOI detected,SOF1 to SOFF detected,Subsampling setting other than YCbCr 4:4:4,SOF accuracy error: Other than 8 detected,DQT accuracy error: Other than 0 detected,Component error 1,Component error 2,SOF0/DQT/DHT not detected when SOS detected,SOS not detected: SOS not detected until EOI detected,EOI not detected,Restart interval data number error detected,Image size error detected,Last MCU data number error detected,Block data number error detected,?..." rgroup.long 0x44++0x3 line.long 0x00 "JCRST,JPEG Code Reset Register" bitfld.long 0x00 0. " RST ,Operating State" "Not suspended,Suspended" if (((per.l(ad:0xFE990000+0x70))&0x02)==0x02) group.long 0x70++0x03 line.long 0x00 "JIFECNT,JPEG Interface Encoding Control Register" hexmask.long.word 0x00 16.--27. 1. " PU ,Processing Unit" bitfld.long 0x00 6. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 4.--5. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" textline " " bitfld.long 0x00 2.--3. " ROT ,Rotated Read Mode" "0,90,180,270" bitfld.long 0x00 1. " BUF ,Buffer Mode" "Frame buffer,Line buffer" bitfld.long 0x00 0. " INFT ,Subsampling Setting" "YCbCr 4:2:2,YCbCr 4:2:0" else group.long 0x70++0x03 line.long 0x00 "JIFECNT,JPEG Interface Encoding Control Register" bitfld.long 0x00 6. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 4.--5. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" textline " " bitfld.long 0x00 2.--3. " ROT ,Rotated Read Mode" "0,90,180,270" bitfld.long 0x00 1. " BUF ,Buffer Mode" "Frame buffer,Line buffer" bitfld.long 0x00 0. " INFT ,Subsampling Setting" "YCbCr 4:2:2,YCbCr 4:2:0" endif group.long 0x74++0x27 line.long 0x00 "JIFESYA1,JPEG Interface Encode Source Y Address Register 1" hexmask.long 0x00 3.--31. 0x08 " ESCA1 ,Y component source address" line.long 0x04 "JIFESCA1,JPEG Interface Encode Source C Address Register 1" hexmask.long 0x04 3.--31. 0x08 " ESCA1 ,C component source address" line.long 0x08 "JIFESYA2,JPEG Interface Encode Source Y Address Register 2" hexmask.long 0x08 3.--31. 0x08 " ESCA2 ,Y component source address" line.long 0x0C "JIFESCA2,JPEG Interface Encode Source C Address Register 2" hexmask.long 0x0C 3.--31. 0x08 " ESCA2 ,C component source address" line.long 0x10 "JIFESMW,JPEG Interface Encode Source Memory Width Register" hexmask.long.word 0x10 0.--11. 1. " ESMW ,Buffer memory width in which image data is stored" line.long 0x14 "JIFESVSZ,JPEG Interface Encode Source Vertical Size Register" hexmask.long.word 0x14 0.--11. 1. " ESVSZ ,Vertical size of the image transferred from the external buffer" line.long 0x18 "JIFESHSZ,JPEG Interface Encode Source Horizontal Size Register" hexmask.long.word 0x18 0.--11. 1. " ESHSZ ,Horizontal size of the image transferred from the external buffer" line.long 0x1C "JIFEDA1,JPEG Interface Encode Destination Address Register 1" hexmask.long 0x1C 3.--31. 0x08 " EDA1 ,Coded Data Destination Address" line.long 0x20 "JIFEDA2,JPEG Interface Encode Destination Address Register 2" hexmask.long 0x20 3.--31. 0x08 " EDA2 ,Coded Data Destination Address" line.long 0x24 "JIFEDRSZ,JPEG Interface Encode Data Reload Size Register" hexmask.long.tbyte 0x24 8.--25. 1. " EDRSZ ,Coded data destination address" if (((per.l(ad:0xFE990000+0x70))&0x02)==0x02) group.long 0xa0++0x03 line.long 0x00 "JIFDCNT,JPEG Interface Decoding Control Register" hexmask.long.word 0x00 16.--27. 1. " PU ,Processing Unit" bitfld.long 0x00 3. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 1.--2. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" bitfld.long 0x00 0. " BMS ,Buffer Mode" "Frame buffer,Line buffer" else group.long 0xa0++0x03 line.long 0x00 "JIFDCNT,JPEG Interface Decoding Control Register" bitfld.long 0x00 3. " RELOAD ,Reload Mode" "Disabled,Enabled" bitfld.long 0x00 1.--2. " SWAP ,Byte/Word Swap" "Normal,Byte swap,Word swap,Word - byte swap" bitfld.long 0x00 0. " BMS ,Buffer Mode" "Frame buffer,Line buffer" endif group.long 0xA4++0x0F line.long 0x00 "JIFDSA1,JPEG Interface Decode Source Address Register 1" hexmask.long 0x00 3.--31. 0x8 " DSA1 ,Coded data source address" line.long 0x04 "JIFDSA2,JPEG Interface Decode Source Address Register 2" hexmask.long 0x04 3.--31. 0x8 " DSA2 ,Coded data source address" line.long 0x08 "JIFDDRSZ,JPEG Interface Decode Data Reload Size Register" hexmask.long.tbyte 0x08 8.--25. 1. " DDRSZ ,Number of data to be transferred before the address is changed" line.long 0x0C "JIFDDMW,JPEG Interface Decode Destination Memory Width Register" hexmask.long 0x0C 3.--31. 1. " DDMW ,Memory width of image data stored in external buffer" rgroup.long 0xb4++0x7 line.long 0x00 "JIFDDVSZ,JPEG Interface Decode Destination Vertical Size Register" hexmask.long.word 0x00 0.--15. 1. " DDVSZ ,Vertical size of image written to external buffer" line.long 0x04 "JIFDDHSZ,JPEG Interface Decode Destination Horizontal Size Register" hexmask.long.word 0x04 0.--15. 1. " DDHSZ ,Horizontal size of image written to external buffer" group.long 0xbc++0xf line.long 0x00 "JIFDDYA1,JPEG Interface Decode Destination Y Address Register 1" hexmask.long 0x00 3.--31. 0x8 " DDYA1 ,Y component destination address" line.long 0x04 "JIFDDCA1,JPEG Interface Decode Destination C Address Register 1" hexmask.long 0x04 3.--31. 0x8 " DDCA1 ,C component destination address" line.long 0x08 "JIFDDYA2,JPEG Interface Decode Destination Y Address Register 2" hexmask.long 0x08 3.--31. 0x8 " DDYA2 ,Y component destination address" line.long 0x0c "JIFDDCA2,JPEG Interface Decode Destination C Address Register 2" hexmask.long 0x0c 3.--31. 0x8 " DDCA2 ,C component destination address" group.long 0x10000++0x03 line.long 0x00 "JCQTBL0,JPEG code quantization table 0 register" button "JCQTBL0 Table" "d ad:0xFE990000--(ad:0xFE990000+0x3C) /LONG" group.long 0x10040++0x03 line.long 0x00 "JCQTBL1,JPEG code quantization table 1 register" button "JCQTBL1 Table" "d (ad:0xFE990000+0x40)--(ad:0xFE990000+0x7C) /LONG" group.long 0x10080++0x03 line.long 0x00 "JCQTBL2,JPEG code quantization table 2 register" button "JCQTBL2 Table" "d (ad:0xFE990000+0x80)--(ad:0xFE990000+0xBC) /LONG" group.long 0x100c0++0x03 line.long 0x00 "JCQTBL3,JPEG code quantization table 3 register" button "JCQTBL3 Table" "d (ad:0xFE990000+0xC0)--(ad:0xFE990000+0xFC) /LONG" group.long 0x10100++0x03 line.long 0x00 "JCHTBD0,JPEG code Huffman table DC0 register" button "JCHTBD0 Table" "d (ad:0xFE990000+0x100)--(ad:0xFE990000+0x10C) /LONG" group.long 0x10110++0x03 line.long 0x00 "JCHTBD0,JPEG code Huffman table DC0 register" button "JCHTBD0 Table" "d (ad:0xFE990000+0x110)--(ad:0xFE990000+0x11C) /LONG" group.long 0x10200++0x03 line.long 0x00 "JCHTBD1,JPEG code Huffman table DC1 register" button "JCHTBD1 Table" "d (ad:0xFE990000+0x200)--(ad:0xFE990000+0x20C) /LONG" group.long 0x10210++0x03 line.long 0x00 "JCHTBD1,JPEG code Huffman table DC1 register" button "JCHTBD1 Table" "d (ad:0xFE990000+0x210)--(ad:0xFE990000+0x21C) /LONG" group.long 0x10220++0x03 line.long 0x00 "JCHTBA1,JPEG code Huffman table DC1 register" button "JCHTBA1 Table" "d (ad:0xFE990000+0x220)--(ad:0xFE990000+0x22C) /LONG" group.long 0x10230++0x03 line.long 0x00 "JCHTBA1,JPEG code Huffman table DC1 register" button "JCHTBA1 Table" "d (ad:0xFE990000+0x230)--(ad:0xFE990000+0x2D0) /LONG" width 0x0b tree.end tree.open "2D-DMAC (Image Extraction Direct Memory Access Controller)" tree "2D-DMAC 0" base ad:0xFEA00000 width 13. group.long 0x20++0x3 line.long 0x00 "CH0CTRL,Control Register CH0" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 2.--3. " LINK ,Link Transfer Mode" "Disabled,,Slave after 2 masters,Alternate transfers" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH0SWAP,Input/Output Swap Register CH0" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00000+0x80+0x0C))&0x60)==0x0) group.long (0x80+0x0C)++0x3 line.long 0x00 "CH0SFMT,Source Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x80+0x0C)++0x3 line.long 0x00 "CH0SFMT,Source Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x80++0x3 line.long 0x00 "CH0SAR,Source Address Register CH0" if (((per.l(ad:0xFEA00000+0x80+0x10))&0x60)==0x00) group.long (0x80+0x10)++0x3 line.long 0x00 "CH0DFMT,Destination Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x80+0x10)++0x3 line.long 0x00 "CH0DFMT,Destination Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x80+0x8)++0x3 line.long 0x00 "CH0DPXL,Destination Pixel Register CH0" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x80+0x4)++0x3 line.long 0x00 "CH0DAR,Destination Address Register CH0" rgroup.long (0x80+0x14)++0xB line.long 0x00 "CH0SARE,Source Line Address Register CH0" line.long 0x04 "CH0DARE,Destination Line Address Register CH0" line.long 0x08 "CH0DPXLE,Destination Pixel Processing Register CH0" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 1" base ad:0xFEA00004 width 13. group.long 0x20++0x3 line.long 0x00 "CH1CTRL,Control Register CH1" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH1SWAP,Input/Output Swap Register CH1" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00004+0x9C+0x0C))&0x60)==0x0) group.long (0x9C+0x0C)++0x3 line.long 0x00 "CH1SFMT,Source Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x9C+0x0C)++0x3 line.long 0x00 "CH1SFMT,Source Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x9C++0x3 line.long 0x00 "CH1SAR,Source Address Register CH1" if (((per.l(ad:0xFEA00004+0x9C+0x10))&0x60)==0x00) group.long (0x9C+0x10)++0x3 line.long 0x00 "CH1DFMT,Destination Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x9C+0x10)++0x3 line.long 0x00 "CH1DFMT,Destination Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x9C+0x8)++0x3 line.long 0x00 "CH1DPXL,Destination Pixel Register CH1" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x9C+0x4)++0x3 line.long 0x00 "CH1DAR,Destination Address Register CH1" rgroup.long (0x9C+0x14)++0xB line.long 0x00 "CH1SARE,Source Line Address Register CH1" line.long 0x04 "CH1DARE,Destination Line Address Register CH1" line.long 0x08 "CH1DPXLE,Destination Pixel Processing Register CH1" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 2" base ad:0xFEA00008 width 13. group.long 0x20++0x3 line.long 0x00 "CH2CTRL,Control Register CH2" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 2.--3. " LINK ,Link Transfer Mode" "Disabled,,Slave after 2 masters,Alternate transfers" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH2SWAP,Input/Output Swap Register CH2" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00008+0xB8+0x0C))&0x60)==0x0) group.long (0xB8+0x0C)++0x3 line.long 0x00 "CH2SFMT,Source Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xB8+0x0C)++0x3 line.long 0x00 "CH2SFMT,Source Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0xB8++0x3 line.long 0x00 "CH2SAR,Source Address Register CH2" if (((per.l(ad:0xFEA00008+0xB8+0x10))&0x60)==0x00) group.long (0xB8+0x10)++0x3 line.long 0x00 "CH2DFMT,Destination Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xB8+0x10)++0x3 line.long 0x00 "CH2DFMT,Destination Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0xB8+0x8)++0x3 line.long 0x00 "CH2DPXL,Destination Pixel Register CH2" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0xB8+0x4)++0x3 line.long 0x00 "CH2DAR,Destination Address Register CH2" rgroup.long (0xB8+0x14)++0xB line.long 0x00 "CH2SARE,Source Line Address Register CH2" line.long 0x04 "CH2DARE,Destination Line Address Register CH2" line.long 0x08 "CH2DPXLE,Destination Pixel Processing Register CH2" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 3" base ad:0xFEA0000C width 13. group.long 0x20++0x3 line.long 0x00 "CH3CTRL,Control Register CH3" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH3SWAP,Input/Output Swap Register CH3" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA0000C+0xD4+0x0C))&0x60)==0x0) group.long (0xD4+0x0C)++0x3 line.long 0x00 "CH3SFMT,Source Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xD4+0x0C)++0x3 line.long 0x00 "CH3SFMT,Source Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0xD4++0x3 line.long 0x00 "CH3SAR,Source Address Register CH3" if (((per.l(ad:0xFEA0000C+0xD4+0x10))&0x60)==0x00) group.long (0xD4+0x10)++0x3 line.long 0x00 "CH3DFMT,Destination Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xD4+0x10)++0x3 line.long 0x00 "CH3DFMT,Destination Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0xD4+0x8)++0x3 line.long 0x00 "CH3DPXL,Destination Pixel Register CH3" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0xD4+0x4)++0x3 line.long 0x00 "CH3DAR,Destination Address Register CH3" rgroup.long (0xD4+0x14)++0xB line.long 0x00 "CH3SARE,Source Line Address Register CH3" line.long 0x04 "CH3DARE,Destination Line Address Register CH3" line.long 0x08 "CH3DPXLE,Destination Pixel Processing Register CH3" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 4" base ad:0xFEA00100 width 13. group.long 0x20++0x3 line.long 0x00 "CH4CTRL,Control Register CH4" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 2.--3. " LINK ,Link Transfer Mode" "Disabled,,Slave after 2 masters,Alternate transfers" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH4SWAP,Input/Output Swap Register CH4" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00100+0x180+0x0C))&0x60)==0x0) group.long (0x180+0x0C)++0x3 line.long 0x00 "CH4SFMT,Source Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x180+0x0C)++0x3 line.long 0x00 "CH4SFMT,Source Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x180++0x3 line.long 0x00 "CH4SAR,Source Address Register CH4" if (((per.l(ad:0xFEA00100+0x180+0x10))&0x60)==0x00) group.long (0x180+0x10)++0x3 line.long 0x00 "CH4DFMT,Destination Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x180+0x10)++0x3 line.long 0x00 "CH4DFMT,Destination Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x180+0x8)++0x3 line.long 0x00 "CH4DPXL,Destination Pixel Register CH4" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x180+0x4)++0x3 line.long 0x00 "CH4DAR,Destination Address Register CH4" rgroup.long (0x180+0x14)++0xB line.long 0x00 "CH4SARE,Source Line Address Register CH4" line.long 0x04 "CH4DARE,Destination Line Address Register CH4" line.long 0x08 "CH4DPXLE,Destination Pixel Processing Register CH4" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 5" base ad:0xFEA00104 width 13. group.long 0x20++0x3 line.long 0x00 "CH5CTRL,Control Register CH5" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH5SWAP,Input/Output Swap Register CH5" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00104+0x19C+0x0C))&0x60)==0x0) group.long (0x19C+0x0C)++0x3 line.long 0x00 "CH5SFMT,Source Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x19C+0x0C)++0x3 line.long 0x00 "CH5SFMT,Source Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x19C++0x3 line.long 0x00 "CH5SAR,Source Address Register CH5" if (((per.l(ad:0xFEA00104+0x19C+0x10))&0x60)==0x00) group.long (0x19C+0x10)++0x3 line.long 0x00 "CH5DFMT,Destination Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x19C+0x10)++0x3 line.long 0x00 "CH5DFMT,Destination Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x19C+0x8)++0x3 line.long 0x00 "CH5DPXL,Destination Pixel Register CH5" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x19C+0x4)++0x3 line.long 0x00 "CH5DAR,Destination Address Register CH5" rgroup.long (0x19C+0x14)++0xB line.long 0x00 "CH5SARE,Source Line Address Register CH5" line.long 0x04 "CH5DARE,Destination Line Address Register CH5" line.long 0x08 "CH5DPXLE,Destination Pixel Processing Register CH5" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 6" base ad:0xFEA00108 width 13. group.long 0x20++0x3 line.long 0x00 "CH6CTRL,Control Register CH6" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 2.--3. " LINK ,Link Transfer Mode" "Disabled,,Slave after 2 masters,Alternate transfers" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH6SWAP,Input/Output Swap Register CH6" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00108+0x1B8+0x0C))&0x60)==0x0) group.long (0x1B8+0x0C)++0x3 line.long 0x00 "CH6SFMT,Source Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1B8+0x0C)++0x3 line.long 0x00 "CH6SFMT,Source Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x1B8++0x3 line.long 0x00 "CH6SAR,Source Address Register CH6" if (((per.l(ad:0xFEA00108+0x1B8+0x10))&0x60)==0x00) group.long (0x1B8+0x10)++0x3 line.long 0x00 "CH6DFMT,Destination Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1B8+0x10)++0x3 line.long 0x00 "CH6DFMT,Destination Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x1B8+0x8)++0x3 line.long 0x00 "CH6DPXL,Destination Pixel Register CH6" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x1B8+0x4)++0x3 line.long 0x00 "CH6DAR,Destination Address Register CH6" rgroup.long (0x1B8+0x14)++0xB line.long 0x00 "CH6SARE,Source Line Address Register CH6" line.long 0x04 "CH6DARE,Destination Line Address Register CH6" line.long 0x08 "CH6DPXLE,Destination Pixel Processing Register CH6" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 7" base ad:0xFEA0010C width 13. group.long 0x20++0x3 line.long 0x00 "CH7CTRL,Control Register CH7" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH7SWAP,Input/Output Swap Register CH7" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA0010C+0x1D4+0x0C))&0x60)==0x0) group.long (0x1D4+0x0C)++0x3 line.long 0x00 "CH7SFMT,Source Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1D4+0x0C)++0x3 line.long 0x00 "CH7SFMT,Source Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x1D4++0x3 line.long 0x00 "CH7SAR,Source Address Register CH7" if (((per.l(ad:0xFEA0010C+0x1D4+0x10))&0x60)==0x00) group.long (0x1D4+0x10)++0x3 line.long 0x00 "CH7DFMT,Destination Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1D4+0x10)++0x3 line.long 0x00 "CH7DFMT,Destination Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x1D4+0x8)++0x3 line.long 0x00 "CH7DPXL,Destination Pixel Register CH7" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x1D4+0x4)++0x3 line.long 0x00 "CH7DAR,Destination Address Register CH7" rgroup.long (0x1D4+0x14)++0xB line.long 0x00 "CH7SARE,Source Line Address Register CH7" line.long 0x04 "CH7DARE,Destination Line Address Register CH7" line.long 0x08 "CH7DPXLE,Destination Pixel Processing Register CH7" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC Interrupt Clear Register" base ad:0xFEA00000 width 9. sif cpuis("R8A774*") group.long 0x08++0x3 line.long 0x00 "CHTCTRL,Transaction Control Register" bitfld.long 0x00 5. " OUT ,Transaction control" "Disabled,Enabled" endif group.long 0x10++0x3 line.long 0x00 "CHSTCLR,Interrupt Status Clear Register" bitfld.long 0x00 15. " CH7HE ,HE bit 7 status" "Not cleared,Cleared" bitfld.long 0x00 14. " CH6HE ,HE bit 6 status" "Not cleared,Cleared" bitfld.long 0x00 13. " CH5HE ,HE bit 5 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 12. " CH4HE ,HE bit 4 status" "Not cleared,Cleared" bitfld.long 0x00 11. " CH3HE ,HE bit 3 status" "Not cleared,Cleared" bitfld.long 0x00 10. " CH2HE ,HE bit 2 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " CH1HE ,HE bit 1 status" "Not cleared,Cleared" bitfld.long 0x00 8. " CH0HE ,HE bit 0 status" "Not cleared,Cleared" bitfld.long 0x00 7. " CH7TE ,TE bit 7 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 6. " CH6TE ,TE bit 6 status" "Not cleared,Cleared" bitfld.long 0x00 5. " CH5TE ,TE bit 5 status" "Not cleared,Cleared" bitfld.long 0x00 4. " CH4TE ,TE bit 4 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " CH3TE ,TE bit 3 status" "Not cleared,Cleared" bitfld.long 0x00 2. " CH2TE ,TE bit 2 status" "Not cleared,Cleared" bitfld.long 0x00 1. " CH1TE ,TE bit 1 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 0. " CH0TE ,TE bit 0 status" "Not cleared,Cleared" width 0xB tree.end tree.end tree.open "TSIF (TS Interface)" tree "TSIF 0" base ad:0xFFE80000 width 14. group.long 0x00++0x7 line.long 0x00 "TS0CTLR,TSIF Control Register" bitfld.long 0x00 30. " PLNGTH ,Byte Configuration Set of TS Packet Data" "204-byte,188-byte" bitfld.long 0x00 29. " TSDATP ,Input Polarity Set of TS Packet Data" "Positive,Negative" bitfld.long 0x00 28. " TSCLKP ,Input Polarity Set of TS Clock" "Positive,Negative" textline " " bitfld.long 0x00 27. " TSVLDP ,Input Polarity Set of TS Packet Data Enable Signal" "Positive,Negative" bitfld.long 0x00 25. " PSYCP ,Input Polarity Set of TS Packet Data Sync Signal" "Positive,Negative" bitfld.long 0x00 22. " SDENE ,TS Packet Data Enable Signal Enabled/Disabled" "Enabled,Disabled" textline " " bitfld.long 0x00 19. " BUF4 ,Buffer area number set" "2 areas,4 areas" bitfld.long 0x00 18. " TFA ,Software Reset Signal in the TSIF" "Reset internally,Released reset" bitfld.long 0x00 17. " DPDMD ,Duplicate Data of Consecutive TS Packets Delete" "Valid,Delete" textline " " bitfld.long 0x00 16. " DREQMD ,Selects whether the PEC bit in TSBUFCLRR is set to 1 automatically" "Interrupt transfer,Auto-transfer" bitfld.long 0x00 15. " EN ,Endian Type Set at TS Packet Data Reading from TSTSDR" "Big,Little" bitfld.long 0x00 14. " PCRMD ,Time Indication Set in TSPCRADC and TSTRPCRADC" "90 kHz,45 kHz" textline " " bitfld.long 0x00 13. " FRCMD ,Clock setting of TSFRC" "90 kHz,45 kHz" bitfld.long 0x00 12. " FRCSEL ,Setting of the base clock of TSFRC" "FRCPSC,TSFSCALER" bitfld.long 0x00 11. " FRCLATCH ,Snapshot setting of the internal free-run counter" "Off,On" textline " " bitfld.long 0x00 9.--10. " FRCADD ,TSFRC Value (Time Stamp) Addition at PID Matching" "Not added,Added 4 bytes,,Added 8 bytes" bitfld.long 0x00 8. " FRCSTR ,TSFRC Operation Set" "Stopped,Counting" hexmask.long.byte 0x00 0.--7. 1. " FRCPSC ,Division clock set for TSFRC" line.long 0x04 "TS0PIDR,TSIF PID Data Register" hexmask.long.word 0x04 16.--28. 1. " PIDD ,Byte Configuration Set of TS Packet Data" sif cpuis("R8A77440") if (((per.l(ad:0xFFE80000+0x08))&0x01800000)==0x0000000) group.long 0x08++0x03 line.long 0x00 "TS0CMDR,TSIF Command Register" bitfld.long 0x00 16.--20. 28. " PT ,Selecting a section for setting the PID table" "Video,Audio,PID_1,PID_2,PID_3,PID_4,PID_5,PID_6,PID_7,PID_8,PID_9,PID_10,PID_11,PID_12,PID_13,PID_14,PID_15,PID_16,PID_17,PID_18,PID_19,PID_20,PID_21,PID_22,PID_23,PID_24,PID_25,PID_26,PID_27,PID_28,PID_29,PID_30,PID_31,PID_32,PID_33,PID_34,PID_35,PID_36,PID_37,PID_38,PID_39,PID_40,PID_41,PID_42,PID_43,PID_44,PID_45,PID_46,PID_47,PID_48,PID_49,PID_50,PID_51,PID_52,PID_53,PID_54,PID_55,PID_56,PID_57,PID_58,PID_59,PID_60,PID_61,PID_62" bitfld.long 0x00 24. " PIDMD ,PID Filter Mode Set" "Set in PID table,All valid" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" textline " " bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" else group.long 0x08++0x03 line.long 0x00 "TS0CMDR,TSIF Command Register" bitfld.long 0x00 24. " PIDMD ,PID Filter Mode Set" "Set in PID table,All valid" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" endif else if (((per.l(ad:0xFFE80000+0x08))&0x1A00000)==0x0000000) group.long 0x08++0x3 line.long 0x00 "TS0CMDR,TSIF Command Register" bitfld.long 0x00 16.--20. 28. " PT ,Selecting a section for setting the PID table" "Video,Audio,PID_1,PID_2,PID_3,PID_4,PID_5,PID_6,PID_7,PID_8,PID_9,PID_10,PID_11,PID_12,PID_13,PID_14,PID_15,PID_16,PID_17,PID_18,PID_19,PID_20,PID_21,PID_22,PID_23,PID_24,PID_25,PID_26,PID_27,PID_28,PID_29,PID_30,PID_31,PID_32,PID_33,PID_34,PID_35,PID_36,PID_37,PID_38,PID_39,PID_40,PID_41,PID_42,PID_43,PID_44,PID_45,PID_46,PID_47,PID_48,PID_49,PID_50,PID_51,PID_52,PID_53,PID_54,PID_55,PID_56,PID_57,PID_58,PID_59,PID_60,PID_61,PID_62" bitfld.long 0x00 24.--25. " ALLPIDMD ,PID Filter Mode Set" "All valid,Other than null,Including null,Including null" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" textline " " bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" elif (((per.l(ad:0xFFE80000+0x08))&0x1A00000)==0x0200000) group.long 0x08++0x3 line.long 0x00 "TS0CMDR,TSIF Command Register" bitfld.long 0x00 16.--20. 28. " PT ,Selecting a section for setting the PID table" "PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID" bitfld.long 0x00 24.--25. " ALLPIDMD ,PID Filter Mode Set" "All valid,Other than null,Including null,Including null" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" textline " " bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" else group.long 0x08++0x3 line.long 0x00 "TS0CMDR,TSIF Command Register" bitfld.long 0x00 24.--25. " ALLPIDMD ,PID Filter Mode Set" "All valid,Other than null,Including null,Including null" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" endif endif group.long 0x0C++0x3 line.long 0x00 "TS0STR,TSIF Interrupt Status Register" hexmask.long.word 0x00 16.--28. 1. " PID ,PID of the TS packet input immediately before" bitfld.long 0x00 13. " CM1MF ,COMPARE MATCH1 matching flag" "Not matched,Matched" bitfld.long 0x00 12. " CM0MF ,COMPARE MATCH0 matching flag" "Not matched,Matched" textline " " bitfld.long 0x00 10. " ADCF ,PCRADC Update Flag" "Not updated,Updated" bitfld.long 0x00 9. " PIDF ,Relevant PID Packet Reception Flag" "Not received,Received" bitfld.long 0x00 8. " STOF ,Packet Reception End Flag when Interrupt Generating" "Not updated,Updated" textline " " bitfld.long 0x00 7. " RANDF ,random_access_indicator Flag" "Not occurred,Occurred" bitfld.long 0x00 6. " DISCF ,PCR Discontinuity Flag" "Not occurred,Occurred" rbitfld.long 0x00 5. " SYNCF ,Internal Synchronous/Asynchronous Mode State caused by Detection of the TS Packet Sync Signal" "Synchronous,Asynchronous" textline " " bitfld.long 0x00 4. " OFEF ,TSIF Internal Buffer Overflow" "No overflow,Overflow" bitfld.long 0x00 2. " VSCF ,Video Packet Start Code Detection Flag" "Not detected,Detected" bitfld.long 0x00 1. " VSHF ,Video Packet Short Header Detection Flag" "Not detected,Detected" textline " " bitfld.long 0x00 0. " TSIFINTF ,TSIF Transfer Request Flag" "Not requested,Requested" rgroup.long 0x10++0x03 line.long 0x00 "TS0TSDR,TSIF TS Data Register" group.long 0x14++0x3 line.long 0x00 "TS0BUFCLRR,TSIF Buffer Clear Register" bitfld.long 0x00 0. " PEC ,Internal Buffer Clear" "No effect,Clear" group.long 0x18++0x3 line.long 0x00 "TS0INTER,TSIF Interrupt Enable Register" bitfld.long 0x00 13. " CM1ME ,Disables/ Enables an Interrupt when TSCMCNT1 counted down" "Disabled,Enabled" bitfld.long 0x00 12. " CM0ME ,Disables/ Enables an Interrupt when TSCMCNT0 counted down" "Disabled,Enabled" bitfld.long 0x00 10. " ADCE ,Disables/ Enables an Interrupt when PCRADC is updated" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PIDE ,Disables/ Enables an interrupt when the set PID packet is received in PID filter mode" "Disabled,Enabled" bitfld.long 0x00 8. " STOE ,Disables/ Enables an interrupt when the status is updated" "Disabled,Enabled" bitfld.long 0x00 7. " RANDE ,Disables/ Enables an interrupt when random_access_indicator of the TS packet input immediately before is 1" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " DISCE ,Disables/ Enables an interrupt when discontinuity_indicator of the PCR packet input immediately before indicates PCR discontinuity " "Disabled,Enabled" bitfld.long 0x00 5. " SYNCE ,Disables/ Enables an interrupt when the TSIF is in asynchronous mode" "Disabled,Enabled" bitfld.long 0x00 4. " OFEE ,Disables/ Enables an interrupt when an overflow error occurs in the internal buffer" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " VSCE ,Disables/ Enables an interrupt when the start code of a video packet is detected in the TS packet input immediately before " "Disabled,Enabled" bitfld.long 0x00 1. " VSHE ,Disables/ Enables an interrupt when the short header of a video packet is detected in the TS packet input immediately before" "Disabled,Enabled" bitfld.long 0x00 0. " TSIFINTE ,Disables/ Enables an interrupt when the internal buffer contains one packet (188 bytes) of TS data" "Disabled,Enabled" group.long 0x20++0xB line.long 0x00 "TS0PSCALER,TSIF PSCALE Register" hexmask.long.word 0x00 16.--27. 1. " PSCALE2 ,Counter value 2 of the internal prescaler" hexmask.long.word 0x00 0.--11. 1. " PSCALE1 ,Counter value 1 of the internal prescaler" line.long 0x04 "TS0PSCALERR,TSIF PSCALE_R Register" bitfld.long 0x04 16.--19. " PSCALE_R2 ,Ratio of counter value 2 of the internal prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PSCALE_R1 ,Ratio of counter value 1 of the internal prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "TS0PCRADCMDR,TSIF PCRADC Mode Register" bitfld.long 0x08 5. " EXT_MODE ,Sets whether PCR_extension is included in the calculation of D_PCRADC" "Not included,Included" textline " " sif (cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))) bitfld.long 0x08 0.--3. " TR_SEL ,Trigger signal for PCRADC to be input to the TSIF" "Not selected,RT-DMAC Ch.0,RT-DMAC Ch.1,,RT-DMAC Ch.2,?..." elif (CPUIS("R8A77430")||cpuis("R8A77440")) bitfld.long 0x08 0.--3. " TR_SEL ,Trigger signal for PCRADC to be input to the TSIF" "Not selected,?..." else bitfld.long 0x08 0.--3. " TR_SEL ,Trigger signal for PCRADC to be input to the TSIF" "Not selected,DMAC0 channel 0,DMAC0 channel 1,,DMAC0 channel 2,?..." endif rgroup.long 0x2C++0xB line.long 0x00 "TS0PCRADCR,TSIF PCRADC Register - PCR value incremented by the internal clock" line.long 0x04 "TS0TRPCRADCR,TSIF TR_PCRADC Register - PCRADC value read by a trigger signal for PCRADC selected by the TR_SEL bit" line.long 0x08 "TS0DPCRADCR,TSIF D_PCRADC Register - Value of the stream PCR minus PCRADC" group.long 0x40++0x13 line.long 0x00 "TS0FRCL,TSIF Free-Running Counter L" line.long 0x04 "TS0FRCH,TSIF Free-Running Counter H" line.long 0x08 "TS0FSCALER,TSIF FSCALE Register" hexmask.long.word 0x08 16.--27. 1. " FSCALE2 ,Internal prescaler counter value set 2" hexmask.long.word 0x08 0.--11. 1. " FSCALE1 ,Internal prescaler counter value set 1" line.long 0x0C "TS0FSCALERR,TSIF FSCALE_R Register" bitfld.long 0x0C 16.--19. " FSCALE_R2 ,Internal prescaler counter ratio value set 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " FSCALE_R1 ,Internal prescaler counter ratio value set 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "TS0CMCTLR,TSIF COMPARE MATCH Control Register" bitfld.long 0x10 31. " PIDEX ,Choose Use/Not_Use from PID34 to PID64" "Not used,Used" bitfld.long 0x10 4. " CM1GO ,COMPARE MATCH COUNTER1 run/stop" "Stopped,Started" bitfld.long 0x10 0. " CM0GO ,COMPARE MATCH COUNTER0 run/stop" "Stopped,Started" group.long 0x54++0x3 line.long 0x00 "TS0CMCNT0,TSIF COMPARE MATCH COUNTER0" group.long 0x5C++0x3 line.long 0x00 "TS0CMCNT1,TSIF COMPARE MATCH COUNTER1" group.long 0x64++0x3 line.long 0x00 "TS0CMCOR0,TSIF COMPARE MATCH CONSTANT Register 0" group.long 0x6C++0x3 line.long 0x00 "TS0CMCOR1,TSIF COMPARE MATCH CONSTANT Register1" group.long 0x74++0xB line.long 0x00 "TS0PCNT,TSIF TS PACKET COUNT Register" line.long 0x04 "TS0PCNTKP,TSIF TS PACKET COUNT KEEP Register" line.long 0x08 "TS0PCNTPSH,TSIF TS PACKET COUNT PUSH Register" bitfld.long 0x08 0. " PCTPH ,Copy value of TSPCNT" "No,Yes" width 0x0B tree.end tree "TSIF 1" base ad:0xFFE90000 width 14. group.long 0x00++0x7 line.long 0x00 "TS1CTLR,TSIF Control Register" bitfld.long 0x00 30. " PLNGTH ,Byte Configuration Set of TS Packet Data" "204-byte,188-byte" bitfld.long 0x00 29. " TSDATP ,Input Polarity Set of TS Packet Data" "Positive,Negative" bitfld.long 0x00 28. " TSCLKP ,Input Polarity Set of TS Clock" "Positive,Negative" textline " " bitfld.long 0x00 27. " TSVLDP ,Input Polarity Set of TS Packet Data Enable Signal" "Positive,Negative" bitfld.long 0x00 25. " PSYCP ,Input Polarity Set of TS Packet Data Sync Signal" "Positive,Negative" bitfld.long 0x00 22. " SDENE ,TS Packet Data Enable Signal Enabled/Disabled" "Enabled,Disabled" textline " " bitfld.long 0x00 19. " BUF4 ,Buffer area number set" "2 areas,4 areas" bitfld.long 0x00 18. " TFA ,Software Reset Signal in the TSIF" "Reset internally,Released reset" bitfld.long 0x00 17. " DPDMD ,Duplicate Data of Consecutive TS Packets Delete" "Valid,Delete" textline " " bitfld.long 0x00 16. " DREQMD ,Selects whether the PEC bit in TSBUFCLRR is set to 1 automatically" "Interrupt transfer,Auto-transfer" bitfld.long 0x00 15. " EN ,Endian Type Set at TS Packet Data Reading from TSTSDR" "Big,Little" bitfld.long 0x00 14. " PCRMD ,Time Indication Set in TSPCRADC and TSTRPCRADC" "90 kHz,45 kHz" textline " " bitfld.long 0x00 13. " FRCMD ,Clock setting of TSFRC" "90 kHz,45 kHz" bitfld.long 0x00 12. " FRCSEL ,Setting of the base clock of TSFRC" "FRCPSC,TSFSCALER" bitfld.long 0x00 11. " FRCLATCH ,Snapshot setting of the internal free-run counter" "Off,On" textline " " bitfld.long 0x00 9.--10. " FRCADD ,TSFRC Value (Time Stamp) Addition at PID Matching" "Not added,Added 4 bytes,,Added 8 bytes" bitfld.long 0x00 8. " FRCSTR ,TSFRC Operation Set" "Stopped,Counting" hexmask.long.byte 0x00 0.--7. 1. " FRCPSC ,Division clock set for TSFRC" line.long 0x04 "TS1PIDR,TSIF PID Data Register" hexmask.long.word 0x04 16.--28. 1. " PIDD ,Byte Configuration Set of TS Packet Data" sif cpuis("R8A77440") if (((per.l(ad:0xFFE90000+0x08))&0x01800000)==0x0000000) group.long 0x08++0x03 line.long 0x00 "TS1CMDR,TSIF Command Register" bitfld.long 0x00 16.--20. 28. " PT ,Selecting a section for setting the PID table" "Video,Audio,PID_1,PID_2,PID_3,PID_4,PID_5,PID_6,PID_7,PID_8,PID_9,PID_10,PID_11,PID_12,PID_13,PID_14,PID_15,PID_16,PID_17,PID_18,PID_19,PID_20,PID_21,PID_22,PID_23,PID_24,PID_25,PID_26,PID_27,PID_28,PID_29,PID_30,PID_31,PID_32,PID_33,PID_34,PID_35,PID_36,PID_37,PID_38,PID_39,PID_40,PID_41,PID_42,PID_43,PID_44,PID_45,PID_46,PID_47,PID_48,PID_49,PID_50,PID_51,PID_52,PID_53,PID_54,PID_55,PID_56,PID_57,PID_58,PID_59,PID_60,PID_61,PID_62" bitfld.long 0x00 24. " PIDMD ,PID Filter Mode Set" "Set in PID table,All valid" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" textline " " bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" else group.long 0x08++0x03 line.long 0x00 "TS1CMDR,TSIF Command Register" bitfld.long 0x00 24. " PIDMD ,PID Filter Mode Set" "Set in PID table,All valid" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" endif else if (((per.l(ad:0xFFE90000+0x08))&0x1A00000)==0x0000000) group.long 0x08++0x3 line.long 0x00 "TS1CMDR,TSIF Command Register" bitfld.long 0x00 16.--20. 28. " PT ,Selecting a section for setting the PID table" "Video,Audio,PID_1,PID_2,PID_3,PID_4,PID_5,PID_6,PID_7,PID_8,PID_9,PID_10,PID_11,PID_12,PID_13,PID_14,PID_15,PID_16,PID_17,PID_18,PID_19,PID_20,PID_21,PID_22,PID_23,PID_24,PID_25,PID_26,PID_27,PID_28,PID_29,PID_30,PID_31,PID_32,PID_33,PID_34,PID_35,PID_36,PID_37,PID_38,PID_39,PID_40,PID_41,PID_42,PID_43,PID_44,PID_45,PID_46,PID_47,PID_48,PID_49,PID_50,PID_51,PID_52,PID_53,PID_54,PID_55,PID_56,PID_57,PID_58,PID_59,PID_60,PID_61,PID_62" bitfld.long 0x00 24.--25. " ALLPIDMD ,PID Filter Mode Set" "All valid,Other than null,Including null,Including null" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" textline " " bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" elif (((per.l(ad:0xFFE90000+0x08))&0x1A00000)==0x0200000) group.long 0x08++0x3 line.long 0x00 "TS1CMDR,TSIF Command Register" bitfld.long 0x00 16.--20. 28. " PT ,Selecting a section for setting the PID table" "PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID,PCR_PID" bitfld.long 0x00 24.--25. " ALLPIDMD ,PID Filter Mode Set" "All valid,Other than null,Including null,Including null" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" textline " " bitfld.long 0x00 21. " PPS ,Selecting a section for setting the PID table" "0,1" else group.long 0x08++0x3 line.long 0x00 "TS1CMDR,TSIF Command Register" bitfld.long 0x00 24.--25. " ALLPIDMD ,PID Filter Mode Set" "All valid,Other than null,Including null,Including null" bitfld.long 0x00 23. " TFE ,Content of the PID Table Cleared" ",Cleared" endif endif group.long 0x0C++0x3 line.long 0x00 "TS1STR,TSIF Interrupt Status Register" hexmask.long.word 0x00 16.--28. 1. " PID ,PID of the TS packet input immediately before" bitfld.long 0x00 13. " CM1MF ,COMPARE MATCH1 matching flag" "Not matched,Matched" bitfld.long 0x00 12. " CM0MF ,COMPARE MATCH0 matching flag" "Not matched,Matched" textline " " bitfld.long 0x00 10. " ADCF ,PCRADC Update Flag" "Not updated,Updated" bitfld.long 0x00 9. " PIDF ,Relevant PID Packet Reception Flag" "Not received,Received" bitfld.long 0x00 8. " STOF ,Packet Reception End Flag when Interrupt Generating" "Not updated,Updated" textline " " bitfld.long 0x00 7. " RANDF ,random_access_indicator Flag" "Not occurred,Occurred" bitfld.long 0x00 6. " DISCF ,PCR Discontinuity Flag" "Not occurred,Occurred" rbitfld.long 0x00 5. " SYNCF ,Internal Synchronous/Asynchronous Mode State caused by Detection of the TS Packet Sync Signal" "Synchronous,Asynchronous" textline " " bitfld.long 0x00 4. " OFEF ,TSIF Internal Buffer Overflow" "No overflow,Overflow" bitfld.long 0x00 2. " VSCF ,Video Packet Start Code Detection Flag" "Not detected,Detected" bitfld.long 0x00 1. " VSHF ,Video Packet Short Header Detection Flag" "Not detected,Detected" textline " " bitfld.long 0x00 0. " TSIFINTF ,TSIF Transfer Request Flag" "Not requested,Requested" rgroup.long 0x10++0x03 line.long 0x00 "TS1TSDR,TSIF TS Data Register" group.long 0x14++0x3 line.long 0x00 "TS1BUFCLRR,TSIF Buffer Clear Register" bitfld.long 0x00 0. " PEC ,Internal Buffer Clear" "No effect,Clear" group.long 0x18++0x3 line.long 0x00 "TS1INTER,TSIF Interrupt Enable Register" bitfld.long 0x00 13. " CM1ME ,Disables/ Enables an Interrupt when TSCMCNT1 counted down" "Disabled,Enabled" bitfld.long 0x00 12. " CM0ME ,Disables/ Enables an Interrupt when TSCMCNT0 counted down" "Disabled,Enabled" bitfld.long 0x00 10. " ADCE ,Disables/ Enables an Interrupt when PCRADC is updated" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PIDE ,Disables/ Enables an interrupt when the set PID packet is received in PID filter mode" "Disabled,Enabled" bitfld.long 0x00 8. " STOE ,Disables/ Enables an interrupt when the status is updated" "Disabled,Enabled" bitfld.long 0x00 7. " RANDE ,Disables/ Enables an interrupt when random_access_indicator of the TS packet input immediately before is 1" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " DISCE ,Disables/ Enables an interrupt when discontinuity_indicator of the PCR packet input immediately before indicates PCR discontinuity " "Disabled,Enabled" bitfld.long 0x00 5. " SYNCE ,Disables/ Enables an interrupt when the TSIF is in asynchronous mode" "Disabled,Enabled" bitfld.long 0x00 4. " OFEE ,Disables/ Enables an interrupt when an overflow error occurs in the internal buffer" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " VSCE ,Disables/ Enables an interrupt when the start code of a video packet is detected in the TS packet input immediately before " "Disabled,Enabled" bitfld.long 0x00 1. " VSHE ,Disables/ Enables an interrupt when the short header of a video packet is detected in the TS packet input immediately before" "Disabled,Enabled" bitfld.long 0x00 0. " TSIFINTE ,Disables/ Enables an interrupt when the internal buffer contains one packet (188 bytes) of TS data" "Disabled,Enabled" group.long 0x20++0xB line.long 0x00 "TS1PSCALER,TSIF PSCALE Register" hexmask.long.word 0x00 16.--27. 1. " PSCALE2 ,Counter value 2 of the internal prescaler" hexmask.long.word 0x00 0.--11. 1. " PSCALE1 ,Counter value 1 of the internal prescaler" line.long 0x04 "TS1PSCALERR,TSIF PSCALE_R Register" bitfld.long 0x04 16.--19. " PSCALE_R2 ,Ratio of counter value 2 of the internal prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PSCALE_R1 ,Ratio of counter value 1 of the internal prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "TS1PCRADCMDR,TSIF PCRADC Mode Register" bitfld.long 0x08 5. " EXT_MODE ,Sets whether PCR_extension is included in the calculation of D_PCRADC" "Not included,Included" textline " " sif (cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))) bitfld.long 0x08 0.--3. " TR_SEL ,Trigger signal for PCRADC to be input to the TSIF" "Not selected,RT-DMAC Ch.0,RT-DMAC Ch.1,,RT-DMAC Ch.2,?..." elif (CPUIS("R8A77430")||cpuis("R8A77440")) bitfld.long 0x08 0.--3. " TR_SEL ,Trigger signal for PCRADC to be input to the TSIF" "Not selected,?..." else bitfld.long 0x08 0.--3. " TR_SEL ,Trigger signal for PCRADC to be input to the TSIF" "Not selected,DMAC0 channel 0,DMAC0 channel 1,,DMAC0 channel 2,?..." endif rgroup.long 0x2C++0xB line.long 0x00 "TS1PCRADCR,TSIF PCRADC Register - PCR value incremented by the internal clock" line.long 0x04 "TS1TRPCRADCR,TSIF TR_PCRADC Register - PCRADC value read by a trigger signal for PCRADC selected by the TR_SEL bit" line.long 0x08 "TS1DPCRADCR,TSIF D_PCRADC Register - Value of the stream PCR minus PCRADC" group.long 0x40++0x13 line.long 0x00 "TS1FRCL,TSIF Free-Running Counter L" line.long 0x04 "TS1FRCH,TSIF Free-Running Counter H" line.long 0x08 "TS1FSCALER,TSIF FSCALE Register" hexmask.long.word 0x08 16.--27. 1. " FSCALE2 ,Internal prescaler counter value set 2" hexmask.long.word 0x08 0.--11. 1. " FSCALE1 ,Internal prescaler counter value set 1" line.long 0x0C "TS1FSCALERR,TSIF FSCALE_R Register" bitfld.long 0x0C 16.--19. " FSCALE_R2 ,Internal prescaler counter ratio value set 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " FSCALE_R1 ,Internal prescaler counter ratio value set 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "TS1CMCTLR,TSIF COMPARE MATCH Control Register" bitfld.long 0x10 31. " PIDEX ,Choose Use/Not_Use from PID34 to PID64" "Not used,Used" bitfld.long 0x10 4. " CM1GO ,COMPARE MATCH COUNTER1 run/stop" "Stopped,Started" bitfld.long 0x10 0. " CM0GO ,COMPARE MATCH COUNTER0 run/stop" "Stopped,Started" group.long 0x54++0x3 line.long 0x00 "TS1CMCNT0,TSIF COMPARE MATCH COUNTER0" group.long 0x5C++0x3 line.long 0x00 "TS1CMCNT1,TSIF COMPARE MATCH COUNTER1" group.long 0x64++0x3 line.long 0x00 "TS1CMCOR0,TSIF COMPARE MATCH CONSTANT Register 0" group.long 0x6C++0x3 line.long 0x00 "TS1CMCOR1,TSIF COMPARE MATCH CONSTANT Register1" group.long 0x74++0xB line.long 0x00 "TS1PCNT,TSIF TS PACKET COUNT Register" line.long 0x04 "TS1PCNTKP,TSIF TS PACKET COUNT KEEP Register" line.long 0x08 "TS1PCNTPSH,TSIF TS PACKET COUNT PUSH Register" bitfld.long 0x08 0. " PCTPH ,Copy value of TSPCNT" "No,Yes" width 0x0B tree.end tree.end tree "SIM (SIM Card Module)" base ad:0xE6E90000 width 9. group.byte 0x00++0x0 line.byte 0x00 "SCSMR,Serial Mode Register" bitfld.byte 0x00 4. " O/E ,Parity mode" "Even,Odd" group.byte 0x02++0x0 line.byte 0x00 "SCBRR,Bit Rate Register" hexmask.byte 0x00 0.--6. 1. " BRR ,Serial clock frequency for transmission/reception" group.byte 0x04++0x0 line.byte 0x00 "SCSCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.byte 0x00 3. " WAIT_IE ,Wait enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low level,Clock output,High level,Clock output" group.byte 0x06++0x0 line.byte 0x00 "SCTDR,Transmit Data Register" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77990*")) hgroup.byte 0x08++0x0 hide.byte 0x00 "SCSSR,Serial Status Register" in hgroup.byte 0x0A++0x0 hide.byte 0x00 "SCRDR,Receive Data Register" in else group.byte 0x08++0x0 line.byte 0x00 "SCSSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data register empty" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data register full" "Not full,Full" bitfld.byte 0x00 5. " ORER ,Overrun error" "No error,Error" textline " " bitfld.byte 0x00 4. " ERS ,Error signal status" "No error,Error" bitfld.byte 0x00 3. " PER ,Parity error" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.byte 0x00 1. " WAIT_ER ,Wait error" "No error,Error" rgroup.byte 0x0A++0x0 line.byte 0x00 "SCRDR,Receive Data Register" endif group.byte 0x0C++0x0 line.byte 0x00 "SCSCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " HOEN ,High output function enable" "Disabled,Enabled" bitfld.byte 0x00 6. " LCB ,Last character" "Extension determined,2 etu" bitfld.byte 0x00 5. " PB ,Protocol select" "T = 0,T = 1" textline " " bitfld.byte 0x00 4. " WECC ,Wait error counter clear" "Disabled,Enabled" bitfld.byte 0x00 3. " SDIR ,Smart card data transfer direction" "LSB first,MSB first" bitfld.byte 0x00 2. " SINV ,Smart card data invert" "Not inverted,Inverted" textline " " bitfld.byte 0x00 1. " RST ,Smart card reset" "Low,High" sif (cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77990*"))) rbitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" ",1" else rbitfld.byte 0x00 0. " SDIR ,Smart card interface mode select" ",1" endif group.byte 0xE++0x0 line.byte 0x00 "SCSC2R,Serial Control 2 Register" bitfld.byte 0x00 7. " EIO ,Error interrupt only" "Disabled,Enabled" group.byte 0x12++0x0 line.byte 0x00 "SCGRD,Guard Extension Register" group.word 0x10++0x1 line.word 0x00 "SCWAIT,Wait Time Register" group.word 0x14++0x1 line.word 0x00 "SCSMPL,Sample Register" hexmask.word 0x00 0.--10. 1. " SCSMPL ,Serial clock cycles number per etu" group.byte 0x16++0x0 line.byte 0x00 "SCDMAEN,DMA Enable Register" bitfld.byte 0x00 7. " RDMAE ,DMA Enable flag during reception" "Disabled,Enabled" bitfld.byte 0x00 6. " TDMAE ,DMA Enable flag during transmission" "Disabled,Enabled" width 0x0B tree.end tree.open "SSIU (Serial Sound Interface Unit)" tree "SSIU BUSIF 0" base ad:0xEC540000 width 24. group.long 0x0++0x03 line.long 0x00 "SSI0-0_BUSIF_MODE,SSI0-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI0-0_BUSIF_ADINR,SSI0-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540000+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI0-0_BUSIF_DALIGN,SSI0-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI0-0_BUSIF_DALIGN,SSI0-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI0-0_MODE,SSI0-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI0-0_CONTROL,SSI0-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI0-0_STATUS,SSI0-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI0-0_INT_ENABLE_MAIN,SSI0-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI0-0_STATUS,SSI0-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR0_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR0_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR0_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR0_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR0_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR0_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI0-0_INT_ENABLE_MAIN,SSI0-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI0_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI0_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI0_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI0_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI0_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI0_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 0-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 0-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 0-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 0-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI0-1_BUSIF_MODE,SSI0-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI0-1_BUSIF_ADINR,SSI0-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI0-1_BUSIF_DALIGN,SSI0-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI0-2_BUSIF_MODE,SSI0-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI0-2_BUSIF_ADINR,SSI0-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI0-2_BUSIF_DALIGN,SSI0-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI0-3_BUSIF_MODE,SSI0-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI0-3_BUSIF_ADINR,SSI0-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI0-3_BUSIF_DALIGN,SSI0-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC100000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI0-0_BUSIF,SSI0-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI0-1_BUSIF,SSI0-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI0-2_BUSIF,SSI0-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI0-3_BUSIF,SSI0-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC400000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-0_BUSIF,SSI0-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-1_BUSIF,SSI0-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-2_BUSIF,SSI0-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-3_BUSIF,SSI0-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 1" base ad:0xEC540080 width 24. group.long 0x0++0x03 line.long 0x00 "SSI1-0_BUSIF_MODE,SSI1-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI1-0_BUSIF_ADINR,SSI1-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540080+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI1-0_BUSIF_DALIGN,SSI1-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI1-0_BUSIF_DALIGN,SSI1-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI1-0_MODE,SSI1-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI1-0_CONTROL,SSI1-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI1-0_STATUS,SSI1-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI1-0_INT_ENABLE_MAIN,SSI1-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI1-0_STATUS,SSI1-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR1_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR1_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR1_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR1_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR1_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR1_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI1-0_INT_ENABLE_MAIN,SSI1-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI1_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI1_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI1_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI1_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI1_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI1_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 1-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 1-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 1-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI1-1_BUSIF_MODE,SSI1-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI1-1_BUSIF_ADINR,SSI1-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI1-1_BUSIF_DALIGN,SSI1-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI1-2_BUSIF_MODE,SSI1-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI1-2_BUSIF_ADINR,SSI1-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI1-2_BUSIF_DALIGN,SSI1-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI1-3_BUSIF_MODE,SSI1-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI1-3_BUSIF_ADINR,SSI1-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI1-3_BUSIF_DALIGN,SSI1-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC101000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI1-0_BUSIF,SSI1-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI1-1_BUSIF,SSI1-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI1-2_BUSIF,SSI1-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI1-3_BUSIF,SSI1-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC401000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-0_BUSIF,SSI1-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-1_BUSIF,SSI1-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-2_BUSIF,SSI1-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-3_BUSIF,SSI1-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 2" base ad:0xEC540100 width 24. group.long 0x0++0x03 line.long 0x00 "SSI2-0_BUSIF_MODE,SSI2-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI2-0_BUSIF_ADINR,SSI2-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540100+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI2-0_BUSIF_DALIGN,SSI2-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI2-0_BUSIF_DALIGN,SSI2-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI2-0_MODE,SSI2-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI2-0_CONTROL,SSI2-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI2-0_STATUS,SSI2-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI2-0_INT_ENABLE_MAIN,SSI2-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI2-0_STATUS,SSI2-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR2_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR2_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR2_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR2_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR2_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR2_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI2-0_INT_ENABLE_MAIN,SSI2-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI2_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI2_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI2_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI2_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI2_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI2_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 2-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 2-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 2-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 2-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 2-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI2-1_BUSIF_MODE,SSI2-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI2-1_BUSIF_ADINR,SSI2-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI2-1_BUSIF_DALIGN,SSI2-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI2-2_BUSIF_MODE,SSI2-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI2-2_BUSIF_ADINR,SSI2-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI2-2_BUSIF_DALIGN,SSI2-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI2-3_BUSIF_MODE,SSI2-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI2-3_BUSIF_ADINR,SSI2-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI2-3_BUSIF_DALIGN,SSI2-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC102000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI2-0_BUSIF,SSI2-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI2-1_BUSIF,SSI2-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI2-2_BUSIF,SSI2-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI2-3_BUSIF,SSI2-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC402000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-0_BUSIF,SSI2-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-1_BUSIF,SSI2-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-2_BUSIF,SSI2-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-3_BUSIF,SSI2-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 3" base ad:0xEC540180 width 24. group.long 0x00++0x0B line.long 0x00 "SSI3_BUSIF_MODE,SSI3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI3_BUSIF_ADINR,SSI3 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI3_BUSIF_DALIGN,SSI3 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI3_CONTROL,SSI3 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI3_STATUS,SSI3 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI3_INT_ENABLE_MAIN,SSI3 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI3_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI3_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI3_STATUS,SSI3 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR3_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR3_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR3_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR3_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR3_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR3_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI3_INT_ENABLE_MAIN,SSI3 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI3_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI3_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI3_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI3_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI3_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI3_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC103000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI3_BUSIF,SSI3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC403000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI3_BUSIF,SSI3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 4" base ad:0xEC540200 width 24. group.long 0x00++0x0B line.long 0x00 "SSI4_BUSIF_MODE,SSI4 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI4_BUSIF_ADINR,SSI4 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI4_BUSIF_DALIGN,SSI4 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI4_CONTROL,SSI4 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI4_STATUS,SSI4 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI4_INT_ENABLE_MAIN,SSI4 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI4_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI4_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI4_STATUS,SSI4 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR4_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR4_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR4_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR4_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR4_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR4_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI4_INT_ENABLE_MAIN,SSI4 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI4_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI4_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI4_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI4_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI4_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI4_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC104000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI4_BUSIF,SSI4_BUSIF Data Registers (Audio DMAC)" base ad:0xEC404000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI4_BUSIF,SSI4_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 5" base ad:0xEC540280 width 24. group.long 0x00++0x0B line.long 0x00 "SSI5_BUSIF_MODE,SSI5 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI5_BUSIF_ADINR,SSI5 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI5_BUSIF_DALIGN,SSI5 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI5_CONTROL,SSI5 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI5_STATUS,SSI5 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI5_INT_ENABLE_MAIN,SSI5 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI5_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI5_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI5_STATUS,SSI5 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR5_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR5_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR5_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR5_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR5_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR5_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI5_INT_ENABLE_MAIN,SSI5 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI5_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI5_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI5_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI5_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI5_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI5_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC105000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI5_BUSIF,SSI5_BUSIF Data Registers (Audio DMAC)" base ad:0xEC405000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI5_BUSIF,SSI5_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 6" base ad:0xEC540300 width 24. group.long 0x00++0x0B line.long 0x00 "SSI6_BUSIF_MODE,SSI6 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI6_BUSIF_ADINR,SSI6 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI6_BUSIF_DALIGN,SSI6 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI6_CONTROL,SSI6 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI6_STATUS,SSI6 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI6_INT_ENABLE_MAIN,SSI6 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI6_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI6_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI6_STATUS,SSI6 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR6_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR6_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR6_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR6_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR6_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR6_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI6_INT_ENABLE_MAIN,SSI6 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI6_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI6_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI6_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI6_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI6_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI6_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC106000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI6_BUSIF,SSI6_BUSIF Data Registers (Audio DMAC)" base ad:0xEC406000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI6_BUSIF,SSI6_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 7" base ad:0xEC540380 width 24. group.long 0x00++0x0B line.long 0x00 "SSI7_BUSIF_MODE,SSI7 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI7_BUSIF_ADINR,SSI7 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI7_BUSIF_DALIGN,SSI7 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI7_CONTROL,SSI7 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI7_STATUS,SSI7 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI7_INT_ENABLE_MAIN,SSI7 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI7_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI7_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI7_STATUS,SSI7 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR7_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR7_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR7_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR7_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR7_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR7_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI7_INT_ENABLE_MAIN,SSI7 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI7_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI7_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI7_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI7_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI7_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI7_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC107000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI7_BUSIF,SSI7_BUSIF Data Registers (Audio DMAC)" base ad:0xEC407000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI7_BUSIF,SSI7_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 8" base ad:0xEC540400 width 24. group.long 0x00++0x0B line.long 0x00 "SSI8_BUSIF_MODE,SSI8 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI8_BUSIF_ADINR,SSI8 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI8_BUSIF_DALIGN,SSI8 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI8_CONTROL,SSI8 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI8_STATUS,SSI8 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI8_INT_ENABLE_MAIN,SSI8 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI8_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI8_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI8_STATUS,SSI8 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR8_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR8_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR8_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR8_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR8_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR8_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI8_INT_ENABLE_MAIN,SSI8 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI8_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI8_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI8_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI8_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI8_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI8_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC108000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI8_BUSIF,SSI8_BUSIF Data Registers (Audio DMAC)" base ad:0xEC408000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI8_BUSIF,SSI8_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU BUSIF 9" base ad:0xEC540480 width 24. group.long 0x0++0x03 line.long 0x00 "SSI9-0_BUSIF_MODE,SSI9-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI9-0_BUSIF_ADINR,SSI9-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540480+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI9-0_BUSIF_DALIGN,SSI9-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI9-0_BUSIF_DALIGN,SSI9-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI9-0_MODE,SSI9-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI9-0_CONTROL,SSI9-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI9-0_STATUS,SSI9-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI9-0_INT_ENABLE_MAIN,SSI9-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI9-0_STATUS,SSI9-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR9_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR9_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR9_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR9_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR9_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR9_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI9-0_INT_ENABLE_MAIN,SSI9-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI9_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI9_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI9_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI9_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI9_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI9_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 9-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 9-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 9-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 9-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 9-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 9-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI9-1_BUSIF_MODE,SSI9-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI9-1_BUSIF_ADINR,SSI9-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI9-1_BUSIF_DALIGN,SSI9-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI9-2_BUSIF_MODE,SSI9-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI9-2_BUSIF_ADINR,SSI9-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI9-2_BUSIF_DALIGN,SSI9-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI9-3_BUSIF_MODE,SSI9-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI9-3_BUSIF_ADINR,SSI9-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI9-3_BUSIF_DALIGN,SSI9-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC109000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI9-0_BUSIF,SSI9-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI9-1_BUSIF,SSI9-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI9-2_BUSIF,SSI9-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI9-3_BUSIF,SSI9-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC409000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-0_BUSIF,SSI9-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-1_BUSIF,SSI9-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-2_BUSIF,SSI9-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-3_BUSIF,SSI9-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU" base ad:0xEC540800 width 13. sif !cpuis("R8A7792X") group.long 0x00++0x03 line.long 0x00 "SSI_MODE0,SSI Mode Register 0" bitfld.long 0x00 25. " IND_WORD_SWAP9 ,Word order swap 9" "Not swapped,Swapped" bitfld.long 0x00 24. " IND_WORD_SWAP8 ,Word order swap 8" "Not swapped,Swapped" bitfld.long 0x00 23. " IND_WORD_SWAP7 ,Word order swap 7" "Not swapped,Swapped" textline " " bitfld.long 0x00 22. " IND_WORD_SWAP6 ,Word order swap 6" "Not swapped,Swapped" bitfld.long 0x00 21. " IND_WORD_SWAP5 ,Word order swap 5" "Not swapped,Swapped" bitfld.long 0x00 20. " IND_WORD_SWAP4 ,Word order swap 4" "Not swapped,Swapped" textline " " bitfld.long 0x00 19. " IND_WORD_SWAP3 ,Word order swap 3" "Not swapped,Swapped" bitfld.long 0x00 18. " IND_WORD_SWAP2 ,Word order swap 2" "Not swapped,Swapped" bitfld.long 0x00 17. " IND_WORD_SWAP1 ,Word order swap 1" "Not swapped,Swapped" textline " " bitfld.long 0x00 16. " IND_WORD_SWAP0 ,Word order swap 0" "Not swapped,Swapped" bitfld.long 0x00 9. " IND9 ,Independent SSI transfer status 9" "Not performed,Performed" bitfld.long 0x00 8. " IND8 ,Independent SSI transfer status 8" "Not performed,Performed" textline " " bitfld.long 0x00 7. " IND7 ,Independent SSI transfer status 7" "Not performed,Performed" bitfld.long 0x00 6. " IND6 ,Independent SSI transfer status 6" "Not performed,Performed" bitfld.long 0x00 5. " IND5 ,Independent SSI transfer status 5" "Not performed,Performed" textline " " bitfld.long 0x00 4. " IND4 ,Independent SSI transfer status 4" "Not performed,Performed" bitfld.long 0x00 3. " IND3 ,Independent SSI transfer status 3" "Not performed,Performed" bitfld.long 0x00 2. " IND2 ,Independent SSI transfer status 2" "Not performed,Performed" textline " " bitfld.long 0x00 1. " IND1 ,Independent SSI transfer status 1" "Not performed,Performed" bitfld.long 0x00 0. " IND0 ,Independent SSI transfer status 0" "Not performed,Performed" else group.long 0x00++0x03 line.long 0x00 "SSI_MODE0,SSI Mode Register 0" bitfld.long 0x00 20. " IND_WORD_SWAP4 ,Word order swap 4" "Not swapped,Swapped" bitfld.long 0x00 19. " IND_WORD_SWAP3 ,Word order swap 3" "Not swapped,Swapped" textline " " bitfld.long 0x00 4. " IND4 ,Independent SSI transfer status 4" "Not performed,Performed" bitfld.long 0x00 3. " IND3 ,Independent SSI transfer status 3" "Not performed,Performed" endif group.long 0x04++0x03 line.long 0x00 "SSI_MODE1,SSI Mode Register 1" bitfld.long 0x00 20. " SSI34_SYNC ,SSI3 and SSI4 synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 16.--17. " SSI4_PIN ,SSI4 pin mode" "Own pins,Slaves,Master/Slave,?..." sif !cpuis("R8A7792X") bitfld.long 0x00 4. " SSI012_3MOD ,Use SSI0/SSI1/SSI2 together as six channels" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " SSI2_PIN ,SS2 pin mode" "Own pins,Slaves,Master/Slave,?..." bitfld.long 0x00 0.--1. " SSI1_PIN ,SS1 pin mode" "Own pins,Slaves,Master/Slave,?..." endif sif !cpuis("R8A7792X") group.long 0x08++0x07 line.long 0x00 "SSI_MODE2,SSI Mode Register 2" bitfld.long 0x00 4. " SSI0129_4MOD ,Use SSI0/SSI1/SSI2/SSI9 together as eight channels" "Disabled,Enabled" bitfld.long 0x00 0.--2. " SSI9_PIN ,SSI9 pin mode" "Own pins,Slaves,Master/Slave,,,Slaves,Master/Slave,?..." line.long 0x04 "SSI_MODE3,SSI Mode Register 3" bitfld.long 0x04 0.--1. " SSI3_PIN ,SSI3 pin mode" "Own pins,Slaves,Master/Slave,?..." endif group.long 0x10++0x03 line.long 0x00 "SSI_CONTROL,SSI Control Register" bitfld.long 0x00 4. " SSI34 ,SSI34 enable" "Disabled,Enabled" sif !cpuis("R8A7792X") bitfld.long 0x00 0. " SSI0129 ,SSI0129 enable" "Disabled,Enabled" endif textline " " width 24. sif !cpuis("R8A7792X") group.long 0x40++0x1F line.long 0x00 "SSI_SYSTEM_STATUS0,SSI SYSTEM Status Register 0" eventfld.long 0x00 11. " OF2-3 ,Buffer overflow 2-3" "Not occurred,Occurred" eventfld.long 0x00 10. " OF2-2 ,Buffer overflow 2-2" "Not occurred,Occurred" eventfld.long 0x00 9. " OF2-1 ,Buffer overflow 2-1" "Not occurred,Occurred" textline " " eventfld.long 0x00 8. " OF2-0 ,Buffer overflow 2-0" "Not occurred,Occurred" eventfld.long 0x00 7. " OF1-3 ,Buffer overflow 1-3" "Not occurred,Occurred" eventfld.long 0x00 6. " OF1-2 ,Buffer overflow 1-2" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " OF1-1 ,Buffer overflow 1-1" "Not occurred,Occurred" eventfld.long 0x00 4. " OF1-0 ,Buffer overflow 1-0" "Not occurred,Occurred" eventfld.long 0x00 3. " OF0-3 ,Buffer overflow 0-3" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " OF0-2 ,Buffer overflow 0-2" "Not occurred,Occurred" eventfld.long 0x00 1. " OF0-1 ,Buffer overflow 0-1" "Not occurred,Occurred" eventfld.long 0x00 0. " OF0-0 ,Buffer overflow 0-0" "Not occurred,Occurred" line.long 0x04 "SSI_SYSTEM_STATUS1,SSI SYSTEM Status Register 1" eventfld.long 0x04 7. " OF9-3 ,Buffer overflow 9-3" "Not occurred,Occurred" eventfld.long 0x04 6. " OF9-2 ,Buffer overflow 9-2" "Not occurred,Occurred" eventfld.long 0x04 5. " OF9-1 ,Buffer overflow 9-1" "Not occurred,Occurred" textline " " eventfld.long 0x04 4. " OF9-0 ,Buffer overflow 9-0" "Not occurred,Occurred" line.long 0x08 "SSI_SYSTEM_STATUS2,SSI SYSTEM Status Register 2" eventfld.long 0x08 11. " UF2-3 ,Buffer underflow 2-3" "Not occurred,Occurred" eventfld.long 0x08 10. " UF2-2 ,Buffer underflow 2-2" "Not occurred,Occurred" eventfld.long 0x08 9. " UF2-1 ,Buffer underflow 2-1" "Not occurred,Occurred" textline " " eventfld.long 0x08 8. " UF2-0 ,Buffer underflow 2-0" "Not occurred,Occurred" eventfld.long 0x08 7. " UF1-3 ,Buffer underflow 1-3" "Not occurred,Occurred" eventfld.long 0x08 6. " UF1-2 ,Buffer underflow 1-2" "Not occurred,Occurred" textline " " eventfld.long 0x08 5. " UF1-1 ,Buffer underflow 1-1" "Not occurred,Occurred" eventfld.long 0x08 4. " UF1-0 ,Buffer underflow 1-0" "Not occurred,Occurred" eventfld.long 0x08 3. " UF0-3 ,Buffer underflow 0-3" "Not occurred,Occurred" textline " " eventfld.long 0x08 2. " UF0-2 ,Buffer underflow 0-2" "Not occurred,Occurred" eventfld.long 0x08 1. " UF0-1 ,Buffer underflow 0-1" "Not occurred,Occurred" eventfld.long 0x08 0. " UF0-0 ,Buffer underflow 0-0" "Not occurred,Occurred" line.long 0x0C "SSI_SYSTEM_STATUS3,SSI SYSTEM Status Register 3" eventfld.long 0x0C 7. " UF9-3 ,Buffer underflow 9-3" "Not occurred,Occurred" eventfld.long 0x0C 6. " UF9-2 ,Buffer underflow 9-2" "Not occurred,Occurred" eventfld.long 0x0C 5. " UF9-1 ,Buffer underflow 9-1" "Not occurred,Occurred" textline " " eventfld.long 0x0C 4. " UF9-0 ,Buffer underflow 9-0" "Not occurred,Occurred" textline " " line.long 0x10 "SSI_SYSTEM_INT_ENABLE0,SSI SYSTEM Interrupt Enable Register 0" bitfld.long 0x10 11. " OF2-3_IE ,Buffer overflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 10. " OF2-2_IE ,Buffer overflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 9. " OF2-1_IE ,Buffer overflow 2-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " OF2-0_IE ,Buffer overflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 7. " OF1-3_IE ,Buffer overflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 6. " OF1-2_IE ,Buffer overflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " OF1-1_IE ,Buffer overflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 4. " OF1-0_IE ,Buffer overflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 3. " OF0-3_IE ,Buffer overflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " OF0-2_IE ,Buffer overflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 1. " OF0-1_IE ,Buffer overflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 0. " OF0-0_IE ,Buffer overflow 0-0 interrupt enable" "Disabled,Enabled" line.long 0x14 "SSI_SYSTEM_INT_ENABLE1,SSI SYSTEM Interrupt Enable Register 1" bitfld.long 0x14 7. " OF9-3 ,Buffer overflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 6. " OF9-2 ,Buffer overflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " OF9-1 ,Buffer overflow 9-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " OF9-0 ,Buffer overflow 9-0 interrupt enable" "Disabled,Enabled" line.long 0x18 "SSI_SYSTEM_INT_ENABLE2,SSI SYSTEM Interrupt Enable Register 2" bitfld.long 0x18 11. " UF2-3_IE ,Buffer underflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 10. " UF2-2_IE ,Buffer underflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 9. " UF2-1_IE ,Buffer underflow 2-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " UF2-0_IE ,Buffer underflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 7. " UF1-3_IE ,Buffer underflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 6. " UF1-2_IE ,Buffer underflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " UF1-1_IE ,Buffer underflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 4. " UF1-0_IE ,Buffer underflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 3. " UF0-3_IE ,Buffer underflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " UF0-2_IE ,Buffer underflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 1. " UF0-1_IE ,Buffer underflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 0. " UF0-0_IE ,Buffer underflow 0-0 interrupt enable" "Disabled,Enabled" line.long 0x1C "SSI_SYSTEM_INT_ENABLE3,SSI SYSTEM Interrupt Enable Register 3" bitfld.long 0x1C 7. " UF9-3_IE ,Buffer underflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " UF9-2_IE ,Buffer underflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " UF9-1_IE ,Buffer underflow 9-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " UF9-0_IE ,Buffer underflow 9-0 interrupt enable" "Disabled,Enabled" endif width 0x0B tree.end tree.end tree.open "SSI (Serial Sound Interface)" tree "Channel 0" base ad:0xEC541000 width 15. if (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541000))&0x02)==0x00)&&(((per.l(ad:0xEC541000+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541000))&0x02)==0x02)&&(((per.l(ad:0xEC541000+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541000))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR0,Transmit Data Register 0" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR0,Receive Data Register 0" if (((per.l(ad:0xEC541000+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541000))&0xc000)==0xc000)||(((per.l(ad:0xEC541000))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541000+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541000))&0xc000)==0xc000))||(((per.l(ad:0xEC541000))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541000+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541000+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541000+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541000))&0xc000)==0xc000))||(((per.l(ad:0xEC541000))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR0,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR0,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE0,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 1" base ad:0xEC541040 width 15. if (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541040))&0x02)==0x00)&&(((per.l(ad:0xEC541040+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541040))&0x02)==0x02)&&(((per.l(ad:0xEC541040+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541040))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR1,Transmit Data Register 1" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR1,Receive Data Register 1" if (((per.l(ad:0xEC541040+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541040))&0xc000)==0xc000)||(((per.l(ad:0xEC541040))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541040+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541040))&0xc000)==0xc000))||(((per.l(ad:0xEC541040))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541040+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541040+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541040+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541040))&0xc000)==0xc000))||(((per.l(ad:0xEC541040))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR1,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR1,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE1,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 2" base ad:0xEC541080 width 15. if (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541080))&0x02)==0x00)&&(((per.l(ad:0xEC541080+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541080))&0x02)==0x02)&&(((per.l(ad:0xEC541080+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541080))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR2,Transmit Data Register 2" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR2,Receive Data Register 2" if (((per.l(ad:0xEC541080+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541080))&0xc000)==0xc000)||(((per.l(ad:0xEC541080))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541080+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541080))&0xc000)==0xc000))||(((per.l(ad:0xEC541080))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541080+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541080+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541080+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541080))&0xc000)==0xc000))||(((per.l(ad:0xEC541080))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR2,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR2,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE2,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 3" base ad:0xEC5410C0 width 15. if (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC5410C0))&0x02)==0x00)&&(((per.l(ad:0xEC5410C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC5410C0))&0x02)==0x02)&&(((per.l(ad:0xEC5410C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC5410C0))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR3,Transmit Data Register 3" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR3,Receive Data Register 3" if (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC5410C0))&0xc000)==0xc000)||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC5410C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC5410C0+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC5410C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR3,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR3,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE3,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 4" base ad:0xEC541100 width 15. if (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541100))&0x02)==0x00)&&(((per.l(ad:0xEC541100+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541100))&0x02)==0x02)&&(((per.l(ad:0xEC541100+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541100))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR4,Transmit Data Register 4" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR4,Receive Data Register 4" if (((per.l(ad:0xEC541100+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541100))&0xc000)==0xc000)||(((per.l(ad:0xEC541100))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541100))&0xc000)==0xc000))||(((per.l(ad:0xEC541100))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541100+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541100))&0xc000)==0xc000))||(((per.l(ad:0xEC541100))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR4,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR4,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE4,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 5" base ad:0xEC541140 width 15. if (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541140))&0x02)==0x00)&&(((per.l(ad:0xEC541140+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541140))&0x02)==0x02)&&(((per.l(ad:0xEC541140+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541140))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR5,Transmit Data Register 5" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR5,Receive Data Register 5" if (((per.l(ad:0xEC541140+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541140))&0xc000)==0xc000)||(((per.l(ad:0xEC541140))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541140+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541140))&0xc000)==0xc000))||(((per.l(ad:0xEC541140))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541140+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541140+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541140+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541140))&0xc000)==0xc000))||(((per.l(ad:0xEC541140))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR5,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR5,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 6" base ad:0xEC541180 width 15. if (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541180))&0x02)==0x00)&&(((per.l(ad:0xEC541180+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541180))&0x02)==0x02)&&(((per.l(ad:0xEC541180+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541180))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR6,Transmit Data Register 6" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR6,Receive Data Register 6" if (((per.l(ad:0xEC541180+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541180))&0xc000)==0xc000)||(((per.l(ad:0xEC541180))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541180+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541180))&0xc000)==0xc000))||(((per.l(ad:0xEC541180))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541180+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541180+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541180+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541180))&0xc000)==0xc000))||(((per.l(ad:0xEC541180))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR6,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR6,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 7" base ad:0xEC5411C0 width 15. if (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC5411C0))&0x02)==0x00)&&(((per.l(ad:0xEC5411C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC5411C0))&0x02)==0x02)&&(((per.l(ad:0xEC5411C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC5411C0))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR7,Transmit Data Register 7" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR7,Receive Data Register 7" if (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC5411C0))&0xc000)==0xc000)||(((per.l(ad:0xEC5411C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC5411C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5411C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC5411C0+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC5411C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5411C0))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR7,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR7,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 8" base ad:0xEC541200 width 15. if (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541200))&0x02)==0x00)&&(((per.l(ad:0xEC541200+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541200))&0x02)==0x02)&&(((per.l(ad:0xEC541200+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541200))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR8,Transmit Data Register 8" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR8,Receive Data Register 8" if (((per.l(ad:0xEC541200+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541200))&0xc000)==0xc000)||(((per.l(ad:0xEC541200))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541200+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541200))&0xc000)==0xc000))||(((per.l(ad:0xEC541200))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541200+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541200+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541200+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541200))&0xc000)==0xc000))||(((per.l(ad:0xEC541200))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR8,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR8,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 9" base ad:0xEC541240 width 15. if (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541240))&0x02)==0x00)&&(((per.l(ad:0xEC541240+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541240))&0x02)==0x02)&&(((per.l(ad:0xEC541240+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541240))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR9,Transmit Data Register 9" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR9,Receive Data Register 9" if (((per.l(ad:0xEC541240+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541240))&0xc000)==0xc000)||(((per.l(ad:0xEC541240))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541240+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541240))&0xc000)==0xc000))||(((per.l(ad:0xEC541240))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541240+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541240+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541240+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541240))&0xc000)==0xc000))||(((per.l(ad:0xEC541240))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR9,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR9,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE9,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree.end tree "ADG (Audio Clock Generator)" base ad:0xEC5A0000 width 16. group.long 0x00++0x17 line.long 0x00 "BRRA,BRGA Baud Rate Set Register" bitfld.long 0x00 8.--9. " CKS ,Clock Source Select for Baud Rate Generator A" "ACLK_A,ACLK_A/4,ACLK_A/16,ACLK_A/64" hexmask.long.byte 0x00 0.--7. 1. " BRRA ,Dividing Factor Set" line.long 0x04 "BRRB,BRGB Baud Rate Set Register" bitfld.long 0x04 8.--9. " CKS ,Clock Source Select for Baud Rate Generator B" "ACLK_B,ACLK_B/4,ACLK_B/16,ACLK_B/64" hexmask.long.byte 0x04 0.--7. 1. " BRRB ,Dividing Factor Set" line.long 0x08 "SSICKR,Clock Select Register" bitfld.long 0x08 31. " SSICKR_31 ,Selects the clock output to the external pin AUDIO_CLKOUT" "BRGA output,BRGB output" textline " " bitfld.long 0x08 20.--22. " SSICKR_[22:20] ,Selects the clock input to the BRGA" "AUDIO_CLKA,AUDIO_CLKB,X_m2ck,X_m2ck,AUDIO_CLKC,Fixed at 0,Fixed at 0,Fixed at 0" textline " " bitfld.long 0x08 16.--18. " SSICKR_[18:16] ,Selects the clock input to the BRGB" "AUDIO_CLKA,AUDIO_CLKB,X_m2ck,X_m2ck,AUDIO_CLKC,Fixed at 0,Fixed at 0,Fixed at 0" line.long 0x0c "AUDIO_CLK_SEL0,Audio Clock Select Register 0" bitfld.long 0x0c 30.--31. 27. " DIVSEL_SSI3 ,SSI3 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 28.--29. " ACLK_SEL_SSI3 ,SSI3 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 24.--26. " DIVCLK_SEL_SSI3 ,SSI3 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x0c 22.--23. 19. " DIVSEL_SSI2 ,SSI2 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 20.--21. " ACLK_SEL_SSI2 ,SSI2 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 16.--18. " DIVCLK_SEL_SSI2 ,SSI2 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLBCLK/MLPCLK,?..." textline " " bitfld.long 0x0c 14.--15. 11. " DIVSEL_SSI1 ,SSI1 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 12.--13. " ACLK_SEL_SSI1 ,SSI1 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 8.--10. " DIVCLK_SEL_SSI1 ,SSI1 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x0c 6.--7. 3. " DIVSEL_SSI0 ,SSI0 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 4.--5. " ACLK_SEL_SSI0 ,SSI0 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 0.--2. " DIVCLK_SEL_SSI0 ,SSI0 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." line.long 0x10 "AUDIO_CLK_SEL1,Audio Clock Select Register 1" bitfld.long 0x10 30.--31. 27. " DIVSEL_SSI7 ,SSI7 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 28.--29. " ACLK_SEL_SSI7 ,SSI7 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 24.--26. " DIVCLK_SEL_SSI7 ,SSI7 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x10 22.--23. 19. " DIVSEL_SSI6 ,SSI6 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 20.--21. " ACLK_SEL_SSI6 ,SSI6 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 16.--18. " DIVCLK_SEL_SSI6 ,SSI6 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLBCLK/MLPCLK,?..." textline " " bitfld.long 0x10 14.--15. 11. " DIVSEL_SSI5 ,SSI5 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 12.--13. " ACLK_SEL_SSI5 ,SSI5 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 8.--10. " DIVCLK_SEL_SSI5 ,SSI5 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x10 6.--7. 3. " DIVSEL_SSI4 ,SSI4 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 4.--5. " ACLK_SEL_SSI4 ,SSI4 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 0.--2. " DIVCLK_SEL_SSI4 ,SSI4 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." line.long 0x14 "AUDIO_CLK_SEL2,Audio Clock Select Register 2" bitfld.long 0x14 14.--15. 11. " DIVSEL_SSI9 ,SSI9 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x14 12.--13. " ACLK_SEL_SSI9 ,SSI9 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x14 8.--10. " DIVCLK_SEL_SSI9 ,SSI9 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLBCLK/MLPCLK,?..." group.long 0x30++0x03 line.long 0x00 "DIV_EN,Audio Clock Frequency Division Enable Register" bitfld.long 0x00 5. " BRGB_DIV_EN ,Enables the BRGB frequency divider" "Disabled,Enabled" bitfld.long 0x00 4. " BRGA_DIV_EN ,Enables the BRGA frequency divider" "Disabled,Enabled" bitfld.long 0x00 3. " AUDIO_CLK_C_DIV_EN ,Enables the AUDIO_CLK_C frequency divider" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AUDIO_CLK_B_DIV_EN ,Enables the AUDIO_CLK_B frequency divider" "Disabled,Enabled" bitfld.long 0x00 1. " AUDIO_CLK_A_DIV_EN ,Enables the AUDIO_CLK_A frequency divider" "Disabled,Enabled" bitfld.long 0x00 0. " MLBP_DIV_EN ,Enables frequency division for MLPCLK" "Disabled,Enabled" group.long 0x34++0x2B line.long 0x0 "SRCIN_TIMSEL0,SRC Input Timing Select Register 0" bitfld.long 0x0 24.--27. " SRC1_IN_DIVCLK_SEL ,SRC1 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x0 16.--20. " SRC1_IN_DIVRATIO_SEL ,SRC1 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x0 8.--11. " SRC0_IN_DIVCLK_SEL ,SRC0 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x0 0.--4. " SRC0_IN_DIVRATIO_SEL ,SRC0 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x4 "SRCIN_TIMSEL1,SRC Input Timing Select Register 1" bitfld.long 0x4 24.--27. " SRC3_IN_DIVCLK_SEL ,SRC3 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x4 16.--20. " SRC3_IN_DIVRATIO_SEL ,SRC3 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x4 8.--11. " SRC2_IN_DIVCLK_SEL ,SRC2 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x4 0.--4. " SRC2_IN_DIVRATIO_SEL ,SRC2 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x8 "SRCIN_TIMSEL2,SRC Input Timing Select Register 2" bitfld.long 0x8 24.--27. " SRC5_IN_DIVCLK_SEL ,SRC5 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x8 16.--20. " SRC5_IN_DIVRATIO_SEL ,SRC5 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x8 8.--11. " SRC4_IN_DIVCLK_SEL ,SRC4 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x8 0.--4. " SRC4_IN_DIVRATIO_SEL ,SRC4 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0xC "SRCIN_TIMSEL3,SRC Input Timing Select Register 3" bitfld.long 0xC 24.--27. " SRC7_IN_DIVCLK_SEL ,SRC7 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0xC 16.--20. " SRC7_IN_DIVRATIO_SEL ,SRC7 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0xC 8.--11. " SRC6_IN_DIVCLK_SEL ,SRC6 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0xC 0.--4. " SRC6_IN_DIVRATIO_SEL ,SRC6 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x10 "SRCIN_TIMSEL4,SRC Input Timing Select Register 4" bitfld.long 0x10 24.--27. " SRC9_IN_DIVCLK_SEL ,SRC9 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x10 16.--20. " SRC9_IN_DIVRATIO_SEL ,SRC9 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x10 8.--11. " SRC8_IN_DIVCLK_SEL ,SRC8 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x10 0.--4. " SRC8_IN_DIVRATIO_SEL ,SRC8 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x14 "SRCOUT_TIMSEL0,SRC Output Timing Select Register 0" bitfld.long 0x14 24.--27. " SRC1_OUT_DIVCLK_SEL ,SRC1 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x14 16.--20. " SRC1_OUT_DIVRATIO_SEL ,SRC1 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x14 8.--11. " SRC0_OUT_DIVCLK_SEL ,SRC0 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x14 0.--4. " SRC0_OUT_DIVRATIO_SEL ,SRC0 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x18 "SRCOUT_TIMSEL1,SRC Output Timing Select Register 1" bitfld.long 0x18 24.--27. " SRC3_OUT_DIVCLK_SEL ,SRC3 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x18 16.--20. " SRC3_OUT_DIVRATIO_SEL ,SRC3 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x18 8.--11. " SRC2_OUT_DIVCLK_SEL ,SRC2 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x18 0.--4. " SRC2_OUT_DIVRATIO_SEL ,SRC2 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x1C "SRCOUT_TIMSEL2,SRC Output Timing Select Register 2" bitfld.long 0x1C 24.--27. " SRC5_OUT_DIVCLK_SEL ,SRC5 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x1C 16.--20. " SRC5_OUT_DIVRATIO_SEL ,SRC5 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x1C 8.--11. " SRC4_OUT_DIVCLK_SEL ,SRC4 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x1C 0.--4. " SRC4_OUT_DIVRATIO_SEL ,SRC4 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x20 "SRCOUT_TIMSEL3,SRC Output Timing Select Register 3" bitfld.long 0x20 24.--27. " SRC7_OUT_DIVCLK_SEL ,SRC7 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x20 16.--20. " SRC7_OUT_DIVRATIO_SEL ,SRC7 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x20 8.--11. " SRC6_OUT_DIVCLK_SEL ,SRC6 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x20 0.--4. " SRC6_OUT_DIVRATIO_SEL ,SRC6 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x24 "SRCOUT_TIMSEL4,SRC Output Timing Select Register 4" bitfld.long 0x24 24.--27. " SRC9_OUT_DIVCLK_SEL ,SRC9 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x24 16.--20. " SRC9_OUT_DIVRATIO_SEL ,SRC9 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x24 8.--11. " SRC8_OUT_DIVCLK_SEL ,SRC8 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x24 0.--4. " SRC8_OUT_DIVRATIO_SEL ,SRC8 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x28 "CMDOUT_TIMSEL,CMD Output Timing Select Register" bitfld.long 0x28 24.--27. " CMD1_OUT_DIVCLK_SEL ,CMD1 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x28 16.--20. " CMD1_OUT_DIVRATIO_SEL ,CMD1 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x28 8.--11. " CMD0_OUT_DIVCLK_SEL ,CMD0 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x28 0.--4. " CMD0_OUT_DIVRATIO_SEL ,CMD0 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." group.long 0x64++0x3 line.long 0x00 "DTCP_TIMSEL,DTCP Timing Select Register" bitfld.long 0x00 8.--9. " DTCP1_TIMING_SEL ,DTCP1 timing signal select" "48 kHz,96 kHz,192 kHz,?..." bitfld.long 0x00 0.--1. " DTCP0_TIMING_SEL ,DTCP0 timing signal select" "48 kHz,96 kHz,192 kHz,?..." width 0xb tree.end tree "ADSP (Audio DSP)" base ad:0xEC800000 width 16. group.long 0x00++0x7 line.long 0x00 "BRESET,BReset Control Register" bitfld.long 0x00 0. " RST ,BReset signal control" "No reset,Reset" line.long 0x04 "RUNSTALL,RunStall Control Register" bitfld.long 0x04 0. " STALL ,RunStall signal control" "Run,Stall" rgroup.long 0x08++0x3 line.long 0x00 "PWAITMODE,PWaitMode Register" bitfld.long 0x00 0. " WAIT ,PWaitMode signal monitor" "Disabled,Enabled" group.long 0x0C++0x3 line.long 0x00 "OCDHALTONRESET,OCDHaltOnReset Control Register" bitfld.long 0x00 0. " HALT ,OCDHaltOnReset signal control" "Disabled,Enabled" group.long 0x14++0x3 line.long 0x00 "STATVECTORSEL,StatVectorSel Control Register" bitfld.long 0x00 0. " SEL ,StatVectorSel signal control" "Primary,Alternate" rgroup.long 0x18++0x3 line.long 0x00 "XOCDMODE,XOCDMode Register" bitfld.long 0x00 0. " HALT ,OCDHaltOnReset signal control" "Disabled,Enabled" group.long 0x40++0x3 line.long 0x00 "IRQOUT_STS,Output Interrupt Status Register" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " STS_set/clr ,Corresponding output interrupt monitor" "No interrupt,Interrupt" group.long 0x4C++0x3 line.long 0x00 "IRQOUT_POL,Output Interrupt Polarity Register" bitfld.long 0x00 0. " POL ,Corresponding output interrupt polarity control" "High,Low" rgroup.long 0x80++0x3 line.long 0x00 "IRQIN_STS,Input Interrupt Status Register" bitfld.long 0x00 16. " STS16 ,Input interrupt monitor 16" "No interrupt,Interrupt" bitfld.long 0x00 15. " STS15 ,Input interrupt monitor 15" "No interrupt,Interrupt" bitfld.long 0x00 14. " STS14 ,Input interrupt monitor 14" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " STS13 ,Input interrupt monitor 13" "No interrupt,Interrupt" bitfld.long 0x00 12. " STS12 ,Input interrupt monitor 12" "No interrupt,Interrupt" bitfld.long 0x00 11. " STS11 ,Input interrupt monitor 11" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " STS10 ,Input interrupt monitor 10" "No interrupt,Interrupt" bitfld.long 0x00 9. " STS9 ,Input interrupt monitor 9" "No interrupt,Interrupt" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 8. " STS8 ,Input interrupt monitor 8" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " STS7 ,Input interrupt monitor 7" "No interrupt,Interrupt" bitfld.long 0x00 6. " STS6 ,Input interrupt monitor 6" "No interrupt,Interrupt" bitfld.long 0x00 5. " STS5 ,Input interrupt monitor 5" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " STS4 ,Input interrupt monitor 4" "No interrupt,Interrupt" bitfld.long 0x00 3. " STS3 ,Input interrupt monitor 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STS2 ,Input interrupt monitor 2" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " STS1 ,Input interrupt monitor 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " STS0 ,Input interrupt monitor 0" "No interrupt,Interrupt" endif wgroup.long 0x84++0x3 line.long 0x00 "IRQIN_SET,Input Interrupt Set Register" bitfld.long 0x00 7. " SET7 ,Input interrupt set 7" "No effect,Interrupt" bitfld.long 0x00 6. " SET6 ,Input interrupt set 6" "No effect,Interrupt" bitfld.long 0x00 5. " SET5 ,Input interrupt set 5" "No effect,Interrupt" textline " " bitfld.long 0x00 4. " SET4 ,Input interrupt set 4" "No effect,Interrupt" bitfld.long 0x00 3. " SET3 ,Input interrupt set 3" "No effect,Interrupt" bitfld.long 0x00 2. " SET2 ,Input interrupt set 2" "No effect,Interrupt" textline " " bitfld.long 0x00 1. " SET1 ,Input interrupt set 1" "No effect,Interrupt" bitfld.long 0x00 0. " SET0 ,Input interrupt set 0" "No effect,Interrupt" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x8C++0x3 line.long 0x00 "IRQIN_POL,Input Interrupt Polarity Register" bitfld.long 0x00 16. " POL16 ,Input interrupt polarity 16" "High,Low" bitfld.long 0x00 11. " POL11 ,Input interrupt polarity 11" "High,Low" bitfld.long 0x00 15. " POL15 ,Input interrupt polarity 15" "High,Low" textline " " bitfld.long 0x00 14. " POL14 ,Input interrupt polarity 14" "High,Low" bitfld.long 0x00 13. " POL13 ,Input interrupt polarity 13" "High,Low" bitfld.long 0x00 12. " POL12 ,Input interrupt polarity 12" "High,Low" textline " " bitfld.long 0x00 10. " POL10 ,Input interrupt polarity 10" "High,Low" bitfld.long 0x00 9. " POL9 ,Input interrupt polarity 9" "High,Low" bitfld.long 0x00 8. " POL8 ,Input interrupt polarity 8" "High,Low" textline " " bitfld.long 0x00 7. " POL7 ,Input interrupt polarity 7" "High,Low" bitfld.long 0x00 6. " POL6 ,Input interrupt polarity 6" "High,Low" bitfld.long 0x00 5. " POL5 ,Input interrupt polarity 5" "High,Low" textline " " bitfld.long 0x00 4. " POL4 ,Input interrupt polarity 4" "High,Low" bitfld.long 0x00 3. " POL3 ,Input interrupt polarity 3" "High,Low" bitfld.long 0x00 2. " POL2 ,Input interrupt polarity 2" "High,Low" textline " " bitfld.long 0x00 1. " POL1 ,Input interrupt polarity 1" "High,Low" bitfld.long 0x00 0. " POL0 ,Input interrupt polarity 0" "High,Low" else group.long 0x8C++0x3 line.long 0x00 "IRQIN_POL,Input Interrupt Polarity Register" bitfld.long 0x00 16. " STS16 ,Input interrupt monitor 16" "High,Low" bitfld.long 0x00 11. " STS11 ,Input interrupt monitor 11" "High,Low" bitfld.long 0x00 15. " STS15 ,Input interrupt monitor 15" "High,Low" textline " " bitfld.long 0x00 14. " STS14 ,Input interrupt monitor 14" "High,Low" bitfld.long 0x00 13. " STS13 ,Input interrupt monitor 13" "High,Low" bitfld.long 0x00 12. " STS12 ,Input interrupt monitor 12" "High,Low" textline " " bitfld.long 0x00 10. " STS10 ,Input interrupt monitor 10" "High,Low" bitfld.long 0x00 9. " STS9 ,Input interrupt monitor 9" "High,Low" endif group.long 0x90++0x3 line.long 0x00 "IRQIN_SEL00,Input Interrupt Select Register 00" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0x94++0x3 line.long 0x00 "IRQIN_SEL01,Input Interrupt Select Register 01" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0x98++0x3 line.long 0x00 "IRQIN_SEL02,Input Interrupt Select Register 02" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0x9C++0x3 line.long 0x00 "IRQIN_SEL03,Input Interrupt Select Register 03" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xA0++0x3 line.long 0x00 "IRQIN_SEL04,Input Interrupt Select Register 04" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xA4++0x3 line.long 0x00 "IRQIN_SEL05,Input Interrupt Select Register 05" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xA8++0x3 line.long 0x00 "IRQIN_SEL06,Input Interrupt Select Register 06" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xAC++0x3 line.long 0x00 "IRQIN_SEL07,Input Interrupt Select Register 07" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xB0++0x3 line.long 0x00 "IRQIN_SEL08,Input Interrupt Select Register 08" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xB4++0x3 line.long 0x00 "IRQIN_SEL09,Input Interrupt Select Register 09" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xB8++0x3 line.long 0x00 "IRQIN_SEL10,Input Interrupt Select Register 10" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xBC++0x3 line.long 0x00 "IRQIN_SEL11,Input Interrupt Select Register 11" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xC0++0x3 line.long 0x00 "IRQIN_SEL12,Input Interrupt Select Register 12" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xC4++0x3 line.long 0x00 "IRQIN_SEL13,Input Interrupt Select Register 13" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xC8++0x3 line.long 0x00 "IRQIN_SEL14,Input Interrupt Select Register 14" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xCC++0x3 line.long 0x00 "IRQIN_SEL15,Input Interrupt Select Register 15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0xD0++0x3 line.long 0x00 "IRQIN_SEL16,Input Interrupt Select Register 16" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],SSI0,SSI7,SCU5,SCU6,Audio-DMAC ch0,Audio-DMAC ch1,Audio-DMAC ch2,Audio-DMAC ch3,Audio-DMAC ch4,Audio-DMAC ch5,Input FIFO3 status with masked,Output FIFO3 status with masked,Input FIFO2 status with masked,Output FIFO2 status with masked,Input FIFO1 status with masked,Output FIFO1 status with masked,Input FIFO status with masked,Output FIFO status with masked,?..." else bitfld.long 0x00 0.--4. " SEL ,Input interrupt select" "IRQIN_SET[0],IRQIN_SET[1],IRQIN_SET[2],IRQIN_SET[3],IRQIN_SET[4],IRQIN_SET[5],IRQIN_SET[6],IRQIN_SET[7],?..." endif group.long 0x100++0x3 line.long 0x00 "COM00,Communication Register 00" group.long 0x104++0x3 line.long 0x00 "COM01,Communication Register 01" group.long 0x108++0x3 line.long 0x00 "COM02,Communication Register 02" group.long 0x10C++0x3 line.long 0x00 "COM03,Communication Register 03" group.long 0x110++0x3 line.long 0x00 "COM04,Communication Register 04" group.long 0x114++0x3 line.long 0x00 "COM05,Communication Register 05" group.long 0x118++0x3 line.long 0x00 "COM06,Communication Register 06" group.long 0x11C++0x3 line.long 0x00 "COM07,Communication Register 07" group.long 0x120++0x3 line.long 0x00 "COM08,Communication Register 08" group.long 0x124++0x3 line.long 0x00 "COM09,Communication Register 09" group.long 0x128++0x3 line.long 0x00 "COM0A,Communication Register 0A" group.long 0x12C++0x3 line.long 0x00 "COM0B,Communication Register 0B" group.long 0x130++0x3 line.long 0x00 "COM0C,Communication Register 0C" group.long 0x134++0x3 line.long 0x00 "COM0D,Communication Register 0D" group.long 0x138++0x3 line.long 0x00 "COM0E,Communication Register 0E" group.long 0x13C++0x3 line.long 0x00 "COM0F,Communication Register 0F" group.long 0x140++0x3 line.long 0x00 "COM10,Communication Register 10" group.long 0x144++0x3 line.long 0x00 "COM11,Communication Register 11" group.long 0x148++0x3 line.long 0x00 "COM12,Communication Register 12" group.long 0x14C++0x3 line.long 0x00 "COM13,Communication Register 13" group.long 0x150++0x3 line.long 0x00 "COM14,Communication Register 14" group.long 0x154++0x3 line.long 0x00 "COM15,Communication Register 15" group.long 0x158++0x3 line.long 0x00 "COM16,Communication Register 16" group.long 0x15C++0x3 line.long 0x00 "COM17,Communication Register 17" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x180++0x0B line.long 0x00 "IF_PTRRST,Input FIFO Pointer Reset Register" bitfld.long 0x00 3. " RST3 ,Input FIFO3 pointer reset control" "No reset,Reset" bitfld.long 0x00 2. " RST2 ,Input FIFO2 pointer reset control" "No reset,Reset" bitfld.long 0x00 1. " RST1 ,Input FIFO1 pointer reset control" "No reset,Reset" textline " " bitfld.long 0x00 0. " RST0 ,Input FIFO0 pointer reset control" "No reset,Reset" line.long 0x04 "IF_MSTP,Input FIFO Module Stop Register" bitfld.long 0x04 3. " MSTP3 ,Input FIFO3 clock control" "Supply clock,Stop clock" bitfld.long 0x04 2. " MSTP2 ,Input FIFO2 clock control" "Supply clock,Stop clock" bitfld.long 0x04 1. " MSTP1 ,Input FIFO1 clock control" "Supply clock,Stop clock" textline " " bitfld.long 0x04 0. " MSTP0 ,Input FIFO0 clock control" "Supply clock,Stop clock" line.long 0x08 "IF_EN,Input FIFO Enable Register" bitfld.long 0x08 3. " EN3 ,Input FIFO3 enable control" "Disabled,enabled" bitfld.long 0x08 2. " EN2 ,Input FIFO2 enable control" "Disabled,enabled" bitfld.long 0x08 1. " EN1 ,Input FIFO1 enable control" "Disabled,enabled" textline " " bitfld.long 0x08 0. " EN0 ,Input FIFO0 enable control" "Disabled,enabled" rgroup.long 0x18C++0x03 line.long 0x00 "IF_INT_STS,Input FIFO Interrupt Status Register" bitfld.long 0x00 7. " FULL3 ,Input FIFO3 interrupt monitor regarding full stock size" "Not full,Full" bitfld.long 0x00 6. " OVER3 ,Input FIFO3 interrupt monitor regarding threshold size" "Not over,Over" bitfld.long 0x00 5. " FULL2 ,Input FIFO2 interrupt monitor regarding full stock size" "Not full,Full" textline " " bitfld.long 0x00 4. " OVER2 ,Input FIFO2 interrupt monitor regarding threshold size" "Not over,Over" bitfld.long 0x00 3. " OVER1 ,Input FIFO1 interrupt monitor regarding threshold size" "Not over,Over" bitfld.long 0x00 2. " OVER1 ,Input FIFO1 interrupt monitor regarding threshold size" "Not over,Over" textline " " bitfld.long 0x00 1. " FULL0 ,Input FIFO0 interrupt monitor regarding full stock size" "Not full,Full" bitfld.long 0x00 0. " OVER0 ,Input FIFO0 interrupt monitor regarding threshold size" "Not over,Over" wgroup.long 0x190++0x03 line.long 0x00 "IF_INT_CLR,Input FIFO Interrupt Clear Register" bitfld.long 0x00 7. " FULL3 ,Input FIFO3 interrupt clear regarding full stock size" "No effect,Clear" bitfld.long 0x00 6. " OVER3 ,Input FIFO3 interrupt clear regarding threshold size" "No effect,Clear" bitfld.long 0x00 5. " FULL2 ,Input FIFO2 interrupt clear regarding full stock size" "No effect,Clear" textline " " bitfld.long 0x00 4. " OVER2 ,Input FIFO2 interrupt clear regarding threshold size" "No effect,Clear" bitfld.long 0x00 3. " OVER1 ,Input FIFO1 interrupt clear regarding threshold size" "No effect,Clear" bitfld.long 0x00 2. " OVER1 ,Input FIFO1 interrupt clear regarding threshold size" "No effect,Clear" textline " " bitfld.long 0x00 1. " FULL0 ,Input FIFO0 interrupt clear regarding full stock size" "No effect,Clear" bitfld.long 0x00 0. " OVER0 ,Input FIFO0 interrupt clear regarding threshold size" "No effect,Clear" group.long 0x194++0x03 line.long 0x00 "IF_INT_MSK,Input FIFO Interrupt Mask Register" bitfld.long 0x00 7. " FULL3 ,Input FIFO3 interrupt mask regarding full stock size" "Not masked,Masked" bitfld.long 0x00 6. " OVER3 ,Input FIFO3 interrupt mask regarding threshold size" "Not masked,Masked" bitfld.long 0x00 5. " FULL2 ,Input FIFO2 interrupt mask regarding full stock size" "Not masked,Masked" textline " " bitfld.long 0x00 4. " OVER2 ,Input FIFO2 interrupt mask regarding threshold size" "Not masked,Masked" bitfld.long 0x00 3. " OVER1 ,Input FIFO1 interrupt mask regarding threshold size" "Not masked,Masked" bitfld.long 0x00 2. " OVER1 ,Input FIFO1 interrupt mask regarding threshold size" "Not masked,Masked" textline " " bitfld.long 0x00 1. " FULL0 ,Input FIFO0 interrupt mask regarding full stock size" "Not masked,Masked" bitfld.long 0x00 0. " OVER0 ,Input FIFO0 interrupt mask regarding threshold size" "Not masked,Masked" group.long 0x1A0++0x1F line.long 0x00 "IF0_CH,Input FIFO0 Channel Register" bitfld.long 0x00 0.--3. " CH ,Input FIFO0 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x04 "IF0_INT_TH,Input FIFO0 Interrupt Threshold Register" hexmask.long.word 0x04 0.--12. 1. " TH ,Threshold stock size control of input FIFO0 interrupt" line.long 0x08 "IF1_CH,Input FIFO1 Channel Register" bitfld.long 0x08 0.--3. " CH ,Input FIFO1 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x0C "IF1_INT_TH,Input FIFO1 Interrupt Threshold Register" hexmask.long.word 0x0C 0.--12. 1. " TH ,Threshold stock size control of input FIFO1 interrupt" line.long 0x10 "IF2_CH,Input FIFO2 Channel Register" bitfld.long 0x10 0.--3. " CH ,Input FIFO2 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x14 "IF2_INT_TH,Input FIFO2 Interrupt Threshold Register" hexmask.long.word 0x14 0.--12. 1. " TH ,Threshold stock size control of input FIFO2 interrupt" line.long 0x18 "IF3_CH,Input FIFO3 Channel Register" bitfld.long 0x18 0.--3. " CH ,Input FIFO3 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x1C "IF3_INT_TH,Input FIFO3 Interrupt Threshold Register" hexmask.long.word 0x1C 0.--12. 1. " TH ,Threshold stock size control of input FIFO3 interrupt" rgroup.long 0x8088++0x0F line.long 0x00 "IF0_SZ,Input FIFO0 Stock Size Register" hexmask.long.word 0x00 0.--12. 1. " SZ ,Input FIFO0 stock size monitor" line.long 0x04 "IF1_SZ,Input FIFO1 Stock Size Register" hexmask.long.word 0x04 0.--12. 1. " SZ ,Input FIFO1 stock size monitor" line.long 0x08 "IF2_SZ,Input FIFO2 Stock Size Register" hexmask.long.word 0x08 0.--12. 1. " SZ ,Input FIFO2 stock size monitor" line.long 0x0C "IF3_SZ,Input FIFO3 Stock Size Register" hexmask.long.word 0x0C 0.--12. 1. " SZ ,Input FIFO3 stock size monitor" group.long 0x1C0++0x0B line.long 0x00 "OF_PTRRST,Output FIFO Pointer Reset Register" bitfld.long 0x00 3. " RST3 ,Output FIFO3 pointer reset control" "No reset,Reset" bitfld.long 0x00 2. " RST2 ,Output FIFO2 pointer reset control" "No reset,Reset" bitfld.long 0x00 1. " RST1 ,Output FIFO1 pointer reset control" "No reset,Reset" textline " " bitfld.long 0x00 0. " RST0 ,Output FIFO0 pointer reset control" "No reset,Reset" line.long 0x04 "OF_MSTP,Output FIFO Module Stop Register" bitfld.long 0x04 3. " MSTP3 ,Output FIFO3 clock control" "Supply clock,Stop clock" bitfld.long 0x04 2. " MSTP2 ,Output FIFO2 clock control" "Supply clock,Stop clock" bitfld.long 0x04 1. " MSTP1 ,Output FIFO1 clock control" "Supply clock,Stop clock" textline " " bitfld.long 0x04 0. " MSTP0 ,Output FIFO0 clock control" "Supply clock,Stop clock" line.long 0x08 "OF_EN,Output FIFO Enable Register" bitfld.long 0x08 3. " EN3 ,Output FIFO3 enable control" "Disabled,enabled" bitfld.long 0x08 2. " EN2 ,Output FIFO2 enable control" "Disabled,enabled" bitfld.long 0x08 1. " EN1 ,Output FIFO1 enable control" "Disabled,enabled" textline " " bitfld.long 0x08 0. " EN0 ,Output FIFO0 enable control" "Disabled,enabled" textline "" rgroup.long 0x1CC++0x03 line.long 0x00 "OF_INT_STS,Output FIFO Interrupt Status Register" bitfld.long 0x00 7. " EMPTY3 ,Output FIFO3 interrupt monitor regarding full stock size" "Not empty,Empty" bitfld.long 0x00 6. " UNDER3 ,Output FIFO3 interrupt monitor regarding threshold size" "Not under,Under" bitfld.long 0x00 5. " EMPTY2 ,Output FIFO2 interrupt monitor regarding full stock size" "Not empty,Empty" textline " " bitfld.long 0x00 4. " UNDER2 ,Output FIFO2 interrupt monitor regarding threshold size" "Not under,Under" bitfld.long 0x00 3. " EMPTY1 ,Output FIFO1 interrupt monitor regarding full stock size" "Not empty,Empty" bitfld.long 0x00 2. " UNDER1 ,Output FIFO1 interrupt monitor regarding threshold size" "Not under,Under" textline " " bitfld.long 0x00 1. " EMPTY0 ,Output FIFO0 interrupt monitor regarding full stock size" "Not empty,Empty" bitfld.long 0x00 0. " UNDER0 ,Output FIFO0 interrupt monitor regarding threshold size" "Not under,Under" wgroup.long 0x1D0++0x03 line.long 0x00 "OF_INT_CLR,Output FIFO Interrupt Clear Register" bitfld.long 0x00 7. " EMPTY3 ,Output FIFO3 interrupt clear regarding full stock size" "No effect,Clear" bitfld.long 0x00 6. " UNDER3 ,Output FIFO3 interrupt clear regarding threshold size" "No effect,Clear" bitfld.long 0x00 5. " EMPTY2 ,Output FIFO2 interrupt clear regarding full stock size" "No effect,Clear" textline " " bitfld.long 0x00 4. " UNDER2 ,Output FIFO2 interrupt clear regarding threshold size" "No effect,Clear" bitfld.long 0x00 3. " EMPTY1 ,Output FIFO1 interrupt clear regarding full stock size" "No effect,Clear" bitfld.long 0x00 2. " UNDER1 ,Output FIFO1 interrupt clear regarding threshold size" "No effect,Clear" textline " " bitfld.long 0x00 1. " EMPTY0 ,Output FIFO0 interrupt clear regarding full stock size" "No effect,Clear" bitfld.long 0x00 0. " UNDER0 ,Output FIFO0 interrupt clear regarding threshold size" "No effect,Clear" group.long 0x1D4++0x03 line.long 0x00 "OF_INT_MSK,Output FIFO Interrupt Mask Register" bitfld.long 0x00 7. " EMPTY3 ,Output FIFO3 interrupt mask regarding full stock size" "Not masked,Masked" bitfld.long 0x00 6. " UNDER3 ,Output FIFO3 interrupt mask regarding threshold size" "Not masked,Masked" bitfld.long 0x00 5. " EMPTY2 ,Output FIFO2 interrupt mask regarding full stock size" "Not masked,Masked" textline " " bitfld.long 0x00 4. " UNDER2 ,Output FIFO2 interrupt mask regarding threshold size" "Not masked,Masked" bitfld.long 0x00 3. " EMPTY1 ,Output FIFO1 interrupt mask regarding full stock size" "Not masked,Masked" bitfld.long 0x00 2. " UNDER1 ,Output FIFO1 interrupt mask regarding threshold size" "Not masked,Masked" textline " " bitfld.long 0x00 1. " EMPTY0 ,Output FIFO0 interrupt mask regarding full stock size" "Not masked,Masked" bitfld.long 0x00 0. " UNDER0 ,Output FIFO0 interrupt mask regarding threshold size" "Not masked,Masked" textline "" group.long 0x1E0++0x1F line.long 0x00 "OF0_CH,Output FIFO0 Channel Register" bitfld.long 0x00 0.--3. " CH ,Output FIFO0 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x04 "OF0_INT_TH,Output FIFO0 Interrupt Threshold Register" hexmask.long.word 0x04 0.--11. 1. " TH ,Threshold stock size control of output FIFO0 interrupt" line.long 0x08 "OF1_CH,Output FIFO1 Channel Register" bitfld.long 0x08 0.--3. " CH ,Output FIFO1 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x0C "OF1_INT_TH,Output FIFO1 Interrupt Threshold Register" hexmask.long.word 0x0C 0.--11. 1. " TH ,Threshold stock size control of output FIFO1 interrupt" line.long 0x10 "OF2_CH,Output FIFO2 Channel Register" bitfld.long 0x10 0.--3. " CH ,Output FIFO2 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x14 "OF2_INT_TH,Output FIFO2 Interrupt Threshold Register" hexmask.long.word 0x14 0.--11. 1. " TH ,Threshold stock size control of output FIFO2 interrupt" line.long 0x18 "OF3_CH,Output FIFO3 Channel Register" bitfld.long 0x18 0.--3. " CH ,Output FIFO3 channel control" "No effect,1,2,3,4,5,6,7,8,?..." line.long 0x1C "OF3_INT_TH,Output FIFO3 Interrupt Threshold Register" hexmask.long.word 0x1C 0.--11. 1. " TH ,Threshold stock size control of output FIFO3 interrupt" group.long 0x1000++0x07 line.long 0x00 "IF_MODE,Input FIFO Mode Register" bitfld.long 0x00 0. " DMA ,Input FIFO Mode" ",DMA" line.long 0x04 "IF_ADINR,Input FIFO Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of input Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1100++0x07 line.long 0x00 "OF_MODE,Output FIFO Mode Register" bitfld.long 0x00 0. " DMA ,Output FIFO Mode" ",DMA" line.long 0x04 "OF_ADINR,Output FIFO Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of output Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1110++0x03 line.long 0x00 "OF_SR,Output FIFO Interrupt Status Register" bitfld.long 0x00 0. " OF ,Output FIFO Status" "No overflow,Overflow" group.long 0x1200++0x07 line.long 0x00 "IF1_MODE,Input FIFO1 Mode Register" bitfld.long 0x00 0. " DMA ,Input FIFO1 Mode" ",DMA" line.long 0x04 "IF1_ADINR,Input FIFO1 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of output Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1300++0x07 line.long 0x00 "OF1_MODE,Output FIFO1 Mode Register" bitfld.long 0x00 0. " DMA ,Output FIFO1 Mode" ",DMA" line.long 0x04 "OF1_ADINR,Output FIFO1 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of output Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1310++0x03 line.long 0x00 "OF1_SR,Output FIFO1 Interrupt Status Register" bitfld.long 0x00 0. " OF ,Output FIFO1 Status" "No overflow,Overflow" group.long 0x1400++0x07 line.long 0x00 "IF2_MODE,Input FIFO2 Mode Register" bitfld.long 0x00 0. " DMA ,Input FIFO2 Mode" ",DMA" line.long 0x04 "IF2_ADINR,Input FIFO2 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of output Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1500++0x07 line.long 0x00 "OF2_MODE,Output FIFO2 Mode Register" bitfld.long 0x00 0. " DMA ,Output FIFO2 Mode" ",DMA" line.long 0x04 "OF2_ADINR,Output FIFO2 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of output Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1510++0x03 line.long 0x00 "OF2_SR,Output FIFO2 Interrupt Status Register" bitfld.long 0x00 0. " OF ,Output FIFO2 Status" "No overflow,Overflow" group.long 0x1600++0x07 line.long 0x00 "IF3_MODE,Input FIFO3 Mode Register" bitfld.long 0x00 0. " DMA ,Input FIFO3 Mode" ",DMA" line.long 0x04 "IF3_ADINR,Input FIFO3 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of output Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1700++0x07 line.long 0x00 "OF3_MODE,Output FIFO3 Mode Register" bitfld.long 0x00 0. " DMA ,Output FIFO3 Mode" ",DMA" line.long 0x04 "OF3_ADINR,Output FIFO3 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit Length of output Audio Data" "24,,,,,,,,16,,,,,,,,8,?..." group.long 0x1710++0x03 line.long 0x00 "OF3_SR,Output FIFO3 Interrupt Status Register" bitfld.long 0x00 0. " OF ,Output FIFO3 Status" "No overflow,Overflow" rgroup.long 0x80C8++0x03 line.long 0x00 "OF0_SZ,Output FIFO0 Stock Size Register" hexmask.long.word 0x00 0.--11. 1. " SZ ,Output FIFO0 stock size monitor" rgroup.long 0x80D8++0x03 line.long 0x00 "OF1_SZ,Output FIFO1 Stock Size Register" hexmask.long.word 0x00 0.--11. 1. " SZ ,Output FIFO1 stock size monitor" rgroup.long 0x80E8++0x03 line.long 0x00 "OF2_SZ,Output FIFO2 Stock Size Register" hexmask.long.word 0x00 0.--11. 1. " SZ ,Output FIFO2 stock size monitor" rgroup.long 0x80F8++0x03 line.long 0x00 "OF3_SZ,Output FIFO3 Stock Size Register" hexmask.long.word 0x00 0.--11. 1. " SZ ,Output FIFO3 stock size monitor" base 0 rgroup.long 0x00++0x03 line.long 0x00 "OF_DATA,Output FIFO Data Storing Register" wgroup.long 0x400++0x03 line.long 0x00 "IF_DATA,Input FIFO Data Storing Register" rgroup.long 0x800++0x03 line.long 0x00 "OF1_DATA,Output FIFO1 Data Storing Register" wgroup.long 0xC00++0x03 line.long 0x00 "IF1_DATA,Input FIFO1 Data Storing Register" rgroup.long 0x1000++0x03 line.long 0x00 "OF2_DATA,Output FIFO2 Data Storing Register" wgroup.long 0x1400++0x03 line.long 0x00 "IF2_DATA,Input FIFO2 Data Storing Register" rgroup.long 0x1800++0x03 line.long 0x00 "OF3_DATA,Output FIFO3 Data Storing Register" wgroup.long 0x1C00++0x03 line.long 0x00 "IF3_DATA,Input FIFO3 Data Storing Register" endif width 0xB tree.end tree "SCU (Sampling Rate Converter Unit)" base ad:0xEC500000 width 24. group.long 0x0++0x7 line.long 0x00 "SRC0IN_BUSIF_MODE,SRC0IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC0OUT_BUSIF_MODE,SRC0IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0x0+0x08)++0x3 line.long 0x00 "SRC0_BUSIF_DALIGN,SRC0_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0x0+0x0C)++0x7 line.long 0x00 "SRC0_MODE,SRC0_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC0 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC0 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC0 use status" "Not used,Used" line.long 0x04 "SRC0_CONTROL,SRC0 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC0 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC0 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0x0+0x14)++0x3 line.long 0x00 "SRC0_STATUS,SRC 0 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x0+0x18)++0x3 line.long 0x00 "SRC0_INT_ENABLE0,SRC 0 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x3 line.long 0x00 "SRC0_STATUS,SRC 0 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x0+0x18)++0x3 line.long 0x00 "SRC0_INT_ENABLE0,SRC 0 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0x20++0x7 line.long 0x00 "SRC1IN_BUSIF_MODE,SRC1IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC1OUT_BUSIF_MODE,SRC1IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0x20+0x08)++0x3 line.long 0x00 "SRC1_BUSIF_DALIGN,SRC1_BUSIF_DALIGN Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" group.long (0x20+0x0C)++0x7 line.long 0x00 "SRC1_MODE,SRC1_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC1 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC1 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC1 use status" "Not used,Used" line.long 0x04 "SRC1_CONTROL,SRC1 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC1 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC1 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0x20+0x14)++0x3 line.long 0x00 "SRC1_STATUS,SRC 1 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x20+0x18)++0x3 line.long 0x00 "SRC1_INT_ENABLE0,SRC 1 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x20+0x14)++0x3 line.long 0x00 "SRC1_STATUS,SRC 1 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x20+0x18)++0x3 line.long 0x00 "SRC1_INT_ENABLE0,SRC 1 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0x40++0x7 line.long 0x00 "SRC2IN_BUSIF_MODE,SRC2IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC2OUT_BUSIF_MODE,SRC2IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0x40+0x08)++0x3 line.long 0x00 "SRC2_BUSIF_DALIGN,SRC2_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0x40+0x0C)++0x7 line.long 0x00 "SRC2_MODE,SRC2_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC2 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC2 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC2 use status" "Not used,Used" line.long 0x04 "SRC2_CONTROL,SRC2 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC2 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC2 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0x40+0x14)++0x3 line.long 0x00 "SRC2_STATUS,SRC 2 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x40+0x18)++0x3 line.long 0x00 "SRC2_INT_ENABLE0,SRC 2 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x40+0x14)++0x3 line.long 0x00 "SRC2_STATUS,SRC 2 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x40+0x18)++0x3 line.long 0x00 "SRC2_INT_ENABLE0,SRC 2 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0x60++0x7 line.long 0x00 "SRC3IN_BUSIF_MODE,SRC3IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC3OUT_BUSIF_MODE,SRC3IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0x60+0x08)++0x3 line.long 0x00 "SRC3_BUSIF_DALIGN,SRC3_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0x60+0x0C)++0x7 line.long 0x00 "SRC3_MODE,SRC3_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC3 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC3 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC3 use status" "Not used,Used" line.long 0x04 "SRC3_CONTROL,SRC3 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC3 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC3 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0x60+0x14)++0x3 line.long 0x00 "SRC3_STATUS,SRC 3 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x60+0x18)++0x3 line.long 0x00 "SRC3_INT_ENABLE0,SRC 3 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x60+0x14)++0x3 line.long 0x00 "SRC3_STATUS,SRC 3 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x60+0x18)++0x3 line.long 0x00 "SRC3_INT_ENABLE0,SRC 3 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0x80++0x7 line.long 0x00 "SRC4IN_BUSIF_MODE,SRC4IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC4OUT_BUSIF_MODE,SRC4IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0x80+0x08)++0x3 line.long 0x00 "SRC4_BUSIF_DALIGN,SRC4_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0x80+0x0C)++0x7 line.long 0x00 "SRC4_MODE,SRC4_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC4 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC4 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC4 use status" "Not used,Used" line.long 0x04 "SRC4_CONTROL,SRC4 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC4 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC4 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0x80+0x14)++0x3 line.long 0x00 "SRC4_STATUS,SRC 4 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x80+0x18)++0x3 line.long 0x00 "SRC4_INT_ENABLE0,SRC 4 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x80+0x14)++0x3 line.long 0x00 "SRC4_STATUS,SRC 4 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x80+0x18)++0x3 line.long 0x00 "SRC4_INT_ENABLE0,SRC 4 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0xA0++0x7 line.long 0x00 "SRC5IN_BUSIF_MODE,SRC5IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC5OUT_BUSIF_MODE,SRC5IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0xA0+0x08)++0x3 line.long 0x00 "SRC5_BUSIF_DALIGN,SRC5_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0xA0+0x0C)++0x7 line.long 0x00 "SRC5_MODE,SRC5_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC5 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC5 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC5 use status" "Not used,Used" line.long 0x04 "SRC5_CONTROL,SRC5 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC5 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC5 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0xA0+0x14)++0x3 line.long 0x00 "SRC5_STATUS,SRC 5 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xA0+0x18)++0x3 line.long 0x00 "SRC5_INT_ENABLE0,SRC 5 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0xA0+0x14)++0x3 line.long 0x00 "SRC5_STATUS,SRC 5 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xA0+0x18)++0x3 line.long 0x00 "SRC5_INT_ENABLE0,SRC 5 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0xC0++0x7 line.long 0x00 "SRC6IN_BUSIF_MODE,SRC6IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC6OUT_BUSIF_MODE,SRC6IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0xC0+0x08)++0x3 line.long 0x00 "SRC6_BUSIF_DALIGN,SRC6_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0xC0+0x0C)++0x7 line.long 0x00 "SRC6_MODE,SRC6_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC6 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC6 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC6 use status" "Not used,Used" line.long 0x04 "SRC6_CONTROL,SRC6 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC6 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC6 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0xC0+0x14)++0x3 line.long 0x00 "SRC6_STATUS,SRC 6 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xC0+0x18)++0x3 line.long 0x00 "SRC6_INT_ENABLE0,SRC 6 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0xC0+0x14)++0x3 line.long 0x00 "SRC6_STATUS,SRC 6 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xC0+0x18)++0x3 line.long 0x00 "SRC6_INT_ENABLE0,SRC 6 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0xE0++0x7 line.long 0x00 "SRC7IN_BUSIF_MODE,SRC7IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC7OUT_BUSIF_MODE,SRC7IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0xE0+0x08)++0x3 line.long 0x00 "SRC7_BUSIF_DALIGN,SRC7_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0xE0+0x0C)++0x7 line.long 0x00 "SRC7_MODE,SRC7_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC7 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC7 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC7 use status" "Not used,Used" line.long 0x04 "SRC7_CONTROL,SRC7 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC7 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC7 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0xE0+0x14)++0x3 line.long 0x00 "SRC7_STATUS,SRC 7 Status Register" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xE0+0x18)++0x3 line.long 0x00 "SRC7_INT_ENABLE0,SRC 7 Interrupt Enable Register 0" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0xE0+0x14)++0x3 line.long 0x00 "SRC7_STATUS,SRC 7 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xE0+0x18)++0x3 line.long 0x00 "SRC7_INT_ENABLE0,SRC 7 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0x100++0x7 line.long 0x00 "SRC8IN_BUSIF_MODE,SRC8IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC8OUT_BUSIF_MODE,SRC8IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0x100+0x08)++0x3 line.long 0x00 "SRC8_BUSIF_DALIGN,SRC8_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0x100+0x0C)++0x7 line.long 0x00 "SRC8_MODE,SRC8_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC8 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC8 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC8 use status" "Not used,Used" line.long 0x04 "SRC8_CONTROL,SRC8 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC8 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC8 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0x100+0x14)++0x3 line.long 0x00 "SRC8_STATUS,SRC 8 Status Register" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x100+0x18)++0x3 line.long 0x00 "SRC8_INT_ENABLE0,SRC 8 Interrupt Enable Register 0" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x100+0x14)++0x3 line.long 0x00 "SRC8_STATUS,SRC 8 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x100+0x18)++0x3 line.long 0x00 "SRC8_INT_ENABLE0,SRC 8 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0x120++0x7 line.long 0x00 "SRC9IN_BUSIF_MODE,SRC9IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "SRC9OUT_BUSIF_MODE,SRC9IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " DMA ,DMA" ",DMA" else bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" endif group.long (0x120+0x08)++0x3 line.long 0x00 "SRC9_BUSIF_DALIGN,SRC9_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange Stream Data 0" "0,1" group.long (0x120+0x0C)++0x7 line.long 0x00 "SRC9_MODE,SRC9_MODE Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 25. " SYNC_OUT ,SRC9 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC9 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC9 use status" "Not used,Used" line.long 0x04 "SRC9_CONTROL,SRC9 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC9 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC9 in start flag" "Stopped,Started" sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long (0x120+0x14)++0x3 line.long 0x00 "SRC9_STATUS,SRC 9 Status Register" bitfld.long 0x00 28. " DVC1 ,dvc1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC0 ,dvc0" "No interrupt,Interrupt" bitfld.long 0x00 13. " UF_SRCO ,Underflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 9. " OF_SRCI ,Overflow SRC in" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x120+0x18)++0x3 line.long 0x00 "SRC9_INT_ENABLE0,SRC 9 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC1_IE ,DVC1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC0_IE ,DVC0 enable" "Disabled,Enabled" bitfld.long 0x00 13. " UF_SRCO_IE ,Underflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_SRCI_IE ,Overflow SRC in enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x120+0x14)++0x3 line.long 0x00 "SRC9_STATUS,SRC 9 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x120+0x18)++0x3 line.long 0x00 "SRC9_INT_ENABLE0,SRC 9 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif group.long 0x184++0xB line.long 0x00 "CMD0OUT_BUSIF_MODE,CMD0OUT_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "CMD0_BUSIF_DALIGN,CMD0_BUSIF_DALIGN Register" bitfld.long 0x04 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" line.long 0x08 "CMD0_ROUTE_SELECT,CMD0_ROUTE_SELECT Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x08 27. " SYNCO_CMD3 ,CMD output data timing (bit 3)" "CMD,Synchronous SRC" bitfld.long 0x08 24.--26. " SYNCO_CMD ,SRC for CMD output data timing (bits 2:0)" "SRC0,SRC1,SRC2,SRC3,SRC4,SRC5,SRC6,SRC9" bitfld.long 0x08 16.--18. " CMD_CASE ,Route select" "data0-3->CTU->MIX->DVC,SRC3/6->DVC,SRC4/9->DVC,SRC0/1->DVC,SRC2/5->DVC,,," textline " " bitfld.long 0x08 15. " CMDIN_CTU1 ,SRC input to CTU1 Select" "SRC4,SRC9" bitfld.long 0x08 12. " CMDIN_CTU0 ,SRC input to CTU0 Select" "SRC3,SRC6" bitfld.long 0x08 8. " CMDIN_CTU3 ,SRC input to CTU3 Select" "SRC2,SRC5" textline " " bitfld.long 0x08 0. " CMDIN_CTU2 ,SRC input to CTU2 Select" "SRC0,SRC1" else bitfld.long 0x08 16.--18. " CMD_CASE ,Route select" "SRC->CTU->MIX->DVC,SRC3->DVC,SRC4->DVC,SRC0/1->DVC,SRC2/5->DVC,,," bitfld.long 0x08 8. " CMDIN_CTU3 ,SRC input to CTU3 Select" "SRC2,SRC5" bitfld.long 0x08 0. " CMDIN_CTU2 ,SRC input to CTU2 Select" "SRC0,SRC1" endif group.long (0x184+0x0C)++0x3 line.long 0x00 "CMD0_CONTROL,CMD 0 Control Register" bitfld.long 0x00 4. " START_OUT ,SRC0 out start flag" "Stopped,Started" group.long 0x1A4++0xB line.long 0x00 "CMD1OUT_BUSIF_MODE,CMD1OUT_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif line.long 0x04 "CMD1_BUSIF_DALIGN,CMD1_BUSIF_DALIGN Register" bitfld.long 0x04 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" line.long 0x08 "CMD1_ROUTE_SELECT,CMD1_ROUTE_SELECT Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x08 27. " SYNCO_CMD3 ,CMD output data timing (bit 3)" "CMD,Synchronous SRC" bitfld.long 0x08 24.--26. " SYNCO_CMD ,SRC for CMD output data timing (bits 2:0)" "SRC0,SRC1,SRC2,SRC3,SRC4,SRC5,SRC6,SRC9" bitfld.long 0x08 16.--18. " CMD_CASE ,Route select" "data0-3->CTU->MIX->DVC,SRC3/6->DVC,SRC4/9->DVC,SRC0/1->DVC,SRC2/5->DVC,,," textline " " bitfld.long 0x08 15. " CMDIN_CTU1 ,SRC input to CTU1 Select" "SRC4,SRC9" bitfld.long 0x08 12. " CMDIN_CTU0 ,SRC input to CTU0 Select" "SRC3,SRC6" bitfld.long 0x08 8. " CMDIN_CTU3 ,SRC input to CTU3 Select" "SRC2,SRC5" textline " " bitfld.long 0x08 0. " CMDIN_CTU2 ,SRC input to CTU2 Select" "SRC0,SRC1" else bitfld.long 0x08 16.--18. " CMD_CASE ,Route select" "SRC->CTU->MIX->DVC,SRC3->DVC,SRC4->DVC,SRC0/1->DVC,SRC2/5->DVC,,," bitfld.long 0x08 8. " CMDIN_CTU3 ,SRC input to CTU3 Select" "SRC2,SRC5" bitfld.long 0x08 0. " CMDIN_CTU2 ,SRC input to CTU2 Select" "SRC0,SRC1" endif group.long (0x1A4+0x0C)++0x3 line.long 0x00 "CMD1_CONTROL,CMD 1 Control Register" bitfld.long 0x00 4. " START_OUT ,SRC1 out start flag" "Stopped,Started" group.long 0x1C8++0x7 line.long 0x00 "SCU_SYSTEM_STATUS0,SCU_SYSTEM Status Register 0" eventfld.long 0x00 29. " OF_CMD1O ,Overflow CMD 1 out" "No effect,Occurred" eventfld.long 0x00 28. " OF_CMD0O ,Overflow CMD 0 out" "No effect,Occurred" eventfld.long 0x00 25. " OF_SRC9O ,Overflow SRC 9 out" "No effect,Occurred" textline " " eventfld.long 0x00 24. " OF_SRC8O ,Overflow SRC 8 out" "No effect,Occurred" eventfld.long 0x00 23. " OF_SRC7O ,Overflow SRC 7 out" "No effect,Occurred" eventfld.long 0x00 22. " OF_SRC6O ,Overflow SRC 6 out" "No effect,Occurred" textline " " eventfld.long 0x00 21. " OF_SRC5O ,Overflow SRC 5 out" "No effect,Occurred" eventfld.long 0x00 20. " OF_SRC4O ,Overflow SRC 4 out" "No effect,Occurred" eventfld.long 0x00 19. " OF_SRC3O ,Overflow SRC 3 out" "No effect,Occurred" textline " " eventfld.long 0x00 18. " OF_SRC2O ,Overflow SRC 2 out" "No effect,Occurred" eventfld.long 0x00 17. " OF_SRC1O ,Overflow SRC 1 out" "No effect,Occurred" eventfld.long 0x00 16. " OF_SRC0O ,Overflow SRC 0 out" "No effect,Occurred" textline " " eventfld.long 0x00 9. " UF_SRC9I ,Underflow SRC 9 in" "No effect,Occurred" eventfld.long 0x00 8. " UF_SRC8I ,Underflow SRC 8 in" "No effect,Occurred" eventfld.long 0x00 7. " UF_SRC7I ,Underflow SRC 7 in" "No effect,Occurred" textline " " eventfld.long 0x00 6. " UF_SRC6I ,Underflow SRC 6 in" "No effect,Occurred" eventfld.long 0x00 5. " UF_SRC5I ,Underflow SRC 5 in" "No effect,Occurred" eventfld.long 0x00 4. " UF_SRC4I ,Underflow SRC 4 in" "No effect,Occurred" textline " " eventfld.long 0x00 3. " UF_SRC3I ,Underflow SRC 3 in" "No effect,Occurred" eventfld.long 0x00 2. " UF_SRC2I ,Underflow SRC 2 in" "No effect,Occurred" eventfld.long 0x00 1. " UF_SRC1I ,Underflow SRC 1 in" "No effect,Occurred" textline " " eventfld.long 0x00 0. " UF_SRC0I ,Underflow SRC 0 in" "No effect,Occurred" line.long 0x04 "SCU_SYSTEM_INT_ENABLE0,SCU_SYSTEM Interrupt Enable Register 0" bitfld.long 0x04 29. " OF_CMD1O_IE ,Overflow CMD 1 out enable" "Disabled,Enabled" bitfld.long 0x04 28. " OF_CMD0O_IE ,Overflow CMD 0 out enable" "Disabled,Enabled" bitfld.long 0x04 25. " OF_SRC9O_IE ,Overflow SRC 9 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " OF_SRC8O_IE ,Overflow SRC 8 out enable" "Disabled,Enabled" bitfld.long 0x04 23. " OF_SRC7O_IE ,Overflow SRC 7 out enable" "Disabled,Enabled" bitfld.long 0x04 22. " OF_SRC6O_IE ,Overflow SRC 6 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " OF_SRC5O_IE ,Overflow SRC 5 out enable" "Disabled,Enabled" bitfld.long 0x04 20. " OF_SRC4O_IE ,Overflow SRC 4 out enable" "Disabled,Enabled" bitfld.long 0x04 19. " OF_SRC3O_IE ,Overflow SRC 3 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " OF_SRC2O_IE ,Overflow SRC 2 out enable" "Disabled,Enabled" bitfld.long 0x04 17. " OF_SRC1O_IE ,Overflow SRC 1 out enable" "Disabled,Enabled" bitfld.long 0x04 16. " OF_SRC0O_IE ,Overflow SRC 0 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " UF_SRC9I_IE ,Underflow SRC 9 in enable" "Disabled,Enabled" bitfld.long 0x04 8. " UF_SRC8I_IE ,Underflow SRC 8 in enable" "Disabled,Enabled" bitfld.long 0x04 7. " UF_SRC7I_IE ,Underflow SRC 7 in enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " UF_SRC6I_IE ,Underflow SRC 6 in enable" "Disabled,Enabled" bitfld.long 0x04 5. " UF_SRC5I_IE ,Underflow SRC 5 in enable" "Disabled,Enabled" bitfld.long 0x04 4. " UF_SRC4I_IE ,Underflow SRC 4 in enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UF_SRC3I_IE ,Underflow SRC 3 in enable" "Disabled,Enabled" bitfld.long 0x04 2. " UF_SRC2I_IE ,Underflow SRC 2 in enable" "Disabled,Enabled" bitfld.long 0x04 1. " UF_SRC1I_IE ,Underflow SRC 1 in enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " UF_SRC0I_IE ,Underflow SRC 0 in enable" "Disabled,Enabled" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1D0++0x07 line.long 0x00 "SCU_SYSTEM_STATUS1,SCU_SYSTEM Status Register 1" eventfld.long 0x00 25. " UF_SRC9O ,Underflow SRC 9 out" "No effect,Occurred" textline " " eventfld.long 0x00 24. " UF_SRC8O ,Underflow SRC 8 out" "No effect,Occurred" eventfld.long 0x00 23. " UF_SRC7O ,Underflow SRC 7 out" "No effect,Occurred" eventfld.long 0x00 22. " UF_SRC6O ,Underflow SRC 6 out" "No effect,Occurred" textline " " eventfld.long 0x00 21. " UF_SRC5O ,Underflow SRC 5 out" "No effect,Occurred" eventfld.long 0x00 20. " UF_SRC4O ,Underflow SRC 4 out" "No effect,Occurred" eventfld.long 0x00 19. " UF_SRC3O ,Underflow SRC 3 out" "No effect,Occurred" textline " " eventfld.long 0x00 18. " UF_SRC2O ,Underflow SRC 2 out" "No effect,Occurred" eventfld.long 0x00 17. " UF_SRC1O ,Underflow SRC 1 out" "No effect,Occurred" eventfld.long 0x00 16. " UF_SRC0O ,Underflow SRC 0 out" "No effect,Occurred" textline " " eventfld.long 0x00 9. " OF_SRC9I ,Overflow SRC 9 in" "No effect,Occurred" eventfld.long 0x00 8. " OF_SRC8I ,Overflow SRC 8 in" "No effect,Occurred" eventfld.long 0x00 7. " OF_SRC7I ,Overflow SRC 7 in" "No effect,Occurred" textline " " eventfld.long 0x00 6. " OF_SRC6I ,Overflow SRC 6 in" "No effect,Occurred" eventfld.long 0x00 5. " OF_SRC5I ,Overflow SRC 5 in" "No effect,Occurred" eventfld.long 0x00 4. " OF_SRC4I ,Overflow SRC 4 in" "No effect,Occurred" textline " " eventfld.long 0x00 3. " OF_SRC3I ,Overflow SRC 3 in" "No effect,Occurred" eventfld.long 0x00 2. " OF_SRC2I ,Overflow SRC 2 in" "No effect,Occurred" eventfld.long 0x00 1. " OF_SRC1I ,Overflow SRC 1 in" "No effect,Occurred" textline " " eventfld.long 0x00 0. " OF_SRC0I ,Overflow SRC 0 in" "No effect,Occurred" line.long 0x04 "SCU_SYSTEM_INT_ENABLE1,SCU_SYSTEM Interrupt Enable Register 1" bitfld.long 0x04 25. " UF_SRC9O_IE ,Underflow SRC 9 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " UF_SRC8O_IE ,Underflow SRC 8 out enable" "Disabled,Enabled" bitfld.long 0x04 23. " UF_SRC7O_IE ,Underflow SRC 7 out enable" "Disabled,Enabled" bitfld.long 0x04 22. " UF_SRC6O_IE ,Underflow SRC 6 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " UF_SRC5O_IE ,Underflow SRC 5 out enable" "Disabled,Enabled" bitfld.long 0x04 20. " UF_SRC4O_IE ,Underflow SRC 4 out enable" "Disabled,Enabled" bitfld.long 0x04 19. " UF_SRC3O_IE ,Underflow SRC 3 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " UF_SRC2O_IE ,Underflow SRC 2 out enable" "Disabled,Enabled" bitfld.long 0x04 17. " UF_SRC1O_IE ,Underflow SRC 1 out enable" "Disabled,Enabled" bitfld.long 0x04 16. " UF_SRC0O_IE ,Underflow SRC 0 out enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " OF_SRC9I_IE ,Overflow SRC 9 in enable" "Disabled,Enabled" bitfld.long 0x04 8. " OF_SRC8I_IE ,Overflow SRC 8 in enable" "Disabled,Enabled" bitfld.long 0x04 7. " OF_SRC7I_IE ,Overflow SRC 7 in enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " OF_SRC6I_IE ,Overflow SRC 6 in enable" "Disabled,Enabled" bitfld.long 0x04 5. " OF_SRC5I_IE ,Overflow SRC 5 in enable" "Disabled,Enabled" bitfld.long 0x04 4. " OF_SRC4I_IE ,Overflow SRC 4 in enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " OF_SRC3I_IE ,Overflow SRC 3 in enable" "Disabled,Enabled" bitfld.long 0x04 2. " OF_SRC2I_IE ,Overflow SRC 2 in enable" "Disabled,Enabled" bitfld.long 0x04 1. " OF_SRC1I_IE ,Overflow SRC 1 in enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " OF_SRC0I_IE ,Overflow SRC 0 in enable" "Disabled,Enabled" endif width 12. tree "SRC Registers" tree "SRC 0" group.long 0x200++0x7 line.long 0x00 "SRC0_SWRSR,SRC0 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC0_SRCIR,SRC0 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x200+0x14)++0x3 line.long 0x00 "SRC0_ADINR,SRC 0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x200+0x14)++0x3 line.long 0x00 "SRC0_ADINR,SRC 0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x200+0x1C)++0x7 line.long 0x00 "SRC0_IFSCR,SRC 0 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC0_IFSVR,SRC 0 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x200+0x24)++0x3 line.long 0x00 "SRC0_SRCCR,SRC 0 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x200+0x24)++0x3 line.long 0x00 "SRC0_SRCCR,SRC 0 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x200+0x24)++0x3 hide.long 0x00 "SRC0_SRCCR,SRC 0 SRC Control Register" group.long (0x200+0x28)++0x3 line.long 0x00 "SRC0_MNFSR,SRC 0 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x200+0x2C)++0x03 line.long 0x00 "SRC0_BSDSR,SRC 0 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x200+0x38)++0x3 line.long 0x00 "SRC0_BSISR,SRC 0 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 1" group.long 0x240++0x7 line.long 0x00 "SRC1_SWRSR,SRC1 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC1_SRCIR,SRC1 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x240+0x14)++0x3 line.long 0x00 "SRC1_ADINR,SRC 1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." else group.long (0x240+0x14)++0x3 line.long 0x00 "SRC1_ADINR,SRC 1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x240+0x1C)++0x7 line.long 0x00 "SRC1_IFSCR,SRC 1 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC1_IFSVR,SRC 1 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x240+0x24)++0x3 line.long 0x00 "SRC1_SRCCR,SRC 1 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x240+0x24)++0x3 line.long 0x00 "SRC1_SRCCR,SRC 1 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x240+0x24)++0x3 hide.long 0x00 "SRC1_SRCCR,SRC 1 SRC Control Register" group.long (0x240+0x28)++0x3 line.long 0x00 "SRC1_MNFSR,SRC 1 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x240+0x2C)++0x03 line.long 0x00 "SRC1_BSDSR,SRC 1 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x240+0x38)++0x3 line.long 0x00 "SRC1_BSISR,SRC 1 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 2" group.long 0x280++0x7 line.long 0x00 "SRC2_SWRSR,SRC2 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC2_SRCIR,SRC2 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x280+0x14)++0x3 line.long 0x00 "SRC2_ADINR,SRC 2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x280+0x14)++0x3 line.long 0x00 "SRC2_ADINR,SRC 2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x280+0x1C)++0x7 line.long 0x00 "SRC2_IFSCR,SRC 2 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC2_IFSVR,SRC 2 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x280+0x24)++0x3 line.long 0x00 "SRC2_SRCCR,SRC 2 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x280+0x24)++0x3 line.long 0x00 "SRC2_SRCCR,SRC 2 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x280+0x24)++0x3 hide.long 0x00 "SRC2_SRCCR,SRC 2 SRC Control Register" group.long (0x280+0x28)++0x3 line.long 0x00 "SRC2_MNFSR,SRC 2 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x280+0x2C)++0x03 line.long 0x00 "SRC2_BSDSR,SRC 2 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x280+0x38)++0x3 line.long 0x00 "SRC2_BSISR,SRC 2 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 3" group.long 0x2C0++0x7 line.long 0x00 "SRC3_SWRSR,SRC3 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC3_SRCIR,SRC3 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x2C0+0x14)++0x3 line.long 0x00 "SRC3_ADINR,SRC 3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x2C0+0x14)++0x3 line.long 0x00 "SRC3_ADINR,SRC 3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x2C0+0x1C)++0x7 line.long 0x00 "SRC3_IFSCR,SRC 3 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC3_IFSVR,SRC 3 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x2C0+0x24)++0x3 line.long 0x00 "SRC3_SRCCR,SRC 3 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x2C0+0x24)++0x3 line.long 0x00 "SRC3_SRCCR,SRC 3 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x2C0+0x24)++0x3 hide.long 0x00 "SRC3_SRCCR,SRC 3 SRC Control Register" group.long (0x2C0+0x28)++0x3 line.long 0x00 "SRC3_MNFSR,SRC 3 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x2C0+0x2C)++0x03 line.long 0x00 "SRC3_BSDSR,SRC 3 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x2C0+0x38)++0x3 line.long 0x00 "SRC3_BSISR,SRC 3 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 4" group.long 0x300++0x7 line.long 0x00 "SRC4_SWRSR,SRC4 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC4_SRCIR,SRC4 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x300+0x14)++0x3 line.long 0x00 "SRC4_ADINR,SRC 4 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x300+0x14)++0x3 line.long 0x00 "SRC4_ADINR,SRC 4 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x300+0x1C)++0x7 line.long 0x00 "SRC4_IFSCR,SRC 4 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC4_IFSVR,SRC 4 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x300+0x24)++0x3 line.long 0x00 "SRC4_SRCCR,SRC 4 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x300+0x24)++0x3 line.long 0x00 "SRC4_SRCCR,SRC 4 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x300+0x24)++0x3 hide.long 0x00 "SRC4_SRCCR,SRC 4 SRC Control Register" group.long (0x300+0x28)++0x3 line.long 0x00 "SRC4_MNFSR,SRC 4 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x300+0x2C)++0x03 line.long 0x00 "SRC4_BSDSR,SRC 4 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x300+0x38)++0x3 line.long 0x00 "SRC4_BSISR,SRC 4 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 5" group.long 0x340++0x7 line.long 0x00 "SRC5_SWRSR,SRC5 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC5_SRCIR,SRC5 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x340+0x14)++0x3 line.long 0x00 "SRC5_ADINR,SRC 5 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x340+0x14)++0x3 line.long 0x00 "SRC5_ADINR,SRC 5 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x340+0x1C)++0x7 line.long 0x00 "SRC5_IFSCR,SRC 5 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC5_IFSVR,SRC 5 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x340+0x24)++0x3 line.long 0x00 "SRC5_SRCCR,SRC 5 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x340+0x24)++0x3 line.long 0x00 "SRC5_SRCCR,SRC 5 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x340+0x24)++0x3 hide.long 0x00 "SRC5_SRCCR,SRC 5 SRC Control Register" group.long (0x340+0x28)++0x3 line.long 0x00 "SRC5_MNFSR,SRC 5 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x340+0x2C)++0x03 line.long 0x00 "SRC5_BSDSR,SRC 5 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x340+0x38)++0x3 line.long 0x00 "SRC5_BSISR,SRC 5 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 6" group.long 0x380++0x7 line.long 0x00 "SRC6_SWRSR,SRC6 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC6_SRCIR,SRC6 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x380+0x14)++0x3 line.long 0x00 "SRC6_ADINR,SRC 6 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x380+0x14)++0x3 line.long 0x00 "SRC6_ADINR,SRC 6 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x380+0x1C)++0x7 line.long 0x00 "SRC6_IFSCR,SRC 6 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC6_IFSVR,SRC 6 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x380+0x24)++0x3 line.long 0x00 "SRC6_SRCCR,SRC 6 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x380+0x24)++0x3 line.long 0x00 "SRC6_SRCCR,SRC 6 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x380+0x24)++0x3 hide.long 0x00 "SRC6_SRCCR,SRC 6 SRC Control Register" group.long (0x380+0x28)++0x3 line.long 0x00 "SRC6_MNFSR,SRC 6 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x380+0x2C)++0x03 line.long 0x00 "SRC6_BSDSR,SRC 6 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x380+0x38)++0x3 line.long 0x00 "SRC6_BSISR,SRC 6 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 7" group.long 0x3C0++0x7 line.long 0x00 "SRC7_SWRSR,SRC7 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC7_SRCIR,SRC7 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x3C0+0x14)++0x3 line.long 0x00 "SRC7_ADINR,SRC 7 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x3C0+0x14)++0x3 line.long 0x00 "SRC7_ADINR,SRC 7 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x3C0+0x1C)++0x7 line.long 0x00 "SRC7_IFSCR,SRC 7 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC7_IFSVR,SRC 7 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x3C0+0x24)++0x3 line.long 0x00 "SRC7_SRCCR,SRC 7 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x3C0+0x24)++0x3 line.long 0x00 "SRC7_SRCCR,SRC 7 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x3C0+0x24)++0x3 hide.long 0x00 "SRC7_SRCCR,SRC 7 SRC Control Register" group.long (0x3C0+0x28)++0x3 line.long 0x00 "SRC7_MNFSR,SRC 7 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x3C0+0x2C)++0x03 line.long 0x00 "SRC7_BSDSR,SRC 7 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x3C0+0x38)++0x3 line.long 0x00 "SRC7_BSISR,SRC 7 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 8" group.long 0x400++0x7 line.long 0x00 "SRC8_SWRSR,SRC8 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC8_SRCIR,SRC8 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x400+0x14)++0x3 line.long 0x00 "SRC8_ADINR,SRC 8 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x400+0x14)++0x3 line.long 0x00 "SRC8_ADINR,SRC 8 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x400+0x1C)++0x7 line.long 0x00 "SRC8_IFSCR,SRC 8 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC8_IFSVR,SRC 8 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x400+0x24)++0x3 line.long 0x00 "SRC8_SRCCR,SRC 8 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x400+0x24)++0x3 line.long 0x00 "SRC8_SRCCR,SRC 8 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x400+0x24)++0x3 hide.long 0x00 "SRC8_SRCCR,SRC 8 SRC Control Register" group.long (0x400+0x28)++0x3 line.long 0x00 "SRC8_MNFSR,SRC 8 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x400+0x2C)++0x03 line.long 0x00 "SRC8_BSDSR,SRC 8 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x400+0x38)++0x3 line.long 0x00 "SRC8_BSISR,SRC 8 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC 9" group.long 0x440++0x7 line.long 0x00 "SRC9_SWRSR,SRC9 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRC9_SRCIR,SRC9 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x440+0x14)++0x3 line.long 0x00 "SRC9_ADINR,SRC 9 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." else group.long (0x440+0x14)++0x3 line.long 0x00 "SRC9_ADINR,SRC 9 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." endif group.long (0x440+0x1C)++0x7 line.long 0x00 "SRC9_IFSCR,SRC 9 IFS Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FAST_IJC_EN ,FAST_IJC Enable" "0,1" textline " " bitfld.long 0x00 20.--23. " FAST_IJC_SETTING[7-4] ,The period that to recognize 'stable' by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " [3-0] ,The period that to rerun calculation by ijc_fsi calculator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "SRC9_IFSVR,SRC 9 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long (0x440+0x24)++0x3 line.long 0x00 "SRC9_SRCCR,SRC 9 SRC Control Register" bitfld.long 0x00 16. " BIT_16 ,This bit should be set to 1" "0,1" bitfld.long 0x00 12. " BIT_12 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 8. " BIT_8 ,This bit should be set to 1" "0,1" bitfld.long 0x00 4. " BIT_4 ,This bit should be set to 1" "0,1" textline " " bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" elif cpu()=="RCARM2" group.long (0x440+0x24)++0x3 line.long 0x00 "SRC9_SRCCR,SRC 9 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x440+0x24)++0x3 hide.long 0x00 "SRC9_SRCCR,SRC 9 SRC Control Register" group.long (0x440+0x28)++0x3 line.long 0x00 "SRC9_MNFSR,SRC 9 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x440+0x2C)++0x03 line.long 0x00 "SRC9_BSDSR,SRC 9 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x440+0x38)++0x3 line.long 0x00 "SRC9_BSISR,SRC 9 Buffer Size IJEC RAM Setting Register" sif cpu()=="RCARM2"||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree.end tree "CTU Registers" tree "CTU 00" group.long 0x500++0xB line.long 0x00 "CTU00_SWRSR,CTU 00 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU00_CTUIR,CTU 00 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU00_ADINR,CTU 00 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x500+0x10)++0x7 line.long 0x00 "CTU00_CPMDR,CTU 00 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU00_SCMDR,CTU 00 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0x500+0x18)++0x7F line.long 0x00 "CTU00_SV00R,CTU00 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU00_SV01R,CTU00 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU00_SV02R,CTU00 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU00_SV03R,CTU00 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU00_SV04R,CTU00 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU00_SV05R,CTU00 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU00_SV06R,CTU00 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU00_SV07R,CTU00 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU00_SV10R,CTU00 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU00_SV11R,CTU00 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU00_SV12R,CTU00 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU00_SV13R,CTU00 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU00_SV14R,CTU00 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU00_SV15R,CTU00 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU00_SV16R,CTU00 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU00_SV17R,CTU00 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU00_SV20R,CTU00 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU00_SV21R,CTU00 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU00_SV22R,CTU00 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU00_SV23R,CTU00 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU00_SV24R,CTU00 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU00_SV25R,CTU00 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU00_SV26R,CTU00 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU00_SV27R,CTU00 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU00_SV30R,CTU00 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU00_SV31R,CTU00 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU00_SV32R,CTU00 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU00_SV33R,CTU00 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU00_SV34R,CTU00 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU00_SV35R,CTU00 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU00_SV36R,CTU00 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU00_SV37R,CTU00 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU 01" group.long 0x600++0xB line.long 0x00 "CTU01_SWRSR,CTU 01 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU01_CTUIR,CTU 01 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU01_ADINR,CTU 01 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x600+0x10)++0x7 line.long 0x00 "CTU01_CPMDR,CTU 01 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU01_SCMDR,CTU 01 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0x600+0x18)++0x7F line.long 0x00 "CTU01_SV00R,CTU01 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU01_SV01R,CTU01 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU01_SV02R,CTU01 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU01_SV03R,CTU01 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU01_SV04R,CTU01 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU01_SV05R,CTU01 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU01_SV06R,CTU01 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU01_SV07R,CTU01 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU01_SV10R,CTU01 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU01_SV11R,CTU01 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU01_SV12R,CTU01 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU01_SV13R,CTU01 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU01_SV14R,CTU01 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU01_SV15R,CTU01 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU01_SV16R,CTU01 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU01_SV17R,CTU01 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU01_SV20R,CTU01 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU01_SV21R,CTU01 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU01_SV22R,CTU01 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU01_SV23R,CTU01 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU01_SV24R,CTU01 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU01_SV25R,CTU01 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU01_SV26R,CTU01 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU01_SV27R,CTU01 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU01_SV30R,CTU01 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU01_SV31R,CTU01 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU01_SV32R,CTU01 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU01_SV33R,CTU01 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU01_SV34R,CTU01 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU01_SV35R,CTU01 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU01_SV36R,CTU01 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU01_SV37R,CTU01 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU 02" group.long 0x700++0xB line.long 0x00 "CTU02_SWRSR,CTU 02 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU02_CTUIR,CTU 02 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU02_ADINR,CTU 02 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x700+0x10)++0x7 line.long 0x00 "CTU02_CPMDR,CTU 02 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU02_SCMDR,CTU 02 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0x700+0x18)++0x7F line.long 0x00 "CTU02_SV00R,CTU02 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU02_SV01R,CTU02 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU02_SV02R,CTU02 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU02_SV03R,CTU02 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU02_SV04R,CTU02 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU02_SV05R,CTU02 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU02_SV06R,CTU02 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU02_SV07R,CTU02 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU02_SV10R,CTU02 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU02_SV11R,CTU02 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU02_SV12R,CTU02 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU02_SV13R,CTU02 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU02_SV14R,CTU02 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU02_SV15R,CTU02 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU02_SV16R,CTU02 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU02_SV17R,CTU02 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU02_SV20R,CTU02 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU02_SV21R,CTU02 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU02_SV22R,CTU02 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU02_SV23R,CTU02 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU02_SV24R,CTU02 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU02_SV25R,CTU02 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU02_SV26R,CTU02 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU02_SV27R,CTU02 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU02_SV30R,CTU02 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU02_SV31R,CTU02 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU02_SV32R,CTU02 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU02_SV33R,CTU02 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU02_SV34R,CTU02 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU02_SV35R,CTU02 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU02_SV36R,CTU02 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU02_SV37R,CTU02 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU 03" group.long 0x800++0xB line.long 0x00 "CTU03_SWRSR,CTU 03 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU03_CTUIR,CTU 03 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU03_ADINR,CTU 03 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x800+0x10)++0x7 line.long 0x00 "CTU03_CPMDR,CTU 03 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU03_SCMDR,CTU 03 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0x800+0x18)++0x7F line.long 0x00 "CTU03_SV00R,CTU03 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU03_SV01R,CTU03 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU03_SV02R,CTU03 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU03_SV03R,CTU03 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU03_SV04R,CTU03 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU03_SV05R,CTU03 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU03_SV06R,CTU03 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU03_SV07R,CTU03 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU03_SV10R,CTU03 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU03_SV11R,CTU03 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU03_SV12R,CTU03 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU03_SV13R,CTU03 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU03_SV14R,CTU03 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU03_SV15R,CTU03 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU03_SV16R,CTU03 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU03_SV17R,CTU03 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU03_SV20R,CTU03 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU03_SV21R,CTU03 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU03_SV22R,CTU03 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU03_SV23R,CTU03 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU03_SV24R,CTU03 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU03_SV25R,CTU03 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU03_SV26R,CTU03 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU03_SV27R,CTU03 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU03_SV30R,CTU03 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU03_SV31R,CTU03 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU03_SV32R,CTU03 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU03_SV33R,CTU03 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU03_SV34R,CTU03 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU03_SV35R,CTU03 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU03_SV36R,CTU03 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU03_SV37R,CTU03 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU 10" group.long 0x900++0xB line.long 0x00 "CTU10_SWRSR,CTU 10 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU10_CTUIR,CTU 10 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU10_ADINR,CTU 10 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x900+0x10)++0x7 line.long 0x00 "CTU10_CPMDR,CTU 10 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU10_SCMDR,CTU 10 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0x900+0x18)++0x7F line.long 0x00 "CTU10_SV00R,CTU10 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU10_SV01R,CTU10 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU10_SV02R,CTU10 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU10_SV03R,CTU10 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU10_SV04R,CTU10 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU10_SV05R,CTU10 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU10_SV06R,CTU10 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU10_SV07R,CTU10 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU10_SV10R,CTU10 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU10_SV11R,CTU10 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU10_SV12R,CTU10 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU10_SV13R,CTU10 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU10_SV14R,CTU10 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU10_SV15R,CTU10 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU10_SV16R,CTU10 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU10_SV17R,CTU10 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU10_SV20R,CTU10 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU10_SV21R,CTU10 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU10_SV22R,CTU10 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU10_SV23R,CTU10 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU10_SV24R,CTU10 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU10_SV25R,CTU10 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU10_SV26R,CTU10 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU10_SV27R,CTU10 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU10_SV30R,CTU10 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU10_SV31R,CTU10 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU10_SV32R,CTU10 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU10_SV33R,CTU10 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU10_SV34R,CTU10 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU10_SV35R,CTU10 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU10_SV36R,CTU10 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU10_SV37R,CTU10 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU 11" group.long 0xA00++0xB line.long 0x00 "CTU11_SWRSR,CTU 11 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU11_CTUIR,CTU 11 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU11_ADINR,CTU 11 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0xA00+0x10)++0x7 line.long 0x00 "CTU11_CPMDR,CTU 11 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU11_SCMDR,CTU 11 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0xA00+0x18)++0x7F line.long 0x00 "CTU11_SV00R,CTU11 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU11_SV01R,CTU11 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU11_SV02R,CTU11 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU11_SV03R,CTU11 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU11_SV04R,CTU11 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU11_SV05R,CTU11 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU11_SV06R,CTU11 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU11_SV07R,CTU11 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU11_SV10R,CTU11 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU11_SV11R,CTU11 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU11_SV12R,CTU11 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU11_SV13R,CTU11 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU11_SV14R,CTU11 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU11_SV15R,CTU11 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU11_SV16R,CTU11 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU11_SV17R,CTU11 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU11_SV20R,CTU11 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU11_SV21R,CTU11 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU11_SV22R,CTU11 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU11_SV23R,CTU11 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU11_SV24R,CTU11 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU11_SV25R,CTU11 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU11_SV26R,CTU11 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU11_SV27R,CTU11 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU11_SV30R,CTU11 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU11_SV31R,CTU11 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU11_SV32R,CTU11 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU11_SV33R,CTU11 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU11_SV34R,CTU11 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU11_SV35R,CTU11 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU11_SV36R,CTU11 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU11_SV37R,CTU11 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU 12" group.long 0xB00++0xB line.long 0x00 "CTU12_SWRSR,CTU 12 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU12_CTUIR,CTU 12 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU12_ADINR,CTU 12 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0xB00+0x10)++0x7 line.long 0x00 "CTU12_CPMDR,CTU 12 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU12_SCMDR,CTU 12 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0xB00+0x18)++0x7F line.long 0x00 "CTU12_SV00R,CTU12 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU12_SV01R,CTU12 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU12_SV02R,CTU12 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU12_SV03R,CTU12 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU12_SV04R,CTU12 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU12_SV05R,CTU12 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU12_SV06R,CTU12 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU12_SV07R,CTU12 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU12_SV10R,CTU12 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU12_SV11R,CTU12 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU12_SV12R,CTU12 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU12_SV13R,CTU12 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU12_SV14R,CTU12 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU12_SV15R,CTU12 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU12_SV16R,CTU12 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU12_SV17R,CTU12 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU12_SV20R,CTU12 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU12_SV21R,CTU12 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU12_SV22R,CTU12 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU12_SV23R,CTU12 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU12_SV24R,CTU12 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU12_SV25R,CTU12 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU12_SV26R,CTU12 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU12_SV27R,CTU12 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU12_SV30R,CTU12 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU12_SV31R,CTU12 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU12_SV32R,CTU12 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU12_SV33R,CTU12 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU12_SV34R,CTU12 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU12_SV35R,CTU12 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU12_SV36R,CTU12 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU12_SV37R,CTU12 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU 13" group.long 0xC00++0xB line.long 0x00 "CTU13_SWRSR,CTU 13 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTU13_CTUIR,CTU 13 CTU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "CTU13_ADINR,CTU 13 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0xC00+0x10)++0x7 line.long 0x00 "CTU13_CPMDR,CTU 13 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "CTU13_SCMDR,CTU 13 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." group.long (0xC00+0x18)++0x7F line.long 0x00 "CTU13_SV00R,CTU13 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "CTU13_SV01R,CTU13 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "CTU13_SV02R,CTU13 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "CTU13_SV03R,CTU13 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "CTU13_SV04R,CTU13 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "CTU13_SV05R,CTU13 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "CTU13_SV06R,CTU13 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "CTU13_SV07R,CTU13 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "CTU13_SV10R,CTU13 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "CTU13_SV11R,CTU13 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "CTU13_SV12R,CTU13 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "CTU13_SV13R,CTU13 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "CTU13_SV14R,CTU13 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "CTU13_SV15R,CTU13 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "CTU13_SV16R,CTU13 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "CTU13_SV17R,CTU13 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "CTU13_SV20R,CTU13 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "CTU13_SV21R,CTU13 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "CTU13_SV22R,CTU13 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "CTU13_SV23R,CTU13 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "CTU13_SV24R,CTU13 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "CTU13_SV25R,CTU13 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "CTU13_SV26R,CTU13 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "CTU13_SV27R,CTU13 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "CTU13_SV30R,CTU13 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "CTU13_SV31R,CTU13 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "CTU13_SV32R,CTU13 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "CTU13_SV33R,CTU13 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "CTU13_SV34R,CTU13 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "CTU13_SV35R,CTU13 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "CTU13_SV36R,CTU13 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "CTU13_SV37R,CTU13 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree.end tree "MIX Registers" group.long 0xD00++0xB line.long 0x00 "MIX0_SWRSR,MIX 0 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "MIX0_MIXIR,MIX 0 MIX Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "MIX0_ADINR,MIX 0 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xD00+0x10)++0x1B line.long 0x00 "MIX0_MIXMR,MIX 0 MIX Mode Register" bitfld.long 0x00 0. " MIXMODE ,MIX Mode" "Step,Ramp" line.long 0x04 "MIX0_MVPDR,MIX 0 MIX Volume Period Register" bitfld.long 0x04 8.--11. " MXPDUP ,MIX Period for Volume Up" "128 dB,64 dB,32 dB,16 dB,8 dB,4 dB,2 dB,1 dB,0.5 dB,0.25 dB,0.125 dB,?..." bitfld.long 0x04 0.--3. " MXPDDW ,MIX Period for Volume Down" "-128 dB,-64 dB,-32 dB,-16 dB,-8 dB,-4 dB,-2 dB,-1 dB,-0.5 dB,-0.25 dB,-0.125 dB,?..." line.long 0x08 "MIX0_MDBAR,MIX 0 MIX Decibel A Register" hexmask.long.word 0x08 0.--9. 1. " MIXDBA ,dB of System A" line.long 0x0C "MIX0_MDBBR,MIX 0 MIX Decibel B Register" hexmask.long.word 0x0C 0.--9. 1. " MIXDBB ,dB of System B" line.long 0x10 "MIX0_MDBCR,MIX 0 MIX Decibel C Register" hexmask.long.word 0x10 0.--9. 1. " MIXDBC ,dB of System C" line.long 0x14 "MIX0_MDBDR,MIX 0 MIX Decibel D Register" hexmask.long.word 0x14 0.--9. 1. " MIXDBD ,dB of System D" line.long 0x18 "MIX0_MDBER,MIX 0 MIX Decibel Enable Register" bitfld.long 0x18 0. " MIXDBEN ,MIX dB Enable" "Disabled,Enabled" rgroup.long (0xD00+0x2C)++0x3 line.long 0x00 "MIX0_MIXSR,MIX 0 MIX Status Register" bitfld.long 0x00 0.--1. " MRPSTS ,MIX Volume Ramp Status" "Stable,Down,Up,?..." group.long 0xD40++0xB line.long 0x00 "MIX1_SWRSR,MIX 1 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "MIX1_MIXIR,MIX 1 MIX Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "MIX1_ADINR,MIX 1 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xD40+0x10)++0x1B line.long 0x00 "MIX1_MIXMR,MIX 1 MIX Mode Register" bitfld.long 0x00 0. " MIXMODE ,MIX Mode" "Step,Ramp" line.long 0x04 "MIX1_MVPDR,MIX 1 MIX Volume Period Register" bitfld.long 0x04 8.--11. " MXPDUP ,MIX Period for Volume Up" "128 dB,64 dB,32 dB,16 dB,8 dB,4 dB,2 dB,1 dB,0.5 dB,0.25 dB,0.125 dB,?..." bitfld.long 0x04 0.--3. " MXPDDW ,MIX Period for Volume Down" "-128 dB,-64 dB,-32 dB,-16 dB,-8 dB,-4 dB,-2 dB,-1 dB,-0.5 dB,-0.25 dB,-0.125 dB,?..." line.long 0x08 "MIX1_MDBAR,MIX 1 MIX Decibel A Register" hexmask.long.word 0x08 0.--9. 1. " MIXDBA ,dB of System A" line.long 0x0C "MIX1_MDBBR,MIX 1 MIX Decibel B Register" hexmask.long.word 0x0C 0.--9. 1. " MIXDBB ,dB of System B" line.long 0x10 "MIX1_MDBCR,MIX 1 MIX Decibel C Register" hexmask.long.word 0x10 0.--9. 1. " MIXDBC ,dB of System C" line.long 0x14 "MIX1_MDBDR,MIX 1 MIX Decibel D Register" hexmask.long.word 0x14 0.--9. 1. " MIXDBD ,dB of System D" line.long 0x18 "MIX1_MDBER,MIX 1 MIX Decibel Enable Register" bitfld.long 0x18 0. " MIXDBEN ,MIX dB Enable" "Disabled,Enabled" rgroup.long (0xD40+0x2C)++0x3 line.long 0x00 "MIX1_MIXSR,MIX 1 MIX Status Register" bitfld.long 0x00 0.--1. " MRPSTS ,MIX Volume Ramp Status" "Stable,Down,Up,?..." tree.end tree "DVC Register" tree "DVC 0" group.long 0xE00++0xB line.long 0x00 "DVC0_SWRSR,DVC 0 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "DVC0_DVUIR,DVC0 DVU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "DVC0_ADINR,DVC 0 Audio Information Register" bitfld.long 0x08 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xE00+0x10)++0x3B line.long 0x00 "DVC0_DVUCR,DVC 0 DVU Control Register" bitfld.long 0x00 16. " HWMD ,Enable the DVC_MUTE pin" "Disabled,Enabled" bitfld.long 0x00 8. " VVMD ,Select Digital Volume Value Mode" "Disabled,Enabled" bitfld.long 0x00 4. " VRMD ,Select Volume Ramp Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ZCMD ,Select Zero Cross Mute Mode" "Disabled,Enabled" line.long 0x04 "DVC0_ZCMCR,DVC 0 Zero Cross Mute Control Register" bitfld.long 0x04 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x04 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x04 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x04 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x04 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x04 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled" line.long 0x08 "DVC0_VRCTR,DVC 0 Volume Ramp Control Register" bitfld.long 0x08 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x08 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x08 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x08 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x08 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x08 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled" line.long 0x0C "DVC0_VRPDR,DVC 0 Volume Ramp Period Register" bitfld.long 0x0C 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "128 dB/1 step,64 dB/1 step,32 dB/1 step,16 dB/1 step,8 dB/1 step,4 dB/1 step,2 dB/1 step,1 dB/1 step,0.5 dB/1 step,0.25 dB/1 step,0.125 dB/1 step,0.125 dB/2 steps,0.125 dB/4 steps,0.125 dB/8 steps,0.125 dB/16 steps,0.125 dB/32 steps,0.125 dB/64 steps,0.125 dB/128 steps,0.125 dB/256 steps,0.125 dB/512 steps,0.125 dB/1024 steps,0.125 dB/2048 steps,0.125 dB/4096 steps,0.125 dB/8192 steps,?..." bitfld.long 0x0C 0.--4. " VRPDDW ,VolumeRamp Period for Volume Down" "-128 dB/1 step,-64 dB/1 step,-32 dB/1 step,-16 dB/1 step,-8 dB/1 step,-4 dB/1 step,-2 dB/1 step,-1 dB/1 step,-0.5 dB/1 step,-0.25 dB/1 step,-0.125 dB/1 step,-0.125 dB/2 steps,-0.125 dB/4 steps,-0.125 dB/8 steps,-0.125 dB/16 steps,-0.125 dB/32 steps,-0.125 dB/64 steps,-0.125 dB/128 steps,-0.125 dB/256 steps,-0.125 dB/512 steps,-0.125 dB/1024 steps,-0.125 dB/2048 steps,-0.125 dB/4096 steps,-0.125 dB/8192 steps,?..." line.long 0x10 "DVC0_VRDBR,DVC 0 Volume Ramp Decibel Register" hexmask.long.word 0x10 0.--9. 1. " VRDB ,dB of Volume Ramp" line.long 0x14 "DVC0_VRWTR,DVC 0 Volume Ramp Wait Time Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") hexmask.long.tbyte 0x14 0.--23. 1. " VRWT ,Volume Ramp Wait Time" else hexmask.long.tbyte 0x14 0.--19. 1. " VRWT ,Volume Ramp Wait Time" endif line.long 0x18 "DVC0_VOL0R,DVC 0 Volume Value Setting 0 Register" bitfld.long 0x18 23. " VOLVAL0[23] ,Sign bit" "0,1" bitfld.long 0x18 20.--22. " VOLVAL0[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x18 0.--19. 1. " VOLVAL0[19:0] ,Decimal bits" line.long 0x1C "DVC0_VOL1R,DVC 0 Volume Value Setting 1 Register" bitfld.long 0x1C 23. " VOLVAL1[23] ,Sign bit" "0,1" bitfld.long 0x1C 20.--22. " VOLVAL1[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x1C 0.--19. 1. " VOLVAL1[19:0] ,Decimal bits" line.long 0x20 "DVC0_VOL2R,DVC 0 Volume Value Setting 2 Register" bitfld.long 0x20 23. " VOLVAL2[23] ,Sign bit" "0,1" bitfld.long 0x20 20.--22. " VOLVAL2[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x20 0.--19. 1. " VOLVAL2[19:0] ,Decimal bits" line.long 0x24 "DVC0_VOL3R,DVC 0 Volume Value Setting 3 Register" bitfld.long 0x24 23. " VOLVAL3[23] ,Sign bit" "0,1" bitfld.long 0x24 20.--22. " VOLVAL3[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x24 0.--19. 1. " VOLVAL3[19:0] ,Decimal bits" line.long 0x28 "DVC0_VOL4R,DVC 0 Volume Value Setting 4 Register" bitfld.long 0x28 23. " VOLVAL4[23] ,Sign bit" "0,1" bitfld.long 0x28 20.--22. " VOLVAL4[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x28 0.--19. 1. " VOLVAL4[19:0] ,Decimal bits" line.long 0x2C "DVC0_VOL5R,DVC 0 Volume Value Setting 5 Register" bitfld.long 0x2C 23. " VOLVAL5[23] ,Sign bit" "0,1" bitfld.long 0x2C 20.--22. " VOLVAL5[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x2C 0.--19. 1. " VOLVAL5[19:0] ,Decimal bits" line.long 0x30 "DVC0_VOL6R,DVC 0 Volume Value Setting 6 Register" bitfld.long 0x30 23. " VOLVAL6[23] ,Sign bit" "0,1" bitfld.long 0x30 20.--22. " VOLVAL6[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x30 0.--19. 1. " VOLVAL6[19:0] ,Decimal bits" line.long 0x34 "DVC0_VOL7R,DVC 0 Volume Value Setting 7 Register" bitfld.long 0x34 23. " VOLVAL7[23] ,Sign bit" "0,1" bitfld.long 0x34 20.--22. " VOLVAL7[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x34 0.--19. 1. " VOLVAL7[19:0] ,Decimal bits" line.long 0x38 "DVC0_DVUER,DVCp DVU Enable Register" bitfld.long 0x38 0. " DVCEN ,DVC Register Setting Enable" "Disabled,Enabled" rgroup.long (0xE00+0x4C)++0x3 line.long 0x00 "DVC0_DVUSR,DVC 0 DVU Status Register" bitfld.long 0x00 24. " ALLZSTS ,All-Channel Zero Cross Mute Status" "Not muted,Muted" bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not muted,Muted" bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not muted,Muted" textline " " bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not muted,Muted" bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not muted,Muted" bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not muted,Muted" textline " " bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not muted,Muted" bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not muted,Muted" bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not muted,Muted" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL ,Volume Ramp Level Status" "Invalid level,Valid level" bitfld.long 0x00 3. " VRSTS_MUTE ,Volume Ramp Mute Status" "Not muted,Muted" bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute,Vol. ramp down,Vol. ramp up,Invalid level,Maintained,?..." group.long (0xE00+0x50)++0x3 line.long 0x00 "DVC0_DVIER,DVC 0 Interrupt Enable Register" bitfld.long 0x00 24. " ALLZSTS_IE ,All-Channel Zero Cross Mute Status" "Disabled,Enabled" bitfld.long 0x00 23. " ZSTS7_IE ,Zero Cross Mute Status of Channel 7" "Disabled,Enabled" bitfld.long 0x00 22. " ZSTS6_IE ,Zero Cross Mute Status of Channel 6" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ZSTS5_IE ,Zero Cross Mute Status of Channel 5" "Disabled,Enabled" bitfld.long 0x00 20. " ZSTS4_IE ,Zero Cross Mute Status of Channel 4" "Disabled,Enabled" bitfld.long 0x00 19. " ZSTS3_IE ,Zero Cross Mute Status of Channel 3" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ZSTS2_IE ,Zero Cross Mute Status of Channel 2" "Disabled,Enabled" bitfld.long 0x00 17. " ZSTS1_IE ,Zero Cross Mute Status of Channel 1" "Disabled,Enabled" bitfld.long 0x00 16. " ZSTS0_IE ,Zero Cross Mute Status of Channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL_IE ,Volume Ramp Level Status" "Disabled,Enabled" bitfld.long 0x00 3. " VRSTS_MUTE_IE ,Volume Ramp Mute Status" "Disabled,Enabled" tree.end tree "DVC 1" group.long 0xF00++0xB line.long 0x00 "DVC1_SWRSR,DVC 1 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "DVC1_DVUIR,DVC1 DVU Initialization Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" else bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" endif line.long 0x08 "DVC1_ADINR,DVC 1 Audio Information Register" bitfld.long 0x08 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xF00+0x10)++0x3B line.long 0x00 "DVC1_DVUCR,DVC 1 DVU Control Register" bitfld.long 0x00 16. " HWMD ,Enable the DVC_MUTE pin" "Disabled,Enabled" bitfld.long 0x00 8. " VVMD ,Select Digital Volume Value Mode" "Disabled,Enabled" bitfld.long 0x00 4. " VRMD ,Select Volume Ramp Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ZCMD ,Select Zero Cross Mute Mode" "Disabled,Enabled" line.long 0x04 "DVC1_ZCMCR,DVC 1 Zero Cross Mute Control Register" bitfld.long 0x04 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x04 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x04 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x04 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x04 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x04 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled" line.long 0x08 "DVC1_VRCTR,DVC 1 Volume Ramp Control Register" bitfld.long 0x08 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x08 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x08 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x08 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x08 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x08 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled" line.long 0x0C "DVC1_VRPDR,DVC 1 Volume Ramp Period Register" bitfld.long 0x0C 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "128 dB/1 step,64 dB/1 step,32 dB/1 step,16 dB/1 step,8 dB/1 step,4 dB/1 step,2 dB/1 step,1 dB/1 step,0.5 dB/1 step,0.25 dB/1 step,0.125 dB/1 step,0.125 dB/2 steps,0.125 dB/4 steps,0.125 dB/8 steps,0.125 dB/16 steps,0.125 dB/32 steps,0.125 dB/64 steps,0.125 dB/128 steps,0.125 dB/256 steps,0.125 dB/512 steps,0.125 dB/1024 steps,0.125 dB/2048 steps,0.125 dB/4096 steps,0.125 dB/8192 steps,?..." bitfld.long 0x0C 0.--4. " VRPDDW ,VolumeRamp Period for Volume Down" "-128 dB/1 step,-64 dB/1 step,-32 dB/1 step,-16 dB/1 step,-8 dB/1 step,-4 dB/1 step,-2 dB/1 step,-1 dB/1 step,-0.5 dB/1 step,-0.25 dB/1 step,-0.125 dB/1 step,-0.125 dB/2 steps,-0.125 dB/4 steps,-0.125 dB/8 steps,-0.125 dB/16 steps,-0.125 dB/32 steps,-0.125 dB/64 steps,-0.125 dB/128 steps,-0.125 dB/256 steps,-0.125 dB/512 steps,-0.125 dB/1024 steps,-0.125 dB/2048 steps,-0.125 dB/4096 steps,-0.125 dB/8192 steps,?..." line.long 0x10 "DVC1_VRDBR,DVC 1 Volume Ramp Decibel Register" hexmask.long.word 0x10 0.--9. 1. " VRDB ,dB of Volume Ramp" line.long 0x14 "DVC1_VRWTR,DVC 1 Volume Ramp Wait Time Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") hexmask.long.tbyte 0x14 0.--23. 1. " VRWT ,Volume Ramp Wait Time" else hexmask.long.tbyte 0x14 0.--19. 1. " VRWT ,Volume Ramp Wait Time" endif line.long 0x18 "DVC1_VOL0R,DVC 1 Volume Value Setting 0 Register" bitfld.long 0x18 23. " VOLVAL0[23] ,Sign bit" "0,1" bitfld.long 0x18 20.--22. " VOLVAL0[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x18 0.--19. 1. " VOLVAL0[19:0] ,Decimal bits" line.long 0x1C "DVC1_VOL1R,DVC 1 Volume Value Setting 1 Register" bitfld.long 0x1C 23. " VOLVAL1[23] ,Sign bit" "0,1" bitfld.long 0x1C 20.--22. " VOLVAL1[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x1C 0.--19. 1. " VOLVAL1[19:0] ,Decimal bits" line.long 0x20 "DVC1_VOL2R,DVC 1 Volume Value Setting 2 Register" bitfld.long 0x20 23. " VOLVAL2[23] ,Sign bit" "0,1" bitfld.long 0x20 20.--22. " VOLVAL2[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x20 0.--19. 1. " VOLVAL2[19:0] ,Decimal bits" line.long 0x24 "DVC1_VOL3R,DVC 1 Volume Value Setting 3 Register" bitfld.long 0x24 23. " VOLVAL3[23] ,Sign bit" "0,1" bitfld.long 0x24 20.--22. " VOLVAL3[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x24 0.--19. 1. " VOLVAL3[19:0] ,Decimal bits" line.long 0x28 "DVC1_VOL4R,DVC 1 Volume Value Setting 4 Register" bitfld.long 0x28 23. " VOLVAL4[23] ,Sign bit" "0,1" bitfld.long 0x28 20.--22. " VOLVAL4[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x28 0.--19. 1. " VOLVAL4[19:0] ,Decimal bits" line.long 0x2C "DVC1_VOL5R,DVC 1 Volume Value Setting 5 Register" bitfld.long 0x2C 23. " VOLVAL5[23] ,Sign bit" "0,1" bitfld.long 0x2C 20.--22. " VOLVAL5[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x2C 0.--19. 1. " VOLVAL5[19:0] ,Decimal bits" line.long 0x30 "DVC1_VOL6R,DVC 1 Volume Value Setting 6 Register" bitfld.long 0x30 23. " VOLVAL6[23] ,Sign bit" "0,1" bitfld.long 0x30 20.--22. " VOLVAL6[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x30 0.--19. 1. " VOLVAL6[19:0] ,Decimal bits" line.long 0x34 "DVC1_VOL7R,DVC 1 Volume Value Setting 7 Register" bitfld.long 0x34 23. " VOLVAL7[23] ,Sign bit" "0,1" bitfld.long 0x34 20.--22. " VOLVAL7[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x34 0.--19. 1. " VOLVAL7[19:0] ,Decimal bits" line.long 0x38 "DVC1_DVUER,DVCp DVU Enable Register" bitfld.long 0x38 0. " DVCEN ,DVC Register Setting Enable" "Disabled,Enabled" rgroup.long (0xF00+0x4C)++0x3 line.long 0x00 "DVC1_DVUSR,DVC 1 DVU Status Register" bitfld.long 0x00 24. " ALLZSTS ,All-Channel Zero Cross Mute Status" "Not muted,Muted" bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not muted,Muted" bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not muted,Muted" textline " " bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not muted,Muted" bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not muted,Muted" bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not muted,Muted" textline " " bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not muted,Muted" bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not muted,Muted" bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not muted,Muted" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL ,Volume Ramp Level Status" "Invalid level,Valid level" bitfld.long 0x00 3. " VRSTS_MUTE ,Volume Ramp Mute Status" "Not muted,Muted" bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute,Vol. ramp down,Vol. ramp up,Invalid level,Maintained,?..." group.long (0xF00+0x50)++0x3 line.long 0x00 "DVC1_DVIER,DVC 1 Interrupt Enable Register" bitfld.long 0x00 24. " ALLZSTS_IE ,All-Channel Zero Cross Mute Status" "Disabled,Enabled" bitfld.long 0x00 23. " ZSTS7_IE ,Zero Cross Mute Status of Channel 7" "Disabled,Enabled" bitfld.long 0x00 22. " ZSTS6_IE ,Zero Cross Mute Status of Channel 6" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ZSTS5_IE ,Zero Cross Mute Status of Channel 5" "Disabled,Enabled" bitfld.long 0x00 20. " ZSTS4_IE ,Zero Cross Mute Status of Channel 4" "Disabled,Enabled" bitfld.long 0x00 19. " ZSTS3_IE ,Zero Cross Mute Status of Channel 3" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ZSTS2_IE ,Zero Cross Mute Status of Channel 2" "Disabled,Enabled" bitfld.long 0x00 17. " ZSTS1_IE ,Zero Cross Mute Status of Channel 1" "Disabled,Enabled" bitfld.long 0x00 16. " ZSTS0_IE ,Zero Cross Mute Status of Channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL_IE ,Volume Ramp Level Status" "Disabled,Enabled" bitfld.long 0x00 3. " VRSTS_MUTE_IE ,Volume Ramp Mute Status" "Disabled,Enabled" tree.end tree.end textline " " width 14. base ad:0xEC000000 wgroup.long 0x0++0x3 line.long 0x00 "SRC0IN_BUSIF,SRC0 in Write Data Register" wgroup.long 0x400++0x3 line.long 0x00 "SRC1IN_BUSIF,SRC1 in Write Data Register" wgroup.long 0x800++0x3 line.long 0x00 "SRC2IN_BUSIF,SRC2 in Write Data Register" wgroup.long 0xC00++0x3 line.long 0x00 "SRC3IN_BUSIF,SRC3 in Write Data Register" wgroup.long 0x1000++0x3 line.long 0x00 "SRC4IN_BUSIF,SRC4 in Write Data Register" wgroup.long 0x1400++0x3 line.long 0x00 "SRC5IN_BUSIF,SRC5 in Write Data Register" wgroup.long 0x1800++0x3 line.long 0x00 "SRC6IN_BUSIF,SRC6 in Write Data Register" wgroup.long 0x1C00++0x3 line.long 0x00 "SRC7IN_BUSIF,SRC7 in Write Data Register" wgroup.long 0x2000++0x3 line.long 0x00 "SRC8IN_BUSIF,SRC8 in Write Data Register" wgroup.long 0x2400++0x3 line.long 0x00 "SRC9IN_BUSIF,SRC9 in Write Data Register" rgroup.long 0x4000++0x3 line.long 0x00 "SRC0OUT_BUSIF,SRC0 out Read Data Register" rgroup.long 0x4400++0x3 line.long 0x00 "SRC1OUT_BUSIF,SRC1 out Read Data Register" rgroup.long 0x4800++0x3 line.long 0x00 "SRC2OUT_BUSIF,SRC2 out Read Data Register" rgroup.long 0x4C00++0x3 line.long 0x00 "SRC3OUT_BUSIF,SRC3 out Read Data Register" rgroup.long 0x5000++0x3 line.long 0x00 "SRC4OUT_BUSIF,SRC4 out Read Data Register" rgroup.long 0x5400++0x3 line.long 0x00 "SRC5OUT_BUSIF,SRC5 out Read Data Register" rgroup.long 0x5800++0x3 line.long 0x00 "SRC6OUT_BUSIF,SRC6 out Read Data Register" rgroup.long 0x5C00++0x3 line.long 0x00 "SRC7OUT_BUSIF,SRC7 out Read Data Register" rgroup.long 0x6000++0x3 line.long 0x00 "SRC8OUT_BUSIF,SRC8 out Read Data Register" rgroup.long 0x6400++0x3 line.long 0x00 "SRC9OUT_BUSIF,SRC9 out Read Data Register" rgroup.long 0x8000++0x3 line.long 0x00 "CMD0OUT_BUSIF,CMD 0 out Read Data Register" rgroup.long 0x8400++0x3 line.long 0x00 "CMD1OUT_BUSIF,CMD 1 out Read Data Register" width 0x0B tree.end tree.open "Audio-DMAC (Audio-Direct Memory Access Controller)" tree "Low channels" base ad:0xEC700000 width 19. rgroup.long 0x20++0x3 line.long 0x00 "DMAISTA_L,DMA Interrupt Status Register for Low channel" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 15. " I15 ,Channel 15 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " I14 ,Channel 14 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " I13 ,Channel 13 interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x00 12. " I12 ,Channel 12 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 11. " I11 ,Channel 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I10 ,Channel 10 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " I9 ,Channel 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " I8 ,Channel 8 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " I7 ,Channel 7 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I6 ,Channel 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " I5 ,Channel 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I4 ,Channel 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " I3 ,Channel 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " I2 ,Channel 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I1 ,Channel 1 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " I0 ,Channel 0 interrupt status" "No interrupt,Interrupt" group.long 0x30++0x3 line.long 0x00 "DMASEC_L,DMA Secure Control Register for Low channel" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 15. " S15 ,Channel 15 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 14. " S14 ,Channel 14 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 13. " S13 ,Channel 13 secure mode setting" "Non-secure,Secure" textline " " endif bitfld.long 0x00 12. " S12 ,Channel 12 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 11. " S11 ,Channel 11 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S10 ,Channel 10 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " S9 ,Channel 9 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 8. " S8 ,Channel 8 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 7. " S7 ,Channel 7 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 6. " S6 ,Channel 6 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 5. " S5 ,Channel 5 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S4 ,Channel 4 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " S3 ,Channel 3 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 2. " S2 ,Channel 2 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S1 ,Channel 1 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " S0 ,Channel 0 secure mode setting" "Non-secure,Secure" group.word 0x60++0x3 line.word 0x00 "DMAOR_L,DMA Operation Register for Low channel" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.word 0x00 8.--9. " PR ,Priority Mode" "CH0>CH1>...>CH15,,,Round-robin" else bitfld.word 0x00 8.--9. " PR ,Priority Mode" "CH0>CH1>...>CH12,,,Round-robin" endif textline " " bitfld.word 0x00 2. " AE ,Address Error Flag" "No error,Error" bitfld.word 0x00 0. " DME ,DMA Master Enable" "Disabled,Enabled" wgroup.long 0x80++0x3 line.long 0x00 "DMACHCLR_L,DMA Channel Clear Register for Low channel" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 15. " CLR15 ,Channel 15 registers clear" "No clear,Clear" bitfld.long 0x00 14. " CLR14 ,Channel 14 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR13 ,Channel 13 registers clear" "No clear,Clear" textline " " endif bitfld.long 0x00 12. " CLR12 ,Channel 12 registers clear" "No clear,Clear" bitfld.long 0x00 11. " CLR11 ,Channel 11 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR10 ,Channel 10 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 9. " CLR9 ,Channel 9 registers clear" "No clear,Clear" bitfld.long 0x00 8. " CLR8 ,Channel 8 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR7 ,Channel 7 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 6. " CLR6 ,Channel 6 registers clear" "No clear,Clear" bitfld.long 0x00 5. " CLR5 ,Channel 5 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR4 ,Channel 4 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 3. " CLR3 ,Channel 3 registers clear" "No clear,Clear" bitfld.long 0x00 2. " CLR2 ,Channel 2 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 0. " CLR0 ,Channel 0 registers clear" "No clear,Clear" group.long 0xA0++0x3 line.long 0x00 "DMADPSEC_L,DPRAM Secure Control Register for Low channels" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" tree "Channel 0" if (((per.l(ad:0xEC700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x7 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" else group.long 0x8000++0x7 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" endif group.long (0x8000+0x08)++0x3 line.long 0x00 "DMATCR_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8000+0x18)++0x3 line.long 0x00 "DMATCRB_0,DMA Transfer Count Registers B_0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x3 line.long 0x00 "DMATSR_0,DMA Transfer Count Register 0" group.long (0x8000+0x38)++0x3 line.long 0x00 "DMATSRB_0,DMA Transfer Size Register 0" endif if (((per.l(ad:0xEC700000+0x8000+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8000+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8000+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8000+0x1C)++0x3 line.long 0x00 "DMACHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x3 line.long 0x00 "DMABUFCR_0,DMA Buffer Control Register 0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x1 line.word 0x00 "DMARS_0,DMA Extended Resource Selector 0" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "DMADPBASE_0,DMA Descriptor Base Address Register 0" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "DMAFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 1" if (((per.l(ad:0xEC700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x7 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" else group.long 0x8080++0x7 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" endif group.long (0x8080+0x08)++0x3 line.long 0x00 "DMATCR_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8080+0x18)++0x3 line.long 0x00 "DMATCRB_1,DMA Transfer Count Registers B_1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x3 line.long 0x00 "DMATSR_1,DMA Transfer Count Register 1" group.long (0x8080+0x38)++0x3 line.long 0x00 "DMATSRB_1,DMA Transfer Size Register 1" endif if (((per.l(ad:0xEC700000+0x8080+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8080+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8080+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8080+0x1C)++0x3 line.long 0x00 "DMACHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x3 line.long 0x00 "DMABUFCR_1,DMA Buffer Control Register 1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x1 line.word 0x00 "DMARS_1,DMA Extended Resource Selector 1" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "DMADPBASE_1,DMA Descriptor Base Address Register 1" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "DMAFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 2" if (((per.l(ad:0xEC700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x7 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" else group.long 0x8100++0x7 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" endif group.long (0x8100+0x08)++0x3 line.long 0x00 "DMATCR_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8100+0x18)++0x3 line.long 0x00 "DMATCRB_2,DMA Transfer Count Registers B_2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x3 line.long 0x00 "DMATSR_2,DMA Transfer Count Register 2" group.long (0x8100+0x38)++0x3 line.long 0x00 "DMATSRB_2,DMA Transfer Size Register 2" endif if (((per.l(ad:0xEC700000+0x8100+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8100+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8100+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8100+0x1C)++0x3 line.long 0x00 "DMACHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x3 line.long 0x00 "DMABUFCR_2,DMA Buffer Control Register 2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x1 line.word 0x00 "DMARS_2,DMA Extended Resource Selector 2" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "DMADPBASE_2,DMA Descriptor Base Address Register 2" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "DMAFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 3" if (((per.l(ad:0xEC700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x7 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" else group.long 0x8180++0x7 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" endif group.long (0x8180+0x08)++0x3 line.long 0x00 "DMATCR_3,DMA Transfer Count Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8180+0x18)++0x3 line.long 0x00 "DMATCRB_3,DMA Transfer Count Registers B_3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x3 line.long 0x00 "DMATSR_3,DMA Transfer Count Register 3" group.long (0x8180+0x38)++0x3 line.long 0x00 "DMATSRB_3,DMA Transfer Size Register 3" endif if (((per.l(ad:0xEC700000+0x8180+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8180+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8180+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8180+0x1C)++0x3 line.long 0x00 "DMACHCRB_3,DMA Channel Control Register B_3" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x3 line.long 0x00 "DMABUFCR_3,DMA Buffer Control Register 3" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x1 line.word 0x00 "DMARS_3,DMA Extended Resource Selector 3" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x7 line.long 0x00 "DMADPBASE_3,DMA Descriptor Base Address Register 3" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_3,DMA Descriptor Control Register 3" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x7 line.long 0x00 "DMAFIXSAR_3,DMA Fixed Source Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_3,DMA Fixed Destination Address Register 3" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_3,DMA Fixed Descriptor Base Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 4" if (((per.l(ad:0xEC700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x7 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" else group.long 0x8200++0x7 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" endif group.long (0x8200+0x08)++0x3 line.long 0x00 "DMATCR_4,DMA Transfer Count Register 4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8200+0x18)++0x3 line.long 0x00 "DMATCRB_4,DMA Transfer Count Registers B_4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x3 line.long 0x00 "DMATSR_4,DMA Transfer Count Register 4" group.long (0x8200+0x38)++0x3 line.long 0x00 "DMATSRB_4,DMA Transfer Size Register 4" endif if (((per.l(ad:0xEC700000+0x8200+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8200+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8200+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8200+0x1C)++0x3 line.long 0x00 "DMACHCRB_4,DMA Channel Control Register B_4" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x3 line.long 0x00 "DMABUFCR_4,DMA Buffer Control Register 4" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x1 line.word 0x00 "DMARS_4,DMA Extended Resource Selector 4" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x7 line.long 0x00 "DMADPBASE_4,DMA Descriptor Base Address Register 4" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_4,DMA Descriptor Control Register 4" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x7 line.long 0x00 "DMAFIXSAR_4,DMA Fixed Source Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_4,DMA Fixed Destination Address Register 4" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_4,DMA Fixed Descriptor Base Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 5" if (((per.l(ad:0xEC700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x7 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" else group.long 0x8280++0x7 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" endif group.long (0x8280+0x08)++0x3 line.long 0x00 "DMATCR_5,DMA Transfer Count Register 5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8280+0x18)++0x3 line.long 0x00 "DMATCRB_5,DMA Transfer Count Registers B_5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x3 line.long 0x00 "DMATSR_5,DMA Transfer Count Register 5" group.long (0x8280+0x38)++0x3 line.long 0x00 "DMATSRB_5,DMA Transfer Size Register 5" endif if (((per.l(ad:0xEC700000+0x8280+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8280+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8280+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8280+0x1C)++0x3 line.long 0x00 "DMACHCRB_5,DMA Channel Control Register B_5" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x3 line.long 0x00 "DMABUFCR_5,DMA Buffer Control Register 5" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x1 line.word 0x00 "DMARS_5,DMA Extended Resource Selector 5" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x7 line.long 0x00 "DMADPBASE_5,DMA Descriptor Base Address Register 5" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_5,DMA Descriptor Control Register 5" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x7 line.long 0x00 "DMAFIXSAR_5,DMA Fixed Source Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_5,DMA Fixed Destination Address Register 5" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_5,DMA Fixed Descriptor Base Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 6" if (((per.l(ad:0xEC700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x7 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" else group.long 0x8300++0x7 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" endif group.long (0x8300+0x08)++0x3 line.long 0x00 "DMATCR_6,DMA Transfer Count Register 6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8300+0x18)++0x3 line.long 0x00 "DMATCRB_6,DMA Transfer Count Registers B_6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x3 line.long 0x00 "DMATSR_6,DMA Transfer Count Register 6" group.long (0x8300+0x38)++0x3 line.long 0x00 "DMATSRB_6,DMA Transfer Size Register 6" endif if (((per.l(ad:0xEC700000+0x8300+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8300+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8300+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8300+0x1C)++0x3 line.long 0x00 "DMACHCRB_6,DMA Channel Control Register B_6" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x3 line.long 0x00 "DMABUFCR_6,DMA Buffer Control Register 6" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x1 line.word 0x00 "DMARS_6,DMA Extended Resource Selector 6" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x7 line.long 0x00 "DMADPBASE_6,DMA Descriptor Base Address Register 6" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_6,DMA Descriptor Control Register 6" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x7 line.long 0x00 "DMAFIXSAR_6,DMA Fixed Source Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_6,DMA Fixed Destination Address Register 6" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_6,DMA Fixed Descriptor Base Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 7" if (((per.l(ad:0xEC700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x7 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" else group.long 0x8380++0x7 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" endif group.long (0x8380+0x08)++0x3 line.long 0x00 "DMATCR_7,DMA Transfer Count Register 7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8380+0x18)++0x3 line.long 0x00 "DMATCRB_7,DMA Transfer Count Registers B_7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x3 line.long 0x00 "DMATSR_7,DMA Transfer Count Register 7" group.long (0x8380+0x38)++0x3 line.long 0x00 "DMATSRB_7,DMA Transfer Size Register 7" endif if (((per.l(ad:0xEC700000+0x8380+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8380+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8380+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8380+0x1C)++0x3 line.long 0x00 "DMACHCRB_7,DMA Channel Control Register B_7" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x3 line.long 0x00 "DMABUFCR_7,DMA Buffer Control Register 7" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x1 line.word 0x00 "DMARS_7,DMA Extended Resource Selector 7" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x7 line.long 0x00 "DMADPBASE_7,DMA Descriptor Base Address Register 7" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_7,DMA Descriptor Control Register 7" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x7 line.long 0x00 "DMAFIXSAR_7,DMA Fixed Source Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_7,DMA Fixed Destination Address Register 7" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_7,DMA Fixed Descriptor Base Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 8" if (((per.l(ad:0xEC700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x7 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" else group.long 0x8400++0x7 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" endif group.long (0x8400+0x08)++0x3 line.long 0x00 "DMATCR_8,DMA Transfer Count Register 8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8400+0x18)++0x3 line.long 0x00 "DMATCRB_8,DMA Transfer Count Registers B_8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x3 line.long 0x00 "DMATSR_8,DMA Transfer Count Register 8" group.long (0x8400+0x38)++0x3 line.long 0x00 "DMATSRB_8,DMA Transfer Size Register 8" endif if (((per.l(ad:0xEC700000+0x8400+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8400+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8400+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8400+0x1C)++0x3 line.long 0x00 "DMACHCRB_8,DMA Channel Control Register B_8" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x3 line.long 0x00 "DMABUFCR_8,DMA Buffer Control Register 8" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x1 line.word 0x00 "DMARS_8,DMA Extended Resource Selector 8" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x7 line.long 0x00 "DMADPBASE_8,DMA Descriptor Base Address Register 8" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_8,DMA Descriptor Control Register 8" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x7 line.long 0x00 "DMAFIXSAR_8,DMA Fixed Source Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_8,DMA Fixed Destination Address Register 8" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_8,DMA Fixed Descriptor Base Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 9" if (((per.l(ad:0xEC700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x7 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" else group.long 0x8480++0x7 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" endif group.long (0x8480+0x08)++0x3 line.long 0x00 "DMATCR_9,DMA Transfer Count Register 9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8480+0x18)++0x3 line.long 0x00 "DMATCRB_9,DMA Transfer Count Registers B_9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x3 line.long 0x00 "DMATSR_9,DMA Transfer Count Register 9" group.long (0x8480+0x38)++0x3 line.long 0x00 "DMATSRB_9,DMA Transfer Size Register 9" endif if (((per.l(ad:0xEC700000+0x8480+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8480+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8480+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8480+0x1C)++0x3 line.long 0x00 "DMACHCRB_9,DMA Channel Control Register B_9" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x3 line.long 0x00 "DMABUFCR_9,DMA Buffer Control Register 9" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x1 line.word 0x00 "DMARS_9,DMA Extended Resource Selector 9" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x7 line.long 0x00 "DMADPBASE_9,DMA Descriptor Base Address Register 9" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_9,DMA Descriptor Control Register 9" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x7 line.long 0x00 "DMAFIXSAR_9,DMA Fixed Source Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_9,DMA Fixed Destination Address Register 9" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_9,DMA Fixed Descriptor Base Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 10" if (((per.l(ad:0xEC700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x7 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" else group.long 0x8500++0x7 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" endif group.long (0x8500+0x08)++0x3 line.long 0x00 "DMATCR_10,DMA Transfer Count Register 10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8500+0x18)++0x3 line.long 0x00 "DMATCRB_10,DMA Transfer Count Registers B_10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x3 line.long 0x00 "DMATSR_10,DMA Transfer Count Register 10" group.long (0x8500+0x38)++0x3 line.long 0x00 "DMATSRB_10,DMA Transfer Size Register 10" endif if (((per.l(ad:0xEC700000+0x8500+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8500+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8500+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8500+0x1C)++0x3 line.long 0x00 "DMACHCRB_10,DMA Channel Control Register B_10" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x3 line.long 0x00 "DMABUFCR_10,DMA Buffer Control Register 10" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x1 line.word 0x00 "DMARS_10,DMA Extended Resource Selector 10" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x7 line.long 0x00 "DMADPBASE_10,DMA Descriptor Base Address Register 10" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_10,DMA Descriptor Control Register 10" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x7 line.long 0x00 "DMAFIXSAR_10,DMA Fixed Source Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_10,DMA Fixed Destination Address Register 10" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_10,DMA Fixed Descriptor Base Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 11" if (((per.l(ad:0xEC700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x7 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" else group.long 0x8580++0x7 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" endif group.long (0x8580+0x08)++0x3 line.long 0x00 "DMATCR_11,DMA Transfer Count Register 11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8580+0x18)++0x3 line.long 0x00 "DMATCRB_11,DMA Transfer Count Registers B_11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x3 line.long 0x00 "DMATSR_11,DMA Transfer Count Register 11" group.long (0x8580+0x38)++0x3 line.long 0x00 "DMATSRB_11,DMA Transfer Size Register 11" endif if (((per.l(ad:0xEC700000+0x8580+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8580+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8580+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8580+0x1C)++0x3 line.long 0x00 "DMACHCRB_11,DMA Channel Control Register B_11" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x3 line.long 0x00 "DMABUFCR_11,DMA Buffer Control Register 11" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x1 line.word 0x00 "DMARS_11,DMA Extended Resource Selector 11" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x7 line.long 0x00 "DMADPBASE_11,DMA Descriptor Base Address Register 11" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_11,DMA Descriptor Control Register 11" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x7 line.long 0x00 "DMAFIXSAR_11,DMA Fixed Source Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_11,DMA Fixed Destination Address Register 11" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_11,DMA Fixed Descriptor Base Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 12" if (((per.l(ad:0xEC700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x7 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" else group.long 0x8600++0x7 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" endif group.long (0x8600+0x08)++0x3 line.long 0x00 "DMATCR_12,DMA Transfer Count Register 12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8600+0x18)++0x3 line.long 0x00 "DMATCRB_12,DMA Transfer Count Registers B_12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x3 line.long 0x00 "DMATSR_12,DMA Transfer Count Register 12" group.long (0x8600+0x38)++0x3 line.long 0x00 "DMATSRB_12,DMA Transfer Size Register 12" endif if (((per.l(ad:0xEC700000+0x8600+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC700000+0x8600+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC700000+0x8600+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8600+0x1C)++0x3 line.long 0x00 "DMACHCRB_12,DMA Channel Control Register B_12" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x3 line.long 0x00 "DMABUFCR_12,DMA Buffer Control Register 12" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x1 line.word 0x00 "DMARS_12,DMA Extended Resource Selector 12" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x7 line.long 0x00 "DMADPBASE_12,DMA Descriptor Base Address Register 12" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_12,DMA Descriptor Control Register 12" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x7 line.long 0x00 "DMAFIXSAR_12,DMA Fixed Source Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_12,DMA Fixed Destination Address Register 12" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_12,DMA Fixed Descriptor Base Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for Lower Channels" button "DESCRIPTORMEM" "d (ad:0xEC700000+0xA000)--(ad:0xEC700000+0xA7FC) /long" textline "" group.long 0xC0++0x0B line.long 0x00 "DMASES_L,Secure function Secure Status register for Low channels" bitfld.long 0x00 0. " ERROR ,Error status of Low channels" "No error,Error" line.long 0x04 "DMASEDDR_L,Secure function Salve Error Address register for Low channels" line.long 0x08 "DMASEMID_L,Secure function Error Master ID register for Low channels" width 0xB tree.end tree "Upper channels" base ad:0xEC720000 width 19. sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long 0x20++0x3 line.long 0x00 "DMAISTA_U,DMA Interrupt Status Register for Upper channel" bitfld.long 0x00 15. " I31 ,Channel 31 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " I30 ,Channel 30 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " I29 ,Channel 29 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " I28 ,Channel 28 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 11. " I27 ,Channel 27 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I26 ,Channel 26 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " I25 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " I24 ,Channel 24 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " I23 ,Channel 23 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I22 ,Channel 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " I21 ,Channel 21 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I20 ,Channel 20 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " I19 ,Channel 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " I18 ,Channel 18 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I17 ,Channel 17 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " I16 ,Channel 16 interrupt status" "No interrupt,Interrupt" group.long 0x30++0x3 line.long 0x00 "DMASEC_U,DMA Secure Control Register for Upper channel" bitfld.long 0x00 15. " S31 ,Channel 31 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 14. " S30 ,Channel 30 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 13. " S29 ,Channel 29 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 12. " S28 ,Channel 28 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 11. " S27 ,Channel 27 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S26 ,Channel 26 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " S25 ,Channel 25 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 8. " S24 ,Channel 24 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 7. " S23 ,Channel 23 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 6. " S22 ,Channel 22 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 5. " S21 ,Channel 21 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S20 ,Channel 20 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " S19 ,Channel 19 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 2. " S18 ,Channel 18 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S17 ,Channel 17 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " S16 ,Channel 16 secure mode setting" "Non-secure,Secure" else rgroup.long 0x20++0x3 line.long 0x00 "DMAISTA_U,DMA Interrupt Status Register for Upper channel" bitfld.long 0x00 12. " I25 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 11. " I24 ,Channel 24 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I23 ,Channel 23 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " I22 ,Channel 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " I21 ,Channel 21 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " I20 ,Channel 20 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I19 ,Channel 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " I18 ,Channel 18 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I17 ,Channel 17 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " I16 ,Channel 16 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " I15 ,Channel 15 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I14 ,Channel 14 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " I13 ,Channel 13 interrupt status" "No interrupt,Interrupt" group.long 0x30++0x3 line.long 0x00 "DMASEC_U,DMA Secure Control Register for Upper channel" bitfld.long 0x00 12. " S25 ,Channel 25 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 11. " S24 ,Channel 24 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S23 ,Channel 23 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " S22 ,Channel 22 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 8. " S21 ,Channel 21 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 7. " S20 ,Channel 20 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 6. " S19 ,Channel 19 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 5. " S18 ,Channel 18 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S17 ,Channel 17 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " S16 ,Channel 16 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 2. " S15 ,Channel 15 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S14 ,Channel 14 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " S13 ,Channel 13 secure mode setting" "Non-secure,Secure" endif group.word 0x60++0x3 line.word 0x00 "DMAOR_U,DMA Operation Register for Upper channel" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.word 0x00 8.--9. " PR ,Priority Mode" "CH16>CH17>...>CH31,,,Round-robin" else bitfld.word 0x00 8.--9. " PR ,Priority Mode" "CH0>CH1>...>CH12,,,Round-robin" endif textline " " bitfld.word 0x00 2. " AE ,Address Error Flag" "No error,Error" bitfld.word 0x00 0. " DME ,DMA Master Enable" "Disabled,Enabled" sif cpuis("R8J7795*")||cpuis("R8A7795*") wgroup.long 0x80++0x3 line.long 0x00 "DMACHCLR_U,DMA Channel Clear Register for Upper channel" bitfld.long 0x00 15. " CLR31 ,Channel 31 registers clear" "No clear,Clear" bitfld.long 0x00 14. " CLR30 ,Channel 30 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR29 ,Channel 29 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 12. " CLR28 ,Channel 28 registers clear" "No clear,Clear" bitfld.long 0x00 11. " CLR27 ,Channel 27 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR26 ,Channel 26 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 9. " CLR25 ,Channel 25 registers clear" "No clear,Clear" bitfld.long 0x00 8. " CLR24 ,Channel 24 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR23 ,Channel 23 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 6. " CLR22 ,Channel 22 registers clear" "No clear,Clear" bitfld.long 0x00 5. " CLR21 ,Channel 21 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR20 ,Channel 20 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 3. " CLR19 ,Channel 19 registers clear" "No clear,Clear" bitfld.long 0x00 2. " CLR18 ,Channel 18 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR17 ,Channel 17 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 0. " CLR16 ,Channel 16 registers clear" "No clear,Clear" else wgroup.long 0x80++0x3 line.long 0x00 "DMACHCLR_U,DMA Channel Clear Register for Upper channel" bitfld.long 0x00 12. " CLR25 ,Channel 25 registers clear" "No clear,Clear" bitfld.long 0x00 11. " CLR24 ,Channel 24 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR23 ,Channel 23 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 9. " CLR22 ,Channel 22 registers clear" "No clear,Clear" bitfld.long 0x00 8. " CLR21 ,Channel 21 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR20 ,Channel 20 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 6. " CLR19 ,Channel 19 registers clear" "No clear,Clear" bitfld.long 0x00 5. " CLR18 ,Channel 18 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR17 ,Channel 17 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 3. " CLR16 ,Channel 16 registers clear" "No clear,Clear" bitfld.long 0x00 2. " CLR15 ,Channel 15 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR14 ,Channel 14 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 0. " CLR13 ,Channel 13 registers clear" "No clear,Clear" endif group.long 0xA0++0x3 line.long 0x00 "DMADPSEC_U,DPRAM Secure Control Register for Upper channels" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" tree "Channel 13" if (((per.l(ad:0xEC720000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x7 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" else group.long 0x8000++0x7 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" endif group.long (0x8000+0x08)++0x3 line.long 0x00 "DMATCR_13,DMA Transfer Count Register 13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8000+0x18)++0x3 line.long 0x00 "DMATCRB_13,DMA Transfer Count Registers B_13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x3 line.long 0x00 "DMATSR_13,DMA Transfer Count Register 13" group.long (0x8000+0x38)++0x3 line.long 0x00 "DMATSRB_13,DMA Transfer Size Register 13" endif if (((per.l(ad:0xEC720000+0x8000+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8000+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x2C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8000+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x3 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8000+0x1C)++0x3 line.long 0x00 "DMACHCRB_13,DMA Channel Control Register B_13" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x3 line.long 0x00 "DMABUFCR_13,DMA Buffer Control Register 13" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x1 line.word 0x00 "DMARS_13,DMA Extended Resource Selector 13" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x7 line.long 0x00 "DMADPBASE_13,DMA Descriptor Base Address Register 13" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_13,DMA Descriptor Control Register 13" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x7 line.long 0x00 "DMAFIXSAR_13,DMA Fixed Source Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_13,DMA Fixed Destination Address Register 13" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_13,DMA Fixed Descriptor Base Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 14" if (((per.l(ad:0xEC720000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x7 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" else group.long 0x8080++0x7 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" endif group.long (0x8080+0x08)++0x3 line.long 0x00 "DMATCR_14,DMA Transfer Count Register 14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8080+0x18)++0x3 line.long 0x00 "DMATCRB_14,DMA Transfer Count Registers B_14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x3 line.long 0x00 "DMATSR_14,DMA Transfer Count Register 14" group.long (0x8080+0x38)++0x3 line.long 0x00 "DMATSRB_14,DMA Transfer Size Register 14" endif if (((per.l(ad:0xEC720000+0x8080+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8080+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x2C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8080+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x3 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8080+0x1C)++0x3 line.long 0x00 "DMACHCRB_14,DMA Channel Control Register B_14" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x3 line.long 0x00 "DMABUFCR_14,DMA Buffer Control Register 14" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x1 line.word 0x00 "DMARS_14,DMA Extended Resource Selector 14" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x7 line.long 0x00 "DMADPBASE_14,DMA Descriptor Base Address Register 14" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_14,DMA Descriptor Control Register 14" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x7 line.long 0x00 "DMAFIXSAR_14,DMA Fixed Source Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_14,DMA Fixed Destination Address Register 14" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_14,DMA Fixed Descriptor Base Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 15" if (((per.l(ad:0xEC720000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x7 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" else group.long 0x8100++0x7 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" endif group.long (0x8100+0x08)++0x3 line.long 0x00 "DMATCR_15,DMA Transfer Count Register 15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8100+0x18)++0x3 line.long 0x00 "DMATCRB_15,DMA Transfer Count Registers B_15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x3 line.long 0x00 "DMATSR_15,DMA Transfer Count Register 15" group.long (0x8100+0x38)++0x3 line.long 0x00 "DMATSRB_15,DMA Transfer Size Register 15" endif if (((per.l(ad:0xEC720000+0x8100+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8100+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x2C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8100+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x3 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8100+0x1C)++0x3 line.long 0x00 "DMACHCRB_15,DMA Channel Control Register B_15" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x3 line.long 0x00 "DMABUFCR_15,DMA Buffer Control Register 15" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x1 line.word 0x00 "DMARS_15,DMA Extended Resource Selector 15" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x7 line.long 0x00 "DMADPBASE_15,DMA Descriptor Base Address Register 15" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_15,DMA Descriptor Control Register 15" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x7 line.long 0x00 "DMAFIXSAR_15,DMA Fixed Source Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_15,DMA Fixed Destination Address Register 15" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_15,DMA Fixed Descriptor Base Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 16" if (((per.l(ad:0xEC720000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x7 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" else group.long 0x8180++0x7 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" endif group.long (0x8180+0x08)++0x3 line.long 0x00 "DMATCR_16,DMA Transfer Count Register 16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8180+0x18)++0x3 line.long 0x00 "DMATCRB_16,DMA Transfer Count Registers B_16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x3 line.long 0x00 "DMATSR_16,DMA Transfer Count Register 16" group.long (0x8180+0x38)++0x3 line.long 0x00 "DMATSRB_16,DMA Transfer Size Register 16" endif if (((per.l(ad:0xEC720000+0x8180+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8180+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x2C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8180+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x3 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8180+0x1C)++0x3 line.long 0x00 "DMACHCRB_16,DMA Channel Control Register B_16" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x3 line.long 0x00 "DMABUFCR_16,DMA Buffer Control Register 16" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x1 line.word 0x00 "DMARS_16,DMA Extended Resource Selector 16" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x7 line.long 0x00 "DMADPBASE_16,DMA Descriptor Base Address Register 16" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_16,DMA Descriptor Control Register 16" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x7 line.long 0x00 "DMAFIXSAR_16,DMA Fixed Source Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_16,DMA Fixed Destination Address Register 16" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_16,DMA Fixed Descriptor Base Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 17" if (((per.l(ad:0xEC720000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x7 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" else group.long 0x8200++0x7 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" endif group.long (0x8200+0x08)++0x3 line.long 0x00 "DMATCR_17,DMA Transfer Count Register 17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8200+0x18)++0x3 line.long 0x00 "DMATCRB_17,DMA Transfer Count Registers B_17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x3 line.long 0x00 "DMATSR_17,DMA Transfer Count Register 17" group.long (0x8200+0x38)++0x3 line.long 0x00 "DMATSRB_17,DMA Transfer Size Register 17" endif if (((per.l(ad:0xEC720000+0x8200+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8200+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x2C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8200+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x3 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8200+0x1C)++0x3 line.long 0x00 "DMACHCRB_17,DMA Channel Control Register B_17" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x3 line.long 0x00 "DMABUFCR_17,DMA Buffer Control Register 17" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x1 line.word 0x00 "DMARS_17,DMA Extended Resource Selector 17" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x7 line.long 0x00 "DMADPBASE_17,DMA Descriptor Base Address Register 17" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_17,DMA Descriptor Control Register 17" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x7 line.long 0x00 "DMAFIXSAR_17,DMA Fixed Source Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_17,DMA Fixed Destination Address Register 17" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_17,DMA Fixed Descriptor Base Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 18" if (((per.l(ad:0xEC720000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x7 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" else group.long 0x8280++0x7 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" endif group.long (0x8280+0x08)++0x3 line.long 0x00 "DMATCR_18,DMA Transfer Count Register 18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8280+0x18)++0x3 line.long 0x00 "DMATCRB_18,DMA Transfer Count Registers B_18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x3 line.long 0x00 "DMATSR_18,DMA Transfer Count Register 18" group.long (0x8280+0x38)++0x3 line.long 0x00 "DMATSRB_18,DMA Transfer Size Register 18" endif if (((per.l(ad:0xEC720000+0x8280+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8280+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x2C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8280+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x3 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8280+0x1C)++0x3 line.long 0x00 "DMACHCRB_18,DMA Channel Control Register B_18" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x3 line.long 0x00 "DMABUFCR_18,DMA Buffer Control Register 18" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x1 line.word 0x00 "DMARS_18,DMA Extended Resource Selector 18" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x7 line.long 0x00 "DMADPBASE_18,DMA Descriptor Base Address Register 18" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_18,DMA Descriptor Control Register 18" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x7 line.long 0x00 "DMAFIXSAR_18,DMA Fixed Source Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_18,DMA Fixed Destination Address Register 18" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_18,DMA Fixed Descriptor Base Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 19" if (((per.l(ad:0xEC720000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x7 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" else group.long 0x8300++0x7 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" endif group.long (0x8300+0x08)++0x3 line.long 0x00 "DMATCR_19,DMA Transfer Count Register 19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8300+0x18)++0x3 line.long 0x00 "DMATCRB_19,DMA Transfer Count Registers B_19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x3 line.long 0x00 "DMATSR_19,DMA Transfer Count Register 19" group.long (0x8300+0x38)++0x3 line.long 0x00 "DMATSRB_19,DMA Transfer Size Register 19" endif if (((per.l(ad:0xEC720000+0x8300+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8300+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x2C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8300+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x3 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8300+0x1C)++0x3 line.long 0x00 "DMACHCRB_19,DMA Channel Control Register B_19" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x3 line.long 0x00 "DMABUFCR_19,DMA Buffer Control Register 19" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x1 line.word 0x00 "DMARS_19,DMA Extended Resource Selector 19" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x7 line.long 0x00 "DMADPBASE_19,DMA Descriptor Base Address Register 19" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_19,DMA Descriptor Control Register 19" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x7 line.long 0x00 "DMAFIXSAR_19,DMA Fixed Source Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_19,DMA Fixed Destination Address Register 19" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_19,DMA Fixed Descriptor Base Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 20" if (((per.l(ad:0xEC720000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x7 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" else group.long 0x8380++0x7 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" endif group.long (0x8380+0x08)++0x3 line.long 0x00 "DMATCR_20,DMA Transfer Count Register 20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8380+0x18)++0x3 line.long 0x00 "DMATCRB_20,DMA Transfer Count Registers B_20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x3 line.long 0x00 "DMATSR_20,DMA Transfer Count Register 20" group.long (0x8380+0x38)++0x3 line.long 0x00 "DMATSRB_20,DMA Transfer Size Register 20" endif if (((per.l(ad:0xEC720000+0x8380+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8380+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x2C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8380+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x3 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8380+0x1C)++0x3 line.long 0x00 "DMACHCRB_20,DMA Channel Control Register B_20" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x3 line.long 0x00 "DMABUFCR_20,DMA Buffer Control Register 20" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x1 line.word 0x00 "DMARS_20,DMA Extended Resource Selector 20" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x7 line.long 0x00 "DMADPBASE_20,DMA Descriptor Base Address Register 20" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_20,DMA Descriptor Control Register 20" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x7 line.long 0x00 "DMAFIXSAR_20,DMA Fixed Source Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_20,DMA Fixed Destination Address Register 20" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_20,DMA Fixed Descriptor Base Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 21" if (((per.l(ad:0xEC720000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x7 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" else group.long 0x8400++0x7 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" endif group.long (0x8400+0x08)++0x3 line.long 0x00 "DMATCR_21,DMA Transfer Count Register 21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8400+0x18)++0x3 line.long 0x00 "DMATCRB_21,DMA Transfer Count Registers B_21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x3 line.long 0x00 "DMATSR_21,DMA Transfer Count Register 21" group.long (0x8400+0x38)++0x3 line.long 0x00 "DMATSRB_21,DMA Transfer Size Register 21" endif if (((per.l(ad:0xEC720000+0x8400+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8400+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x2C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8400+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x3 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8400+0x1C)++0x3 line.long 0x00 "DMACHCRB_21,DMA Channel Control Register B_21" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x3 line.long 0x00 "DMABUFCR_21,DMA Buffer Control Register 21" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x1 line.word 0x00 "DMARS_21,DMA Extended Resource Selector 21" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x7 line.long 0x00 "DMADPBASE_21,DMA Descriptor Base Address Register 21" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_21,DMA Descriptor Control Register 21" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x7 line.long 0x00 "DMAFIXSAR_21,DMA Fixed Source Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_21,DMA Fixed Destination Address Register 21" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_21,DMA Fixed Descriptor Base Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 22" if (((per.l(ad:0xEC720000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x7 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" else group.long 0x8480++0x7 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" endif group.long (0x8480+0x08)++0x3 line.long 0x00 "DMATCR_22,DMA Transfer Count Register 22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8480+0x18)++0x3 line.long 0x00 "DMATCRB_22,DMA Transfer Count Registers B_22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x3 line.long 0x00 "DMATSR_22,DMA Transfer Count Register 22" group.long (0x8480+0x38)++0x3 line.long 0x00 "DMATSRB_22,DMA Transfer Size Register 22" endif if (((per.l(ad:0xEC720000+0x8480+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8480+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x2C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8480+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x3 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8480+0x1C)++0x3 line.long 0x00 "DMACHCRB_22,DMA Channel Control Register B_22" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x3 line.long 0x00 "DMABUFCR_22,DMA Buffer Control Register 22" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x1 line.word 0x00 "DMARS_22,DMA Extended Resource Selector 22" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x7 line.long 0x00 "DMADPBASE_22,DMA Descriptor Base Address Register 22" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_22,DMA Descriptor Control Register 22" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x7 line.long 0x00 "DMAFIXSAR_22,DMA Fixed Source Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_22,DMA Fixed Destination Address Register 22" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_22,DMA Fixed Descriptor Base Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 23" if (((per.l(ad:0xEC720000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x7 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" else group.long 0x8500++0x7 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" endif group.long (0x8500+0x08)++0x3 line.long 0x00 "DMATCR_23,DMA Transfer Count Register 23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8500+0x18)++0x3 line.long 0x00 "DMATCRB_23,DMA Transfer Count Registers B_23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x3 line.long 0x00 "DMATSR_23,DMA Transfer Count Register 23" group.long (0x8500+0x38)++0x3 line.long 0x00 "DMATSRB_23,DMA Transfer Size Register 23" endif if (((per.l(ad:0xEC720000+0x8500+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8500+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x2C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8500+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x3 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8500+0x1C)++0x3 line.long 0x00 "DMACHCRB_23,DMA Channel Control Register B_23" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x3 line.long 0x00 "DMABUFCR_23,DMA Buffer Control Register 23" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x1 line.word 0x00 "DMARS_23,DMA Extended Resource Selector 23" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x7 line.long 0x00 "DMADPBASE_23,DMA Descriptor Base Address Register 23" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_23,DMA Descriptor Control Register 23" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x7 line.long 0x00 "DMAFIXSAR_23,DMA Fixed Source Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_23,DMA Fixed Destination Address Register 23" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_23,DMA Fixed Descriptor Base Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 24" if (((per.l(ad:0xEC720000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x7 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" else group.long 0x8580++0x7 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" endif group.long (0x8580+0x08)++0x3 line.long 0x00 "DMATCR_24,DMA Transfer Count Register 24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8580+0x18)++0x3 line.long 0x00 "DMATCRB_24,DMA Transfer Count Registers B_24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x3 line.long 0x00 "DMATSR_24,DMA Transfer Count Register 24" group.long (0x8580+0x38)++0x3 line.long 0x00 "DMATSRB_24,DMA Transfer Size Register 24" endif if (((per.l(ad:0xEC720000+0x8580+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8580+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x2C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8580+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x3 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8580+0x1C)++0x3 line.long 0x00 "DMACHCRB_24,DMA Channel Control Register B_24" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x3 line.long 0x00 "DMABUFCR_24,DMA Buffer Control Register 24" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x1 line.word 0x00 "DMARS_24,DMA Extended Resource Selector 24" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x7 line.long 0x00 "DMADPBASE_24,DMA Descriptor Base Address Register 24" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_24,DMA Descriptor Control Register 24" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x7 line.long 0x00 "DMAFIXSAR_24,DMA Fixed Source Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_24,DMA Fixed Destination Address Register 24" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_24,DMA Fixed Descriptor Base Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 25" if (((per.l(ad:0xEC720000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x7 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" else group.long 0x8600++0x7 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" endif group.long (0x8600+0x08)++0x3 line.long 0x00 "DMATCR_25,DMA Transfer Count Register 25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" group.long (0x8600+0x18)++0x3 line.long 0x00 "DMATCRB_25,DMA Transfer Count Registers B_25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer Count Register" if (((per.l(ad:0xEC720000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x3 line.long 0x00 "DMATSR_25,DMA Transfer Count Register 25" group.long (0x8600+0x38)++0x3 line.long 0x00 "DMATSRB_25,DMA Transfer Size Register 25" endif if (((per.l(ad:0xEC720000+0x8600+0x1C))&0x100)==0x100) if (((per.l(ad:0xEC720000+0x8600+0x2C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x2C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC720000+0x8600+0x0C))&0x300018)==(0x00||0x100000||0x200000)) group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x3 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,?..." bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,?..." textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif endif group.long (0x8600+0x1C)++0x3 line.long 0x00 "DMACHCRB_25,DMA Channel Control Register B_25" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of Descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA Transfer Slow Speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel Request Priority Setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x3 line.long 0x00 "DMABUFCR_25,DMA Buffer Control Register 25" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x1 line.word 0x00 "DMARS_25,DMA Extended Resource Selector 25" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x7 line.long 0x00 "DMADPBASE_25,DMA Descriptor Base Address Register 25" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" line.long 0x04 "DMADPCR_25,DMA Descriptor Control Register 25" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x7 line.long 0x00 "DMAFIXSAR_25,DMA Fixed Source Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_25,DMA Fixed Destination Address Register 25" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x3 line.long 0x00 "DMAFIXDPBASE_25,DMA Fixed Descriptor Base Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for Lower Channels" button "DESCRIPTORMEM" "d (ad:0xEC720000+0xA000)--(ad:0xEC720000+0xA7FC) /long" textline "" group.long 0xC0++0x0B line.long 0x00 "DMASES_U,Secure function Secure Status register for Upper channels" bitfld.long 0x00 0. " ERROR ,Error status of Upper channels" "No error,Error" line.long 0x04 "DMASEDDR_U,Secure function Salve Error Address register for Upper channels" line.long 0x08 "DMASEMID_U,Secure function Error Master ID register for Upper channels" width 0xB tree.end tree.end tree "Audio DMAC-Peripheral-Peripheral" base ad:0xEC740000 width 10. sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x20++0x3 "DMAC Channel 0" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x20+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x20+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x20+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x20+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x20+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x20++0xB "DMAC Channel 0" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x20+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x3 "DMAC Channel 1" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x30+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x30+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x30+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x30+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x30+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x30++0xB "DMAC Channel 1" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x30+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x40++0x3 "DMAC Channel 2" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x40+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x40+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x40+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x40+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x40+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x40++0xB "DMAC Channel 2" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x40+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x50++0x3 "DMAC Channel 3" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x50+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x50+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x50+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x50+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x50+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x50++0xB "DMAC Channel 3" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x50+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x60++0x3 "DMAC Channel 4" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x60+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x60+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x60+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x60+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x60+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x60++0xB "DMAC Channel 4" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x60+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x70++0x3 "DMAC Channel 5" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x70+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x70+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x70+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x70+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x70+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x70++0xB "DMAC Channel 5" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x70+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x80++0x3 "DMAC Channel 6" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x80+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x80+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x80+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x80+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x80+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x80++0xB "DMAC Channel 6" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x80+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x90++0x3 "DMAC Channel 7" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x90+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x90+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x90+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x90+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x90+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x90++0xB "DMAC Channel 7" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x90+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xA0++0x3 "DMAC Channel 8" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xA0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xA0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xA0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xA0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xA0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xA0++0xB "DMAC Channel 8" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xA0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xB0++0x3 "DMAC Channel 9" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xB0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xB0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xB0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xB0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xB0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xB0++0xB "DMAC Channel 9" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xB0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xC0++0x3 "DMAC Channel 10" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xC0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xC0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xC0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xC0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xC0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xC0++0xB "DMAC Channel 10" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xC0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xD0++0x3 "DMAC Channel 11" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xD0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xD0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xD0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xD0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xD0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xD0++0xB "DMAC Channel 11" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xD0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xE0++0x3 "DMAC Channel 12" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xE0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xE0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xE0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xE0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xE0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xE0++0xB "DMAC Channel 12" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xE0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xF0++0x3 "DMAC Channel 13" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xF0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xF0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xF0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xF0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xF0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xF0++0xB "DMAC Channel 13" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xF0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x100++0x3 "DMAC Channel 14" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x100+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x100+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x100+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x100+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x100+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x100++0xB "DMAC Channel 14" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x100+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x110++0x3 "DMAC Channel 15" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x110+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x110+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x110+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x110+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x110+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x110++0xB "DMAC Channel 15" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x110+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x120++0x3 "DMAC Channel 16" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x120+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x120+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x120+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x120+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x120+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x120++0xB "DMAC Channel 16" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x120+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x130++0x3 "DMAC Channel 17" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x130+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x130+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x130+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x130+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x130+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x130++0xB "DMAC Channel 17" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x130+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x140++0x3 "DMAC Channel 18" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x140+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x140+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x140+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x140+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x140+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x140++0xB "DMAC Channel 18" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x140+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x150++0x3 "DMAC Channel 19" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x150+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x150+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x150+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x150+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x150+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x150++0xB "DMAC Channel 19" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x150+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x160++0x3 "DMAC Channel 20" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x160+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x160+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x160+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x160+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x160+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x160++0xB "DMAC Channel 20" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x160+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x170++0x3 "DMAC Channel 21" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x170+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x170+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x170+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x170+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x170+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x170++0xB "DMAC Channel 21" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x170+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x180++0x3 "DMAC Channel 22" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x180+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x180+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x180+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x180+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x180+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x180++0xB "DMAC Channel 22" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x180+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x190++0x3 "DMAC Channel 23" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x190+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x190+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x190+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x190+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x190+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x190++0xB "DMAC Channel 23" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x190+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1A0++0x3 "DMAC Channel 24" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1A0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1A0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1A0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1A0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1A0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1A0++0xB "DMAC Channel 24" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1A0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1B0++0x3 "DMAC Channel 25" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1B0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1B0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1B0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1B0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1B0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1B0++0xB "DMAC Channel 25" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1B0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1C0++0x3 "DMAC Channel 26" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1C0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1C0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1C0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1C0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1C0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1C0++0xB "DMAC Channel 26" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1C0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1D0++0x3 "DMAC Channel 27" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1D0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1D0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1D0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1D0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1D0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1D0++0xB "DMAC Channel 27" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1D0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1E0++0x3 "DMAC Channel 28" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1E0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1E0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1E0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1E0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1E0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1E0++0xB "DMAC Channel 28" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1E0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif width 0xB tree.end tree "Ether (Ethernet MAC Controller)" base ad:0xEE700200 width 7. group.long 0x00++0x03 "HDMAC Register Configuration" line.long 0x00 "CXR0,HDMAC Operating Mode Setting Register" sif (cpu()!="RCARH2") bitfld.long 0x00 6. " DE ,DMA data endian conversion" "Not performed,Performed" textline " " endif bitfld.long 0x00 4.--5. " DL ,Transmit/Receive descriptor length" "16 bytes,32 bytes,64 bytes,?..." bitfld.long 0x00 0. " SWR ,HDMAC/feLic software reset" "No reset,Reset" group.long 0x08++0x03 line.long 0x00 "CXR1,Transmit Activation Register" bitfld.long 0x00 0. " TRNS ,Transmit activation" "No effect,Enabled" group.long 0x10++0x03 line.long 0x00 "CXR2,Receive Activation Register" bitfld.long 0x00 0. " R ,Receive ready" "Not ready,Ready" group.long 0x18++0x03 line.long 0x00 "CXR3,Transmit Descriptor Start Address Setting Register" group.long 0x20++0x03 line.long 0x00 "CXR4,Receive Descriptor Start Address Setting Register" group.long 0x28++0x03 line.long 0x00 "CXR5,Status Register" eventfld.long 0x00 30. " TWB ,Write-back to the transmit descriptor performed" "No interrupt,Interrupt" eventfld.long 0x00 26. " TABT ,Transmit abort detect" "No interrupt,Interrupt" eventfld.long 0x00 25. " RABT ,Receive abort detect" "No interrupt,Interrupt" textline " " eventfld.long 0x00 24. " RFRMER ,Receive frame count overflow occurrence" "No interrupt,Interrupt" eventfld.long 0x00 23. " BER ,Indicates that a DMA error is input" "No interrupt,Interrupt" textline " " sif cpuis("R8A774*") rbitfld.long 0x00 22. " MINT ,M port interrupt occurrence" "No interrupt,Interrupt" textline " " else bitfld.long 0x00 22. " MINT ,M port interrupt occurrence" "No interrupt,Interrupt" textline " " endif eventfld.long 0x00 21. " FTC ,Frame transmit completion" "No interrupt,Interrupt" textline " " sif !cpuis("R8A774*") eventfld.long 0x00 20. " TDE ,Transmit descriptor depletion" "No interrupt,Interrupt" textline " " endif eventfld.long 0x00 19. " TFE ,Transmit FIFO underflow error occurrence" "No interrupt,Interrupt" textline " " eventfld.long 0x00 18. " FRC ,Frame receive completion" "No interrupt,Interrupt" eventfld.long 0x00 17. " RDE ,Receive descriptor depletion" "No interrupt,Interrupt" eventfld.long 0x00 16. " RFE ,Receive FIFO overflow error occurrence" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " TINT8 ,Transmit port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 14. " TINT7 ,Transmit port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 13. " TINT6 ,Transmit port interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 12. " TINT5 ,Transmit port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 11. " TINT4 ,Transmit port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " TINT3 ,Transmit port interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " TINT2 ,Transmit port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " TINT1 ,Transmit port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " RINT8 ,Receive port interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " RINT7 ,Receive port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " RINT6 ,Receive port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " RINT5 ,Receive port interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " RINT4 ,Receive port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " RINT3 ,Receive port interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " RINT2 ,Receive port interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " RINT1 ,Receive port interrupt" "No interrupt,Interrupt" sif cpuis("R8A774*") group.long 0x30++0x03 line.long 0x00 "CXR6,Interrupt Mask Setting Register" bitfld.long 0x00 30. " TWB ,TWB interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " BINT ,BINT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " AINT ,AINT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LKON ,LKON interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " TABT ,TABT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " RABT ,RABT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " RFRMER ,RFRMER interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BER ,BER interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " MINT ,MINT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " FTC ,FTC interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDE ,TDE interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFE ,TFE interrupt enable" "Disabled,Enabled" bitfld.long 0x00 18. " FRC ,FRC interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " RDE ,RDE interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " RFE ,RFE interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TINT8 ,TINT8 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " TINT7 ,TINT7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " TINT6 ,TINT6 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " TINT5 ,TINT5 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TINT4 ,TINT4 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " TINT3 ,TINT3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " TINT2 ,TINT2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " TINT1 ,TINT1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RINT8 ,RINT8 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " RINT7 , RINT7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " RINT6 ,RINT6 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " RINT5 ,RINT5 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RINT4 ,RINT4 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " RINT3 ,RINT3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " RINT2 ,RINT2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RINT1 ,RINT1 interrupt enable" "Disabled,Enabled" else group.long 0x30++0x03 line.long 0x00 "CXR6,Interrupt Enable Setting Register" bitfld.long 0x00 30. " TWB ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " TABT ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " RABT ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " RFRMER ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BER ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " MINT ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " FTC ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 18. " FRC ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " RDE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " RFE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TINT8 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " TINT7 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " TINT6 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " TINT5 ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TINT4 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " TINT3 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " TINT2 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " TINT1 ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RINT8 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " RINT7 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " RINT6 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " RINT5 ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RINT4 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " RINT3 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " RINT2 ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RINT1 ,Interrupt enable" "Disabled,Enabled" endif group.long 0x38++0x03 line.long 0x00 "CXR7,Error Mask Setting Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(CPUIS("R8A774*")) bitfld.long 0x00 7. " RINT8 ,Receive descriptor error flag (RFE) mask" "Not masked,Masked" else bitfld.long 0x00 15. " TINT8 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" bitfld.long 0x00 14. " TINT7 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" bitfld.long 0x00 13. " TINT6 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" bitfld.long 0x00 12. " TINT5 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" textline " " bitfld.long 0x00 11. " TINT4 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" bitfld.long 0x00 10. " TINT3 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" bitfld.long 0x00 9. " TINT2 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" bitfld.long 0x00 8. " TINT1 ,Transmit descriptor error flag (TFE) mask" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " RINT8 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" bitfld.long 0x00 6. " RINT7 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" bitfld.long 0x00 5. " RINT6 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" bitfld.long 0x00 4. " RINT5 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" textline " " bitfld.long 0x00 3. " RINT4 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" bitfld.long 0x00 2. " RINT3 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" bitfld.long 0x00 1. " RINT2 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" bitfld.long 0x00 0. " RINT1 ,Receive descriptor error flag (RFE) mask" "Not allowed,Allowed" endif group.long 0x40++0x03 line.long 0x00 "CXR8,Discarded Frame Counter Register" hexmask.long.word 0x00 0.--15. 1. " MIS ,Discarded frame counter" if (((per.l(ad:0xEE700200+0x08))&0x01)==0x01) rgroup.long 0x48++0x03 line.long 0x00 "CXR9,Transmit FIFO Threshold Setting Register" hexmask.long.word 0x00 0.--10. 1. " FO ,Transmit FIFO threshold" else group.long 0x48++0x03 line.long 0x00 "CXR9,Transmit FIFO Threshold Setting Register" hexmask.long.word 0x00 0.--10. 1. " FO ,Transmit FIFO threshold" endif sif cpuis("R8A774*") if (((per.l(ad:0xEE700200+0x08))&0x01)==0x01)&&(((per.l(ad:0xEE700200+0x10))&0x01)==0x01) rgroup.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" bitfld.long 0x00 8.--12. " TA ,Transmit FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." bitfld.long 0x00 0.--4. " RA ,Receive FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." elif (((per.l(ad:0xEE700200+0x08))&0x01)==0x01) group.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" rbitfld.long 0x00 8.--12. " TA ,Transmit FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." bitfld.long 0x00 0.--4. " RA ,Receive FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." elif (((per.l(ad:0xEE700200+0x10))&0x01)==0x01) group.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" bitfld.long 0x00 8.--12. " TA ,Transmit FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." rbitfld.long 0x00 0.--4. " RA ,Receive FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." else group.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" bitfld.long 0x00 8.--12. " TA ,Transmit FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." bitfld.long 0x00 0.--4. " RA ,Receive FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." endif else if (((per.l(ad:0xEE700200+0x08))&0x01)==0x01)&&(((per.l(ad:0xEE700200+0x10))&0x01)==0x01) rgroup.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" bitfld.long 0x00 8.--12. " TA ,Transmit FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." bitfld.long 0x00 0.--4. " RA ,Receive FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." else group.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" bitfld.long 0x00 8.--12. " TA ,Transmit FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." bitfld.long 0x00 0.--4. " RA ,Receive FIFO depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." endif endif if (((per.l(ad:0xEE700200+0x10))&0x1)==0x01) rgroup.long 0x58++0x03 line.long 0x00 "CXR11,Receive Activation Reset Method Setting Register" bitfld.long 0x00 0. " RR ,Receive ready reset" "Cleared,Reset" else group.long 0x58++0x03 line.long 0x00 "CXR11,Receive Activation Reset Method Setting Register" bitfld.long 0x00 0. " RR ,Receive ready reset" "Cleared,Reset" endif group.long 0x64++0x03 line.long 0x00 "CXR13,Transmit FIFO Underflow Counter Register" hexmask.long.word 0x00 0.--15. 1. " TFUF ,Transmit FIFO underflow counter" group.long 0x68++0x03 line.long 0x00 "CXR14,Receive FIFO Overflow Counter Register" hexmask.long.word 0x00 0.--15. 1. " RFOF ,Receive FIFO overflow counter" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||CPUIS("R8A774*") group.long 0x6C++0x03 line.long 0x00 "CXR15,RMII Mode Register" bitfld.long 0x00 0. " RMII ,RMII mode specification" "Disabled,Enabled" endif group.long 0x70++0x03 line.long 0x00 "CXR16,Receive FIFO Busy Transmit Threshold Setting Register" bitfld.long 0x00 16.--18. " RFF ,Busy transmit threshold based on the number of receive frames" "2 frames,4 frames,6 frames,8 frames,10 frames,12 frames,14 frames,16 frames" bitfld.long 0x00 0.--2. " RFD ,Busy transmit threshold based on the amount of data in the receive FIFO" "224 (256-32),480 (512-32),736 (768-32),992 (1024-32),1248(1280-32),1504(1536-32),1760 (1792-32),?..." group.long 0x7C++0x03 line.long 0x00 "CXR18,Transmit Interrupt Mode Setting Register" bitfld.long 0x00 4. " TIM ,Transmit interrupt mode" "Each time a frame transmitted,Write-back to the descriptor completed" bitfld.long 0x00 0. " TIS ,Interrupt mode enable" "Disabled,Enabled" group.long 0x100++0x03 "feLic Register Configuration" line.long 0x00 "CXR20,feLic Operating Mode Setting Register" bitfld.long 0x00 20. " TPC ,PAUSE frame transmission" "Enabled,Disabled" bitfld.long 0x00 19. " ZPF ,PAUSE frame enable with TIME = 0" "Disabled,Enabled" bitfld.long 0x00 18. " PFR ,PAUSE frame receive mode" "Not transferred,Transferred" bitfld.long 0x00 17. " RXF ,Operating mode for reception flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " TXF ,Operating mode for transmission flow control" "Disabled,Enabled" bitfld.long 0x00 12. " CER ,CRC error frame receive mode" "Normal,CRC not error" bitfld.long 0x00 9. " MPM ,Magic packet detection enable" "Disabled,Enabled" bitfld.long 0x00 6. " RPE ,Reception enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TPE ,Transmission enable" "Disabled,Enabled" bitfld.long 0x00 3. " ILB ,FELIC loopback mode" "Normal,Loopback" bitfld.long 0x00 2. " OLB ,10-Base T or 100-Base TX transfer setting" "10-base T,100-base TX" bitfld.long 0x00 1. " DPM ,Duplex mode" "Half-duplex,Full-duplex" textline " " bitfld.long 0x00 0. " PRM ,Promiscuous mode" "Normal,Enters promiscuous" group.long 0x108++0x03 line.long 0x00 "CXR2A,Long Frame Length Check Value Setting Register" hexmask.long.word 0x00 0.--11. 1. " FLUL ,Frame length upper limit" group.long 0x110++0x03 line.long 0x00 "CXR21,Status Register" eventfld.long 0x00 4. " PRO ,PAUSE frame retransmit retry over" "No interrupt,Interrupt" eventfld.long 0x00 2. " LNK ,LINK signal change interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " MPR ,Magic packet receive interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " FCD ,Illegal carrier detection interrupt" "No interrupt,Interrupt" group.long 0x118++0x03 line.long 0x00 "CXR22,Interrupt Mask Setting Register" bitfld.long 0x00 4. " PROE ,PAUSE frame retransmit retry over interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " LKNE ,LINK signal change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " MPRE ,Magic packet receive interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCDE ,Illegal carrier detection interrupt enable" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "CXR23,MII Control Register" sif cpuis("R8A774*") rbitfld.long 0x00 3. " MDI ,MII management data in" "Not read,Read" textline " " else bitfld.long 0x00 3. " MDI ,MII management data in" "Not read,Read" textline " " endif bitfld.long 0x00 2. " MDO ,MII management data out" "Not written,Written" bitfld.long 0x00 1. " MMD ,MII management mode" "Read,Written" bitfld.long 0x00 0. " MDC ,MII management clock" "Disabled,Enabled" rgroup.long 0x128++0x03 line.long 0x00 "CXR2B,PHY Status Register" bitfld.long 0x00 0. " LINK ,PHY output LINK signal monitoring status" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "CXR30,Random Number Generating Counter Upper Limit Setting Register" hexmask.long.tbyte 0x00 0.--19. 1. " RDM ,Upper limit of the counter used for the random number generator" group.long 0x150++0x07 line.long 0x00 "CXR70,IPG Counter Setting Register" bitfld.long 0x00 0.--4. " IPG ,IPG value in 40 ns units" "400 ns,400 ns,400 ns,400 ns,400 ns,400 ns,400 ns,440 ns,480 ns,520 ns,560 ns,600 ns,640 ns,680 ns,720 ns,760 ns,800 ns,840 ns,880 ns,920 ns,960 ns,1000 ns,1040 ns,1080 ns,1120 ns,1160 ns,1200 ns,1240 ns,1280 ns,1320 ns,1360 ns,1440 ns" line.long 0x04 "CXR71,Automatic PAUSE Parameter Setting Register" hexmask.long.word 0x04 0.--15. 1. " APAUSE ,TIME parameter value of an automatic PAUSE frame" wgroup.long 0x158++0x03 line.long 0x00 "CXR72,Manual PAUSE Parameter Setting Register" hexmask.long.word 0x00 0.--15. 1. " MPAUSE ,TIME parameter value of an manual PAUSE frame" rgroup.long 0x160++0x03 line.long 0x00 "CXR80,Receive PAUSE Frame Counter Register" hexmask.long.byte 0x00 0.--7. 1. " RPAUSE ,Received PAUSE frame counter" group.long 0x164++0x03 line.long 0x00 "CXR81,PAUSE Frame Retransmit Count Setting Register" hexmask.long.word 0x00 0.--15. 1. " TXPAUSE ,Upper limit of PAUSE frame retransmission" rgroup.long 0x168++0x03 line.long 0x00 "CXR82,PAUSE Frame Register Retransmit Counter Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*") hexmask.long.word 0x00 0.--15. 1. " TXP ,PAUSE frame retransmit counter" else hexmask.long.word 0x00 0.--15. 1. " RPAUS ,Received PAUSE frame counter" endif if (((per.l(ad:0xEE700200+0x100))&0x60)==0x60) rgroup.long 0x1c0++0x03 line.long 0x00 "CXR24,MAC Address High Register" rgroup.long 0x1c8++0x03 line.long 0x00 "CXR25,MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MACL ,MAC address Lower 16 Bits" else group.long 0x1c0++0x03 line.long 0x00 "CXR24,MAC Address High Register" group.long 0x1c8++0x03 line.long 0x00 "CXR25,MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MACL ,MAC address lower 16 Bits" endif group.long 0x1d0++0x0f line.long 0x00 "CXR40,TINT1 Count Register" line.long 0x04 "CXR41,TINT2 Count Register" line.long 0x08 "CXR42,TINT3 Count Register" line.long 0x0c "CXR43,TINT4 Count Register" group.long 0x1e4++0x017 line.long 0x00 "CXR50,RINT1 Count Register" line.long 0x04 "CXR51,RINT2 Count Register" line.long 0x08 "CXR52,RINT3 Count Register" line.long 0x0c "CXR53,RINT4 Count Register" line.long 0x10 "CXR54,RINT5 Count Register" line.long 0x14 "CXR55,RINT8 Count Register" width 0x0B tree.end tree.open "CAN (Controller Area Network)" tree "Channel 0" base ad:0xE6E80000 width 12. group.word 0x840++0x01 line.word 0x00 "C0CTLR,CAN0 Control Register" bitfld.word 0x00 13. " RBOC ,Forcible Return From Bus-OFF" "No effect,Force return" textline " " bitfld.word 0x00 11.--12. " BOM ,Bus-Off Recovery Mode" "Normal,Halt at Bus-off entry,Halt at Bus-off end,Halt by Program request" textline " " bitfld.word 0x00 10. " SLPM ,CAN Sleep Mode" "Disabled,Enabled" bitfld.word 0x00 8.--9. " CANM ,CAN Operating Mode Select" "Operation,Reset,Halt,Force reset" bitfld.word 0x00 6.--7. " TSPS ,Time Stamp Prescaler Select" "1,2,4,8" textline " " bitfld.word 0x00 5. " TSRC ,Time Stamp Counter Reset Command" "No effect,Reset" bitfld.word 0x00 4. " TPM ,Transmission Priority Mode Select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message Lost Mode Select" "Overwrite,Overrun" textline " " bitfld.word 0x00 1.--2. " IDFM ,ID Format Mode Select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN Mailbox Mode Select" "Normal,FIFO" group.byte 0x847++0x00 line.byte 0x00 "C0CLKR,CAN0 Clock Select Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X") bitfld.byte 0x00 0.--1. " CCLKS ,CAN Clock Source Select" "Peripheral 1,Peripheral 2,,External" else bitfld.byte 0x00 0. " CCLKS ,CAN Clock Source Select" "Peripheral,Main" endif group.long 0x844++0x03 line.long 0x00 "C0BCR,CAN0 Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time Segment 1 Control Bits" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Prescaler Division Ratio" textline " " bitfld.long 0x00 12.--13. " SJW ,Resynchronization Jump Width Control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time Segment 2 Control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" if (((per.w(ad:0xE6E80000+0x840))&0x6)==0x0) group.long 0x430++0x07 line.long 0x0 "C0MKR0,CAN0 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" line.long 0x4 "C0MKR1,CAN0 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C0MKR2,CAN0 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C0MKR3,CAN0 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C0MKR4,CAN0 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C0MKR5,CAN0 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C0MKR6,CAN0 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C0MKR7,CAN0 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C0MKR8,CAN0 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C0MKR9,CAN0 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" elif ((((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)) group.long 0x430++0x07 line.long 0x0 "C0MKR0,CAN0 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" line.long 0x4 "C0MKR1,CAN0 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C0MKR2,CAN0 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C0MKR3,CAN0 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C0MKR4,CAN0 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x8 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x8 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x8 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x8 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x8 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x8 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x8 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x8 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x8 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x8 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x8 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x8 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x8 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x8 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x8 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x8 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x8 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x8 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C0MKR5,CAN0 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0xC 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0xC 16. ",Extended ID Bit 16" "0,1" bitfld.long 0xC 15. ",Extended ID Bit 15" "0,1" bitfld.long 0xC 14. ",Extended ID Bit 14" "0,1" bitfld.long 0xC 13. ",Extended ID Bit 13" "0,1" bitfld.long 0xC 12. ",Extended ID Bit 12" "0,1" bitfld.long 0xC 11. ",Extended ID Bit 11" "0,1" bitfld.long 0xC 10. ",Extended ID Bit 10" "0,1" bitfld.long 0xC 9. ",Extended ID Bit 9" "0,1" bitfld.long 0xC 8. ",Extended ID Bit 8" "0,1" bitfld.long 0xC 7. ",Extended ID Bit 7" "0,1" bitfld.long 0xC 6. ",Extended ID Bit 6" "0,1" bitfld.long 0xC 5. ",Extended ID Bit 5" "0,1" bitfld.long 0xC 4. ",Extended ID Bit 4" "0,1" bitfld.long 0xC 3. ",Extended ID Bit 3" "0,1" bitfld.long 0xC 2. ",Extended ID Bit 2" "0,1" bitfld.long 0xC 1. ",Extended ID Bit 1" "0,1" bitfld.long 0xC 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C0MKR6,CAN0 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x10 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x10 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x10 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x10 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x10 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x10 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x10 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x10 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x10 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x10 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x10 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x10 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x10 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x10 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x10 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x10 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x10 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x10 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C0MKR7,CAN0 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x14 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x14 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x14 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x14 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x14 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x14 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x14 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x14 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x14 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x14 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x14 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x14 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x14 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x14 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x14 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x14 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x14 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x14 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C0MKR8,CAN0 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x18 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x18 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x18 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x18 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x18 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x18 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x18 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x18 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x18 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x18 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x18 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x18 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x18 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x18 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x18 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x18 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x18 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x18 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C0MKR9,CAN0 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x1C 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x1C 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x1C 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x1C 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x1C 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x1C 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x1C 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x1C 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x1C 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x1C 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x1C 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x1C 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x1C 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x1C 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x1C 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x1C 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x1C 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x1C 0. ",Extended ID Bit 0" "0,1" else hgroup.long 0x430++0x07 hide.long 0x0 "C0MKR0,CAN0 Mask Register 0" hide.long 0x4 "C0MKR1,CAN0 Mask Register 1" hgroup.long 0x400++0x1f hide.long 0x0 "C0MKR2,CAN0 Mask Register 2" hgroup.long 0x400++0x1f hide.long 0x4 "C0MKR3,CAN0 Mask Register 3" hgroup.long 0x400++0x1f hide.long 0x8 "C0MKR4,CAN0 Mask Register 4" hgroup.long 0x400++0x1f hide.long 0xC "C0MKR5,CAN0 Mask Register 5" hgroup.long 0x400++0x1f hide.long 0x10 "C0MKR6,CAN0 Mask Register 6" hgroup.long 0x400++0x1f hide.long 0x14 "C0MKR7,CAN0 Mask Register 7" hgroup.long 0x400++0x1f hide.long 0x18 "C0MKR8,CAN0 Mask Register 8" hgroup.long 0x400++0x1f hide.long 0x1C "C0MKR9,CAN0 Mask Register 9" endif if ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x420))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2))) group.long 0x420++0x03 line.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x420))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0))) group.long 0x420++0x03 line.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x420++0x03 hide.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" endif if ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x424))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2))) group.long 0x424++0x03 line.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x424))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0))) group.long 0x424++0x03 line.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x424++0x03 hide.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" endif group.long 0x428++0x03 line.long 0x0 "C0MKIVLR1,CAN0 Mask Invalid Register 1" bitfld.long 0x00 31. " MBMV63 ,Mask valid for mailbox 63" "Valid,Invalid" bitfld.long 0x00 30. " MBMV62 ,Mask valid for mailbox 62" "Valid,Invalid" bitfld.long 0x00 29. " MBMV61 ,Mask valid for mailbox 61" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV60 ,Mask valid for mailbox 60" "Valid,Invalid" bitfld.long 0x00 27. " MBMV59 ,Mask valid for mailbox 59" "Valid,Invalid" bitfld.long 0x00 26. " MBMV58 ,Mask valid for mailbox 58" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV57 ,Mask valid for mailbox 57" "Valid,Invalid" bitfld.long 0x00 24. " MBMV56 ,Mask valid for mailbox 56" "Valid,Invalid" bitfld.long 0x00 23. " MBMV55 ,Mask valid for mailbox 55" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV54 ,Mask valid for mailbox 54" "Valid,Invalid" bitfld.long 0x00 21. " MBMV53 ,Mask valid for mailbox 53" "Valid,Invalid" bitfld.long 0x00 20. " MBMV52 ,Mask valid for mailbox 52" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV51 ,Mask valid for mailbox 51" "Valid,Invalid" bitfld.long 0x00 18. " MBMV50 ,Mask valid for mailbox 50" "Valid,Invalid" bitfld.long 0x00 17. " MBMV49 ,Mask valid for mailbox 49" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV48 ,Mask valid for mailbox 48" "Valid,Invalid" bitfld.long 0x00 15. " MBMV47 ,Mask valid for mailbox 47" "Valid,Invalid" bitfld.long 0x00 14. " MBMV46 ,Mask valid for mailbox 46" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV45 ,Mask valid for mailbox 45" "Valid,Invalid" bitfld.long 0x00 12. " MBMV44 ,Mask valid for mailbox 44" "Valid,Invalid" bitfld.long 0x00 11. " MBMV43 ,Mask valid for mailbox 43" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV42 ,Mask valid for mailbox 42" "Valid,Invalid" bitfld.long 0x00 9. " MBMV41 ,Mask valid for mailbox 41" "Valid,Invalid" bitfld.long 0x00 8. " MBMV40 ,Mask valid for mailbox 40" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV39 ,Mask valid for mailbox 39" "Valid,Invalid" bitfld.long 0x00 6. " MBMV38 ,Mask valid for mailbox 38" "Valid,Invalid" bitfld.long 0x00 5. " MBMV37 ,Mask valid for mailbox 37" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV36 ,Mask valid for mailbox 36" "Valid,Invalid" bitfld.long 0x00 3. " MBMV35 ,Mask valid for mailbox 35" "Valid,Invalid" bitfld.long 0x00 2. " MBMV34 ,Mask valid for mailbox 34" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV33 ,Mask valid for mailbox 33" "Valid,Invalid" bitfld.long 0x00 0. " MBMV32 ,Mask valid for mailbox 32" "Valid,Invalid" group.long 0x438++0x03 line.long 0x0 "C0MKIVLR0,CAN0 Mask Invalid Register 0" bitfld.long 0x00 31. " MBMV31 ,Mask valid for mailbox 31" "Valid,Invalid" bitfld.long 0x00 30. " MBMV30 ,Mask valid for mailbox 30" "Valid,Invalid" bitfld.long 0x00 29. " MBMV29 ,Mask valid for mailbox 29" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV28 ,Mask valid for mailbox 28" "Valid,Invalid" bitfld.long 0x00 27. " MBMV27 ,Mask valid for mailbox 27" "Valid,Invalid" bitfld.long 0x00 26. " MBMV26 ,Mask valid for mailbox 26" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV25 ,Mask valid for mailbox 25" "Valid,Invalid" bitfld.long 0x00 24. " MBMV24 ,Mask valid for mailbox 24" "Valid,Invalid" bitfld.long 0x00 23. " MBMV23 ,Mask valid for mailbox 23" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV22 ,Mask valid for mailbox 22" "Valid,Invalid" bitfld.long 0x00 21. " MBMV21 ,Mask valid for mailbox 21" "Valid,Invalid" bitfld.long 0x00 20. " MBMV20 ,Mask valid for mailbox 20" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV19 ,Mask valid for mailbox 19" "Valid,Invalid" bitfld.long 0x00 18. " MBMV18 ,Mask valid for mailbox 18" "Valid,Invalid" bitfld.long 0x00 17. " MBMV17 ,Mask valid for mailbox 17" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV16 ,Mask valid for mailbox 16" "Valid,Invalid" bitfld.long 0x00 15. " MBMV15 ,Mask valid for mailbox 15" "Valid,Invalid" bitfld.long 0x00 14. " MBMV14 ,Mask valid for mailbox 14" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV13 ,Mask valid for mailbox 13" "Valid,Invalid" bitfld.long 0x00 12. " MBMV12 ,Mask valid for mailbox 12" "Valid,Invalid" bitfld.long 0x00 11. " MBMV11 ,Mask valid for mailbox 11" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV10 ,Mask valid for mailbox 10" "Valid,Invalid" bitfld.long 0x00 9. " MBMV9 ,Mask valid for mailbox 9" "Valid,Invalid" bitfld.long 0x00 8. " MBMV8 ,Mask valid for mailbox 8" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV7 ,Mask valid for mailbox 7" "Valid,Invalid" bitfld.long 0x00 6. " MBMV6 ,Mask valid for mailbox 6" "Valid,Invalid" bitfld.long 0x00 5. " MBMV5 ,Mask valid for mailbox 5" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV4 ,Mask valid for mailbox 4" "Valid,Invalid" bitfld.long 0x00 3. " MBMV3 ,Mask valid for mailbox 3" "Valid,Invalid" bitfld.long 0x00 2. " MBMV2 ,Mask valid for mailbox 2" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV1 ,Mask valid for mailbox 1" "Valid,Invalid" bitfld.long 0x00 0. " MBMV0 ,Mask valid for mailbox 0" "Valid,Invalid" tree "CAN Mailboxes registers" if (((63.==60.)||(63.==61.)||(63.==62.)||(63.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x0++0x03 hide.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x0++0x03 line.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x0++0x03 line.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x0++0x03 hide.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" endif group.word (0x0+0x04)++0x1 line.word 0x00 "C0MB63_DLC,CAN0 Mailbox 63 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x0+0x06)++0x07 line.byte 0x00 "C0MB63_D0,CAN0 Mailbox 63 Data byte 0 Register" line.byte 0x01 "C0MB63_D1,CAN0 Mailbox 63 Data byte 1 Register" line.byte 0x02 "C0MB63_D2,CAN0 Mailbox 63 Data byte 2 Register" line.byte 0x03 "C0MB63_D3,CAN0 Mailbox 63 Data byte 3 Register" line.byte 0x04 "C0MB63_D4,CAN0 Mailbox 63 Data byte 4 Register" line.byte 0x05 "C0MB63_D5,CAN0 Mailbox 63 Data byte 5 Register" line.byte 0x06 "C0MB63_D6,CAN0 Mailbox 63 Data byte 6 Register" line.byte 0x07 "C0MB63_D7,CAN0 Mailbox 63 Data byte 7 Register" group.word (0x0+0x0e)++0x01 line.word 0x00 "C0MB63_TS,CAN0 Mailbox 63 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((62.==60.)||(62.==61.)||(62.==62.)||(62.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x10++0x03 hide.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x10))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x10++0x03 line.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x10))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x10++0x03 line.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x10++0x03 hide.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" endif group.word (0x10+0x04)++0x1 line.word 0x00 "C0MB62_DLC,CAN0 Mailbox 62 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x10+0x06)++0x07 line.byte 0x00 "C0MB62_D0,CAN0 Mailbox 62 Data byte 0 Register" line.byte 0x01 "C0MB62_D1,CAN0 Mailbox 62 Data byte 1 Register" line.byte 0x02 "C0MB62_D2,CAN0 Mailbox 62 Data byte 2 Register" line.byte 0x03 "C0MB62_D3,CAN0 Mailbox 62 Data byte 3 Register" line.byte 0x04 "C0MB62_D4,CAN0 Mailbox 62 Data byte 4 Register" line.byte 0x05 "C0MB62_D5,CAN0 Mailbox 62 Data byte 5 Register" line.byte 0x06 "C0MB62_D6,CAN0 Mailbox 62 Data byte 6 Register" line.byte 0x07 "C0MB62_D7,CAN0 Mailbox 62 Data byte 7 Register" group.word (0x10+0x0e)++0x01 line.word 0x00 "C0MB62_TS,CAN0 Mailbox 62 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((61.==60.)||(61.==61.)||(61.==62.)||(61.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x20++0x03 hide.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x20))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x20++0x03 line.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x20))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x20++0x03 line.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x20++0x03 hide.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" endif group.word (0x20+0x04)++0x1 line.word 0x00 "C0MB61_DLC,CAN0 Mailbox 61 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x20+0x06)++0x07 line.byte 0x00 "C0MB61_D0,CAN0 Mailbox 61 Data byte 0 Register" line.byte 0x01 "C0MB61_D1,CAN0 Mailbox 61 Data byte 1 Register" line.byte 0x02 "C0MB61_D2,CAN0 Mailbox 61 Data byte 2 Register" line.byte 0x03 "C0MB61_D3,CAN0 Mailbox 61 Data byte 3 Register" line.byte 0x04 "C0MB61_D4,CAN0 Mailbox 61 Data byte 4 Register" line.byte 0x05 "C0MB61_D5,CAN0 Mailbox 61 Data byte 5 Register" line.byte 0x06 "C0MB61_D6,CAN0 Mailbox 61 Data byte 6 Register" line.byte 0x07 "C0MB61_D7,CAN0 Mailbox 61 Data byte 7 Register" group.word (0x20+0x0e)++0x01 line.word 0x00 "C0MB61_TS,CAN0 Mailbox 61 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((60.==60.)||(60.==61.)||(60.==62.)||(60.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x30++0x03 hide.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x30))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x30++0x03 line.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x30))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x30++0x03 line.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x30++0x03 hide.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" endif group.word (0x30+0x04)++0x1 line.word 0x00 "C0MB60_DLC,CAN0 Mailbox 60 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x30+0x06)++0x07 line.byte 0x00 "C0MB60_D0,CAN0 Mailbox 60 Data byte 0 Register" line.byte 0x01 "C0MB60_D1,CAN0 Mailbox 60 Data byte 1 Register" line.byte 0x02 "C0MB60_D2,CAN0 Mailbox 60 Data byte 2 Register" line.byte 0x03 "C0MB60_D3,CAN0 Mailbox 60 Data byte 3 Register" line.byte 0x04 "C0MB60_D4,CAN0 Mailbox 60 Data byte 4 Register" line.byte 0x05 "C0MB60_D5,CAN0 Mailbox 60 Data byte 5 Register" line.byte 0x06 "C0MB60_D6,CAN0 Mailbox 60 Data byte 6 Register" line.byte 0x07 "C0MB60_D7,CAN0 Mailbox 60 Data byte 7 Register" group.word (0x30+0x0e)++0x01 line.word 0x00 "C0MB60_TS,CAN0 Mailbox 60 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((59.==60.)||(59.==61.)||(59.==62.)||(59.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x40++0x03 hide.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x40))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x40++0x03 line.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x40))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x40++0x03 line.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x40++0x03 hide.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" endif group.word (0x40+0x04)++0x1 line.word 0x00 "C0MB59_DLC,CAN0 Mailbox 59 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x40+0x06)++0x07 line.byte 0x00 "C0MB59_D0,CAN0 Mailbox 59 Data byte 0 Register" line.byte 0x01 "C0MB59_D1,CAN0 Mailbox 59 Data byte 1 Register" line.byte 0x02 "C0MB59_D2,CAN0 Mailbox 59 Data byte 2 Register" line.byte 0x03 "C0MB59_D3,CAN0 Mailbox 59 Data byte 3 Register" line.byte 0x04 "C0MB59_D4,CAN0 Mailbox 59 Data byte 4 Register" line.byte 0x05 "C0MB59_D5,CAN0 Mailbox 59 Data byte 5 Register" line.byte 0x06 "C0MB59_D6,CAN0 Mailbox 59 Data byte 6 Register" line.byte 0x07 "C0MB59_D7,CAN0 Mailbox 59 Data byte 7 Register" group.word (0x40+0x0e)++0x01 line.word 0x00 "C0MB59_TS,CAN0 Mailbox 59 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((58.==60.)||(58.==61.)||(58.==62.)||(58.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x50++0x03 hide.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x50))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x50++0x03 line.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x50))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x50++0x03 line.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x50++0x03 hide.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" endif group.word (0x50+0x04)++0x1 line.word 0x00 "C0MB58_DLC,CAN0 Mailbox 58 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x50+0x06)++0x07 line.byte 0x00 "C0MB58_D0,CAN0 Mailbox 58 Data byte 0 Register" line.byte 0x01 "C0MB58_D1,CAN0 Mailbox 58 Data byte 1 Register" line.byte 0x02 "C0MB58_D2,CAN0 Mailbox 58 Data byte 2 Register" line.byte 0x03 "C0MB58_D3,CAN0 Mailbox 58 Data byte 3 Register" line.byte 0x04 "C0MB58_D4,CAN0 Mailbox 58 Data byte 4 Register" line.byte 0x05 "C0MB58_D5,CAN0 Mailbox 58 Data byte 5 Register" line.byte 0x06 "C0MB58_D6,CAN0 Mailbox 58 Data byte 6 Register" line.byte 0x07 "C0MB58_D7,CAN0 Mailbox 58 Data byte 7 Register" group.word (0x50+0x0e)++0x01 line.word 0x00 "C0MB58_TS,CAN0 Mailbox 58 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((57.==60.)||(57.==61.)||(57.==62.)||(57.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x60++0x03 hide.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x60))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x60++0x03 line.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x60))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x60++0x03 line.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x60++0x03 hide.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" endif group.word (0x60+0x04)++0x1 line.word 0x00 "C0MB57_DLC,CAN0 Mailbox 57 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x60+0x06)++0x07 line.byte 0x00 "C0MB57_D0,CAN0 Mailbox 57 Data byte 0 Register" line.byte 0x01 "C0MB57_D1,CAN0 Mailbox 57 Data byte 1 Register" line.byte 0x02 "C0MB57_D2,CAN0 Mailbox 57 Data byte 2 Register" line.byte 0x03 "C0MB57_D3,CAN0 Mailbox 57 Data byte 3 Register" line.byte 0x04 "C0MB57_D4,CAN0 Mailbox 57 Data byte 4 Register" line.byte 0x05 "C0MB57_D5,CAN0 Mailbox 57 Data byte 5 Register" line.byte 0x06 "C0MB57_D6,CAN0 Mailbox 57 Data byte 6 Register" line.byte 0x07 "C0MB57_D7,CAN0 Mailbox 57 Data byte 7 Register" group.word (0x60+0x0e)++0x01 line.word 0x00 "C0MB57_TS,CAN0 Mailbox 57 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((56.==60.)||(56.==61.)||(56.==62.)||(56.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x70++0x03 hide.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x70))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x70++0x03 line.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x70))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x70++0x03 line.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x70++0x03 hide.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" endif group.word (0x70+0x04)++0x1 line.word 0x00 "C0MB56_DLC,CAN0 Mailbox 56 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x70+0x06)++0x07 line.byte 0x00 "C0MB56_D0,CAN0 Mailbox 56 Data byte 0 Register" line.byte 0x01 "C0MB56_D1,CAN0 Mailbox 56 Data byte 1 Register" line.byte 0x02 "C0MB56_D2,CAN0 Mailbox 56 Data byte 2 Register" line.byte 0x03 "C0MB56_D3,CAN0 Mailbox 56 Data byte 3 Register" line.byte 0x04 "C0MB56_D4,CAN0 Mailbox 56 Data byte 4 Register" line.byte 0x05 "C0MB56_D5,CAN0 Mailbox 56 Data byte 5 Register" line.byte 0x06 "C0MB56_D6,CAN0 Mailbox 56 Data byte 6 Register" line.byte 0x07 "C0MB56_D7,CAN0 Mailbox 56 Data byte 7 Register" group.word (0x70+0x0e)++0x01 line.word 0x00 "C0MB56_TS,CAN0 Mailbox 56 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((55.==60.)||(55.==61.)||(55.==62.)||(55.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x80++0x03 hide.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x80))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x80++0x03 line.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x80))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x80++0x03 line.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x80++0x03 hide.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" endif group.word (0x80+0x04)++0x1 line.word 0x00 "C0MB55_DLC,CAN0 Mailbox 55 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x80+0x06)++0x07 line.byte 0x00 "C0MB55_D0,CAN0 Mailbox 55 Data byte 0 Register" line.byte 0x01 "C0MB55_D1,CAN0 Mailbox 55 Data byte 1 Register" line.byte 0x02 "C0MB55_D2,CAN0 Mailbox 55 Data byte 2 Register" line.byte 0x03 "C0MB55_D3,CAN0 Mailbox 55 Data byte 3 Register" line.byte 0x04 "C0MB55_D4,CAN0 Mailbox 55 Data byte 4 Register" line.byte 0x05 "C0MB55_D5,CAN0 Mailbox 55 Data byte 5 Register" line.byte 0x06 "C0MB55_D6,CAN0 Mailbox 55 Data byte 6 Register" line.byte 0x07 "C0MB55_D7,CAN0 Mailbox 55 Data byte 7 Register" group.word (0x80+0x0e)++0x01 line.word 0x00 "C0MB55_TS,CAN0 Mailbox 55 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((54.==60.)||(54.==61.)||(54.==62.)||(54.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x90++0x03 hide.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x90))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x90++0x03 line.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x90))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x90++0x03 line.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x90++0x03 hide.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" endif group.word (0x90+0x04)++0x1 line.word 0x00 "C0MB54_DLC,CAN0 Mailbox 54 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x90+0x06)++0x07 line.byte 0x00 "C0MB54_D0,CAN0 Mailbox 54 Data byte 0 Register" line.byte 0x01 "C0MB54_D1,CAN0 Mailbox 54 Data byte 1 Register" line.byte 0x02 "C0MB54_D2,CAN0 Mailbox 54 Data byte 2 Register" line.byte 0x03 "C0MB54_D3,CAN0 Mailbox 54 Data byte 3 Register" line.byte 0x04 "C0MB54_D4,CAN0 Mailbox 54 Data byte 4 Register" line.byte 0x05 "C0MB54_D5,CAN0 Mailbox 54 Data byte 5 Register" line.byte 0x06 "C0MB54_D6,CAN0 Mailbox 54 Data byte 6 Register" line.byte 0x07 "C0MB54_D7,CAN0 Mailbox 54 Data byte 7 Register" group.word (0x90+0x0e)++0x01 line.word 0x00 "C0MB54_TS,CAN0 Mailbox 54 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((53.==60.)||(53.==61.)||(53.==62.)||(53.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xA0++0x03 hide.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xA0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xA0++0x03 line.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xA0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xA0++0x03 line.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xA0++0x03 hide.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" endif group.word (0xA0+0x04)++0x1 line.word 0x00 "C0MB53_DLC,CAN0 Mailbox 53 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xA0+0x06)++0x07 line.byte 0x00 "C0MB53_D0,CAN0 Mailbox 53 Data byte 0 Register" line.byte 0x01 "C0MB53_D1,CAN0 Mailbox 53 Data byte 1 Register" line.byte 0x02 "C0MB53_D2,CAN0 Mailbox 53 Data byte 2 Register" line.byte 0x03 "C0MB53_D3,CAN0 Mailbox 53 Data byte 3 Register" line.byte 0x04 "C0MB53_D4,CAN0 Mailbox 53 Data byte 4 Register" line.byte 0x05 "C0MB53_D5,CAN0 Mailbox 53 Data byte 5 Register" line.byte 0x06 "C0MB53_D6,CAN0 Mailbox 53 Data byte 6 Register" line.byte 0x07 "C0MB53_D7,CAN0 Mailbox 53 Data byte 7 Register" group.word (0xA0+0x0e)++0x01 line.word 0x00 "C0MB53_TS,CAN0 Mailbox 53 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((52.==60.)||(52.==61.)||(52.==62.)||(52.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xB0++0x03 hide.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xB0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xB0++0x03 line.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xB0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xB0++0x03 line.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xB0++0x03 hide.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" endif group.word (0xB0+0x04)++0x1 line.word 0x00 "C0MB52_DLC,CAN0 Mailbox 52 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xB0+0x06)++0x07 line.byte 0x00 "C0MB52_D0,CAN0 Mailbox 52 Data byte 0 Register" line.byte 0x01 "C0MB52_D1,CAN0 Mailbox 52 Data byte 1 Register" line.byte 0x02 "C0MB52_D2,CAN0 Mailbox 52 Data byte 2 Register" line.byte 0x03 "C0MB52_D3,CAN0 Mailbox 52 Data byte 3 Register" line.byte 0x04 "C0MB52_D4,CAN0 Mailbox 52 Data byte 4 Register" line.byte 0x05 "C0MB52_D5,CAN0 Mailbox 52 Data byte 5 Register" line.byte 0x06 "C0MB52_D6,CAN0 Mailbox 52 Data byte 6 Register" line.byte 0x07 "C0MB52_D7,CAN0 Mailbox 52 Data byte 7 Register" group.word (0xB0+0x0e)++0x01 line.word 0x00 "C0MB52_TS,CAN0 Mailbox 52 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((51.==60.)||(51.==61.)||(51.==62.)||(51.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xC0++0x03 hide.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xC0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xC0++0x03 line.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xC0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xC0++0x03 line.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xC0++0x03 hide.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" endif group.word (0xC0+0x04)++0x1 line.word 0x00 "C0MB51_DLC,CAN0 Mailbox 51 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xC0+0x06)++0x07 line.byte 0x00 "C0MB51_D0,CAN0 Mailbox 51 Data byte 0 Register" line.byte 0x01 "C0MB51_D1,CAN0 Mailbox 51 Data byte 1 Register" line.byte 0x02 "C0MB51_D2,CAN0 Mailbox 51 Data byte 2 Register" line.byte 0x03 "C0MB51_D3,CAN0 Mailbox 51 Data byte 3 Register" line.byte 0x04 "C0MB51_D4,CAN0 Mailbox 51 Data byte 4 Register" line.byte 0x05 "C0MB51_D5,CAN0 Mailbox 51 Data byte 5 Register" line.byte 0x06 "C0MB51_D6,CAN0 Mailbox 51 Data byte 6 Register" line.byte 0x07 "C0MB51_D7,CAN0 Mailbox 51 Data byte 7 Register" group.word (0xC0+0x0e)++0x01 line.word 0x00 "C0MB51_TS,CAN0 Mailbox 51 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((50.==60.)||(50.==61.)||(50.==62.)||(50.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xD0++0x03 hide.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xD0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xD0++0x03 line.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xD0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xD0++0x03 line.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xD0++0x03 hide.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" endif group.word (0xD0+0x04)++0x1 line.word 0x00 "C0MB50_DLC,CAN0 Mailbox 50 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xD0+0x06)++0x07 line.byte 0x00 "C0MB50_D0,CAN0 Mailbox 50 Data byte 0 Register" line.byte 0x01 "C0MB50_D1,CAN0 Mailbox 50 Data byte 1 Register" line.byte 0x02 "C0MB50_D2,CAN0 Mailbox 50 Data byte 2 Register" line.byte 0x03 "C0MB50_D3,CAN0 Mailbox 50 Data byte 3 Register" line.byte 0x04 "C0MB50_D4,CAN0 Mailbox 50 Data byte 4 Register" line.byte 0x05 "C0MB50_D5,CAN0 Mailbox 50 Data byte 5 Register" line.byte 0x06 "C0MB50_D6,CAN0 Mailbox 50 Data byte 6 Register" line.byte 0x07 "C0MB50_D7,CAN0 Mailbox 50 Data byte 7 Register" group.word (0xD0+0x0e)++0x01 line.word 0x00 "C0MB50_TS,CAN0 Mailbox 50 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((49.==60.)||(49.==61.)||(49.==62.)||(49.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xE0++0x03 hide.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xE0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xE0++0x03 line.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xE0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xE0++0x03 line.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xE0++0x03 hide.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" endif group.word (0xE0+0x04)++0x1 line.word 0x00 "C0MB49_DLC,CAN0 Mailbox 49 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xE0+0x06)++0x07 line.byte 0x00 "C0MB49_D0,CAN0 Mailbox 49 Data byte 0 Register" line.byte 0x01 "C0MB49_D1,CAN0 Mailbox 49 Data byte 1 Register" line.byte 0x02 "C0MB49_D2,CAN0 Mailbox 49 Data byte 2 Register" line.byte 0x03 "C0MB49_D3,CAN0 Mailbox 49 Data byte 3 Register" line.byte 0x04 "C0MB49_D4,CAN0 Mailbox 49 Data byte 4 Register" line.byte 0x05 "C0MB49_D5,CAN0 Mailbox 49 Data byte 5 Register" line.byte 0x06 "C0MB49_D6,CAN0 Mailbox 49 Data byte 6 Register" line.byte 0x07 "C0MB49_D7,CAN0 Mailbox 49 Data byte 7 Register" group.word (0xE0+0x0e)++0x01 line.word 0x00 "C0MB49_TS,CAN0 Mailbox 49 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((48.==60.)||(48.==61.)||(48.==62.)||(48.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xF0++0x03 hide.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xF0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xF0++0x03 line.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xF0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xF0++0x03 line.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xF0++0x03 hide.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" endif group.word (0xF0+0x04)++0x1 line.word 0x00 "C0MB48_DLC,CAN0 Mailbox 48 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xF0+0x06)++0x07 line.byte 0x00 "C0MB48_D0,CAN0 Mailbox 48 Data byte 0 Register" line.byte 0x01 "C0MB48_D1,CAN0 Mailbox 48 Data byte 1 Register" line.byte 0x02 "C0MB48_D2,CAN0 Mailbox 48 Data byte 2 Register" line.byte 0x03 "C0MB48_D3,CAN0 Mailbox 48 Data byte 3 Register" line.byte 0x04 "C0MB48_D4,CAN0 Mailbox 48 Data byte 4 Register" line.byte 0x05 "C0MB48_D5,CAN0 Mailbox 48 Data byte 5 Register" line.byte 0x06 "C0MB48_D6,CAN0 Mailbox 48 Data byte 6 Register" line.byte 0x07 "C0MB48_D7,CAN0 Mailbox 48 Data byte 7 Register" group.word (0xF0+0x0e)++0x01 line.word 0x00 "C0MB48_TS,CAN0 Mailbox 48 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((47.==60.)||(47.==61.)||(47.==62.)||(47.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x100++0x03 hide.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x100))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x100++0x03 line.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x100))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x100++0x03 line.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x100++0x03 hide.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" endif group.word (0x100+0x04)++0x1 line.word 0x00 "C0MB47_DLC,CAN0 Mailbox 47 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x100+0x06)++0x07 line.byte 0x00 "C0MB47_D0,CAN0 Mailbox 47 Data byte 0 Register" line.byte 0x01 "C0MB47_D1,CAN0 Mailbox 47 Data byte 1 Register" line.byte 0x02 "C0MB47_D2,CAN0 Mailbox 47 Data byte 2 Register" line.byte 0x03 "C0MB47_D3,CAN0 Mailbox 47 Data byte 3 Register" line.byte 0x04 "C0MB47_D4,CAN0 Mailbox 47 Data byte 4 Register" line.byte 0x05 "C0MB47_D5,CAN0 Mailbox 47 Data byte 5 Register" line.byte 0x06 "C0MB47_D6,CAN0 Mailbox 47 Data byte 6 Register" line.byte 0x07 "C0MB47_D7,CAN0 Mailbox 47 Data byte 7 Register" group.word (0x100+0x0e)++0x01 line.word 0x00 "C0MB47_TS,CAN0 Mailbox 47 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((46.==60.)||(46.==61.)||(46.==62.)||(46.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x110++0x03 hide.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x110))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x110++0x03 line.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x110))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x110++0x03 line.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x110++0x03 hide.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" endif group.word (0x110+0x04)++0x1 line.word 0x00 "C0MB46_DLC,CAN0 Mailbox 46 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x110+0x06)++0x07 line.byte 0x00 "C0MB46_D0,CAN0 Mailbox 46 Data byte 0 Register" line.byte 0x01 "C0MB46_D1,CAN0 Mailbox 46 Data byte 1 Register" line.byte 0x02 "C0MB46_D2,CAN0 Mailbox 46 Data byte 2 Register" line.byte 0x03 "C0MB46_D3,CAN0 Mailbox 46 Data byte 3 Register" line.byte 0x04 "C0MB46_D4,CAN0 Mailbox 46 Data byte 4 Register" line.byte 0x05 "C0MB46_D5,CAN0 Mailbox 46 Data byte 5 Register" line.byte 0x06 "C0MB46_D6,CAN0 Mailbox 46 Data byte 6 Register" line.byte 0x07 "C0MB46_D7,CAN0 Mailbox 46 Data byte 7 Register" group.word (0x110+0x0e)++0x01 line.word 0x00 "C0MB46_TS,CAN0 Mailbox 46 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((45.==60.)||(45.==61.)||(45.==62.)||(45.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x120++0x03 hide.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x120))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x120++0x03 line.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x120))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x120++0x03 line.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x120++0x03 hide.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" endif group.word (0x120+0x04)++0x1 line.word 0x00 "C0MB45_DLC,CAN0 Mailbox 45 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x120+0x06)++0x07 line.byte 0x00 "C0MB45_D0,CAN0 Mailbox 45 Data byte 0 Register" line.byte 0x01 "C0MB45_D1,CAN0 Mailbox 45 Data byte 1 Register" line.byte 0x02 "C0MB45_D2,CAN0 Mailbox 45 Data byte 2 Register" line.byte 0x03 "C0MB45_D3,CAN0 Mailbox 45 Data byte 3 Register" line.byte 0x04 "C0MB45_D4,CAN0 Mailbox 45 Data byte 4 Register" line.byte 0x05 "C0MB45_D5,CAN0 Mailbox 45 Data byte 5 Register" line.byte 0x06 "C0MB45_D6,CAN0 Mailbox 45 Data byte 6 Register" line.byte 0x07 "C0MB45_D7,CAN0 Mailbox 45 Data byte 7 Register" group.word (0x120+0x0e)++0x01 line.word 0x00 "C0MB45_TS,CAN0 Mailbox 45 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((44.==60.)||(44.==61.)||(44.==62.)||(44.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x130++0x03 hide.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x130))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x130++0x03 line.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x130))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x130++0x03 line.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x130++0x03 hide.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" endif group.word (0x130+0x04)++0x1 line.word 0x00 "C0MB44_DLC,CAN0 Mailbox 44 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x130+0x06)++0x07 line.byte 0x00 "C0MB44_D0,CAN0 Mailbox 44 Data byte 0 Register" line.byte 0x01 "C0MB44_D1,CAN0 Mailbox 44 Data byte 1 Register" line.byte 0x02 "C0MB44_D2,CAN0 Mailbox 44 Data byte 2 Register" line.byte 0x03 "C0MB44_D3,CAN0 Mailbox 44 Data byte 3 Register" line.byte 0x04 "C0MB44_D4,CAN0 Mailbox 44 Data byte 4 Register" line.byte 0x05 "C0MB44_D5,CAN0 Mailbox 44 Data byte 5 Register" line.byte 0x06 "C0MB44_D6,CAN0 Mailbox 44 Data byte 6 Register" line.byte 0x07 "C0MB44_D7,CAN0 Mailbox 44 Data byte 7 Register" group.word (0x130+0x0e)++0x01 line.word 0x00 "C0MB44_TS,CAN0 Mailbox 44 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((43.==60.)||(43.==61.)||(43.==62.)||(43.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x140++0x03 hide.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x140))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x140++0x03 line.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x140))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x140++0x03 line.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x140++0x03 hide.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" endif group.word (0x140+0x04)++0x1 line.word 0x00 "C0MB43_DLC,CAN0 Mailbox 43 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x140+0x06)++0x07 line.byte 0x00 "C0MB43_D0,CAN0 Mailbox 43 Data byte 0 Register" line.byte 0x01 "C0MB43_D1,CAN0 Mailbox 43 Data byte 1 Register" line.byte 0x02 "C0MB43_D2,CAN0 Mailbox 43 Data byte 2 Register" line.byte 0x03 "C0MB43_D3,CAN0 Mailbox 43 Data byte 3 Register" line.byte 0x04 "C0MB43_D4,CAN0 Mailbox 43 Data byte 4 Register" line.byte 0x05 "C0MB43_D5,CAN0 Mailbox 43 Data byte 5 Register" line.byte 0x06 "C0MB43_D6,CAN0 Mailbox 43 Data byte 6 Register" line.byte 0x07 "C0MB43_D7,CAN0 Mailbox 43 Data byte 7 Register" group.word (0x140+0x0e)++0x01 line.word 0x00 "C0MB43_TS,CAN0 Mailbox 43 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((42.==60.)||(42.==61.)||(42.==62.)||(42.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x150++0x03 hide.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x150))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x150++0x03 line.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x150))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x150++0x03 line.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x150++0x03 hide.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" endif group.word (0x150+0x04)++0x1 line.word 0x00 "C0MB42_DLC,CAN0 Mailbox 42 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x150+0x06)++0x07 line.byte 0x00 "C0MB42_D0,CAN0 Mailbox 42 Data byte 0 Register" line.byte 0x01 "C0MB42_D1,CAN0 Mailbox 42 Data byte 1 Register" line.byte 0x02 "C0MB42_D2,CAN0 Mailbox 42 Data byte 2 Register" line.byte 0x03 "C0MB42_D3,CAN0 Mailbox 42 Data byte 3 Register" line.byte 0x04 "C0MB42_D4,CAN0 Mailbox 42 Data byte 4 Register" line.byte 0x05 "C0MB42_D5,CAN0 Mailbox 42 Data byte 5 Register" line.byte 0x06 "C0MB42_D6,CAN0 Mailbox 42 Data byte 6 Register" line.byte 0x07 "C0MB42_D7,CAN0 Mailbox 42 Data byte 7 Register" group.word (0x150+0x0e)++0x01 line.word 0x00 "C0MB42_TS,CAN0 Mailbox 42 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((41.==60.)||(41.==61.)||(41.==62.)||(41.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x160++0x03 hide.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x160))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x160++0x03 line.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x160))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x160++0x03 line.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x160++0x03 hide.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" endif group.word (0x160+0x04)++0x1 line.word 0x00 "C0MB41_DLC,CAN0 Mailbox 41 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x160+0x06)++0x07 line.byte 0x00 "C0MB41_D0,CAN0 Mailbox 41 Data byte 0 Register" line.byte 0x01 "C0MB41_D1,CAN0 Mailbox 41 Data byte 1 Register" line.byte 0x02 "C0MB41_D2,CAN0 Mailbox 41 Data byte 2 Register" line.byte 0x03 "C0MB41_D3,CAN0 Mailbox 41 Data byte 3 Register" line.byte 0x04 "C0MB41_D4,CAN0 Mailbox 41 Data byte 4 Register" line.byte 0x05 "C0MB41_D5,CAN0 Mailbox 41 Data byte 5 Register" line.byte 0x06 "C0MB41_D6,CAN0 Mailbox 41 Data byte 6 Register" line.byte 0x07 "C0MB41_D7,CAN0 Mailbox 41 Data byte 7 Register" group.word (0x160+0x0e)++0x01 line.word 0x00 "C0MB41_TS,CAN0 Mailbox 41 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((40.==60.)||(40.==61.)||(40.==62.)||(40.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x170++0x03 hide.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x170))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x170++0x03 line.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x170))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x170++0x03 line.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x170++0x03 hide.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" endif group.word (0x170+0x04)++0x1 line.word 0x00 "C0MB40_DLC,CAN0 Mailbox 40 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x170+0x06)++0x07 line.byte 0x00 "C0MB40_D0,CAN0 Mailbox 40 Data byte 0 Register" line.byte 0x01 "C0MB40_D1,CAN0 Mailbox 40 Data byte 1 Register" line.byte 0x02 "C0MB40_D2,CAN0 Mailbox 40 Data byte 2 Register" line.byte 0x03 "C0MB40_D3,CAN0 Mailbox 40 Data byte 3 Register" line.byte 0x04 "C0MB40_D4,CAN0 Mailbox 40 Data byte 4 Register" line.byte 0x05 "C0MB40_D5,CAN0 Mailbox 40 Data byte 5 Register" line.byte 0x06 "C0MB40_D6,CAN0 Mailbox 40 Data byte 6 Register" line.byte 0x07 "C0MB40_D7,CAN0 Mailbox 40 Data byte 7 Register" group.word (0x170+0x0e)++0x01 line.word 0x00 "C0MB40_TS,CAN0 Mailbox 40 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((39.==60.)||(39.==61.)||(39.==62.)||(39.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x180++0x03 hide.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x180))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x180++0x03 line.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x180))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x180++0x03 line.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x180++0x03 hide.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" endif group.word (0x180+0x04)++0x1 line.word 0x00 "C0MB39_DLC,CAN0 Mailbox 39 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x180+0x06)++0x07 line.byte 0x00 "C0MB39_D0,CAN0 Mailbox 39 Data byte 0 Register" line.byte 0x01 "C0MB39_D1,CAN0 Mailbox 39 Data byte 1 Register" line.byte 0x02 "C0MB39_D2,CAN0 Mailbox 39 Data byte 2 Register" line.byte 0x03 "C0MB39_D3,CAN0 Mailbox 39 Data byte 3 Register" line.byte 0x04 "C0MB39_D4,CAN0 Mailbox 39 Data byte 4 Register" line.byte 0x05 "C0MB39_D5,CAN0 Mailbox 39 Data byte 5 Register" line.byte 0x06 "C0MB39_D6,CAN0 Mailbox 39 Data byte 6 Register" line.byte 0x07 "C0MB39_D7,CAN0 Mailbox 39 Data byte 7 Register" group.word (0x180+0x0e)++0x01 line.word 0x00 "C0MB39_TS,CAN0 Mailbox 39 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((38.==60.)||(38.==61.)||(38.==62.)||(38.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x190++0x03 hide.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x190))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x190++0x03 line.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x190))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x190++0x03 line.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x190++0x03 hide.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" endif group.word (0x190+0x04)++0x1 line.word 0x00 "C0MB38_DLC,CAN0 Mailbox 38 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x190+0x06)++0x07 line.byte 0x00 "C0MB38_D0,CAN0 Mailbox 38 Data byte 0 Register" line.byte 0x01 "C0MB38_D1,CAN0 Mailbox 38 Data byte 1 Register" line.byte 0x02 "C0MB38_D2,CAN0 Mailbox 38 Data byte 2 Register" line.byte 0x03 "C0MB38_D3,CAN0 Mailbox 38 Data byte 3 Register" line.byte 0x04 "C0MB38_D4,CAN0 Mailbox 38 Data byte 4 Register" line.byte 0x05 "C0MB38_D5,CAN0 Mailbox 38 Data byte 5 Register" line.byte 0x06 "C0MB38_D6,CAN0 Mailbox 38 Data byte 6 Register" line.byte 0x07 "C0MB38_D7,CAN0 Mailbox 38 Data byte 7 Register" group.word (0x190+0x0e)++0x01 line.word 0x00 "C0MB38_TS,CAN0 Mailbox 38 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((37.==60.)||(37.==61.)||(37.==62.)||(37.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1A0++0x03 hide.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1A0++0x03 line.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1A0++0x03 line.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1A0++0x03 hide.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" endif group.word (0x1A0+0x04)++0x1 line.word 0x00 "C0MB37_DLC,CAN0 Mailbox 37 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1A0+0x06)++0x07 line.byte 0x00 "C0MB37_D0,CAN0 Mailbox 37 Data byte 0 Register" line.byte 0x01 "C0MB37_D1,CAN0 Mailbox 37 Data byte 1 Register" line.byte 0x02 "C0MB37_D2,CAN0 Mailbox 37 Data byte 2 Register" line.byte 0x03 "C0MB37_D3,CAN0 Mailbox 37 Data byte 3 Register" line.byte 0x04 "C0MB37_D4,CAN0 Mailbox 37 Data byte 4 Register" line.byte 0x05 "C0MB37_D5,CAN0 Mailbox 37 Data byte 5 Register" line.byte 0x06 "C0MB37_D6,CAN0 Mailbox 37 Data byte 6 Register" line.byte 0x07 "C0MB37_D7,CAN0 Mailbox 37 Data byte 7 Register" group.word (0x1A0+0x0e)++0x01 line.word 0x00 "C0MB37_TS,CAN0 Mailbox 37 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((36.==60.)||(36.==61.)||(36.==62.)||(36.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1B0++0x03 hide.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1B0++0x03 line.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1B0++0x03 line.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1B0++0x03 hide.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" endif group.word (0x1B0+0x04)++0x1 line.word 0x00 "C0MB36_DLC,CAN0 Mailbox 36 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1B0+0x06)++0x07 line.byte 0x00 "C0MB36_D0,CAN0 Mailbox 36 Data byte 0 Register" line.byte 0x01 "C0MB36_D1,CAN0 Mailbox 36 Data byte 1 Register" line.byte 0x02 "C0MB36_D2,CAN0 Mailbox 36 Data byte 2 Register" line.byte 0x03 "C0MB36_D3,CAN0 Mailbox 36 Data byte 3 Register" line.byte 0x04 "C0MB36_D4,CAN0 Mailbox 36 Data byte 4 Register" line.byte 0x05 "C0MB36_D5,CAN0 Mailbox 36 Data byte 5 Register" line.byte 0x06 "C0MB36_D6,CAN0 Mailbox 36 Data byte 6 Register" line.byte 0x07 "C0MB36_D7,CAN0 Mailbox 36 Data byte 7 Register" group.word (0x1B0+0x0e)++0x01 line.word 0x00 "C0MB36_TS,CAN0 Mailbox 36 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((35.==60.)||(35.==61.)||(35.==62.)||(35.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1C0++0x03 hide.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1C0++0x03 line.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1C0++0x03 line.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1C0++0x03 hide.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" endif group.word (0x1C0+0x04)++0x1 line.word 0x00 "C0MB35_DLC,CAN0 Mailbox 35 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1C0+0x06)++0x07 line.byte 0x00 "C0MB35_D0,CAN0 Mailbox 35 Data byte 0 Register" line.byte 0x01 "C0MB35_D1,CAN0 Mailbox 35 Data byte 1 Register" line.byte 0x02 "C0MB35_D2,CAN0 Mailbox 35 Data byte 2 Register" line.byte 0x03 "C0MB35_D3,CAN0 Mailbox 35 Data byte 3 Register" line.byte 0x04 "C0MB35_D4,CAN0 Mailbox 35 Data byte 4 Register" line.byte 0x05 "C0MB35_D5,CAN0 Mailbox 35 Data byte 5 Register" line.byte 0x06 "C0MB35_D6,CAN0 Mailbox 35 Data byte 6 Register" line.byte 0x07 "C0MB35_D7,CAN0 Mailbox 35 Data byte 7 Register" group.word (0x1C0+0x0e)++0x01 line.word 0x00 "C0MB35_TS,CAN0 Mailbox 35 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((34.==60.)||(34.==61.)||(34.==62.)||(34.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1D0++0x03 hide.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1D0++0x03 line.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1D0++0x03 line.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1D0++0x03 hide.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" endif group.word (0x1D0+0x04)++0x1 line.word 0x00 "C0MB34_DLC,CAN0 Mailbox 34 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1D0+0x06)++0x07 line.byte 0x00 "C0MB34_D0,CAN0 Mailbox 34 Data byte 0 Register" line.byte 0x01 "C0MB34_D1,CAN0 Mailbox 34 Data byte 1 Register" line.byte 0x02 "C0MB34_D2,CAN0 Mailbox 34 Data byte 2 Register" line.byte 0x03 "C0MB34_D3,CAN0 Mailbox 34 Data byte 3 Register" line.byte 0x04 "C0MB34_D4,CAN0 Mailbox 34 Data byte 4 Register" line.byte 0x05 "C0MB34_D5,CAN0 Mailbox 34 Data byte 5 Register" line.byte 0x06 "C0MB34_D6,CAN0 Mailbox 34 Data byte 6 Register" line.byte 0x07 "C0MB34_D7,CAN0 Mailbox 34 Data byte 7 Register" group.word (0x1D0+0x0e)++0x01 line.word 0x00 "C0MB34_TS,CAN0 Mailbox 34 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((33.==60.)||(33.==61.)||(33.==62.)||(33.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1E0++0x03 hide.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1E0++0x03 line.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1E0++0x03 line.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1E0++0x03 hide.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" endif group.word (0x1E0+0x04)++0x1 line.word 0x00 "C0MB33_DLC,CAN0 Mailbox 33 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1E0+0x06)++0x07 line.byte 0x00 "C0MB33_D0,CAN0 Mailbox 33 Data byte 0 Register" line.byte 0x01 "C0MB33_D1,CAN0 Mailbox 33 Data byte 1 Register" line.byte 0x02 "C0MB33_D2,CAN0 Mailbox 33 Data byte 2 Register" line.byte 0x03 "C0MB33_D3,CAN0 Mailbox 33 Data byte 3 Register" line.byte 0x04 "C0MB33_D4,CAN0 Mailbox 33 Data byte 4 Register" line.byte 0x05 "C0MB33_D5,CAN0 Mailbox 33 Data byte 5 Register" line.byte 0x06 "C0MB33_D6,CAN0 Mailbox 33 Data byte 6 Register" line.byte 0x07 "C0MB33_D7,CAN0 Mailbox 33 Data byte 7 Register" group.word (0x1E0+0x0e)++0x01 line.word 0x00 "C0MB33_TS,CAN0 Mailbox 33 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((32.==60.)||(32.==61.)||(32.==62.)||(32.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1F0++0x03 hide.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1F0++0x03 line.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1F0++0x03 line.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1F0++0x03 hide.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" endif group.word (0x1F0+0x04)++0x1 line.word 0x00 "C0MB32_DLC,CAN0 Mailbox 32 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1F0+0x06)++0x07 line.byte 0x00 "C0MB32_D0,CAN0 Mailbox 32 Data byte 0 Register" line.byte 0x01 "C0MB32_D1,CAN0 Mailbox 32 Data byte 1 Register" line.byte 0x02 "C0MB32_D2,CAN0 Mailbox 32 Data byte 2 Register" line.byte 0x03 "C0MB32_D3,CAN0 Mailbox 32 Data byte 3 Register" line.byte 0x04 "C0MB32_D4,CAN0 Mailbox 32 Data byte 4 Register" line.byte 0x05 "C0MB32_D5,CAN0 Mailbox 32 Data byte 5 Register" line.byte 0x06 "C0MB32_D6,CAN0 Mailbox 32 Data byte 6 Register" line.byte 0x07 "C0MB32_D7,CAN0 Mailbox 32 Data byte 7 Register" group.word (0x1F0+0x0e)++0x01 line.word 0x00 "C0MB32_TS,CAN0 Mailbox 32 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((31.==60.)||(31.==61.)||(31.==62.)||(31.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x200++0x03 hide.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x200))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x200++0x03 line.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x200))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x200++0x03 line.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x200++0x03 hide.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" endif group.word (0x200+0x04)++0x1 line.word 0x00 "C0MB31_DLC,CAN0 Mailbox 31 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "C0MB31_D0,CAN0 Mailbox 31 Data byte 0 Register" line.byte 0x01 "C0MB31_D1,CAN0 Mailbox 31 Data byte 1 Register" line.byte 0x02 "C0MB31_D2,CAN0 Mailbox 31 Data byte 2 Register" line.byte 0x03 "C0MB31_D3,CAN0 Mailbox 31 Data byte 3 Register" line.byte 0x04 "C0MB31_D4,CAN0 Mailbox 31 Data byte 4 Register" line.byte 0x05 "C0MB31_D5,CAN0 Mailbox 31 Data byte 5 Register" line.byte 0x06 "C0MB31_D6,CAN0 Mailbox 31 Data byte 6 Register" line.byte 0x07 "C0MB31_D7,CAN0 Mailbox 31 Data byte 7 Register" group.word (0x200+0x0e)++0x01 line.word 0x00 "C0MB31_TS,CAN0 Mailbox 31 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((30.==60.)||(30.==61.)||(30.==62.)||(30.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x210++0x03 hide.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x210))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x210++0x03 line.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x210))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x210++0x03 line.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x210++0x03 hide.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" endif group.word (0x210+0x04)++0x1 line.word 0x00 "C0MB30_DLC,CAN0 Mailbox 30 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "C0MB30_D0,CAN0 Mailbox 30 Data byte 0 Register" line.byte 0x01 "C0MB30_D1,CAN0 Mailbox 30 Data byte 1 Register" line.byte 0x02 "C0MB30_D2,CAN0 Mailbox 30 Data byte 2 Register" line.byte 0x03 "C0MB30_D3,CAN0 Mailbox 30 Data byte 3 Register" line.byte 0x04 "C0MB30_D4,CAN0 Mailbox 30 Data byte 4 Register" line.byte 0x05 "C0MB30_D5,CAN0 Mailbox 30 Data byte 5 Register" line.byte 0x06 "C0MB30_D6,CAN0 Mailbox 30 Data byte 6 Register" line.byte 0x07 "C0MB30_D7,CAN0 Mailbox 30 Data byte 7 Register" group.word (0x210+0x0e)++0x01 line.word 0x00 "C0MB30_TS,CAN0 Mailbox 30 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((29.==60.)||(29.==61.)||(29.==62.)||(29.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x220++0x03 hide.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x220))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x220++0x03 line.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x220))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x220++0x03 line.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x220++0x03 hide.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" endif group.word (0x220+0x04)++0x1 line.word 0x00 "C0MB29_DLC,CAN0 Mailbox 29 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "C0MB29_D0,CAN0 Mailbox 29 Data byte 0 Register" line.byte 0x01 "C0MB29_D1,CAN0 Mailbox 29 Data byte 1 Register" line.byte 0x02 "C0MB29_D2,CAN0 Mailbox 29 Data byte 2 Register" line.byte 0x03 "C0MB29_D3,CAN0 Mailbox 29 Data byte 3 Register" line.byte 0x04 "C0MB29_D4,CAN0 Mailbox 29 Data byte 4 Register" line.byte 0x05 "C0MB29_D5,CAN0 Mailbox 29 Data byte 5 Register" line.byte 0x06 "C0MB29_D6,CAN0 Mailbox 29 Data byte 6 Register" line.byte 0x07 "C0MB29_D7,CAN0 Mailbox 29 Data byte 7 Register" group.word (0x220+0x0e)++0x01 line.word 0x00 "C0MB29_TS,CAN0 Mailbox 29 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((28.==60.)||(28.==61.)||(28.==62.)||(28.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x230++0x03 hide.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x230))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x230++0x03 line.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x230))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x230++0x03 line.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x230++0x03 hide.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" endif group.word (0x230+0x04)++0x1 line.word 0x00 "C0MB28_DLC,CAN0 Mailbox 28 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "C0MB28_D0,CAN0 Mailbox 28 Data byte 0 Register" line.byte 0x01 "C0MB28_D1,CAN0 Mailbox 28 Data byte 1 Register" line.byte 0x02 "C0MB28_D2,CAN0 Mailbox 28 Data byte 2 Register" line.byte 0x03 "C0MB28_D3,CAN0 Mailbox 28 Data byte 3 Register" line.byte 0x04 "C0MB28_D4,CAN0 Mailbox 28 Data byte 4 Register" line.byte 0x05 "C0MB28_D5,CAN0 Mailbox 28 Data byte 5 Register" line.byte 0x06 "C0MB28_D6,CAN0 Mailbox 28 Data byte 6 Register" line.byte 0x07 "C0MB28_D7,CAN0 Mailbox 28 Data byte 7 Register" group.word (0x230+0x0e)++0x01 line.word 0x00 "C0MB28_TS,CAN0 Mailbox 28 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((27.==60.)||(27.==61.)||(27.==62.)||(27.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x240++0x03 hide.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x240))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x240++0x03 line.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x240))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x240++0x03 line.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x240++0x03 hide.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" endif group.word (0x240+0x04)++0x1 line.word 0x00 "C0MB27_DLC,CAN0 Mailbox 27 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "C0MB27_D0,CAN0 Mailbox 27 Data byte 0 Register" line.byte 0x01 "C0MB27_D1,CAN0 Mailbox 27 Data byte 1 Register" line.byte 0x02 "C0MB27_D2,CAN0 Mailbox 27 Data byte 2 Register" line.byte 0x03 "C0MB27_D3,CAN0 Mailbox 27 Data byte 3 Register" line.byte 0x04 "C0MB27_D4,CAN0 Mailbox 27 Data byte 4 Register" line.byte 0x05 "C0MB27_D5,CAN0 Mailbox 27 Data byte 5 Register" line.byte 0x06 "C0MB27_D6,CAN0 Mailbox 27 Data byte 6 Register" line.byte 0x07 "C0MB27_D7,CAN0 Mailbox 27 Data byte 7 Register" group.word (0x240+0x0e)++0x01 line.word 0x00 "C0MB27_TS,CAN0 Mailbox 27 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((26.==60.)||(26.==61.)||(26.==62.)||(26.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x250++0x03 hide.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x250))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x250++0x03 line.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x250))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x250++0x03 line.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x250++0x03 hide.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" endif group.word (0x250+0x04)++0x1 line.word 0x00 "C0MB26_DLC,CAN0 Mailbox 26 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "C0MB26_D0,CAN0 Mailbox 26 Data byte 0 Register" line.byte 0x01 "C0MB26_D1,CAN0 Mailbox 26 Data byte 1 Register" line.byte 0x02 "C0MB26_D2,CAN0 Mailbox 26 Data byte 2 Register" line.byte 0x03 "C0MB26_D3,CAN0 Mailbox 26 Data byte 3 Register" line.byte 0x04 "C0MB26_D4,CAN0 Mailbox 26 Data byte 4 Register" line.byte 0x05 "C0MB26_D5,CAN0 Mailbox 26 Data byte 5 Register" line.byte 0x06 "C0MB26_D6,CAN0 Mailbox 26 Data byte 6 Register" line.byte 0x07 "C0MB26_D7,CAN0 Mailbox 26 Data byte 7 Register" group.word (0x250+0x0e)++0x01 line.word 0x00 "C0MB26_TS,CAN0 Mailbox 26 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((25.==60.)||(25.==61.)||(25.==62.)||(25.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x260++0x03 hide.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x260))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x260++0x03 line.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x260))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x260++0x03 line.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x260++0x03 hide.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" endif group.word (0x260+0x04)++0x1 line.word 0x00 "C0MB25_DLC,CAN0 Mailbox 25 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "C0MB25_D0,CAN0 Mailbox 25 Data byte 0 Register" line.byte 0x01 "C0MB25_D1,CAN0 Mailbox 25 Data byte 1 Register" line.byte 0x02 "C0MB25_D2,CAN0 Mailbox 25 Data byte 2 Register" line.byte 0x03 "C0MB25_D3,CAN0 Mailbox 25 Data byte 3 Register" line.byte 0x04 "C0MB25_D4,CAN0 Mailbox 25 Data byte 4 Register" line.byte 0x05 "C0MB25_D5,CAN0 Mailbox 25 Data byte 5 Register" line.byte 0x06 "C0MB25_D6,CAN0 Mailbox 25 Data byte 6 Register" line.byte 0x07 "C0MB25_D7,CAN0 Mailbox 25 Data byte 7 Register" group.word (0x260+0x0e)++0x01 line.word 0x00 "C0MB25_TS,CAN0 Mailbox 25 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((24.==60.)||(24.==61.)||(24.==62.)||(24.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x270++0x03 hide.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x270))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x270++0x03 line.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x270))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x270++0x03 line.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x270++0x03 hide.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" endif group.word (0x270+0x04)++0x1 line.word 0x00 "C0MB24_DLC,CAN0 Mailbox 24 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "C0MB24_D0,CAN0 Mailbox 24 Data byte 0 Register" line.byte 0x01 "C0MB24_D1,CAN0 Mailbox 24 Data byte 1 Register" line.byte 0x02 "C0MB24_D2,CAN0 Mailbox 24 Data byte 2 Register" line.byte 0x03 "C0MB24_D3,CAN0 Mailbox 24 Data byte 3 Register" line.byte 0x04 "C0MB24_D4,CAN0 Mailbox 24 Data byte 4 Register" line.byte 0x05 "C0MB24_D5,CAN0 Mailbox 24 Data byte 5 Register" line.byte 0x06 "C0MB24_D6,CAN0 Mailbox 24 Data byte 6 Register" line.byte 0x07 "C0MB24_D7,CAN0 Mailbox 24 Data byte 7 Register" group.word (0x270+0x0e)++0x01 line.word 0x00 "C0MB24_TS,CAN0 Mailbox 24 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((23.==60.)||(23.==61.)||(23.==62.)||(23.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x280++0x03 hide.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x280))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x280++0x03 line.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x280))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x280++0x03 line.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x280++0x03 hide.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" endif group.word (0x280+0x04)++0x1 line.word 0x00 "C0MB23_DLC,CAN0 Mailbox 23 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "C0MB23_D0,CAN0 Mailbox 23 Data byte 0 Register" line.byte 0x01 "C0MB23_D1,CAN0 Mailbox 23 Data byte 1 Register" line.byte 0x02 "C0MB23_D2,CAN0 Mailbox 23 Data byte 2 Register" line.byte 0x03 "C0MB23_D3,CAN0 Mailbox 23 Data byte 3 Register" line.byte 0x04 "C0MB23_D4,CAN0 Mailbox 23 Data byte 4 Register" line.byte 0x05 "C0MB23_D5,CAN0 Mailbox 23 Data byte 5 Register" line.byte 0x06 "C0MB23_D6,CAN0 Mailbox 23 Data byte 6 Register" line.byte 0x07 "C0MB23_D7,CAN0 Mailbox 23 Data byte 7 Register" group.word (0x280+0x0e)++0x01 line.word 0x00 "C0MB23_TS,CAN0 Mailbox 23 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((22.==60.)||(22.==61.)||(22.==62.)||(22.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x290++0x03 hide.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x290))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x290++0x03 line.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x290))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x290++0x03 line.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x290++0x03 hide.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" endif group.word (0x290+0x04)++0x1 line.word 0x00 "C0MB22_DLC,CAN0 Mailbox 22 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "C0MB22_D0,CAN0 Mailbox 22 Data byte 0 Register" line.byte 0x01 "C0MB22_D1,CAN0 Mailbox 22 Data byte 1 Register" line.byte 0x02 "C0MB22_D2,CAN0 Mailbox 22 Data byte 2 Register" line.byte 0x03 "C0MB22_D3,CAN0 Mailbox 22 Data byte 3 Register" line.byte 0x04 "C0MB22_D4,CAN0 Mailbox 22 Data byte 4 Register" line.byte 0x05 "C0MB22_D5,CAN0 Mailbox 22 Data byte 5 Register" line.byte 0x06 "C0MB22_D6,CAN0 Mailbox 22 Data byte 6 Register" line.byte 0x07 "C0MB22_D7,CAN0 Mailbox 22 Data byte 7 Register" group.word (0x290+0x0e)++0x01 line.word 0x00 "C0MB22_TS,CAN0 Mailbox 22 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((21.==60.)||(21.==61.)||(21.==62.)||(21.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2A0++0x03 hide.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2A0++0x03 line.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2A0++0x03 line.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2A0++0x03 hide.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" endif group.word (0x2A0+0x04)++0x1 line.word 0x00 "C0MB21_DLC,CAN0 Mailbox 21 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "C0MB21_D0,CAN0 Mailbox 21 Data byte 0 Register" line.byte 0x01 "C0MB21_D1,CAN0 Mailbox 21 Data byte 1 Register" line.byte 0x02 "C0MB21_D2,CAN0 Mailbox 21 Data byte 2 Register" line.byte 0x03 "C0MB21_D3,CAN0 Mailbox 21 Data byte 3 Register" line.byte 0x04 "C0MB21_D4,CAN0 Mailbox 21 Data byte 4 Register" line.byte 0x05 "C0MB21_D5,CAN0 Mailbox 21 Data byte 5 Register" line.byte 0x06 "C0MB21_D6,CAN0 Mailbox 21 Data byte 6 Register" line.byte 0x07 "C0MB21_D7,CAN0 Mailbox 21 Data byte 7 Register" group.word (0x2A0+0x0e)++0x01 line.word 0x00 "C0MB21_TS,CAN0 Mailbox 21 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((20.==60.)||(20.==61.)||(20.==62.)||(20.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2B0++0x03 hide.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2B0++0x03 line.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2B0++0x03 line.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2B0++0x03 hide.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" endif group.word (0x2B0+0x04)++0x1 line.word 0x00 "C0MB20_DLC,CAN0 Mailbox 20 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "C0MB20_D0,CAN0 Mailbox 20 Data byte 0 Register" line.byte 0x01 "C0MB20_D1,CAN0 Mailbox 20 Data byte 1 Register" line.byte 0x02 "C0MB20_D2,CAN0 Mailbox 20 Data byte 2 Register" line.byte 0x03 "C0MB20_D3,CAN0 Mailbox 20 Data byte 3 Register" line.byte 0x04 "C0MB20_D4,CAN0 Mailbox 20 Data byte 4 Register" line.byte 0x05 "C0MB20_D5,CAN0 Mailbox 20 Data byte 5 Register" line.byte 0x06 "C0MB20_D6,CAN0 Mailbox 20 Data byte 6 Register" line.byte 0x07 "C0MB20_D7,CAN0 Mailbox 20 Data byte 7 Register" group.word (0x2B0+0x0e)++0x01 line.word 0x00 "C0MB20_TS,CAN0 Mailbox 20 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((19.==60.)||(19.==61.)||(19.==62.)||(19.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2C0++0x03 hide.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2C0++0x03 line.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2C0++0x03 line.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2C0++0x03 hide.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" endif group.word (0x2C0+0x04)++0x1 line.word 0x00 "C0MB19_DLC,CAN0 Mailbox 19 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "C0MB19_D0,CAN0 Mailbox 19 Data byte 0 Register" line.byte 0x01 "C0MB19_D1,CAN0 Mailbox 19 Data byte 1 Register" line.byte 0x02 "C0MB19_D2,CAN0 Mailbox 19 Data byte 2 Register" line.byte 0x03 "C0MB19_D3,CAN0 Mailbox 19 Data byte 3 Register" line.byte 0x04 "C0MB19_D4,CAN0 Mailbox 19 Data byte 4 Register" line.byte 0x05 "C0MB19_D5,CAN0 Mailbox 19 Data byte 5 Register" line.byte 0x06 "C0MB19_D6,CAN0 Mailbox 19 Data byte 6 Register" line.byte 0x07 "C0MB19_D7,CAN0 Mailbox 19 Data byte 7 Register" group.word (0x2C0+0x0e)++0x01 line.word 0x00 "C0MB19_TS,CAN0 Mailbox 19 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((18.==60.)||(18.==61.)||(18.==62.)||(18.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2D0++0x03 hide.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2D0++0x03 line.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2D0++0x03 line.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2D0++0x03 hide.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" endif group.word (0x2D0+0x04)++0x1 line.word 0x00 "C0MB18_DLC,CAN0 Mailbox 18 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "C0MB18_D0,CAN0 Mailbox 18 Data byte 0 Register" line.byte 0x01 "C0MB18_D1,CAN0 Mailbox 18 Data byte 1 Register" line.byte 0x02 "C0MB18_D2,CAN0 Mailbox 18 Data byte 2 Register" line.byte 0x03 "C0MB18_D3,CAN0 Mailbox 18 Data byte 3 Register" line.byte 0x04 "C0MB18_D4,CAN0 Mailbox 18 Data byte 4 Register" line.byte 0x05 "C0MB18_D5,CAN0 Mailbox 18 Data byte 5 Register" line.byte 0x06 "C0MB18_D6,CAN0 Mailbox 18 Data byte 6 Register" line.byte 0x07 "C0MB18_D7,CAN0 Mailbox 18 Data byte 7 Register" group.word (0x2D0+0x0e)++0x01 line.word 0x00 "C0MB18_TS,CAN0 Mailbox 18 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((17.==60.)||(17.==61.)||(17.==62.)||(17.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2E0++0x03 hide.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2E0++0x03 line.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2E0++0x03 line.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2E0++0x03 hide.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" endif group.word (0x2E0+0x04)++0x1 line.word 0x00 "C0MB17_DLC,CAN0 Mailbox 17 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "C0MB17_D0,CAN0 Mailbox 17 Data byte 0 Register" line.byte 0x01 "C0MB17_D1,CAN0 Mailbox 17 Data byte 1 Register" line.byte 0x02 "C0MB17_D2,CAN0 Mailbox 17 Data byte 2 Register" line.byte 0x03 "C0MB17_D3,CAN0 Mailbox 17 Data byte 3 Register" line.byte 0x04 "C0MB17_D4,CAN0 Mailbox 17 Data byte 4 Register" line.byte 0x05 "C0MB17_D5,CAN0 Mailbox 17 Data byte 5 Register" line.byte 0x06 "C0MB17_D6,CAN0 Mailbox 17 Data byte 6 Register" line.byte 0x07 "C0MB17_D7,CAN0 Mailbox 17 Data byte 7 Register" group.word (0x2E0+0x0e)++0x01 line.word 0x00 "C0MB17_TS,CAN0 Mailbox 17 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((16.==60.)||(16.==61.)||(16.==62.)||(16.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2F0++0x03 hide.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2F0++0x03 line.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2F0++0x03 line.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2F0++0x03 hide.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" endif group.word (0x2F0+0x04)++0x1 line.word 0x00 "C0MB16_DLC,CAN0 Mailbox 16 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "C0MB16_D0,CAN0 Mailbox 16 Data byte 0 Register" line.byte 0x01 "C0MB16_D1,CAN0 Mailbox 16 Data byte 1 Register" line.byte 0x02 "C0MB16_D2,CAN0 Mailbox 16 Data byte 2 Register" line.byte 0x03 "C0MB16_D3,CAN0 Mailbox 16 Data byte 3 Register" line.byte 0x04 "C0MB16_D4,CAN0 Mailbox 16 Data byte 4 Register" line.byte 0x05 "C0MB16_D5,CAN0 Mailbox 16 Data byte 5 Register" line.byte 0x06 "C0MB16_D6,CAN0 Mailbox 16 Data byte 6 Register" line.byte 0x07 "C0MB16_D7,CAN0 Mailbox 16 Data byte 7 Register" group.word (0x2F0+0x0e)++0x01 line.word 0x00 "C0MB16_TS,CAN0 Mailbox 16 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((15.==60.)||(15.==61.)||(15.==62.)||(15.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x300++0x03 hide.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x300))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x300++0x03 line.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x300))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x300++0x03 line.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x300++0x03 hide.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" endif group.word (0x300+0x04)++0x1 line.word 0x00 "C0MB15_DLC,CAN0 Mailbox 15 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "C0MB15_D0,CAN0 Mailbox 15 Data byte 0 Register" line.byte 0x01 "C0MB15_D1,CAN0 Mailbox 15 Data byte 1 Register" line.byte 0x02 "C0MB15_D2,CAN0 Mailbox 15 Data byte 2 Register" line.byte 0x03 "C0MB15_D3,CAN0 Mailbox 15 Data byte 3 Register" line.byte 0x04 "C0MB15_D4,CAN0 Mailbox 15 Data byte 4 Register" line.byte 0x05 "C0MB15_D5,CAN0 Mailbox 15 Data byte 5 Register" line.byte 0x06 "C0MB15_D6,CAN0 Mailbox 15 Data byte 6 Register" line.byte 0x07 "C0MB15_D7,CAN0 Mailbox 15 Data byte 7 Register" group.word (0x300+0x0e)++0x01 line.word 0x00 "C0MB15_TS,CAN0 Mailbox 15 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((14.==60.)||(14.==61.)||(14.==62.)||(14.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x310++0x03 hide.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x310))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x310++0x03 line.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x310))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x310++0x03 line.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x310++0x03 hide.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" endif group.word (0x310+0x04)++0x1 line.word 0x00 "C0MB14_DLC,CAN0 Mailbox 14 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "C0MB14_D0,CAN0 Mailbox 14 Data byte 0 Register" line.byte 0x01 "C0MB14_D1,CAN0 Mailbox 14 Data byte 1 Register" line.byte 0x02 "C0MB14_D2,CAN0 Mailbox 14 Data byte 2 Register" line.byte 0x03 "C0MB14_D3,CAN0 Mailbox 14 Data byte 3 Register" line.byte 0x04 "C0MB14_D4,CAN0 Mailbox 14 Data byte 4 Register" line.byte 0x05 "C0MB14_D5,CAN0 Mailbox 14 Data byte 5 Register" line.byte 0x06 "C0MB14_D6,CAN0 Mailbox 14 Data byte 6 Register" line.byte 0x07 "C0MB14_D7,CAN0 Mailbox 14 Data byte 7 Register" group.word (0x310+0x0e)++0x01 line.word 0x00 "C0MB14_TS,CAN0 Mailbox 14 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((13.==60.)||(13.==61.)||(13.==62.)||(13.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x320++0x03 hide.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x320))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x320++0x03 line.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x320))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x320++0x03 line.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x320++0x03 hide.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" endif group.word (0x320+0x04)++0x1 line.word 0x00 "C0MB13_DLC,CAN0 Mailbox 13 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "C0MB13_D0,CAN0 Mailbox 13 Data byte 0 Register" line.byte 0x01 "C0MB13_D1,CAN0 Mailbox 13 Data byte 1 Register" line.byte 0x02 "C0MB13_D2,CAN0 Mailbox 13 Data byte 2 Register" line.byte 0x03 "C0MB13_D3,CAN0 Mailbox 13 Data byte 3 Register" line.byte 0x04 "C0MB13_D4,CAN0 Mailbox 13 Data byte 4 Register" line.byte 0x05 "C0MB13_D5,CAN0 Mailbox 13 Data byte 5 Register" line.byte 0x06 "C0MB13_D6,CAN0 Mailbox 13 Data byte 6 Register" line.byte 0x07 "C0MB13_D7,CAN0 Mailbox 13 Data byte 7 Register" group.word (0x320+0x0e)++0x01 line.word 0x00 "C0MB13_TS,CAN0 Mailbox 13 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((12.==60.)||(12.==61.)||(12.==62.)||(12.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x330++0x03 hide.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x330))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x330++0x03 line.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x330))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x330++0x03 line.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x330++0x03 hide.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" endif group.word (0x330+0x04)++0x1 line.word 0x00 "C0MB12_DLC,CAN0 Mailbox 12 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "C0MB12_D0,CAN0 Mailbox 12 Data byte 0 Register" line.byte 0x01 "C0MB12_D1,CAN0 Mailbox 12 Data byte 1 Register" line.byte 0x02 "C0MB12_D2,CAN0 Mailbox 12 Data byte 2 Register" line.byte 0x03 "C0MB12_D3,CAN0 Mailbox 12 Data byte 3 Register" line.byte 0x04 "C0MB12_D4,CAN0 Mailbox 12 Data byte 4 Register" line.byte 0x05 "C0MB12_D5,CAN0 Mailbox 12 Data byte 5 Register" line.byte 0x06 "C0MB12_D6,CAN0 Mailbox 12 Data byte 6 Register" line.byte 0x07 "C0MB12_D7,CAN0 Mailbox 12 Data byte 7 Register" group.word (0x330+0x0e)++0x01 line.word 0x00 "C0MB12_TS,CAN0 Mailbox 12 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((11.==60.)||(11.==61.)||(11.==62.)||(11.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x340++0x03 hide.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x340))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x340++0x03 line.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x340))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x340++0x03 line.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x340++0x03 hide.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" endif group.word (0x340+0x04)++0x1 line.word 0x00 "C0MB11_DLC,CAN0 Mailbox 11 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "C0MB11_D0,CAN0 Mailbox 11 Data byte 0 Register" line.byte 0x01 "C0MB11_D1,CAN0 Mailbox 11 Data byte 1 Register" line.byte 0x02 "C0MB11_D2,CAN0 Mailbox 11 Data byte 2 Register" line.byte 0x03 "C0MB11_D3,CAN0 Mailbox 11 Data byte 3 Register" line.byte 0x04 "C0MB11_D4,CAN0 Mailbox 11 Data byte 4 Register" line.byte 0x05 "C0MB11_D5,CAN0 Mailbox 11 Data byte 5 Register" line.byte 0x06 "C0MB11_D6,CAN0 Mailbox 11 Data byte 6 Register" line.byte 0x07 "C0MB11_D7,CAN0 Mailbox 11 Data byte 7 Register" group.word (0x340+0x0e)++0x01 line.word 0x00 "C0MB11_TS,CAN0 Mailbox 11 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((10.==60.)||(10.==61.)||(10.==62.)||(10.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x350++0x03 hide.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x350))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x350++0x03 line.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x350))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x350++0x03 line.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x350++0x03 hide.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" endif group.word (0x350+0x04)++0x1 line.word 0x00 "C0MB10_DLC,CAN0 Mailbox 10 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "C0MB10_D0,CAN0 Mailbox 10 Data byte 0 Register" line.byte 0x01 "C0MB10_D1,CAN0 Mailbox 10 Data byte 1 Register" line.byte 0x02 "C0MB10_D2,CAN0 Mailbox 10 Data byte 2 Register" line.byte 0x03 "C0MB10_D3,CAN0 Mailbox 10 Data byte 3 Register" line.byte 0x04 "C0MB10_D4,CAN0 Mailbox 10 Data byte 4 Register" line.byte 0x05 "C0MB10_D5,CAN0 Mailbox 10 Data byte 5 Register" line.byte 0x06 "C0MB10_D6,CAN0 Mailbox 10 Data byte 6 Register" line.byte 0x07 "C0MB10_D7,CAN0 Mailbox 10 Data byte 7 Register" group.word (0x350+0x0e)++0x01 line.word 0x00 "C0MB10_TS,CAN0 Mailbox 10 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((9.==60.)||(9.==61.)||(9.==62.)||(9.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x360++0x03 hide.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x360))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x360++0x03 line.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x360))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x360++0x03 line.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x360++0x03 hide.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" endif group.word (0x360+0x04)++0x1 line.word 0x00 "C0MB9_DLC,CAN0 Mailbox 9 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "C0MB9_D0,CAN0 Mailbox 9 Data byte 0 Register" line.byte 0x01 "C0MB9_D1,CAN0 Mailbox 9 Data byte 1 Register" line.byte 0x02 "C0MB9_D2,CAN0 Mailbox 9 Data byte 2 Register" line.byte 0x03 "C0MB9_D3,CAN0 Mailbox 9 Data byte 3 Register" line.byte 0x04 "C0MB9_D4,CAN0 Mailbox 9 Data byte 4 Register" line.byte 0x05 "C0MB9_D5,CAN0 Mailbox 9 Data byte 5 Register" line.byte 0x06 "C0MB9_D6,CAN0 Mailbox 9 Data byte 6 Register" line.byte 0x07 "C0MB9_D7,CAN0 Mailbox 9 Data byte 7 Register" group.word (0x360+0x0e)++0x01 line.word 0x00 "C0MB9_TS,CAN0 Mailbox 9 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((8.==60.)||(8.==61.)||(8.==62.)||(8.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x370++0x03 hide.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x370))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x370++0x03 line.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x370))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x370++0x03 line.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x370++0x03 hide.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" endif group.word (0x370+0x04)++0x1 line.word 0x00 "C0MB8_DLC,CAN0 Mailbox 8 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "C0MB8_D0,CAN0 Mailbox 8 Data byte 0 Register" line.byte 0x01 "C0MB8_D1,CAN0 Mailbox 8 Data byte 1 Register" line.byte 0x02 "C0MB8_D2,CAN0 Mailbox 8 Data byte 2 Register" line.byte 0x03 "C0MB8_D3,CAN0 Mailbox 8 Data byte 3 Register" line.byte 0x04 "C0MB8_D4,CAN0 Mailbox 8 Data byte 4 Register" line.byte 0x05 "C0MB8_D5,CAN0 Mailbox 8 Data byte 5 Register" line.byte 0x06 "C0MB8_D6,CAN0 Mailbox 8 Data byte 6 Register" line.byte 0x07 "C0MB8_D7,CAN0 Mailbox 8 Data byte 7 Register" group.word (0x370+0x0e)++0x01 line.word 0x00 "C0MB8_TS,CAN0 Mailbox 8 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((7.==60.)||(7.==61.)||(7.==62.)||(7.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x380++0x03 hide.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x380))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x380++0x03 line.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x380))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x380++0x03 line.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x380++0x03 hide.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" endif group.word (0x380+0x04)++0x1 line.word 0x00 "C0MB7_DLC,CAN0 Mailbox 7 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "C0MB7_D0,CAN0 Mailbox 7 Data byte 0 Register" line.byte 0x01 "C0MB7_D1,CAN0 Mailbox 7 Data byte 1 Register" line.byte 0x02 "C0MB7_D2,CAN0 Mailbox 7 Data byte 2 Register" line.byte 0x03 "C0MB7_D3,CAN0 Mailbox 7 Data byte 3 Register" line.byte 0x04 "C0MB7_D4,CAN0 Mailbox 7 Data byte 4 Register" line.byte 0x05 "C0MB7_D5,CAN0 Mailbox 7 Data byte 5 Register" line.byte 0x06 "C0MB7_D6,CAN0 Mailbox 7 Data byte 6 Register" line.byte 0x07 "C0MB7_D7,CAN0 Mailbox 7 Data byte 7 Register" group.word (0x380+0x0e)++0x01 line.word 0x00 "C0MB7_TS,CAN0 Mailbox 7 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((6.==60.)||(6.==61.)||(6.==62.)||(6.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x390++0x03 hide.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x390))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x390++0x03 line.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x390))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x390++0x03 line.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x390++0x03 hide.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" endif group.word (0x390+0x04)++0x1 line.word 0x00 "C0MB6_DLC,CAN0 Mailbox 6 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "C0MB6_D0,CAN0 Mailbox 6 Data byte 0 Register" line.byte 0x01 "C0MB6_D1,CAN0 Mailbox 6 Data byte 1 Register" line.byte 0x02 "C0MB6_D2,CAN0 Mailbox 6 Data byte 2 Register" line.byte 0x03 "C0MB6_D3,CAN0 Mailbox 6 Data byte 3 Register" line.byte 0x04 "C0MB6_D4,CAN0 Mailbox 6 Data byte 4 Register" line.byte 0x05 "C0MB6_D5,CAN0 Mailbox 6 Data byte 5 Register" line.byte 0x06 "C0MB6_D6,CAN0 Mailbox 6 Data byte 6 Register" line.byte 0x07 "C0MB6_D7,CAN0 Mailbox 6 Data byte 7 Register" group.word (0x390+0x0e)++0x01 line.word 0x00 "C0MB6_TS,CAN0 Mailbox 6 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((5.==60.)||(5.==61.)||(5.==62.)||(5.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3A0++0x03 hide.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3A0++0x03 line.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3A0++0x03 line.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3A0++0x03 hide.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" endif group.word (0x3A0+0x04)++0x1 line.word 0x00 "C0MB5_DLC,CAN0 Mailbox 5 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "C0MB5_D0,CAN0 Mailbox 5 Data byte 0 Register" line.byte 0x01 "C0MB5_D1,CAN0 Mailbox 5 Data byte 1 Register" line.byte 0x02 "C0MB5_D2,CAN0 Mailbox 5 Data byte 2 Register" line.byte 0x03 "C0MB5_D3,CAN0 Mailbox 5 Data byte 3 Register" line.byte 0x04 "C0MB5_D4,CAN0 Mailbox 5 Data byte 4 Register" line.byte 0x05 "C0MB5_D5,CAN0 Mailbox 5 Data byte 5 Register" line.byte 0x06 "C0MB5_D6,CAN0 Mailbox 5 Data byte 6 Register" line.byte 0x07 "C0MB5_D7,CAN0 Mailbox 5 Data byte 7 Register" group.word (0x3A0+0x0e)++0x01 line.word 0x00 "C0MB5_TS,CAN0 Mailbox 5 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((4.==60.)||(4.==61.)||(4.==62.)||(4.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3B0++0x03 hide.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3B0++0x03 line.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3B0++0x03 line.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3B0++0x03 hide.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" endif group.word (0x3B0+0x04)++0x1 line.word 0x00 "C0MB4_DLC,CAN0 Mailbox 4 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "C0MB4_D0,CAN0 Mailbox 4 Data byte 0 Register" line.byte 0x01 "C0MB4_D1,CAN0 Mailbox 4 Data byte 1 Register" line.byte 0x02 "C0MB4_D2,CAN0 Mailbox 4 Data byte 2 Register" line.byte 0x03 "C0MB4_D3,CAN0 Mailbox 4 Data byte 3 Register" line.byte 0x04 "C0MB4_D4,CAN0 Mailbox 4 Data byte 4 Register" line.byte 0x05 "C0MB4_D5,CAN0 Mailbox 4 Data byte 5 Register" line.byte 0x06 "C0MB4_D6,CAN0 Mailbox 4 Data byte 6 Register" line.byte 0x07 "C0MB4_D7,CAN0 Mailbox 4 Data byte 7 Register" group.word (0x3B0+0x0e)++0x01 line.word 0x00 "C0MB4_TS,CAN0 Mailbox 4 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((3.==60.)||(3.==61.)||(3.==62.)||(3.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3C0++0x03 hide.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3C0++0x03 line.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3C0++0x03 line.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3C0++0x03 hide.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" endif group.word (0x3C0+0x04)++0x1 line.word 0x00 "C0MB3_DLC,CAN0 Mailbox 3 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "C0MB3_D0,CAN0 Mailbox 3 Data byte 0 Register" line.byte 0x01 "C0MB3_D1,CAN0 Mailbox 3 Data byte 1 Register" line.byte 0x02 "C0MB3_D2,CAN0 Mailbox 3 Data byte 2 Register" line.byte 0x03 "C0MB3_D3,CAN0 Mailbox 3 Data byte 3 Register" line.byte 0x04 "C0MB3_D4,CAN0 Mailbox 3 Data byte 4 Register" line.byte 0x05 "C0MB3_D5,CAN0 Mailbox 3 Data byte 5 Register" line.byte 0x06 "C0MB3_D6,CAN0 Mailbox 3 Data byte 6 Register" line.byte 0x07 "C0MB3_D7,CAN0 Mailbox 3 Data byte 7 Register" group.word (0x3C0+0x0e)++0x01 line.word 0x00 "C0MB3_TS,CAN0 Mailbox 3 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((2.==60.)||(2.==61.)||(2.==62.)||(2.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3D0++0x03 hide.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3D0++0x03 line.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3D0++0x03 line.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3D0++0x03 hide.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" endif group.word (0x3D0+0x04)++0x1 line.word 0x00 "C0MB2_DLC,CAN0 Mailbox 2 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "C0MB2_D0,CAN0 Mailbox 2 Data byte 0 Register" line.byte 0x01 "C0MB2_D1,CAN0 Mailbox 2 Data byte 1 Register" line.byte 0x02 "C0MB2_D2,CAN0 Mailbox 2 Data byte 2 Register" line.byte 0x03 "C0MB2_D3,CAN0 Mailbox 2 Data byte 3 Register" line.byte 0x04 "C0MB2_D4,CAN0 Mailbox 2 Data byte 4 Register" line.byte 0x05 "C0MB2_D5,CAN0 Mailbox 2 Data byte 5 Register" line.byte 0x06 "C0MB2_D6,CAN0 Mailbox 2 Data byte 6 Register" line.byte 0x07 "C0MB2_D7,CAN0 Mailbox 2 Data byte 7 Register" group.word (0x3D0+0x0e)++0x01 line.word 0x00 "C0MB2_TS,CAN0 Mailbox 2 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((1.==60.)||(1.==61.)||(1.==62.)||(1.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3E0++0x03 hide.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3E0++0x03 line.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3E0++0x03 line.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3E0++0x03 hide.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" endif group.word (0x3E0+0x04)++0x1 line.word 0x00 "C0MB1_DLC,CAN0 Mailbox 1 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "C0MB1_D0,CAN0 Mailbox 1 Data byte 0 Register" line.byte 0x01 "C0MB1_D1,CAN0 Mailbox 1 Data byte 1 Register" line.byte 0x02 "C0MB1_D2,CAN0 Mailbox 1 Data byte 2 Register" line.byte 0x03 "C0MB1_D3,CAN0 Mailbox 1 Data byte 3 Register" line.byte 0x04 "C0MB1_D4,CAN0 Mailbox 1 Data byte 4 Register" line.byte 0x05 "C0MB1_D5,CAN0 Mailbox 1 Data byte 5 Register" line.byte 0x06 "C0MB1_D6,CAN0 Mailbox 1 Data byte 6 Register" line.byte 0x07 "C0MB1_D7,CAN0 Mailbox 1 Data byte 7 Register" group.word (0x3E0+0x0e)++0x01 line.word 0x00 "C0MB1_TS,CAN0 Mailbox 1 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((0.==60.)||(0.==61.)||(0.==62.)||(0.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3F0++0x03 hide.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3F0++0x03 line.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3F0++0x03 line.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3F0++0x03 hide.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" endif group.word (0x3F0+0x04)++0x1 line.word 0x00 "C0MB0_DLC,CAN0 Mailbox 0 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "C0MB0_D0,CAN0 Mailbox 0 Data byte 0 Register" line.byte 0x01 "C0MB0_D1,CAN0 Mailbox 0 Data byte 1 Register" line.byte 0x02 "C0MB0_D2,CAN0 Mailbox 0 Data byte 2 Register" line.byte 0x03 "C0MB0_D3,CAN0 Mailbox 0 Data byte 3 Register" line.byte 0x04 "C0MB0_D4,CAN0 Mailbox 0 Data byte 4 Register" line.byte 0x05 "C0MB0_D5,CAN0 Mailbox 0 Data byte 5 Register" line.byte 0x06 "C0MB0_D6,CAN0 Mailbox 0 Data byte 6 Register" line.byte 0x07 "C0MB0_D7,CAN0 Mailbox 0 Data byte 7 Register" group.word (0x3F0+0x0e)++0x01 line.word 0x00 "C0MB0_TS,CAN0 Mailbox 0 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end if (((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.long 0x42c++0x03 line.long 0x0 "C0MIER1,CAN0 Mailbox Interrupt Enable Register 1" bitfld.long 0x00 31. " MB63 ,Mailbox 63 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB62 ,Mailbox 62 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB61 ,Mailbox 61 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB60 ,Mailbox 60 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB59 ,Mailbox 59 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB58 ,Mailbox 58 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Mailbox 57 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB56 ,Mailbox 56 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" else group.long 0x42c++0x03 line.long 0x0 "C0MR1,CAN0 Mailbox Interrupt Enable Register 1" sif (cpu()=="RCARH2") bitfld.long 0x00 29. " MB61 ,Receive FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" textline " " bitfld.long 0x00 28. " MB60 ,Receive FIFO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Transmit FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" bitfld.long 0x00 24. " MB56 ,Transmit FIFO Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" endif group.long 0x43c++0x03 line.long 0x0 "C0MIER0,CAN0 Mailbox Interrupt Enable Register 0" bitfld.long 0x00 31. " MB31IE ,Mailbox 31 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB30IE ,Mailbox 30 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB29IE ,Mailbox 29 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB28IE ,Mailbox 28 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB27IE ,Mailbox 27 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB26IE ,Mailbox 26 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB25IE ,Mailbox 25 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB24IE ,Mailbox 24 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB23IE ,Mailbox 23 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB22IE ,Mailbox 22 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB21IE ,Mailbox 21 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB20IE ,Mailbox 20 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB19IE ,Mailbox 19 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB18IE ,Mailbox 18 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB17IE ,Mailbox 17 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB16IE ,Mailbox 16 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB15IE ,Mailbox 15 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB14IE ,Mailbox 14 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB13IE ,Mailbox 13 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB12IE ,Mailbox 12 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB11IE ,Mailbox 11 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB10IE ,Mailbox 10 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB9IE ,Mailbox 9 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB8IE ,Mailbox 8 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB7IE ,Mailbox 7 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB6IE ,Mailbox 6 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB5IE ,Mailbox 5 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB4IE ,Mailbox 4 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB3IE ,Mailbox 3 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB2IE ,Mailbox 2 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB1IE ,Mailbox 1 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB0IE ,Mailbox 0 Interrupt enabled" "Disabled,Enabled" tree "Message Control Registers" if (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x0)++0x0 hide.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" endif if (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x1)++0x0 hide.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" endif if (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x2)++0x0 hide.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" endif if (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x3)++0x0 hide.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" endif if (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x4)++0x0 hide.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" endif if (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x5)++0x0 hide.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" endif if (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x6)++0x0 hide.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" endif if (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x7)++0x0 hide.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" endif if (((per.b(ad:0xE6E80000+0x808+0x0))&0xc0)==0x40) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x0))&0xc0)==0x80) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x1))&0xc0)==0x40) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x1))&0xc0)==0x80) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x2))&0xc0)==0x40) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x2))&0xc0)==0x80) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x3))&0xc0)==0x40) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x3))&0xc0)==0x80) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x4))&0xc0)==0x40) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x4))&0xc0)==0x80) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x5))&0xc0)==0x40) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x5))&0xc0)==0x80) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x6))&0xc0)==0x40) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x6))&0xc0)==0x80) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x7))&0xc0)==0x40) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x7))&0xc0)==0x80) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x8))&0xc0)==0x40) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x8))&0xc0)==0x80) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x9))&0xc0)==0x40) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x9))&0xc0)==0x80) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xA))&0xc0)==0x40) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xA))&0xc0)==0x80) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xB))&0xc0)==0x40) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xB))&0xc0)==0x80) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xC))&0xc0)==0x40) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xC))&0xc0)==0x80) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xD))&0xc0)==0x40) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xD))&0xc0)==0x80) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xE))&0xc0)==0x40) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xE))&0xc0)==0x80) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xF))&0xc0)==0x40) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xF))&0xc0)==0x80) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x10))&0xc0)==0x40) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x10))&0xc0)==0x80) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x11))&0xc0)==0x40) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x11))&0xc0)==0x80) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x12))&0xc0)==0x40) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x12))&0xc0)==0x80) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x13))&0xc0)==0x40) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x13))&0xc0)==0x80) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x14))&0xc0)==0x40) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x14))&0xc0)==0x80) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x15))&0xc0)==0x40) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x15))&0xc0)==0x80) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x16))&0xc0)==0x40) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x16))&0xc0)==0x80) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x17))&0xc0)==0x40) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x17))&0xc0)==0x80) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif group.byte 0x820++0x1f line.byte 0x0 "C0MCTL31,CAN0 Message Control Register 31" bitfld.byte 0x0 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x0 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x0 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x0 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1 "C0MCTL30,CAN0 Message Control Register 30" bitfld.byte 0x1 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x2 "C0MCTL29,CAN0 Message Control Register 29" bitfld.byte 0x2 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x2 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x2 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x2 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x3 "C0MCTL28,CAN0 Message Control Register 28" bitfld.byte 0x3 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x3 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x3 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x3 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x4 "C0MCTL27,CAN0 Message Control Register 27" bitfld.byte 0x4 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x4 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x4 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x4 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x5 "C0MCTL26,CAN0 Message Control Register 26" bitfld.byte 0x5 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x5 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x5 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x5 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x6 "C0MCTL25,CAN0 Message Control Register 25" bitfld.byte 0x6 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x6 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x6 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x6 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x7 "C0MCTL24,CAN0 Message Control Register 24" bitfld.byte 0x7 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x7 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x7 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x7 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x8 "C0MCTL23,CAN0 Message Control Register 23" bitfld.byte 0x8 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x8 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x8 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x8 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x9 "C0MCTL22,CAN0 Message Control Register 22" bitfld.byte 0x9 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x9 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x9 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x9 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xA "C0MCTL21,CAN0 Message Control Register 21" bitfld.byte 0xA 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xA 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xA 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xA 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xB "C0MCTL20,CAN0 Message Control Register 20" bitfld.byte 0xB 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xB 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xB 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xB 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xC "C0MCTL19,CAN0 Message Control Register 19" bitfld.byte 0xC 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xC 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xC 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xC 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xD "C0MCTL18,CAN0 Message Control Register 18" bitfld.byte 0xD 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xD 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xD 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xD 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xE "C0MCTL17,CAN0 Message Control Register 17" bitfld.byte 0xE 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xE 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xE 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xE 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xF "C0MCTL16,CAN0 Message Control Register 16" bitfld.byte 0xF 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xF 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xF 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xF 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x10 "C0MCTL15,CAN0 Message Control Register 15" bitfld.byte 0x10 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x10 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x10 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x10 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x11 "C0MCTL14,CAN0 Message Control Register 14" bitfld.byte 0x11 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x11 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x11 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x11 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x12 "C0MCTL13,CAN0 Message Control Register 13" bitfld.byte 0x12 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x12 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x12 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x12 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x13 "C0MCTL12,CAN0 Message Control Register 12" bitfld.byte 0x13 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x13 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x13 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x13 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x14 "C0MCTL11,CAN0 Message Control Register 11" bitfld.byte 0x14 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x14 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x14 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x14 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x15 "C0MCTL10,CAN0 Message Control Register 10" bitfld.byte 0x15 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x15 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x15 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x15 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x16 "C0MCTL9,CAN0 Message Control Register 9" bitfld.byte 0x16 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x16 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x16 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x16 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x17 "C0MCTL8,CAN0 Message Control Register 8" bitfld.byte 0x17 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x17 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x17 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x17 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x18 "C0MCTL7,CAN0 Message Control Register 7" bitfld.byte 0x18 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x18 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x18 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x18 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x19 "C0MCTL6,CAN0 Message Control Register 6" bitfld.byte 0x19 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x19 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x19 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x19 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1A "C0MCTL5,CAN0 Message Control Register 5" bitfld.byte 0x1A 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1A 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1A 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1A 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1B "C0MCTL4,CAN0 Message Control Register 4" bitfld.byte 0x1B 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1B 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1B 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1B 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1C "C0MCTL3,CAN0 Message Control Register 3" bitfld.byte 0x1C 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1C 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1C 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1C 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1D "C0MCTL2,CAN0 Message Control Register 2" bitfld.byte 0x1D 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1D 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1D 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1D 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1E "C0MCTL1,CAN0 Message Control Register 1" bitfld.byte 0x1E 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1E 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1E 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1E 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1F "C0MCTL0,CAN0 Message Control Register 0" bitfld.byte 0x1F 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1F 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1F 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1F 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" tree.end group.byte 0x848++0x0 line.byte 0x0 "C0RFCR,CAN0 Receive FIFO Control Register" bitfld.byte 0x00 7. " RFEST ,Receive FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " RFWST ,Receive FIFO Buffer Warning Status" "Not warning,Warning" textline " " bitfld.byte 0x00 5. " RFFST ,Receive FIFO Full Status" "Not full,Full" bitfld.byte 0x00 4. " RFMLF ,Receive FIFO Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO Unread Message Number Status" "0,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E80000+0x848))&0x1)==0x00) rgroup.byte 0x849++0x0 line.byte 0x0 "C0RFPCR,CAN0 Receive FIFO Pointer Control Register" else group.byte 0x849++0x0 line.byte 0x0 "C0RFPCR,CAN0 Receive FIFO Pointer Control Register" endif group.byte 0x84a++0x0 line.byte 0x0 "C0TFCR,CAN0 Transmit FIFO Control Register" bitfld.byte 0x00 7. " TFEST ,Transmit FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " TFFST ,Transmit FIFO Full Status" "Not full,Full" bitfld.byte 0x00 1.--3. " TFUST ,Transmit FIFO Unsent Message Number Status" "0,1,2,3,4,?..." textline " " bitfld.byte 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E80000+0x84a))&0x1)==0x00) rgroup.byte 0x84b++0x0 line.byte 0x0 "C0TFPCR,CAN0 Transmit FIFO Pointer Control Register" else group.byte 0x84b++0x0 line.byte 0x0 "C0TFPCR,CAN0 Transmit FIFO Pointer Control Register" endif rgroup.word 0x842++0x01 line.word 0x0 "C0STR,CAN0 Status Register" bitfld.word 0x00 14. " RECST ,Receive Status Flag" "Idle/transmission,Reception" textline " " bitfld.word 0x00 13. " TRMST ,Transmit Status Flag" "Idle/reception,Transmission/bus-off" textline " " bitfld.word 0x00 12. " BOST ,Bus-Off Status Flag" "Not bus-off,Bus-off" bitfld.word 0x00 11. " EPST ,Error-Passive Status Flag" "Not error-passive,Error-passive" bitfld.word 0x00 10. " SLPST ,CAN Sleep Status Flag" "Not CAN sleep,CAN sleep" textline " " bitfld.word 0x00 9. " HLTST ,CAN Halt Status Flag" "Not CAN halt,CAN halt" bitfld.word 0x00 8. " RSTST ,CAN Reset Status Flag" "Not CAN reset,CAN reset" bitfld.word 0x00 7. " EST ,Error Status Flag" "No error,Error" textline " " bitfld.word 0x00 6. " TABST ,Transmission Abort Status Flag" "Not occurred,Occurred" bitfld.word 0x00 5. " FMLST ,FIFO Mailbox Message Lost Status Flag" "Not occurred,Occurred" bitfld.word 0x00 4. " NMLST ,Normal Mailbox Message Lost Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 3. " TFST ,Transmit FIFO Status Flag" "Full,Not full" bitfld.word 0x00 2. " RFST ,Receive FIFO Status Flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 0. " NDST ,NEWDATA Status Flag" "Not occurred,Occurred" wgroup.byte 0x851++0x00 line.byte 0x0 "C0CSSR,CAN0 Channel Search Support Register" rgroup.byte 0x852++0x00 line.byte 0x0 "C0MSSR,CAN0 Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search Result Status" "Found,Not found" bitfld.byte 0x00 0.--5. " MBNST ,Search Result Mailbox Number Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.byte 0x853++0x00 line.byte 0x0 "C0MSMR,CAN0 Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox Search Mode Select" "Receive,Transmit,Message lost,Channel" group.word 0x856++0x01 line.word 0x0 "C0AFSR,CAN0 Acceptance Filter Support Register" group.byte 0x84c++0x01 line.byte 0x0 "C0EIER,CAN0 Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus Lock Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload Frame Transmit Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Receive Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " BORIE ,Bus-Off Recovery Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off Entry Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,Error-Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EWIE ,Error-Warning Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C0EIFR,CAN0 Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus Lock Detect Flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload Frame Transmission Detect Flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive Overrun Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 4. " BORIF ,Bus-Off Recovery Detect Flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off Entry Detect Flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error Passive Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 1. " EWIF ,Error Warning Detect Flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus Error Detect Flag" "Not detected,Detected" rgroup.byte 0x84e++0x01 line.byte 0x0 "C0RECR,CAN0 Receive Error Count Register" line.byte 0x1 "C0TECR,CAN0 Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x0 "C0ECSR,CAN0 Error Code Store Register" bitfld.byte 0x0 7. " EDPM ,Error Display Mode Select" "First detected error,Accumulated error" textline " " bitfld.byte 0x0 6. " ADEF ,ACK Delimiter Error Flag" "No ACK delimiter,ACK delimiter" textline " " bitfld.byte 0x0 5. " BE0F ,Bit Error (dominant) Flag" "No error,Error" bitfld.byte 0x0 4. " BE1F ,Bit Error (recessive) Flag" "No error,Error" bitfld.byte 0x0 3. " CEF ,CRC Error Flag" "No error,Error" textline " " bitfld.byte 0x0 2. " AEF ,ACK Error Flag" "No error,Error" bitfld.byte 0x0 1. " FEF ,Form Error Flag" "No error,Error" bitfld.byte 0x0 0. " SEF ,Stuff Error Flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x0 "C0TSR,CAN0 Time Stamp Register" group.byte 0x858++0x00 line.byte 0x0 "C0TCR,CAN0 Test Control Register" bitfld.byte 0x0 1.--2. " TSTM ,CAN Test Mode Select" "Other,Listen-only,External loop back,Internal loop back" textline " " bitfld.byte 0x0 0. " TSTE ,CAN Test Mode Enable" "Disabled,Enabled" group.byte 0x860++0x01 line.byte 0x0 "C0IER,CAN0 Interrupt Enable Register" bitfld.byte 0x0 5. " ERSIE ,Error (ERS) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " RXFIE ,Reception FIFO (RXF) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 3. " TXFIE ,Transmission FIFO (TXF) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " RXM0IE ,Mailbox 0 Successful Reception (RXM0) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 1. " RXM1IE ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TXMIE ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C0ISR,CAN0 Interrupt Status Register" bitfld.byte 0x01 5. " ERSF ,Error (ERS) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 4. " RXFF ,Reception FIFO (RXF) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 3. " TXFF ,Transmission FIFO (TXF) Interrupt Status" "Not detected,Detected" textline " " bitfld.byte 0x01 2. " RXM0F ,Mailbox 0 Successful Reception (RXM0) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 1. " RXM1F ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 0. " TXMF ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Status" "Not detected,Detected" group.byte 0x863++0x00 line.byte 0x0 "C0MBSMR,CAN0 Mailbox Search Mask Register" bitfld.byte 0x0 0. " MB0SM ,Mailbox 0 Search Mask" "Not masked,Masked" sif cpu()=="R8A7792X" group.byte 0x85C++0x00 line.byte 0x00 "C0PECR,CAN0 Parity Error Control Register" bitfld.byte 0x00 7. " PF ,Parity Error Flag" "No error,Error" bitfld.byte 0x00 2. " PIE ,Parity Error Interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " PME ,Parity Enable Bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PM ,Parity Mode" "Operation Mode,Halt mode" group.word 0x85E++0x01 line.word 0x00 "C0PEACR,CAN0 Parity Error Address Capture Register" hexmask.word 0x00 0.--10. 1. " PA ,Parity Error Captured Address Bits" endif width 0xb tree.end tree "Channel 1" base ad:0xE6E88000 width 12. group.word 0x840++0x01 line.word 0x00 "C1CTLR,CAN1 Control Register" bitfld.word 0x00 13. " RBOC ,Forcible Return From Bus-OFF" "No effect,Force return" textline " " bitfld.word 0x00 11.--12. " BOM ,Bus-Off Recovery Mode" "Normal,Halt at Bus-off entry,Halt at Bus-off end,Halt by Program request" textline " " bitfld.word 0x00 10. " SLPM ,CAN Sleep Mode" "Disabled,Enabled" bitfld.word 0x00 8.--9. " CANM ,CAN Operating Mode Select" "Operation,Reset,Halt,Force reset" bitfld.word 0x00 6.--7. " TSPS ,Time Stamp Prescaler Select" "1,2,4,8" textline " " bitfld.word 0x00 5. " TSRC ,Time Stamp Counter Reset Command" "No effect,Reset" bitfld.word 0x00 4. " TPM ,Transmission Priority Mode Select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message Lost Mode Select" "Overwrite,Overrun" textline " " bitfld.word 0x00 1.--2. " IDFM ,ID Format Mode Select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN Mailbox Mode Select" "Normal,FIFO" group.byte 0x847++0x00 line.byte 0x00 "C1CLKR,CAN1 Clock Select Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X") bitfld.byte 0x00 0.--1. " CCLKS ,CAN Clock Source Select" "Peripheral 1,Peripheral 2,,External" else bitfld.byte 0x00 0. " CCLKS ,CAN Clock Source Select" "Peripheral,Main" endif group.long 0x844++0x03 line.long 0x00 "C1BCR,CAN1 Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time Segment 1 Control Bits" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Prescaler Division Ratio" textline " " bitfld.long 0x00 12.--13. " SJW ,Resynchronization Jump Width Control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time Segment 2 Control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" if (((per.w(ad:0xE6E88000+0x840))&0x6)==0x0) group.long 0x430++0x07 line.long 0x0 "C1MKR0,CAN1 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" line.long 0x4 "C1MKR1,CAN1 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C1MKR2,CAN1 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C1MKR3,CAN1 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C1MKR4,CAN1 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C1MKR5,CAN1 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C1MKR6,CAN1 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C1MKR7,CAN1 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C1MKR8,CAN1 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C1MKR9,CAN1 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" elif ((((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)) group.long 0x430++0x07 line.long 0x0 "C1MKR0,CAN1 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" line.long 0x4 "C1MKR1,CAN1 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C1MKR2,CAN1 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C1MKR3,CAN1 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C1MKR4,CAN1 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x8 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x8 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x8 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x8 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x8 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x8 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x8 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x8 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x8 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x8 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x8 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x8 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x8 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x8 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x8 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x8 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x8 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x8 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C1MKR5,CAN1 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0xC 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0xC 16. ",Extended ID Bit 16" "0,1" bitfld.long 0xC 15. ",Extended ID Bit 15" "0,1" bitfld.long 0xC 14. ",Extended ID Bit 14" "0,1" bitfld.long 0xC 13. ",Extended ID Bit 13" "0,1" bitfld.long 0xC 12. ",Extended ID Bit 12" "0,1" bitfld.long 0xC 11. ",Extended ID Bit 11" "0,1" bitfld.long 0xC 10. ",Extended ID Bit 10" "0,1" bitfld.long 0xC 9. ",Extended ID Bit 9" "0,1" bitfld.long 0xC 8. ",Extended ID Bit 8" "0,1" bitfld.long 0xC 7. ",Extended ID Bit 7" "0,1" bitfld.long 0xC 6. ",Extended ID Bit 6" "0,1" bitfld.long 0xC 5. ",Extended ID Bit 5" "0,1" bitfld.long 0xC 4. ",Extended ID Bit 4" "0,1" bitfld.long 0xC 3. ",Extended ID Bit 3" "0,1" bitfld.long 0xC 2. ",Extended ID Bit 2" "0,1" bitfld.long 0xC 1. ",Extended ID Bit 1" "0,1" bitfld.long 0xC 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C1MKR6,CAN1 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x10 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x10 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x10 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x10 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x10 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x10 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x10 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x10 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x10 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x10 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x10 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x10 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x10 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x10 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x10 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x10 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x10 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x10 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C1MKR7,CAN1 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x14 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x14 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x14 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x14 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x14 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x14 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x14 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x14 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x14 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x14 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x14 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x14 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x14 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x14 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x14 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x14 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x14 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x14 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C1MKR8,CAN1 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x18 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x18 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x18 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x18 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x18 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x18 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x18 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x18 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x18 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x18 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x18 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x18 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x18 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x18 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x18 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x18 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x18 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x18 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C1MKR9,CAN1 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x1C 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x1C 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x1C 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x1C 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x1C 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x1C 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x1C 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x1C 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x1C 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x1C 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x1C 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x1C 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x1C 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x1C 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x1C 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x1C 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x1C 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x1C 0. ",Extended ID Bit 0" "0,1" else hgroup.long 0x430++0x07 hide.long 0x0 "C1MKR0,CAN1 Mask Register 0" hide.long 0x4 "C1MKR1,CAN1 Mask Register 1" hgroup.long 0x400++0x1f hide.long 0x0 "C1MKR2,CAN1 Mask Register 2" hgroup.long 0x400++0x1f hide.long 0x4 "C1MKR3,CAN1 Mask Register 3" hgroup.long 0x400++0x1f hide.long 0x8 "C1MKR4,CAN1 Mask Register 4" hgroup.long 0x400++0x1f hide.long 0xC "C1MKR5,CAN1 Mask Register 5" hgroup.long 0x400++0x1f hide.long 0x10 "C1MKR6,CAN1 Mask Register 6" hgroup.long 0x400++0x1f hide.long 0x14 "C1MKR7,CAN1 Mask Register 7" hgroup.long 0x400++0x1f hide.long 0x18 "C1MKR8,CAN1 Mask Register 8" hgroup.long 0x400++0x1f hide.long 0x1C "C1MKR9,CAN1 Mask Register 9" endif if ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x420))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2))) group.long 0x420++0x03 line.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x420))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0))) group.long 0x420++0x03 line.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x420++0x03 hide.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" endif if ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x424))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2))) group.long 0x424++0x03 line.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x424))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0))) group.long 0x424++0x03 line.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x424++0x03 hide.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" endif group.long 0x428++0x03 line.long 0x0 "C1MKIVLR1,CAN1 Mask Invalid Register 1" bitfld.long 0x00 31. " MBMV63 ,Mask valid for mailbox 63" "Valid,Invalid" bitfld.long 0x00 30. " MBMV62 ,Mask valid for mailbox 62" "Valid,Invalid" bitfld.long 0x00 29. " MBMV61 ,Mask valid for mailbox 61" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV60 ,Mask valid for mailbox 60" "Valid,Invalid" bitfld.long 0x00 27. " MBMV59 ,Mask valid for mailbox 59" "Valid,Invalid" bitfld.long 0x00 26. " MBMV58 ,Mask valid for mailbox 58" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV57 ,Mask valid for mailbox 57" "Valid,Invalid" bitfld.long 0x00 24. " MBMV56 ,Mask valid for mailbox 56" "Valid,Invalid" bitfld.long 0x00 23. " MBMV55 ,Mask valid for mailbox 55" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV54 ,Mask valid for mailbox 54" "Valid,Invalid" bitfld.long 0x00 21. " MBMV53 ,Mask valid for mailbox 53" "Valid,Invalid" bitfld.long 0x00 20. " MBMV52 ,Mask valid for mailbox 52" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV51 ,Mask valid for mailbox 51" "Valid,Invalid" bitfld.long 0x00 18. " MBMV50 ,Mask valid for mailbox 50" "Valid,Invalid" bitfld.long 0x00 17. " MBMV49 ,Mask valid for mailbox 49" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV48 ,Mask valid for mailbox 48" "Valid,Invalid" bitfld.long 0x00 15. " MBMV47 ,Mask valid for mailbox 47" "Valid,Invalid" bitfld.long 0x00 14. " MBMV46 ,Mask valid for mailbox 46" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV45 ,Mask valid for mailbox 45" "Valid,Invalid" bitfld.long 0x00 12. " MBMV44 ,Mask valid for mailbox 44" "Valid,Invalid" bitfld.long 0x00 11. " MBMV43 ,Mask valid for mailbox 43" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV42 ,Mask valid for mailbox 42" "Valid,Invalid" bitfld.long 0x00 9. " MBMV41 ,Mask valid for mailbox 41" "Valid,Invalid" bitfld.long 0x00 8. " MBMV40 ,Mask valid for mailbox 40" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV39 ,Mask valid for mailbox 39" "Valid,Invalid" bitfld.long 0x00 6. " MBMV38 ,Mask valid for mailbox 38" "Valid,Invalid" bitfld.long 0x00 5. " MBMV37 ,Mask valid for mailbox 37" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV36 ,Mask valid for mailbox 36" "Valid,Invalid" bitfld.long 0x00 3. " MBMV35 ,Mask valid for mailbox 35" "Valid,Invalid" bitfld.long 0x00 2. " MBMV34 ,Mask valid for mailbox 34" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV33 ,Mask valid for mailbox 33" "Valid,Invalid" bitfld.long 0x00 0. " MBMV32 ,Mask valid for mailbox 32" "Valid,Invalid" group.long 0x438++0x03 line.long 0x0 "C1MKIVLR0,CAN1 Mask Invalid Register 0" bitfld.long 0x00 31. " MBMV31 ,Mask valid for mailbox 31" "Valid,Invalid" bitfld.long 0x00 30. " MBMV30 ,Mask valid for mailbox 30" "Valid,Invalid" bitfld.long 0x00 29. " MBMV29 ,Mask valid for mailbox 29" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV28 ,Mask valid for mailbox 28" "Valid,Invalid" bitfld.long 0x00 27. " MBMV27 ,Mask valid for mailbox 27" "Valid,Invalid" bitfld.long 0x00 26. " MBMV26 ,Mask valid for mailbox 26" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV25 ,Mask valid for mailbox 25" "Valid,Invalid" bitfld.long 0x00 24. " MBMV24 ,Mask valid for mailbox 24" "Valid,Invalid" bitfld.long 0x00 23. " MBMV23 ,Mask valid for mailbox 23" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV22 ,Mask valid for mailbox 22" "Valid,Invalid" bitfld.long 0x00 21. " MBMV21 ,Mask valid for mailbox 21" "Valid,Invalid" bitfld.long 0x00 20. " MBMV20 ,Mask valid for mailbox 20" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV19 ,Mask valid for mailbox 19" "Valid,Invalid" bitfld.long 0x00 18. " MBMV18 ,Mask valid for mailbox 18" "Valid,Invalid" bitfld.long 0x00 17. " MBMV17 ,Mask valid for mailbox 17" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV16 ,Mask valid for mailbox 16" "Valid,Invalid" bitfld.long 0x00 15. " MBMV15 ,Mask valid for mailbox 15" "Valid,Invalid" bitfld.long 0x00 14. " MBMV14 ,Mask valid for mailbox 14" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV13 ,Mask valid for mailbox 13" "Valid,Invalid" bitfld.long 0x00 12. " MBMV12 ,Mask valid for mailbox 12" "Valid,Invalid" bitfld.long 0x00 11. " MBMV11 ,Mask valid for mailbox 11" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV10 ,Mask valid for mailbox 10" "Valid,Invalid" bitfld.long 0x00 9. " MBMV9 ,Mask valid for mailbox 9" "Valid,Invalid" bitfld.long 0x00 8. " MBMV8 ,Mask valid for mailbox 8" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV7 ,Mask valid for mailbox 7" "Valid,Invalid" bitfld.long 0x00 6. " MBMV6 ,Mask valid for mailbox 6" "Valid,Invalid" bitfld.long 0x00 5. " MBMV5 ,Mask valid for mailbox 5" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV4 ,Mask valid for mailbox 4" "Valid,Invalid" bitfld.long 0x00 3. " MBMV3 ,Mask valid for mailbox 3" "Valid,Invalid" bitfld.long 0x00 2. " MBMV2 ,Mask valid for mailbox 2" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV1 ,Mask valid for mailbox 1" "Valid,Invalid" bitfld.long 0x00 0. " MBMV0 ,Mask valid for mailbox 0" "Valid,Invalid" tree "CAN Mailboxes registers" if (((63.==60.)||(63.==61.)||(63.==62.)||(63.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x0++0x03 hide.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x0++0x03 line.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x0++0x03 line.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x0++0x03 hide.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" endif group.word (0x0+0x04)++0x1 line.word 0x00 "C1MB63_DLC,CAN1 Mailbox 63 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x0+0x06)++0x07 line.byte 0x00 "C1MB63_D0,CAN1 Mailbox 63 Data byte 0 Register" line.byte 0x01 "C1MB63_D1,CAN1 Mailbox 63 Data byte 1 Register" line.byte 0x02 "C1MB63_D2,CAN1 Mailbox 63 Data byte 2 Register" line.byte 0x03 "C1MB63_D3,CAN1 Mailbox 63 Data byte 3 Register" line.byte 0x04 "C1MB63_D4,CAN1 Mailbox 63 Data byte 4 Register" line.byte 0x05 "C1MB63_D5,CAN1 Mailbox 63 Data byte 5 Register" line.byte 0x06 "C1MB63_D6,CAN1 Mailbox 63 Data byte 6 Register" line.byte 0x07 "C1MB63_D7,CAN1 Mailbox 63 Data byte 7 Register" group.word (0x0+0x0e)++0x01 line.word 0x00 "C1MB63_TS,CAN1 Mailbox 63 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((62.==60.)||(62.==61.)||(62.==62.)||(62.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x10++0x03 hide.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x10))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x10++0x03 line.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x10))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x10++0x03 line.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x10++0x03 hide.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" endif group.word (0x10+0x04)++0x1 line.word 0x00 "C1MB62_DLC,CAN1 Mailbox 62 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x10+0x06)++0x07 line.byte 0x00 "C1MB62_D0,CAN1 Mailbox 62 Data byte 0 Register" line.byte 0x01 "C1MB62_D1,CAN1 Mailbox 62 Data byte 1 Register" line.byte 0x02 "C1MB62_D2,CAN1 Mailbox 62 Data byte 2 Register" line.byte 0x03 "C1MB62_D3,CAN1 Mailbox 62 Data byte 3 Register" line.byte 0x04 "C1MB62_D4,CAN1 Mailbox 62 Data byte 4 Register" line.byte 0x05 "C1MB62_D5,CAN1 Mailbox 62 Data byte 5 Register" line.byte 0x06 "C1MB62_D6,CAN1 Mailbox 62 Data byte 6 Register" line.byte 0x07 "C1MB62_D7,CAN1 Mailbox 62 Data byte 7 Register" group.word (0x10+0x0e)++0x01 line.word 0x00 "C1MB62_TS,CAN1 Mailbox 62 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((61.==60.)||(61.==61.)||(61.==62.)||(61.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x20++0x03 hide.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x20))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x20++0x03 line.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x20))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x20++0x03 line.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x20++0x03 hide.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" endif group.word (0x20+0x04)++0x1 line.word 0x00 "C1MB61_DLC,CAN1 Mailbox 61 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x20+0x06)++0x07 line.byte 0x00 "C1MB61_D0,CAN1 Mailbox 61 Data byte 0 Register" line.byte 0x01 "C1MB61_D1,CAN1 Mailbox 61 Data byte 1 Register" line.byte 0x02 "C1MB61_D2,CAN1 Mailbox 61 Data byte 2 Register" line.byte 0x03 "C1MB61_D3,CAN1 Mailbox 61 Data byte 3 Register" line.byte 0x04 "C1MB61_D4,CAN1 Mailbox 61 Data byte 4 Register" line.byte 0x05 "C1MB61_D5,CAN1 Mailbox 61 Data byte 5 Register" line.byte 0x06 "C1MB61_D6,CAN1 Mailbox 61 Data byte 6 Register" line.byte 0x07 "C1MB61_D7,CAN1 Mailbox 61 Data byte 7 Register" group.word (0x20+0x0e)++0x01 line.word 0x00 "C1MB61_TS,CAN1 Mailbox 61 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((60.==60.)||(60.==61.)||(60.==62.)||(60.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x30++0x03 hide.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x30))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x30++0x03 line.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x30))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x30++0x03 line.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x30++0x03 hide.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" endif group.word (0x30+0x04)++0x1 line.word 0x00 "C1MB60_DLC,CAN1 Mailbox 60 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x30+0x06)++0x07 line.byte 0x00 "C1MB60_D0,CAN1 Mailbox 60 Data byte 0 Register" line.byte 0x01 "C1MB60_D1,CAN1 Mailbox 60 Data byte 1 Register" line.byte 0x02 "C1MB60_D2,CAN1 Mailbox 60 Data byte 2 Register" line.byte 0x03 "C1MB60_D3,CAN1 Mailbox 60 Data byte 3 Register" line.byte 0x04 "C1MB60_D4,CAN1 Mailbox 60 Data byte 4 Register" line.byte 0x05 "C1MB60_D5,CAN1 Mailbox 60 Data byte 5 Register" line.byte 0x06 "C1MB60_D6,CAN1 Mailbox 60 Data byte 6 Register" line.byte 0x07 "C1MB60_D7,CAN1 Mailbox 60 Data byte 7 Register" group.word (0x30+0x0e)++0x01 line.word 0x00 "C1MB60_TS,CAN1 Mailbox 60 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((59.==60.)||(59.==61.)||(59.==62.)||(59.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x40++0x03 hide.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x40))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x40++0x03 line.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x40))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x40++0x03 line.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x40++0x03 hide.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" endif group.word (0x40+0x04)++0x1 line.word 0x00 "C1MB59_DLC,CAN1 Mailbox 59 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x40+0x06)++0x07 line.byte 0x00 "C1MB59_D0,CAN1 Mailbox 59 Data byte 0 Register" line.byte 0x01 "C1MB59_D1,CAN1 Mailbox 59 Data byte 1 Register" line.byte 0x02 "C1MB59_D2,CAN1 Mailbox 59 Data byte 2 Register" line.byte 0x03 "C1MB59_D3,CAN1 Mailbox 59 Data byte 3 Register" line.byte 0x04 "C1MB59_D4,CAN1 Mailbox 59 Data byte 4 Register" line.byte 0x05 "C1MB59_D5,CAN1 Mailbox 59 Data byte 5 Register" line.byte 0x06 "C1MB59_D6,CAN1 Mailbox 59 Data byte 6 Register" line.byte 0x07 "C1MB59_D7,CAN1 Mailbox 59 Data byte 7 Register" group.word (0x40+0x0e)++0x01 line.word 0x00 "C1MB59_TS,CAN1 Mailbox 59 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((58.==60.)||(58.==61.)||(58.==62.)||(58.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x50++0x03 hide.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x50))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x50++0x03 line.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x50))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x50++0x03 line.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x50++0x03 hide.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" endif group.word (0x50+0x04)++0x1 line.word 0x00 "C1MB58_DLC,CAN1 Mailbox 58 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x50+0x06)++0x07 line.byte 0x00 "C1MB58_D0,CAN1 Mailbox 58 Data byte 0 Register" line.byte 0x01 "C1MB58_D1,CAN1 Mailbox 58 Data byte 1 Register" line.byte 0x02 "C1MB58_D2,CAN1 Mailbox 58 Data byte 2 Register" line.byte 0x03 "C1MB58_D3,CAN1 Mailbox 58 Data byte 3 Register" line.byte 0x04 "C1MB58_D4,CAN1 Mailbox 58 Data byte 4 Register" line.byte 0x05 "C1MB58_D5,CAN1 Mailbox 58 Data byte 5 Register" line.byte 0x06 "C1MB58_D6,CAN1 Mailbox 58 Data byte 6 Register" line.byte 0x07 "C1MB58_D7,CAN1 Mailbox 58 Data byte 7 Register" group.word (0x50+0x0e)++0x01 line.word 0x00 "C1MB58_TS,CAN1 Mailbox 58 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((57.==60.)||(57.==61.)||(57.==62.)||(57.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x60++0x03 hide.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x60))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x60++0x03 line.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x60))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x60++0x03 line.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x60++0x03 hide.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" endif group.word (0x60+0x04)++0x1 line.word 0x00 "C1MB57_DLC,CAN1 Mailbox 57 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x60+0x06)++0x07 line.byte 0x00 "C1MB57_D0,CAN1 Mailbox 57 Data byte 0 Register" line.byte 0x01 "C1MB57_D1,CAN1 Mailbox 57 Data byte 1 Register" line.byte 0x02 "C1MB57_D2,CAN1 Mailbox 57 Data byte 2 Register" line.byte 0x03 "C1MB57_D3,CAN1 Mailbox 57 Data byte 3 Register" line.byte 0x04 "C1MB57_D4,CAN1 Mailbox 57 Data byte 4 Register" line.byte 0x05 "C1MB57_D5,CAN1 Mailbox 57 Data byte 5 Register" line.byte 0x06 "C1MB57_D6,CAN1 Mailbox 57 Data byte 6 Register" line.byte 0x07 "C1MB57_D7,CAN1 Mailbox 57 Data byte 7 Register" group.word (0x60+0x0e)++0x01 line.word 0x00 "C1MB57_TS,CAN1 Mailbox 57 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((56.==60.)||(56.==61.)||(56.==62.)||(56.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x70++0x03 hide.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x70))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x70++0x03 line.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x70))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x70++0x03 line.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x70++0x03 hide.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" endif group.word (0x70+0x04)++0x1 line.word 0x00 "C1MB56_DLC,CAN1 Mailbox 56 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x70+0x06)++0x07 line.byte 0x00 "C1MB56_D0,CAN1 Mailbox 56 Data byte 0 Register" line.byte 0x01 "C1MB56_D1,CAN1 Mailbox 56 Data byte 1 Register" line.byte 0x02 "C1MB56_D2,CAN1 Mailbox 56 Data byte 2 Register" line.byte 0x03 "C1MB56_D3,CAN1 Mailbox 56 Data byte 3 Register" line.byte 0x04 "C1MB56_D4,CAN1 Mailbox 56 Data byte 4 Register" line.byte 0x05 "C1MB56_D5,CAN1 Mailbox 56 Data byte 5 Register" line.byte 0x06 "C1MB56_D6,CAN1 Mailbox 56 Data byte 6 Register" line.byte 0x07 "C1MB56_D7,CAN1 Mailbox 56 Data byte 7 Register" group.word (0x70+0x0e)++0x01 line.word 0x00 "C1MB56_TS,CAN1 Mailbox 56 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((55.==60.)||(55.==61.)||(55.==62.)||(55.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x80++0x03 hide.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x80))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x80++0x03 line.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x80))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x80++0x03 line.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x80++0x03 hide.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" endif group.word (0x80+0x04)++0x1 line.word 0x00 "C1MB55_DLC,CAN1 Mailbox 55 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x80+0x06)++0x07 line.byte 0x00 "C1MB55_D0,CAN1 Mailbox 55 Data byte 0 Register" line.byte 0x01 "C1MB55_D1,CAN1 Mailbox 55 Data byte 1 Register" line.byte 0x02 "C1MB55_D2,CAN1 Mailbox 55 Data byte 2 Register" line.byte 0x03 "C1MB55_D3,CAN1 Mailbox 55 Data byte 3 Register" line.byte 0x04 "C1MB55_D4,CAN1 Mailbox 55 Data byte 4 Register" line.byte 0x05 "C1MB55_D5,CAN1 Mailbox 55 Data byte 5 Register" line.byte 0x06 "C1MB55_D6,CAN1 Mailbox 55 Data byte 6 Register" line.byte 0x07 "C1MB55_D7,CAN1 Mailbox 55 Data byte 7 Register" group.word (0x80+0x0e)++0x01 line.word 0x00 "C1MB55_TS,CAN1 Mailbox 55 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((54.==60.)||(54.==61.)||(54.==62.)||(54.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x90++0x03 hide.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x90))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x90++0x03 line.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x90))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x90++0x03 line.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x90++0x03 hide.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" endif group.word (0x90+0x04)++0x1 line.word 0x00 "C1MB54_DLC,CAN1 Mailbox 54 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x90+0x06)++0x07 line.byte 0x00 "C1MB54_D0,CAN1 Mailbox 54 Data byte 0 Register" line.byte 0x01 "C1MB54_D1,CAN1 Mailbox 54 Data byte 1 Register" line.byte 0x02 "C1MB54_D2,CAN1 Mailbox 54 Data byte 2 Register" line.byte 0x03 "C1MB54_D3,CAN1 Mailbox 54 Data byte 3 Register" line.byte 0x04 "C1MB54_D4,CAN1 Mailbox 54 Data byte 4 Register" line.byte 0x05 "C1MB54_D5,CAN1 Mailbox 54 Data byte 5 Register" line.byte 0x06 "C1MB54_D6,CAN1 Mailbox 54 Data byte 6 Register" line.byte 0x07 "C1MB54_D7,CAN1 Mailbox 54 Data byte 7 Register" group.word (0x90+0x0e)++0x01 line.word 0x00 "C1MB54_TS,CAN1 Mailbox 54 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((53.==60.)||(53.==61.)||(53.==62.)||(53.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xA0++0x03 hide.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xA0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xA0++0x03 line.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xA0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xA0++0x03 line.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xA0++0x03 hide.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" endif group.word (0xA0+0x04)++0x1 line.word 0x00 "C1MB53_DLC,CAN1 Mailbox 53 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xA0+0x06)++0x07 line.byte 0x00 "C1MB53_D0,CAN1 Mailbox 53 Data byte 0 Register" line.byte 0x01 "C1MB53_D1,CAN1 Mailbox 53 Data byte 1 Register" line.byte 0x02 "C1MB53_D2,CAN1 Mailbox 53 Data byte 2 Register" line.byte 0x03 "C1MB53_D3,CAN1 Mailbox 53 Data byte 3 Register" line.byte 0x04 "C1MB53_D4,CAN1 Mailbox 53 Data byte 4 Register" line.byte 0x05 "C1MB53_D5,CAN1 Mailbox 53 Data byte 5 Register" line.byte 0x06 "C1MB53_D6,CAN1 Mailbox 53 Data byte 6 Register" line.byte 0x07 "C1MB53_D7,CAN1 Mailbox 53 Data byte 7 Register" group.word (0xA0+0x0e)++0x01 line.word 0x00 "C1MB53_TS,CAN1 Mailbox 53 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((52.==60.)||(52.==61.)||(52.==62.)||(52.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xB0++0x03 hide.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xB0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xB0++0x03 line.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xB0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xB0++0x03 line.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xB0++0x03 hide.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" endif group.word (0xB0+0x04)++0x1 line.word 0x00 "C1MB52_DLC,CAN1 Mailbox 52 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xB0+0x06)++0x07 line.byte 0x00 "C1MB52_D0,CAN1 Mailbox 52 Data byte 0 Register" line.byte 0x01 "C1MB52_D1,CAN1 Mailbox 52 Data byte 1 Register" line.byte 0x02 "C1MB52_D2,CAN1 Mailbox 52 Data byte 2 Register" line.byte 0x03 "C1MB52_D3,CAN1 Mailbox 52 Data byte 3 Register" line.byte 0x04 "C1MB52_D4,CAN1 Mailbox 52 Data byte 4 Register" line.byte 0x05 "C1MB52_D5,CAN1 Mailbox 52 Data byte 5 Register" line.byte 0x06 "C1MB52_D6,CAN1 Mailbox 52 Data byte 6 Register" line.byte 0x07 "C1MB52_D7,CAN1 Mailbox 52 Data byte 7 Register" group.word (0xB0+0x0e)++0x01 line.word 0x00 "C1MB52_TS,CAN1 Mailbox 52 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((51.==60.)||(51.==61.)||(51.==62.)||(51.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xC0++0x03 hide.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xC0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xC0++0x03 line.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xC0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xC0++0x03 line.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xC0++0x03 hide.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" endif group.word (0xC0+0x04)++0x1 line.word 0x00 "C1MB51_DLC,CAN1 Mailbox 51 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xC0+0x06)++0x07 line.byte 0x00 "C1MB51_D0,CAN1 Mailbox 51 Data byte 0 Register" line.byte 0x01 "C1MB51_D1,CAN1 Mailbox 51 Data byte 1 Register" line.byte 0x02 "C1MB51_D2,CAN1 Mailbox 51 Data byte 2 Register" line.byte 0x03 "C1MB51_D3,CAN1 Mailbox 51 Data byte 3 Register" line.byte 0x04 "C1MB51_D4,CAN1 Mailbox 51 Data byte 4 Register" line.byte 0x05 "C1MB51_D5,CAN1 Mailbox 51 Data byte 5 Register" line.byte 0x06 "C1MB51_D6,CAN1 Mailbox 51 Data byte 6 Register" line.byte 0x07 "C1MB51_D7,CAN1 Mailbox 51 Data byte 7 Register" group.word (0xC0+0x0e)++0x01 line.word 0x00 "C1MB51_TS,CAN1 Mailbox 51 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((50.==60.)||(50.==61.)||(50.==62.)||(50.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xD0++0x03 hide.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xD0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xD0++0x03 line.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xD0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xD0++0x03 line.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xD0++0x03 hide.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" endif group.word (0xD0+0x04)++0x1 line.word 0x00 "C1MB50_DLC,CAN1 Mailbox 50 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xD0+0x06)++0x07 line.byte 0x00 "C1MB50_D0,CAN1 Mailbox 50 Data byte 0 Register" line.byte 0x01 "C1MB50_D1,CAN1 Mailbox 50 Data byte 1 Register" line.byte 0x02 "C1MB50_D2,CAN1 Mailbox 50 Data byte 2 Register" line.byte 0x03 "C1MB50_D3,CAN1 Mailbox 50 Data byte 3 Register" line.byte 0x04 "C1MB50_D4,CAN1 Mailbox 50 Data byte 4 Register" line.byte 0x05 "C1MB50_D5,CAN1 Mailbox 50 Data byte 5 Register" line.byte 0x06 "C1MB50_D6,CAN1 Mailbox 50 Data byte 6 Register" line.byte 0x07 "C1MB50_D7,CAN1 Mailbox 50 Data byte 7 Register" group.word (0xD0+0x0e)++0x01 line.word 0x00 "C1MB50_TS,CAN1 Mailbox 50 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((49.==60.)||(49.==61.)||(49.==62.)||(49.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xE0++0x03 hide.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xE0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xE0++0x03 line.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xE0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xE0++0x03 line.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xE0++0x03 hide.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" endif group.word (0xE0+0x04)++0x1 line.word 0x00 "C1MB49_DLC,CAN1 Mailbox 49 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xE0+0x06)++0x07 line.byte 0x00 "C1MB49_D0,CAN1 Mailbox 49 Data byte 0 Register" line.byte 0x01 "C1MB49_D1,CAN1 Mailbox 49 Data byte 1 Register" line.byte 0x02 "C1MB49_D2,CAN1 Mailbox 49 Data byte 2 Register" line.byte 0x03 "C1MB49_D3,CAN1 Mailbox 49 Data byte 3 Register" line.byte 0x04 "C1MB49_D4,CAN1 Mailbox 49 Data byte 4 Register" line.byte 0x05 "C1MB49_D5,CAN1 Mailbox 49 Data byte 5 Register" line.byte 0x06 "C1MB49_D6,CAN1 Mailbox 49 Data byte 6 Register" line.byte 0x07 "C1MB49_D7,CAN1 Mailbox 49 Data byte 7 Register" group.word (0xE0+0x0e)++0x01 line.word 0x00 "C1MB49_TS,CAN1 Mailbox 49 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((48.==60.)||(48.==61.)||(48.==62.)||(48.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xF0++0x03 hide.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xF0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xF0++0x03 line.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xF0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xF0++0x03 line.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xF0++0x03 hide.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" endif group.word (0xF0+0x04)++0x1 line.word 0x00 "C1MB48_DLC,CAN1 Mailbox 48 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xF0+0x06)++0x07 line.byte 0x00 "C1MB48_D0,CAN1 Mailbox 48 Data byte 0 Register" line.byte 0x01 "C1MB48_D1,CAN1 Mailbox 48 Data byte 1 Register" line.byte 0x02 "C1MB48_D2,CAN1 Mailbox 48 Data byte 2 Register" line.byte 0x03 "C1MB48_D3,CAN1 Mailbox 48 Data byte 3 Register" line.byte 0x04 "C1MB48_D4,CAN1 Mailbox 48 Data byte 4 Register" line.byte 0x05 "C1MB48_D5,CAN1 Mailbox 48 Data byte 5 Register" line.byte 0x06 "C1MB48_D6,CAN1 Mailbox 48 Data byte 6 Register" line.byte 0x07 "C1MB48_D7,CAN1 Mailbox 48 Data byte 7 Register" group.word (0xF0+0x0e)++0x01 line.word 0x00 "C1MB48_TS,CAN1 Mailbox 48 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((47.==60.)||(47.==61.)||(47.==62.)||(47.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x100++0x03 hide.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x100))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x100++0x03 line.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x100))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x100++0x03 line.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x100++0x03 hide.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" endif group.word (0x100+0x04)++0x1 line.word 0x00 "C1MB47_DLC,CAN1 Mailbox 47 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x100+0x06)++0x07 line.byte 0x00 "C1MB47_D0,CAN1 Mailbox 47 Data byte 0 Register" line.byte 0x01 "C1MB47_D1,CAN1 Mailbox 47 Data byte 1 Register" line.byte 0x02 "C1MB47_D2,CAN1 Mailbox 47 Data byte 2 Register" line.byte 0x03 "C1MB47_D3,CAN1 Mailbox 47 Data byte 3 Register" line.byte 0x04 "C1MB47_D4,CAN1 Mailbox 47 Data byte 4 Register" line.byte 0x05 "C1MB47_D5,CAN1 Mailbox 47 Data byte 5 Register" line.byte 0x06 "C1MB47_D6,CAN1 Mailbox 47 Data byte 6 Register" line.byte 0x07 "C1MB47_D7,CAN1 Mailbox 47 Data byte 7 Register" group.word (0x100+0x0e)++0x01 line.word 0x00 "C1MB47_TS,CAN1 Mailbox 47 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((46.==60.)||(46.==61.)||(46.==62.)||(46.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x110++0x03 hide.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x110))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x110++0x03 line.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x110))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x110++0x03 line.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x110++0x03 hide.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" endif group.word (0x110+0x04)++0x1 line.word 0x00 "C1MB46_DLC,CAN1 Mailbox 46 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x110+0x06)++0x07 line.byte 0x00 "C1MB46_D0,CAN1 Mailbox 46 Data byte 0 Register" line.byte 0x01 "C1MB46_D1,CAN1 Mailbox 46 Data byte 1 Register" line.byte 0x02 "C1MB46_D2,CAN1 Mailbox 46 Data byte 2 Register" line.byte 0x03 "C1MB46_D3,CAN1 Mailbox 46 Data byte 3 Register" line.byte 0x04 "C1MB46_D4,CAN1 Mailbox 46 Data byte 4 Register" line.byte 0x05 "C1MB46_D5,CAN1 Mailbox 46 Data byte 5 Register" line.byte 0x06 "C1MB46_D6,CAN1 Mailbox 46 Data byte 6 Register" line.byte 0x07 "C1MB46_D7,CAN1 Mailbox 46 Data byte 7 Register" group.word (0x110+0x0e)++0x01 line.word 0x00 "C1MB46_TS,CAN1 Mailbox 46 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((45.==60.)||(45.==61.)||(45.==62.)||(45.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x120++0x03 hide.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x120))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x120++0x03 line.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x120))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x120++0x03 line.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x120++0x03 hide.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" endif group.word (0x120+0x04)++0x1 line.word 0x00 "C1MB45_DLC,CAN1 Mailbox 45 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x120+0x06)++0x07 line.byte 0x00 "C1MB45_D0,CAN1 Mailbox 45 Data byte 0 Register" line.byte 0x01 "C1MB45_D1,CAN1 Mailbox 45 Data byte 1 Register" line.byte 0x02 "C1MB45_D2,CAN1 Mailbox 45 Data byte 2 Register" line.byte 0x03 "C1MB45_D3,CAN1 Mailbox 45 Data byte 3 Register" line.byte 0x04 "C1MB45_D4,CAN1 Mailbox 45 Data byte 4 Register" line.byte 0x05 "C1MB45_D5,CAN1 Mailbox 45 Data byte 5 Register" line.byte 0x06 "C1MB45_D6,CAN1 Mailbox 45 Data byte 6 Register" line.byte 0x07 "C1MB45_D7,CAN1 Mailbox 45 Data byte 7 Register" group.word (0x120+0x0e)++0x01 line.word 0x00 "C1MB45_TS,CAN1 Mailbox 45 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((44.==60.)||(44.==61.)||(44.==62.)||(44.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x130++0x03 hide.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x130))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x130++0x03 line.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x130))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x130++0x03 line.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x130++0x03 hide.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" endif group.word (0x130+0x04)++0x1 line.word 0x00 "C1MB44_DLC,CAN1 Mailbox 44 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x130+0x06)++0x07 line.byte 0x00 "C1MB44_D0,CAN1 Mailbox 44 Data byte 0 Register" line.byte 0x01 "C1MB44_D1,CAN1 Mailbox 44 Data byte 1 Register" line.byte 0x02 "C1MB44_D2,CAN1 Mailbox 44 Data byte 2 Register" line.byte 0x03 "C1MB44_D3,CAN1 Mailbox 44 Data byte 3 Register" line.byte 0x04 "C1MB44_D4,CAN1 Mailbox 44 Data byte 4 Register" line.byte 0x05 "C1MB44_D5,CAN1 Mailbox 44 Data byte 5 Register" line.byte 0x06 "C1MB44_D6,CAN1 Mailbox 44 Data byte 6 Register" line.byte 0x07 "C1MB44_D7,CAN1 Mailbox 44 Data byte 7 Register" group.word (0x130+0x0e)++0x01 line.word 0x00 "C1MB44_TS,CAN1 Mailbox 44 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((43.==60.)||(43.==61.)||(43.==62.)||(43.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x140++0x03 hide.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x140))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x140++0x03 line.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x140))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x140++0x03 line.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x140++0x03 hide.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" endif group.word (0x140+0x04)++0x1 line.word 0x00 "C1MB43_DLC,CAN1 Mailbox 43 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x140+0x06)++0x07 line.byte 0x00 "C1MB43_D0,CAN1 Mailbox 43 Data byte 0 Register" line.byte 0x01 "C1MB43_D1,CAN1 Mailbox 43 Data byte 1 Register" line.byte 0x02 "C1MB43_D2,CAN1 Mailbox 43 Data byte 2 Register" line.byte 0x03 "C1MB43_D3,CAN1 Mailbox 43 Data byte 3 Register" line.byte 0x04 "C1MB43_D4,CAN1 Mailbox 43 Data byte 4 Register" line.byte 0x05 "C1MB43_D5,CAN1 Mailbox 43 Data byte 5 Register" line.byte 0x06 "C1MB43_D6,CAN1 Mailbox 43 Data byte 6 Register" line.byte 0x07 "C1MB43_D7,CAN1 Mailbox 43 Data byte 7 Register" group.word (0x140+0x0e)++0x01 line.word 0x00 "C1MB43_TS,CAN1 Mailbox 43 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((42.==60.)||(42.==61.)||(42.==62.)||(42.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x150++0x03 hide.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x150))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x150++0x03 line.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x150))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x150++0x03 line.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x150++0x03 hide.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" endif group.word (0x150+0x04)++0x1 line.word 0x00 "C1MB42_DLC,CAN1 Mailbox 42 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x150+0x06)++0x07 line.byte 0x00 "C1MB42_D0,CAN1 Mailbox 42 Data byte 0 Register" line.byte 0x01 "C1MB42_D1,CAN1 Mailbox 42 Data byte 1 Register" line.byte 0x02 "C1MB42_D2,CAN1 Mailbox 42 Data byte 2 Register" line.byte 0x03 "C1MB42_D3,CAN1 Mailbox 42 Data byte 3 Register" line.byte 0x04 "C1MB42_D4,CAN1 Mailbox 42 Data byte 4 Register" line.byte 0x05 "C1MB42_D5,CAN1 Mailbox 42 Data byte 5 Register" line.byte 0x06 "C1MB42_D6,CAN1 Mailbox 42 Data byte 6 Register" line.byte 0x07 "C1MB42_D7,CAN1 Mailbox 42 Data byte 7 Register" group.word (0x150+0x0e)++0x01 line.word 0x00 "C1MB42_TS,CAN1 Mailbox 42 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((41.==60.)||(41.==61.)||(41.==62.)||(41.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x160++0x03 hide.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x160))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x160++0x03 line.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x160))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x160++0x03 line.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x160++0x03 hide.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" endif group.word (0x160+0x04)++0x1 line.word 0x00 "C1MB41_DLC,CAN1 Mailbox 41 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x160+0x06)++0x07 line.byte 0x00 "C1MB41_D0,CAN1 Mailbox 41 Data byte 0 Register" line.byte 0x01 "C1MB41_D1,CAN1 Mailbox 41 Data byte 1 Register" line.byte 0x02 "C1MB41_D2,CAN1 Mailbox 41 Data byte 2 Register" line.byte 0x03 "C1MB41_D3,CAN1 Mailbox 41 Data byte 3 Register" line.byte 0x04 "C1MB41_D4,CAN1 Mailbox 41 Data byte 4 Register" line.byte 0x05 "C1MB41_D5,CAN1 Mailbox 41 Data byte 5 Register" line.byte 0x06 "C1MB41_D6,CAN1 Mailbox 41 Data byte 6 Register" line.byte 0x07 "C1MB41_D7,CAN1 Mailbox 41 Data byte 7 Register" group.word (0x160+0x0e)++0x01 line.word 0x00 "C1MB41_TS,CAN1 Mailbox 41 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((40.==60.)||(40.==61.)||(40.==62.)||(40.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x170++0x03 hide.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x170))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x170++0x03 line.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x170))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x170++0x03 line.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x170++0x03 hide.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" endif group.word (0x170+0x04)++0x1 line.word 0x00 "C1MB40_DLC,CAN1 Mailbox 40 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x170+0x06)++0x07 line.byte 0x00 "C1MB40_D0,CAN1 Mailbox 40 Data byte 0 Register" line.byte 0x01 "C1MB40_D1,CAN1 Mailbox 40 Data byte 1 Register" line.byte 0x02 "C1MB40_D2,CAN1 Mailbox 40 Data byte 2 Register" line.byte 0x03 "C1MB40_D3,CAN1 Mailbox 40 Data byte 3 Register" line.byte 0x04 "C1MB40_D4,CAN1 Mailbox 40 Data byte 4 Register" line.byte 0x05 "C1MB40_D5,CAN1 Mailbox 40 Data byte 5 Register" line.byte 0x06 "C1MB40_D6,CAN1 Mailbox 40 Data byte 6 Register" line.byte 0x07 "C1MB40_D7,CAN1 Mailbox 40 Data byte 7 Register" group.word (0x170+0x0e)++0x01 line.word 0x00 "C1MB40_TS,CAN1 Mailbox 40 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((39.==60.)||(39.==61.)||(39.==62.)||(39.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x180++0x03 hide.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x180))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x180++0x03 line.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x180))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x180++0x03 line.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x180++0x03 hide.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" endif group.word (0x180+0x04)++0x1 line.word 0x00 "C1MB39_DLC,CAN1 Mailbox 39 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x180+0x06)++0x07 line.byte 0x00 "C1MB39_D0,CAN1 Mailbox 39 Data byte 0 Register" line.byte 0x01 "C1MB39_D1,CAN1 Mailbox 39 Data byte 1 Register" line.byte 0x02 "C1MB39_D2,CAN1 Mailbox 39 Data byte 2 Register" line.byte 0x03 "C1MB39_D3,CAN1 Mailbox 39 Data byte 3 Register" line.byte 0x04 "C1MB39_D4,CAN1 Mailbox 39 Data byte 4 Register" line.byte 0x05 "C1MB39_D5,CAN1 Mailbox 39 Data byte 5 Register" line.byte 0x06 "C1MB39_D6,CAN1 Mailbox 39 Data byte 6 Register" line.byte 0x07 "C1MB39_D7,CAN1 Mailbox 39 Data byte 7 Register" group.word (0x180+0x0e)++0x01 line.word 0x00 "C1MB39_TS,CAN1 Mailbox 39 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((38.==60.)||(38.==61.)||(38.==62.)||(38.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x190++0x03 hide.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x190))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x190++0x03 line.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x190))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x190++0x03 line.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x190++0x03 hide.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" endif group.word (0x190+0x04)++0x1 line.word 0x00 "C1MB38_DLC,CAN1 Mailbox 38 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x190+0x06)++0x07 line.byte 0x00 "C1MB38_D0,CAN1 Mailbox 38 Data byte 0 Register" line.byte 0x01 "C1MB38_D1,CAN1 Mailbox 38 Data byte 1 Register" line.byte 0x02 "C1MB38_D2,CAN1 Mailbox 38 Data byte 2 Register" line.byte 0x03 "C1MB38_D3,CAN1 Mailbox 38 Data byte 3 Register" line.byte 0x04 "C1MB38_D4,CAN1 Mailbox 38 Data byte 4 Register" line.byte 0x05 "C1MB38_D5,CAN1 Mailbox 38 Data byte 5 Register" line.byte 0x06 "C1MB38_D6,CAN1 Mailbox 38 Data byte 6 Register" line.byte 0x07 "C1MB38_D7,CAN1 Mailbox 38 Data byte 7 Register" group.word (0x190+0x0e)++0x01 line.word 0x00 "C1MB38_TS,CAN1 Mailbox 38 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((37.==60.)||(37.==61.)||(37.==62.)||(37.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1A0++0x03 hide.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1A0++0x03 line.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1A0++0x03 line.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1A0++0x03 hide.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" endif group.word (0x1A0+0x04)++0x1 line.word 0x00 "C1MB37_DLC,CAN1 Mailbox 37 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1A0+0x06)++0x07 line.byte 0x00 "C1MB37_D0,CAN1 Mailbox 37 Data byte 0 Register" line.byte 0x01 "C1MB37_D1,CAN1 Mailbox 37 Data byte 1 Register" line.byte 0x02 "C1MB37_D2,CAN1 Mailbox 37 Data byte 2 Register" line.byte 0x03 "C1MB37_D3,CAN1 Mailbox 37 Data byte 3 Register" line.byte 0x04 "C1MB37_D4,CAN1 Mailbox 37 Data byte 4 Register" line.byte 0x05 "C1MB37_D5,CAN1 Mailbox 37 Data byte 5 Register" line.byte 0x06 "C1MB37_D6,CAN1 Mailbox 37 Data byte 6 Register" line.byte 0x07 "C1MB37_D7,CAN1 Mailbox 37 Data byte 7 Register" group.word (0x1A0+0x0e)++0x01 line.word 0x00 "C1MB37_TS,CAN1 Mailbox 37 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((36.==60.)||(36.==61.)||(36.==62.)||(36.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1B0++0x03 hide.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1B0++0x03 line.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1B0++0x03 line.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1B0++0x03 hide.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" endif group.word (0x1B0+0x04)++0x1 line.word 0x00 "C1MB36_DLC,CAN1 Mailbox 36 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1B0+0x06)++0x07 line.byte 0x00 "C1MB36_D0,CAN1 Mailbox 36 Data byte 0 Register" line.byte 0x01 "C1MB36_D1,CAN1 Mailbox 36 Data byte 1 Register" line.byte 0x02 "C1MB36_D2,CAN1 Mailbox 36 Data byte 2 Register" line.byte 0x03 "C1MB36_D3,CAN1 Mailbox 36 Data byte 3 Register" line.byte 0x04 "C1MB36_D4,CAN1 Mailbox 36 Data byte 4 Register" line.byte 0x05 "C1MB36_D5,CAN1 Mailbox 36 Data byte 5 Register" line.byte 0x06 "C1MB36_D6,CAN1 Mailbox 36 Data byte 6 Register" line.byte 0x07 "C1MB36_D7,CAN1 Mailbox 36 Data byte 7 Register" group.word (0x1B0+0x0e)++0x01 line.word 0x00 "C1MB36_TS,CAN1 Mailbox 36 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((35.==60.)||(35.==61.)||(35.==62.)||(35.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1C0++0x03 hide.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1C0++0x03 line.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1C0++0x03 line.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1C0++0x03 hide.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" endif group.word (0x1C0+0x04)++0x1 line.word 0x00 "C1MB35_DLC,CAN1 Mailbox 35 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1C0+0x06)++0x07 line.byte 0x00 "C1MB35_D0,CAN1 Mailbox 35 Data byte 0 Register" line.byte 0x01 "C1MB35_D1,CAN1 Mailbox 35 Data byte 1 Register" line.byte 0x02 "C1MB35_D2,CAN1 Mailbox 35 Data byte 2 Register" line.byte 0x03 "C1MB35_D3,CAN1 Mailbox 35 Data byte 3 Register" line.byte 0x04 "C1MB35_D4,CAN1 Mailbox 35 Data byte 4 Register" line.byte 0x05 "C1MB35_D5,CAN1 Mailbox 35 Data byte 5 Register" line.byte 0x06 "C1MB35_D6,CAN1 Mailbox 35 Data byte 6 Register" line.byte 0x07 "C1MB35_D7,CAN1 Mailbox 35 Data byte 7 Register" group.word (0x1C0+0x0e)++0x01 line.word 0x00 "C1MB35_TS,CAN1 Mailbox 35 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((34.==60.)||(34.==61.)||(34.==62.)||(34.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1D0++0x03 hide.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1D0++0x03 line.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1D0++0x03 line.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1D0++0x03 hide.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" endif group.word (0x1D0+0x04)++0x1 line.word 0x00 "C1MB34_DLC,CAN1 Mailbox 34 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1D0+0x06)++0x07 line.byte 0x00 "C1MB34_D0,CAN1 Mailbox 34 Data byte 0 Register" line.byte 0x01 "C1MB34_D1,CAN1 Mailbox 34 Data byte 1 Register" line.byte 0x02 "C1MB34_D2,CAN1 Mailbox 34 Data byte 2 Register" line.byte 0x03 "C1MB34_D3,CAN1 Mailbox 34 Data byte 3 Register" line.byte 0x04 "C1MB34_D4,CAN1 Mailbox 34 Data byte 4 Register" line.byte 0x05 "C1MB34_D5,CAN1 Mailbox 34 Data byte 5 Register" line.byte 0x06 "C1MB34_D6,CAN1 Mailbox 34 Data byte 6 Register" line.byte 0x07 "C1MB34_D7,CAN1 Mailbox 34 Data byte 7 Register" group.word (0x1D0+0x0e)++0x01 line.word 0x00 "C1MB34_TS,CAN1 Mailbox 34 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((33.==60.)||(33.==61.)||(33.==62.)||(33.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1E0++0x03 hide.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1E0++0x03 line.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1E0++0x03 line.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1E0++0x03 hide.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" endif group.word (0x1E0+0x04)++0x1 line.word 0x00 "C1MB33_DLC,CAN1 Mailbox 33 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1E0+0x06)++0x07 line.byte 0x00 "C1MB33_D0,CAN1 Mailbox 33 Data byte 0 Register" line.byte 0x01 "C1MB33_D1,CAN1 Mailbox 33 Data byte 1 Register" line.byte 0x02 "C1MB33_D2,CAN1 Mailbox 33 Data byte 2 Register" line.byte 0x03 "C1MB33_D3,CAN1 Mailbox 33 Data byte 3 Register" line.byte 0x04 "C1MB33_D4,CAN1 Mailbox 33 Data byte 4 Register" line.byte 0x05 "C1MB33_D5,CAN1 Mailbox 33 Data byte 5 Register" line.byte 0x06 "C1MB33_D6,CAN1 Mailbox 33 Data byte 6 Register" line.byte 0x07 "C1MB33_D7,CAN1 Mailbox 33 Data byte 7 Register" group.word (0x1E0+0x0e)++0x01 line.word 0x00 "C1MB33_TS,CAN1 Mailbox 33 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((32.==60.)||(32.==61.)||(32.==62.)||(32.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1F0++0x03 hide.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1F0++0x03 line.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1F0++0x03 line.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1F0++0x03 hide.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" endif group.word (0x1F0+0x04)++0x1 line.word 0x00 "C1MB32_DLC,CAN1 Mailbox 32 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1F0+0x06)++0x07 line.byte 0x00 "C1MB32_D0,CAN1 Mailbox 32 Data byte 0 Register" line.byte 0x01 "C1MB32_D1,CAN1 Mailbox 32 Data byte 1 Register" line.byte 0x02 "C1MB32_D2,CAN1 Mailbox 32 Data byte 2 Register" line.byte 0x03 "C1MB32_D3,CAN1 Mailbox 32 Data byte 3 Register" line.byte 0x04 "C1MB32_D4,CAN1 Mailbox 32 Data byte 4 Register" line.byte 0x05 "C1MB32_D5,CAN1 Mailbox 32 Data byte 5 Register" line.byte 0x06 "C1MB32_D6,CAN1 Mailbox 32 Data byte 6 Register" line.byte 0x07 "C1MB32_D7,CAN1 Mailbox 32 Data byte 7 Register" group.word (0x1F0+0x0e)++0x01 line.word 0x00 "C1MB32_TS,CAN1 Mailbox 32 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((31.==60.)||(31.==61.)||(31.==62.)||(31.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x200++0x03 hide.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x200))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x200++0x03 line.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x200))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x200++0x03 line.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x200++0x03 hide.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" endif group.word (0x200+0x04)++0x1 line.word 0x00 "C1MB31_DLC,CAN1 Mailbox 31 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "C1MB31_D0,CAN1 Mailbox 31 Data byte 0 Register" line.byte 0x01 "C1MB31_D1,CAN1 Mailbox 31 Data byte 1 Register" line.byte 0x02 "C1MB31_D2,CAN1 Mailbox 31 Data byte 2 Register" line.byte 0x03 "C1MB31_D3,CAN1 Mailbox 31 Data byte 3 Register" line.byte 0x04 "C1MB31_D4,CAN1 Mailbox 31 Data byte 4 Register" line.byte 0x05 "C1MB31_D5,CAN1 Mailbox 31 Data byte 5 Register" line.byte 0x06 "C1MB31_D6,CAN1 Mailbox 31 Data byte 6 Register" line.byte 0x07 "C1MB31_D7,CAN1 Mailbox 31 Data byte 7 Register" group.word (0x200+0x0e)++0x01 line.word 0x00 "C1MB31_TS,CAN1 Mailbox 31 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((30.==60.)||(30.==61.)||(30.==62.)||(30.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x210++0x03 hide.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x210))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x210++0x03 line.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x210))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x210++0x03 line.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x210++0x03 hide.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" endif group.word (0x210+0x04)++0x1 line.word 0x00 "C1MB30_DLC,CAN1 Mailbox 30 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "C1MB30_D0,CAN1 Mailbox 30 Data byte 0 Register" line.byte 0x01 "C1MB30_D1,CAN1 Mailbox 30 Data byte 1 Register" line.byte 0x02 "C1MB30_D2,CAN1 Mailbox 30 Data byte 2 Register" line.byte 0x03 "C1MB30_D3,CAN1 Mailbox 30 Data byte 3 Register" line.byte 0x04 "C1MB30_D4,CAN1 Mailbox 30 Data byte 4 Register" line.byte 0x05 "C1MB30_D5,CAN1 Mailbox 30 Data byte 5 Register" line.byte 0x06 "C1MB30_D6,CAN1 Mailbox 30 Data byte 6 Register" line.byte 0x07 "C1MB30_D7,CAN1 Mailbox 30 Data byte 7 Register" group.word (0x210+0x0e)++0x01 line.word 0x00 "C1MB30_TS,CAN1 Mailbox 30 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((29.==60.)||(29.==61.)||(29.==62.)||(29.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x220++0x03 hide.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x220))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x220++0x03 line.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x220))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x220++0x03 line.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x220++0x03 hide.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" endif group.word (0x220+0x04)++0x1 line.word 0x00 "C1MB29_DLC,CAN1 Mailbox 29 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "C1MB29_D0,CAN1 Mailbox 29 Data byte 0 Register" line.byte 0x01 "C1MB29_D1,CAN1 Mailbox 29 Data byte 1 Register" line.byte 0x02 "C1MB29_D2,CAN1 Mailbox 29 Data byte 2 Register" line.byte 0x03 "C1MB29_D3,CAN1 Mailbox 29 Data byte 3 Register" line.byte 0x04 "C1MB29_D4,CAN1 Mailbox 29 Data byte 4 Register" line.byte 0x05 "C1MB29_D5,CAN1 Mailbox 29 Data byte 5 Register" line.byte 0x06 "C1MB29_D6,CAN1 Mailbox 29 Data byte 6 Register" line.byte 0x07 "C1MB29_D7,CAN1 Mailbox 29 Data byte 7 Register" group.word (0x220+0x0e)++0x01 line.word 0x00 "C1MB29_TS,CAN1 Mailbox 29 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((28.==60.)||(28.==61.)||(28.==62.)||(28.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x230++0x03 hide.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x230))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x230++0x03 line.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x230))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x230++0x03 line.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x230++0x03 hide.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" endif group.word (0x230+0x04)++0x1 line.word 0x00 "C1MB28_DLC,CAN1 Mailbox 28 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "C1MB28_D0,CAN1 Mailbox 28 Data byte 0 Register" line.byte 0x01 "C1MB28_D1,CAN1 Mailbox 28 Data byte 1 Register" line.byte 0x02 "C1MB28_D2,CAN1 Mailbox 28 Data byte 2 Register" line.byte 0x03 "C1MB28_D3,CAN1 Mailbox 28 Data byte 3 Register" line.byte 0x04 "C1MB28_D4,CAN1 Mailbox 28 Data byte 4 Register" line.byte 0x05 "C1MB28_D5,CAN1 Mailbox 28 Data byte 5 Register" line.byte 0x06 "C1MB28_D6,CAN1 Mailbox 28 Data byte 6 Register" line.byte 0x07 "C1MB28_D7,CAN1 Mailbox 28 Data byte 7 Register" group.word (0x230+0x0e)++0x01 line.word 0x00 "C1MB28_TS,CAN1 Mailbox 28 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((27.==60.)||(27.==61.)||(27.==62.)||(27.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x240++0x03 hide.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x240))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x240++0x03 line.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x240))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x240++0x03 line.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x240++0x03 hide.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" endif group.word (0x240+0x04)++0x1 line.word 0x00 "C1MB27_DLC,CAN1 Mailbox 27 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "C1MB27_D0,CAN1 Mailbox 27 Data byte 0 Register" line.byte 0x01 "C1MB27_D1,CAN1 Mailbox 27 Data byte 1 Register" line.byte 0x02 "C1MB27_D2,CAN1 Mailbox 27 Data byte 2 Register" line.byte 0x03 "C1MB27_D3,CAN1 Mailbox 27 Data byte 3 Register" line.byte 0x04 "C1MB27_D4,CAN1 Mailbox 27 Data byte 4 Register" line.byte 0x05 "C1MB27_D5,CAN1 Mailbox 27 Data byte 5 Register" line.byte 0x06 "C1MB27_D6,CAN1 Mailbox 27 Data byte 6 Register" line.byte 0x07 "C1MB27_D7,CAN1 Mailbox 27 Data byte 7 Register" group.word (0x240+0x0e)++0x01 line.word 0x00 "C1MB27_TS,CAN1 Mailbox 27 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((26.==60.)||(26.==61.)||(26.==62.)||(26.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x250++0x03 hide.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x250))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x250++0x03 line.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x250))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x250++0x03 line.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x250++0x03 hide.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" endif group.word (0x250+0x04)++0x1 line.word 0x00 "C1MB26_DLC,CAN1 Mailbox 26 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "C1MB26_D0,CAN1 Mailbox 26 Data byte 0 Register" line.byte 0x01 "C1MB26_D1,CAN1 Mailbox 26 Data byte 1 Register" line.byte 0x02 "C1MB26_D2,CAN1 Mailbox 26 Data byte 2 Register" line.byte 0x03 "C1MB26_D3,CAN1 Mailbox 26 Data byte 3 Register" line.byte 0x04 "C1MB26_D4,CAN1 Mailbox 26 Data byte 4 Register" line.byte 0x05 "C1MB26_D5,CAN1 Mailbox 26 Data byte 5 Register" line.byte 0x06 "C1MB26_D6,CAN1 Mailbox 26 Data byte 6 Register" line.byte 0x07 "C1MB26_D7,CAN1 Mailbox 26 Data byte 7 Register" group.word (0x250+0x0e)++0x01 line.word 0x00 "C1MB26_TS,CAN1 Mailbox 26 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((25.==60.)||(25.==61.)||(25.==62.)||(25.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x260++0x03 hide.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x260))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x260++0x03 line.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x260))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x260++0x03 line.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x260++0x03 hide.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" endif group.word (0x260+0x04)++0x1 line.word 0x00 "C1MB25_DLC,CAN1 Mailbox 25 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "C1MB25_D0,CAN1 Mailbox 25 Data byte 0 Register" line.byte 0x01 "C1MB25_D1,CAN1 Mailbox 25 Data byte 1 Register" line.byte 0x02 "C1MB25_D2,CAN1 Mailbox 25 Data byte 2 Register" line.byte 0x03 "C1MB25_D3,CAN1 Mailbox 25 Data byte 3 Register" line.byte 0x04 "C1MB25_D4,CAN1 Mailbox 25 Data byte 4 Register" line.byte 0x05 "C1MB25_D5,CAN1 Mailbox 25 Data byte 5 Register" line.byte 0x06 "C1MB25_D6,CAN1 Mailbox 25 Data byte 6 Register" line.byte 0x07 "C1MB25_D7,CAN1 Mailbox 25 Data byte 7 Register" group.word (0x260+0x0e)++0x01 line.word 0x00 "C1MB25_TS,CAN1 Mailbox 25 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((24.==60.)||(24.==61.)||(24.==62.)||(24.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x270++0x03 hide.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x270))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x270++0x03 line.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x270))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x270++0x03 line.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x270++0x03 hide.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" endif group.word (0x270+0x04)++0x1 line.word 0x00 "C1MB24_DLC,CAN1 Mailbox 24 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "C1MB24_D0,CAN1 Mailbox 24 Data byte 0 Register" line.byte 0x01 "C1MB24_D1,CAN1 Mailbox 24 Data byte 1 Register" line.byte 0x02 "C1MB24_D2,CAN1 Mailbox 24 Data byte 2 Register" line.byte 0x03 "C1MB24_D3,CAN1 Mailbox 24 Data byte 3 Register" line.byte 0x04 "C1MB24_D4,CAN1 Mailbox 24 Data byte 4 Register" line.byte 0x05 "C1MB24_D5,CAN1 Mailbox 24 Data byte 5 Register" line.byte 0x06 "C1MB24_D6,CAN1 Mailbox 24 Data byte 6 Register" line.byte 0x07 "C1MB24_D7,CAN1 Mailbox 24 Data byte 7 Register" group.word (0x270+0x0e)++0x01 line.word 0x00 "C1MB24_TS,CAN1 Mailbox 24 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((23.==60.)||(23.==61.)||(23.==62.)||(23.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x280++0x03 hide.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x280))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x280++0x03 line.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x280))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x280++0x03 line.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x280++0x03 hide.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" endif group.word (0x280+0x04)++0x1 line.word 0x00 "C1MB23_DLC,CAN1 Mailbox 23 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "C1MB23_D0,CAN1 Mailbox 23 Data byte 0 Register" line.byte 0x01 "C1MB23_D1,CAN1 Mailbox 23 Data byte 1 Register" line.byte 0x02 "C1MB23_D2,CAN1 Mailbox 23 Data byte 2 Register" line.byte 0x03 "C1MB23_D3,CAN1 Mailbox 23 Data byte 3 Register" line.byte 0x04 "C1MB23_D4,CAN1 Mailbox 23 Data byte 4 Register" line.byte 0x05 "C1MB23_D5,CAN1 Mailbox 23 Data byte 5 Register" line.byte 0x06 "C1MB23_D6,CAN1 Mailbox 23 Data byte 6 Register" line.byte 0x07 "C1MB23_D7,CAN1 Mailbox 23 Data byte 7 Register" group.word (0x280+0x0e)++0x01 line.word 0x00 "C1MB23_TS,CAN1 Mailbox 23 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((22.==60.)||(22.==61.)||(22.==62.)||(22.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x290++0x03 hide.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x290))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x290++0x03 line.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x290))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x290++0x03 line.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x290++0x03 hide.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" endif group.word (0x290+0x04)++0x1 line.word 0x00 "C1MB22_DLC,CAN1 Mailbox 22 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "C1MB22_D0,CAN1 Mailbox 22 Data byte 0 Register" line.byte 0x01 "C1MB22_D1,CAN1 Mailbox 22 Data byte 1 Register" line.byte 0x02 "C1MB22_D2,CAN1 Mailbox 22 Data byte 2 Register" line.byte 0x03 "C1MB22_D3,CAN1 Mailbox 22 Data byte 3 Register" line.byte 0x04 "C1MB22_D4,CAN1 Mailbox 22 Data byte 4 Register" line.byte 0x05 "C1MB22_D5,CAN1 Mailbox 22 Data byte 5 Register" line.byte 0x06 "C1MB22_D6,CAN1 Mailbox 22 Data byte 6 Register" line.byte 0x07 "C1MB22_D7,CAN1 Mailbox 22 Data byte 7 Register" group.word (0x290+0x0e)++0x01 line.word 0x00 "C1MB22_TS,CAN1 Mailbox 22 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((21.==60.)||(21.==61.)||(21.==62.)||(21.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2A0++0x03 hide.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2A0++0x03 line.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2A0++0x03 line.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2A0++0x03 hide.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" endif group.word (0x2A0+0x04)++0x1 line.word 0x00 "C1MB21_DLC,CAN1 Mailbox 21 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "C1MB21_D0,CAN1 Mailbox 21 Data byte 0 Register" line.byte 0x01 "C1MB21_D1,CAN1 Mailbox 21 Data byte 1 Register" line.byte 0x02 "C1MB21_D2,CAN1 Mailbox 21 Data byte 2 Register" line.byte 0x03 "C1MB21_D3,CAN1 Mailbox 21 Data byte 3 Register" line.byte 0x04 "C1MB21_D4,CAN1 Mailbox 21 Data byte 4 Register" line.byte 0x05 "C1MB21_D5,CAN1 Mailbox 21 Data byte 5 Register" line.byte 0x06 "C1MB21_D6,CAN1 Mailbox 21 Data byte 6 Register" line.byte 0x07 "C1MB21_D7,CAN1 Mailbox 21 Data byte 7 Register" group.word (0x2A0+0x0e)++0x01 line.word 0x00 "C1MB21_TS,CAN1 Mailbox 21 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((20.==60.)||(20.==61.)||(20.==62.)||(20.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2B0++0x03 hide.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2B0++0x03 line.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2B0++0x03 line.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2B0++0x03 hide.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" endif group.word (0x2B0+0x04)++0x1 line.word 0x00 "C1MB20_DLC,CAN1 Mailbox 20 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "C1MB20_D0,CAN1 Mailbox 20 Data byte 0 Register" line.byte 0x01 "C1MB20_D1,CAN1 Mailbox 20 Data byte 1 Register" line.byte 0x02 "C1MB20_D2,CAN1 Mailbox 20 Data byte 2 Register" line.byte 0x03 "C1MB20_D3,CAN1 Mailbox 20 Data byte 3 Register" line.byte 0x04 "C1MB20_D4,CAN1 Mailbox 20 Data byte 4 Register" line.byte 0x05 "C1MB20_D5,CAN1 Mailbox 20 Data byte 5 Register" line.byte 0x06 "C1MB20_D6,CAN1 Mailbox 20 Data byte 6 Register" line.byte 0x07 "C1MB20_D7,CAN1 Mailbox 20 Data byte 7 Register" group.word (0x2B0+0x0e)++0x01 line.word 0x00 "C1MB20_TS,CAN1 Mailbox 20 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((19.==60.)||(19.==61.)||(19.==62.)||(19.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2C0++0x03 hide.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2C0++0x03 line.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2C0++0x03 line.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2C0++0x03 hide.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" endif group.word (0x2C0+0x04)++0x1 line.word 0x00 "C1MB19_DLC,CAN1 Mailbox 19 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "C1MB19_D0,CAN1 Mailbox 19 Data byte 0 Register" line.byte 0x01 "C1MB19_D1,CAN1 Mailbox 19 Data byte 1 Register" line.byte 0x02 "C1MB19_D2,CAN1 Mailbox 19 Data byte 2 Register" line.byte 0x03 "C1MB19_D3,CAN1 Mailbox 19 Data byte 3 Register" line.byte 0x04 "C1MB19_D4,CAN1 Mailbox 19 Data byte 4 Register" line.byte 0x05 "C1MB19_D5,CAN1 Mailbox 19 Data byte 5 Register" line.byte 0x06 "C1MB19_D6,CAN1 Mailbox 19 Data byte 6 Register" line.byte 0x07 "C1MB19_D7,CAN1 Mailbox 19 Data byte 7 Register" group.word (0x2C0+0x0e)++0x01 line.word 0x00 "C1MB19_TS,CAN1 Mailbox 19 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((18.==60.)||(18.==61.)||(18.==62.)||(18.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2D0++0x03 hide.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2D0++0x03 line.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2D0++0x03 line.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2D0++0x03 hide.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" endif group.word (0x2D0+0x04)++0x1 line.word 0x00 "C1MB18_DLC,CAN1 Mailbox 18 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "C1MB18_D0,CAN1 Mailbox 18 Data byte 0 Register" line.byte 0x01 "C1MB18_D1,CAN1 Mailbox 18 Data byte 1 Register" line.byte 0x02 "C1MB18_D2,CAN1 Mailbox 18 Data byte 2 Register" line.byte 0x03 "C1MB18_D3,CAN1 Mailbox 18 Data byte 3 Register" line.byte 0x04 "C1MB18_D4,CAN1 Mailbox 18 Data byte 4 Register" line.byte 0x05 "C1MB18_D5,CAN1 Mailbox 18 Data byte 5 Register" line.byte 0x06 "C1MB18_D6,CAN1 Mailbox 18 Data byte 6 Register" line.byte 0x07 "C1MB18_D7,CAN1 Mailbox 18 Data byte 7 Register" group.word (0x2D0+0x0e)++0x01 line.word 0x00 "C1MB18_TS,CAN1 Mailbox 18 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((17.==60.)||(17.==61.)||(17.==62.)||(17.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2E0++0x03 hide.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2E0++0x03 line.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2E0++0x03 line.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2E0++0x03 hide.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" endif group.word (0x2E0+0x04)++0x1 line.word 0x00 "C1MB17_DLC,CAN1 Mailbox 17 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "C1MB17_D0,CAN1 Mailbox 17 Data byte 0 Register" line.byte 0x01 "C1MB17_D1,CAN1 Mailbox 17 Data byte 1 Register" line.byte 0x02 "C1MB17_D2,CAN1 Mailbox 17 Data byte 2 Register" line.byte 0x03 "C1MB17_D3,CAN1 Mailbox 17 Data byte 3 Register" line.byte 0x04 "C1MB17_D4,CAN1 Mailbox 17 Data byte 4 Register" line.byte 0x05 "C1MB17_D5,CAN1 Mailbox 17 Data byte 5 Register" line.byte 0x06 "C1MB17_D6,CAN1 Mailbox 17 Data byte 6 Register" line.byte 0x07 "C1MB17_D7,CAN1 Mailbox 17 Data byte 7 Register" group.word (0x2E0+0x0e)++0x01 line.word 0x00 "C1MB17_TS,CAN1 Mailbox 17 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((16.==60.)||(16.==61.)||(16.==62.)||(16.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2F0++0x03 hide.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2F0++0x03 line.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2F0++0x03 line.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2F0++0x03 hide.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" endif group.word (0x2F0+0x04)++0x1 line.word 0x00 "C1MB16_DLC,CAN1 Mailbox 16 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "C1MB16_D0,CAN1 Mailbox 16 Data byte 0 Register" line.byte 0x01 "C1MB16_D1,CAN1 Mailbox 16 Data byte 1 Register" line.byte 0x02 "C1MB16_D2,CAN1 Mailbox 16 Data byte 2 Register" line.byte 0x03 "C1MB16_D3,CAN1 Mailbox 16 Data byte 3 Register" line.byte 0x04 "C1MB16_D4,CAN1 Mailbox 16 Data byte 4 Register" line.byte 0x05 "C1MB16_D5,CAN1 Mailbox 16 Data byte 5 Register" line.byte 0x06 "C1MB16_D6,CAN1 Mailbox 16 Data byte 6 Register" line.byte 0x07 "C1MB16_D7,CAN1 Mailbox 16 Data byte 7 Register" group.word (0x2F0+0x0e)++0x01 line.word 0x00 "C1MB16_TS,CAN1 Mailbox 16 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((15.==60.)||(15.==61.)||(15.==62.)||(15.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x300++0x03 hide.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x300))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x300++0x03 line.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x300))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x300++0x03 line.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x300++0x03 hide.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" endif group.word (0x300+0x04)++0x1 line.word 0x00 "C1MB15_DLC,CAN1 Mailbox 15 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "C1MB15_D0,CAN1 Mailbox 15 Data byte 0 Register" line.byte 0x01 "C1MB15_D1,CAN1 Mailbox 15 Data byte 1 Register" line.byte 0x02 "C1MB15_D2,CAN1 Mailbox 15 Data byte 2 Register" line.byte 0x03 "C1MB15_D3,CAN1 Mailbox 15 Data byte 3 Register" line.byte 0x04 "C1MB15_D4,CAN1 Mailbox 15 Data byte 4 Register" line.byte 0x05 "C1MB15_D5,CAN1 Mailbox 15 Data byte 5 Register" line.byte 0x06 "C1MB15_D6,CAN1 Mailbox 15 Data byte 6 Register" line.byte 0x07 "C1MB15_D7,CAN1 Mailbox 15 Data byte 7 Register" group.word (0x300+0x0e)++0x01 line.word 0x00 "C1MB15_TS,CAN1 Mailbox 15 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((14.==60.)||(14.==61.)||(14.==62.)||(14.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x310++0x03 hide.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x310))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x310++0x03 line.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x310))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x310++0x03 line.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x310++0x03 hide.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" endif group.word (0x310+0x04)++0x1 line.word 0x00 "C1MB14_DLC,CAN1 Mailbox 14 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "C1MB14_D0,CAN1 Mailbox 14 Data byte 0 Register" line.byte 0x01 "C1MB14_D1,CAN1 Mailbox 14 Data byte 1 Register" line.byte 0x02 "C1MB14_D2,CAN1 Mailbox 14 Data byte 2 Register" line.byte 0x03 "C1MB14_D3,CAN1 Mailbox 14 Data byte 3 Register" line.byte 0x04 "C1MB14_D4,CAN1 Mailbox 14 Data byte 4 Register" line.byte 0x05 "C1MB14_D5,CAN1 Mailbox 14 Data byte 5 Register" line.byte 0x06 "C1MB14_D6,CAN1 Mailbox 14 Data byte 6 Register" line.byte 0x07 "C1MB14_D7,CAN1 Mailbox 14 Data byte 7 Register" group.word (0x310+0x0e)++0x01 line.word 0x00 "C1MB14_TS,CAN1 Mailbox 14 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((13.==60.)||(13.==61.)||(13.==62.)||(13.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x320++0x03 hide.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x320))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x320++0x03 line.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x320))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x320++0x03 line.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x320++0x03 hide.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" endif group.word (0x320+0x04)++0x1 line.word 0x00 "C1MB13_DLC,CAN1 Mailbox 13 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "C1MB13_D0,CAN1 Mailbox 13 Data byte 0 Register" line.byte 0x01 "C1MB13_D1,CAN1 Mailbox 13 Data byte 1 Register" line.byte 0x02 "C1MB13_D2,CAN1 Mailbox 13 Data byte 2 Register" line.byte 0x03 "C1MB13_D3,CAN1 Mailbox 13 Data byte 3 Register" line.byte 0x04 "C1MB13_D4,CAN1 Mailbox 13 Data byte 4 Register" line.byte 0x05 "C1MB13_D5,CAN1 Mailbox 13 Data byte 5 Register" line.byte 0x06 "C1MB13_D6,CAN1 Mailbox 13 Data byte 6 Register" line.byte 0x07 "C1MB13_D7,CAN1 Mailbox 13 Data byte 7 Register" group.word (0x320+0x0e)++0x01 line.word 0x00 "C1MB13_TS,CAN1 Mailbox 13 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((12.==60.)||(12.==61.)||(12.==62.)||(12.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x330++0x03 hide.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x330))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x330++0x03 line.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x330))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x330++0x03 line.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x330++0x03 hide.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" endif group.word (0x330+0x04)++0x1 line.word 0x00 "C1MB12_DLC,CAN1 Mailbox 12 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "C1MB12_D0,CAN1 Mailbox 12 Data byte 0 Register" line.byte 0x01 "C1MB12_D1,CAN1 Mailbox 12 Data byte 1 Register" line.byte 0x02 "C1MB12_D2,CAN1 Mailbox 12 Data byte 2 Register" line.byte 0x03 "C1MB12_D3,CAN1 Mailbox 12 Data byte 3 Register" line.byte 0x04 "C1MB12_D4,CAN1 Mailbox 12 Data byte 4 Register" line.byte 0x05 "C1MB12_D5,CAN1 Mailbox 12 Data byte 5 Register" line.byte 0x06 "C1MB12_D6,CAN1 Mailbox 12 Data byte 6 Register" line.byte 0x07 "C1MB12_D7,CAN1 Mailbox 12 Data byte 7 Register" group.word (0x330+0x0e)++0x01 line.word 0x00 "C1MB12_TS,CAN1 Mailbox 12 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((11.==60.)||(11.==61.)||(11.==62.)||(11.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x340++0x03 hide.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x340))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x340++0x03 line.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x340))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x340++0x03 line.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x340++0x03 hide.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" endif group.word (0x340+0x04)++0x1 line.word 0x00 "C1MB11_DLC,CAN1 Mailbox 11 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "C1MB11_D0,CAN1 Mailbox 11 Data byte 0 Register" line.byte 0x01 "C1MB11_D1,CAN1 Mailbox 11 Data byte 1 Register" line.byte 0x02 "C1MB11_D2,CAN1 Mailbox 11 Data byte 2 Register" line.byte 0x03 "C1MB11_D3,CAN1 Mailbox 11 Data byte 3 Register" line.byte 0x04 "C1MB11_D4,CAN1 Mailbox 11 Data byte 4 Register" line.byte 0x05 "C1MB11_D5,CAN1 Mailbox 11 Data byte 5 Register" line.byte 0x06 "C1MB11_D6,CAN1 Mailbox 11 Data byte 6 Register" line.byte 0x07 "C1MB11_D7,CAN1 Mailbox 11 Data byte 7 Register" group.word (0x340+0x0e)++0x01 line.word 0x00 "C1MB11_TS,CAN1 Mailbox 11 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((10.==60.)||(10.==61.)||(10.==62.)||(10.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x350++0x03 hide.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x350))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x350++0x03 line.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x350))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x350++0x03 line.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x350++0x03 hide.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" endif group.word (0x350+0x04)++0x1 line.word 0x00 "C1MB10_DLC,CAN1 Mailbox 10 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "C1MB10_D0,CAN1 Mailbox 10 Data byte 0 Register" line.byte 0x01 "C1MB10_D1,CAN1 Mailbox 10 Data byte 1 Register" line.byte 0x02 "C1MB10_D2,CAN1 Mailbox 10 Data byte 2 Register" line.byte 0x03 "C1MB10_D3,CAN1 Mailbox 10 Data byte 3 Register" line.byte 0x04 "C1MB10_D4,CAN1 Mailbox 10 Data byte 4 Register" line.byte 0x05 "C1MB10_D5,CAN1 Mailbox 10 Data byte 5 Register" line.byte 0x06 "C1MB10_D6,CAN1 Mailbox 10 Data byte 6 Register" line.byte 0x07 "C1MB10_D7,CAN1 Mailbox 10 Data byte 7 Register" group.word (0x350+0x0e)++0x01 line.word 0x00 "C1MB10_TS,CAN1 Mailbox 10 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((9.==60.)||(9.==61.)||(9.==62.)||(9.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x360++0x03 hide.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x360))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x360++0x03 line.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x360))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x360++0x03 line.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x360++0x03 hide.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" endif group.word (0x360+0x04)++0x1 line.word 0x00 "C1MB9_DLC,CAN1 Mailbox 9 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "C1MB9_D0,CAN1 Mailbox 9 Data byte 0 Register" line.byte 0x01 "C1MB9_D1,CAN1 Mailbox 9 Data byte 1 Register" line.byte 0x02 "C1MB9_D2,CAN1 Mailbox 9 Data byte 2 Register" line.byte 0x03 "C1MB9_D3,CAN1 Mailbox 9 Data byte 3 Register" line.byte 0x04 "C1MB9_D4,CAN1 Mailbox 9 Data byte 4 Register" line.byte 0x05 "C1MB9_D5,CAN1 Mailbox 9 Data byte 5 Register" line.byte 0x06 "C1MB9_D6,CAN1 Mailbox 9 Data byte 6 Register" line.byte 0x07 "C1MB9_D7,CAN1 Mailbox 9 Data byte 7 Register" group.word (0x360+0x0e)++0x01 line.word 0x00 "C1MB9_TS,CAN1 Mailbox 9 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((8.==60.)||(8.==61.)||(8.==62.)||(8.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x370++0x03 hide.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x370))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x370++0x03 line.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x370))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x370++0x03 line.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x370++0x03 hide.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" endif group.word (0x370+0x04)++0x1 line.word 0x00 "C1MB8_DLC,CAN1 Mailbox 8 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "C1MB8_D0,CAN1 Mailbox 8 Data byte 0 Register" line.byte 0x01 "C1MB8_D1,CAN1 Mailbox 8 Data byte 1 Register" line.byte 0x02 "C1MB8_D2,CAN1 Mailbox 8 Data byte 2 Register" line.byte 0x03 "C1MB8_D3,CAN1 Mailbox 8 Data byte 3 Register" line.byte 0x04 "C1MB8_D4,CAN1 Mailbox 8 Data byte 4 Register" line.byte 0x05 "C1MB8_D5,CAN1 Mailbox 8 Data byte 5 Register" line.byte 0x06 "C1MB8_D6,CAN1 Mailbox 8 Data byte 6 Register" line.byte 0x07 "C1MB8_D7,CAN1 Mailbox 8 Data byte 7 Register" group.word (0x370+0x0e)++0x01 line.word 0x00 "C1MB8_TS,CAN1 Mailbox 8 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((7.==60.)||(7.==61.)||(7.==62.)||(7.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x380++0x03 hide.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x380))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x380++0x03 line.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x380))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x380++0x03 line.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x380++0x03 hide.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" endif group.word (0x380+0x04)++0x1 line.word 0x00 "C1MB7_DLC,CAN1 Mailbox 7 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "C1MB7_D0,CAN1 Mailbox 7 Data byte 0 Register" line.byte 0x01 "C1MB7_D1,CAN1 Mailbox 7 Data byte 1 Register" line.byte 0x02 "C1MB7_D2,CAN1 Mailbox 7 Data byte 2 Register" line.byte 0x03 "C1MB7_D3,CAN1 Mailbox 7 Data byte 3 Register" line.byte 0x04 "C1MB7_D4,CAN1 Mailbox 7 Data byte 4 Register" line.byte 0x05 "C1MB7_D5,CAN1 Mailbox 7 Data byte 5 Register" line.byte 0x06 "C1MB7_D6,CAN1 Mailbox 7 Data byte 6 Register" line.byte 0x07 "C1MB7_D7,CAN1 Mailbox 7 Data byte 7 Register" group.word (0x380+0x0e)++0x01 line.word 0x00 "C1MB7_TS,CAN1 Mailbox 7 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((6.==60.)||(6.==61.)||(6.==62.)||(6.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x390++0x03 hide.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x390))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x390++0x03 line.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x390))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x390++0x03 line.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x390++0x03 hide.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" endif group.word (0x390+0x04)++0x1 line.word 0x00 "C1MB6_DLC,CAN1 Mailbox 6 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "C1MB6_D0,CAN1 Mailbox 6 Data byte 0 Register" line.byte 0x01 "C1MB6_D1,CAN1 Mailbox 6 Data byte 1 Register" line.byte 0x02 "C1MB6_D2,CAN1 Mailbox 6 Data byte 2 Register" line.byte 0x03 "C1MB6_D3,CAN1 Mailbox 6 Data byte 3 Register" line.byte 0x04 "C1MB6_D4,CAN1 Mailbox 6 Data byte 4 Register" line.byte 0x05 "C1MB6_D5,CAN1 Mailbox 6 Data byte 5 Register" line.byte 0x06 "C1MB6_D6,CAN1 Mailbox 6 Data byte 6 Register" line.byte 0x07 "C1MB6_D7,CAN1 Mailbox 6 Data byte 7 Register" group.word (0x390+0x0e)++0x01 line.word 0x00 "C1MB6_TS,CAN1 Mailbox 6 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((5.==60.)||(5.==61.)||(5.==62.)||(5.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3A0++0x03 hide.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3A0++0x03 line.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3A0++0x03 line.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3A0++0x03 hide.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" endif group.word (0x3A0+0x04)++0x1 line.word 0x00 "C1MB5_DLC,CAN1 Mailbox 5 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "C1MB5_D0,CAN1 Mailbox 5 Data byte 0 Register" line.byte 0x01 "C1MB5_D1,CAN1 Mailbox 5 Data byte 1 Register" line.byte 0x02 "C1MB5_D2,CAN1 Mailbox 5 Data byte 2 Register" line.byte 0x03 "C1MB5_D3,CAN1 Mailbox 5 Data byte 3 Register" line.byte 0x04 "C1MB5_D4,CAN1 Mailbox 5 Data byte 4 Register" line.byte 0x05 "C1MB5_D5,CAN1 Mailbox 5 Data byte 5 Register" line.byte 0x06 "C1MB5_D6,CAN1 Mailbox 5 Data byte 6 Register" line.byte 0x07 "C1MB5_D7,CAN1 Mailbox 5 Data byte 7 Register" group.word (0x3A0+0x0e)++0x01 line.word 0x00 "C1MB5_TS,CAN1 Mailbox 5 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((4.==60.)||(4.==61.)||(4.==62.)||(4.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3B0++0x03 hide.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3B0++0x03 line.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3B0++0x03 line.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3B0++0x03 hide.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" endif group.word (0x3B0+0x04)++0x1 line.word 0x00 "C1MB4_DLC,CAN1 Mailbox 4 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "C1MB4_D0,CAN1 Mailbox 4 Data byte 0 Register" line.byte 0x01 "C1MB4_D1,CAN1 Mailbox 4 Data byte 1 Register" line.byte 0x02 "C1MB4_D2,CAN1 Mailbox 4 Data byte 2 Register" line.byte 0x03 "C1MB4_D3,CAN1 Mailbox 4 Data byte 3 Register" line.byte 0x04 "C1MB4_D4,CAN1 Mailbox 4 Data byte 4 Register" line.byte 0x05 "C1MB4_D5,CAN1 Mailbox 4 Data byte 5 Register" line.byte 0x06 "C1MB4_D6,CAN1 Mailbox 4 Data byte 6 Register" line.byte 0x07 "C1MB4_D7,CAN1 Mailbox 4 Data byte 7 Register" group.word (0x3B0+0x0e)++0x01 line.word 0x00 "C1MB4_TS,CAN1 Mailbox 4 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((3.==60.)||(3.==61.)||(3.==62.)||(3.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3C0++0x03 hide.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3C0++0x03 line.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3C0++0x03 line.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3C0++0x03 hide.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" endif group.word (0x3C0+0x04)++0x1 line.word 0x00 "C1MB3_DLC,CAN1 Mailbox 3 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "C1MB3_D0,CAN1 Mailbox 3 Data byte 0 Register" line.byte 0x01 "C1MB3_D1,CAN1 Mailbox 3 Data byte 1 Register" line.byte 0x02 "C1MB3_D2,CAN1 Mailbox 3 Data byte 2 Register" line.byte 0x03 "C1MB3_D3,CAN1 Mailbox 3 Data byte 3 Register" line.byte 0x04 "C1MB3_D4,CAN1 Mailbox 3 Data byte 4 Register" line.byte 0x05 "C1MB3_D5,CAN1 Mailbox 3 Data byte 5 Register" line.byte 0x06 "C1MB3_D6,CAN1 Mailbox 3 Data byte 6 Register" line.byte 0x07 "C1MB3_D7,CAN1 Mailbox 3 Data byte 7 Register" group.word (0x3C0+0x0e)++0x01 line.word 0x00 "C1MB3_TS,CAN1 Mailbox 3 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((2.==60.)||(2.==61.)||(2.==62.)||(2.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3D0++0x03 hide.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3D0++0x03 line.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3D0++0x03 line.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3D0++0x03 hide.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" endif group.word (0x3D0+0x04)++0x1 line.word 0x00 "C1MB2_DLC,CAN1 Mailbox 2 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "C1MB2_D0,CAN1 Mailbox 2 Data byte 0 Register" line.byte 0x01 "C1MB2_D1,CAN1 Mailbox 2 Data byte 1 Register" line.byte 0x02 "C1MB2_D2,CAN1 Mailbox 2 Data byte 2 Register" line.byte 0x03 "C1MB2_D3,CAN1 Mailbox 2 Data byte 3 Register" line.byte 0x04 "C1MB2_D4,CAN1 Mailbox 2 Data byte 4 Register" line.byte 0x05 "C1MB2_D5,CAN1 Mailbox 2 Data byte 5 Register" line.byte 0x06 "C1MB2_D6,CAN1 Mailbox 2 Data byte 6 Register" line.byte 0x07 "C1MB2_D7,CAN1 Mailbox 2 Data byte 7 Register" group.word (0x3D0+0x0e)++0x01 line.word 0x00 "C1MB2_TS,CAN1 Mailbox 2 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((1.==60.)||(1.==61.)||(1.==62.)||(1.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3E0++0x03 hide.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3E0++0x03 line.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3E0++0x03 line.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3E0++0x03 hide.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" endif group.word (0x3E0+0x04)++0x1 line.word 0x00 "C1MB1_DLC,CAN1 Mailbox 1 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "C1MB1_D0,CAN1 Mailbox 1 Data byte 0 Register" line.byte 0x01 "C1MB1_D1,CAN1 Mailbox 1 Data byte 1 Register" line.byte 0x02 "C1MB1_D2,CAN1 Mailbox 1 Data byte 2 Register" line.byte 0x03 "C1MB1_D3,CAN1 Mailbox 1 Data byte 3 Register" line.byte 0x04 "C1MB1_D4,CAN1 Mailbox 1 Data byte 4 Register" line.byte 0x05 "C1MB1_D5,CAN1 Mailbox 1 Data byte 5 Register" line.byte 0x06 "C1MB1_D6,CAN1 Mailbox 1 Data byte 6 Register" line.byte 0x07 "C1MB1_D7,CAN1 Mailbox 1 Data byte 7 Register" group.word (0x3E0+0x0e)++0x01 line.word 0x00 "C1MB1_TS,CAN1 Mailbox 1 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" if (((0.==60.)||(0.==61.)||(0.==62.)||(0.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3F0++0x03 hide.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3F0++0x03 line.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3F0++0x03 line.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3F0++0x03 hide.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" endif group.word (0x3F0+0x04)++0x1 line.word 0x00 "C1MB0_DLC,CAN1 Mailbox 0 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "C1MB0_D0,CAN1 Mailbox 0 Data byte 0 Register" line.byte 0x01 "C1MB0_D1,CAN1 Mailbox 0 Data byte 1 Register" line.byte 0x02 "C1MB0_D2,CAN1 Mailbox 0 Data byte 2 Register" line.byte 0x03 "C1MB0_D3,CAN1 Mailbox 0 Data byte 3 Register" line.byte 0x04 "C1MB0_D4,CAN1 Mailbox 0 Data byte 4 Register" line.byte 0x05 "C1MB0_D5,CAN1 Mailbox 0 Data byte 5 Register" line.byte 0x06 "C1MB0_D6,CAN1 Mailbox 0 Data byte 6 Register" line.byte 0x07 "C1MB0_D7,CAN1 Mailbox 0 Data byte 7 Register" group.word (0x3F0+0x0e)++0x01 line.word 0x00 "C1MB0_TS,CAN1 Mailbox 0 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end if (((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.long 0x42c++0x03 line.long 0x0 "C1MIER1,CAN1 Mailbox Interrupt Enable Register 1" bitfld.long 0x00 31. " MB63 ,Mailbox 63 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB62 ,Mailbox 62 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB61 ,Mailbox 61 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB60 ,Mailbox 60 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB59 ,Mailbox 59 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB58 ,Mailbox 58 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Mailbox 57 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB56 ,Mailbox 56 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" else group.long 0x42c++0x03 line.long 0x0 "C1MR1,CAN1 Mailbox Interrupt Enable Register 1" sif (cpu()=="RCARH2") bitfld.long 0x00 29. " MB61 ,Receive FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" textline " " bitfld.long 0x00 28. " MB60 ,Receive FIFO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB57 ,Transmit FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" bitfld.long 0x00 24. " MB56 ,Transmit FIFO Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " MB55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" endif group.long 0x43c++0x03 line.long 0x0 "C1MIER0,CAN1 Mailbox Interrupt Enable Register 0" bitfld.long 0x00 31. " MB31IE ,Mailbox 31 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB30IE ,Mailbox 30 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB29IE ,Mailbox 29 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB28IE ,Mailbox 28 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB27IE ,Mailbox 27 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB26IE ,Mailbox 26 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB25IE ,Mailbox 25 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB24IE ,Mailbox 24 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB23IE ,Mailbox 23 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB22IE ,Mailbox 22 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB21IE ,Mailbox 21 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB20IE ,Mailbox 20 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB19IE ,Mailbox 19 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB18IE ,Mailbox 18 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB17IE ,Mailbox 17 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB16IE ,Mailbox 16 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB15IE ,Mailbox 15 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB14IE ,Mailbox 14 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB13IE ,Mailbox 13 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB12IE ,Mailbox 12 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB11IE ,Mailbox 11 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB10IE ,Mailbox 10 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB9IE ,Mailbox 9 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB8IE ,Mailbox 8 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB7IE ,Mailbox 7 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB6IE ,Mailbox 6 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB5IE ,Mailbox 5 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB4IE ,Mailbox 4 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB3IE ,Mailbox 3 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB2IE ,Mailbox 2 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB1IE ,Mailbox 1 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB0IE ,Mailbox 0 Interrupt enabled" "Disabled,Enabled" tree "Message Control Registers" if (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x0)++0x0 hide.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" endif if (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x1)++0x0 hide.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" endif if (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x2)++0x0 hide.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" endif if (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x3)++0x0 hide.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" endif if (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x4)++0x0 hide.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" endif if (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x5)++0x0 hide.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" endif if (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x6)++0x0 hide.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" endif if (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x7)++0x0 hide.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" endif if (((per.b(ad:0xE6E88000+0x808+0x0))&0xc0)==0x40) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x0))&0xc0)==0x80) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x1))&0xc0)==0x40) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x1))&0xc0)==0x80) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x2))&0xc0)==0x40) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x2))&0xc0)==0x80) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x3))&0xc0)==0x40) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x3))&0xc0)==0x80) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x4))&0xc0)==0x40) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x4))&0xc0)==0x80) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x5))&0xc0)==0x40) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x5))&0xc0)==0x80) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x6))&0xc0)==0x40) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x6))&0xc0)==0x80) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x7))&0xc0)==0x40) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x7))&0xc0)==0x80) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x8))&0xc0)==0x40) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x8))&0xc0)==0x80) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x9))&0xc0)==0x40) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x9))&0xc0)==0x80) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xA))&0xc0)==0x40) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xA))&0xc0)==0x80) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xB))&0xc0)==0x40) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xB))&0xc0)==0x80) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xC))&0xc0)==0x40) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xC))&0xc0)==0x80) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xD))&0xc0)==0x40) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xD))&0xc0)==0x80) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xE))&0xc0)==0x40) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xE))&0xc0)==0x80) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xF))&0xc0)==0x40) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xF))&0xc0)==0x80) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x10))&0xc0)==0x40) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x10))&0xc0)==0x80) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x11))&0xc0)==0x40) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x11))&0xc0)==0x80) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x12))&0xc0)==0x40) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x12))&0xc0)==0x80) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x13))&0xc0)==0x40) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x13))&0xc0)==0x80) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x14))&0xc0)==0x40) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x14))&0xc0)==0x80) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x15))&0xc0)==0x40) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x15))&0xc0)==0x80) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x16))&0xc0)==0x40) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x16))&0xc0)==0x80) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x17))&0xc0)==0x40) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x17))&0xc0)==0x80) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif group.byte 0x820++0x1f line.byte 0x0 "C1MCTL31,CAN1 Message Control Register 31" bitfld.byte 0x0 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x0 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x0 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x0 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1 "C1MCTL30,CAN1 Message Control Register 30" bitfld.byte 0x1 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x2 "C1MCTL29,CAN1 Message Control Register 29" bitfld.byte 0x2 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x2 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x2 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x2 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x3 "C1MCTL28,CAN1 Message Control Register 28" bitfld.byte 0x3 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x3 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x3 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x3 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x4 "C1MCTL27,CAN1 Message Control Register 27" bitfld.byte 0x4 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x4 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x4 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x4 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x5 "C1MCTL26,CAN1 Message Control Register 26" bitfld.byte 0x5 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x5 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x5 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x5 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x6 "C1MCTL25,CAN1 Message Control Register 25" bitfld.byte 0x6 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x6 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x6 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x6 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x7 "C1MCTL24,CAN1 Message Control Register 24" bitfld.byte 0x7 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x7 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x7 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x7 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x8 "C1MCTL23,CAN1 Message Control Register 23" bitfld.byte 0x8 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x8 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x8 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x8 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x9 "C1MCTL22,CAN1 Message Control Register 22" bitfld.byte 0x9 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x9 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x9 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x9 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xA "C1MCTL21,CAN1 Message Control Register 21" bitfld.byte 0xA 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xA 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xA 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xA 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xB "C1MCTL20,CAN1 Message Control Register 20" bitfld.byte 0xB 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xB 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xB 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xB 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xC "C1MCTL19,CAN1 Message Control Register 19" bitfld.byte 0xC 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xC 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xC 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xC 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xD "C1MCTL18,CAN1 Message Control Register 18" bitfld.byte 0xD 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xD 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xD 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xD 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xE "C1MCTL17,CAN1 Message Control Register 17" bitfld.byte 0xE 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xE 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xE 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xE 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xF "C1MCTL16,CAN1 Message Control Register 16" bitfld.byte 0xF 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xF 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xF 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xF 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x10 "C1MCTL15,CAN1 Message Control Register 15" bitfld.byte 0x10 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x10 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x10 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x10 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x11 "C1MCTL14,CAN1 Message Control Register 14" bitfld.byte 0x11 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x11 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x11 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x11 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x12 "C1MCTL13,CAN1 Message Control Register 13" bitfld.byte 0x12 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x12 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x12 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x12 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x13 "C1MCTL12,CAN1 Message Control Register 12" bitfld.byte 0x13 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x13 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x13 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x13 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x14 "C1MCTL11,CAN1 Message Control Register 11" bitfld.byte 0x14 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x14 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x14 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x14 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x15 "C1MCTL10,CAN1 Message Control Register 10" bitfld.byte 0x15 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x15 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x15 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x15 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x16 "C1MCTL9,CAN1 Message Control Register 9" bitfld.byte 0x16 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x16 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x16 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x16 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x17 "C1MCTL8,CAN1 Message Control Register 8" bitfld.byte 0x17 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x17 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x17 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x17 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x18 "C1MCTL7,CAN1 Message Control Register 7" bitfld.byte 0x18 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x18 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x18 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x18 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x19 "C1MCTL6,CAN1 Message Control Register 6" bitfld.byte 0x19 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x19 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x19 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x19 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1A "C1MCTL5,CAN1 Message Control Register 5" bitfld.byte 0x1A 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1A 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1A 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1A 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1B "C1MCTL4,CAN1 Message Control Register 4" bitfld.byte 0x1B 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1B 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1B 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1B 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1C "C1MCTL3,CAN1 Message Control Register 3" bitfld.byte 0x1C 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1C 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1C 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1C 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1D "C1MCTL2,CAN1 Message Control Register 2" bitfld.byte 0x1D 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1D 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1D 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1D 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1E "C1MCTL1,CAN1 Message Control Register 1" bitfld.byte 0x1E 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1E 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1E 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1E 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1F "C1MCTL0,CAN1 Message Control Register 0" bitfld.byte 0x1F 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1F 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1F 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1F 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" tree.end group.byte 0x848++0x0 line.byte 0x0 "C1RFCR,CAN1 Receive FIFO Control Register" bitfld.byte 0x00 7. " RFEST ,Receive FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " RFWST ,Receive FIFO Buffer Warning Status" "Not warning,Warning" textline " " bitfld.byte 0x00 5. " RFFST ,Receive FIFO Full Status" "Not full,Full" bitfld.byte 0x00 4. " RFMLF ,Receive FIFO Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO Unread Message Number Status" "0,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E88000+0x848))&0x1)==0x00) rgroup.byte 0x849++0x0 line.byte 0x0 "C1RFPCR,CAN1 Receive FIFO Pointer Control Register" else group.byte 0x849++0x0 line.byte 0x0 "C1RFPCR,CAN1 Receive FIFO Pointer Control Register" endif group.byte 0x84a++0x0 line.byte 0x0 "C1TFCR,CAN1 Transmit FIFO Control Register" bitfld.byte 0x00 7. " TFEST ,Transmit FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " TFFST ,Transmit FIFO Full Status" "Not full,Full" bitfld.byte 0x00 1.--3. " TFUST ,Transmit FIFO Unsent Message Number Status" "0,1,2,3,4,?..." textline " " bitfld.byte 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E88000+0x84a))&0x1)==0x00) rgroup.byte 0x84b++0x0 line.byte 0x0 "C1TFPCR,CAN1 Transmit FIFO Pointer Control Register" else group.byte 0x84b++0x0 line.byte 0x0 "C1TFPCR,CAN1 Transmit FIFO Pointer Control Register" endif rgroup.word 0x842++0x01 line.word 0x0 "C1STR,CAN1 Status Register" bitfld.word 0x00 14. " RECST ,Receive Status Flag" "Idle/transmission,Reception" textline " " bitfld.word 0x00 13. " TRMST ,Transmit Status Flag" "Idle/reception,Transmission/bus-off" textline " " bitfld.word 0x00 12. " BOST ,Bus-Off Status Flag" "Not bus-off,Bus-off" bitfld.word 0x00 11. " EPST ,Error-Passive Status Flag" "Not error-passive,Error-passive" bitfld.word 0x00 10. " SLPST ,CAN Sleep Status Flag" "Not CAN sleep,CAN sleep" textline " " bitfld.word 0x00 9. " HLTST ,CAN Halt Status Flag" "Not CAN halt,CAN halt" bitfld.word 0x00 8. " RSTST ,CAN Reset Status Flag" "Not CAN reset,CAN reset" bitfld.word 0x00 7. " EST ,Error Status Flag" "No error,Error" textline " " bitfld.word 0x00 6. " TABST ,Transmission Abort Status Flag" "Not occurred,Occurred" bitfld.word 0x00 5. " FMLST ,FIFO Mailbox Message Lost Status Flag" "Not occurred,Occurred" bitfld.word 0x00 4. " NMLST ,Normal Mailbox Message Lost Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 3. " TFST ,Transmit FIFO Status Flag" "Full,Not full" bitfld.word 0x00 2. " RFST ,Receive FIFO Status Flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 0. " NDST ,NEWDATA Status Flag" "Not occurred,Occurred" wgroup.byte 0x851++0x00 line.byte 0x0 "C1CSSR,CAN1 Channel Search Support Register" rgroup.byte 0x852++0x00 line.byte 0x0 "C1MSSR,CAN1 Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search Result Status" "Found,Not found" bitfld.byte 0x00 0.--5. " MBNST ,Search Result Mailbox Number Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.byte 0x853++0x00 line.byte 0x0 "C1MSMR,CAN1 Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox Search Mode Select" "Receive,Transmit,Message lost,Channel" group.word 0x856++0x01 line.word 0x0 "C1AFSR,CAN1 Acceptance Filter Support Register" group.byte 0x84c++0x01 line.byte 0x0 "C1EIER,CAN1 Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus Lock Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload Frame Transmit Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Receive Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " BORIE ,Bus-Off Recovery Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off Entry Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,Error-Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EWIE ,Error-Warning Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C1EIFR,CAN1 Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus Lock Detect Flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload Frame Transmission Detect Flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive Overrun Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 4. " BORIF ,Bus-Off Recovery Detect Flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off Entry Detect Flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error Passive Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 1. " EWIF ,Error Warning Detect Flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus Error Detect Flag" "Not detected,Detected" rgroup.byte 0x84e++0x01 line.byte 0x0 "C1RECR,CAN1 Receive Error Count Register" line.byte 0x1 "C1TECR,CAN1 Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x0 "C1ECSR,CAN1 Error Code Store Register" bitfld.byte 0x0 7. " EDPM ,Error Display Mode Select" "First detected error,Accumulated error" textline " " bitfld.byte 0x0 6. " ADEF ,ACK Delimiter Error Flag" "No ACK delimiter,ACK delimiter" textline " " bitfld.byte 0x0 5. " BE0F ,Bit Error (dominant) Flag" "No error,Error" bitfld.byte 0x0 4. " BE1F ,Bit Error (recessive) Flag" "No error,Error" bitfld.byte 0x0 3. " CEF ,CRC Error Flag" "No error,Error" textline " " bitfld.byte 0x0 2. " AEF ,ACK Error Flag" "No error,Error" bitfld.byte 0x0 1. " FEF ,Form Error Flag" "No error,Error" bitfld.byte 0x0 0. " SEF ,Stuff Error Flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x0 "C1TSR,CAN1 Time Stamp Register" group.byte 0x858++0x00 line.byte 0x0 "C1TCR,CAN1 Test Control Register" bitfld.byte 0x0 1.--2. " TSTM ,CAN Test Mode Select" "Other,Listen-only,External loop back,Internal loop back" textline " " bitfld.byte 0x0 0. " TSTE ,CAN Test Mode Enable" "Disabled,Enabled" group.byte 0x860++0x01 line.byte 0x0 "C1IER,CAN1 Interrupt Enable Register" bitfld.byte 0x0 5. " ERSIE ,Error (ERS) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " RXFIE ,Reception FIFO (RXF) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 3. " TXFIE ,Transmission FIFO (TXF) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " RXM0IE ,Mailbox 0 Successful Reception (RXM0) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 1. " RXM1IE ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TXMIE ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C1ISR,CAN1 Interrupt Status Register" bitfld.byte 0x01 5. " ERSF ,Error (ERS) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 4. " RXFF ,Reception FIFO (RXF) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 3. " TXFF ,Transmission FIFO (TXF) Interrupt Status" "Not detected,Detected" textline " " bitfld.byte 0x01 2. " RXM0F ,Mailbox 0 Successful Reception (RXM0) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 1. " RXM1F ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 0. " TXMF ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Status" "Not detected,Detected" group.byte 0x863++0x00 line.byte 0x0 "C1MBSMR,CAN1 Mailbox Search Mask Register" bitfld.byte 0x0 0. " MB0SM ,Mailbox 0 Search Mask" "Not masked,Masked" sif cpu()=="R8A7792X" group.byte 0x85C++0x00 line.byte 0x00 "C1PECR,CAN1 Parity Error Control Register" bitfld.byte 0x00 7. " PF ,Parity Error Flag" "No error,Error" bitfld.byte 0x00 2. " PIE ,Parity Error Interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " PME ,Parity Enable Bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PM ,Parity Mode" "Operation Mode,Halt mode" group.word 0x85E++0x01 line.word 0x00 "C1PEACR,CAN1 Parity Error Address Capture Register" hexmask.word 0x00 0.--10. 1. " PA ,Parity Error Captured Address Bits" endif width 0xb tree.end tree.end tree "MLP (MediaLB+)" base ad:0xEC520000 width 7. tree "OS62420 registers" group.long 0x00++0x03 line.long 0x00 "MLBC0,MediaLB Control 0 Register" group.long 0x0c++0x03 line.long 0x00 "MS0,MediaLB Channel Status 0 Register" sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) group.long 0x14++0x03 line.long 0x00 "MS1,MediaLB Channel Status 1 Register" endif group.long 0x20++0x03 line.long 0x00 "MSS,MediaLB System Status Register" rgroup.long 0x24++0x03 line.long 0x00 "MSD,MediaLB System Data Register" group.long 0x2c++0x03 line.long 0x00 "MIEN,MediaLB Interrupt Enable Register" group.long 0x3c++0x03 line.long 0x00 "MLBC1,MediaLB Control 1 Register" group.long 0x80++0x03 line.long 0x00 "HCTL,HBI Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x88++0x03 line.long 0x00 "HCMR0,HBI Channel Mask 0 Register" group.long 0x90++0x03 line.long 0x00 "HCER0,HBI Channel Error 0 Register" group.long 0x98++0x03 line.long 0x00 "HCBR0,HBI Channel Busy 0 Register" else group.long 0x88++0x17 line.long 0x00 "HCMR0,HBI Channel Mask 0 Register" line.long 0x04 "HCMR1,HBI Channel Mask 1 Register" line.long 0x08 "HCER0,HBI Channel Error 0 Register" line.long 0x0c "HCER1,HBI Channel Error 1 Register" line.long 0x10 "HCBR0,HBI Channel Busy 0 Register" line.long 0x14 "HCBR1,HBI Channel Busy 1 Register" endif group.long 0xc0++0x0F line.long 0x0 "MDAT0,MIF Data 0 Register" line.long 0x4 "MDAT1,MIF Data 1 Register" line.long 0x8 "MDAT2,MIF Data 2 Register" line.long 0xC "MDAT3,MIF Data 3 Register" group.long 0xD0++0x0F line.long 0x0 "MDWE0,MIF Data Write Enable 0 Register" line.long 0x4 "MDWE1,MIF Data Write Enable 1 Register" line.long 0x8 "MDWE2,MIF Data Write Enable 2 Register" line.long 0xC "MDWE3,MIF Data Write Enable 3 Register" group.long 0xe0++0x7 line.long 0x00 "MCTL,MIF Control Register" line.long 0x04 "MADR,MIF Address Register" group.long 0x3c0++0x03 line.long 0x00 "ACTL,AHB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x3d0++0x03 line.long 0x00 "ACSR0,AHB Channel Status 0 Register" group.long 0x3d8++0x03 line.long 0x00 "ACMR0,AHB Channel Mask 0 Register" else group.long 0x3d0++0x0F line.long 0x00 "ACSR0,AHB Channel Status 0 Register" line.long 0x04 "ACSR1,AHB Channel Status 1 Register" line.long 0x08 "ACMR0,AHB Channel Mask 0 Register" line.long 0x0c "ACMR1,AHB Channel Mask 1 Register" endif tree.end width 12. base ad:0xEC520400 textline " " group.long 0x00++0x03 line.long 0x00 "ATM0,Automatic Transfer Mode 0 Register" bitfld.long 0x00 31. " ATMPI31 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 31" "Disabled,Enabled" bitfld.long 0x00 30. " ATMPI30 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 30" "Disabled,Enabled" bitfld.long 0x00 29. " ATMPI29 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ATMPI28 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 28" "Disabled,Enabled" bitfld.long 0x00 27. " ATMPI27 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 27" "Disabled,Enabled" bitfld.long 0x00 26. " ATMPI26 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " ATMPI25 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 25" "Disabled,Enabled" bitfld.long 0x00 24. " ATMPI24 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 24" "Disabled,Enabled" bitfld.long 0x00 23. " ATMPI23 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ATMPI22 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 22" "Disabled,Enabled" bitfld.long 0x00 21. " ATMPI21 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 21" "Disabled,Enabled" bitfld.long 0x00 20. " ATMPI20 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ATMPI19 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 19" "Disabled,Enabled" bitfld.long 0x00 18. " ATMPI18 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 18" "Disabled,Enabled" bitfld.long 0x00 17. " ATMPI17 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ATMPI16 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 16" "Disabled,Enabled" bitfld.long 0x00 15. " ATMPI15 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 15" "Disabled,Enabled" bitfld.long 0x00 14. " ATMPI14 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ATMPI13 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 13" "Disabled,Enabled" bitfld.long 0x00 12. " ATMPI12 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 12" "Disabled,Enabled" bitfld.long 0x00 11. " ATMPI11 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ATMPI10 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 10" "Disabled,Enabled" bitfld.long 0x00 9. " ATMPI9 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 9" "Disabled,Enabled" bitfld.long 0x00 8. " ATMPI8 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ATMPI7 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 7" "Disabled,Enabled" bitfld.long 0x00 6. " ATMPI6 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 6" "Disabled,Enabled" bitfld.long 0x00 5. " ATMPI5 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ATMPI4 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 4" "Disabled,Enabled" bitfld.long 0x00 3. " ATMPI3 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 3" "Disabled,Enabled" bitfld.long 0x00 2. " ATMPI2 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ATMPI1 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 1" "Disabled,Enabled" sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) group.long 0x04++0x03 line.long 0x00 "ATM1,Automatic Transfer Mode 1 Register" bitfld.long 0x00 31. " ATMPI63 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 63" "Disabled,Enabled" bitfld.long 0x00 30. " ATMPI62 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 62" "Disabled,Enabled" bitfld.long 0x00 29. " ATMPI61 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 61" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ATMPI60 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 60" "Disabled,Enabled" bitfld.long 0x00 27. " ATMPI59 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 59" "Disabled,Enabled" bitfld.long 0x00 26. " ATMPI58 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 58" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " ATMPI57 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 57" "Disabled,Enabled" bitfld.long 0x00 24. " ATMPI56 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 56" "Disabled,Enabled" bitfld.long 0x00 23. " ATMPI55 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 55" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ATMPI54 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 54" "Disabled,Enabled" bitfld.long 0x00 21. " ATMPI53 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 53" "Disabled,Enabled" bitfld.long 0x00 20. " ATMPI52 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 52" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ATMPI51 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 51" "Disabled,Enabled" bitfld.long 0x00 18. " ATMPI50 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 50" "Disabled,Enabled" bitfld.long 0x00 17. " ATMPI49 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 49" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ATMPI48 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 48" "Disabled,Enabled" bitfld.long 0x00 15. " ATMPI47 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 47" "Disabled,Enabled" bitfld.long 0x00 14. " ATMPI46 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 46" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ATMPI45 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 45" "Disabled,Enabled" bitfld.long 0x00 12. " ATMPI44 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 44" "Disabled,Enabled" bitfld.long 0x00 11. " ATMPI43 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 43" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ATMPI42 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 42" "Disabled,Enabled" bitfld.long 0x00 9. " ATMPI41 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 41" "Disabled,Enabled" bitfld.long 0x00 8. " ATMPI40 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 40" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ATMPI39 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 39" "Disabled,Enabled" bitfld.long 0x00 6. " ATMPI38 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 38" "Disabled,Enabled" bitfld.long 0x00 5. " ATMPI37 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 37" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ATMPI36 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 36" "Disabled,Enabled" bitfld.long 0x00 3. " ATMPI35 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 35" "Disabled,Enabled" bitfld.long 0x00 2. " ATMPI34 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 34" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ATMPI33 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 33" "Disabled,Enabled" bitfld.long 0x00 0. " ATMPI32 ,Automatic Transfer Mode (ping buffer page) for Logical Channel 32" "Disabled,Enabled" endif group.long 0x08++0x03 line.long 0x00 "ATM2,Automatic Transfer Mode 2 Register" bitfld.long 0x00 31. " ATMPO31 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 31" "Disabled,Enabled" bitfld.long 0x00 30. " ATMPO30 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 30" "Disabled,Enabled" bitfld.long 0x00 29. " ATMPO29 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ATMPO28 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 28" "Disabled,Enabled" bitfld.long 0x00 27. " ATMPO27 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 27" "Disabled,Enabled" bitfld.long 0x00 26. " ATMPO26 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " ATMPO25 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 25" "Disabled,Enabled" bitfld.long 0x00 24. " ATMPO24 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 24" "Disabled,Enabled" bitfld.long 0x00 23. " ATMPO23 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ATMPO22 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 22" "Disabled,Enabled" bitfld.long 0x00 21. " ATMPO21 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 21" "Disabled,Enabled" bitfld.long 0x00 20. " ATMPO20 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ATMPO19 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 19" "Disabled,Enabled" bitfld.long 0x00 18. " ATMPO18 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 18" "Disabled,Enabled" bitfld.long 0x00 17. " ATMPO17 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ATMPO16 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 16" "Disabled,Enabled" bitfld.long 0x00 15. " ATMPO15 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 15" "Disabled,Enabled" bitfld.long 0x00 14. " ATMPO14 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ATMPO13 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 13" "Disabled,Enabled" bitfld.long 0x00 12. " ATMPO12 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 12" "Disabled,Enabled" bitfld.long 0x00 11. " ATMPO11 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ATMPO10 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 10" "Disabled,Enabled" bitfld.long 0x00 9. " ATMPO9 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 9" "Disabled,Enabled" bitfld.long 0x00 8. " ATMPO8 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ATMPO7 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 7" "Disabled,Enabled" bitfld.long 0x00 6. " ATMPO6 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 6" "Disabled,Enabled" bitfld.long 0x00 5. " ATMPO5 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ATMPO4 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 4" "Disabled,Enabled" bitfld.long 0x00 3. " ATMPO3 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 3" "Disabled,Enabled" bitfld.long 0x00 2. " ATMPO2 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ATMPO1 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 1" "Disabled,Enabled" sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) group.long 0x0C++0x03 line.long 0x00 "ATM3,Automatic Transfer Mode 3 Register" bitfld.long 0x00 31. " ATMPO63 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 63" "Disabled,Enabled" bitfld.long 0x00 30. " ATMPO62 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 62" "Disabled,Enabled" bitfld.long 0x00 29. " ATMPO61 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 61" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ATMPO60 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 60" "Disabled,Enabled" bitfld.long 0x00 27. " ATMPO59 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 59" "Disabled,Enabled" bitfld.long 0x00 26. " ATMPO58 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 58" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " ATMPO57 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 57" "Disabled,Enabled" bitfld.long 0x00 24. " ATMPO56 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 56" "Disabled,Enabled" bitfld.long 0x00 23. " ATMPO55 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 55" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ATMPO54 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 54" "Disabled,Enabled" bitfld.long 0x00 21. " ATMPO53 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 53" "Disabled,Enabled" bitfld.long 0x00 20. " ATMPO52 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 52" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ATMPO51 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 51" "Disabled,Enabled" bitfld.long 0x00 18. " ATMPO50 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 50" "Disabled,Enabled" bitfld.long 0x00 17. " ATMPO49 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 49" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ATMPO48 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 48" "Disabled,Enabled" bitfld.long 0x00 15. " ATMPO47 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 47" "Disabled,Enabled" bitfld.long 0x00 14. " ATMPO46 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 46" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ATMPO45 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 45" "Disabled,Enabled" bitfld.long 0x00 12. " ATMPO44 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 44" "Disabled,Enabled" bitfld.long 0x00 11. " ATMPO43 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 43" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ATMPO42 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 42" "Disabled,Enabled" bitfld.long 0x00 9. " ATMPO41 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 41" "Disabled,Enabled" bitfld.long 0x00 8. " ATMPO40 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 40" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ATMPO39 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 39" "Disabled,Enabled" bitfld.long 0x00 6. " ATMPO38 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 38" "Disabled,Enabled" bitfld.long 0x00 5. " ATMPO37 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 37" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ATMPO36 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 36" "Disabled,Enabled" bitfld.long 0x00 3. " ATMPO35 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 35" "Disabled,Enabled" bitfld.long 0x00 2. " ATMPO34 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 34" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ATMPO33 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 33" "Disabled,Enabled" bitfld.long 0x00 0. " ATMPO32 ,Automatic Transfer Mode (pong buffer page) for Logical Channel 32" "Disabled,Enabled" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x80++0xB line.long 0x00 "ASM,Automatic Start Mode Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 28. " ASM7 ,Automatic Start Mode 7" "0,1" bitfld.long 0x00 24. " ASM6 ,Automatic Start Mode 6" "0,1" bitfld.long 0x00 20. " ASM5 ,Automatic Start Mode 5" "0,1" textline " " bitfld.long 0x00 16. " ASM4 ,Automatic Start Mode 4" "0,1" bitfld.long 0x00 12. " ASM3 ,Automatic Start Mode 3" "0,1" bitfld.long 0x00 8. " ASM2 ,Automatic Start Mode 2" "0,1" textline " " bitfld.long 0x00 4. " ASM1 ,Automatic Start Mode 1" "0,1" bitfld.long 0x00 0. " ASM0 ,Automatic Start Mode 0" "0,1" else bitfld.long 0x00 28. " ASM7 ,Automatic Start Mode 7" "Disabled,Enabled" bitfld.long 0x00 24. " ASM6 ,Automatic Start Mode 6" "Disabled,Enabled" bitfld.long 0x00 20. " ASM5 ,Automatic Start Mode 5" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ASM4 ,Automatic Start Mode 4" "Disabled,Enabled" bitfld.long 0x00 12. " ASM3 ,Automatic Start Mode 3" "Disabled,Enabled" bitfld.long 0x00 8. " ASM2 ,Automatic Start Mode 2" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ASM1 ,Automatic Start Mode 1" "Disabled,Enabled" bitfld.long 0x00 0. " ASM0 ,Automatic Start Mode 0" "Disabled,Enabled" endif line.long 0x04 "ADRDEC1,Address Decode Mode 1 Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 28. " ADEC34 ,Address Decode Mode 34" "0,1" bitfld.long 0x04 27. " ADEC33 ,Address Decode Mode 33" "0,1" bitfld.long 0x04 26. " ADEC32 ,Address Decode Mode 32" "0,1" textline " " bitfld.long 0x04 25. " ADEC31 ,Address Decode Mode 31" "0,1" bitfld.long 0x04 24. " ADEC30 ,Address Decode Mode 30" "0,1" bitfld.long 0x04 20. " ADEC24 ,Address Decode Mode 24" "0,1" textline " " bitfld.long 0x04 19. " ADEC23 ,Address Decode Mode 23" "0,1" bitfld.long 0x04 18. " ADEC22 ,Address Decode Mode 22" "0,1" bitfld.long 0x04 17. " ADEC21 ,Address Decode Mode 21" "0,1" textline " " bitfld.long 0x04 16. " ADEC20 ,Address Decode Mode 20" "0,1" bitfld.long 0x04 12. " ADEC14 ,Address Decode Mode 14" "0,1" bitfld.long 0x04 11. " ADEC13 ,Address Decode Mode 13" "0,1" textline " " bitfld.long 0x04 10. " ADEC12 ,Address Decode Mode 12" "0,1" bitfld.long 0x04 9. " ADEC11 ,Address Decode Mode 11" "0,1" bitfld.long 0x04 8. " ADEC10 ,Address Decode Mode 10" "0,1" textline " " bitfld.long 0x04 4. " ADEC4 ,Address Decode Mode 4" "0,1" bitfld.long 0x04 3. " ADEC3 ,Address Decode Mode 3" "0,1" bitfld.long 0x04 2. " ADEC2 ,Address Decode Mode 2" "0,1" textline " " bitfld.long 0x04 1. " ADEC1 ,Address Decode Mode 1" "0,1" bitfld.long 0x04 0. " ADEC0 ,Address Decode Mode 0" "0,1" else bitfld.long 0x04 29. " ADEC35 ,Address Decode Mode 35" "0,1" bitfld.long 0x04 28. " ADEC34 ,Address Decode Mode 34" "0,1" bitfld.long 0x04 27. " ADEC33 ,Address Decode Mode 33" "0,1" textline " " bitfld.long 0x04 26. " ADEC32 ,Address Decode Mode 32" "0,1" bitfld.long 0x04 25. " ADEC31 ,Address Decode Mode 31" "0,1" bitfld.long 0x04 24. " ADEC30 ,Address Decode Mode 30" "0,1" textline " " bitfld.long 0x04 21. " ADEC25 ,Address Decode Mode 25" "0,1" bitfld.long 0x04 20. " ADEC24 ,Address Decode Mode 24" "0,1" bitfld.long 0x04 19. " ADEC23 ,Address Decode Mode 23" "0,1" textline " " bitfld.long 0x04 18. " ADEC22 ,Address Decode Mode 22" "0,1" bitfld.long 0x04 17. " ADEC21 ,Address Decode Mode 21" "0,1" bitfld.long 0x04 16. " ADEC20 ,Address Decode Mode 20" "0,1" textline " " bitfld.long 0x04 13. " ADEC15 ,Address Decode Mode 15" "0,1" bitfld.long 0x04 12. " ADEC14 ,Address Decode Mode 14" "0,1" bitfld.long 0x04 11. " ADEC13 ,Address Decode Mode 13" "0,1" textline " " bitfld.long 0x04 10. " ADEC12 ,Address Decode Mode 12" "0,1" bitfld.long 0x04 9. " ADEC11 ,Address Decode Mode 11" "0,1" bitfld.long 0x04 8. " ADEC10 ,Address Decode Mode 10" "0,1" textline " " bitfld.long 0x04 5. " ADEC5 ,Address Decode Mode 5" "0,1" bitfld.long 0x04 4. " ADEC4 ,Address Decode Mode 4" "0,1" bitfld.long 0x04 3. " ADEC3 ,Address Decode Mode 3" "0,1" textline " " bitfld.long 0x04 2. " ADEC2 ,Address Decode Mode 2" "0,1" bitfld.long 0x04 1. " ADEC1 ,Address Decode Mode 1" "0,1" bitfld.long 0x04 0. " ADEC0 ,Address Decode Mode 0" "0,1" endif line.long 0x08 "ADRDEC2,Address Decode Mode 2 Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x08 28. " ADEC74 ,Address Decode Mode 74" "0,1" bitfld.long 0x08 27. " ADEC73 ,Address Decode Mode 73" "0,1" bitfld.long 0x08 26. " ADEC72 ,Address Decode Mode 72" "0,1" textline " " bitfld.long 0x08 25. " ADEC71 ,Address Decode Mode 71" "0,1" bitfld.long 0x08 24. " ADEC70 ,Address Decode Mode 70" "0,1" bitfld.long 0x08 20. " ADEC64 ,Address Decode Mode 64" "0,1" textline " " bitfld.long 0x08 19. " ADEC63 ,Address Decode Mode 63" "0,1" bitfld.long 0x08 18. " ADEC62 ,Address Decode Mode 62" "0,1" bitfld.long 0x08 17. " ADEC61 ,Address Decode Mode 61" "0,1" textline " " bitfld.long 0x08 16. " ADEC60 ,Address Decode Mode 60" "0,1" bitfld.long 0x08 12. " ADEC54 ,Address Decode Mode 54" "0,1" bitfld.long 0x08 11. " ADEC53 ,Address Decode Mode 53" "0,1" textline " " bitfld.long 0x08 10. " ADEC52 ,Address Decode Mode 52" "0,1" bitfld.long 0x08 9. " ADEC51 ,Address Decode Mode 51" "0,1" bitfld.long 0x08 8. " ADEC50 ,Address Decode Mode 50" "0,1" textline " " bitfld.long 0x08 4. " ADEC44 ,Address Decode Mode 44" "0,1" bitfld.long 0x08 3. " ADEC43 ,Address Decode Mode 43" "0,1" bitfld.long 0x08 2. " ADEC42 ,Address Decode Mode 42" "0,1" textline " " bitfld.long 0x08 1. " ADEC41 ,Address Decode Mode 41" "0,1" bitfld.long 0x08 0. " ADEC40 ,Address Decode Mode 40" "0,1" else bitfld.long 0x08 29. " ADEC75 ,Address Decode Mode 75" "0,1" bitfld.long 0x08 28. " ADEC74 ,Address Decode Mode 74" "0,1" bitfld.long 0x08 27. " ADEC73 ,Address Decode Mode 73" "0,1" textline " " bitfld.long 0x08 26. " ADEC72 ,Address Decode Mode 72" "0,1" bitfld.long 0x08 25. " ADEC71 ,Address Decode Mode 71" "0,1" bitfld.long 0x08 24. " ADEC70 ,Address Decode Mode 70" "0,1" textline " " bitfld.long 0x08 21. " ADEC65 ,Address Decode Mode 65" "0,1" bitfld.long 0x08 20. " ADEC64 ,Address Decode Mode 64" "0,1" bitfld.long 0x08 19. " ADEC63 ,Address Decode Mode 63" "0,1" textline " " bitfld.long 0x08 18. " ADEC62 ,Address Decode Mode 62" "0,1" bitfld.long 0x08 17. " ADEC61 ,Address Decode Mode 61" "0,1" bitfld.long 0x08 16. " ADEC60 ,Address Decode Mode 60" "0,1" textline " " bitfld.long 0x08 13. " ADEC55 ,Address Decode Mode 55" "0,1" bitfld.long 0x08 12. " ADEC54 ,Address Decode Mode 54" "0,1" bitfld.long 0x08 11. " ADEC53 ,Address Decode Mode 53" "0,1" textline " " bitfld.long 0x08 10. " ADEC52 ,Address Decode Mode 52" "0,1" bitfld.long 0x08 9. " ADEC51 ,Address Decode Mode 51" "0,1" bitfld.long 0x08 8. " ADEC50 ,Address Decode Mode 50" "0,1" textline " " bitfld.long 0x08 5. " ADEC45 ,Address Decode Mode 45" "0,1" bitfld.long 0x08 4. " ADEC44 ,Address Decode Mode 44" "0,1" bitfld.long 0x08 3. " ADEC43 ,Address Decode Mode 43" "0,1" textline " " bitfld.long 0x08 2. " ADEC42 ,Address Decode Mode 42" "0,1" bitfld.long 0x08 1. " ADEC41 ,Address Decode Mode 41" "0,1" bitfld.long 0x08 0. " ADEC40 ,Address Decode Mode 40" "0,1" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x90++0x03 line.long 0x00 "ARRE1,Async Rx Response Enable 1 Register" bitfld.long 0x00 31. " ARRE31 ,Asynchronous Rx Response Enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " ARRE30 ,Asynchronous Rx Response Enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " ARRE29 ,Asynchronous Rx Response Enable 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ARRE28 ,Asynchronous Rx Response Enable 28" "Disabled,Enabled" bitfld.long 0x00 27. " ARRE27 ,Asynchronous Rx Response Enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " ARRE26 ,Asynchronous Rx Response Enable 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " ARRE25 ,Asynchronous Rx Response Enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " ARRE24 ,Asynchronous Rx Response Enable 24" "Disabled,Enabled" bitfld.long 0x00 23. " ARRE23 ,Asynchronous Rx Response Enable 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ARRE22 ,Asynchronous Rx Response Enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " ARRE21 ,Asynchronous Rx Response Enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " ARRE20 ,Asynchronous Rx Response Enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ARRE19 ,Asynchronous Rx Response Enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " ARRE18 ,Asynchronous Rx Response Enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " ARRE17 ,Asynchronous Rx Response Enable 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ARRE16 ,Asynchronous Rx Response Enable 16" "Disabled,Enabled" bitfld.long 0x00 15. " ARRE15 ,Asynchronous Rx Response Enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " ARRE14 ,Asynchronous Rx Response Enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ARRE13 ,Asynchronous Rx Response Enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " ARRE12 ,Asynchronous Rx Response Enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " ARRE11 ,Asynchronous Rx Response Enable 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ARRE10 ,Asynchronous Rx Response Enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " ARRE9 ,Asynchronous Rx Response Enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " ARRE8 ,Asynchronous Rx Response Enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ARRE7 ,Asynchronous Rx Response Enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " ARRE6 ,Asynchronous Rx Response Enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " ARRE5 ,Asynchronous Rx Response Enable 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ARRE4 ,Asynchronous Rx Response Enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " ARRE3 ,Asynchronous Rx Response Enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " ARRE2 ,Asynchronous Rx Response Enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARRE1 ,Asynchronous Rx Response Enable 1" "Disabled,Enabled" wgroup.long 0x98++0x03 line.long 0x00 "ARIS1,Async Rx Interrupt Status 1 Register" eventfld.long 0x00 31. " ARIS31 ,Asynchronous Rx Interrupt Status 31" "No effect,Interrupt" eventfld.long 0x00 30. " ARIS30 ,Asynchronous Rx Interrupt Status 30" "No effect,Interrupt" eventfld.long 0x00 29. " ARIS29 ,Asynchronous Rx Interrupt Status 29" "No effect,Interrupt" textline " " eventfld.long 0x00 28. " ARIS28 ,Asynchronous Rx Interrupt Status 28" "No effect,Interrupt" eventfld.long 0x00 27. " ARIS27 ,Asynchronous Rx Interrupt Status 27" "No effect,Interrupt" eventfld.long 0x00 26. " ARIS26 ,Asynchronous Rx Interrupt Status 26" "No effect,Interrupt" textline " " eventfld.long 0x00 25. " ARIS25 ,Asynchronous Rx Interrupt Status 25" "No effect,Interrupt" eventfld.long 0x00 24. " ARIS24 ,Asynchronous Rx Interrupt Status 24" "No effect,Interrupt" eventfld.long 0x00 23. " ARIS23 ,Asynchronous Rx Interrupt Status 23" "No effect,Interrupt" textline " " eventfld.long 0x00 22. " ARIS22 ,Asynchronous Rx Interrupt Status 22" "No effect,Interrupt" eventfld.long 0x00 21. " ARIS21 ,Asynchronous Rx Interrupt Status 21" "No effect,Interrupt" eventfld.long 0x00 20. " ARIS20 ,Asynchronous Rx Interrupt Status 20" "No effect,Interrupt" textline " " eventfld.long 0x00 19. " ARIS19 ,Asynchronous Rx Interrupt Status 19" "No effect,Interrupt" eventfld.long 0x00 18. " ARIS18 ,Asynchronous Rx Interrupt Status 18" "No effect,Interrupt" eventfld.long 0x00 17. " ARIS17 ,Asynchronous Rx Interrupt Status 17" "No effect,Interrupt" textline " " eventfld.long 0x00 16. " ARIS16 ,Asynchronous Rx Interrupt Status 16" "No effect,Interrupt" eventfld.long 0x00 15. " ARIS15 ,Asynchronous Rx Interrupt Status 15" "No effect,Interrupt" eventfld.long 0x00 14. " ARIS14 ,Asynchronous Rx Interrupt Status 14" "No effect,Interrupt" textline " " eventfld.long 0x00 13. " ARIS13 ,Asynchronous Rx Interrupt Status 13" "No effect,Interrupt" eventfld.long 0x00 12. " ARIS12 ,Asynchronous Rx Interrupt Status 12" "No effect,Interrupt" eventfld.long 0x00 11. " ARIS11 ,Asynchronous Rx Interrupt Status 11" "No effect,Interrupt" textline " " eventfld.long 0x00 10. " ARIS10 ,Asynchronous Rx Interrupt Status 10" "No effect,Interrupt" eventfld.long 0x00 9. " ARIS9 ,Asynchronous Rx Interrupt Status 9" "No effect,Interrupt" eventfld.long 0x00 8. " ARIS8 ,Asynchronous Rx Interrupt Status 8" "No effect,Interrupt" textline " " eventfld.long 0x00 7. " ARIS7 ,Asynchronous Rx Interrupt Status 7" "No effect,Interrupt" eventfld.long 0x00 6. " ARIS6 ,Asynchronous Rx Interrupt Status 6" "No effect,Interrupt" eventfld.long 0x00 5. " ARIS5 ,Asynchronous Rx Interrupt Status 5" "No effect,Interrupt" textline " " eventfld.long 0x00 4. " ARIS4 ,Asynchronous Rx Interrupt Status 4" "No effect,Interrupt" eventfld.long 0x00 3. " ARIS3 ,Asynchronous Rx Interrupt Status 3" "No effect,Interrupt" eventfld.long 0x00 2. " ARIS2 ,Asynchronous Rx Interrupt Status 2" "No effect,Interrupt" textline " " eventfld.long 0x00 1. " ARIS1 ,Asynchronous Rx Interrupt Status 1" "No effect,Interrupt" group.long 0xA0++0x03 line.long 0x00 "ARIE1,Async Rx Interrupt Enable 1 Register" bitfld.long 0x00 31. " ARIE31 ,Asynchronous Rx Interrupt Enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " ARIE30 ,Asynchronous Rx Interrupt Enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " ARIE29 ,Asynchronous Rx Interrupt Enable 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ARIE28 ,Asynchronous Rx Interrupt Enable 28" "Disabled,Enabled" bitfld.long 0x00 27. " ARIE27 ,Asynchronous Rx Interrupt Enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " ARIE26 ,Asynchronous Rx Interrupt Enable 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " ARIE25 ,Asynchronous Rx Interrupt Enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " ARIE24 ,Asynchronous Rx Interrupt Enable 24" "Disabled,Enabled" bitfld.long 0x00 23. " ARIE23 ,Asynchronous Rx Interrupt Enable 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ARIE22 ,Asynchronous Rx Interrupt Enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " ARIE21 ,Asynchronous Rx Interrupt Enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " ARIE20 ,Asynchronous Rx Interrupt Enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ARIE19 ,Asynchronous Rx Interrupt Enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " ARIE18 ,Asynchronous Rx Interrupt Enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " ARIE17 ,Asynchronous Rx Interrupt Enable 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ARIE16 ,Asynchronous Rx Interrupt Enable 16" "Disabled,Enabled" bitfld.long 0x00 15. " ARIE15 ,Asynchronous Rx Interrupt Enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " ARIE14 ,Asynchronous Rx Interrupt Enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ARIE13 ,Asynchronous Rx Interrupt Enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " ARIE12 ,Asynchronous Rx Interrupt Enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " ARIE11 ,Asynchronous Rx Interrupt Enable 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ARIE10 ,Asynchronous Rx Interrupt Enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " ARIE9 ,Asynchronous Rx Interrupt Enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " ARIE8 ,Asynchronous Rx Interrupt Enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ARIE7 ,Asynchronous Rx Interrupt Enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " ARIE6 ,Asynchronous Rx Interrupt Enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " ARIE5 ,Asynchronous Rx Interrupt Enable 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ARIE4 ,Asynchronous Rx Interrupt Enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " ARIE3 ,Asynchronous Rx Interrupt Enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " ARIE2 ,Asynchronous Rx Interrupt Enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARIE1 ,Asynchronous Rx Interrupt Enable 1" "Disabled,Enabled" endif group.long 0x100++0x03 line.long 0x00 "BBCR,AA2S Bridge Control Register" bitfld.long 0x00 0.--1. " EN ,Fix these bits to 11" "0,1,2,3" sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x108++0x03 line.long 0x00 "BUFDCR,AA2S Buffer Drain Control Register" hexmask.long.byte 0x00 24.--31. 1. " WDC ,Fix these bits to H'00" bitfld.long 0x00 17. " WBDE ,This bit is always read as 1. The write value should always be 1" ",1" endif group.long 0x200++0x03 line.long 0x00 "PHYCTRL,MLP-PHY Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2") bitfld.long 0x00 2. " MLB_PLLEN ,PLL Control 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLLEN ,PLL Control" "Disabled,Enabled" bitfld.long 0x00 0. " LVDSEN ,LVDS Buffer Control" "Disabled,Enabled" elif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 2. " MLB_PLLEN ,PLL Control 2" "Disabled,Enabled" else bitfld.long 0x00 1. " PLLEN ,PLL Control" "Disabled,Enabled" bitfld.long 0x00 0. " LVDSEN ,LVDS Buffer Control" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x204++0x03 line.long 0x00 "512FSEN,512FS Enable Register" bitfld.long 0x00 0. " 512FS ,Clock select for MediaLB 3-pin interface" "1024fs,512fs" group.long 0x10++0x03 line.long 0x00 "ASM2,Automatic Start Mode 2 Register" bitfld.long 0x00 0. " ASMR ,Automatic Start Mode for RDY" "0,1" endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) group.long 0x204++0x7 line.long 0x00 "HWSYNCCR,Hardware Synchronization Control Register" bitfld.long 0x00 0.--2. " CNT ,Synchronisation Control" "0,1,2,3,4,5,6,7" line.long 0x04 "HWSTARTCR,Hardware Start Control Register" bitfld.long 0x04 9. " START_CMD1 ,Transfer Start [cmd_out_route1]" "Stopped,Started" bitfld.long 0x04 8. " START_CMD0 ,Transfer Start [cmd_out_route0]" "Stopped,Started" textline " " bitfld.long 0x04 7. " START_SRC9 ,Transfer Start [src_route9]" "Stopped,Started" bitfld.long 0x04 6. " START_SRC6 ,Transfer Start [src_route6]" "Stopped,Started" textline " " bitfld.long 0x04 5. " START_SRC5 ,Transfer Start [src_route5]" "Stopped,Started" bitfld.long 0x04 4. " START_SRC4 ,Transfer Start [src_route4]" "Stopped,Started" textline " " bitfld.long 0x04 3. " START_SRC3 ,Transfer Start [src_route3]" "Stopped,Started" bitfld.long 0x04 2. " START_SRC2 ,Transfer Start [src_route2]" "Stopped,Started" textline " " bitfld.long 0x04 1. " START_SRC1 ,Transfer Start [src_route1]" "Stopped,Started" bitfld.long 0x04 0. " START_SRC0 ,Transfer Start [src_route0]" "Stopped,Started" endif width 0x0B tree.end tree "MLM (MediaLB+ Local Memory)" base ad:0xECC04028 width 12. sif (cpu()=="RCARH2")||(cpu()=="RCARM2") group.long 0x00++0x3 line.long 0x00 "BUFF_ADDR,Top Address of Buffer Memory for Audio Data transfer" button "BUFF_ADDR" "d ad:(ad:0xECC00000)--ad:(ad:0xECC00000+0x1FFC) /long" endif tree "Channel 0 Control Registers" group.long (0x00+0x0)++0x03 line.long 0x00 "DCR0,DMA Control 0 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0x0)++0x07 line.long 0x00 "DCMDR0,DMA Command 0 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR0,DMA Stop 0 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x0)++0x03 line.long 0x00 "DSTSR0,DMA Status 0 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x0)++0x03 line.long 0x00 "DMDR0,Buffer Size Control 0 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 1 Control Registers" group.long (0x00+0x40)++0x03 line.long 0x00 "DCR1,DMA Control 1 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0x40)++0x07 line.long 0x00 "DCMDR1,DMA Command 1 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR1,DMA Stop 1 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x40)++0x03 line.long 0x00 "DSTSR1,DMA Status 1 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x40)++0x03 line.long 0x00 "DMDR1,Buffer Size Control 1 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 2 Control Registers" group.long (0x00+0x80)++0x03 line.long 0x00 "DCR2,DMA Control 2 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0x80)++0x07 line.long 0x00 "DCMDR2,DMA Command 2 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR2,DMA Stop 2 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x80)++0x03 line.long 0x00 "DSTSR2,DMA Status 2 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x80)++0x03 line.long 0x00 "DMDR2,Buffer Size Control 2 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 3 Control Registers" group.long (0x00+0xC0)++0x03 line.long 0x00 "DCR3,DMA Control 3 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0xC0)++0x07 line.long 0x00 "DCMDR3,DMA Command 3 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR3,DMA Stop 3 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0xC0)++0x03 line.long 0x00 "DSTSR3,DMA Status 3 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0xC0)++0x03 line.long 0x00 "DMDR3,Buffer Size Control 3 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 4 Control Registers" group.long (0x00+0x100)++0x03 line.long 0x00 "DCR4,DMA Control 4 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0x100)++0x07 line.long 0x00 "DCMDR4,DMA Command 4 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR4,DMA Stop 4 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x100)++0x03 line.long 0x00 "DSTSR4,DMA Status 4 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x100)++0x03 line.long 0x00 "DMDR4,Buffer Size Control 4 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 5 Control Registers" group.long (0x00+0x140)++0x03 line.long 0x00 "DCR5,DMA Control 5 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0x140)++0x07 line.long 0x00 "DCMDR5,DMA Command 5 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR5,DMA Stop 5 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x140)++0x03 line.long 0x00 "DSTSR5,DMA Status 5 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x140)++0x03 line.long 0x00 "DMDR5,Buffer Size Control 5 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 6 Control Registers" group.long (0x00+0x180)++0x03 line.long 0x00 "DCR6,DMA Control 6 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0x180)++0x07 line.long 0x00 "DCMDR6,DMA Command 6 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR6,DMA Stop 6 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x180)++0x03 line.long 0x00 "DSTSR6,DMA Status 6 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x180)++0x03 line.long 0x00 "DMDR6,Buffer Size Control 6 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 7 Control Registers" group.long (0x00+0x1C0)++0x03 line.long 0x00 "DCR7,DMA Control 7 Register" sif (cpu()=="RCARH2") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP/SPU2IF" elif (cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" else bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SRU" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SRU" endif wgroup.long (0x04+0x1C0)++0x07 line.long 0x00 "DCMDR7,DMA Command 7 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DSTPR7,DMA Stop 7 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x1C0)++0x03 line.long 0x00 "DSTSR7,DMA Status 7 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x1C0)++0x03 line.long 0x00 "DMDR7,Buffer Size Control 7 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end textline " " rgroup.long 0xfe4++0x03 line.long 0x00 "DINTSR,Interrupt Status Register" bitfld.long 0x00 30. " DTE72 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 29. " DTE71 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 28. " DTE70 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 26. " DTE62 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 25. " DTE61 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 24. " DTE60 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 22. " DTE52 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 21. " DTE51 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 20. " DTE50 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 18. " DTE42 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 17. " DTE41 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 16. " DTE40 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 14. " DTE32 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 13. " DTE31 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 12. " DTE30 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 10. " DTE22 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 9. " DTE21 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 8. " DTE20 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 6. " DTE12 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 5. " DTE11 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 4. " DTE10 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 2. " DTE02 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 1. " DTE01 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 0. " DTE00 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" wgroup.long 0xfec++0x03 line.long 0x00 "DINTCR,Interrupt Clear Register" eventfld.long 0x00 30. " DTEC72 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 29. " DTEC71 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 28. " DTEC70 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " eventfld.long 0x00 26. " DTEC62 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 25. " DTEC61 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 24. " DTEC60 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " eventfld.long 0x00 22. " DTEC52 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 21. " DTEC51 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 20. " DTEC50 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " eventfld.long 0x00 18. " DTEC42 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 17. " DTEC41 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 16. " DTEC40 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " eventfld.long 0x00 14. " DTEC32 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 13. " DTEC31 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 12. " DTEC30 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " eventfld.long 0x00 10. " DTEC22 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 9. " DTEC21 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 8. " DTEC20 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " eventfld.long 0x00 6. " DTEC12 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 5. " DTEC11 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 4. " DTEC10 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " eventfld.long 0x00 2. " DTEC02 ,First plane write end interupt clear" "Not cleared,Cleared" eventfld.long 0x00 1. " DTEC01 ,Buffer full/empty interupt clear" "Not cleared,Cleared" eventfld.long 0x00 0. " DTEC00 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" group.long 0xff4++0x03 line.long 0x00 "DINTMR,Interrupt Enable Register" bitfld.long 0x00 30. " DTEM72 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " DTEM71 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTEM70 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " DTEM62 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " DTEM61 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DTEM60 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DTEM52 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " DTEM51 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " DTEM50 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " DTEM42 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " DTEM41 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " DTEM40 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DTEM32 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " DTEM31 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " DTEM30 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DTEM22 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " DTEM21 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " DTEM20 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " DTEM12 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " DTEM11 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " DTEM10 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DTEM02 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " DTEM01 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " DTEM00 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" rgroup.long 0xffc++0x03 line.long 0x00 "DACTSR,DMA Activation State Register" bitfld.long 0x00 7. " DS7 ,DMA Channel 7 State" "Idle,Act" bitfld.long 0x00 6. " DS6 ,DMA Channel 6 State" "Idle,Act" textline " " bitfld.long 0x00 5. " DS5 ,DMA Channel 5 State" "Idle,Act" bitfld.long 0x00 4. " DS4 ,DMA Channel 4 State" "Idle,Act" textline " " bitfld.long 0x00 3. " DS3 ,DMA Channel 3 State" "Idle,Act" bitfld.long 0x00 2. " DS2 ,DMA Channel 2 State" "Idle,Act" textline " " bitfld.long 0x00 1. " DS1 ,DMA Channel 1 State" "Idle,Act" bitfld.long 0x00 0. " DS0 ,DMA Channel 0 State" "Idle,Act" group.long 0x1018++0x1f line.long 0x0 "SRSTR0,Software Reset 0 Register" eventfld.long 0x0 0. " SRST ,Channel 0 Software Reset" "No reset,Reset" line.long 0x4 "SRSTR1,Software Reset 1 Register" eventfld.long 0x4 0. " SRST ,Channel 1 Software Reset" "No reset,Reset" line.long 0x8 "SRSTR2,Software Reset 2 Register" eventfld.long 0x8 0. " SRST ,Channel 2 Software Reset" "No reset,Reset" line.long 0xC "SRSTR3,Software Reset 3 Register" eventfld.long 0xC 0. " SRST ,Channel 3 Software Reset" "No reset,Reset" line.long 0x10 "SRSTR4,Software Reset 4 Register" eventfld.long 0x10 0. " SRST ,Channel 4 Software Reset" "No reset,Reset" line.long 0x14 "SRSTR5,Software Reset 5 Register" eventfld.long 0x14 0. " SRST ,Channel 5 Software Reset" "No reset,Reset" line.long 0x18 "SRSTR6,Software Reset 6 Register" eventfld.long 0x18 0. " SRST ,Channel 6 Software Reset" "No reset,Reset" line.long 0x1C "SRSTR7,Software Reset 7 Register" eventfld.long 0x1C 0. " SRST ,Channel 7 Software Reset" "No reset,Reset" textline "" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*") if (0<2) group.long 0x3D8++0x3 line.long 0x00 "MODE0,Mode 0 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x3D8++0x3 line.long 0x00 "MODE0,Mode 0 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x3D8+0x04)++0x3 line.long 0x00 "SMODE0,Source Mode 0 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x3D8+0x08)++0x3 line.long 0x00 "DALIGN0,Data Alignment 0 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (1<2) group.long 0x418++0x3 line.long 0x00 "MODE1,Mode 1 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x418++0x3 line.long 0x00 "MODE1,Mode 1 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x418+0x04)++0x3 line.long 0x00 "SMODE1,Source Mode 1 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x418+0x08)++0x3 line.long 0x00 "DALIGN1,Data Alignment 1 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (2<2) group.long 0x458++0x3 line.long 0x00 "MODE2,Mode 2 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x458++0x3 line.long 0x00 "MODE2,Mode 2 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x458+0x04)++0x3 line.long 0x00 "SMODE2,Source Mode 2 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x458+0x08)++0x3 line.long 0x00 "DALIGN2,Data Alignment 2 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (3<2) group.long 0x498++0x3 line.long 0x00 "MODE3,Mode 3 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x498++0x3 line.long 0x00 "MODE3,Mode 3 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x498+0x04)++0x3 line.long 0x00 "SMODE3,Source Mode 3 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x498+0x08)++0x3 line.long 0x00 "DALIGN3,Data Alignment 3 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (4<2) group.long 0x4D8++0x3 line.long 0x00 "MODE4,Mode 4 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x4D8++0x3 line.long 0x00 "MODE4,Mode 4 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x4D8+0x04)++0x3 line.long 0x00 "SMODE4,Source Mode 4 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x4D8+0x08)++0x3 line.long 0x00 "DALIGN4,Data Alignment 4 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (5<2) group.long 0x518++0x3 line.long 0x00 "MODE5,Mode 5 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x518++0x3 line.long 0x00 "MODE5,Mode 5 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x518+0x04)++0x3 line.long 0x00 "SMODE5,Source Mode 5 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x518+0x08)++0x3 line.long 0x00 "DALIGN5,Data Alignment 5 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (6<2) group.long 0x558++0x3 line.long 0x00 "MODE6,Mode 6 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x558++0x3 line.long 0x00 "MODE6,Mode 6 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x558+0x04)++0x3 line.long 0x00 "SMODE6,Source Mode 6 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x558+0x08)++0x3 line.long 0x00 "DALIGN6,Data Alignment 6 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (7<2) group.long 0x598++0x3 line.long 0x00 "MODE7,Mode 7 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif else group.long 0x598++0x3 line.long 0x00 "MODE7,Mode 7 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 0. " DMA ,DMA" ",DMA" else bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif endif group.long (0x598+0x04)++0x3 line.long 0x00 "SMODE7,Source Mode 7 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" group.long (0x598+0x08)++0x3 line.long 0x00 "DALIGN7,Data Alignment 7 Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" textline "" rgroup.long 0x17D8++0x3 line.long 0x00 "BUSIFST,Bus Interface Status Register" bitfld.long 0x00 23. " WR_NOT_FULL7 ,Transmission Buffer Status 7" "Full,Not full" bitfld.long 0x00 22. " WR_NOT_FULL6 ,Transmission Buffer Status 6" "Full,Not full" bitfld.long 0x00 21. " WR_NOT_FULL5 ,Transmission Buffer Status 5" "Full,Not full" textline " " bitfld.long 0x00 20. " WR_NOT_FULL4 ,Transmission Buffer Status 4" "Full,Not full" bitfld.long 0x00 19. " WR_NOT_FULL3 ,Transmission Buffer Status 3" "Full,Not full" bitfld.long 0x00 18. " WR_NOT_FULL2 ,Transmission Buffer Status 2" "Full,Not full" textline " " bitfld.long 0x00 17. " WR_NOT_FULL1 ,Transmission Buffer Status 1" "Full,Not full" bitfld.long 0x00 16. " WR_NOT_FULL0 ,Transmission Buffer Status 0" "Full,Not full" bitfld.long 0x00 7. " RD_NOT_EMPTY7 ,Receive Buffer Status 7" "Empty,Not empty" textline " " bitfld.long 0x00 6. " RD_NOT_EMPTY6 ,Receive Buffer Status 6" "Empty,Not empty" bitfld.long 0x00 5. " RD_NOT_EMPTY5 ,Receive Buffer Status 5" "Empty,Not empty" bitfld.long 0x00 4. " RD_NOT_EMPTY4 ,Receive Buffer Status 4" "Empty,Not empty" textline " " bitfld.long 0x00 3. " RD_NOT_EMPTY3 ,Receive Buffer Status 3" "Empty,Not empty" bitfld.long 0x00 2. " RD_NOT_EMPTY2 ,Receive Buffer Status 2" "Empty,Not empty" bitfld.long 0x00 1. " RD_NOT_EMPTY1 ,Receive Buffer Status 1" "Empty,Not empty" textline " " bitfld.long 0x00 0. " RD_NOT_EMPTY0 ,Receive Buffer Status 0" "Empty,Not empty" group.long 0x17DC++0x3 line.long 0x00 "BUSIFINTEN,Bus Interface Interrupt Enable Register" bitfld.long 0x00 23. " WR_NOT_FULL7_IE ,Write interrupt enable 7" "Disabled,Enabled" bitfld.long 0x00 22. " WR_NOT_FULL6_IE ,Write interrupt enable 6" "Disabled,Enabled" bitfld.long 0x00 21. " WR_NOT_FULL5_IE ,Write interrupt enable 5" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WR_NOT_FULL4_IE ,Write interrupt enable 4" "Disabled,Enabled" bitfld.long 0x00 19. " WR_NOT_FULL3_IE ,Write interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 18. " WR_NOT_FULL2_IE ,Write interrupt enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WR_NOT_FULL1_IE ,Write interrupt enable 1" "Disabled,Enabled" bitfld.long 0x00 16. " WR_NOT_FULL0_IE ,Write interrupt enable 0" "Disabled,Enabled" bitfld.long 0x00 7. " RD_NOT_FULL7_IE ,Read interrupt enable 7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RD_NOT_EMPTY6_IE ,Read interrupt enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " RD_NOT_EMPTY5_IE ,Read interrupt enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " RD_NOT_EMPTY4_IE ,Read interrupt enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RD_NOT_EMPTY3_IE ,Read interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " RD_NOT_EMPTY2_IE ,Read interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " RD_NOT_EMPTY1_IE ,Read interrupt enable 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RD_NOT_EMPTY0_IE ,Read interrupt enable 0" "Disabled,Enabled" textline "" rgroup.long 0x3E8++0x3 line.long 0x00 "CHINTSR0,Channel 0 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL0 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY0 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE02 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE01 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE00 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x3E8+0x8)++0x3 line.long 0x00 "CHINTEN0,Channel Interrupt Enable 0 Register" bitfld.long 0x00 20. " WR_NOT_FULL0_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY0_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE02_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE01_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE00_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x428++0x3 line.long 0x00 "CHINTSR1,Channel 1 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL1 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY1 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE12 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE11 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE10 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x428+0x8)++0x3 line.long 0x00 "CHINTEN1,Channel Interrupt Enable 1 Register" bitfld.long 0x00 20. " WR_NOT_FULL1_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY1_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE12_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE11_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE10_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x468++0x3 line.long 0x00 "CHINTSR2,Channel 2 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL2 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY2 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE22 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE21 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE20 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x468+0x8)++0x3 line.long 0x00 "CHINTEN2,Channel Interrupt Enable 2 Register" bitfld.long 0x00 20. " WR_NOT_FULL2_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY2_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE22_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE21_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE20_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x4A8++0x3 line.long 0x00 "CHINTSR3,Channel 3 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL3 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY3 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE32 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE31 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE30 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x4A8+0x8)++0x3 line.long 0x00 "CHINTEN3,Channel Interrupt Enable 3 Register" bitfld.long 0x00 20. " WR_NOT_FULL3_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY3_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE32_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE31_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE30_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x4E8++0x3 line.long 0x00 "CHINTSR4,Channel 4 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL4 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY4 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE42 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE41 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE40 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x4E8+0x8)++0x3 line.long 0x00 "CHINTEN4,Channel Interrupt Enable 4 Register" bitfld.long 0x00 20. " WR_NOT_FULL4_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY4_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE42_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE41_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE40_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x528++0x3 line.long 0x00 "CHINTSR5,Channel 5 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL5 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY5 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE52 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE51 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE50 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x528+0x8)++0x3 line.long 0x00 "CHINTEN5,Channel Interrupt Enable 5 Register" bitfld.long 0x00 20. " WR_NOT_FULL5_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY5_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE52_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE51_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE50_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x568++0x3 line.long 0x00 "CHINTSR6,Channel 6 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL6 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY6 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE62 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE61 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE60 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x568+0x8)++0x3 line.long 0x00 "CHINTEN6,Channel Interrupt Enable 6 Register" bitfld.long 0x00 20. " WR_NOT_FULL6_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY6_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE62_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE61_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE60_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x5A8++0x3 line.long 0x00 "CHINTSR7,Channel 7 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL7 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY7 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE72 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE71 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE70 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x5A8+0x8)++0x3 line.long 0x00 "CHINTEN7,Channel Interrupt Enable 7 Register" bitfld.long 0x00 20. " WR_NOT_FULL7_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY7_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE72_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE71_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE70_IE ,Plane write complete Interrupt" "Disabled,Enabled" endif width 0xb tree "Buffers" width 14. base ad:0xEC020000 sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0x0++0x03 hide.long 0x00 "BUSIF0,Bus Interface 0 Register" in else group.long 0x0++0x03 line.long 0x00 "PLANE_1_BUF0,1st plane of BUF0" button "Buffer" "d (ad:0xEC020000+0x0)--(ad:0xEC020000+0x0+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0x0+0x200)++0x03 line.long 0x00 "PLANE_1_BUF0,1st plane of BUF0" button "Buffer" "d (ad:0xEC020000+0x0+0x200)--(ad:0xEC020000+0x0+0x1ff+0x200) /long" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0x400++0x03 hide.long 0x00 "BUSIF1,Bus Interface 1 Register" in else group.long 0x400++0x03 line.long 0x00 "PLANE_1_BUF1,1st plane of BUF1" button "Buffer" "d (ad:0xEC020000+0x400)--(ad:0xEC020000+0x400+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0x400+0x200)++0x03 line.long 0x00 "PLANE_1_BUF1,1st plane of BUF1" button "Buffer" "d (ad:0xEC020000+0x400+0x200)--(ad:0xEC020000+0x400+0x1ff+0x200) /long" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0x800++0x03 hide.long 0x00 "BUSIF2,Bus Interface 2 Register" in else group.long 0x800++0x03 line.long 0x00 "PLANE_1_BUF2,1st plane of BUF2" button "Buffer" "d (ad:0xEC020000+0x800)--(ad:0xEC020000+0x800+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0x800+0x200)++0x03 line.long 0x00 "PLANE_1_BUF2,1st plane of BUF2" button "Buffer" "d (ad:0xEC020000+0x800+0x200)--(ad:0xEC020000+0x800+0x1ff+0x200) /long" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0xC00++0x03 hide.long 0x00 "BUSIF3,Bus Interface 3 Register" in else group.long 0xC00++0x03 line.long 0x00 "PLANE_1_BUF3,1st plane of BUF3" button "Buffer" "d (ad:0xEC020000+0xC00)--(ad:0xEC020000+0xC00+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0xC00+0x200)++0x03 line.long 0x00 "PLANE_1_BUF3,1st plane of BUF3" button "Buffer" "d (ad:0xEC020000+0xC00+0x200)--(ad:0xEC020000+0xC00+0x1ff+0x200) /long" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0x1000++0x03 hide.long 0x00 "BUSIF4,Bus Interface 4 Register" in else group.long 0x1000++0x03 line.long 0x00 "PLANE_1_BUF4,1st plane of BUF4" button "Buffer" "d (ad:0xEC020000+0x1000)--(ad:0xEC020000+0x1000+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0x1000+0x200)++0x03 line.long 0x00 "PLANE_1_BUF4,1st plane of BUF4" button "Buffer" "d (ad:0xEC020000+0x1000+0x200)--(ad:0xEC020000+0x1000+0x1ff+0x200) /long" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0x1400++0x03 hide.long 0x00 "BUSIF5,Bus Interface 5 Register" in else group.long 0x1400++0x03 line.long 0x00 "PLANE_1_BUF5,1st plane of BUF5" button "Buffer" "d (ad:0xEC020000+0x1400)--(ad:0xEC020000+0x1400+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0x1400+0x200)++0x03 line.long 0x00 "PLANE_1_BUF5,1st plane of BUF5" button "Buffer" "d (ad:0xEC020000+0x1400+0x200)--(ad:0xEC020000+0x1400+0x1ff+0x200) /long" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0x1800++0x03 hide.long 0x00 "BUSIF6,Bus Interface 6 Register" in else group.long 0x1800++0x03 line.long 0x00 "PLANE_1_BUF6,1st plane of BUF6" button "Buffer" "d (ad:0xEC020000+0x1800)--(ad:0xEC020000+0x1800+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0x1800+0x200)++0x03 line.long 0x00 "PLANE_1_BUF6,1st plane of BUF6" button "Buffer" "d (ad:0xEC020000+0x1800+0x200)--(ad:0xEC020000+0x1800+0x1ff+0x200) /long" endif endif sif cpuis("R8J7795*")||cpuis("R8A7795*") hgroup.long 0x1C00++0x03 hide.long 0x00 "BUSIF7,Bus Interface 7 Register" in else group.long 0x1C00++0x03 line.long 0x00 "PLANE_1_BUF7,1st plane of BUF7" button "Buffer" "d (ad:0xEC020000+0x1C00)--(ad:0xEC020000+0x1C00+0x1ff) /long" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2") group.long (0x1C00+0x200)++0x03 line.long 0x00 "PLANE_1_BUF7,1st plane of BUF7" button "Buffer" "d (ad:0xEC020000+0x1C00+0x200)--(ad:0xEC020000+0x1C00+0x1ff+0x200) /long" endif endif tree.end tree.end tree "IEB (IE Bus)" base ad:0xE6EA0000 width 9. group.byte 0x0++0x0 line.byte 0x0 "IECTR,IEBus Control Register" bitfld.byte 0x0 6. " IOL ,Input/output level" "Low,High" bitfld.byte 0x0 5. " DEE ,Broadcast receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 3. " RE ,Receive enable" "Disabled,Enabled" wgroup.byte 0x1++0x0 line.byte 0x0 "IECMR,IEBus Command Register" bitfld.byte 0x0 0.--2. " CMD ,Command" "No operation,,Master request,Master abort,Not affected,,,Not affected" group.byte 0x2++0x5 line.byte 0x0 "IEMCR,IEBus Master Control Register" bitfld.byte 0x0 7. " SS ,Broadcast/Normal communications select" "Broadcast,Normal" bitfld.byte 0x0 4.--6. " RN ,Retransmission counts" "0,1,2,3,4,5,6,7" textline " " bitfld.byte 0x0 0.--3. " CTL ,Control" ",,,,,,,,,,,,,,,Data write" line.byte 0x1 "IEAR1,IEBus Master Unit Address Register 1" bitfld.byte 0x1 4.--7. " IARL4 ,Lower 4 bits of IEBus master unit address" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" bitfld.byte 0x1 2.--3. " IMD ,IEBus communications mode" "0,1,?..." line.byte 0x2 "IEAR2,IEBus Master Unit Address Register 2" line.byte 0x3 "IESA1,IEBus Slave Address Setting Register 1" bitfld.byte 0x3 4.--7. " ISAL4 ,Lower 4 bits of IEBus slave address" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" line.byte 0x4 "IESA2,IEBus Slave Address Setting Register 2" line.byte 0x5 "IETBFL,IEBus Transmit Message Length Register" rgroup.byte 0x9++0x3 line.byte 0x0 "IEMA1,IEBus Reception Master Address Register 1" bitfld.byte 0x0 4.--7. " IMAL4 ,Lower four bits of IEBus reception master address" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" line.byte 0x1 "IEMA2,IEBus Reception Master Address Register 2" line.byte 0x2 "IERCTL,IEBus Receive Control Field Register" bitfld.byte 0x2 0.--3. " RCTL ,IEBus receive control field" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" line.byte 0x3 "IERBFL,IEBus Receive Message Length Register" rgroup.byte 0x10++0x00 line.byte 0x0 "IEFLG,IEBus General Flag Register" bitfld.byte 0x0 7. " CMX ,Command execution status" "Completed,Executed" bitfld.byte 0x0 6. " MRQ ,Master communications request" "Not requested,Requested" textline " " bitfld.byte 0x0 4. " SRE ,Slave receive status" "Not executed,Executed" bitfld.byte 0x0 1. " RSS ,Receive broadcast bit status" "0,1" textline " " bitfld.byte 0x0 0. " GG ,General broadcast reception acknowledgement" "Slave/Not acknowledged,Acknowledged" group.byte 0x11++0x1 line.byte 0x0 "IETSR,IEBus Transmit Status Register" eventfld.byte 0x0 6. " TXS ,Transmit start" "Not started,Started" eventfld.byte 0x0 5. " TXF ,Transmit normal completion" "Not transmitted,Transmitted" textline " " eventfld.byte 0x0 3. " TXEAL ,Arbitration loss" "Not lost,Lost" eventfld.byte 0x0 2. " TXETTME ,Transmit timing error" "No error,Error" textline " " eventfld.byte 0x0 1. " TXERO ,Overflow of maximum number of transmit bytes in one frame" "No overflow,Overflow" eventfld.byte 0x0 0. " TXEACK ,Acknowledge bit status" "Not acknowledged,Acknowledged" line.byte 0x1 "IEIET,IEBus Transmit Interrupt Enable Register" bitfld.byte 0x1 6. " TXSE ,Transmit start interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 5. " TXFE ,Transmit normal completion interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 3. " TXEALE ,Arbitration loss interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 2. " TXETTMEE ,Transmit timing error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 1. " TXEROE ,Overflow of maximum number of transmit bytes in one frame interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 0. " TXEACKE ,Acknowledge bit interrupt enable" "Disabled,Enabled" group.byte 0x14++0x1 line.byte 0x0 "IERSR,IEBus Receive Status Register" eventfld.byte 0x0 7. " RXBSY ,Receive busy" "Not busy,Busy" eventfld.byte 0x0 6. " RXS ,Receive start detection" "Not started,Started" textline " " eventfld.byte 0x0 5. " RXF ,Receive normal completion" "Not received,Received" eventfld.byte 0x0 4. " RXEDE ,Broadcast receive error" "No error,Error" textline " " eventfld.byte 0x0 3. " RXEOVE ,Receive overrun flag" "No overrun,Overrun" eventfld.byte 0x0 2. " RXERTME ,Receive timing error" "No error,Error" textline " " eventfld.byte 0x0 1. " RXEDLE ,Overflow of maximum number of receive bytes in one frame" "No overflow,Overflow" eventfld.byte 0x0 0. " RXEPE ,Parity error" "No error,Error" line.byte 0x1 "IEIER,IEBus Receive Interrupt Enable Register" bitfld.byte 0x1 7. " RXBSYE ,Receive busy interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 6. " RXSE ,Receive start interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 5. " RXFE ,Receive normal completion enable" "Disabled,Enabled" bitfld.byte 0x1 4. " RXEDEE ,Broadcast receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 3. " RXEOVEE ,Overrun control flag interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 2. " RXERTMEE ,Receive timing error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 1. " RXEDLEE ,Overflow of maximum number of receive bytes in one frame interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 0. " RXEPEE ,Parity error interrupt enable" "Disabled,Enabled" group.byte 0x18++0x2 line.byte 0x0 "IECKCYC,IEBus clock cycle register" hexmask.byte 0x0 0.--6. 1. " CKCYC ,Clock period" line.byte 0x1 "IECKHP,IEBus clock high-level width register" hexmask.byte 0x1 0.--6. 1. " CKHP ,Clock signal width at high level" line.byte 0x2 "IECKCNT,IEBus clock control register" bitfld.byte 0x2 2. " CKOEN ,Clock output enable" "Input,Output" bitfld.byte 0x2 1. " CKSS ,Clock source select" "External clock,Internal clock" textline " " bitfld.byte 0x2 0. " DIVEN ,Division period enable" "Disabled,Enabled" tree "IEBus Transmit Data Buffers" width 7. hgroup.byte (0x100+0x0)++0x0 hide.byte 0x0 " TB1 ,IEBus Transmit Data Buffer 1" in hgroup.byte (0x100+0x1)++0x0 hide.byte 0x0 " TB2 ,IEBus Transmit Data Buffer 2" in hgroup.byte (0x100+0x2)++0x0 hide.byte 0x0 " TB3 ,IEBus Transmit Data Buffer 3" in hgroup.byte (0x100+0x3)++0x0 hide.byte 0x0 " TB4 ,IEBus Transmit Data Buffer 4" in hgroup.byte (0x100+0x4)++0x0 hide.byte 0x0 " TB5 ,IEBus Transmit Data Buffer 5" in hgroup.byte (0x100+0x5)++0x0 hide.byte 0x0 " TB6 ,IEBus Transmit Data Buffer 6" in hgroup.byte (0x100+0x6)++0x0 hide.byte 0x0 " TB7 ,IEBus Transmit Data Buffer 7" in hgroup.byte (0x100+0x7)++0x0 hide.byte 0x0 " TB8 ,IEBus Transmit Data Buffer 8" in hgroup.byte (0x100+0x8)++0x0 hide.byte 0x0 " TB9 ,IEBus Transmit Data Buffer 9" in hgroup.byte (0x100+0x9)++0x0 hide.byte 0x0 " TB10 ,IEBus Transmit Data Buffer 10" in hgroup.byte (0x100+0xA)++0x0 hide.byte 0x0 " TB11 ,IEBus Transmit Data Buffer 11" in hgroup.byte (0x100+0xB)++0x0 hide.byte 0x0 " TB12 ,IEBus Transmit Data Buffer 12" in hgroup.byte (0x100+0xC)++0x0 hide.byte 0x0 " TB13 ,IEBus Transmit Data Buffer 13" in hgroup.byte (0x100+0xD)++0x0 hide.byte 0x0 " TB14 ,IEBus Transmit Data Buffer 14" in hgroup.byte (0x100+0xE)++0x0 hide.byte 0x0 " TB15 ,IEBus Transmit Data Buffer 15" in hgroup.byte (0x100+0xF)++0x0 hide.byte 0x0 " TB16 ,IEBus Transmit Data Buffer 16" in hgroup.byte (0x100+0x10)++0x0 hide.byte 0x0 " TB17 ,IEBus Transmit Data Buffer 17" in hgroup.byte (0x100+0x11)++0x0 hide.byte 0x0 " TB18 ,IEBus Transmit Data Buffer 18" in hgroup.byte (0x100+0x12)++0x0 hide.byte 0x0 " TB19 ,IEBus Transmit Data Buffer 19" in hgroup.byte (0x100+0x13)++0x0 hide.byte 0x0 " TB20 ,IEBus Transmit Data Buffer 20" in hgroup.byte (0x100+0x14)++0x0 hide.byte 0x0 " TB21 ,IEBus Transmit Data Buffer 21" in hgroup.byte (0x100+0x15)++0x0 hide.byte 0x0 " TB22 ,IEBus Transmit Data Buffer 22" in hgroup.byte (0x100+0x16)++0x0 hide.byte 0x0 " TB23 ,IEBus Transmit Data Buffer 23" in hgroup.byte (0x100+0x17)++0x0 hide.byte 0x0 " TB24 ,IEBus Transmit Data Buffer 24" in hgroup.byte (0x100+0x18)++0x0 hide.byte 0x0 " TB25 ,IEBus Transmit Data Buffer 25" in hgroup.byte (0x100+0x19)++0x0 hide.byte 0x0 " TB26 ,IEBus Transmit Data Buffer 26" in hgroup.byte (0x100+0x1A)++0x0 hide.byte 0x0 " TB27 ,IEBus Transmit Data Buffer 27" in hgroup.byte (0x100+0x1B)++0x0 hide.byte 0x0 " TB28 ,IEBus Transmit Data Buffer 28" in hgroup.byte (0x100+0x1C)++0x0 hide.byte 0x0 " TB29 ,IEBus Transmit Data Buffer 29" in hgroup.byte (0x100+0x1D)++0x0 hide.byte 0x0 " TB30 ,IEBus Transmit Data Buffer 30" in hgroup.byte (0x100+0x1E)++0x0 hide.byte 0x0 " TB31 ,IEBus Transmit Data Buffer 31" in hgroup.byte (0x100+0x1F)++0x0 hide.byte 0x0 " TB32 ,IEBus Transmit Data Buffer 32" in tree.end tree "IEBus Receive Data Buffers" hgroup.byte (0x200+0x0)++0x0 hide.byte 0x0 " RB1 ,IEBus Receive Data Buffer 1" in hgroup.byte (0x200+0x1)++0x0 hide.byte 0x0 " RB2 ,IEBus Receive Data Buffer 2" in hgroup.byte (0x200+0x2)++0x0 hide.byte 0x0 " RB3 ,IEBus Receive Data Buffer 3" in hgroup.byte (0x200+0x3)++0x0 hide.byte 0x0 " RB4 ,IEBus Receive Data Buffer 4" in hgroup.byte (0x200+0x4)++0x0 hide.byte 0x0 " RB5 ,IEBus Receive Data Buffer 5" in hgroup.byte (0x200+0x5)++0x0 hide.byte 0x0 " RB6 ,IEBus Receive Data Buffer 6" in hgroup.byte (0x200+0x6)++0x0 hide.byte 0x0 " RB7 ,IEBus Receive Data Buffer 7" in hgroup.byte (0x200+0x7)++0x0 hide.byte 0x0 " RB8 ,IEBus Receive Data Buffer 8" in hgroup.byte (0x200+0x8)++0x0 hide.byte 0x0 " RB9 ,IEBus Receive Data Buffer 9" in hgroup.byte (0x200+0x9)++0x0 hide.byte 0x0 " RB10 ,IEBus Receive Data Buffer 10" in hgroup.byte (0x200+0xA)++0x0 hide.byte 0x0 " RB11 ,IEBus Receive Data Buffer 11" in hgroup.byte (0x200+0xB)++0x0 hide.byte 0x0 " RB12 ,IEBus Receive Data Buffer 12" in hgroup.byte (0x200+0xC)++0x0 hide.byte 0x0 " RB13 ,IEBus Receive Data Buffer 13" in hgroup.byte (0x200+0xD)++0x0 hide.byte 0x0 " RB14 ,IEBus Receive Data Buffer 14" in hgroup.byte (0x200+0xE)++0x0 hide.byte 0x0 " RB15 ,IEBus Receive Data Buffer 15" in hgroup.byte (0x200+0xF)++0x0 hide.byte 0x0 " RB16 ,IEBus Receive Data Buffer 16" in hgroup.byte (0x200+0x10)++0x0 hide.byte 0x0 " RB17 ,IEBus Receive Data Buffer 17" in hgroup.byte (0x200+0x11)++0x0 hide.byte 0x0 " RB18 ,IEBus Receive Data Buffer 18" in hgroup.byte (0x200+0x12)++0x0 hide.byte 0x0 " RB19 ,IEBus Receive Data Buffer 19" in hgroup.byte (0x200+0x13)++0x0 hide.byte 0x0 " RB20 ,IEBus Receive Data Buffer 20" in hgroup.byte (0x200+0x14)++0x0 hide.byte 0x0 " RB21 ,IEBus Receive Data Buffer 21" in hgroup.byte (0x200+0x15)++0x0 hide.byte 0x0 " RB22 ,IEBus Receive Data Buffer 22" in hgroup.byte (0x200+0x16)++0x0 hide.byte 0x0 " RB23 ,IEBus Receive Data Buffer 23" in hgroup.byte (0x200+0x17)++0x0 hide.byte 0x0 " RB24 ,IEBus Receive Data Buffer 24" in hgroup.byte (0x200+0x18)++0x0 hide.byte 0x0 " RB25 ,IEBus Receive Data Buffer 25" in hgroup.byte (0x200+0x19)++0x0 hide.byte 0x0 " RB26 ,IEBus Receive Data Buffer 26" in hgroup.byte (0x200+0x1A)++0x0 hide.byte 0x0 " RB27 ,IEBus Receive Data Buffer 27" in hgroup.byte (0x200+0x1B)++0x0 hide.byte 0x0 " RB28 ,IEBus Receive Data Buffer 28" in hgroup.byte (0x200+0x1C)++0x0 hide.byte 0x0 " RB29 ,IEBus Receive Data Buffer 29" in hgroup.byte (0x200+0x1D)++0x0 hide.byte 0x0 " RB30 ,IEBus Receive Data Buffer 30" in hgroup.byte (0x200+0x1E)++0x0 hide.byte 0x0 " RB31 ,IEBus Receive Data Buffer 31" in hgroup.byte (0x200+0x1F)++0x0 hide.byte 0x0 " RB32 ,IEBus Receive Data Buffer 32" in tree.end width 0xb tree.end tree "PCIEC (PCI Express Controls)" base ad:0xFE000000 width 14. tree "PCIEC control registers" group.long 0x10++0x03 line.long 0x00 "PCIECAR,Configuration Transmission Address Register" hexmask.long.byte 0x00 24.--31. 1. " BN ,Bus Number" bitfld.long 0x00 19.--23. " DN ,Device Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--18. " FN ,Function Number" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " EREGNO ,Extended Register No" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 2.--7. " REGNO ,Register No" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x18++0x03 line.long 0x00 "PCIECCTLR,Configuration Transmission Control Register" bitfld.long 0x00 31. " CCIE ,Configuration Send Enable" "Disabled,Enabled" eventfld.long 0x00 21. " WUR ,Write Unsupported Request" "Not received,Received" eventfld.long 0x00 20. " WCRS ,Write CRS" "Not received,Received" textline " " eventfld.long 0x00 17. " RUR ,Read Unsupported Request" "Not received,Received" eventfld.long 0x00 16. " RCRS ,Read CRS" "Not received,Received" bitfld.long 0x00 8. " TYPE ,Configuration Request Type" "Type 0,Type 1" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) group.long 0x20++0x03 line.long 0x00 "PCIECDR,Configuration Transmission Data Register" else hgroup.long 0x20++0x03 hide.long 0x00 "PCIECDR,Configuration Transmission Data Register" endif else group.long 0x20++0x03 line.long 0x00 "PCIECDR,Configuration Transmission Data Register" endif group.long 0x28++0x03 line.long 0x00 "PCIEMSR,Mode Setting Register" bitfld.long 0x00 0. " PEM ,PCI Express Mode" "Endpoint,Root Port" group.long 0x48++0x03 line.long 0x00 "PCIEUNLOCKCR,Unlock Transmission Control Register" bitfld.long 0x00 0. " ASTUNLOCK ,Assert Unlock" "No effect,Assert" if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x400++0x03 line.long 0x00 "PCIEINTXR,INTx Register" bitfld.long 0x00 16. " ASTINTX ,Assert INTx" "Not asserted,Asserted" group.long 0x410++0x03 line.long 0x00 "PCIERMSGR,Message Reception Status Register" eventfld.long 0x00 12. " SLOT_POWER ,SLOT_POWER" "Not received,Received" else group.long 0x400++0x03 line.long 0x00 "PCIEINTXR,INTx Register" bitfld.long 0x00 11. " INTDE ,INTD Enable" "Disabled,Enabled" bitfld.long 0x00 10. " INTCE ,INTC Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " INTBE ,INTB Enable" "Disabled,Enabled" bitfld.long 0x00 8. " INTAE ,INTA Enable" "Disabled,Enabled" rbitfld.long 0x00 3. " INTD ,INTD" "Not asserted,Asserted" textline " " rbitfld.long 0x00 2. " INTC ,INTC" "Not asserted,Asserted" rbitfld.long 0x00 1. " INTB ,INTB" "Not asserted,Asserted" rbitfld.long 0x00 0. " INTA ,INTA" "Not asserted,Asserted" hgroup.long 0x410++0x03 hide.long 0x00 "PCIERMSGR,Message Reception Status Register" endif group.long 0x440++0x03 line.long 0x00 "PCIERMSGIER,Message Reception Interrupt Enable Register" bitfld.long 0x00 12. " SLOT_POWERE ,SLOT_POWERE" "Disabled,Enabled" if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x500++0x03 line.long 0x00 "PCIEPMMSGCR,Power Management Message Transmission Control Register" bitfld.long 0x00 9. " PM_PME ,Allow Issuance of a PM_PME message" "No effect,Allow" else hgroup.long 0x500++0x03 hide.long 0x00 "PCIEPMMSGCR,Power Management Message Transmission Control Register" endif group.long 0x7F0++0x03 line.long 0x00 "PCIEPHYSR,Physical Layer Status Register" bitfld.long 0x00 24. " PHYRDYCE ,PHYRDY Change Enable" "Disabled,Enabled" eventfld.long 0x00 16. " PHYRDYC ,PHYRDY Change" "Not changed,Changed" rbitfld.long 0x00 0. " PHYRDY ,PHYRDY" "Not ready,Ready" if ((((per.l(ad:0xFE000000+0x28))&0x01)==0x00)&&(((per.l(ad:0xFE000000+0x840))&0x80000000)==0x80000000)) group.long 0x840++0x03 line.long 0x00 "PCIEMSITXR,MSI Transmission Register" rbitfld.long 0x00 31. " MSIE ,MSI Enable" "Disabled,Enabled" rbitfld.long 0x00 16.--20. " MMENUM ,Multiple Message Enable Number" "1 source,2 sources,,4 sources,,,,8 sources,,,,,,,,16 sources,,,,,,,,,,,,,,,,32 sources" bitfld.long 0x00 15. " MSIPCLR ,Forcibly clears the MSI interrupt sources to be transmitted" "No effect,Clear" textline " " bitfld.long 0x00 0.--4. " MSIAST ,MSI Assert" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long 0x840++0x03 line.long 0x00 "PCIEMSITXR,MSI Transmission Register" rbitfld.long 0x00 31. " MSIE ,MSI Enable" "Disabled,Enabled" rbitfld.long 0x00 16.--20. " MMENUM ,Multiple Message Enable Number" "1 source,2 sources,,4 sources,,,,8 sources,,,,,,,,16 sources,,,,,,,,,,,,,,,,32 sources" bitfld.long 0x00 15. " MSIPCLR ,Forcibly clears the MSI interrupt sources to be transmitted" "No effect,Clear" endif tree.end tree "PCI Express transfer control registers" group.long 0x2000++0x07 line.long 0x00 "PCIETCTLR,Transfer Control Register" rbitfld.long 0x00 3. " DL_DOWN ,Connection in the data link layer lost" "Not lost,Lost" bitfld.long 0x00 0. " CFINIT ,Configuration Initialization" "Not completed,Completed" line.long 0x04 "PCIETSTR,Transfer Status Register" eventfld.long 0x04 28. " MSIEC ,MSI Enable Change" "Not changed,Changed" eventfld.long 0x04 16. " DLLACTC ,DLLACT Change" "Not changed,Changed" eventfld.long 0x04 12. " INTXDC ,INTx Disable Change" "Not changed,Changed" textline " " rbitfld.long 0x04 0. " DLLACT ,Data Link Layer Active" "Not activated,Activated" if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x2008++0x03 line.long 0x00 "PCIEINTR,Interrupt Register" eventfld.long 0x00 31. " INT_PCITE ,Interrupt PCI Express Transfer Error" "No interrupt,Interrupt" rbitfld.long 0x00 29. " INT_TXALLEMP ,Interrupt TX All Empty" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 13. " INT_MAC ,Interrupt MAC" "No interrupt,Interrupt" rbitfld.long 0x00 12. " INT_PM ,Interrupt PM" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 5. " INT_PCIMES ,Interrupt PCI Message" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_PCIPOWER ,Interrupt PCI Express Power" "No interrupt,Interrupt" eventfld.long 0x00 3. " INT_PCICERR ,Interrupt PCI Correctable Error" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " INT_PCINFERR ,Interrupt PCI Non-Fatal Error" "No interrupt,Interrupt" eventfld.long 0x00 1. " INT_PCIFERR ,Interrupt PCI Fatal Error" "No interrupt,Interrupt" rbitfld.long 0x00 0. " INT_PCISERR ,Interrupt PCI System Error" "No interrupt,Interrupt" else group.long 0x2008++0x03 line.long 0x00 "PCIEINTR,Interrupt Register" eventfld.long 0x00 31. " INT_PCITE ,Interrupt PCI Express Transfer Error" "No interrupt,Interrupt" rbitfld.long 0x00 30. " INT_PM_PME_RCV ,Interrupt PM_PME Receive" "No interrupt,Interrupt" rbitfld.long 0x00 29. " INT_TXALLEMP ,Interrupt TX All Empty" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 28. " INT_PCIBW ,Interrupt PCI Express Bandwidth" "No interrupt,Interrupt" rbitfld.long 0x00 13. " INT_MAC ,Interrupt MAC" "No interrupt,Interrupt" rbitfld.long 0x00 12. " INT_PM ,Interrupt PM" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 5. " INT_PCIMES ,Interrupt PCI Message" "No interrupt,Interrupt" eventfld.long 0x00 4. " INT_PCIPOWER ,Interrupt PCI Express Power" "No interrupt,Interrupt" rbitfld.long 0x00 3. " INT_PCICERR ,Interrupt PCI Correctable Error" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 2. " INT_PCINFERR ,Interrupt PCI Non-Fatal Error" "No interrupt,Interrupt" rbitfld.long 0x00 1. " INT_PCIFERR ,Interrupt PCI Fatal Error" "No interrupt,Interrupt" rbitfld.long 0x00 0. " INT_PCISERR ,Interrupt PCI System Error" "No interrupt,Interrupt" endif group.long 0x200C++0x03 line.long 0x00 "PCIEINTER,Interrupt Enable Register" bitfld.long 0x00 31. " INT_PCITEE ,Interrupt PCI Express Transfer Error Enable" "Disabled,Enabled" bitfld.long 0x00 30. " INT_PM_PME_RCVE ,Interrupt PM_PME Receive Enable" "Disabled,Enabled" bitfld.long 0x00 29. " INT_TXALLEMPE ,Interrupt TX All Empty Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " INT_PCIBWE ,Interrupt PCI Express Bandwidth Enable" "Disabled,Enabled" bitfld.long 0x00 13. " INT_MACE ,Interrupt MAC Enable" "Disabled,Enabled" bitfld.long 0x00 12. " INT_PME ,Interrupt PM Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INT_PCIMESE ,Interrupt Message Enable" "Disabled,Enabled" bitfld.long 0x00 4. " INT_PCIPOWERE ,Interrupt PCI Express Power Enable" "Disabled,Enabled" bitfld.long 0x00 3. " INT_PCICERRE ,Interrupt Correctable Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INT_PCINFERRE ,Interrupt Non-Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x00 1. " INT_PCIFERRE ,Interrupt Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x00 0. " INT_PCISERRE ,Interrupt System Error Enable" "Disabled,Enabled" group.long 0x2020++0x0B line.long 0x00 "PCIEERRFR,Error Factor Register" eventfld.long 0x00 28. " IBERR ,Transfer error on the internal bus" "No error,Error" eventfld.long 0x00 27. " MTLP ,Malformed TLP has been received" "Not received,Received" eventfld.long 0x00 26. " UR ,Unsupported request has been received" "Not received,Received" textline " " eventfld.long 0x00 25. " PTLP ,Poisoned TLP has been received" "Not received,Received" eventfld.long 0x00 21. " POVF ,Posted request packet reception buffer overflow" "No overflow,Overflow" eventfld.long 0x00 20. " NPOVF ,Non-posted request packet reception buffer overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 13. " RCVCPLLK ,Completion lock (without data) has been received" "Not received,Received" eventfld.long 0x00 12. " UNEXPCPL ,Unexpected completion has been received" "Not received,Received" eventfld.long 0x00 9. " RCVSZECPL ,Receive Size Error Completion" "No error,Error" textline " " eventfld.long 0x00 8. " CPLTOUT ,CPL Timeout" "No timeout,Timeout" eventfld.long 0x00 6. " RCVCRSCPL ,Receive Configuration Retry Status Completion" "Not received,Received" eventfld.long 0x00 5. " RCVCACPL ,Receive Completion Abort Status Completion" "Not received,Received" textline " " eventfld.long 0x00 4. " RCVURCPL ,Receive Unsupported Request Status Completion" "Not received,Received" eventfld.long 0x00 1. " SENDCACPL ,Send Completion Abort Status Completion" "Not transmitted,Transmitted" eventfld.long 0x00 0. " SENDURCPL ,Send Unsupported Request Status Completion" "Not transmitted,Transmitted" line.long 0x04 "PCIEERRFER,Error Interrupt Enable Register" bitfld.long 0x04 28. " IBERRE ,IBERRE" "Disabled,Enabled" bitfld.long 0x04 21. " POVFE ,POVFE" "Disabled,Enabled" bitfld.long 0x04 20. " NPOVFE ,NPOVFE" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " RCVCPLLKE ,Receive Completion Lock" "Disabled,Enabled" bitfld.long 0x04 12. " UNEXPCPLE ,Unexpected Completion Enabled" "Disabled,Enabled" bitfld.long 0x04 9. " RCVSZECPLE ,Receive Size Error Completion Enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " CPLTOUTE ,Completion Timeout Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 6. " RCVCRSCPLE ,Configuration Retry Status Completion Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 5. " RCVCACPLE ,Completion Abort Status Completion Receive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " RCVURCPLE ,Unsupported Request Status Completion Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 1. " SENDCACPLE ,Send Completion Abort Status Completion Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 0. " SENDURCPLE ,Send Unsupported Request Status Completion Interrupt Enable" "Disabled,Enabled" line.long 0x08 "PCIEERRFR2,Error Factor Register 2" eventfld.long 0x08 29. " DLLPE ,Data Link Layer Protocol Error" "No error,Error" eventfld.long 0x08 28. " RTO ,Replay Timeout" "No error,Error" eventfld.long 0x08 27. " RNR ,Replay Number Rollover" "No error,Error" textline " " eventfld.long 0x08 26. " BADTLP ,Bad TLP" "No error,Error" eventfld.long 0x08 25. " BADDLLP ,Bad DLLP" "No error,Error" eventfld.long 0x08 15. " RE ,Receiver Error" "No error,Error" group.long 0x2030++0x03 line.long 0x00 "PCIETIER,Transfer Interrupt Enable Register" bitfld.long 0x00 28. " MSIECE ,MSI Enable Change Enable" "Disabled,Enabled" bitfld.long 0x00 16. " DLLACTCE ,DLLACT Change Enable" "Disabled,Enabled" bitfld.long 0x00 12. " INTXDCE ,INTx Disable Change Enable" "Disabled,Enabled" if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x2034++0x07 line.long 0x00 "PCIEPMSR,Power Management State Status Register" eventfld.long 0x00 24. " PSTC ,Power State Change" "Not changed,Changed" rbitfld.long 0x00 8. " PST ,Power State" "D0,Non-D0" line.long 0x04 "PCIEPMSCIER,Power Management State Interrupt Enable Register" bitfld.long 0x04 24. " PSTCE ,Power State Change Enable" "Disabled,Enabled" else hgroup.long 0x2034++0x03 hide.long 0x00 "PCIEPMSR,Power Management State Status Register" hgroup.long 0x2038++0x03 hide.long 0x00 "PCIEPMSCIER,Power Management State Interrupt Enable Register" endif if ((((per.l(ad:0xFE000000+0x28))&0x01)==0x01)&&(((per.l(ad:0xFE000000+0x2048))&0x01)==0x01)) group.long 0x2044++0x03 line.long 0x00 "PCIEMSIFR,MSIF Register" else hgroup.long 0x2044++0x03 hide.long 0x00 "PCIEMSIFR,MSIF Register" endif if (((per.l(ad:0xFE000000+0x2048))&0x01)==0x01) group.long 0x2048++0x0B line.long 0x00 "PCIEMSIALR,MSI Address Lower Register" hexmask.long 0x00 2.--31. 0x04 " MSIAL ,MSI Address Lower" textline " " bitfld.long 0x00 0. " MSIFE ,MSIF Enable" "Disabled,Enabled" textline " " line.long 0x04 "PCIEMSIAUR,MSI Address Upper Register" line.long 0x08 "PCIEMSIIER,MSI Interrupt Enable Register" bitfld.long 0x08 31. " MSIIE[31] ,MSI [31] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 30. " [30] ,MSI [30] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 29. " [29] ,MSI [29] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 28. " [28] ,MSI [28] Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " MSIIE[27] ,MSI [27] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 26. " [26] ,MSI [26] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 25. " [25] ,MSI [25] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 24. " [24] ,MSI [24] Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " MSIIE[23] ,MSI [23] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 22. " [22] ,MSI [22] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 21. " [21] ,MSI [21] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 20. " [20] ,MSI [20] Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " MSIIE[19] ,MSI [19] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 18. " [18] ,MSI [18] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 17. " [17] ,MSI [17] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 16. " [16] ,MSI [16] Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " MSIIE[15] ,MSI [15] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 14. " [14] ,MSI [14] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 13. " [13] ,MSI [13] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 12. " [12] ,MSI [12] Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " MSIIE[11] ,MSI [11] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 10. " [10] ,MSI [10] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 9. " [9] ,MSI [9] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 8. " [8] ,MSI [8] Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " MSIIE[7] ,MSI [7] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 6. " [6] ,MSI [6] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 5. " [5] ,MSI [5] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 4. " [4] ,MSI [4] Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " MSIIE[3] ,MSI [3] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " [2] ,MSI [2] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 1. " [1] ,MSI [1] Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " [0] ,MSI [0] Interrupt Enable" "Disabled,Enabled" else group.long 0x2048++0x03 line.long 0x00 "PCIEMSIALR,MSI Address Lower Register" textline " " bitfld.long 0x00 0. " MSIFE ,MSIF Enable" "Disabled,Enabled" hgroup.long 0x204C++0x07 hide.long 0x00 "PCIEMSIAUR,MSI Address Upper Register" hide.long 0x04 "PCIEMSIIER,MSI Interrupt Enable Register" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) group.long 0x2080++0x03 line.long 0x00 "PCIEPRAR0,PCI Express Root Port Address Register 0" else hgroup.long 0x2080++0x03 hide.long 0x00 "PCIEPRAR0,PCI Express Root Port Address Register 0" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) group.long 0x2084++0x03 line.long 0x00 "PCIEPRAR1,PCI Express Root Port Address Register 1" else hgroup.long 0x2084++0x03 hide.long 0x00 "PCIEPRAR1,PCI Express Root Port Address Register 1" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) group.long 0x2088++0x03 line.long 0x00 "PCIEPRAR2,PCI Express Root Port Address Register 2" else hgroup.long 0x2088++0x03 hide.long 0x00 "PCIEPRAR2,PCI Express Root Port Address Register 2" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) group.long 0x208C++0x03 line.long 0x00 "PCIEPRAR3,PCI Express Root Port Address Register 3" else hgroup.long 0x208C++0x03 hide.long 0x00 "PCIEPRAR3,PCI Express Root Port Address Register 3" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) group.long 0x2090++0x03 line.long 0x00 "PCIEPRAR4,PCI Express Root Port Address Register 4" else hgroup.long 0x2090++0x03 hide.long 0x00 "PCIEPRAR4,PCI Express Root Port Address Register 4" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) group.long 0x2094++0x03 line.long 0x00 "PCIEPRAR5,PCI Express Root Port Address Register 5" else hgroup.long 0x2094++0x03 hide.long 0x00 "PCIEPRAR5,PCI Express Root Port Address Register 5" endif textline " " sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") if (((per.l(ad:0xFE000000+0x2200+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2200++0x03 line.long 0x00 "PCIELAR0,Local Address Register 0" rgroup.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2200++0x03 line.long 0x00 "PCIELAR0,Local Address Register 0" group.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2200++0x03 line.long 0x00 "PCIELAR0,Local Address Register 0" rgroup.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2200++0x03 line.long 0x00 "PCIELAR0,Local Address Register 0" group.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif if (((per.l(ad:0xFE000000+0x2220+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2220++0x03 line.long 0x00 "PCIELAR1,Local Address Register 1" rgroup.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2220++0x03 line.long 0x00 "PCIELAR1,Local Address Register 1" group.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2220++0x03 line.long 0x00 "PCIELAR1,Local Address Register 1" rgroup.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2220++0x03 line.long 0x00 "PCIELAR1,Local Address Register 1" group.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif if (((per.l(ad:0xFE000000+0x2240+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2240++0x03 line.long 0x00 "PCIELAR2,Local Address Register 2" rgroup.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2240++0x03 line.long 0x00 "PCIELAR2,Local Address Register 2" group.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2240++0x03 line.long 0x00 "PCIELAR2,Local Address Register 2" rgroup.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2240++0x03 line.long 0x00 "PCIELAR2,Local Address Register 2" group.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif if (((per.l(ad:0xFE000000+0x2260+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2260++0x03 line.long 0x00 "PCIELAR3,Local Address Register 3" rgroup.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2260++0x03 line.long 0x00 "PCIELAR3,Local Address Register 3" group.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2260++0x03 line.long 0x00 "PCIELAR3,Local Address Register 3" rgroup.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2260++0x03 line.long 0x00 "PCIELAR3,Local Address Register 3" group.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif if (((per.l(ad:0xFE000000+0x2280+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2280++0x03 line.long 0x00 "PCIELAR4,Local Address Register 4" rgroup.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2280++0x03 line.long 0x00 "PCIELAR4,Local Address Register 4" group.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x2280++0x03 line.long 0x00 "PCIELAR4,Local Address Register 4" rgroup.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x2280++0x03 line.long 0x00 "PCIELAR4,Local Address Register 4" group.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif if (((per.l(ad:0xFE000000+0x22A0+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x22A0++0x03 line.long 0x00 "PCIELAR5,Local Address Register 5" rgroup.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x22A0++0x03 line.long 0x00 "PCIELAR5,Local Address Register 5" group.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x2000))&0x01)==0x01) rgroup.long 0x22A0++0x03 line.long 0x00 "PCIELAR5,Local Address Register 5" rgroup.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long 0x22A0++0x03 line.long 0x00 "PCIELAR5,Local Address Register 5" group.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif else group.long 0x2200++0x03 line.long 0x00 "PCIELAR0,Local Address Register 0" if (((per.l(ad:0xFE000000+0x2200+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2200+0x08)++0x03 line.long 0x00 "PCIELAMR0,Local Address Mask Register 0" hexmask.long 0x00 4.--31. 1. " LAM0 ,Local Address Mask 0" bitfld.long 0x00 3. " PMIOLAM0B3 ,Prefetchable Memory or IO Local Address Mask 0 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM0B2 ,Prefetchable Memory or IO Local Address Mask 0 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE0 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif group.long 0x2220++0x03 line.long 0x00 "PCIELAR1,Local Address Register 1" if (((per.l(ad:0xFE000000+0x2220+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2220+0x08)++0x03 line.long 0x00 "PCIELAMR1,Local Address Mask Register 1" hexmask.long 0x00 4.--31. 1. " LAM1 ,Local Address Mask 1" bitfld.long 0x00 3. " PMIOLAM1B3 ,Prefetchable Memory or IO Local Address Mask 1 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM1B2 ,Prefetchable Memory or IO Local Address Mask 1 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE1 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif group.long 0x2240++0x03 line.long 0x00 "PCIELAR2,Local Address Register 2" if (((per.l(ad:0xFE000000+0x2240+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2240+0x08)++0x03 line.long 0x00 "PCIELAMR2,Local Address Mask Register 2" hexmask.long 0x00 4.--31. 1. " LAM2 ,Local Address Mask 2" bitfld.long 0x00 3. " PMIOLAM2B3 ,Prefetchable Memory or IO Local Address Mask 2 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM2B2 ,Prefetchable Memory or IO Local Address Mask 2 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE2 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif group.long 0x2260++0x03 line.long 0x00 "PCIELAR3,Local Address Register 3" if (((per.l(ad:0xFE000000+0x2260+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2260+0x08)++0x03 line.long 0x00 "PCIELAMR3,Local Address Mask Register 3" hexmask.long 0x00 4.--31. 1. " LAM3 ,Local Address Mask 3" bitfld.long 0x00 3. " PMIOLAM3B3 ,Prefetchable Memory or IO Local Address Mask 3 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM3B2 ,Prefetchable Memory or IO Local Address Mask 3 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE3 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif group.long 0x2280++0x03 line.long 0x00 "PCIELAR4,Local Address Register 4" if (((per.l(ad:0xFE000000+0x2280+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x2280+0x08)++0x03 line.long 0x00 "PCIELAMR4,Local Address Mask Register 4" hexmask.long 0x00 4.--31. 1. " LAM4 ,Local Address Mask 4" bitfld.long 0x00 3. " PMIOLAM4B3 ,Prefetchable Memory or IO Local Address Mask 4 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM4B2 ,Prefetchable Memory or IO Local Address Mask 4 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE4 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif group.long 0x22A0++0x03 line.long 0x00 "PCIELAR5,Local Address Register 5" if (((per.l(ad:0xFE000000+0x22A0+0x08))&0x01)==0x00) if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "Non-prefetchable memory,Prefetchable memory" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "32-bit,64-bit" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif else if (((per.l(ad:0xFE000000+0x200))&0x01)==0x01) rgroup.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" else group.long (0x22A0+0x08)++0x03 line.long 0x00 "PCIELAMR5,Local Address Mask Register 5" hexmask.long 0x00 4.--31. 1. " LAM5 ,Local Address Mask 5" bitfld.long 0x00 3. " PMIOLAM5B3 ,Prefetchable Memory or IO Local Address Mask 5 Bit 3" "4 or 8 bytes,16 bytes" bitfld.long 0x00 2. " PMIOLAM5B2 ,Prefetchable Memory or IO Local Address Mask 5 Bit 2" "4 bytes,8+ bytes" textline " " bitfld.long 0x00 1. " LARE5 ,Local Address Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOIND ,IO Indicator" "Memory space,IO space" endif endif endif group.long 0x3400++0x0F line.long 0x00 "PCIEPALR0,PCIEC Address Lower Register 0" hexmask.long 0x00 7.--31. 0x80 " PAL0 ,PCI Express Address Lower" line.long 0x04 "PCIEPAUR0,PCIEC Address Upper Register 0" line.long 0x08 "PCIEPAMR0,PCIEC Address Mask Register 0" hexmask.long 0x08 7.--31. 1. " PAM0 ,PCI Express Address Mask" line.long 0x0C "PCIEPTCTLR0,PCIEC Conversion Control Register 0" bitfld.long 0x0C 31. " PARE ,PAR Enable" "Disabled,Enabled" bitfld.long 0x0C 20.--22. " TC0 ,Traffic Class" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12. " LOCK0 ,Sets the lock of PCI Express packets to be transmitted" "Not locked,Locked" textline " " bitfld.long 0x0C 8. " SPC0 ,Transfer Destination Space" "Memory,IO" bitfld.long 0x0C 4. " ZLR ,Zero-length Read" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x0C 1. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" textline " " bitfld.long 0x0C 0. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" else bitfld.long 0x0C 1. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" textline " " bitfld.long 0x0C 0. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" endif group.long 0x3420++0x0F line.long 0x00 "PCIEPALR1,PCIEC Address Lower Register 1" hexmask.long 0x00 7.--31. 0x80 " PAL1 ,PCI Express Address Lower" line.long 0x04 "PCIEPAUR1,PCIEC Address Upper Register 1" line.long 0x08 "PCIEPAMR1,PCIEC Address Mask Register 1" hexmask.long 0x08 7.--31. 1. " PAM1 ,PCI Express Address Mask" line.long 0x0C "PCIEPTCTLR1,PCIEC Conversion Control Register 1" bitfld.long 0x0C 31. " PARE ,PAR Enable" "Disabled,Enabled" bitfld.long 0x0C 20.--22. " TC1 ,Traffic Class" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12. " LOCK1 ,Sets the lock of PCI Express packets to be transmitted" "Not locked,Locked" textline " " bitfld.long 0x0C 8. " SPC1 ,Transfer Destination Space" "Memory,IO" bitfld.long 0x0C 4. " ZLR ,Zero-length Read" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x0C 1. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" textline " " bitfld.long 0x0C 0. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" else bitfld.long 0x0C 1. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" textline " " bitfld.long 0x0C 0. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" endif group.long 0x3440++0x0F line.long 0x00 "PCIEPALR2,PCIEC Address Lower Register 2" hexmask.long 0x00 7.--31. 0x80 " PAL2 ,PCI Express Address Lower" line.long 0x04 "PCIEPAUR2,PCIEC Address Upper Register 2" line.long 0x08 "PCIEPAMR2,PCIEC Address Mask Register 2" hexmask.long 0x08 7.--31. 1. " PAM2 ,PCI Express Address Mask" line.long 0x0C "PCIEPTCTLR2,PCIEC Conversion Control Register 2" bitfld.long 0x0C 31. " PARE ,PAR Enable" "Disabled,Enabled" bitfld.long 0x0C 20.--22. " TC2 ,Traffic Class" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12. " LOCK2 ,Sets the lock of PCI Express packets to be transmitted" "Not locked,Locked" textline " " bitfld.long 0x0C 8. " SPC2 ,Transfer Destination Space" "Memory,IO" bitfld.long 0x0C 4. " ZLR ,Zero-length Read" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x0C 1. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" textline " " bitfld.long 0x0C 0. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" else bitfld.long 0x0C 1. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" textline " " bitfld.long 0x0C 0. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" endif group.long 0x3460++0x0F line.long 0x00 "PCIEPALR3,PCIEC Address Lower Register 3" hexmask.long 0x00 7.--31. 0x80 " PAL3 ,PCI Express Address Lower" line.long 0x04 "PCIEPAUR3,PCIEC Address Upper Register 3" line.long 0x08 "PCIEPAMR3,PCIEC Address Mask Register 3" hexmask.long 0x08 7.--31. 1. " PAM3 ,PCI Express Address Mask" line.long 0x0C "PCIEPTCTLR3,PCIEC Conversion Control Register 3" bitfld.long 0x0C 31. " PARE ,PAR Enable" "Disabled,Enabled" bitfld.long 0x0C 20.--22. " TC3 ,Traffic Class" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12. " LOCK3 ,Sets the lock of PCI Express packets to be transmitted" "Not locked,Locked" textline " " bitfld.long 0x0C 8. " SPC3 ,Transfer Destination Space" "Memory,IO" bitfld.long 0x0C 4. " ZLR ,Zero-length Read" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x0C 1. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" textline " " bitfld.long 0x0C 0. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" else bitfld.long 0x0C 1. " ATTR0 ,Packet attribute - No snoop" "Snoop,No snoop" textline " " bitfld.long 0x0C 0. " ATTR1 ,Packet attribute - Relaxed ordering" "Normal,Relaxed ordering" endif tree.end tree "PCI Express-DMA control registers" group.long 0x4000++0x03 line.long 0x00 "PCIEDMAOR,PCIEC DMAC DMA Operation Register" bitfld.long 0x00 31. " DMAE ,DMA Enable" "Disabled,Enabled" sif (cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77990*")))||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") rbitfld.long 0x00 16. " DMAACT ,DMA Active" "Not activated,Activated" else bitfld.long 0x00 16. " DMAACT ,DMA Active" "Not activated,Activated" endif textline " " bitfld.long 0x00 0. " ABT ,Arbitration" "0>1>2>3>4>5>6>7,Round robin mode" group.long 0x4100++0x0B line.long 0x00 "PCIEDMPALR0,PCIEC DMAC PCIEC Address Lower Register 0" hexmask.long 0x00 3.--31. 0x8 " PADRL0 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR0,PCIEC DMAC PCIEC Address Upper Register 0" line.long 0x08 "PCIEDMIAR0,PCIEC DMAC Internal Bus Address Register 0" hexmask.long 0x08 3.--31. 0x8 " IADR0 ,Internal Address Lower" group.long (0x4100+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR0,PCIEC DMAC Byte Count Register 0" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x4100+0x20)++0x03 line.long 0x00 "PCIEDMCCAR0,PCIEC DMAC Command Chain Address Register 0" hexmask.long 0x00 5.--31. 0x20 " CCAR0 ,Command Chain Address" group.long (0x4100+0x28)++0x0B line.long 0x00 "PCIEDMCHCR0,PCIEC DMAC Channel Control Register 0" bitfld.long 0x00 31. " CHE0 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR0 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE0 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT0 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR0,PCIEC DMAC Channel Status Register 0" bitfld.long 0x04 28. " CHTCE0 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE0 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE0 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC0 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE0 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE0 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE0 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE0 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R0,PCIEC DMAC Channel Control 2 Register 0" bitfld.long 0x08 28. " CHT0 ,Command Chain Channel Terminate" "No effect,Terminate" group.long 0x4140++0x0B line.long 0x00 "PCIEDMPALR1,PCIEC DMAC PCIEC Address Lower Register 1" hexmask.long 0x00 3.--31. 0x8 " PADRL1 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR1,PCIEC DMAC PCIEC Address Upper Register 1" line.long 0x08 "PCIEDMIAR1,PCIEC DMAC Internal Bus Address Register 1" hexmask.long 0x08 3.--31. 0x8 " IADR1 ,Internal Address Lower" group.long (0x4140+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR1,PCIEC DMAC Byte Count Register 1" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x4140+0x20)++0x03 line.long 0x00 "PCIEDMCCAR1,PCIEC DMAC Command Chain Address Register 1" hexmask.long 0x00 5.--31. 0x20 " CCAR1 ,Command Chain Address" group.long (0x4140+0x28)++0x0B line.long 0x00 "PCIEDMCHCR1,PCIEC DMAC Channel Control Register 1" bitfld.long 0x00 31. " CHE1 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR1 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE1 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT1 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR1,PCIEC DMAC Channel Status Register 1" bitfld.long 0x04 28. " CHTCE1 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE1 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE1 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC1 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE1 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE1 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE1 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE1 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R1,PCIEC DMAC Channel Control 2 Register 1" bitfld.long 0x08 28. " CHT1 ,Command Chain Channel Terminate" "No effect,Terminate" group.long 0x4180++0x0B line.long 0x00 "PCIEDMPALR2,PCIEC DMAC PCIEC Address Lower Register 2" hexmask.long 0x00 3.--31. 0x8 " PADRL2 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR2,PCIEC DMAC PCIEC Address Upper Register 2" line.long 0x08 "PCIEDMIAR2,PCIEC DMAC Internal Bus Address Register 2" hexmask.long 0x08 3.--31. 0x8 " IADR2 ,Internal Address Lower" group.long (0x4180+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR2,PCIEC DMAC Byte Count Register 2" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x4180+0x20)++0x03 line.long 0x00 "PCIEDMCCAR2,PCIEC DMAC Command Chain Address Register 2" hexmask.long 0x00 5.--31. 0x20 " CCAR2 ,Command Chain Address" group.long (0x4180+0x28)++0x0B line.long 0x00 "PCIEDMCHCR2,PCIEC DMAC Channel Control Register 2" bitfld.long 0x00 31. " CHE2 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR2 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE2 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT2 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR2,PCIEC DMAC Channel Status Register 2" bitfld.long 0x04 28. " CHTCE2 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE2 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE2 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC2 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE2 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE2 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE2 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE2 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R2,PCIEC DMAC Channel Control 2 Register 2" bitfld.long 0x08 28. " CHT2 ,Command Chain Channel Terminate" "No effect,Terminate" group.long 0x41C0++0x0B line.long 0x00 "PCIEDMPALR3,PCIEC DMAC PCIEC Address Lower Register 3" hexmask.long 0x00 3.--31. 0x8 " PADRL3 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR3,PCIEC DMAC PCIEC Address Upper Register 3" line.long 0x08 "PCIEDMIAR3,PCIEC DMAC Internal Bus Address Register 3" hexmask.long 0x08 3.--31. 0x8 " IADR3 ,Internal Address Lower" group.long (0x41C0+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR3,PCIEC DMAC Byte Count Register 3" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x41C0+0x20)++0x03 line.long 0x00 "PCIEDMCCAR3,PCIEC DMAC Command Chain Address Register 3" hexmask.long 0x00 5.--31. 0x20 " CCAR3 ,Command Chain Address" group.long (0x41C0+0x28)++0x0B line.long 0x00 "PCIEDMCHCR3,PCIEC DMAC Channel Control Register 3" bitfld.long 0x00 31. " CHE3 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR3 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE3 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT3 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR3,PCIEC DMAC Channel Status Register 3" bitfld.long 0x04 28. " CHTCE3 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE3 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE3 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC3 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE3 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE3 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE3 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE3 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R3,PCIEC DMAC Channel Control 2 Register 3" bitfld.long 0x08 28. " CHT3 ,Command Chain Channel Terminate" "No effect,Terminate" group.long 0x4200++0x0B line.long 0x00 "PCIEDMPALR4,PCIEC DMAC PCIEC Address Lower Register 4" hexmask.long 0x00 3.--31. 0x8 " PADRL4 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR4,PCIEC DMAC PCIEC Address Upper Register 4" line.long 0x08 "PCIEDMIAR4,PCIEC DMAC Internal Bus Address Register 4" hexmask.long 0x08 3.--31. 0x8 " IADR4 ,Internal Address Lower" group.long (0x4200+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR4,PCIEC DMAC Byte Count Register 4" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x4200+0x20)++0x03 line.long 0x00 "PCIEDMCCAR4,PCIEC DMAC Command Chain Address Register 4" hexmask.long 0x00 5.--31. 0x20 " CCAR4 ,Command Chain Address" group.long (0x4200+0x28)++0x0B line.long 0x00 "PCIEDMCHCR4,PCIEC DMAC Channel Control Register 4" bitfld.long 0x00 31. " CHE4 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR4 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE4 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT4 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR4,PCIEC DMAC Channel Status Register 4" bitfld.long 0x04 28. " CHTCE4 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE4 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE4 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC4 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE4 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE4 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE4 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE4 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R4,PCIEC DMAC Channel Control 2 Register 4" bitfld.long 0x08 28. " CHT4 ,Command Chain Channel Terminate" "No effect,Terminate" group.long 0x4240++0x0B line.long 0x00 "PCIEDMPALR5,PCIEC DMAC PCIEC Address Lower Register 5" hexmask.long 0x00 3.--31. 0x8 " PADRL5 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR5,PCIEC DMAC PCIEC Address Upper Register 5" line.long 0x08 "PCIEDMIAR5,PCIEC DMAC Internal Bus Address Register 5" hexmask.long 0x08 3.--31. 0x8 " IADR5 ,Internal Address Lower" group.long (0x4240+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR5,PCIEC DMAC Byte Count Register 5" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x4240+0x20)++0x03 line.long 0x00 "PCIEDMCCAR5,PCIEC DMAC Command Chain Address Register 5" hexmask.long 0x00 5.--31. 0x20 " CCAR5 ,Command Chain Address" group.long (0x4240+0x28)++0x0B line.long 0x00 "PCIEDMCHCR5,PCIEC DMAC Channel Control Register 5" bitfld.long 0x00 31. " CHE5 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR5 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE5 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT5 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR5,PCIEC DMAC Channel Status Register 5" bitfld.long 0x04 28. " CHTCE5 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE5 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE5 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC5 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE5 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE5 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE5 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE5 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R5,PCIEC DMAC Channel Control 2 Register 5" bitfld.long 0x08 28. " CHT5 ,Command Chain Channel Terminate" "No effect,Terminate" group.long 0x4280++0x0B line.long 0x00 "PCIEDMPALR6,PCIEC DMAC PCIEC Address Lower Register 6" hexmask.long 0x00 3.--31. 0x8 " PADRL6 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR6,PCIEC DMAC PCIEC Address Upper Register 6" line.long 0x08 "PCIEDMIAR6,PCIEC DMAC Internal Bus Address Register 6" hexmask.long 0x08 3.--31. 0x8 " IADR6 ,Internal Address Lower" group.long (0x4280+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR6,PCIEC DMAC Byte Count Register 6" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x4280+0x20)++0x03 line.long 0x00 "PCIEDMCCAR6,PCIEC DMAC Command Chain Address Register 6" hexmask.long 0x00 5.--31. 0x20 " CCAR6 ,Command Chain Address" group.long (0x4280+0x28)++0x0B line.long 0x00 "PCIEDMCHCR6,PCIEC DMAC Channel Control Register 6" bitfld.long 0x00 31. " CHE6 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR6 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE6 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT6 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR6,PCIEC DMAC Channel Status Register 6" bitfld.long 0x04 28. " CHTCE6 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE6 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE6 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC6 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE6 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE6 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE6 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE6 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R6,PCIEC DMAC Channel Control 2 Register 6" bitfld.long 0x08 28. " CHT6 ,Command Chain Channel Terminate" "No effect,Terminate" group.long 0x42C0++0x0B line.long 0x00 "PCIEDMPALR7,PCIEC DMAC PCIEC Address Lower Register 7" hexmask.long 0x00 3.--31. 0x8 " PADRL7 ,PCI Express Address Lower" line.long 0x04 "PCIEDMPAUR7,PCIEC DMAC PCIEC Address Upper Register 7" line.long 0x08 "PCIEDMIAR7,PCIEC DMAC Internal Bus Address Register 7" hexmask.long 0x08 3.--31. 0x8 " IADR7 ,Internal Address Lower" group.long (0x42C0+0x10)++0x03 line.long 0x00 "PCIEDMBCNTR7,PCIEC DMAC Byte Count Register 7" hexmask.long 0x00 3.--28. 1. " BCNT ,Byte Count" group.long (0x42C0+0x20)++0x03 line.long 0x00 "PCIEDMCCAR7,PCIEC DMAC Command Chain Address Register 7" hexmask.long 0x00 5.--31. 0x20 " CCAR7 ,Command Chain Address" group.long (0x42C0+0x28)++0x0B line.long 0x00 "PCIEDMCHCR7,PCIEC DMAC Channel Control Register 7" bitfld.long 0x00 31. " CHE7 ,Channel Enable" "Disabled,Enabled" bitfld.long 0x00 30. " DIR7 ,Direction" "PCIE->IB,IB->PCIE" bitfld.long 0x00 29. " CCE7 ,Command Chain Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CHT7 ,Channel Terminate" "Not terminated,Terminated" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") bitfld.long 0x00 21. " ATTR1 ,ATTR1" "Normal,Relaxed" bitfld.long 0x00 20. " ATTR0 ,ATTR0" "Snoop,No snoop" textline " " bitfld.long 0x00 9.--11. " TC ,Specifies the traffic class (TC) of the PCI Express packet to be transferred" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 21. " ATTR0 ,ATTR0" "Snoop,No snoop" bitfld.long 0x00 20. " ATTR1 ,ATTR1" "Normal,Relaxed ordering" textline " " bitfld.long 0x00 9.--11. " TC ,TC" "0,1,2,3,4,5,6,7" endif line.long 0x04 "PCIEDMCHSR7,PCIEC DMAC Channel Status Register 7" bitfld.long 0x04 28. " CHTCE7 ,Channel Terminate Complete Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEEE7 ,PCIE Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " IBEE7 ,Internal Bus Error Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x04 12. " CHTC7 ,Channel Terminate Complete" "Not completed,Completed" eventfld.long 0x04 11. " PEE7 ,PCIE Error" "No error,Error" eventfld.long 0x04 9. " IBE7 ,Internal Bus Error" "No error,Error" textline " " bitfld.long 0x04 3. " IE7 ,Interrupt Enable" "Disabled,Enabled" eventfld.long 0x04 0. " TE7 ,Transfer End" "Not ended,Ended" line.long 0x08 "PCIEDMCHC2R7,PCIEC DMAC Channel Control 2 Register 7" bitfld.long 0x08 28. " CHT7 ,Command Chain Channel Terminate" "No effect,Terminate" tree.end tree "Configuration registers" rgroup.long 0x10000++0x03 line.long 0x00 "PCICONF0,PCI Configuration Register 0" hexmask.long.word 0x00 16.--31. 1. " DID ,Device ID" hexmask.long.word 0x00 0.--15. 1. " VID ,Vendor ID" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") group.long 0x10004++0x03 line.long 0x00 "PCICONF1,PCI Configuration Register 1" eventfld.long 0x00 31. " DPE ,Detected Parity Error" "Not detected,Detected" eventfld.long 0x00 30. " SSE ,Signaled System Error" "Not detected,Detected" eventfld.long 0x00 29. " RMA ,Received Master Abort" "Not detected,Detected" textline " " eventfld.long 0x00 28. " RTA ,Received Target Abort" "Not detected,Detected" eventfld.long 0x00 27. " STA ,Signaled Target Abort" "Not detected,Detected" rbitfld.long 0x00 25.--26. " DEVSEL ,DEVSEL Timing" "0,1,2,3" textline " " rbitfld.long 0x00 24. " MDPE ,Master Data Parity Error" "Not detected,Detected" rbitfld.long 0x00 23. " FBBTCAP ,Fast Back to Back Transaction Capable" "0,1" rbitfld.long 0x00 21. " 66MCAP ,66 MHz Capable" "0,1" textline " " bitfld.long 0x00 20. " CAPL ,Capabilities List" "Disabled,Enabled" rbitfld.long 0x00 19. " INTST ,Interrupt Status" "Not generated,Generated" bitfld.long 0x00 10. " INTDIS ,Interrupt Disable" "No effect,Disabled" textline " " rbitfld.long 0x00 9. " FBBTE ,Fast Back to Back Transaction Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SERRE ,System Error Enable" "Disabled,Enabled" rbitfld.long 0x00 7. " IDSS/WCC ,IDSel Stepping/Wait Cycle Control" "0,1" textline " " bitfld.long 0x00 6. " PERS ,Parity Error Response" "No error,Error" rbitfld.long 0x00 5. " VGAPS ,VGA Plate Snoop" "0,1" rbitfld.long 0x00 4. " MWIE ,Memory Write and Invalidate Enable" "0,1" textline " " rbitfld.long 0x00 3. " SC ,Special Cycle" "0,1" bitfld.long 0x00 2. " BME ,Bus Master Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MSE ,Memory Space Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " IOSE ,IO Space Enable" "Disabled,Enabled" else group.long 0x10004++0x03 line.long 0x00 "PCICONF1,PCI Configuration Register 1" eventfld.long 0x00 31. " DPE ,Detected Parity Error" "Not detected,Detected" eventfld.long 0x00 30. " SSE ,Signaled System Error" "Not detected,Detected" eventfld.long 0x00 29. " RMA ,Received Master Abort" "Not detected,Detected" textline " " eventfld.long 0x00 28. " RTA ,Received Target Abort" "Not detected,Detected" eventfld.long 0x00 27. " STA ,Signaled Target Abort" "Not detected,Detected" eventfld.long 0x00 24. " MDPE ,Master Data Parity Error" "Not detected,Detected" textline " " bitfld.long 0x00 20. " CAPL ,Capabilities List" "Disabled,Enabled" rbitfld.long 0x00 19. " INTST ,Interrupt Status" "Not generated,Generated" bitfld.long 0x00 10. " INTDIS ,Interrupt Disable" "No,Yes" textline " " rbitfld.long 0x00 9. " FBBTE ,Fast Back to Back Transaction Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SERRE ,System Error Enable" "Disabled,Enabled" bitfld.long 0x00 6. " PERS ,Parity Error Response" "No error,Error" textline " " bitfld.long 0x00 2. " BME ,Bus Master Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MSE ,Memory Space Enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOSE ,IO Space Enable" "Disabled,Enabled" endif rgroup.long 0x10008++0x03 line.long 0x00 "PCICONF2,PCI Configuration Register 2" hexmask.long.byte 0x00 24.--31. 1. " CC ,Class Code" hexmask.long.byte 0x00 16.--23. 1. " SCC ,Sub Class Code" hexmask.long.byte 0x00 8.--15. 1. " PIF ,Prog IF" textline " " hexmask.long.byte 0x00 0.--7. 1. " RID ,Revision ID" group.long 0x1000C++0x03 line.long 0x00 "PCICONF3,PCI Configuration Register 3" rbitfld.long 0x00 31. " BSTCAP ,BIST Capable" "Not supported,Supported" rbitfld.long 0x00 30. " STBST ,Start BIST" "Not started,Started" rbitfld.long 0x00 24.--27. " BSTCODE ,BIST Completion Code" "BIST,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure,Failure" textline " " bitfld.long 0x00 23. " SFMF ,Single Function/ Multi-function" "Single,?..." hexmask.long.byte 0x00 16.--22. 1. " HT ,Header Type" hexmask.long.byte 0x00 8.--15. 1. " MLT ,Master Latency Timer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CLS ,Cache Line Size" if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x10010++0x17 line.long 0x00 "PCICONF4,PCI Configuration Register 4" line.long 0x04 "PCICONF5,PCI Configuration Register 5" line.long 0x08 "PCICONF6,PCI Configuration Register 6" line.long 0x0C "PCICONF7,PCI Configuration Register 7" line.long 0x10 "PCICONF8,PCI Configuration Register 8" line.long 0x14 "PCICONF9,PCI Configuration Register 9" rgroup.long 0x10028++0x0B line.long 0x00 "PCICONF10,PCI Configuration Register 10" sif (cpu()=="RCARM2") line.long 0x04 "PCICONF11,PCI Configuration Register 11" else line.long 0x04 "PCICONF11,PCI Configuration Register 11" hexmask.long.word 0x04 16.--31. 1. " SSI ,Sub System ID" hexmask.long.word 0x04 0.--15. 1. " SSVI ,Sub System Vendor ID" endif line.long 0x08 "PCICONF12,PCI Configuration Register 12" hexmask.long.tbyte 0x08 11.--31. 1. " EROMBAR ,Expansion ROM BAR" bitfld.long 0x08 0. " EROME ,Expansion ROM Enable" "Disabled,Enabled" else hgroup.long 0x10010++0x03 hide.long 0x00 "PCICONF4,PCI Configuration Register 4" hgroup.long 0x10014++0x03 hide.long 0x00 "PCICONF5,PCI Configuration Register 5" group.long 0x10018++0x1B line.long 0x00 "PCICONF6,PCI Configuration Register 6" hexmask.long.byte 0x00 24.--31. 1. " SLT ,Secondary Latency Timer" hexmask.long.byte 0x00 16.--23. 1. " SBN ,Subordinate BUS NUMber" hexmask.long.byte 0x00 8.--15. 1. " SECBN ,Secondary BUS Number" textline " " hexmask.long.byte 0x00 0.--7. 1. " PBN ,Primary BUS Number" line.long 0x04 "PCICONF7,PCI Configuration Register 7" eventfld.long 0x04 31. " DPE ,Detected Parity Error" "No error,Error" eventfld.long 0x04 30. " RSE ,Received System Error" "No error,Error" eventfld.long 0x04 29. " RMA ,Received Master Abort" "Not aborted,Aborted" textline " " eventfld.long 0x04 28. " RTA ,Received Target Abort" "Not aborted,Aborted" eventfld.long 0x04 27. " STA ,Signaled Target Abort" "Not aborted,Aborted" eventfld.long 0x04 24. " MDPE ,MDPE" "No error,Error" textline " " bitfld.long 0x04 12.--15. " IOLEA ,IO Limit End Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " IOLT ,IO Limit Type" "16-bit,32-bit,?..." bitfld.long 0x04 4.--7. " IOBEA ,IO Base End Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " IOBT ,IO Base Type" "16-bit,32-bit,?..." line.long 0x08 "PCICONF8,PCI Configuration Register 8" hexmask.long.word 0x08 20.--31. 1. " ML ,Memory Limit" hexmask.long.word 0x08 4.--15. 1. " MB ,Memory Base" line.long 0x0C "PCICONF9,PCI Configuration Register 9" hexmask.long.word 0x0C 20.--31. 1. " PML ,Prefetchable Memory Limit" bitfld.long 0x0C 16.--19. " PMAT ,Prefetchable Memory Address Decode TYPE" "16-bit,32-bit,?..." hexmask.long.word 0x0C 4.--15. 1. " PMB ,Prefetchable Memory Base" textline " " bitfld.long 0x0C 0.--3. " PMBT ,Prefetchable Memory Base Type" "16-bit,32-bit,?..." line.long 0x10 "PCICONF10,PCI Configuration Register 10" line.long 0x14 "PCICONF11,PCI Configuration Register 11" line.long 0x18 "PCICONF12,PCI Configuration Register 12" hexmask.long.word 0x18 16.--31. 1. " IOLUA ,IO Limit Upper Address" hexmask.long.word 0x18 0.--15. 1. " IOBUA ,IO Base Upper Address" endif group.long 0x10034++0x03 line.long 0x00 "PCICONF13,PCI Configuration Register 13" hexmask.long.byte 0x00 0.--7. 1. " CP ,Capabilities Pointer" sif (cpu()=="R8A77440")||(cpu()=="R8A77430")||(cpu()=="R8A77420") if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) hgroup.long 0x10038++0x03 hide.long 0x00 "PCICONF14,PCI Configuration Register 14" group.long 0x1003C++0x03 line.long 0x00 "PCICONF15,PCI Configuration Register 15" hexmask.long.byte 0x00 8.--15. 1. " IP ,Interrupt Pin" hexmask.long.byte 0x00 0.--7. 1. " IL ,Interrupt Line" else rgroup.long 0x10038++0x03 line.long 0x00 "PCICONF14,PCI Configuration Register 14" hexmask.long.tbyte 0x00 11.--31. 1. " EROMBAR ,Expansion ROM BAR" bitfld.long 0x00 0. " EROME ,Expansion ROM Enable" "Disabled,Enabled" group.long 0x1003C++0x03 line.long 0x00 "PCICONF15,PCI Configuration Register 15" bitfld.long 0x00 22. " SECBRST ,Secondary Bus Reset" "Disabled,Enabled" bitfld.long 0x00 20. " VGA16DEC ,VGA 16-bit Decode" "Disabled,Enabled" bitfld.long 0x00 19. " VGAE ,VGA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ISAE ,ISA Enable" "Disabled,Enabled" bitfld.long 0x00 17. " SERRE ,SERR Enable" "Disabled,Enabled" bitfld.long 0x00 16. " PERS ,Parity Error Response" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--15. 1. " IP ,Interrupt Pin" hexmask.long.byte 0x00 0.--7. 1. " IL ,Interrupt Line" endif else if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) hgroup.long 0x10038++0x03 hide.long 0x00 "PCICONF14,PCI Configuration Register 14" group.long 0x1003C++0x03 line.long 0x00 "PCICONF15,PCI Configuration Register 15" hexmask.long.byte 0x00 8.--15. 1. " IP ,Interrupt Pin" hexmask.long.byte 0x00 0.--7. 1. " IL ,Interrupt Line" else group.long 0x10038++0x07 line.long 0x00 "PCICONF14,PCI Configuration Register 14" hexmask.long.tbyte 0x00 11.--31. 1. " EROMBAR ,Expansion ROM BAR" bitfld.long 0x00 0. " EROME ,Expansion ROM Enable" "Disabled,Enabled" line.long 0x04 "PCICONF15,PCI Configuration Register 15" bitfld.long 0x04 22. " SECBRST ,Secondary Bus Reset" "Disabled,Enabled" bitfld.long 0x04 20. " VGA16DEC ,VGA 16-bit Decode" "Disabled,Enabled" bitfld.long 0x04 19. " VGAE ,VGA Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " ISAE ,ISA Enable" "Disabled,Enabled" bitfld.long 0x04 17. " SERRE ,SERR Enable" "Disabled,Enabled" bitfld.long 0x04 16. " PERS ,Parity Error Response" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 8.--15. 1. " IP ,Interrupt Pin" hexmask.long.byte 0x04 0.--7. 1. " IL ,Interrupt Line" endif endif group.long 0x10040++0x03 line.long 0x00 "PMCAP0,PCI Power Management Capability Register 0" bitfld.long 0x00 31. " PMESPD3COLD ,PME Support D3COLD" "Not supported,Supported" bitfld.long 0x00 30. " PMESPD3HOT ,PME Support D3HOT" "Not supported,Supported" bitfld.long 0x00 29. " PMESPD2 ,PME Support D2" "Not supported,Supported" textline " " bitfld.long 0x00 28. " PMESPD1 ,PME Support D1" "Not supported,Supported" bitfld.long 0x00 27. " PMESPD0 ,PME Support D0" "Not supported,Supported" bitfld.long 0x00 26. " D2SP ,D2 Support" "Not supported,Supported" textline " " bitfld.long 0x00 25. " D2SP ,D1 Support" "Not supported,Supported" bitfld.long 0x00 22.--24. " AUXC ,AUX Current" "0 mA,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA" bitfld.long 0x00 21. " DSI ,Device Specific Initialization" "Not required,Required" textline " " bitfld.long 0x00 16.--18. " PCIPMV ,PCI PM Version" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next Capability Pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" if (((per.l(ad:0xFE000000+0x10044))&0x800000)==0x800000) group.long 0x10044++0x03 line.long 0x00 "PMCAP1,PCI Power Management Capability Register 1" bitfld.long 0x00 23. " BPCCE ,Bus Power Clock Control Enable" "Disabled,Enabled" bitfld.long 0x00 22. " B2B3SP ,B2 B3 Support" "Not supported,Supported" eventfld.long 0x00 15. " PMEST ,PME Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 8. " PMEE ,PME Enable" "Disabled,Enabled" rbitfld.long 0x00 3. " NOSRST ,No Soft Reset" "No,Yes" bitfld.long 0x00 0.--1. " PS ,Power State" "D0,D1,D2,D3Hot" else group.long 0x10044++0x03 line.long 0x00 "PMCAP1,PCI Power Management Capability Register 1" bitfld.long 0x00 23. " BPCCE ,Bus Power Clock Control Enable" "Disabled,Enabled" eventfld.long 0x00 15. " PMEST ,PME Status" "Not transmitted,Transmitted" bitfld.long 0x00 8. " PMEE ,PME Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " NOSRST ,No Soft Reset" "No,Yes" bitfld.long 0x00 0.--1. " PS ,Power State" "D0,D1,D2,D3Hot" endif group.long 0x10050++0x03 line.long 0x00 "MSICAP0,MSI Capability Register 0" rbitfld.long 0x00 24. " PVMSK ,Per Vector Masking" "Not supported,Supported" rbitfld.long 0x00 23. " 64ADCAP ,64-bit Address Capable" "Not capable,Capable" bitfld.long 0x00 20.--22. " MMESE ,Multiple Message Enable" "1 vector,2 vectors,3 vectors,4 vectors,8 vectors,32 vectors,?..." textline " " bitfld.long 0x00 17.--19. " MMESCAP ,Multiple Message Capable" "1 vector,2 vectors,3 vectors,4 vectors,8 vectors,32 vectors,?..." bitfld.long 0x00 16. " MSIE ,MSI Enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next Capability Pointer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x10054++0x0F line.long 0x00 "MSICAP1,MSI Capability Register 1" hexmask.long 0x00 2.--31. 0x04 " LMA ,Lower Message Address" line.long 0x04 "MSICAP2,MSI Capability Register 2" line.long 0x08 "MSICAP3,MSI Capability Register 3" hexmask.long.word 0x08 0.--15. 1. " MD ,Message Data" line.long 0x0C "MSICAP4,MSI Capability Register 4" bitfld.long 0x0C 31. " MD31 ,Message Mask [31]" "Not masked,Masked" bitfld.long 0x0C 30. " MD30 ,Message Mask [30]" "Not masked,Masked" bitfld.long 0x0C 29. " MD29 ,Message Mask [29]" "Not masked,Masked" textline " " bitfld.long 0x0C 28. " MD28 ,Message Mask [28]" "Not masked,Masked" bitfld.long 0x0C 27. " MD27 ,Message Mask [27]" "Not masked,Masked" bitfld.long 0x0C 26. " MD26 ,Message Mask [26]" "Not masked,Masked" textline " " bitfld.long 0x0C 25. " MD25 ,Message Mask [25]" "Not masked,Masked" bitfld.long 0x0C 24. " MD24 ,Message Mask [24]" "Not masked,Masked" bitfld.long 0x0C 23. " MD23 ,Message Mask [23]" "Not masked,Masked" textline " " bitfld.long 0x0C 22. " MD22 ,Message Mask [22]" "Not masked,Masked" bitfld.long 0x0C 21. " MD21 ,Message Mask [21]" "Not masked,Masked" bitfld.long 0x0C 20. " MD20 ,Message Mask [20]" "Not masked,Masked" textline " " bitfld.long 0x0C 19. " MD19 ,Message Mask [19]" "Not masked,Masked" bitfld.long 0x0C 18. " MD18 ,Message Mask [18]" "Not masked,Masked" bitfld.long 0x0C 17. " MD17 ,Message Mask [17]" "Not masked,Masked" textline " " bitfld.long 0x0C 16. " MD16 ,Message Mask [16]" "Not masked,Masked" bitfld.long 0x0C 15. " MD15 ,Message Mask [15]" "Not masked,Masked" bitfld.long 0x0C 14. " MD14 ,Message Mask [14]" "Not masked,Masked" textline " " bitfld.long 0x0C 13. " MD13 ,Message Mask [13]" "Not masked,Masked" bitfld.long 0x0C 12. " MD12 ,Message Mask [12]" "Not masked,Masked" bitfld.long 0x0C 11. " MD11 ,Message Mask [11]" "Not masked,Masked" textline " " bitfld.long 0x0C 10. " MD10 ,Message Mask [10]" "Not masked,Masked" bitfld.long 0x0C 9. " MD9 ,Message Mask [9]" "Not masked,Masked" bitfld.long 0x0C 8. " MD8 ,Message Mask [8]" "Not masked,Masked" textline " " bitfld.long 0x0C 7. " MD7 ,Message Mask [7]" "Not masked,Masked" bitfld.long 0x0C 6. " MD6 ,Message Mask [6]" "Not masked,Masked" bitfld.long 0x0C 5. " MD5 ,Message Mask [5]" "Not masked,Masked" textline " " bitfld.long 0x0C 4. " MD4 ,Message Mask [4]" "Not masked,Masked" bitfld.long 0x0C 3. " MD3 ,Message Mask [3]" "Not masked,Masked" bitfld.long 0x0C 2. " MD2 ,Message Mask [2]" "Not masked,Masked" textline " " bitfld.long 0x0C 1. " MD1 ,Message Mask [1]" "Not masked,Masked" bitfld.long 0x0C 0. " MD0 ,Message Mask [0]" "Not masked,Masked" rgroup.long 0x10064++0x03 line.long 0x00 "MSICAP5,MSI Capability Register 5" bitfld.long 0x00 31. " MP31 ,Message Pending [31]" "Not pending,Pending" bitfld.long 0x00 30. " MP30 ,Message Pending [30]" "Not pending,Pending" bitfld.long 0x00 29. " MP29 ,Message Pending [29]" "Not pending,Pending" textline " " bitfld.long 0x00 28. " MP28 ,Message Pending [28]" "Not pending,Pending" bitfld.long 0x00 27. " MP27 ,Message Pending [27]" "Not pending,Pending" bitfld.long 0x00 26. " MP26 ,Message Pending [26]" "Not pending,Pending" textline " " bitfld.long 0x00 25. " MP25 ,Message Pending [25]" "Not pending,Pending" bitfld.long 0x00 24. " MP24 ,Message Pending [24]" "Not pending,Pending" bitfld.long 0x00 23. " MP23 ,Message Pending [23]" "Not pending,Pending" textline " " bitfld.long 0x00 22. " MP22 ,Message Pending [22]" "Not pending,Pending" bitfld.long 0x00 21. " MP21 ,Message Pending [21]" "Not pending,Pending" bitfld.long 0x00 20. " MP20 ,Message Pending [20]" "Not pending,Pending" textline " " bitfld.long 0x00 19. " MP19 ,Message Pending [19]" "Not pending,Pending" bitfld.long 0x00 18. " MP18 ,Message Pending [18]" "Not pending,Pending" bitfld.long 0x00 17. " MP17 ,Message Pending [17]" "Not pending,Pending" textline " " bitfld.long 0x00 16. " MP16 ,Message Pending [16]" "Not pending,Pending" bitfld.long 0x00 15. " MP15 ,Message Pending [15]" "Not pending,Pending" bitfld.long 0x00 14. " MP14 ,Message Pending [14]" "Not pending,Pending" textline " " bitfld.long 0x00 13. " MP13 ,Message Pending [13]" "Not pending,Pending" bitfld.long 0x00 12. " MP12 ,Message Pending [12]" "Not pending,Pending" bitfld.long 0x00 11. " MP11 ,Message Pending [11]" "Not pending,Pending" textline " " bitfld.long 0x00 10. " MP10 ,Message Pending [10]" "Not pending,Pending" bitfld.long 0x00 9. " MP9 ,Message Pending [9]" "Not pending,Pending" bitfld.long 0x00 8. " MP8 ,Message Pending [8]" "Not pending,Pending" textline " " bitfld.long 0x00 7. " MP7 ,Message Pending [7]" "Not pending,Pending" bitfld.long 0x00 6. " MP6 ,Message Pending [6]" "Not pending,Pending" bitfld.long 0x00 5. " MP5 ,Message Pending [5]" "Not pending,Pending" textline " " bitfld.long 0x00 4. " MP4 ,Message Pending [4]" "Not pending,Pending" bitfld.long 0x00 3. " MP3 ,Message Pending [3]" "Not pending,Pending" bitfld.long 0x00 2. " MP2 ,Message Pending [2]" "Not pending,Pending" textline " " bitfld.long 0x00 1. " MP1 ,Message Pending [1]" "Not pending,Pending" bitfld.long 0x00 0. " MP0 ,Message Pending [0]" "Not pending,Pending" else hgroup.long 0x10054++0x03 hide.long 0x00 "MSICAP1,MSI Capability Register 1" hgroup.long 0x10058++0x03 hide.long 0x00 "MSICAP2,MSI Capability Register 2" hgroup.long 0x1005C++0x03 hide.long 0x00 "MSICAP3,MSI Capability Register 3" hgroup.long 0x10080++0x03 hide.long 0x00 "MSICAP4,MSI Capability Register 4" hgroup.long 0x10064++0x03 hide.long 0x00 "MSICAP5,MSI Capability Register 5" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x10070++0x07 line.long 0x00 "EXPCAP0,PCI Express Capability Register 0" rbitfld.long 0x00 24. " SLTIMP ,Slot Implemented" "Not connected,Connected" bitfld.long 0x00 20.--23. " DPT ,Device Port Type" "PCIE Endpoint,,,,Root Port,?..." rbitfld.long 0x00 16.--19. " CV ,Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 8.--15. 1. " NCP ,NEXT Capability Pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "EXPCAP1,PCI Express Capability Register 1" rbitfld.long 0x04 26.--27. " CAPSLPLSC ,Captured Slot Power Limit Scale" "1.0x,0.1x,0.01x,0.001x" hexmask.long.byte 0x04 18.--25. 1. " CAPSLPLV ,Captured Slot Power Limit Value" textline " " rbitfld.long 0x04 15. " RBER ,Role-Based Error Reporting" "Disabled,Enabled" textline " " bitfld.long 0x04 9.--11. " EL1ACLAT ,Endpoint L1 Acceptable Latency" "1 us,2 us,4 us,8 us,16 us,32 us,64 us,No limit" bitfld.long 0x04 6.--8. " EL0ACLAT ,Endpoint L0s Acceptable Latency" "64 ns,128 ns,256 ns,512 ns,1 us,2 us,4 us,No limit" rbitfld.long 0x04 5. " ETAGS ,Extended Tag Field Supported" "5-bit tag,8-bit extension tag" textline " " rbitfld.long 0x04 3.--4. " PFS ,Phantom Function Supported" "Not supported,MSB,Upper 2 bits,3 bits" bitfld.long 0x04 0.--2. " MPSS ,Max Payload Size Supported" "128 bytes,?..." else group.long 0x10070++0x07 line.long 0x00 "EXPCAP0,PCI Express Capability Register 0" bitfld.long 0x00 20.--23. " DPT ,Device Port Type" "PCIE Endpoint,,,,Root Port,?..." rbitfld.long 0x00 16.--19. " CV ,Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. " NCP ,NEXT Capability Pointer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "EXPCAP1,PCI Express Capability Register 1" bitfld.long 0x04 28. " FLRCAP ,Function Level Reset Capability" "Low,High" rbitfld.long 0x04 26.--27. " CAPSLPLSC ,Captured Slot Power Limit Scale" "1.0x,0.1x,0.01x,0.001x" hexmask.long.byte 0x04 18.--25. 1. " CAPSLPLV ,Captured Slot Power Limit Value" textline " " rbitfld.long 0x04 15. " RBER ,Role-Based Error Reporting" "Disabled,Enabled" textline " " bitfld.long 0x04 9.--11. " EL1ACLAT ,Endpoint L1 Acceptable Latency" "1 us,2 us,4 us,8 us,16 us,32 us,64 us,No limit" bitfld.long 0x04 6.--8. " EL0ACLAT ,Endpoint L0s Acceptable Latency" "64 ns,128 ns,256 ns,512 ns,1 us,2 us,4 us,No limit" rbitfld.long 0x04 5. " ETAGS ,Extended Tag Field Supported" "5-bit tag,8-bit extension tag" textline " " rbitfld.long 0x04 3.--4. " PFS ,Phantom Function Supported" "Not supported,MSB,Upper 2 bits,3 bits" bitfld.long 0x04 0.--2. " MPSS ,Max Payload Size Supported" "128 bytes,?..." endif group.long 0x10078++0x07 line.long 0x00 "EXPCAP2,PCI Express Capability Register 2" rbitfld.long 0x00 21. " TRPD ,Transaction Pending" "Not pending,Pending" rbitfld.long 0x00 20. " AUXPDTCD ,AUX Power Detected" "Not detected,Detected" eventfld.long 0x00 19. " URDTCD ,Unsupported Request Detected" "Not detected,Detected" textline " " eventfld.long 0x00 18. " FEDTCD ,Fatal Error Detected " "Not detected,Detected" eventfld.long 0x00 17. " NFEDTCD ,Non-fatal Error Detected" "Not detected,Detected" eventfld.long 0x00 16. " CEDTCD ,Correctable Error Detected" "Not detected,Detected" textline " " bitfld.long 0x00 12.--14. " MRRS ,Max Read Request Size" "128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,?..." bitfld.long 0x00 11. " ENSNP ,Enable No Snoop" "Disabled,Enabled" bitfld.long 0x00 10. " AUXPPME ,AUX Power PM Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PFE ,Phantom Function Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ETAGE ,Extended Tag Enable" "Disabled,Enabled" bitfld.long 0x00 5.--7. " MPS ,Max Payload Size" "128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,?..." textline " " bitfld.long 0x00 4. " ERLOD ,Enabled Relax Ordering" "Disabled,Enabled" bitfld.long 0x00 3. " URRPE ,Unsupported Request Reporting Enable" "Disabled,Enabled" bitfld.long 0x00 2. " FERPE ,Fatal Error Reporting Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NFERPE ,Non-fatal Error Reporting Enable" "Disabled,Enabled" bitfld.long 0x00 0. " CERPE ,Correctable Error Reporting Enable" "Disabled,Enabled" line.long 0x04 "EXPCAP3,PCI Express Capability Register 3" hexmask.long.byte 0x04 24.--31. 1. " PN ,Port Number" bitfld.long 0x04 21. " LKBWNOTFCAP ,Link Bandwidth Notification Capability" "Not supported,Supported" bitfld.long 0x04 20. " DLLACTRPCAP ,Data Link Layer Active Reporting Capable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " CLKPM ,Clock Power Management" "Disabled,Enabled" bitfld.long 0x04 15.--17. " L1ELAT ,L1 Exit Latency " "<1 us,<2 us,<4 us,<8 us,<16 us,<32 us,<=64 us,>64 us" bitfld.long 0x04 12.--14. " L0ELAT ,L0s Exit Latency" "<64 ns,<128 ns,<256 ns,<512 ns,<1 us,<2 us,<=4 us,>4 us" textline " " rbitfld.long 0x04 10.--11. " ASPMS ,ASPM Supported" ",L0s transition,?..." bitfld.long 0x04 4.--9. " MLW ,Maximum Link Width" ",x1 link,?..." bitfld.long 0x04 0.--3. " SLS ,Supported Link Speeds" ",2.5 GT/s,5.0 GT/s and 2.5 GT/s,?..." if (((per.l(ad:0xFE000000+0x28))&0x01)==0x01) if (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x340000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" eventfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" eventfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" textline " " bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." bitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" textline " " bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x300000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" eventfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" eventfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" textline " " bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." bitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" textline " " bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x240000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" eventfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" eventfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" textline " " rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." textline " " bitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" textline " " bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x200000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" eventfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" eventfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" textline " " rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." textline " " bitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x140000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" textline " " rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" textline " " bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x100000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" textline " " rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x040000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" else group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 5. " RTRNLK ,Retrain Link" "Disabled,Enabled" bitfld.long 0x00 4. " LKDIS ,Link Disable" "No,Yes" textline " " bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" endif else if (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x300000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" rbitfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" textline " " bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x300000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" rbitfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" textline " " bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x240000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" rbitfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" textline " " rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." textline " " rbitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x200000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 31. " LKAUTOBWSTS ,Link Autonomous Bandwidth Status" "Not changed,Changed" rbitfld.long 0x00 30. " LKBWMNGSTS ,Link Bandwidth Management Status" "Not changed,Changed" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" textline " " rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." textline " " rbitfld.long 0x00 11. " LKAUTOBWINTE ,Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 10. " LKBWMNGINTE ,Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" textline " " bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x140000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" textline " " rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x100000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" rbitfld.long 0x00 29. " DLLACT ,Data Link Layer Active" "Other,DL_ACTIVE" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" textline " " rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" textline " " bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" elif (((per.l(ad:0xFE000000+0x1007C))&0x340000)==0x040000) group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 8. " ECLKPM ,Enable Clock Power Management" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" textline " " bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" else group.long 0x10080++0x03 line.long 0x00 "EXPCAP4,PCI Express Capability Register 4" bitfld.long 0x00 28. " SLCLKCFG ,Slot Clock Configuration" "Not used,Used" rbitfld.long 0x00 27. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 20.--25. " NLW ,Negotiated Link Width" ",x1,x2,,x4,,,,0x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " CLS ,Current Link Speed" ",2.5 GT/s,5.0 GT/s,?..." rbitfld.long 0x00 9. " HWAUTOWDIS ,Hardware Autonomous Width Disable" "No,Yes" bitfld.long 0x00 7. " EXTSYNC ,Extended SYNC" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CCLKCFG ,Common Clock Configuration" "Disabled,Enabled" bitfld.long 0x00 3. " RCB ,Read Completion Boundary" "64-byte,128-byte" textline " " bitfld.long 0x00 0.--1. " ASPMC ,ASPM Control" "Disabled,L0s,L1,L0s/L1" endif endif sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77990*"))||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) hgroup.long 0x10084++0x07 hide.long 0x00 "EXPCAP5,PCI Express Capability Register 5" hide.long 0x04 "EXPCAP6,PCI Express Capability Register 6" else hgroup.long 0x10084++0x03 hide.long 0x00 "EXPCAP5,PCI Express Capability Register 5" rgroup.long 0x10088++0x03 line.long 0x00 "EXPCAP6,PCI Express Capability Register 6" bitfld.long 0x00 5. " HOTPLGINTE ,Hot Plug Interrupt Enable" "Disabled,Enabled" endif else hgroup.long 0x10084++0x03 hide.long 0x00 "EXPCAP5,PCI Express Capability Register 5" rgroup.long 0x10088++0x03 line.long 0x00 "EXPCAP6,PCI Express Capability Register 6" bitfld.long 0x00 5. " HOTPLGINTE ,Hot Plug Interrupt Enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) hgroup.long 0x1008C++0x03 hide.long 0x00 "EXPCAP7,PCI Express Capability Register 7" hgroup.long 0x10090++0x03 hide.long 0x00 "EXPCAP8,PCI Express Capability Register 8" else group.long 0x1008C++0x07 line.long 0x00 "EXPCAP7,PCI Express Capability Register 7" bitfld.long 0x00 16. " CRSVIS ,CRS Software Visibility" "Not visible,Visible" bitfld.long 0x00 4. " CRSVISE ,CRS Software Visibility Enable" "Disabled,Enabled" bitfld.long 0x00 3. " PMEINTE ,PME Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SERRFEE ,System Error on Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SERRNFEE ,System Error on Non-fatal Error Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SERRCEE ,System Error on Correctable Error Enable" "Disabled,Enabled" line.long 0x04 "EXPCAP8,PCI Express Capability Register 8" rbitfld.long 0x04 17. " PMEPD ,PME Pending" "Not pending,Pending" eventfld.long 0x04 16. " PMEST ,PME Status" "Not received,Received" hexmask.long.word 0x04 0.--15. 1. " PMERID ,PME Requester ID" endif group.long 0x10094++0x07 line.long 0x00 "EXPCAP9,PCI Express Capability Register 9" bitfld.long 0x00 4. " CPLTODISSUP ,Completion Timeout Disable Supported" "Not supported,Supported" line.long 0x04 "EXPCAP10,PCI Express Capability Register 10" bitfld.long 0x04 4. " CPLTODIS ,Completion Timeout Disable" "No,Yes" hgroup.long 0x1009C++0x03 hide.long 0x00 "EXPCAP11,PCI Express Capability Register 11" if (((per.l(ad:0xFE000000+0x28))&0x01)==0x00) group.long 0x100A0++0x03 line.long 0x00 "EXPCAP12,PCI Express Capability Register 12" rbitfld.long 0x00 16. " CURDEEMLEV ,Current De-emphasis Level" "-6 dB,-3.5 dB" bitfld.long 0x00 12. " CMPDEEM ,Compliance De-emphasis" "-6 dB,-3.5 dB" bitfld.long 0x00 11. " CMPSOS ,Compliance SOS" "Not inserted,Inserted" textline " " bitfld.long 0x00 10. " ETMDFCMP ,Enter Modified Compliance" "Disabled,Enabled" bitfld.long 0x00 7.--9. " TM ,Transmit Margin" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. " ENTCMP ,Enter Compliance" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " TLS ,Target Link Speed" ",2.5 GT/s,5.0 GT/s,?..." else group.long 0x100A0++0x03 line.long 0x00 "EXPCAP12,PCI Express Capability Register 12" rbitfld.long 0x00 16. " CURDEEMLEV ,Current De-emphasis Level" "-6 dB,-3.5 dB" bitfld.long 0x00 12. " CMPDEEM ,Compliance De-emphasis" "-6 dB,-3.5 dB" bitfld.long 0x00 11. " CMPSOS ,Compliance SOS" "Not inserted,Inserted" textline " " bitfld.long 0x00 10. " ETMDFCMP ,Enter Modified Compliance" "Disabled,Enabled" bitfld.long 0x00 7.--9. " TM ,Transmit Margin" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. " SELDEEM ,Selectable De-emphasis" "-6 dB,-3.5 dB" textline " " bitfld.long 0x00 4. " ENTCMP ,Enter Compliance" "Disabled,Enabled" bitfld.long 0x00 0.--3. " TLS ,Target Link Speed" ",2.5 GT/s,5.0 GT/s,?..." endif hgroup.long 0x100A4++0x03 hide.long 0x00 "EXPCAP13,PCI Express Capability Register 13" hgroup.long 0x100A8++0x03 hide.long 0x00 "EXPCAP14,PCI Express Capability Register 14" group.long 0x10100++0x07 line.long 0x00 "VCCAP0,VC Capability Register 0" hexmask.long.word 0x00 20.--31. 1. " NCO ,Next Capability Offset" rbitfld.long 0x00 16.--19. " CV ,Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " PCIECID ,PCI Express Extended Capability ID" line.long 0x04 "VCCAP1,VC Capability Register 1" rbitfld.long 0x04 4.--6. " LPEXTVC ,Low Priority Extended VC Count" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " EXT_VC ,Extended VC Count" "0,1,2,3,4,5,6,7" hgroup.long 0x10108++0x03 hide.long 0x00 "VCCAP2,VC Capability Register 2" hgroup.long 0x1010C++0x03 hide.long 0x00 "VCCAP3,VC Capability Register 3" rgroup.long 0x10110++0x03 line.long 0x00 "VCCAP4,VC Capability Register 4" bitfld.long 0x00 15. " RJCTSNPTR ,Reject Snoop Transactions" "Not rejected,Rejected" group.long 0x10114++0x03 line.long 0x00 "VCCAP5,VC Capability Register 5" rbitfld.long 0x00 31. " VCE ,VC Enable" "Disabled,Enabled" rbitfld.long 0x00 24.--26. " VCID ,VCID" "0,?..." bitfld.long 0x00 7. " TC7 ,TC7" "Not mapped,Mapped" textline " " bitfld.long 0x00 6. " TC6 ,TC6" "Not mapped,Mapped" bitfld.long 0x00 5. " TC5 ,TC5" "Not mapped,Mapped" bitfld.long 0x00 4. " TC4 ,TC4" "Not mapped,Mapped" textline " " bitfld.long 0x00 3. " TC3 ,TC3" "Not mapped,Mapped" bitfld.long 0x00 2. " TC2 ,TC2" "Not mapped,Mapped" bitfld.long 0x00 1. " TC1 ,TC1" "Not mapped,Mapped" textline " " rbitfld.long 0x00 0. " TC0 ,TC0" "Not mapped,Mapped" rgroup.long 0x10118++0x03 line.long 0x00 "VCCAP6,VC Capability Register 6" bitfld.long 0x00 17. " VCNGPD ,VC Negotiation Pending" "Not pending,Pending" group.long 0x101B0++0x03 line.long 0x00 "SERNUMCAP0,Device Serial Number Capability Register 0" hexmask.long.word 0x00 20.--31. 0x10 " NCO ,Next Capability Offset" sif (cpu()=="R8A77440") rbitfld.long 0x00 16.--19. " CV ,Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 16.--19. " CV ,Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif hexmask.long.word 0x00 0.--15. 1. " PCIEECID ,PCI Express Extended Capability ID" rgroup.long 0x101B4++0x07 line.long 0x00 "SERNUMCAP1,Device Serial Number Capability Register 1" line.long 0x04 "SERNUMCAP2,Device Serial Number Capability Register 2" tree.end tree "PCIEC link layer control registers" group.long 0x11000++0x07 line.long 0x00 "IDSETR0,ID Setting Register 0" hexmask.long.word 0x00 16.--31. 1. " DIDS ,Device ID Set" hexmask.long.word 0x00 0.--15. 1. " VIDS ,Vendor ID Set" line.long 0x04 "IDSETR1,ID Setting Register 1" hexmask.long.byte 0x04 24.--31. 1. " CCS ,Class Code Set" hexmask.long.byte 0x04 16.--23. 1. " SCCS ,Sub Class Code Set" hexmask.long.byte 0x04 8.--15. 1. " PROGIFS ,PROG IF Set" textline " " hexmask.long.byte 0x04 0.--7. 1. " RIDS ,Rev ID Set" group.long 0x11024++0x03 line.long 0x00 "SUBIDSETR,SUBID Setting Register" hexmask.long.word 0x00 16.--31. 1. " SSIDS ,Sub System ID Set" hexmask.long.word 0x00 0.--15. 1. " SSVIDS ,Sub System Vendor ID Set" group.long 0x1102C++0x07 line.long 0x00 "DSERSETR0,Device Serial Number Setting Register 0" line.long 0x04 "DSERSETR1,Device Serial Number Setting Register 1" group.long 0x11048++0x03 line.long 0x00 "TLCTLR,TL Control Register" hexmask.long.byte 0x00 24.--31. 1. " BN ,Bus Number" bitfld.long 0x00 19.--23. " DN ,Device Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--13. " DCTT ,Default Completion Timeout Time" ",,,,,,,,,,10 ms,11 ms,12 ms,13 ms,14 ms,15 ms,16 ms,17 ms,18 ms,19 ms,20 ms,21 ms,22 ms,23 ms,24 ms,25 ms,26 ms,27 ms,28 ms,29 ms,30 ms,31 ms,32 ms,33 ms,34 ms,35 ms,36 ms,37 ms,38 ms,39 ms,40 ms,41 ms,42 ms,43 ms,44 ms,45 ms,46 ms,47 ms,48 ms,49 ms,50 ms,?..." if (((per.l(ad:0xFE000000+0x2004))&0x01)==0x01) group.long 0x11054++0x03 line.long 0x00 "MACSR,MAC Status Register" rbitfld.long 0x00 30. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 29. " LPBAK1ST ,Loop Back1 State" "Disabled,Enabled" rbitfld.long 0x00 28. " LPBAK2ST ,Loop Back2 State" "Disabled,Enabled" textline " " rbitfld.long 0x00 27. " DISST ,Disabled State" "No,Yes" rbitfld.long 0x00 26. " HOTRSTST ,Hot Reset State" "Not reset,Reset" rbitfld.long 0x00 20.--25. " LW ,Link Width" ",x1 link width,x2 link width,,x4 link width,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," textline " " rbitfld.long 0x00 16.--19. " LS ,Link Speed" ",2.5 GT/s,5.0 GT/s,?..." eventfld.long 0x00 7. " SPCHGSUC ,Speed Change Success" "Not succeeded,Succeeded" eventfld.long 0x00 6. " SPCHGFAIL ,Speed Change Fail" "Not failed,Failed" textline " " eventfld.long 0x00 5. " SPCHG ,Speed Change" "Not changed,Changed" eventfld.long 0x00 4. " SPCHGFIN ,Speed Change Finish" "Not completed,Completed" eventfld.long 0x00 3. " L0ENT ,L0 Enter" "Not entered,Entered" else group.long 0x11054++0x03 line.long 0x00 "MACSR,MAC Status Register" rbitfld.long 0x00 30. " LKTR ,Link Training" "Disabled,Enabled" rbitfld.long 0x00 29. " LPBAK1ST ,Loop Back1 State" "Disabled,Enabled" rbitfld.long 0x00 28. " LPBAK2ST ,Loop Back2 State" "Disabled,Enabled" textline " " rbitfld.long 0x00 27. " DISST ,Disabled State" "No,Yes" rbitfld.long 0x00 26. " HOTRSTST ,Hot Reset State" "Not reset,Reset" eventfld.long 0x00 7. " SPCHGSUC ,Speed Change Success" "Not succeeded,Succeeded" textline " " eventfld.long 0x00 6. " SPCHGFAIL ,Speed Change Fail" "Not failed,Failed" eventfld.long 0x00 5. " SPCHG ,Speed Change" "Not changed,Changed" eventfld.long 0x00 4. " SPCHGFIN ,Speed Change Finish" "Not completed,Completed" textline " " eventfld.long 0x00 3. " L0ENT ,L0 Enter" "Not entered,Entered" endif group.long 0x11058++0x0B line.long 0x00 "MACCTLR,MAC Control Register" bitfld.long 0x00 31. " LTSMDIS ,LTSSM Disable" "Not disabled,Disabled" bitfld.long 0x00 29. " LPBAK ,Loop Back" "Disabled,Enabled" bitfld.long 0x00 27. " SCRDIS ,Scramble Disable" "No,Yes" textline " " bitfld.long 0x00 26. " FRCCM ,Force Compliance" "No effect,Forced" bitfld.long 0x00 24. " SPCHG ,Speed Change" "No effect,Change" line.long 0x04 "PMSR,PM Status Register" eventfld.long 0x04 31. " L1FAEG ,L1 Fall Edge" "Not completed|Stopped,Completed|Stopped" eventfld.long 0x04 23. " PMEL1RX ,PM Enter L1RX" "Not received,Received" rbitfld.long 0x04 16.--18. " PMSTATE ,PMSTATE" "LDn state,L0 state,,L1 state,L0s state,?..." line.long 0x08 "PMCTLR,PM Control Register" bitfld.long 0x08 31. " L1FAEG ,L1 Initiation" "Disabled,Enabled" group.long 0x1106C++0x07 line.long 0x00 "MACINTENR,MAC Interrupt Enable Register" bitfld.long 0x00 30. " LKTRE ,Link Training Enable" "Disabled,Enabled" bitfld.long 0x00 7. " SPCHGSUCE ,Speed Change Success Enable" "Disabled,Enabled" bitfld.long 0x00 6. " SPCHGFAILE ,Speed Change Fail Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SPCHGE ,Speed Change Enable" "Disabled,Enabled" bitfld.long 0x00 4. " SPCHGFINE ,Speed Change Finish Enable" "Disabled,Enabled" bitfld.long 0x00 3. " L0ENTE ,L0 Enter Enable" "Disabled,Enabled" line.long 0x04 "PMINTENR,PM Interrupt Enable Register" bitfld.long 0x04 31. " L1FAEGE ,L1 Fall Edge Enable" "Disabled,Enabled" bitfld.long 0x04 23. " PMEL1RXE ,PM_Enter_L1_RX Enable" "Disabled,Enabled" if (((per.l(ad:0xFE000000+0x2004))&0x01)==0x01) rgroup.long 0x11078++0x03 line.long 0x00 "MACS2R,MAC Status Register 2" bitfld.long 0x00 28.--29. " CS ,Compliance Status" "Not transmitted,Normal patterns,Modified patterns,?..." bitfld.long 0x00 20.--25. " ILW ,Initial Link Width" ",x1 link width,x2 link width,,x4 link width,?..." bitfld.long 0x00 16.--19. " CSLS ,Current Support Link Speed" ",2.5 GT/s,5.0 GT/s,?..." textline " " bitfld.long 0x00 0.--3. " MSLS ,Max Support Link Speed" ",2.5 GT/s,5.0 GT/s,?..." else rgroup.long 0x11078++0x03 line.long 0x00 "MACS2R,MAC Status Register 2" bitfld.long 0x00 28.--29. " CS ,Compliance Status" "Not transmitted,Normal patterns,Modified patterns,?..." endif group.long 0x1107C++0x03 line.long 0x00 "MACCTL2R,MAC Control Register 2" bitfld.long 0x00 11. " EXITLPBAK ,EXIT Loop Back" "Disabled,Enabled" bitfld.long 0x00 10. " FRCLPBAK ,Force Loop Back" "Disabled,Enabled" bitfld.long 0x00 7. " EXIT_CMP ,EXIT Compliance" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FLS ,Force Link Speed" ",2.5 GT/s,5.0 GT/s,?..." group.long 0x11084++0x03 line.long 0x00 "MACCGSPSETR,MAC Speed Change Setting Register" bitfld.long 0x00 31. " SPCNGRSN ,Speed Change Reason" "Intentional factor,Link reliability" bitfld.long 0x00 16.--19. " TLS ,Target Link Speed" ",2.5 GT/s,5.0 GT/s,?..." tree.end textline " " sif cpuis("R8A77980*") group.long 0x403C++0x03 line.long 0x00 "LANE_REV,Lane Reversal Register" bitfld.long 0x00 0. " LANE_REV_X2 ,PCIE Lane Reversal Mode" "Normal,Reversal" endif width 0x0B tree.end tree.open "SCIF (Serial Communication Interface with FIFO)" tree "Channel 0 - SCIF" base ad:0xE6E60000 width 9. hgroup.byte 0x14++0x00 hide.byte 0x00 "SCFRDR0,Receive FIFO Data Register 0" in wgroup.byte 0x0C++0x00 line.byte 0x00 "SCFTDR0,Transmit FIFO Data Register 0" if (((per.w(ad:0xE6E60000))&0xa0)==0x20) group.word 0x00++0x01 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E60000))&0xa0)==0x00) group.word 0x00++0x01 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x01 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E60000))&0x80)==0x80) group.word 0x08++0x01 line.word 0x00 "SCSCR0,Serial Control Register 0" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H"||cpu()=="R7S721021") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..." endif else group.word 0x08++0x01 line.word 0x00 "SCSCR0,Serial Control Register 0" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input," endif endif group.word 0x10++0x01 line.word 0x00 "SCFSR0,Serial Status Register 0" rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x00 line.byte 0x00 "SCBRR0,Bit Rate Register 0" if (((per.w(ad:0xE6E60000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCFCR0,FIFO Control Register 0" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCFCR0,FIFO Control Register 0" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR0,FIFO Data Count Register 0" bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR0,Serial Port Register 0" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level" textline " " bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR0,Line Status Register 0" sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")) bitfld.word 0x00 2. " TO ,Timeout" "No error,Error" endif textline " " bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" sif (cpu()=="RZA1H") group.word 0x28++0x01 line.word 0x00 "SCEMR0,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif sif (cpu()=="R7S721021") if (((per.w(ad:0xE6E60000))&0x80)==0x0) group.word 0x28++0x01 line.word 0x00 "SCEMR0,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" else group.word 0x28++0x01 line.word 0x00 "SCEMR0,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif endif sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 0" line.word 0x00 "DL0,Frequency Division Register 0" group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420") bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS" else bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "Channel 0 - SCIFA (CPU)" base ad:0xE6C40000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR0,Receive FIFO Data Register A0" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR0,Transmit FIFO Data Register A0" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C40000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C40000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C40000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR0,Serial Control Register A0" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER0,FIFO Error Count Register A0" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C40000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR0,Serial Status Register A0" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR0,Serial Status Register A0" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR0,Bit Rate Register A0" if (((per.w(ad:0xE6C40000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR0,FIFO Control Register A0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR0,FIFO Control Register A0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR0,FIFO Data Count Register A0" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR0,Transmit Data Stop Register A0" group.word 0x30++0x01 line.word 0x00 "SCAPCR0,Serial Port Control Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C40000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C40000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C40000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C40000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C40000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C40000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "Channel 0 - SCIFA (DMA)" base ad:0xE7C40000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR0,Receive FIFO Data Register A0" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR0,Transmit FIFO Data Register A0" width 0x0B tree.end tree "Channel 0 - SCIFB (CPU)" base ad:0xE6C20000 width 12. sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C20000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCBSMR0,Serial Mode Register B0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C20000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCBSMR0,Serial Mode Register B0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCBSMR0,Serial Mode Register B0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif endif group.byte 0x04++0x00 line.byte 0x00 "SCBBRR0,Bit Rate Register B0" group.word 0x08++0x01 line.word 0x00 "SCBSCR0,Serial Control Register" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 13. " RCEE ,Receive data count compare interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " TENDPOSE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " BRIE ,Break interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" if (((per.w(ad:0xE6C20000+0x18))&0x8000)==0x8000) group.word 0x0C++0x01 line.word 0x00 "SCBTDSR0,Transmit Data Stop Register B0" else hgroup.word 0x0C++0x01 hide.word 0x00 "SCBTDSR0,Transmit Data Stop Register B0" endif rgroup.word 0x10++0x01 line.word 0x00 "SCBFER0,FIFO Error Count Register B0" hexmask.word.byte 0x00 8.--15. 1. " PER ,Parity error count" hexmask.word.byte 0x00 0.--7. 1. " FER ,Framing error count" if (((per.w(ad:0xE6C20000))&0x80)==0x80) group.word 0x14++0x1 line.word 0x00 "SCBSSR0,Serial Status Register B0" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x1 line.word 0x00 "SCBSSR0,Serial Status Register B0" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" textline " " bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" textline " " rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif if ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x0)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x00)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x00)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x00)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif if (((per.w(ad:0xE6C20000+0x18))&0x2000)==0x2000) group.word 0x28++0x01 line.word 0x00 "SCBRCER0,Receive Data Count Compare Register B0" else hgroup.word 0x28++0x01 hide.word 0x00 "SCBRCER0,Receive Data Count Compare Register B0" endif if (((per.w(ad:0xE6C20000+0x08))&0xC000)==0xC000) group.word 0x2C++0x01 line.word 0x00 "SCBMBR0,Multibyte Set Register B0" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C20000+0x08))&0xC000)==0x8000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR0,Multibyte Set Register B0" bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C20000+0x08))&0xC000)==0x4000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR0,Multibyte Set Register B0" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" else hgroup.word 0x2C++0x01 hide.word 0x00 "SCBMBR0,Multibyte Set Register B0" endif group.word 0x30++0x01 line.word 0x00 "SCBPCR0,Serial Port Control Register B0" bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" if ((((per.w(ad:0xE6C20000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C20000+0x30))&0x8)==0x8)) if ((((per.w(ad:0xE6C20000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C20000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if ((((per.w(ad:0xE6C20000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C20000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif rgroup.word 0x38++0x01 line.word 0x00 "SCBTFDR0,Transmit FIFO Data Count Register B0" hexmask.word 0x00 0.--8. 1. " T ,Number of data bytes remaining in SCBFTDR" rgroup.word 0x3C++0x01 line.word 0x00 "SCBRFDR0,Receive FIFO Data Count Register B0" hexmask.word 0x00 0.--8. 1. " R ,Number of data bytes remaining in SCBFRDR" wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR0,Transmit FIFO Data Register B0" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR0,Receive FIFO Data Register B0" in sif (cpu()=="R8A77440") group.word 0x80++0x01 line.word 0x00 "SCBSC2R0,Serial Control Register 2 B0" bitfld.word 0x00 0. " RRCCE ,Receive reading count compare enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R0,Serial Status Register 2 B0" bitfld.word 0x00 0. " RRCCF ,Receive reading count compare" "Less,Greater" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR0,Receive Reading Count H Register B0" group.word 0x94++0x01 line.word 0x00 "SCBRRCLR0,Receive Reading Count L Register B0" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR0,Receive Reading Count Compare H Register B0" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCLR0,Receive Reading Count Compare L Register B0" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 Register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 Register" in else group.word 0x80++0x01 line.word 0x00 "SCBSC2R0,Serial control register2 B0" bitfld.word 0x00 0. " RRCCE ,Receive Reading Count Compare Enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R0,Serial status register2 B0" bitfld.word 0x00 0. " RRCCF ,Receive Reading Count Compare" "<,>" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR0,Receive reading count H register B0" group.word 0x94++0x01 line.word 0x00 "SCBRRCHL0,Receive reading count L register B0" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR0,Receive reading count compare H register B0" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCHL0,Receive reading count compare L register B0" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 register" in endif width 0x0B tree.end tree "Channel 0 - SCIFB (DMA)" base ad:0xE7C20000 width 12. wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR0,Transmit FIFO Data Register B0" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR0,Receive FIFO Data Register B0" in width 0x0B tree.end tree "Channel 1 - SCIF" base ad:0xE6E68000 width 9. hgroup.byte 0x14++0x00 hide.byte 0x00 "SCFRDR1,Receive FIFO Data Register 1" in wgroup.byte 0x0C++0x00 line.byte 0x00 "SCFTDR1,Transmit FIFO Data Register 1" if (((per.w(ad:0xE6E68000))&0xa0)==0x20) group.word 0x00++0x01 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E68000))&0xa0)==0x00) group.word 0x00++0x01 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x01 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E68000))&0x80)==0x80) group.word 0x08++0x01 line.word 0x00 "SCSCR1,Serial Control Register 1" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H"||cpu()=="R7S721021") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..." endif else group.word 0x08++0x01 line.word 0x00 "SCSCR1,Serial Control Register 1" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input," endif endif group.word 0x10++0x01 line.word 0x00 "SCFSR1,Serial Status Register 1" rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x00 line.byte 0x00 "SCBRR1,Bit Rate Register 1" if (((per.w(ad:0xE6E68000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCFCR1,FIFO Control Register 1" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCFCR1,FIFO Control Register 1" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR1,FIFO Data Count Register 1" bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR1,Serial Port Register 1" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level" textline " " bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR1,Line Status Register 1" sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")) bitfld.word 0x00 2. " TO ,Timeout" "No error,Error" endif textline " " bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" sif (cpu()=="RZA1H") group.word 0x28++0x01 line.word 0x00 "SCEMR1,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif sif (cpu()=="R7S721021") if (((per.w(ad:0xE6E68000))&0x80)==0x0) group.word 0x28++0x01 line.word 0x00 "SCEMR1,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" else group.word 0x28++0x01 line.word 0x00 "SCEMR1,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif endif sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 1" line.word 0x00 "DL1,Frequency Division Register 1" group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420") bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS" else bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "Channel 1 - SCIFA (CPU)" base ad:0xE6C50000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR1,Receive FIFO Data Register A1" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR1,Transmit FIFO Data Register A1" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C50000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C50000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C50000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR1,Serial Control Register A1" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER1,FIFO Error Count Register A1" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C50000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR1,Serial Status Register A1" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR1,Serial Status Register A1" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR1,Bit Rate Register A1" if (((per.w(ad:0xE6C50000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR1,FIFO Control Register A1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR1,FIFO Control Register A1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR1,FIFO Data Count Register A1" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR1,Transmit Data Stop Register A1" group.word 0x30++0x01 line.word 0x00 "SCAPCR1,Serial Port Control Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C50000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C50000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C50000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C50000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C50000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C50000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "Channel 1 - SCIFA (DMA)" base ad:0xE7C50000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR1,Receive FIFO Data Register A1" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR1,Transmit FIFO Data Register A1" width 0x0B tree.end tree "Channel 1 - SCIFB (CPU)" base ad:0xE6C30000 width 12. sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C30000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCBSMR1,Serial Mode Register B1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C30000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCBSMR1,Serial Mode Register B1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCBSMR1,Serial Mode Register B1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif endif group.byte 0x04++0x00 line.byte 0x00 "SCBBRR1,Bit Rate Register B1" group.word 0x08++0x01 line.word 0x00 "SCBSCR1,Serial Control Register" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 13. " RCEE ,Receive data count compare interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " TENDPOSE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " BRIE ,Break interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" if (((per.w(ad:0xE6C30000+0x18))&0x8000)==0x8000) group.word 0x0C++0x01 line.word 0x00 "SCBTDSR1,Transmit Data Stop Register B1" else hgroup.word 0x0C++0x01 hide.word 0x00 "SCBTDSR1,Transmit Data Stop Register B1" endif rgroup.word 0x10++0x01 line.word 0x00 "SCBFER1,FIFO Error Count Register B1" hexmask.word.byte 0x00 8.--15. 1. " PER ,Parity error count" hexmask.word.byte 0x00 0.--7. 1. " FER ,Framing error count" if (((per.w(ad:0xE6C30000))&0x80)==0x80) group.word 0x14++0x1 line.word 0x00 "SCBSSR1,Serial Status Register B1" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x1 line.word 0x00 "SCBSSR1,Serial Status Register B1" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" textline " " bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" textline " " rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif if ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x0)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x00)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x00)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x00)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif if (((per.w(ad:0xE6C30000+0x18))&0x2000)==0x2000) group.word 0x28++0x01 line.word 0x00 "SCBRCER1,Receive Data Count Compare Register B1" else hgroup.word 0x28++0x01 hide.word 0x00 "SCBRCER1,Receive Data Count Compare Register B1" endif if (((per.w(ad:0xE6C30000+0x08))&0xC000)==0xC000) group.word 0x2C++0x01 line.word 0x00 "SCBMBR1,Multibyte Set Register B1" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C30000+0x08))&0xC000)==0x8000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR1,Multibyte Set Register B1" bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C30000+0x08))&0xC000)==0x4000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR1,Multibyte Set Register B1" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" else hgroup.word 0x2C++0x01 hide.word 0x00 "SCBMBR1,Multibyte Set Register B1" endif group.word 0x30++0x01 line.word 0x00 "SCBPCR1,Serial Port Control Register B1" bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" if ((((per.w(ad:0xE6C30000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C30000+0x30))&0x8)==0x8)) if ((((per.w(ad:0xE6C30000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C30000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if ((((per.w(ad:0xE6C30000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C30000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif rgroup.word 0x38++0x01 line.word 0x00 "SCBTFDR1,Transmit FIFO Data Count Register B1" hexmask.word 0x00 0.--8. 1. " T ,Number of data bytes remaining in SCBFTDR" rgroup.word 0x3C++0x01 line.word 0x00 "SCBRFDR1,Receive FIFO Data Count Register B1" hexmask.word 0x00 0.--8. 1. " R ,Number of data bytes remaining in SCBFRDR" wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR1,Transmit FIFO Data Register B1" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR1,Receive FIFO Data Register B1" in sif (cpu()=="R8A77440") group.word 0x80++0x01 line.word 0x00 "SCBSC2R1,Serial Control Register 2 B1" bitfld.word 0x00 0. " RRCCE ,Receive reading count compare enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R1,Serial Status Register 2 B1" bitfld.word 0x00 0. " RRCCF ,Receive reading count compare" "Less,Greater" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR1,Receive Reading Count H Register B1" group.word 0x94++0x01 line.word 0x00 "SCBRRCLR1,Receive Reading Count L Register B1" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR1,Receive Reading Count Compare H Register B1" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCLR1,Receive Reading Count Compare L Register B1" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 Register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 Register" in else group.word 0x80++0x01 line.word 0x00 "SCBSC2R1,Serial control register2 B1" bitfld.word 0x00 0. " RRCCE ,Receive Reading Count Compare Enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R1,Serial status register2 B1" bitfld.word 0x00 0. " RRCCF ,Receive Reading Count Compare" "<,>" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR1,Receive reading count H register B1" group.word 0x94++0x01 line.word 0x00 "SCBRRCHL1,Receive reading count L register B1" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR1,Receive reading count compare H register B1" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCHL1,Receive reading count compare L register B1" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 register" in endif width 0x0B tree.end tree "Channel 1 - SCIFB (DMA)" base ad:0xE7C30000 width 12. wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR1,Transmit FIFO Data Register B1" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR1,Receive FIFO Data Register B1" in width 0x0B tree.end tree "Channel 2 - SCIF" base ad:0xE6E56000 width 9. hgroup.byte 0x14++0x00 hide.byte 0x00 "SCFRDR2,Receive FIFO Data Register 2" in wgroup.byte 0x0C++0x00 line.byte 0x00 "SCFTDR2,Transmit FIFO Data Register 2" if (((per.w(ad:0xE6E56000))&0xa0)==0x20) group.word 0x00++0x01 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E56000))&0xa0)==0x00) group.word 0x00++0x01 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x01 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E56000))&0x80)==0x80) group.word 0x08++0x01 line.word 0x00 "SCSCR2,Serial Control Register 2" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H"||cpu()=="R7S721021") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization output,Internal clk/SCK synchronization output,External clk/SCK synchronization input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK synchronization clk,Internal clk/SCK synchronization clk,External clk/SCK synchronization clk,?..." endif else group.word 0x08++0x01 line.word 0x00 "SCSCR2,Serial Control Register 2" sif (cpu()!="RZA1H"&&cpu()!="R7S721021") bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " endif bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()=="RZA1H") bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Baud rate generator/SCK input,External clk/SCK input," else bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1 and 0" "Internal clk/SCK input,Internal clk/SCK output,External clk/SCK input," endif endif group.word 0x10++0x01 line.word 0x00 "SCFSR2,Serial Status Register 2" rbitfld.word 0x00 12.--15. " PER[3:0] ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER[3:0] ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x00 line.byte 0x00 "SCBRR2,Bit Rate Register 2" if (((per.w(ad:0xE6E56000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCFCR2,FIFO Control Register 2" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger" "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCFCR2,FIFO Control Register 2" bitfld.word 0x00 8.--10. " RSTRG[2:0] ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG[1:0] ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG[1:0] ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR2,FIFO Data Count Register 2" bitfld.word 0x00 8.--12. " T[4:0] ,Number of non-transmitted data in SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R[4:0] ,Number of received data in SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR2,Serial Port Register 2" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS# pin input/output" "Not output,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 5. " CTSIO ,Serial port - CTS# pin input/output" "Not output,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS# pin data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock pin input/output" "Not output,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock pin data" "Low level,High level" textline " " bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Not output,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR2,Line Status Register 2" sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")) bitfld.word 0x00 2. " TO ,Timeout" "No error,Error" endif textline " " bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" sif (cpu()=="RZA1H") group.word 0x28++0x01 line.word 0x00 "SCEMR2,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Disabled,Enabled" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif sif (cpu()=="R7S721021") if (((per.w(ad:0xE6E56000))&0x80)==0x0) group.word 0x28++0x01 line.word 0x00 "SCEMR2,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" bitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" else group.word 0x28++0x01 line.word 0x00 "SCEMR2,Serial Extension Mode Register" bitfld.word 0x00 7. " BGDM ,Baud rate generator double-speed mode" "Normal,Double-speed" rbitfld.word 0x00 0. " ABCS ,Base clock select in asynchronous mode" "16 times,8 times" endif endif sif ((cpu()!="RZA1H")&&(cpu()!="R7S721021")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&!cpuis("R8A77980*")&&!cpuis("R8A77970*")&&!(cpuis("R8A77951")||cpuis("R8A77951-*"))&&!cpuis("R8A77995*")&&!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 2" line.word 0x00 "DL2,Frequency Division Register 2" group.word 0x34++0x01 line.word 0x00 "CKS2,Clock Select Register 2" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" sif (cpu()=="R8A77440")||cpuis("R8A77951")||cpuis("R8A77951-*")||(cpu()=="R8A77930")||(cpu()=="R8A77970")||(cpu()=="R8A77420") bitfld.word 0x00 14. " XIN ,Selects the baud rate generator source for the external clock between SCIF_CLK and ZS" "SCIF_CLK,ZS" else bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "Channel 2 - SCIFA (CPU)" base ad:0xE6C60000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR2,Receive FIFO Data Register A2" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR2,Transmit FIFO Data Register A2" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C60000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C60000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C60000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR2,Serial Control Register A2" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER2,FIFO Error Count Register A2" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C60000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR2,Serial Status Register A2" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR2,Serial Status Register A2" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR2,Bit Rate Register A2" if (((per.w(ad:0xE6C60000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR2,FIFO Control Register A2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR2,FIFO Control Register A2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR2,FIFO Data Count Register A2" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR2,Transmit Data Stop Register A2" group.word 0x30++0x01 line.word 0x00 "SCAPCR2,Serial Port Control Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C60000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C60000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C60000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C60000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C60000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C60000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "Channel 2 - SCIFA (DMA)" base ad:0xE7C60000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR2,Receive FIFO Data Register A2" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR2,Transmit FIFO Data Register A2" width 0x0B tree.end tree "Channel 2 - SCIFB (CPU)" base ad:0xE6CE0000 width 12. sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6CE0000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCBSMR2,Serial Mode Register B2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6CE0000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCBSMR2,Serial Mode Register B2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCBSMR2,Serial Mode Register B2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif endif group.byte 0x04++0x00 line.byte 0x00 "SCBBRR2,Bit Rate Register B2" group.word 0x08++0x01 line.word 0x00 "SCBSCR2,Serial Control Register" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 13. " RCEE ,Receive data count compare interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " TENDPOSE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " BRIE ,Break interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" if (((per.w(ad:0xE6CE0000+0x18))&0x8000)==0x8000) group.word 0x0C++0x01 line.word 0x00 "SCBTDSR2,Transmit Data Stop Register B2" else hgroup.word 0x0C++0x01 hide.word 0x00 "SCBTDSR2,Transmit Data Stop Register B2" endif rgroup.word 0x10++0x01 line.word 0x00 "SCBFER2,FIFO Error Count Register B2" hexmask.word.byte 0x00 8.--15. 1. " PER ,Parity error count" hexmask.word.byte 0x00 0.--7. 1. " FER ,Framing error count" if (((per.w(ad:0xE6CE0000))&0x80)==0x80) group.word 0x14++0x1 line.word 0x00 "SCBSSR2,Serial Status Register B2" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x1 line.word 0x00 "SCBSSR2,Serial Status Register B2" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" textline " " bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" textline " " rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif if ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x0)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x00)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x00)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x00)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif if (((per.w(ad:0xE6CE0000+0x18))&0x2000)==0x2000) group.word 0x28++0x01 line.word 0x00 "SCBRCER2,Receive Data Count Compare Register B2" else hgroup.word 0x28++0x01 hide.word 0x00 "SCBRCER2,Receive Data Count Compare Register B2" endif if (((per.w(ad:0xE6CE0000+0x08))&0xC000)==0xC000) group.word 0x2C++0x01 line.word 0x00 "SCBMBR2,Multibyte Set Register B2" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6CE0000+0x08))&0xC000)==0x8000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR2,Multibyte Set Register B2" bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6CE0000+0x08))&0xC000)==0x4000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR2,Multibyte Set Register B2" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" else hgroup.word 0x2C++0x01 hide.word 0x00 "SCBMBR2,Multibyte Set Register B2" endif group.word 0x30++0x01 line.word 0x00 "SCBPCR2,Serial Port Control Register B2" bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" if ((((per.w(ad:0xE6CE0000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6CE0000+0x30))&0x8)==0x8)) if ((((per.w(ad:0xE6CE0000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6CE0000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if ((((per.w(ad:0xE6CE0000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6CE0000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif rgroup.word 0x38++0x01 line.word 0x00 "SCBTFDR2,Transmit FIFO Data Count Register B2" hexmask.word 0x00 0.--8. 1. " T ,Number of data bytes remaining in SCBFTDR" rgroup.word 0x3C++0x01 line.word 0x00 "SCBRFDR2,Receive FIFO Data Count Register B2" hexmask.word 0x00 0.--8. 1. " R ,Number of data bytes remaining in SCBFRDR" wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR2,Transmit FIFO Data Register B2" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR2,Receive FIFO Data Register B2" in sif (cpu()=="R8A77440") group.word 0x80++0x01 line.word 0x00 "SCBSC2R2,Serial Control Register 2 B2" bitfld.word 0x00 0. " RRCCE ,Receive reading count compare enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R2,Serial Status Register 2 B2" bitfld.word 0x00 0. " RRCCF ,Receive reading count compare" "Less,Greater" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR2,Receive Reading Count H Register B2" group.word 0x94++0x01 line.word 0x00 "SCBRRCLR2,Receive Reading Count L Register B2" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR2,Receive Reading Count Compare H Register B2" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCLR2,Receive Reading Count Compare L Register B2" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 Register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 Register" in else group.word 0x80++0x01 line.word 0x00 "SCBSC2R2,Serial control register2 B2" bitfld.word 0x00 0. " RRCCE ,Receive Reading Count Compare Enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R2,Serial status register2 B2" bitfld.word 0x00 0. " RRCCF ,Receive Reading Count Compare" "<,>" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR2,Receive reading count H register B2" group.word 0x94++0x01 line.word 0x00 "SCBRRCHL2,Receive reading count L register B2" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR2,Receive reading count compare H register B2" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCHL2,Receive reading count compare L register B2" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 register" in endif width 0x0B tree.end tree "Channel 2 - SCIFB (DMA)" base ad:0xE7CE0000 width 12. wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR2,Transmit FIFO Data Register B2" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR2,Receive FIFO Data Register B2" in width 0x0B tree.end tree.end tree.open "HSCIF (High Speed Serial Communication Interface with FIFO)" tree "Channel 0" base ad:0xE62C0000 width 11. hgroup.byte 0x14++0x00 hide.byte 0x00 "HSFRDR,Receive FIFO Data Register" in wgroup.byte 0x0C++0x00 line.byte 0x00 "HSFTDR,Transmit FIFO Data Register" if (((per.w(ad:0xE62C0000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" else group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" endif group.word 0x08++0x01 line.word 0x00 "HSSCR,Serial Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2") rbitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " else bitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " endif bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1/0" "Internal/HSCK as input,Internal/HSCK as output,External,?..." group.word 0x10++0x01 line.word 0x00 "HSFSR,Serial Status Register" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "In progress,Ended" bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x01 line.byte 0x00 "HSBRR,Bit Rate Register" group.word 0x18++0x01 line.word 0x00 "HSFCR,FIFO Control Register" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" rgroup.word 0x1C++0x01 line.word 0x00 "HSFDR,FIFO Data Count Register" sif (cpuis("R8A77980*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77970*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470*")||(cpu()=="R8A77420*")||(cpu()=="R8A77430*")||(cpu()=="R8A77450*") hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data stored in HSFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data stored in HSFRDR" else hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data in SCFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data in SCFRDR" endif group.word 0x20++0x01 line.word 0x00 "HSSPTR,Serial Port Register" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS port input/output" "Input,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS port data" "Low level,High level" bitfld.word 0x00 5. " CTSIO ,Serial port - CTS port input/output" "Input,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS port data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock port input/output" "Input,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock port data" "Low level,High level" bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Input,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "HSLSR,Line Status Register" bitfld.word 0x00 2. " TO ,Timeout" "No timeout,Timeout" bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" group.word 0x40++0x01 line.word 0x00 "HSSRR,Sampling Rate Register" bitfld.word 0x00 15. " SRE ,Sampling rate register enable" "Disabled,Enabled" bitfld.word 0x00 14. " SRDE ,Sampling point register enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " SRHP ,Sampling point register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--4. " SRCYC ,Sampling rate register" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" rgroup.word 0x44++0x01 line.word 0x00 "HSRER,Serial Error Register" hexmask.word.byte 0x00 8.--14. 1. " PER[6:0] ,Parity error count" hexmask.word.byte 0x00 0.--6. 1. " FER[6:0] ,Framing error count" group.word 0x50++0x01 line.word 0x00 "HSRTGR,RTS Output Active Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RSTRG[6:0] ,RTS output active trigger count" group.word 0x54++0x01 line.word 0x00 "HSRTRGR,Receive FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RTRG[6:0] ,Receive FIFO data count trigger" group.word 0x58++0x01 line.word 0x00 "HSTTRGR,Transmit FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " TTRG[6:0] ,Transmit FIFO data count trigger" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77980*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77995*"))&&(!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 0" line.word 0x00 "DL0,Frequency Division Register 0" sif cpuis("R8A77470"*)||cpuis("R8A77951*")||cpuis("R8A77951-*")||cpuis("R8A77430*")||cpuis("R8A77440*") group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" elif cpuis("R8A77420*") group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" else group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree "Channel 1" base ad:0xE62C8000 width 11. hgroup.byte 0x14++0x00 hide.byte 0x00 "HSFRDR,Receive FIFO Data Register" in wgroup.byte 0x0C++0x00 line.byte 0x00 "HSFTDR,Transmit FIFO Data Register" if (((per.w(ad:0xE62C8000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" else group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register" bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1-bit,2-bit" bitfld.word 0x00 0.--1. " CKS[1:0] ,Clock select 1-0" "S,S/4,S/16,S/64" endif group.word 0x08++0x01 line.word 0x00 "HSSCR,Serial Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2") rbitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " else bitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" textline " " endif bitfld.word 0x00 11. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. " TOIE ,Timeout interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE[1:0] ,Clock enable 1/0" "Internal/HSCK as input,Internal/HSCK as output,External,?..." group.word 0x10++0x01 line.word 0x00 "HSFSR,Serial Status Register" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "In progress,Ended" bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" group.byte 0x04++0x01 line.byte 0x00 "HSBRR,Bit Rate Register" group.word 0x18++0x01 line.word 0x00 "HSFCR,FIFO Control Register" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" rgroup.word 0x1C++0x01 line.word 0x00 "HSFDR,FIFO Data Count Register" sif (cpuis("R8A77980*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77970*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470*")||(cpu()=="R8A77420*")||(cpu()=="R8A77430*")||(cpu()=="R8A77450*") hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data stored in HSFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data stored in HSFRDR" else hexmask.word.byte 0x00 8.--15. 1. " T[7:0] ,Number of untransmitted data in SCFTDR" hexmask.word.byte 0x00 0.--7. 1. " R[7:0] ,Number of received data in SCFRDR" endif group.word 0x20++0x01 line.word 0x00 "HSSPTR,Serial Port Register" bitfld.word 0x00 7. " RTSIO ,Serial port - RTS port input/output" "Input,Output" bitfld.word 0x00 6. " RTSDT ,Serial port - RTS port data" "Low level,High level" bitfld.word 0x00 5. " CTSIO ,Serial port - CTS port input/output" "Input,Output" bitfld.word 0x00 4. " CTSDT ,Serial port - CTS port data" "Low level,High level" textline " " bitfld.word 0x00 3. " SCKIO ,Serial port - clock port input/output" "Input,Output" bitfld.word 0x00 2. " SCKDT ,Serial port - clock port data" "Low level,High level" bitfld.word 0x00 1. " SPB2IO ,Serial port - break input/output" "Input,Output" bitfld.word 0x00 0. " SPB2DT ,Serial port - break data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "HSLSR,Line Status Register" bitfld.word 0x00 2. " TO ,Timeout" "No timeout,Timeout" bitfld.word 0x00 0. " ORER ,Overrun error" "No error,Error" group.word 0x40++0x01 line.word 0x00 "HSSRR,Sampling Rate Register" bitfld.word 0x00 15. " SRE ,Sampling rate register enable" "Disabled,Enabled" bitfld.word 0x00 14. " SRDE ,Sampling point register enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " SRHP ,Sampling point register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--4. " SRCYC ,Sampling rate register" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" rgroup.word 0x44++0x01 line.word 0x00 "HSRER,Serial Error Register" hexmask.word.byte 0x00 8.--14. 1. " PER[6:0] ,Parity error count" hexmask.word.byte 0x00 0.--6. 1. " FER[6:0] ,Framing error count" group.word 0x50++0x01 line.word 0x00 "HSRTGR,RTS Output Active Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RSTRG[6:0] ,RTS output active trigger count" group.word 0x54++0x01 line.word 0x00 "HSRTRGR,Receive FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " RTRG[6:0] ,Receive FIFO data count trigger" group.word 0x58++0x01 line.word 0x00 "HSTTRGR,Transmit FIFO Data Count Trigger Register" hexmask.word.byte 0x00 0.--6. 1. " TTRG[6:0] ,Transmit FIFO data count trigger" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77980*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77995*"))&&(!cpuis("R8A77990*")) group.word 0x30++0x01 "BRG 1" line.word 0x00 "DL1,Frequency Division Register 1" sif cpuis("R8A77470"*)||cpuis("R8A77951*")||cpuis("R8A77951-*")||cpuis("R8A77430*")||cpuis("R8A77440*") group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" elif cpuis("R8A77420*") group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Clock output" "SC_CLK,HSCK" bitfld.word 0x00 14. " XIN ,Baud rate generator clock source" "SCIF_CLK,ZS" else group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" endif endif width 0x0B tree.end tree.end tree.open "I2C Bus Interface" tree "Channel 0" base ad:0xE6508000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 1" base ad:0xE6518000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 2" base ad:0xE6530000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree "Channel 3" base ad:0xE6540000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD[6:0] ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master NACK Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD[6:0] ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave transfer mode" "Write,Read" textline " " textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpu()=="R8A7792X") hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." else hexmask.long.byte 0x00 2.--7. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--1. " CDF ,Clock Division Factor" "1,2,3,4" endif group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" sif cpu()!="R8A7792X" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" endif width 0xb tree.end tree.end tree.open "IIC-typeB (I2C Bus Interface)" tree "IIC 0" base ad:0xE6500000 width 10. group.byte 0x00++0x0 line.byte 0x00 "ICDR,I2C Bus Data Registers" group.byte 0x04++0x0 line.byte 0x00 "ICCR,I2C Bus Control Registers" bitfld.byte 0x00 7. " ICE ,I2C Bus Interface Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RACK ,Receive Acknowledge" "0,1" bitfld.byte 0x00 4. " TRS ,Transmit/Receive Select" "Receive,Transmit" textline " " bitfld.byte 0x00 2. " BBSY ,Bus Busy" "Not busy,Busy" bitfld.byte 0x00 0. " SCP ,Start Condition/Stop Condition Prohibit" "Start/Stop,1" group.byte 0x08++0x0 line.byte 0x00 "ICSR,I2C Bus Status Registers" rbitfld.byte 0x00 7. " SCLM ,SCL Monitor" "0,1" rbitfld.byte 0x00 6. " SDAM ,SDA Monitor" "0,1" rbitfld.byte 0x00 4. " BUSY ,I2C Transmit State Bit" "Not busy,Busy" textline " " bitfld.byte 0x00 3. " AL ,Arbitration Lost" "Won,Lost" bitfld.byte 0x00 2. " TACK ,Transmit Acknowledge Bit" "Acknowledged,Not acknowledged" bitfld.byte 0x00 1. " WAIT ,Module Normal/Wait state" "Normal,Wait" textline " " rbitfld.byte 0x00 0. " DTE ,Data Transmit Enable" "Disabled,Enabled" group.byte 0x0C++0x0 line.byte 0x00 "ICIC,I2C Interrupt Control Registers" bitfld.byte 0x00 7. " ICCLB8 ,I2C Clock Control Low Bit 8" "Not set,Set" bitfld.byte 0x00 6. " ICCHB8 ,I2C Clock Control High Bit 8" "Not set,Set" bitfld.byte 0x00 5. " TDMAE ,Transmit Data DMA Transfer Request Enable 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RDMAE ,Receive Data DMA Transfer Request Enable 1" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,Arbitration Lost Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,Non-acknowledge Detection Interrupt and function enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,Wait Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 0. " DTEE ,Data Transmit Enable Interrupt" "Disabled,Enabled" group.byte 0x10++0x0 line.byte 0x00 "ICCL,I2C Clock Control Registers Low" group.byte 0x14++0x0 line.byte 0x00 "ICCH,I2C Clock Control Registers High" rgroup.byte 0x18++0x0 line.byte 0x00 "ICTR,I2C Transmit Registers" rgroup.byte 0x1C++0x0 line.byte 0x00 "ICRR,I2C Receive Registers" rgroup.byte 0x20++0x0 line.byte 0x00 "ICTA,I2C Transmit Monitor Registers" bitfld.byte 0x00 3. " RSETUP ,Retransmission Condition Setup Monitor" "0,1" rgroup.byte 0x24++0x0 line.byte 0x00 "ICTB,I2C Transmit Buffer Monitor Registers" bitfld.byte 0x00 3. " SBFLG ,ICSF Buffer Flag" "No data,Data" bitfld.byte 0x00 2. " TBFLG ,ICTR Buffer Flag" "No data,Data" bitfld.byte 0x00 1. " RBFLG ,ICRR Buffer Flag" "No data,Data" textline " " bitfld.byte 0x00 0. " DRFLG ,ICDR Buffer Flag" "No data,Data" group.byte 0x28++0x0 line.byte 0x00 "ICTC,I2C Transmit Control Registers" bitfld.byte 0x00 3.--7. " SDA_DLY ,SDA Data Delay Select" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.byte 0x00 2. " SYNC_EN ,SCL Synchronization Select" "Activated,Not activated" rgroup.byte 0x2C++0x0 line.byte 0x00 "ICTD,I2C Transmit Control Status Monitor Registers" bitfld.byte 0x00 4. " I2C_REQ0 ,I2C Communication Request 0" "Not requested,Requested" bitfld.byte 0x00 0. " I2C_ACK0 ,I2C Communication Status 0" "No communication,Communication" rgroup.byte 0x30++0x0 line.byte 0x00 "ICSF,I2C Shift Registers" group.byte 0x6C++0x0 line.byte 0x00 "ICVCON,I2C Option Enabling Register" bitfld.byte 0x00 5. " REQ_HOLD ,Enable bit of I 2 C terminal select request hold" "Disabled,Enabled" sif cpu()=="RCARM2"||cpu()=="RCARV2H" elif (cpuis("R8J7795*"))||(cpuis("R8A7795*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpu()=="R8A77420")||(cpu()=="R8A77430") bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8A77940")||(cpu()=="R8A77450")) bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled," else bitfld.byte 0x00 4. " D8EN ,Enable bit of I2C terminal using DVFS 8case select mode" "Disabled,Enabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit Data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit Data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit Data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit Data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit Data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit Data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit Data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit Data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit Data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit Data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" elif !cpuis("R8A77450") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" endif width 0x0B tree.end tree "IIC 1" base ad:0xE6510000 width 10. group.byte 0x00++0x0 line.byte 0x00 "ICDR,I2C Bus Data Registers" group.byte 0x04++0x0 line.byte 0x00 "ICCR,I2C Bus Control Registers" bitfld.byte 0x00 7. " ICE ,I2C Bus Interface Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RACK ,Receive Acknowledge" "0,1" bitfld.byte 0x00 4. " TRS ,Transmit/Receive Select" "Receive,Transmit" textline " " bitfld.byte 0x00 2. " BBSY ,Bus Busy" "Not busy,Busy" bitfld.byte 0x00 0. " SCP ,Start Condition/Stop Condition Prohibit" "Start/Stop,1" group.byte 0x08++0x0 line.byte 0x00 "ICSR,I2C Bus Status Registers" rbitfld.byte 0x00 7. " SCLM ,SCL Monitor" "0,1" rbitfld.byte 0x00 6. " SDAM ,SDA Monitor" "0,1" rbitfld.byte 0x00 4. " BUSY ,I2C Transmit State Bit" "Not busy,Busy" textline " " bitfld.byte 0x00 3. " AL ,Arbitration Lost" "Won,Lost" bitfld.byte 0x00 2. " TACK ,Transmit Acknowledge Bit" "Acknowledged,Not acknowledged" bitfld.byte 0x00 1. " WAIT ,Module Normal/Wait state" "Normal,Wait" textline " " rbitfld.byte 0x00 0. " DTE ,Data Transmit Enable" "Disabled,Enabled" group.byte 0x0C++0x0 line.byte 0x00 "ICIC,I2C Interrupt Control Registers" bitfld.byte 0x00 7. " ICCLB8 ,I2C Clock Control Low Bit 8" "Not set,Set" bitfld.byte 0x00 6. " ICCHB8 ,I2C Clock Control High Bit 8" "Not set,Set" bitfld.byte 0x00 5. " TDMAE ,Transmit Data DMA Transfer Request Enable 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RDMAE ,Receive Data DMA Transfer Request Enable 1" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,Arbitration Lost Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,Non-acknowledge Detection Interrupt and function enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,Wait Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 0. " DTEE ,Data Transmit Enable Interrupt" "Disabled,Enabled" group.byte 0x10++0x0 line.byte 0x00 "ICCL,I2C Clock Control Registers Low" group.byte 0x14++0x0 line.byte 0x00 "ICCH,I2C Clock Control Registers High" rgroup.byte 0x18++0x0 line.byte 0x00 "ICTR,I2C Transmit Registers" rgroup.byte 0x1C++0x0 line.byte 0x00 "ICRR,I2C Receive Registers" rgroup.byte 0x20++0x0 line.byte 0x00 "ICTA,I2C Transmit Monitor Registers" bitfld.byte 0x00 3. " RSETUP ,Retransmission Condition Setup Monitor" "0,1" rgroup.byte 0x24++0x0 line.byte 0x00 "ICTB,I2C Transmit Buffer Monitor Registers" bitfld.byte 0x00 3. " SBFLG ,ICSF Buffer Flag" "No data,Data" bitfld.byte 0x00 2. " TBFLG ,ICTR Buffer Flag" "No data,Data" bitfld.byte 0x00 1. " RBFLG ,ICRR Buffer Flag" "No data,Data" textline " " bitfld.byte 0x00 0. " DRFLG ,ICDR Buffer Flag" "No data,Data" group.byte 0x28++0x0 line.byte 0x00 "ICTC,I2C Transmit Control Registers" bitfld.byte 0x00 3.--7. " SDA_DLY ,SDA Data Delay Select" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.byte 0x00 2. " SYNC_EN ,SCL Synchronization Select" "Activated,Not activated" rgroup.byte 0x2C++0x0 line.byte 0x00 "ICTD,I2C Transmit Control Status Monitor Registers" bitfld.byte 0x00 4. " I2C_REQ0 ,I2C Communication Request 0" "Not requested,Requested" bitfld.byte 0x00 0. " I2C_ACK0 ,I2C Communication Status 0" "No communication,Communication" rgroup.byte 0x30++0x0 line.byte 0x00 "ICSF,I2C Shift Registers" group.byte 0x6C++0x0 line.byte 0x00 "ICVCON,I2C Option Enabling Register" bitfld.byte 0x00 5. " REQ_HOLD ,Enable bit of I 2 C terminal select request hold" "Disabled,Enabled" sif cpu()=="RCARM2"||cpu()=="RCARV2H" elif (cpuis("R8J7795*"))||(cpuis("R8A7795*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpu()=="R8A77420")||(cpu()=="R8A77430") bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8A77940")||(cpu()=="R8A77450")) bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled," else bitfld.byte 0x00 4. " D8EN ,Enable bit of I2C terminal using DVFS 8case select mode" "Disabled,Enabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit Data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit Data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit Data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit Data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit Data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit Data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit Data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit Data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit Data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit Data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" elif !cpuis("R8A77450") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" endif width 0x0B tree.end tree "IIC 2" base ad:0xE6520000 width 10. group.byte 0x00++0x0 line.byte 0x00 "ICDR,I2C Bus Data Registers" group.byte 0x04++0x0 line.byte 0x00 "ICCR,I2C Bus Control Registers" bitfld.byte 0x00 7. " ICE ,I2C Bus Interface Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RACK ,Receive Acknowledge" "0,1" bitfld.byte 0x00 4. " TRS ,Transmit/Receive Select" "Receive,Transmit" textline " " bitfld.byte 0x00 2. " BBSY ,Bus Busy" "Not busy,Busy" bitfld.byte 0x00 0. " SCP ,Start Condition/Stop Condition Prohibit" "Start/Stop,1" group.byte 0x08++0x0 line.byte 0x00 "ICSR,I2C Bus Status Registers" rbitfld.byte 0x00 7. " SCLM ,SCL Monitor" "0,1" rbitfld.byte 0x00 6. " SDAM ,SDA Monitor" "0,1" rbitfld.byte 0x00 4. " BUSY ,I2C Transmit State Bit" "Not busy,Busy" textline " " bitfld.byte 0x00 3. " AL ,Arbitration Lost" "Won,Lost" bitfld.byte 0x00 2. " TACK ,Transmit Acknowledge Bit" "Acknowledged,Not acknowledged" bitfld.byte 0x00 1. " WAIT ,Module Normal/Wait state" "Normal,Wait" textline " " rbitfld.byte 0x00 0. " DTE ,Data Transmit Enable" "Disabled,Enabled" group.byte 0x0C++0x0 line.byte 0x00 "ICIC,I2C Interrupt Control Registers" bitfld.byte 0x00 7. " ICCLB8 ,I2C Clock Control Low Bit 8" "Not set,Set" bitfld.byte 0x00 6. " ICCHB8 ,I2C Clock Control High Bit 8" "Not set,Set" bitfld.byte 0x00 5. " TDMAE ,Transmit Data DMA Transfer Request Enable 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RDMAE ,Receive Data DMA Transfer Request Enable 1" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,Arbitration Lost Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,Non-acknowledge Detection Interrupt and function enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,Wait Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 0. " DTEE ,Data Transmit Enable Interrupt" "Disabled,Enabled" group.byte 0x10++0x0 line.byte 0x00 "ICCL,I2C Clock Control Registers Low" group.byte 0x14++0x0 line.byte 0x00 "ICCH,I2C Clock Control Registers High" rgroup.byte 0x18++0x0 line.byte 0x00 "ICTR,I2C Transmit Registers" rgroup.byte 0x1C++0x0 line.byte 0x00 "ICRR,I2C Receive Registers" rgroup.byte 0x20++0x0 line.byte 0x00 "ICTA,I2C Transmit Monitor Registers" bitfld.byte 0x00 3. " RSETUP ,Retransmission Condition Setup Monitor" "0,1" rgroup.byte 0x24++0x0 line.byte 0x00 "ICTB,I2C Transmit Buffer Monitor Registers" bitfld.byte 0x00 3. " SBFLG ,ICSF Buffer Flag" "No data,Data" bitfld.byte 0x00 2. " TBFLG ,ICTR Buffer Flag" "No data,Data" bitfld.byte 0x00 1. " RBFLG ,ICRR Buffer Flag" "No data,Data" textline " " bitfld.byte 0x00 0. " DRFLG ,ICDR Buffer Flag" "No data,Data" group.byte 0x28++0x0 line.byte 0x00 "ICTC,I2C Transmit Control Registers" bitfld.byte 0x00 3.--7. " SDA_DLY ,SDA Data Delay Select" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.byte 0x00 2. " SYNC_EN ,SCL Synchronization Select" "Activated,Not activated" rgroup.byte 0x2C++0x0 line.byte 0x00 "ICTD,I2C Transmit Control Status Monitor Registers" bitfld.byte 0x00 4. " I2C_REQ0 ,I2C Communication Request 0" "Not requested,Requested" bitfld.byte 0x00 0. " I2C_ACK0 ,I2C Communication Status 0" "No communication,Communication" rgroup.byte 0x30++0x0 line.byte 0x00 "ICSF,I2C Shift Registers" group.byte 0x6C++0x0 line.byte 0x00 "ICVCON,I2C Option Enabling Register" bitfld.byte 0x00 5. " REQ_HOLD ,Enable bit of I 2 C terminal select request hold" "Disabled,Enabled" sif cpu()=="RCARM2"||cpu()=="RCARV2H" elif (cpuis("R8J7795*"))||(cpuis("R8A7795*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpu()=="R8A77420")||(cpu()=="R8A77430") bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8A77940")||(cpu()=="R8A77450")) bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled," else bitfld.byte 0x00 4. " D8EN ,Enable bit of I2C terminal using DVFS 8case select mode" "Disabled,Enabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit Data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit Data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit Data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit Data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit Data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit Data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit Data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit Data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit Data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit Data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" elif !cpuis("R8A77450") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" endif width 0x0B tree.end tree "IIC 3 (DVFS)" base ad:0xE60B0000 width 10. group.byte 0x00++0x0 line.byte 0x00 "ICDR,I2C Bus Data Registers" group.byte 0x04++0x0 line.byte 0x00 "ICCR,I2C Bus Control Registers" bitfld.byte 0x00 7. " ICE ,I2C Bus Interface Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RACK ,Receive Acknowledge" "0,1" bitfld.byte 0x00 4. " TRS ,Transmit/Receive Select" "Receive,Transmit" textline " " bitfld.byte 0x00 2. " BBSY ,Bus Busy" "Not busy,Busy" bitfld.byte 0x00 0. " SCP ,Start Condition/Stop Condition Prohibit" "Start/Stop,1" group.byte 0x08++0x0 line.byte 0x00 "ICSR,I2C Bus Status Registers" rbitfld.byte 0x00 7. " SCLM ,SCL Monitor" "0,1" rbitfld.byte 0x00 6. " SDAM ,SDA Monitor" "0,1" rbitfld.byte 0x00 4. " BUSY ,I2C Transmit State Bit" "Not busy,Busy" textline " " bitfld.byte 0x00 3. " AL ,Arbitration Lost" "Won,Lost" bitfld.byte 0x00 2. " TACK ,Transmit Acknowledge Bit" "Acknowledged,Not acknowledged" bitfld.byte 0x00 1. " WAIT ,Module Normal/Wait state" "Normal,Wait" textline " " rbitfld.byte 0x00 0. " DTE ,Data Transmit Enable" "Disabled,Enabled" group.byte 0x0C++0x0 line.byte 0x00 "ICIC,I2C Interrupt Control Registers" bitfld.byte 0x00 7. " ICCLB8 ,I2C Clock Control Low Bit 8" "Not set,Set" bitfld.byte 0x00 6. " ICCHB8 ,I2C Clock Control High Bit 8" "Not set,Set" bitfld.byte 0x00 5. " TDMAE ,Transmit Data DMA Transfer Request Enable 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RDMAE ,Receive Data DMA Transfer Request Enable 1" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,Arbitration Lost Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,Non-acknowledge Detection Interrupt and function enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,Wait Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 0. " DTEE ,Data Transmit Enable Interrupt" "Disabled,Enabled" group.byte 0x10++0x0 line.byte 0x00 "ICCL,I2C Clock Control Registers Low" group.byte 0x14++0x0 line.byte 0x00 "ICCH,I2C Clock Control Registers High" rgroup.byte 0x18++0x0 line.byte 0x00 "ICTR,I2C Transmit Registers" rgroup.byte 0x1C++0x0 line.byte 0x00 "ICRR,I2C Receive Registers" rgroup.byte 0x20++0x0 line.byte 0x00 "ICTA,I2C Transmit Monitor Registers" bitfld.byte 0x00 3. " RSETUP ,Retransmission Condition Setup Monitor" "0,1" rgroup.byte 0x24++0x0 line.byte 0x00 "ICTB,I2C Transmit Buffer Monitor Registers" bitfld.byte 0x00 3. " SBFLG ,ICSF Buffer Flag" "No data,Data" bitfld.byte 0x00 2. " TBFLG ,ICTR Buffer Flag" "No data,Data" bitfld.byte 0x00 1. " RBFLG ,ICRR Buffer Flag" "No data,Data" textline " " bitfld.byte 0x00 0. " DRFLG ,ICDR Buffer Flag" "No data,Data" group.byte 0x28++0x0 line.byte 0x00 "ICTC,I2C Transmit Control Registers" bitfld.byte 0x00 3.--7. " SDA_DLY ,SDA Data Delay Select" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.byte 0x00 2. " SYNC_EN ,SCL Synchronization Select" "Activated,Not activated" rgroup.byte 0x2C++0x0 line.byte 0x00 "ICTD,I2C Transmit Control Status Monitor Registers" bitfld.byte 0x00 4. " I2C_REQ0 ,I2C Communication Request 0" "Not requested,Requested" bitfld.byte 0x00 0. " I2C_ACK0 ,I2C Communication Status 0" "No communication,Communication" rgroup.byte 0x30++0x0 line.byte 0x00 "ICSF,I2C Shift Registers" group.byte 0x6C++0x0 line.byte 0x00 "ICVCON,I2C Option Enabling Register" bitfld.byte 0x00 5. " REQ_HOLD ,Enable bit of I 2 C terminal select request hold" "Disabled,Enabled" sif cpu()=="RCARM2"||cpu()=="RCARV2H" bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8J7795*"))||(cpuis("R8A7795*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpu()=="R8A77420")||(cpu()=="R8A77430") bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8A77940")||(cpu()=="R8A77450")) bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled," else bitfld.byte 0x00 4. " D8EN ,Enable bit of I2C terminal using DVFS 8case select mode" "Disabled,Enabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430") elif !cpuis("R8A77450") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" endif width 0x0B tree.end tree.end tree.open "MSIOF (Clock-Synchronized Serial Interface with FIFO)" tree "MSIOF 0 (CPU)" base ad:0xE6E20000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E20000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E20000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 0 (DMA)" base ad:0xE7E20000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE7E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE7E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE7E20000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E20000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E20000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E20000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E20000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 1 (CPU)" base ad:0xE6E10000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E10000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E10000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 1 (DMA)" base ad:0xE76E10000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE76E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE76E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE76E10000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE76E10000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE76E10000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE76E10000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE76E10000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 2 (CPU)" base ad:0xE6E00000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E00000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E00000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E00000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E00000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E00000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 2 (DMA)" base ad:0xE7E00000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE7E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE7E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE7E00000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E00000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E00000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E00000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E00000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 3 (CPU)" base ad:0xE6C90000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6C90000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6C90000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6C90000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6C90000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6C90000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6C90000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6C90000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6C90000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6C90000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6C90000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6C90000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6C90000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 3 (DMA)" base ad:0xE7C90000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7C90000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE7C90000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE7C90000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE7C90000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7C90000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7C90000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7C90000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7C90000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7C90000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7C90000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7C90000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7C90000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree.end tree "QSPI (Quad Serial Peripheral Interface)" base ad:0xE6B10000 width 9. group.byte 0x00++0x02 line.byte 0x00 "SPCR,Control Register" bitfld.byte 0x00 7. " SPRIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " SPE ,SPI function enable" "Disabled,Enabled" bitfld.byte 0x00 5. " SPTIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " SPEIE ,Error interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " MSTR ,Master/slave mode select" "Slave,Master" sif (cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("RCARV2H")||(cpu()=="R8A77470")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77440") textline " " bitfld.byte 0x00 1. " WSWAP ,Word swap" "Not swapped,Swapped" bitfld.byte 0x00 0. " BSWAP ,Byte swap" "Not swapped,Swapped" endif line.byte 0x01 "SSLP,Slave Select Polarity Register" bitfld.byte 0x01 0. " SSLP ,SSL signal polarity setting" "Low,High" line.byte 0x02 "SPPCR,Pin Control Register" bitfld.byte 0x02 5. " MOIFE ,Master-mode output idle value fixing enable" "Disabled,Enabled" bitfld.byte 0x02 4. " MOIFV ,Master-mode output idle fixed value" "0,1" bitfld.byte 0x02 2. " IO3FV ,Single-/dual-SPI mode IO3 output fixed value" "0,1" textline " " bitfld.byte 0x02 1. " IO2FV ,Single-/dual-SPI mode IO2 output fixed value" "0,1" bitfld.byte 0x02 0. " SPLP ,Loopback mode" "Disabled,Enabled" rgroup.byte 0x03++0x00 line.byte 0x00 "SPSR,Status Register" bitfld.byte 0x00 7. " SPRFF ,Receive buffer full flag" "Not full,Full" bitfld.byte 0x00 6. " TEND ,Transmit end flag" "Not completed,Completed" bitfld.byte 0x00 5. " SPTEF ,Transmit buffer empty flag" "Not empty,Empty" group.long 0x04++0x03 line.long 0x00 "SPDR,Data Register" group.byte 0x08++0x00 line.byte 0x00 "SPSCR,Sequence Control Register" bitfld.byte 0x00 0.--1. " SPSC ,Sequence control specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..." rgroup.byte 0x09++0x00 line.byte 0x00 "SPSSR,Sequence Status Register" bitfld.byte 0x00 0.--1. " SPSS ,Sequence status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3" group.byte 0x0A++0x04 line.byte 0x00 "SPBR,Bit Rate Register" line.byte 0x01 "SPDCR,Data Control Register" bitfld.byte 0x01 7. " TXDMY ,Dummy data transmission enable" "Disabled,Enabled" line.byte 0x02 "SPCKD,Clock Delay Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.byte 0x02 0.--2. " SCKDL ,Clock delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" else bitfld.byte 0x02 0.--2. " SCKDL ,Clock delay setting" "1.5 SPCLK cycles,2.5 SPCLK cycles,3.5 SPCLK cycles,4.5 SPCLK cycles,5.5 SPCLK cycles,6.5 SPCLK cycles,7.5 SPCLK cycles,8.5 SPCLK cycles" endif line.byte 0x03 "SSLND,Slave Select Negation Delay Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.byte 0x03 0.--2. " SLNDL ,SSL negation delay setting" "0.5 SPCLK cycle,1.5 SPCLK cycles,2.5 SPCLK cycles,3.5 SPCLK cycles,4.5 SPCLK cycles,5.5 SPCLK cycles,6.5 SPCLK cycles,7.5 SPCLK cycles" else bitfld.byte 0x03 0.--2. " SLNDL ,SSL negation delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" endif line.byte 0x04 "SPND,Next-Access Delay Register" bitfld.byte 0x04 0.--2. " SPNDL ,Next-access delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" group.word 0x10++0x03 line.word 0x00 "SPCMD0,Command Register 0" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x12++0x03 line.word 0x00 "SPCMD1,Command Register 1" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x14++0x03 line.word 0x00 "SPCMD2,Command Register 2" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x16++0x03 line.word 0x00 "SPCMD3,Command Register 3" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.byte 0x18++0x00 line.byte 0x00 "SPBFCR,Buffer Control Register" bitfld.byte 0x00 7. " TXRST ,Transmit buffer data reset" "No reset,Reset" bitfld.byte 0x00 6. " RXRST ,Receive buffer data reset" "No reset,Reset" bitfld.byte 0x00 4.--5. " TXTRG ,Transmit buffer data triggering number" "31 byte,30 bytes,28 bytes,0 byte" textline " " bitfld.byte 0x00 0.--2. " RXTRG ,Receive buffer data triggering number" "1 byte,2 bytes,4 bytes,5 bytes,8 bytes,16 bytes,24 bytes,32 bytes" rgroup.word 0x1A++0x01 line.word 0x00 "SPBDCR,Buffer Data Count Register" bitfld.word 0x00 8.--13. " TXBC ,Transmit data byte counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," bitfld.word 0x00 0.--5. " RXBC ,Receive data byte counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," group.long 0x1C++0x03 line.long 0x00 "SPBMUL0,Transfer Data Length Multiplier Setting Register 0" group.long 0x20++0x03 line.long 0x00 "SPBMUL1,Transfer Data Length Multiplier Setting Register 1" group.long 0x24++0x03 line.long 0x00 "SPBMUL2,Transfer Data Length Multiplier Setting Register 2" group.long 0x28++0x03 line.long 0x00 "SPBMUL3,Transfer Data Length Multiplier Setting Register 3" width 0x0B tree.end tree.open "MMC (Multi Media Card interface)" tree "Channel 0" base ad:0xEE200000 width 15. group.long 0x00++0x03 line.long 0x00 "CMD_SET,Command Setting Register" sif !cpuis("SH7268")&&!cpuis("SH7269") bitfld.long 0x00 30. " BOOT ,Boot operation" "Disabled,Enabled" newline endif bitfld.long 0x00 24.--29. " CMD ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 22.--23. " RTYP ,Response Type" "No response,6-byte,17-byte,?..." bitfld.long 0x00 21. " RBSY ,Response Busy Select" "Not busy,Busy" newline bitfld.long 0x00 19. " WDAT ,Presence/Absence of Data" "Not present,Present" bitfld.long 0x00 18. " DWEN ,Read/Write" "Read,Write" bitfld.long 0x00 17. " CMLTE ,Single/Multi Block Transfer Select" "Single,Multi" bitfld.long 0x00 16. " CMD12EN ,Automatic CMD12 Issuance" "Disabled,Enabled" newline bitfld.long 0x00 14.--15. " RIDXC ,Response Index Check" "Response index,Check bits,No checking,?..." bitfld.long 0x00 12.--13. " RCRC7C ,Response CRC7 Check" "CRC7,Check bits,Internal CRC7,No checking" bitfld.long 0x00 10. " CRC16C ,CRC16 Check in Reception" "Checked,Not checked" sif !cpuis("SH7268")&&!cpuis("SH7269") bitfld.long 0x00 9. " BOOTACK ,Receive Boot Acknowledge" "Not acknowledged,Acknowledged" endif newline bitfld.long 0x00 8. " CRCSTE ,CRC Status Reception" "Received,Not received" bitfld.long 0x00 7. " TBIT ,Transmission Bit Setting" "Received,Not received" bitfld.long 0x00 6. " OPDM ,Open-Drain Output Mode" "Normal,Open-drain" bitfld.long 0x00 3. " SBIT ,Read Data Start Bit Detection Setting" "DATW specified = 0,MMCDAT[0] = 0" newline bitfld.long 0x00 0.--1. " DATW ,Data Bus Width Setting" "1,4,8,?..." group.long 0x08++0x17 line.long 0x00 "ARG,Argument Register" line.long 0x04 "ARG_CMD12,Argument Register for Automatically-Issued CMD12 Register" line.long 0x08 "CMD_CTRL,Argument Register for Automatically-Issued CMD12 Register" bitfld.long 0x08 0. " BREAK ,Forcible Termination of Command Sequence" "0,1" line.long 0x0c "BLOCK_SET,Transfer Block Setting Register" hexmask.long.word 0x0c 16.--31. 1. " BLKCNT ,Number of Blocks for Transfer" hexmask.long.word 0x0c 0.--15. 1. " BLKSIZ ,Transfer Block Size" line.long 0x10 "CLK_CTRL,Clock Control Register" bitfld.long 0x10 24. " CLKEN ,MMC Clock Output Control" "Not output,Output" bitfld.long 0x10 16.--19. " CLKDIV ,MMC Clock Frequency Setting" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,?..." bitfld.long 0x10 12.--13. " SRSPTO ,Response Timeout Setting" "64,128,256,?..." newline bitfld.long 0x10 8.--11. " SRBSYTO ,Response Busy Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x10 4.--7. " SRWDTO ,Write Data/Read Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" line.long 0x14 "BUF_ACC,Buffer Access Configuration Register" bitfld.long 0x14 25. " DMAWEN ,Buffer Write DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 24. " DMAREN ,Buffer Read DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 17. " BUSW ,Data register access size selection" "32-bit,16-bit" bitfld.long 0x14 16. " ATYP ,Buffer access selection" "Not swapped bytw-wise,Swapped byte-wise" if ((per.l(ad:0xEE200000)&0xc00000)==0x800000) rgroup.long 0x20++0x0F line.long 0x00 "RESP3,Response Register 3" line.long 0x04 "RESP2,Response Register 2" line.long 0x08 "RESP1,Response Register 1" line.long 0x0C "RESP0,Response Register 0" elif ((per.l(ad:0xEE200000)&0xc00000)==0x400000) hgroup.long 0x20++0x0B hide.long 0x00 "RESP3,Response Register 3" hide.long 0x04 "RESP2,Response Register 2" hide.long 0x08 "RESP1,Response Register 1" rgroup.long 0x2C++0x03 line.long 0x00 "RESP0,Response Register 0" else hgroup.long 0x20++0x0F hide.long 0x00 "RESP3,Response Register 3" hide.long 0x04 "RESP2,Response Register 2" hide.long 0x08 "RESP1,Response Register 1" hide.long 0x0C "RESP0,Response Register 0" endif rgroup.long 0x30++0x03 line.long 0x00 "RESP_CMD12,Response Register for Automatically-Issued CMD12" group.long 0x34++0x03 line.long 0x00 "DATA,Data Register" sif !cpuis("SH7268")&&!cpuis("SH7269") group.long 0x3C++0x03 line.long 0x00 "BOOT,Boot Operation Setting Register" bitfld.long 0x00 28.--31. " BTCLKDIV ,MMC Clock Frequency Setting in Boot Mode" "/2,/4,/8,/16,?..." bitfld.long 0x00 24.--27. " SBTACKTO ,Boot Acknowledge Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x00 20.--23. " S1STBTDATTO ,1st Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x00 16.--19. " SBTDATTO ,Interval Between Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" endif group.long 0x40++0x07 line.long 0x00 "INT,Interrupt Flag Register" bitfld.long 0x00 26. " CMD12DRE ,Automatic CMD12 Issuance Buffer Read Complete" "Not completed,Completed" bitfld.long 0x00 25. " CMD12RBE ,Automatic CMD12 Issuance Response Busy Complete" "Not completed,Completed" bitfld.long 0x00 24. " CMD12CRE ,Automatic CMD12 Response Complete" "Not completed,Completed" bitfld.long 0x00 23. " DTRANE ,Data Transmission Complete" "Not completed,Completed" newline bitfld.long 0x00 22. " BUFRE ,Buffer Read Complete" "Not completed,Completed" bitfld.long 0x00 21. " BUFWEN ,Buffer Write Ready" "Not ready,Ready" bitfld.long 0x00 20. " BUFREN ,Buffer Read Ready" "Not ready,Ready" bitfld.long 0x00 17. " RBSYE ,Response Busy Complete" "Not completed,Completed" newline bitfld.long 0x00 16. " CRSPE ,Command/Response Complete" "Not completed,Completed" bitfld.long 0x00 15. " CMDVIO ,Command Issuance Error" "No error,Error" bitfld.long 0x00 14. " BUFVIO ,Buffer Access Error" "No error,Error" bitfld.long 0x00 11. " WDATERR ,Write Data Error" "No error,Error" newline bitfld.long 0x00 10. " RDATERR ,Read Data Error" "No error,Error" bitfld.long 0x00 9. " RIDXERR ,Response Index Error" "No error,Error" bitfld.long 0x00 8. " RSPERR ,Response Error" "No error,Error" bitfld.long 0x00 4. " CRCSTO ,CRC Status Timeout" "No timeout,Timeout" newline bitfld.long 0x00 3. " WDATTO ,Write Data Timeout" "No timeout,Timeout" bitfld.long 0x00 2. " RDATTO ,Read Data Timeout" "No timeout,Timeout" bitfld.long 0x00 1. " RBSYTO ,Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x00 0. " RSPTO ,Response Timeout" "No timeout,Timeout" line.long 0x04 "INT_EN,Interrupt Enable Register" bitfld.long 0x04 26. " MCMD12DRE ,CMD12DRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " MCMD12RBE ,CMD12RBE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 24. " MCMD12CRE ,CMD12CRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 23. " MDTRANE ,DTRANE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 22. " MBUFRE ,BUFRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 21. " MBUFWEN ,BUFWEN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 20. " MBUFREN ,BUFREN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 17. " MRBSYE ,RBSYE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 16. " MCRSPE ,CRSPE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 15. " MCMDVIO ,CMDVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 14. " MBUFVIO ,BUFVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 11. " MWDATERR ,WDATERR Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 10. " MRDATERR ,RDATERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 9. " MRIDXERR ,RIDXERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 8. " MRSPERR ,RSPERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 4. " MCRCSTO ,CRCSTO Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " MWDATTO ,WDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 2. " MRDATTO ,RDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 1. " MRBSYTO ,RBSYTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 0. " MRSPTO ,RSPTO Interrupt Enable" "Disabled,Enabled" rgroup.long 0x48++0x07 line.long 0x00 "HOST_STS1,Status Register 1" bitfld.long 0x00 31. " CMDSEQ ,Command Sequence in Progress" "Initialization,Execution" bitfld.long 0x00 30. " CMDSIG ,CMD Line Status" "Initialization,Execution" bitfld.long 0x00 24.--29. " RSPIDX ,Response Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline hexmask.long.byte 0x00 16.--23. 1. " DATSIG ,Indicate the states on the DAT lines" hexmask.long.word 0x00 0.--15. 1. " RCVBLK ,Number of Transferred Blocks" line.long 0x04 "HOST_STS2,Status Register 2" bitfld.long 0x04 31. " CRCSTE ,Command Sequence in Progress" "No error,Error" bitfld.long 0x04 30. " CRC16E ,Read Data CRC16 Error" "No error,Error" bitfld.long 0x04 29. " AC12CRCE ,Automatic CMD12 Response CRC7 Error" "No error,Error" bitfld.long 0x04 28. " RSPCRC7E ,Command Response CRC7 Error" "No error,Error" newline bitfld.long 0x04 27. " CRCSTEBE ,CRC Status End Bit Error" "No error,Error" bitfld.long 0x04 26. " RDATEBE ,Read Data End Bit Error" "No error,Error" bitfld.long 0x04 25. " AC12REBE ,Automatic CMD12 Response End Bit Error" "No error,Error" bitfld.long 0x04 24. " RSPEBE ,Command Response End Bit Error" "No error,Error" newline bitfld.long 0x04 23. " AC12IDXE ,Automatic CMD12 Response Index Error" "No error,Error" bitfld.long 0x04 22. " RSPIDXE ,Command Response Index Error" "No error,Error" sif !cpuis("SH7268")&&!cpuis("SH7269") bitfld.long 0x04 21. " BTACKPATE ,Boot Acknowledge Pattern Error" "No error,Error" bitfld.long 0x04 20. " BTACKEBE ,Boot Acknowledge End Bit Error" "No error,Error" endif newline bitfld.long 0x04 16.--18. " CRCST ,CRC Status" "0,1,2,3,4,5,6,7" bitfld.long 0x04 14. " STRDATTO ,Read Data Timeout" "No timeout,Timeout" bitfld.long 0x04 13. " DATBSYTO ,Data Busy Timeout" "No timeout,Timeout" bitfld.long 0x04 12. " CRCSTTO ,CRC Status Timeout" "No timeout,Timeout" newline bitfld.long 0x04 11. " AC12BSYTO ,Automatic CMD12 Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x04 10. " RSPBSYTO ,Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x04 9. " AC12RSPTO ,Automatic CMD12 Response Timeout" "No timeout,Timeout" bitfld.long 0x04 8. " STRSPTO ,Response Timeout" "No timeout,Timeout" sif !cpuis("SH7268")&&!cpuis("SH7269") newline bitfld.long 0x04 7. " BTACKTO ,Boot Acknowledge Timeout" "No timeout,Timeout" bitfld.long 0x04 6. " 1STBTDATTO ,1st Boot Data Timeout" "No timeout,Timeout" bitfld.long 0x04 5. " BTDATTO ,Interval between Boot Data Timeout" "No timeout,Timeout" endif sif cpuis("SH7268")||cpuis("SH7269") group.long 0x5C++0x03 line.long 0x00 "DMA_MODE,DMA Mode Setting Register" bitfld.long 0x00 0. " DMASEL ,DMA Transfer Size Select" "2-byte or 4-byte,16-byte" group.long 0x70++0x07 line.long 0x00 "DETECT,Card Detection/Port Control Register" bitfld.long 0x00 14. " CDSIG ,MMC_CD pin status indication" "0,1" bitfld.long 0x00 13. " CDRISE ,MMC_CD pin rise detection flag" "Not occurred,Occurred" bitfld.long 0x00 12. " CDFALL ,MMC_CD pin fall detection flag" "Not occurred,Occurred" bitfld.long 0x00 5. " MCDRISE ,CDRISE interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " MCDFALL ,CDFALL interrupt enable" "Disabled,Enabled" line.long 0x04 "ADD_MODE,Special mode setting register" bitfld.long 0x04 19. " CLKMAIN ,Internal Clock Control" "Normal,Low power consumption" else group.long 0x70++0x03 line.long 0x00 "CLK_CTRL2,Clock Control Register 2" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.long 0x00 24.--27. " MMC_CLKU ,Set these bits to H'F before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " MMC_CLKL ,Set these bits to H'F before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " MMC_CLKU ,Set these bits to 4 before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " MMC_CLKL ,Set these bits to 4 before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x7C++0x03 line.long 0x00 "VERSION,Version Register" bitfld.long 0x00 31. " SWRST ,Software Reset" "No reset,Reset" hexmask.long.word 0x00 0.--15. 1. " VERSION ,Version Information" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") group.long 0x80++0x3 line.long 0x00 "ODATSEL,Data Output Phase Select Register" bitfld.long 0x00 8. " ODTS ,Output Data Timing Select" "Rising,Falling" endif width 0x0B tree.end tree "Channel 1" base ad:0xEE220000 width 15. group.long 0x00++0x03 line.long 0x00 "CMD_SET,Command Setting Register" sif !cpuis("SH7268")&&!cpuis("SH7269") bitfld.long 0x00 30. " BOOT ,Boot operation" "Disabled,Enabled" newline endif bitfld.long 0x00 24.--29. " CMD ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 22.--23. " RTYP ,Response Type" "No response,6-byte,17-byte,?..." bitfld.long 0x00 21. " RBSY ,Response Busy Select" "Not busy,Busy" newline bitfld.long 0x00 19. " WDAT ,Presence/Absence of Data" "Not present,Present" bitfld.long 0x00 18. " DWEN ,Read/Write" "Read,Write" bitfld.long 0x00 17. " CMLTE ,Single/Multi Block Transfer Select" "Single,Multi" bitfld.long 0x00 16. " CMD12EN ,Automatic CMD12 Issuance" "Disabled,Enabled" newline bitfld.long 0x00 14.--15. " RIDXC ,Response Index Check" "Response index,Check bits,No checking,?..." bitfld.long 0x00 12.--13. " RCRC7C ,Response CRC7 Check" "CRC7,Check bits,Internal CRC7,No checking" bitfld.long 0x00 10. " CRC16C ,CRC16 Check in Reception" "Checked,Not checked" sif !cpuis("SH7268")&&!cpuis("SH7269") bitfld.long 0x00 9. " BOOTACK ,Receive Boot Acknowledge" "Not acknowledged,Acknowledged" endif newline bitfld.long 0x00 8. " CRCSTE ,CRC Status Reception" "Received,Not received" bitfld.long 0x00 7. " TBIT ,Transmission Bit Setting" "Received,Not received" bitfld.long 0x00 6. " OPDM ,Open-Drain Output Mode" "Normal,Open-drain" bitfld.long 0x00 3. " SBIT ,Read Data Start Bit Detection Setting" "DATW specified = 0,MMCDAT[0] = 0" newline bitfld.long 0x00 0.--1. " DATW ,Data Bus Width Setting" "1,4,8,?..." group.long 0x08++0x17 line.long 0x00 "ARG,Argument Register" line.long 0x04 "ARG_CMD12,Argument Register for Automatically-Issued CMD12 Register" line.long 0x08 "CMD_CTRL,Argument Register for Automatically-Issued CMD12 Register" bitfld.long 0x08 0. " BREAK ,Forcible Termination of Command Sequence" "0,1" line.long 0x0c "BLOCK_SET,Transfer Block Setting Register" hexmask.long.word 0x0c 16.--31. 1. " BLKCNT ,Number of Blocks for Transfer" hexmask.long.word 0x0c 0.--15. 1. " BLKSIZ ,Transfer Block Size" line.long 0x10 "CLK_CTRL,Clock Control Register" bitfld.long 0x10 24. " CLKEN ,MMC Clock Output Control" "Not output,Output" bitfld.long 0x10 16.--19. " CLKDIV ,MMC Clock Frequency Setting" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,?..." bitfld.long 0x10 12.--13. " SRSPTO ,Response Timeout Setting" "64,128,256,?..." newline bitfld.long 0x10 8.--11. " SRBSYTO ,Response Busy Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x10 4.--7. " SRWDTO ,Write Data/Read Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" line.long 0x14 "BUF_ACC,Buffer Access Configuration Register" bitfld.long 0x14 25. " DMAWEN ,Buffer Write DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 24. " DMAREN ,Buffer Read DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 17. " BUSW ,Data register access size selection" "32-bit,16-bit" bitfld.long 0x14 16. " ATYP ,Buffer access selection" "Not swapped bytw-wise,Swapped byte-wise" if ((per.l(ad:0xEE220000)&0xc00000)==0x800000) rgroup.long 0x20++0x0F line.long 0x00 "RESP3,Response Register 3" line.long 0x04 "RESP2,Response Register 2" line.long 0x08 "RESP1,Response Register 1" line.long 0x0C "RESP0,Response Register 0" elif ((per.l(ad:0xEE220000)&0xc00000)==0x400000) hgroup.long 0x20++0x0B hide.long 0x00 "RESP3,Response Register 3" hide.long 0x04 "RESP2,Response Register 2" hide.long 0x08 "RESP1,Response Register 1" rgroup.long 0x2C++0x03 line.long 0x00 "RESP0,Response Register 0" else hgroup.long 0x20++0x0F hide.long 0x00 "RESP3,Response Register 3" hide.long 0x04 "RESP2,Response Register 2" hide.long 0x08 "RESP1,Response Register 1" hide.long 0x0C "RESP0,Response Register 0" endif rgroup.long 0x30++0x03 line.long 0x00 "RESP_CMD12,Response Register for Automatically-Issued CMD12" group.long 0x34++0x03 line.long 0x00 "DATA,Data Register" sif !cpuis("SH7268")&&!cpuis("SH7269") group.long 0x3C++0x03 line.long 0x00 "BOOT,Boot Operation Setting Register" bitfld.long 0x00 28.--31. " BTCLKDIV ,MMC Clock Frequency Setting in Boot Mode" "/2,/4,/8,/16,?..." bitfld.long 0x00 24.--27. " SBTACKTO ,Boot Acknowledge Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x00 20.--23. " S1STBTDATTO ,1st Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x00 16.--19. " SBTDATTO ,Interval Between Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" endif group.long 0x40++0x07 line.long 0x00 "INT,Interrupt Flag Register" bitfld.long 0x00 26. " CMD12DRE ,Automatic CMD12 Issuance Buffer Read Complete" "Not completed,Completed" bitfld.long 0x00 25. " CMD12RBE ,Automatic CMD12 Issuance Response Busy Complete" "Not completed,Completed" bitfld.long 0x00 24. " CMD12CRE ,Automatic CMD12 Response Complete" "Not completed,Completed" bitfld.long 0x00 23. " DTRANE ,Data Transmission Complete" "Not completed,Completed" newline bitfld.long 0x00 22. " BUFRE ,Buffer Read Complete" "Not completed,Completed" bitfld.long 0x00 21. " BUFWEN ,Buffer Write Ready" "Not ready,Ready" bitfld.long 0x00 20. " BUFREN ,Buffer Read Ready" "Not ready,Ready" bitfld.long 0x00 17. " RBSYE ,Response Busy Complete" "Not completed,Completed" newline bitfld.long 0x00 16. " CRSPE ,Command/Response Complete" "Not completed,Completed" bitfld.long 0x00 15. " CMDVIO ,Command Issuance Error" "No error,Error" bitfld.long 0x00 14. " BUFVIO ,Buffer Access Error" "No error,Error" bitfld.long 0x00 11. " WDATERR ,Write Data Error" "No error,Error" newline bitfld.long 0x00 10. " RDATERR ,Read Data Error" "No error,Error" bitfld.long 0x00 9. " RIDXERR ,Response Index Error" "No error,Error" bitfld.long 0x00 8. " RSPERR ,Response Error" "No error,Error" bitfld.long 0x00 4. " CRCSTO ,CRC Status Timeout" "No timeout,Timeout" newline bitfld.long 0x00 3. " WDATTO ,Write Data Timeout" "No timeout,Timeout" bitfld.long 0x00 2. " RDATTO ,Read Data Timeout" "No timeout,Timeout" bitfld.long 0x00 1. " RBSYTO ,Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x00 0. " RSPTO ,Response Timeout" "No timeout,Timeout" line.long 0x04 "INT_EN,Interrupt Enable Register" bitfld.long 0x04 26. " MCMD12DRE ,CMD12DRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 25. " MCMD12RBE ,CMD12RBE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 24. " MCMD12CRE ,CMD12CRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 23. " MDTRANE ,DTRANE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 22. " MBUFRE ,BUFRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 21. " MBUFWEN ,BUFWEN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 20. " MBUFREN ,BUFREN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 17. " MRBSYE ,RBSYE Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 16. " MCRSPE ,CRSPE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 15. " MCMDVIO ,CMDVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 14. " MBUFVIO ,BUFVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 11. " MWDATERR ,WDATERR Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 10. " MRDATERR ,RDATERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 9. " MRIDXERR ,RIDXERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 8. " MRSPERR ,RSPERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 4. " MCRCSTO ,CRCSTO Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " MWDATTO ,WDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 2. " MRDATTO ,RDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 1. " MRBSYTO ,RBSYTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 0. " MRSPTO ,RSPTO Interrupt Enable" "Disabled,Enabled" rgroup.long 0x48++0x07 line.long 0x00 "HOST_STS1,Status Register 1" bitfld.long 0x00 31. " CMDSEQ ,Command Sequence in Progress" "Initialization,Execution" bitfld.long 0x00 30. " CMDSIG ,CMD Line Status" "Initialization,Execution" bitfld.long 0x00 24.--29. " RSPIDX ,Response Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline hexmask.long.byte 0x00 16.--23. 1. " DATSIG ,Indicate the states on the DAT lines" hexmask.long.word 0x00 0.--15. 1. " RCVBLK ,Number of Transferred Blocks" line.long 0x04 "HOST_STS2,Status Register 2" bitfld.long 0x04 31. " CRCSTE ,Command Sequence in Progress" "No error,Error" bitfld.long 0x04 30. " CRC16E ,Read Data CRC16 Error" "No error,Error" bitfld.long 0x04 29. " AC12CRCE ,Automatic CMD12 Response CRC7 Error" "No error,Error" bitfld.long 0x04 28. " RSPCRC7E ,Command Response CRC7 Error" "No error,Error" newline bitfld.long 0x04 27. " CRCSTEBE ,CRC Status End Bit Error" "No error,Error" bitfld.long 0x04 26. " RDATEBE ,Read Data End Bit Error" "No error,Error" bitfld.long 0x04 25. " AC12REBE ,Automatic CMD12 Response End Bit Error" "No error,Error" bitfld.long 0x04 24. " RSPEBE ,Command Response End Bit Error" "No error,Error" newline bitfld.long 0x04 23. " AC12IDXE ,Automatic CMD12 Response Index Error" "No error,Error" bitfld.long 0x04 22. " RSPIDXE ,Command Response Index Error" "No error,Error" sif !cpuis("SH7268")&&!cpuis("SH7269") bitfld.long 0x04 21. " BTACKPATE ,Boot Acknowledge Pattern Error" "No error,Error" bitfld.long 0x04 20. " BTACKEBE ,Boot Acknowledge End Bit Error" "No error,Error" endif newline bitfld.long 0x04 16.--18. " CRCST ,CRC Status" "0,1,2,3,4,5,6,7" bitfld.long 0x04 14. " STRDATTO ,Read Data Timeout" "No timeout,Timeout" bitfld.long 0x04 13. " DATBSYTO ,Data Busy Timeout" "No timeout,Timeout" bitfld.long 0x04 12. " CRCSTTO ,CRC Status Timeout" "No timeout,Timeout" newline bitfld.long 0x04 11. " AC12BSYTO ,Automatic CMD12 Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x04 10. " RSPBSYTO ,Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x04 9. " AC12RSPTO ,Automatic CMD12 Response Timeout" "No timeout,Timeout" bitfld.long 0x04 8. " STRSPTO ,Response Timeout" "No timeout,Timeout" sif !cpuis("SH7268")&&!cpuis("SH7269") newline bitfld.long 0x04 7. " BTACKTO ,Boot Acknowledge Timeout" "No timeout,Timeout" bitfld.long 0x04 6. " 1STBTDATTO ,1st Boot Data Timeout" "No timeout,Timeout" bitfld.long 0x04 5. " BTDATTO ,Interval between Boot Data Timeout" "No timeout,Timeout" endif sif cpuis("SH7268")||cpuis("SH7269") group.long 0x5C++0x03 line.long 0x00 "DMA_MODE,DMA Mode Setting Register" bitfld.long 0x00 0. " DMASEL ,DMA Transfer Size Select" "2-byte or 4-byte,16-byte" group.long 0x70++0x07 line.long 0x00 "DETECT,Card Detection/Port Control Register" bitfld.long 0x00 14. " CDSIG ,MMC_CD pin status indication" "0,1" bitfld.long 0x00 13. " CDRISE ,MMC_CD pin rise detection flag" "Not occurred,Occurred" bitfld.long 0x00 12. " CDFALL ,MMC_CD pin fall detection flag" "Not occurred,Occurred" bitfld.long 0x00 5. " MCDRISE ,CDRISE interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " MCDFALL ,CDFALL interrupt enable" "Disabled,Enabled" line.long 0x04 "ADD_MODE,Special mode setting register" bitfld.long 0x04 19. " CLKMAIN ,Internal Clock Control" "Normal,Low power consumption" else group.long 0x70++0x03 line.long 0x00 "CLK_CTRL2,Clock Control Register 2" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.long 0x00 24.--27. " MMC_CLKU ,Set these bits to H'F before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " MMC_CLKL ,Set these bits to H'F before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " MMC_CLKU ,Set these bits to 4 before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " MMC_CLKL ,Set these bits to 4 before using the MMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x7C++0x03 line.long 0x00 "VERSION,Version Register" bitfld.long 0x00 31. " SWRST ,Software Reset" "No reset,Reset" hexmask.long.word 0x00 0.--15. 1. " VERSION ,Version Information" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") group.long 0x80++0x3 line.long 0x00 "ODATSEL,Data Output Phase Select Register" bitfld.long 0x00 8. " ODTS ,Output Data Timing Select" "Rising,Falling" endif width 0x0B tree.end tree.end tree.open "SATA (Serial-ATA)" tree "SATA 0" base ad:0xEE300100 width 21. tree "OPSH-Navi2G/ATAPI-ATA compatible task registers" group.long 0x00++0x03 line.long 0x00 "DATA,Shadow Data Register" hexmask.long.word 0x00 0.--15. 1. " DATA ,Transmit/receive data" rgroup.long 0x04++0x03 line.long 0x00 "SERR,Shadow Error Register" hexmask.long.byte 0x00 0.--7. 1. " SERR ,Error monitor bit" wgroup.long 0x04++0x03 line.long 0x00 "SFEATURES,Shadow Features Register" hexmask.long.byte 0x00 0.--7. 1. " SFEATURES ,Subcommand setup bits" group.long 0x08++0x13 line.long 0x00 "SECCNT,Shadow Sector CNT Register" hexmask.long.byte 0x00 0.--7. 1. " SECCNT ,Sector count bits" line.long 0x04 "LBALOW,Shadow LBA Low Register" hexmask.long.byte 0x04 0.--7. 1. " LBALOW ,LBA_low address bits" line.long 0x08 "LBAMID,Shadow LBA Mid Register" hexmask.long.byte 0x08 0.--7. 1. " LBAMID ,LBA_mid address bits" line.long 0x0c "LBAHIGH,Shadow LBA High Register" hexmask.long.byte 0x0c 0.--7. 1. " LBAHIGH ,LBA_high address bits" line.long 0x10 "DEVHEAD,Shadow Device/Head Register" hexmask.long.byte 0x10 0.--7. 1. " DEVHEAD ,Device function select bits" rgroup.long 0x1C++0x03 line.long 0x00 "SSTATUS,Shadow Status Register" bitfld.long 0x00 7. " BSY ,BSY bit" "0,1" bitfld.long 0x00 6. " DRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " DFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SSTATUS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " DRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " ERR ,ERR/CHK bit" "0,1" wgroup.long 0x1C++0x03 line.long 0x00 "SCOM,Shadow Command Register" hexmask.long.byte 0x00 0.--7. 1. " SCOM ,Transmit command setup bits" rgroup.long 0x38++0x03 line.long 0x00 "SALTSTS,Shadow Alternates Status Register" bitfld.long 0x00 7. " ABSY ,BSY bit" "0,1" bitfld.long 0x00 6. " ADRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " ADFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SALTSTS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " ADRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " AERR ,ERR/CHK bit" "0,1" wgroup.long 0x38++0x03 line.long 0x00 "SDEVCON,Shadow Device Control Register" bitfld.long 0x00 7. " HOB ,HOB bit" "0,1" bitfld.long 0x00 2. " SRST ,SRST bit" "0,1" textline " " bitfld.long 0x00 1. " NIEN ,nIEN bit" "0,1" tree.end tree "SH-Navi2G/ATAPI module compatible registers" group.long 0x80++0x03 line.long 0x00 "ATAPI_CONTROL,ATAPI Control Register" bitfld.long 0x00 16. " ISM ,Interrupt Status mode" "IP compatible,CIS interrupt" bitfld.long 0x00 11. " DTA32M ,Enables bits 31 to 29 of the descriptor DMA start address in descriptor table operation mode" "SH-Navi1-compatible mode,Enabled" textline " " bitfld.long 0x00 7. " RESET ,RESET controls the SATA-IP host core block" "No reset,Reset" bitfld.long 0x00 3. " DESE ,Descriptor table operation mode" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " R/W ,FIFO read/write" "Write,Read" bitfld.long 0x00 1. " STOP ,DMA transfer termination" "Not forced,Forced" textline " " bitfld.long 0x00 0. " START ,DMA transfer initialization" "Not in transfer,In transfer" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440") group.long 0x84++0x03 line.long 0x00 "ATAPI_STATUS,ATAPI Status Register" rbitfld.long 0x00 31. " SSBSY ,SSBSY corresponds to INTBSY of the SATAINTSTAT, the BSY bit value of the SSTATUS" "Low,High" rbitfld.long 0x00 30. " SSDRDY ,SSDRDY corresponds to INTDRDY of the SATAINTSTAT, the DRDY bit value of the SSTATUS" "Low,High" textline " " rbitfld.long 0x00 27. " SSDRQ ,SSDRQ corresponds to INTDRQ of the SATAINTSTAT, the DRQ bit value of the Shadow Status register SSTATUS" "Low,High" rbitfld.long 0x00 24. " SSERR ,SSER corresponds to INTERR of the SATAINTSTAT, the ERR bit value of the SSTATUS" "Low,High" textline " " rbitfld.long 0x00 11. " SATAINT ,Indicates the status of host-intrq of the SATA-IP block" "No interrupt,Interrupt" bitfld.long 0x00 8. " SWERR ,Software error" "No error,Error" textline " " bitfld.long 0x00 6. " DNEND ,All DMAs successfully ended in descriptor mode" "Not ended,Ended" bitfld.long 0x00 5. " DEVTRM ,DMA mode block is terminated before the number of DMA transfer bytes defined in the DMA transfer count register is reached" "Not terminated,Terminated" textline " " rbitfld.long 0x00 4. " DEVINT ,ATAPI device interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " ERR ,Host forcibly terminated the DMA transfer" "Not detected,Detected" bitfld.long 0x00 1. " NEND ,DMA successfully terminated" "Not terminated,Terminated" textline " " rbitfld.long 0x00 0. " ACT ,DMA active" "Not active,Active" else group.long 0x84++0x03 line.long 0x00 "ATAPI_STATUS,ATAPI Status Register" bitfld.long 0x00 31. " SSBSY ,SSBSY corresponds to INTBSY of the SATAINTSTAT, the BSY bit value of the SSTATUS" "Low,High" bitfld.long 0x00 30. " SSDRDY ,SSDRDY corresponds to INTDRDY of the SATAINTSTAT, the DRDY bit value of the SSTATUS" "Low,High" textline " " bitfld.long 0x00 27. " SSDRQ ,SSDRQ corresponds to INTDRQ of the SATAINTSTAT, the DRQ bit value of the Shadow Status register SSTATUS" "Low,High" bitfld.long 0x00 24. " SSERR ,SSER corresponds to INTERR of the SATAINTSTAT, the ERR bit value of the SSTATUS" "Low,High" textline " " bitfld.long 0x00 11. " SATAINT ,Indicates the status of host-intrq of the SATA-IP block" "No interrupt,Interrupt" bitfld.long 0x00 8. " SWERR ,Software error" "No error,Error" textline " " bitfld.long 0x00 6. " DNEND ,All DMAs successfully ended in descriptor mode" "Not ended,Ended" bitfld.long 0x00 5. " DEVTRM ,DMA mode block is terminated before the number of DMA transfer bytes defined in the DMA transfer count register is reached" "Not terminated,Terminated" textline " " bitfld.long 0x00 4. " DEVINT ,ATAPI device interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " ERR ,Host forcibly terminated the DMA transfer" "Not detected,Detected" bitfld.long 0x00 1. " NEND ,DMA successfully terminated" "Not terminated,Terminated" textline " " bitfld.long 0x00 0. " ACT ,DMA active" "Not active,Active" endif group.long 0x88++0x03 line.long 0x00 "ATAPI_INT_ENABLE,Interrupt Enable Register" bitfld.long 0x00 11. " ISATAINT ,SATAINT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " ISWERR ,SWERR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " IDNEND ,DNEND interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " IDEVTRM ,DEVTRM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IDEVINT ,DEVINT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " IERR ,ERR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " INEND ,NEND interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IACT ,ACT interrupt enable" "Disabled,Enabled" if (((per.l(ad:0xEE300100+0x80))&0x800)==0x000) group.long 0x98++0x03 line.long 0x00 "ATAPI_DTB_ADR,Descriptor Table Base Address Register" bitfld.long 0x00 31. " DTEND ,DTEND controls the termination of a descriptor DMA operation" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " DDSTA ,DMA start address in descriptor operation" else group.long 0x98++0x03 line.long 0x00 "ATAPI_DTB_ADR,Descriptor Table Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DDSTA ,DMA start address in descriptor operation" bitfld.long 0x00 0. " DTEND ,DTEND controls the termination of a descriptor DMA operation" "Disabled,Enabled" endif group.long 0x9C++0x03 line.long 0x00 "ATAPI_DMA_START_ADR,DMA Start Address Register" hexmask.long 0x00 2.--31. 0x04 " DSTA ,DMA start address" group.long 0xA0++0x03 line.long 0x00 "ATAPI_DMA_TRANS_CNT,DMA Transfer Count Register" hexmask.long 0x00 1.--28. 1. " DTRC ,DMA transfer count" group.long 0xA4++0x03 line.long 0x00 "ATAPI_CONTROL2,ATAPI Control 2 Register" bitfld.long 0x00 2. " LWORDSWAP ,Swapping of upper 32-bit data and lower 32-bit data on 2-longword basis" "Not executed,Executed" bitfld.long 0x00 1. " WORDSWAP ,Swapping of upper 16-bit data and lower 16-bit data on longword basis" "Not executed,Executed" rgroup.long 0xB0++0x03 line.long 0x00 "ATAPI_SIG_ST,ATAPI Signal Status Register" bitfld.long 0x00 1. " DPIORDY ,state of the IF signal for PIO transfer" "Low,High" bitfld.long 0x00 0. " DMARQ ,ATAPIDMARQ signal status" "Low,High" group.long 0xBC++0x03 line.long 0x00 "ATAPI_BYTE_SWAP,Byteswap Register" bitfld.long 0x00 0. " BYTESWAP ,Swapping of upper 8 bit data and lower 8 bit data in SATA interface" "Not executed,Executed" tree.end sif (cpu()!="RCARH2"&&cpu()!="RCARM2"&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77440")) tree "Access control registers for physical layer control registers" group.long 0x100++0x0f line.long 0x00 "SATAPHYADRR,Physical Layer Control Address Command Register" bitfld.long 0x00 10. " PHYRATEMODE ,Specifies the rate (mode) of control for the physical layer" "First generation,Second generation" bitfld.long 0x00 8.--9. " PHTCMD ,Specifies a command to control the physical layer" "Idle,Write,Read,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " PHYADD ,Specifies an address in the physical layer control register space" line.long 0x04 "SATAPHYWDATA,Physical Layer Control Write Data Register" line.long 0x08 "SATAPHYACCEN,Physical Layer Control Enable Register" bitfld.long 0x08 0. " PHYLANE ,Target lane to be accessed" "Not accessed,Accessed" line.long 0x0c "SATAPHYRESET,Physical Layer Control Reset Register" bitfld.long 0x0c 1. " PHYRST ,Asynchronously resets the physical layer control registers" "No reset,Reset" bitfld.long 0x0c 0. " PHYSRES ,Synchronously resets the physical layer control registers" "No reset,Reset" rgroup.long 0x110++0x07 line.long 0x00 "SATAPHYRDATA,Physical Layer Control Read Data Register" line.long 0x04 "SATAPHYACK,Physical Layer Control Acknowledge Register" bitfld.long 0x04 0. " PHYACK ,Completion of control ACK signal" "Not acknowledged,Acknowledged" tree.end endif tree "Serial ATA HOST control registers" group.long 0xF2C++0x03 line.long 0x00 "BISTCONF,BIST Config Register" bitfld.long 0x00 0. " LOOPB ,Loopback mode" "No loopback,Loopback" group.long 0x1000++0x03 line.long 0x00 "SDATA,Shadow Data Register" hexmask.long.word 0x00 0.--15. 1. " DATA ,Transmit/receive data" rgroup.long 0x1004++0x03 line.long 0x00 "SSSERR,Shadow Error Register" hexmask.long.byte 0x00 0.--7. 1. " SERR ,Error monitor bit" wgroup.long 0x1004++0x03 line.long 0x00 "SSFEATURES,Shadow Features Register" hexmask.long.byte 0x00 0.--7. 1. " SFEATURES ,Subcommand setup bits" group.long 0x1008++0x13 line.long 0x00 "SSECCNT,Shadow Sector CNT Register" hexmask.long.byte 0x00 0.--7. 1. " SECCNT ,Sector count bits" line.long 0x04 "SSLBALOW,Shadow LBA Low Register" hexmask.long.byte 0x04 0.--7. 1. " LBALOW ,LBA_low address bits" line.long 0x08 "SSLBAMID,Shadow LBA Mid Register" hexmask.long.byte 0x08 0.--7. 1. " LBAMID ,LBA_mid address bits" line.long 0x0c "SSLBAHIGH,Shadow LBA High Register" hexmask.long.byte 0x0c 0.--7. 1. " LBAHIGH ,LBA_high address bits" line.long 0x10 "SSDEVHEAD,Shadow Device/Head Register" hexmask.long.byte 0x10 0.--7. 1. " DEVHEAD ,Device function select bits" rgroup.long 0x101C++0x03 line.long 0x00 "SSSTATUS,Shadow Status Register" bitfld.long 0x00 7. " BSY ,BSY bit" "0,1" bitfld.long 0x00 6. " DRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " DFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SSTATUS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " DRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " ERR ,ERR/CHK bit" "0,1" wgroup.long 0x101C++0x03 line.long 0x00 "SSCOM,Shadow Command Register" hexmask.long.byte 0x00 0.--7. 1. " SCOM ,Transmit command setup bits" rgroup.long 0x1104++0x03 line.long 0x00 "SSALTSTS,Shadow Alternates Status Register" bitfld.long 0x00 7. " ABSY ,BSY bit" "0,1" bitfld.long 0x00 6. " ADRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " ADFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SALTSTS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " ADRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " AERR ,ERR/CHK bit" "0,1" wgroup.long 0x1104++0x03 line.long 0x00 "SSDEVCON,Shadow Device Control Register" bitfld.long 0x00 7. " HOB ,HOB bit" "0,1" bitfld.long 0x00 2. " SRST ,SRST bit" "0,1" textline " " bitfld.long 0x00 1. " NIEN ,nIEN bit" "0,1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77420")||(cpu()=="R8A77430") group.long 0x1220++0x03 line.long 0x00 "SATAER,SATA Extend Register" elif (cpu()=="R8A77440") group.long 0x1120++0x03 line.long 0x00 "SATAER,SATA Extend Register" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long 0x1120++0x07 line.long 0x00 "SATAEICCR,SATA Extend ICC Register" hexmask.long.byte 0x00 0.--7. 1. " ICC ,Isochronous Command Completion" line.long 0x04 "SATAEAUXR,SATA Extend Auxiliary Register" group.long 0x1128++0x03 line.long 0x00 "SATAEDEVSLPR,SATA Extend DEVSLP Register" bitfld.long 0x00 1. " DEVSLP_EN ,Sleep mode of SATA host IP enable" "Disabled,Enable" endif rgroup.long 0x1300++0x03 line.long 0x00 "SCRSSTS,SCR SStatus Register" bitfld.long 0x00 8.--11. " IPM ,Interface power manager state monitor bits" "No device/Device not ready,Active,Partial,,,,Slumber,?..." bitfld.long 0x00 4.--7. " SPD ,Communication speed monitor bits" "No device/Device not ready,First generation (1.5 Gbps),Second generation (3.0 Gbps),?..." textline " " bitfld.long 0x00 0.--3. " DET ,Device communication state monitor bits" "No device/Device not ready,Device not ready,,Device ready,Offline/Loopback,?..." group.long 0x1304++0x0B line.long 0x00 "SCRSERR,SCR SError Register" eventfld.long 0x00 27. " DIAGA ,Sense COMWAKE before detecting a device" "Not occurred,Occurred" eventfld.long 0x00 26. " DIAGX ,Sense the change in device connection state" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " DIAGF ,FIS type error bit" "Not occurred,Occurred" eventfld.long 0x00 24. " DIAGT ,Abnormal timing transfer result reception bit" "Not occurred,Occurred" textline " " eventfld.long 0x00 23. " DIAGS ,Abnormal state transition bit" "Not occurred,Occurred" eventfld.long 0x00 22. " DIAGH ,Handshake error bit" "No error,Error" textline " " eventfld.long 0x00 21. " DIAGC ,CRC error bit" "No error,Error" eventfld.long 0x00 20. " DIAGD ,Disparity error bit" "No error,Error" textline " " eventfld.long 0x00 19. " DIAGB ,10b/8b decode error bit" "No error,Error" eventfld.long 0x00 18. " DIAGW ,COMWAKE detect bit" "No error,Error" textline " " eventfld.long 0x00 17. " DIAGI ,Error state bit (Phy internal error)" "No error,Error" eventfld.long 0x00 16. " DIAGN ,Transfer Ready state change bit" "No error,Error" textline " " eventfld.long 0x00 11. " ERRE ,Internal FIFO flow error bit" "No error,Error" eventfld.long 0x00 10. " ERRP ,Protocol error bit" "No error,Error" textline " " eventfld.long 0x00 9. " ERRC ,FIS transmission PhyRdy signal negated bit" "No error,Error" eventfld.long 0x00 8. " ERRT ,Data FIS transfer error bit" "No error,Error" textline " " eventfld.long 0x00 1. " ERRM ,Communication error recovery monitor bit" "No error,Error" eventfld.long 0x00 0. " ERRI ,Retransmission result bit" "No error,Error" line.long 0x04 "SCRSCON,SCR SControl Register" bitfld.long 0x04 12.--15. " CSPM ,Power Management Mode transition request" "No request,Partial mode,Slumber mode,,Active mode,?..." bitfld.long 0x04 8.--11. " CIPM ,Interface Power Management Mode enable" "No limitation,Partial mode disabled,Slumber mode disabled,Partial/Slumber modes disabled,?..." textline " " bitfld.long 0x04 4.--7. " CSPD ,Communication speed" "No limitation (3.0 Gbps),First generation (1.5 Gbps),Second generation (3.0 Gbps),?..." bitfld.long 0x04 0.--3. " CDET ,RESET/Offline mode bits" "No request,Reset,,,Offline mode,?..." line.long 0x08 "SCRSACT,SCR SActive Register" bitfld.long 0x08 31. " SACT[31] ,TAG value of B'11111" "Disabled,Enabled" bitfld.long 0x08 30. " SACT[30] ,TAG value of B'11110" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " SACT[29] ,TAG value of B'11101" "Disabled,Enabled" bitfld.long 0x08 28. " SACT[28] ,TAG value of B'11100" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " SACT[27] ,TAG value of B'11011" "Disabled,Enabled" bitfld.long 0x08 26. " SACT[26] ,TAG value of B'11010" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SACT[25] ,TAG value of B'11001" "Disabled,Enabled" bitfld.long 0x08 24. " SACT[24] ,TAG value of B'11000" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " SACT[23] ,TAG value of B'10111" "Disabled,Enabled" bitfld.long 0x08 22. " SACT[22] ,TAG value of B'10110" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " SACT[21] ,TAG value of B'10101" "Disabled,Enabled" bitfld.long 0x08 20. " SACT[20] ,TAG value of B'10100" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " SACT[19] ,TAG value of B'10011" "Disabled,Enabled" bitfld.long 0x08 18. " SACT[18] ,TAG value of B'10010" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " SACT[17] ,TAG value of B'10001" "Disabled,Enabled" bitfld.long 0x08 16. " SACT[16] ,TAG value of B'10000" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " SACT[15] ,TAG value of B'01111" "Disabled,Enabled" bitfld.long 0x08 14. " SACT[14] ,TAG value of B'01110" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " SACT[13] ,TAG value of B'01101" "Disabled,Enabled" bitfld.long 0x08 12. " SACT[12] ,TAG value of B'01100" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " SACT[11] ,TAG value of B'01011" "Disabled,Enabled" bitfld.long 0x08 10. " SACT[10] ,TAG value of B'01010" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " SACT[9] ,TAG value of B'01001" "Disabled,Enabled" bitfld.long 0x08 8. " SACT[8] ,TAG value of B'01000" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SACT[7] ,TAG value of B'00111" "Disabled,Enabled" bitfld.long 0x08 6. " SACT[6] ,TAG value of B'00110" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " SACT[5] ,TAG value of B'00101" "Disabled,Enabled" bitfld.long 0x08 4. " SACT[4] ,TAG value of B'00100" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " SACT[3] ,TAG value of B'00011" "Disabled,Enabled" bitfld.long 0x08 2. " SACT[2] ,TAG value of B'00010" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SACT[1] ,TAG value of B'00001" "Disabled,Enabled" bitfld.long 0x08 0. " SACT[0] ,TAG value of B'00000" "Disabled,Enabled" hgroup.long 0x1408++0x03 hide.long 0x00 "SATAINTSTAT,SATA INT Status Register" in group.long 0x140C++0x03 line.long 0x00 "SATAINTMASK,SATA INT Mask Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 11. " SDBFMSK ,Masks the 'Set Device Bits FIS received' interrupt" "Not masked,Masked" textline " " endif bitfld.long 0x00 10. " SLUMRMSK ,Mask for the 'request for transition to Slumber mode' interrupt (for DIPM)" "Not masked,Masked" bitfld.long 0x00 9. " PARTITMSK ,Mask for the 'request for transition to Partial mode' interrupt (for DIPM)" "Not masked,Masked" textline " " bitfld.long 0x00 8. " VENDMSK ,Masks the 'Vendor Specific FIS received' interrupt" "Not masked,Masked" bitfld.long 0x00 7. " BISTMSK ,Masks the 'BIST Activate FIS received' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 6. " SLUMMSK ,Masks the 'device reject transition to Slumber mode' interrupt" "Not masked,Masked" bitfld.long 0x00 5. " PARTIMSK ,Masks the 'device reject transition to Partial mode' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DMASTMSK ,Masks the 'DMA Setup FIS received' interrupt" "Not masked,Masked" bitfld.long 0x00 3. " SERRMSK ,Masks the 'SCR SError register (SCRSERR) update' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 2. " ERRMSK ,Masks the 'SCR SError register (SCRSERR) ERRE, ERRP, ERRC, ERRT, ERRM, and ERRI bits update' interrupt" "Not masked,Masked" bitfld.long 0x00 1. " ERRCRTMSK ,Masks the 'SCR SError register (SCRSERR) ERRE, ERRP, and ERRT bits update' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 0. " ATAMSK ,Masks the 'ATA source (equivalent to P-ATA's INTRQ)' interrupt" "Not masked,Masked" sif cpuis("R8J7795*")||cpuis("R8A7795*")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440") group.long 0x1468++0x03 line.long 0x00 "PHYSTOP,PHY STOP Register" bitfld.long 0x00 0. " PHYSTOP ,PHY STOP mode enable" "Disabled,Enabled" endif group.long 0x1520++0x1B line.long 0x00 "DMADW0,Rx DMA Setup FIS Dword0 Register" bitfld.long 0x00 15. " AUTOACT ,Auto-Activation bit" "Disabled,Enabled" bitfld.long 0x00 14. " DMAINT ,Interrupt bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " DMADIR ,Data transfer direction bit" "Host -> device,Device -> host" bitfld.long 0x00 8.--11. " PMPORT ,Source device ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. " FISTYPE ,FIS type bit" line.long 0x04 "DMADW1,Rx DMA Setup FIS Dword1 Register" hexmask.long 0x04 5.--31. 1. " DMABLOW ,DMA Buffer Identifier Low field value in the DMA Setup" bitfld.long 0x04 0.--4. " DMATAG ,TAG field for NCQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8 "DMADW2,Rx DMA Setup FIS Dword2 Register" line.long 0xC "DMADW3,Rx DMA Setup FIS Dword3 Register" line.long 0x10 "DMADW4,Rx DMA Setup FIS Dword4 Register" line.long 0x14 "DMADW5,Rx DMA Setup FIS Dword5 Register" line.long 0x18 "DMADW6,Rx DMA Setup FIS Dword6 Register" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") textline " " group.long 0xE65E3F24++0x03 line.long 0x00 "REFSEL,Reference Clock Source Select Register" bitfld.long 0x00 0. " REFSEL ,Reference Clock Source Select" "On chip Clock,External Pin" endif width 0x0B tree.end tree "SATA 1" base ad:0xEE500100 width 21. tree "OPSH-Navi2G/ATAPI-ATA compatible task registers" group.long 0x00++0x03 line.long 0x00 "DATA,Shadow Data Register" hexmask.long.word 0x00 0.--15. 1. " DATA ,Transmit/receive data" rgroup.long 0x04++0x03 line.long 0x00 "SERR,Shadow Error Register" hexmask.long.byte 0x00 0.--7. 1. " SERR ,Error monitor bit" wgroup.long 0x04++0x03 line.long 0x00 "SFEATURES,Shadow Features Register" hexmask.long.byte 0x00 0.--7. 1. " SFEATURES ,Subcommand setup bits" group.long 0x08++0x13 line.long 0x00 "SECCNT,Shadow Sector CNT Register" hexmask.long.byte 0x00 0.--7. 1. " SECCNT ,Sector count bits" line.long 0x04 "LBALOW,Shadow LBA Low Register" hexmask.long.byte 0x04 0.--7. 1. " LBALOW ,LBA_low address bits" line.long 0x08 "LBAMID,Shadow LBA Mid Register" hexmask.long.byte 0x08 0.--7. 1. " LBAMID ,LBA_mid address bits" line.long 0x0c "LBAHIGH,Shadow LBA High Register" hexmask.long.byte 0x0c 0.--7. 1. " LBAHIGH ,LBA_high address bits" line.long 0x10 "DEVHEAD,Shadow Device/Head Register" hexmask.long.byte 0x10 0.--7. 1. " DEVHEAD ,Device function select bits" rgroup.long 0x1C++0x03 line.long 0x00 "SSTATUS,Shadow Status Register" bitfld.long 0x00 7. " BSY ,BSY bit" "0,1" bitfld.long 0x00 6. " DRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " DFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SSTATUS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " DRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " ERR ,ERR/CHK bit" "0,1" wgroup.long 0x1C++0x03 line.long 0x00 "SCOM,Shadow Command Register" hexmask.long.byte 0x00 0.--7. 1. " SCOM ,Transmit command setup bits" rgroup.long 0x38++0x03 line.long 0x00 "SALTSTS,Shadow Alternates Status Register" bitfld.long 0x00 7. " ABSY ,BSY bit" "0,1" bitfld.long 0x00 6. " ADRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " ADFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SALTSTS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " ADRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " AERR ,ERR/CHK bit" "0,1" wgroup.long 0x38++0x03 line.long 0x00 "SDEVCON,Shadow Device Control Register" bitfld.long 0x00 7. " HOB ,HOB bit" "0,1" bitfld.long 0x00 2. " SRST ,SRST bit" "0,1" textline " " bitfld.long 0x00 1. " NIEN ,nIEN bit" "0,1" tree.end tree "SH-Navi2G/ATAPI module compatible registers" group.long 0x80++0x03 line.long 0x00 "ATAPI_CONTROL,ATAPI Control Register" bitfld.long 0x00 16. " ISM ,Interrupt Status mode" "IP compatible,CIS interrupt" bitfld.long 0x00 11. " DTA32M ,Enables bits 31 to 29 of the descriptor DMA start address in descriptor table operation mode" "SH-Navi1-compatible mode,Enabled" textline " " bitfld.long 0x00 7. " RESET ,RESET controls the SATA-IP host core block" "No reset,Reset" bitfld.long 0x00 3. " DESE ,Descriptor table operation mode" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " R/W ,FIFO read/write" "Write,Read" bitfld.long 0x00 1. " STOP ,DMA transfer termination" "Not forced,Forced" textline " " bitfld.long 0x00 0. " START ,DMA transfer initialization" "Not in transfer,In transfer" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8J7795*")||cpuis("R8A7795*")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440") group.long 0x84++0x03 line.long 0x00 "ATAPI_STATUS,ATAPI Status Register" rbitfld.long 0x00 31. " SSBSY ,SSBSY corresponds to INTBSY of the SATAINTSTAT, the BSY bit value of the SSTATUS" "Low,High" rbitfld.long 0x00 30. " SSDRDY ,SSDRDY corresponds to INTDRDY of the SATAINTSTAT, the DRDY bit value of the SSTATUS" "Low,High" textline " " rbitfld.long 0x00 27. " SSDRQ ,SSDRQ corresponds to INTDRQ of the SATAINTSTAT, the DRQ bit value of the Shadow Status register SSTATUS" "Low,High" rbitfld.long 0x00 24. " SSERR ,SSER corresponds to INTERR of the SATAINTSTAT, the ERR bit value of the SSTATUS" "Low,High" textline " " rbitfld.long 0x00 11. " SATAINT ,Indicates the status of host-intrq of the SATA-IP block" "No interrupt,Interrupt" bitfld.long 0x00 8. " SWERR ,Software error" "No error,Error" textline " " bitfld.long 0x00 6. " DNEND ,All DMAs successfully ended in descriptor mode" "Not ended,Ended" bitfld.long 0x00 5. " DEVTRM ,DMA mode block is terminated before the number of DMA transfer bytes defined in the DMA transfer count register is reached" "Not terminated,Terminated" textline " " rbitfld.long 0x00 4. " DEVINT ,ATAPI device interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " ERR ,Host forcibly terminated the DMA transfer" "Not detected,Detected" bitfld.long 0x00 1. " NEND ,DMA successfully terminated" "Not terminated,Terminated" textline " " rbitfld.long 0x00 0. " ACT ,DMA active" "Not active,Active" else group.long 0x84++0x03 line.long 0x00 "ATAPI_STATUS,ATAPI Status Register" bitfld.long 0x00 31. " SSBSY ,SSBSY corresponds to INTBSY of the SATAINTSTAT, the BSY bit value of the SSTATUS" "Low,High" bitfld.long 0x00 30. " SSDRDY ,SSDRDY corresponds to INTDRDY of the SATAINTSTAT, the DRDY bit value of the SSTATUS" "Low,High" textline " " bitfld.long 0x00 27. " SSDRQ ,SSDRQ corresponds to INTDRQ of the SATAINTSTAT, the DRQ bit value of the Shadow Status register SSTATUS" "Low,High" bitfld.long 0x00 24. " SSERR ,SSER corresponds to INTERR of the SATAINTSTAT, the ERR bit value of the SSTATUS" "Low,High" textline " " bitfld.long 0x00 11. " SATAINT ,Indicates the status of host-intrq of the SATA-IP block" "No interrupt,Interrupt" bitfld.long 0x00 8. " SWERR ,Software error" "No error,Error" textline " " bitfld.long 0x00 6. " DNEND ,All DMAs successfully ended in descriptor mode" "Not ended,Ended" bitfld.long 0x00 5. " DEVTRM ,DMA mode block is terminated before the number of DMA transfer bytes defined in the DMA transfer count register is reached" "Not terminated,Terminated" textline " " bitfld.long 0x00 4. " DEVINT ,ATAPI device interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " ERR ,Host forcibly terminated the DMA transfer" "Not detected,Detected" bitfld.long 0x00 1. " NEND ,DMA successfully terminated" "Not terminated,Terminated" textline " " bitfld.long 0x00 0. " ACT ,DMA active" "Not active,Active" endif group.long 0x88++0x03 line.long 0x00 "ATAPI_INT_ENABLE,Interrupt Enable Register" bitfld.long 0x00 11. " ISATAINT ,SATAINT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " ISWERR ,SWERR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " IDNEND ,DNEND interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " IDEVTRM ,DEVTRM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IDEVINT ,DEVINT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " IERR ,ERR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " INEND ,NEND interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IACT ,ACT interrupt enable" "Disabled,Enabled" if (((per.l(ad:0xEE500100+0x80))&0x800)==0x000) group.long 0x98++0x03 line.long 0x00 "ATAPI_DTB_ADR,Descriptor Table Base Address Register" bitfld.long 0x00 31. " DTEND ,DTEND controls the termination of a descriptor DMA operation" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " DDSTA ,DMA start address in descriptor operation" else group.long 0x98++0x03 line.long 0x00 "ATAPI_DTB_ADR,Descriptor Table Base Address Register" hexmask.long 0x00 2.--31. 0x04 " DDSTA ,DMA start address in descriptor operation" bitfld.long 0x00 0. " DTEND ,DTEND controls the termination of a descriptor DMA operation" "Disabled,Enabled" endif group.long 0x9C++0x03 line.long 0x00 "ATAPI_DMA_START_ADR,DMA Start Address Register" hexmask.long 0x00 2.--31. 0x04 " DSTA ,DMA start address" group.long 0xA0++0x03 line.long 0x00 "ATAPI_DMA_TRANS_CNT,DMA Transfer Count Register" hexmask.long 0x00 1.--28. 1. " DTRC ,DMA transfer count" group.long 0xA4++0x03 line.long 0x00 "ATAPI_CONTROL2,ATAPI Control 2 Register" bitfld.long 0x00 2. " LWORDSWAP ,Swapping of upper 32-bit data and lower 32-bit data on 2-longword basis" "Not executed,Executed" bitfld.long 0x00 1. " WORDSWAP ,Swapping of upper 16-bit data and lower 16-bit data on longword basis" "Not executed,Executed" rgroup.long 0xB0++0x03 line.long 0x00 "ATAPI_SIG_ST,ATAPI Signal Status Register" bitfld.long 0x00 1. " DPIORDY ,state of the IF signal for PIO transfer" "Low,High" bitfld.long 0x00 0. " DMARQ ,ATAPIDMARQ signal status" "Low,High" group.long 0xBC++0x03 line.long 0x00 "ATAPI_BYTE_SWAP,Byteswap Register" bitfld.long 0x00 0. " BYTESWAP ,Swapping of upper 8 bit data and lower 8 bit data in SATA interface" "Not executed,Executed" tree.end sif (cpu()!="RCARH2"&&cpu()!="RCARM2"&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77440")) tree "Access control registers for physical layer control registers" group.long 0x100++0x0f line.long 0x00 "SATAPHYADRR,Physical Layer Control Address Command Register" bitfld.long 0x00 10. " PHYRATEMODE ,Specifies the rate (mode) of control for the physical layer" "First generation,Second generation" bitfld.long 0x00 8.--9. " PHTCMD ,Specifies a command to control the physical layer" "Idle,Write,Read,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " PHYADD ,Specifies an address in the physical layer control register space" line.long 0x04 "SATAPHYWDATA,Physical Layer Control Write Data Register" line.long 0x08 "SATAPHYACCEN,Physical Layer Control Enable Register" bitfld.long 0x08 0. " PHYLANE ,Target lane to be accessed" "Not accessed,Accessed" line.long 0x0c "SATAPHYRESET,Physical Layer Control Reset Register" bitfld.long 0x0c 1. " PHYRST ,Asynchronously resets the physical layer control registers" "No reset,Reset" bitfld.long 0x0c 0. " PHYSRES ,Synchronously resets the physical layer control registers" "No reset,Reset" rgroup.long 0x110++0x07 line.long 0x00 "SATAPHYRDATA,Physical Layer Control Read Data Register" line.long 0x04 "SATAPHYACK,Physical Layer Control Acknowledge Register" bitfld.long 0x04 0. " PHYACK ,Completion of control ACK signal" "Not acknowledged,Acknowledged" tree.end endif tree "Serial ATA HOST control registers" group.long 0xF2C++0x03 line.long 0x00 "BISTCONF,BIST Config Register" bitfld.long 0x00 0. " LOOPB ,Loopback mode" "No loopback,Loopback" group.long 0x1000++0x03 line.long 0x00 "SDATA,Shadow Data Register" hexmask.long.word 0x00 0.--15. 1. " DATA ,Transmit/receive data" rgroup.long 0x1004++0x03 line.long 0x00 "SSSERR,Shadow Error Register" hexmask.long.byte 0x00 0.--7. 1. " SERR ,Error monitor bit" wgroup.long 0x1004++0x03 line.long 0x00 "SSFEATURES,Shadow Features Register" hexmask.long.byte 0x00 0.--7. 1. " SFEATURES ,Subcommand setup bits" group.long 0x1008++0x13 line.long 0x00 "SSECCNT,Shadow Sector CNT Register" hexmask.long.byte 0x00 0.--7. 1. " SECCNT ,Sector count bits" line.long 0x04 "SSLBALOW,Shadow LBA Low Register" hexmask.long.byte 0x04 0.--7. 1. " LBALOW ,LBA_low address bits" line.long 0x08 "SSLBAMID,Shadow LBA Mid Register" hexmask.long.byte 0x08 0.--7. 1. " LBAMID ,LBA_mid address bits" line.long 0x0c "SSLBAHIGH,Shadow LBA High Register" hexmask.long.byte 0x0c 0.--7. 1. " LBAHIGH ,LBA_high address bits" line.long 0x10 "SSDEVHEAD,Shadow Device/Head Register" hexmask.long.byte 0x10 0.--7. 1. " DEVHEAD ,Device function select bits" rgroup.long 0x101C++0x03 line.long 0x00 "SSSTATUS,Shadow Status Register" bitfld.long 0x00 7. " BSY ,BSY bit" "0,1" bitfld.long 0x00 6. " DRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " DFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SSTATUS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " DRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " ERR ,ERR/CHK bit" "0,1" wgroup.long 0x101C++0x03 line.long 0x00 "SSCOM,Shadow Command Register" hexmask.long.byte 0x00 0.--7. 1. " SCOM ,Transmit command setup bits" rgroup.long 0x1104++0x03 line.long 0x00 "SSALTSTS,Shadow Alternates Status Register" bitfld.long 0x00 7. " ABSY ,BSY bit" "0,1" bitfld.long 0x00 6. " ADRDY ,DRDY bit" "0,1" textline " " bitfld.long 0x00 5. " ADFSE ,DF/SE bit" "0,1" bitfld.long 0x00 4. " SALTSTS ,Definition varies with the command" "0,1" textline " " bitfld.long 0x00 3. " ADRQ ,DRQ bit" "0,1" bitfld.long 0x00 0. " AERR ,ERR/CHK bit" "0,1" wgroup.long 0x1104++0x03 line.long 0x00 "SSDEVCON,Shadow Device Control Register" bitfld.long 0x00 7. " HOB ,HOB bit" "0,1" bitfld.long 0x00 2. " SRST ,SRST bit" "0,1" textline " " bitfld.long 0x00 1. " NIEN ,nIEN bit" "0,1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77420")||(cpu()=="R8A77430") group.long 0x1220++0x03 line.long 0x00 "SATAER,SATA Extend Register" elif (cpu()=="R8A77440") group.long 0x1120++0x03 line.long 0x00 "SATAER,SATA Extend Register" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") rgroup.long 0x1120++0x07 line.long 0x00 "SATAEICCR,SATA Extend ICC Register" hexmask.long.byte 0x00 0.--7. 1. " ICC ,Isochronous Command Completion" line.long 0x04 "SATAEAUXR,SATA Extend Auxiliary Register" group.long 0x1128++0x03 line.long 0x00 "SATAEDEVSLPR,SATA Extend DEVSLP Register" bitfld.long 0x00 1. " DEVSLP_EN ,Sleep mode of SATA host IP enable" "Disabled,Enable" endif rgroup.long 0x1300++0x03 line.long 0x00 "SCRSSTS,SCR SStatus Register" bitfld.long 0x00 8.--11. " IPM ,Interface power manager state monitor bits" "No device/Device not ready,Active,Partial,,,,Slumber,?..." bitfld.long 0x00 4.--7. " SPD ,Communication speed monitor bits" "No device/Device not ready,First generation (1.5 Gbps),Second generation (3.0 Gbps),?..." textline " " bitfld.long 0x00 0.--3. " DET ,Device communication state monitor bits" "No device/Device not ready,Device not ready,,Device ready,Offline/Loopback,?..." group.long 0x1304++0x0B line.long 0x00 "SCRSERR,SCR SError Register" eventfld.long 0x00 27. " DIAGA ,Sense COMWAKE before detecting a device" "Not occurred,Occurred" eventfld.long 0x00 26. " DIAGX ,Sense the change in device connection state" "Not occurred,Occurred" textline " " eventfld.long 0x00 25. " DIAGF ,FIS type error bit" "Not occurred,Occurred" eventfld.long 0x00 24. " DIAGT ,Abnormal timing transfer result reception bit" "Not occurred,Occurred" textline " " eventfld.long 0x00 23. " DIAGS ,Abnormal state transition bit" "Not occurred,Occurred" eventfld.long 0x00 22. " DIAGH ,Handshake error bit" "No error,Error" textline " " eventfld.long 0x00 21. " DIAGC ,CRC error bit" "No error,Error" eventfld.long 0x00 20. " DIAGD ,Disparity error bit" "No error,Error" textline " " eventfld.long 0x00 19. " DIAGB ,10b/8b decode error bit" "No error,Error" eventfld.long 0x00 18. " DIAGW ,COMWAKE detect bit" "No error,Error" textline " " eventfld.long 0x00 17. " DIAGI ,Error state bit (Phy internal error)" "No error,Error" eventfld.long 0x00 16. " DIAGN ,Transfer Ready state change bit" "No error,Error" textline " " eventfld.long 0x00 11. " ERRE ,Internal FIFO flow error bit" "No error,Error" eventfld.long 0x00 10. " ERRP ,Protocol error bit" "No error,Error" textline " " eventfld.long 0x00 9. " ERRC ,FIS transmission PhyRdy signal negated bit" "No error,Error" eventfld.long 0x00 8. " ERRT ,Data FIS transfer error bit" "No error,Error" textline " " eventfld.long 0x00 1. " ERRM ,Communication error recovery monitor bit" "No error,Error" eventfld.long 0x00 0. " ERRI ,Retransmission result bit" "No error,Error" line.long 0x04 "SCRSCON,SCR SControl Register" bitfld.long 0x04 12.--15. " CSPM ,Power Management Mode transition request" "No request,Partial mode,Slumber mode,,Active mode,?..." bitfld.long 0x04 8.--11. " CIPM ,Interface Power Management Mode enable" "No limitation,Partial mode disabled,Slumber mode disabled,Partial/Slumber modes disabled,?..." textline " " bitfld.long 0x04 4.--7. " CSPD ,Communication speed" "No limitation (3.0 Gbps),First generation (1.5 Gbps),Second generation (3.0 Gbps),?..." bitfld.long 0x04 0.--3. " CDET ,RESET/Offline mode bits" "No request,Reset,,,Offline mode,?..." line.long 0x08 "SCRSACT,SCR SActive Register" bitfld.long 0x08 31. " SACT[31] ,TAG value of B'11111" "Disabled,Enabled" bitfld.long 0x08 30. " SACT[30] ,TAG value of B'11110" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " SACT[29] ,TAG value of B'11101" "Disabled,Enabled" bitfld.long 0x08 28. " SACT[28] ,TAG value of B'11100" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " SACT[27] ,TAG value of B'11011" "Disabled,Enabled" bitfld.long 0x08 26. " SACT[26] ,TAG value of B'11010" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SACT[25] ,TAG value of B'11001" "Disabled,Enabled" bitfld.long 0x08 24. " SACT[24] ,TAG value of B'11000" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " SACT[23] ,TAG value of B'10111" "Disabled,Enabled" bitfld.long 0x08 22. " SACT[22] ,TAG value of B'10110" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " SACT[21] ,TAG value of B'10101" "Disabled,Enabled" bitfld.long 0x08 20. " SACT[20] ,TAG value of B'10100" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " SACT[19] ,TAG value of B'10011" "Disabled,Enabled" bitfld.long 0x08 18. " SACT[18] ,TAG value of B'10010" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " SACT[17] ,TAG value of B'10001" "Disabled,Enabled" bitfld.long 0x08 16. " SACT[16] ,TAG value of B'10000" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " SACT[15] ,TAG value of B'01111" "Disabled,Enabled" bitfld.long 0x08 14. " SACT[14] ,TAG value of B'01110" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " SACT[13] ,TAG value of B'01101" "Disabled,Enabled" bitfld.long 0x08 12. " SACT[12] ,TAG value of B'01100" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " SACT[11] ,TAG value of B'01011" "Disabled,Enabled" bitfld.long 0x08 10. " SACT[10] ,TAG value of B'01010" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " SACT[9] ,TAG value of B'01001" "Disabled,Enabled" bitfld.long 0x08 8. " SACT[8] ,TAG value of B'01000" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SACT[7] ,TAG value of B'00111" "Disabled,Enabled" bitfld.long 0x08 6. " SACT[6] ,TAG value of B'00110" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " SACT[5] ,TAG value of B'00101" "Disabled,Enabled" bitfld.long 0x08 4. " SACT[4] ,TAG value of B'00100" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " SACT[3] ,TAG value of B'00011" "Disabled,Enabled" bitfld.long 0x08 2. " SACT[2] ,TAG value of B'00010" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " SACT[1] ,TAG value of B'00001" "Disabled,Enabled" bitfld.long 0x08 0. " SACT[0] ,TAG value of B'00000" "Disabled,Enabled" hgroup.long 0x1408++0x03 hide.long 0x00 "SATAINTSTAT,SATA INT Status Register" in group.long 0x140C++0x03 line.long 0x00 "SATAINTMASK,SATA INT Mask Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 11. " SDBFMSK ,Masks the 'Set Device Bits FIS received' interrupt" "Not masked,Masked" textline " " endif bitfld.long 0x00 10. " SLUMRMSK ,Mask for the 'request for transition to Slumber mode' interrupt (for DIPM)" "Not masked,Masked" bitfld.long 0x00 9. " PARTITMSK ,Mask for the 'request for transition to Partial mode' interrupt (for DIPM)" "Not masked,Masked" textline " " bitfld.long 0x00 8. " VENDMSK ,Masks the 'Vendor Specific FIS received' interrupt" "Not masked,Masked" bitfld.long 0x00 7. " BISTMSK ,Masks the 'BIST Activate FIS received' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 6. " SLUMMSK ,Masks the 'device reject transition to Slumber mode' interrupt" "Not masked,Masked" bitfld.long 0x00 5. " PARTIMSK ,Masks the 'device reject transition to Partial mode' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DMASTMSK ,Masks the 'DMA Setup FIS received' interrupt" "Not masked,Masked" bitfld.long 0x00 3. " SERRMSK ,Masks the 'SCR SError register (SCRSERR) update' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 2. " ERRMSK ,Masks the 'SCR SError register (SCRSERR) ERRE, ERRP, ERRC, ERRT, ERRM, and ERRI bits update' interrupt" "Not masked,Masked" bitfld.long 0x00 1. " ERRCRTMSK ,Masks the 'SCR SError register (SCRSERR) ERRE, ERRP, and ERRT bits update' interrupt" "Not masked,Masked" textline " " bitfld.long 0x00 0. " ATAMSK ,Masks the 'ATA source (equivalent to P-ATA's INTRQ)' interrupt" "Not masked,Masked" sif cpuis("R8J7795*")||cpuis("R8A7795*")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440") group.long 0x1468++0x03 line.long 0x00 "PHYSTOP,PHY STOP Register" bitfld.long 0x00 0. " PHYSTOP ,PHY STOP mode enable" "Disabled,Enabled" endif group.long 0x1520++0x1B line.long 0x00 "DMADW0,Rx DMA Setup FIS Dword0 Register" bitfld.long 0x00 15. " AUTOACT ,Auto-Activation bit" "Disabled,Enabled" bitfld.long 0x00 14. " DMAINT ,Interrupt bit" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " DMADIR ,Data transfer direction bit" "Host -> device,Device -> host" bitfld.long 0x00 8.--11. " PMPORT ,Source device ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. " FISTYPE ,FIS type bit" line.long 0x04 "DMADW1,Rx DMA Setup FIS Dword1 Register" hexmask.long 0x04 5.--31. 1. " DMABLOW ,DMA Buffer Identifier Low field value in the DMA Setup" bitfld.long 0x04 0.--4. " DMATAG ,TAG field for NCQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8 "DMADW2,Rx DMA Setup FIS Dword2 Register" line.long 0xC "DMADW3,Rx DMA Setup FIS Dword3 Register" line.long 0x10 "DMADW4,Rx DMA Setup FIS Dword4 Register" line.long 0x14 "DMADW5,Rx DMA Setup FIS Dword5 Register" line.long 0x18 "DMADW6,Rx DMA Setup FIS Dword6 Register" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") textline " " group.long 0xE65E3F24++0x03 line.long 0x00 "REFSEL,Reference Clock Source Select Register" bitfld.long 0x00 0. " REFSEL ,Reference Clock Source Select" "On chip Clock,External Pin" endif width 0x0B tree.end tree.end tree "USB 2.0 (Universal Serial Bus 2.0)" base ad:0xEE081000 width 12. rgroup.long 0x00++0x03 "Host Controller Capability Registers" line.long 0x00 "HCIVERSION,Version Of The EHCI Standard Register" hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,Host Controller Interface Version Number" hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,Capability Register Length" rgroup.long 0x04++0x07 line.long 0x00 "HCSPARAMS,Host Controller Structure Parameters Register" bitfld.long 0x00 20.--23. " DPN ,Debug Port Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. " P_INDI ,Port Indicator" "Not supported,Supported" textline " " bitfld.long 0x00 12.--15. " N_CC ,Number of Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " N_PCC ,Number of Ports per Companion Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7. " PRR ,Port Routing Rule" "N_PCC,HCSP-PORTROUTE" bitfld.long 0x00 4. " PPC ,Port Power Control" "Not switched,Switched" textline " " bitfld.long 0x00 0.--3. " N_PORTS ,N_PORTS" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HCCPARAMS,Parameters Relating Host Controller Capabilities Register" hexmask.long.byte 0x04 8.--15. 1. " EECP ,EHCI Extended Capabilities Pointer" bitfld.long 0x04 4.--7. " IST ,Isochronous Scheduling Threshold" "Not cached,,2 microframes,,,,,,Entire frame,?..." bitfld.long 0x04 2. " ASPC ,Asynchronous Schedule Park Capability" "Not supported,Supported" textline " " bitfld.long 0x04 1. " PFLF ,Programmable Frame List Flag" "Fixed 1024,Changed 512-256" bitfld.long 0x04 0. " 64AC ,64-Bit Addressing Capability" "32-bit,64-bit" width 16. sif (cpu()=="RCARH2") if (((per.long(ad:0xEE081000+0x04))&0x80)==0x80) rgroup.long 0x0c++0x03 line.long 0x00 "HCSP-PORTROUTE,Companion Host Controller Assign Register" else hgroup.long 0x0c++0x03 hide.long 0x00 "HCSP-PORTROUTE,Companion Host Controller Assign" endif else if (((per.long(ad:0xEE081000+0x04))&0x80)==0x80) rgroup.long 0x0c++0x07 line.quad 0x00 "HCSP-PORTROUTE,Companion Host Controller Assign Register" hexmask.quad 0x00 0.--59. 1. " HCSP-PORTROUTE ,Correspondence between N_PORTS ports and companion host controllers" else hgroup.long 0x0c++0x07 hide.quad 0x00 "HCSP-PORTROUTE,Companion Host Controller Assign" endif endif width 12. sif (cpu()=="RCARH2") base ad:0xEE081010 endif group.long 0x10++0x0F "Host Controller Operational Registers" line.long 0x00 "USBCMD,USBCMD Register" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt Threshold Control" bitfld.long 0x00 11. " ASPME ,Asynchronous Schedule Park Mode Enable" "Disabled,Enabled" bitfld.long 0x00 8.--9. " ASPMC ,RO Asynchronous Schedule Park Mode Count" "0,1,2,3" textline " " sif (cpu()=="RCARH2") rbitfld.long 0x00 7. " LHCR ,Light Host Controller Reset" "No reset,Reset" else bitfld.long 0x00 7. " LHCR ,Light Host Controller Reset" "No reset,Reset" endif bitfld.long 0x00 6. " IAAD ,Interrupt on Async Advance Doorbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASE ,Asynchronous Schedule Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PSE ,Periodic Schedule Enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " FLS ,Frame List Size" "1024,512,256,?..." bitfld.long 0x00 1. " HCR ,Host Controller Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run" line.long 0x04 "USBSTS,Status Information Register" sif (cpu()=="RCARH2") hexmask.long.word 0x04 16.--31. 1. "ITC,Interrupt Threshold Control" rbitfld.long 0x04 15. " ASS ,Asynchronous Schedule Status" "Disabled,Enabled" rbitfld.long 0x04 14. " PSS ,Periodic Schedule Status" "Disabled,Enabled" rbitfld.long 0x04 13. " R ,Reclamation" "Not detected,Detected" textline " " rbitfld.long 0x04 12. " HCH ,HC Halted" "Run/Stop==1,Run/Stop==0" else bitfld.long 0x04 15. " ASS ,Asynchronous Schedule Status" "Disabled,Enabled" bitfld.long 0x04 14. " PSS ,Periodic Schedule Status" "Disabled,Enabled" bitfld.long 0x04 13. " R ,Reclamation" "Not detected,Detected" textline " " bitfld.long 0x04 12. " HCH ,HC Halted" "Run/Stop==1,Run/Stop==0" endif bitfld.long 0x04 5. " IAA ,Interrupt Async Advance" "No interrupt,Interrupt" bitfld.long 0x04 4. " HSE ,Host System Error" "No error,Error" textline " " bitfld.long 0x04 3. " FLR ,Frame List Rollover" "Disabled,Enabled" bitfld.long 0x04 2. " PCD ,Port Change Detect" "Not detected,Detected" bitfld.long 0x04 1. " UEI ,USB Error interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " UI ,USB Interrupt" "No interrupt,Interrupt" line.long 0x08 "USBINTR,On/off Of Hardware Interrupts Register" bitfld.long 0x08 5. " IAAE ,Interrupt on Async Advance Enable" "Disabled,Enabled" bitfld.long 0x08 4. " HSEE ,Host System Error Enable" "Disabled,Enabled" bitfld.long 0x08 3. " FLRE ,Frame List Rollover Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " PCDE ,Port Change Detect Enable" "Disabled,Enabled" bitfld.long 0x08 1. " UEIE ,USB Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 0. " UIE ,USB Interrupt Enable" "Disabled,Enabled" line.long 0x0c "FRINDEX, Current Frame Number Register" hexmask.long.word 0x0C 0.--13. 1. " FI ,Frame Index" width 18. sif (cpu()=="RCARH2") rgroup.long 0x20++0x3 line.long 0x00 "CTRLDSSEGMENT,CTRLDSSEGMENT Register" else group.long 0x20++0x3 line.long 0x00 "CTRLDSSEGMENT,CTRLDSSEGMENT Register" endif group.long 0x24++0x7 line.long 0x00 "PERIODICLISTBASE,Periodic Framelist Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BA ,Base Address" line.long 0x04 "ASYNCLISTADDR,Queue Heads Pointer" hexmask.long 0x04 5.--31. 0x20 " LPL ,Link Pointer Low" group.long 0x50++0x03 line.long 0x00 "CONFIGFLAG,Ownership Specification Register" bitfld.long 0x00 0. " CF ,Config Flag" "Each port to cHC,All ports to eHC" if ((((per.long(ad:0xEE081000+0x04))&0x80000)==0x80000)&&(((per.long(ad:0xEE081000+0x54))&0x5)==0x1)) group.long 0x54++0x03 line.long 0x00 "PORTSC(1-N_PORT),Ports And Monitors Port Status Control" bitfld.long 0x00 22. " WOE ,Wake on Over-Current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WDE ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WCE ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Test mode invalid,Test J_state,Test K_state,Test SE0_NAK,Test Packet,Test Force_Enable,?..." textline " " sif (cpu()!="RCARH2") bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Off,Amber,Greed,?..." endif textline " " bitfld.long 0x00 13. " PO ,Port Owner" "Companion,EHCI" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Off,On" sif (cpu()=="RCARH2") bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,K-state,J-state,?..." else bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,SE1" endif textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not detected,Detected" bitfld.long 0x00 5. " OC ,Over-Current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OA ,Over-Current Active" "No overcurrent,Overcurrent" bitfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PED ,Port Enabled/Disabled" "Disabled,Enabled" bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Device detected,No device detected" elif ((((per.long(ad:0xEE081000+0x04))&0x80000)==0x80000)&&(((per.long(ad:0xEE081000+0x54))&0x5)!=0x1)) group.long 0x54++0x03 line.long 0x00 "PORTSC(1-N_PORT),Ports And Monitors Port Status Control" bitfld.long 0x00 22. " WOE ,Wake on Over-Current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WDE ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WCE ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Test mode invalid,Test J_state,Test K_state,Test SE0_NAK,Test Packet,Test Force_Enable,?..." textline " " sif (cpu()!="RCARH2") bitfld.long 0x00 14.--15. " PIC ,Port Indicator Control" "Off,Amber,Greed,?..." endif textline " " bitfld.long 0x00 13. " PO ,Port Owner" "Companion,EHCI" textline " " bitfld.long 0x00 12. " PP ,Port Power" "Off,On" bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not detected,Detected" textline " " bitfld.long 0x00 5. " OC ,Over-Current Change" "Not changed,Changed" bitfld.long 0x00 4. " OA ,Over-Current Active" "No overcurrent,Overcurrent" textline " " bitfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PED ,Port Enabled/Disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "Device detected,No device detected" elif ((((per.long(ad:0xEE081000+0x04))&0x80000)==0x00)&&(((per.long(ad:0xEE081000+0x54))&0x5)==0x1)) group.long 0x54++0x03 line.long 0x00 "PORTSC(1-N_PORT),Ports And Monitors Port Status Control" bitfld.long 0x00 22. " WOE ,Wake on Over-Current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WDE ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WCE ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Test mode invalid,Test J_state,Test K_state,Test SE0_NAK,Test Packet,Test Force_Enable,?..." textline " " bitfld.long 0x00 13. " PO ,Port Owner" "Companion,EHCI" bitfld.long 0x00 12. " PP ,Port Power" "Off,On" textline " " sif (cpu()=="RCARH2") bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,K-state,J-state,?..." else bitfld.long 0x00 10.--11. " LS ,Line Status" "SE0,J-state,K-state,SE1" endif bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" textline " " bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not detected,Detected" textline " " bitfld.long 0x00 5. " OC ,Over-Current Change" "Not changed,Changed" bitfld.long 0x00 4. " OA ,Over-Current Active" "No overcurrent,Overcurrent" textline " " bitfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" bitfld.long 0x00 2. " PED ,Port Enabled/Disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current Connect Status" "Device detected,No device detected" else group.long 0x54++0x03 line.long 0x00 "PORTSC(1-N_PORT),Ports And Monitors Port Status Control" bitfld.long 0x00 22. " WOE ,Wake on Over-Current Enable" "Disabled,Enabled" bitfld.long 0x00 21. " WDE ,Wake on Disconnect Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WCE ,Wake on Connect Enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port Test Control" "Test mode invalid,Test J_state,Test K_state,Test SE0_NAK,Test Packet,Test Force_Enable,?..." textline " " bitfld.long 0x00 13. " PO ,Port Owner" "Companion,EHCI" bitfld.long 0x00 12. " PP ,Port Power" "Off,On" textline " " bitfld.long 0x00 8. " PR ,Port Reset" "No reset,Reset" bitfld.long 0x00 7. " S ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force Port Resume" "Not detected,Detected" bitfld.long 0x00 5. " OC ,Over-Current Change" "Not changed,Changed" textline " " bitfld.long 0x00 4. " OA ,Over-Current Active" "No overcurrent,Overcurrent" bitfld.long 0x00 3. " PEDC ,Port Enable/Disable Change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PED ,Port Enabled/Disabled" "Disabled,Enabled" bitfld.long 0x00 1. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current Connect Status" "Device detected,No device detected" endif sif (cpu()=="RCARH2") base ad:0xEE091000 width 17. tree "PCI Configuration Space for AHB-PCI Bridge" group.long 0x00++0x1B line.long 0x00 "VID_DID,Device/Vendor ID Register" hexmask.long.word 0x00 16.--31. 1. " DID ,Device ID" hexmask.long.word 0x00 0.--15. 1. " VID ,Vendor ID" line.long 0x04 "CMND_STS,Command Status Register" hexmask.long.word 0x04 16.--31. 1. " STATUS ,Status" hexmask.long.word 0x04 0.--15. 1. " COMMAND ,Command" line.long 0x08 "REVID_CC,Revision ID/Class Code Register" hexmask.long.tbyte 0x08 8.--31. 1. " CC ,Class Code" hexmask.long.byte 0x08 0.--7. 1. " RID ,Revision ID" line.long 0x0C "CLS_LT_HT_BIST,Cache Line Size/Latency Timer/Header Type/BIST Register" hexmask.long.byte 0x0C 24.--31. 1. " BIST ,BIST" hexmask.long.byte 0x0C 16.--23. 1. " HT ,Header Type" hexmask.long.byte 0x0C 8.--15. 1. " LT ,Latency Timer" textline " " hexmask.long.byte 0x0C 0.--7. 1. " CLS ,Cache Line Size" line.long 0x10 "BASEAD,AHB-PCI Bridge Registers Base Address Register" line.long 0x14 "WIN1_BASEAD,PCI-AHB Window1 Base Address Register" line.long 0x18 "WIN2_BASEAD,PCI-AHB Window2 Base Address Register" group.long 0x2C++0x3 line.long 0x00 "SSVID_SSID,Subsystem Vendor ID/Subsystem ID Register" hexmask.long.word 0x00 16.--31. 1. " SSID ,Subsystem ID" hexmask.long.word 0x00 0.--15. 1. " SSVID ,Subsystem Vendor ID" group.long 0x3C++0x3 line.long 0x00 "INTR_LINE_PIN,Interrupt Line/Pin Register" hexmask.long.byte 0x00 24.--31. 1. " Max_Lat ,Max_Lat" hexmask.long.byte 0x00 16.--23. 1. " Min_Gnt ,Min_Gnt" hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Interrupt Pin" textline " " hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Interrupt Line" tree.end tree "PCI Configuration Space for OHCI Host Logic" group.long 0x00++0x13 line.long 0x00 "VID_DID,Device/Vendor ID Register" hexmask.long.word 0x00 16.--31. 1. " DID ,Device ID" hexmask.long.word 0x00 0.--15. 1. " VID ,Vendor ID" line.long 0x04 "CMND_STS,Command Status Register" hexmask.long.word 0x04 16.--31. 1. " STATUS ,Status" hexmask.long.word 0x04 0.--15. 1. " COMMAND ,Command" line.long 0x08 "REVID_CC,Revision ID/Class Code Register" hexmask.long.tbyte 0x08 8.--31. 1. " CC ,Class Code" hexmask.long.byte 0x08 0.--7. 1. " RID ,Revision ID" line.long 0x0C "CLS_LT_HT_BIST,Cache Line Size/Latency Timer/Header Type/BIST Register" hexmask.long.byte 0x0C 24.--31. 1. " BIST ,BIST" hexmask.long.byte 0x0C 16.--23. 1. " HT ,Header Type" hexmask.long.byte 0x0C 8.--15. 1. " LT ,Latency Timer" textline " " hexmask.long.byte 0x0C 0.--7. 1. " CLS ,Cache Line Size" line.long 0x10 "BASEAD,OHCI Base Address Register" group.long 0x2C++0xB line.long 0x00 "SSVID_SSID,Subsystem Vendor ID/Subsystem ID Register" hexmask.long.word 0x00 16.--31. 1. " SSID ,Subsystem ID" hexmask.long.word 0x00 0.--15. 1. " SSVID ,Subsystem Vendor ID" line.long 0x04 "EROM_BASEAD,Expansion ROM Base Address Register" line.long 0x08 "CAPPTR,CAPPTR Register" hexmask.long.byte 0x08 0.--7. 1. " CAPPTR ,CAPPTR field" group.long 0x3C++0xB line.long 0x00 "INTR_LINE_PIN,Interrupt Line/Pin Register" hexmask.long.byte 0x00 24.--31. 1. " Max_Lat ,Max_Lat" hexmask.long.byte 0x00 16.--23. 1. " Min_Gnt ,Min_Gnt" hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Interrupt Pin" textline " " hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Interrupt Line" line.long 0x04 "CAPID_NIP_PMCAP,CAPID/Next item pointer/PMC Register" hexmask.long.word 0x04 16.--31. 1. " PMC ,PMC" hexmask.long.byte 0x04 8.--15. 1. " NEXT_ITEM_PTR ,Next item pointer" hexmask.long.byte 0x04 0.--7. 1. " CAP_ID ,Capability ID" line.long 0x08 "PMC_STS_PMCSR,Data/PMCSR_BSE/PMCSR Register" hexmask.long.byte 0x08 24.--31. 1. " DATA ,Data field" hexmask.long.byte 0x08 16.--23. 1. " PMCSR_BSE ,PMCSR_BSE field" hexmask.long.word 0x08 0.--15. 1. " PMCSR ,PMCSR field" group.long 0xE0++0x7 line.long 0x00 "EXT1,EXT1 Register" line.long 0x04 "EXT2,EXT2 Register" group.long 0xF0++0x7 line.long 0x00 "TRANS_CHARA,Transceiver characteristic Register" line.long 0x04 "UTMICTRL,UTMI+ Operation Mode Control Register" tree.end tree "PCI Configuration Space for EHCI Host Logic" group.long 0x100++0x13 line.long 0x00 "VID_DID,Device/Vendor ID Register" hexmask.long.word 0x00 16.--31. 1. " DID ,Device ID" hexmask.long.word 0x00 0.--15. 1. " VID ,Vendor ID" line.long 0x04 "CMND_STS,Command Status Register" hexmask.long.word 0x04 16.--31. 1. " STATUS ,Status" hexmask.long.word 0x04 0.--15. 1. " COMMAND ,Command" line.long 0x08 "REVID_CC,Revision ID/Class Code Register" hexmask.long.tbyte 0x08 8.--31. 1. " CC ,Class Code" hexmask.long.byte 0x08 0.--7. 1. " RID ,Revision ID" line.long 0x0C "CLS_LT_HT_BIST,Cache Line Size/Latency Timer/Header Type/BIST Register" hexmask.long.byte 0x0C 24.--31. 1. " BIST ,BIST" hexmask.long.byte 0x0C 16.--23. 1. " HT ,Header Type" hexmask.long.byte 0x0C 8.--15. 1. " LT ,Latency Timer" textline " " hexmask.long.byte 0x0C 0.--7. 1. " CLS ,Cache Line Size" line.long 0x10 "BASEAD,OHCI Base Address Register" group.long 0x12C++0xB line.long 0x00 "SSVID_SSID,Subsystem Vendor ID/Subsystem ID Register" hexmask.long.word 0x00 16.--31. 1. " SSID ,Subsystem ID" hexmask.long.word 0x00 0.--15. 1. " SSVID ,Subsystem Vendor ID" line.long 0x04 "EROM_BASEAD,Expansion ROM Base Address Register" line.long 0x08 "CAPPTR,CAPPTR Register" hexmask.long.byte 0x08 0.--7. 1. " CAPPTR ,CAPPTR field" group.long 0x13C++0xB line.long 0x00 "INTR_LINE_PIN,Interrupt Line/Pin Register" hexmask.long.byte 0x00 24.--31. 1. " Max_Lat ,Max_Lat" hexmask.long.byte 0x00 16.--23. 1. " Min_Gnt ,Min_Gnt" hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Interrupt Pin" textline " " hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Interrupt Line" line.long 0x04 "CAPID_NIP_PMCAP,CAPID/Next item pointer/PMC Register" hexmask.long.word 0x04 16.--31. 1. " PMC ,PMC" hexmask.long.byte 0x04 8.--15. 1. " NEXT_ITEM_PTR ,Next item pointer" hexmask.long.byte 0x04 0.--7. 1. " CAP_ID ,Capability ID" line.long 0x08 "PMC_STS_PMCSR,Data/PMCSR_BSE/PMCSR Register" hexmask.long.byte 0x08 24.--31. 1. " DATA ,Data field" hexmask.long.byte 0x08 16.--23. 1. " PMCSR_BSE ,PMCSR_BSE field" hexmask.long.word 0x08 0.--15. 1. " PMCSR ,PMCSR field" group.long 0x1E0++0x7 line.long 0x00 "EXT1,EXT1 Register" line.long 0x04 "EXT2,EXT2 Register" group.long 0x1F0++0x7 line.long 0x00 "TRANS_CHARA,Transceiver characteristic Register" line.long 0x04 "UTMICTRL,UTMI+ Operation Mode Control Register" tree.end group.long 0x800++0x7 line.long 0x00 "PCIAHB_WIN1_CTR,PCIAHB_WIN1_CTR Register" line.long 0x04 "PCIAHB_WIN2_CTR,PCIAHB_WIN2_CTR Register" group.long 0x810++0x7 line.long 0x00 "AHBPCI_WIN1_CTR,AHBPCI_WIN1_CTR Register" line.long 0x04 "AHBPCI_WIN2_CTR,AHBPCI_WIN2_CTR Register" group.long 0x820++0x7 line.long 0x00 "PCI_INT_ENABLE,PCI Interrupt Enable Register" line.long 0x04 "PCI_INT_STATUS,PCI Interrupt Status Register" group.long 0x830++0x7 line.long 0x00 "AHB_BUS_CTR,AHB_BUS_CTR Register" line.long 0x04 "USBCTR,USBCTR Register" group.long 0x840++0x3 line.long 0x00 "PCI_ARBITER_CTR,PCI_ARBITER_CTR Register" group.long 0x848++0x3 line.long 0x00 "PCI_UNIT_REV,PCI_UNIT_REV Register" endif width 0xb tree.end tree "USB 1.1 (Universal Serial Bus 1.1)" base ad:0xEE080000 width 20. rgroup.long 0x00++0x03 line.long 0x00 "HCREVISION,Hc Revision Register" hexmask.long.byte 0x00 00.--07. 1. " REVISION ,Revision" group.long 0x04++0x17 line.long 0x00 "HCCONTROL,Hc Control Register" bitfld.long 0x00 10. " RWCE ,Remote Wakeup Connected Enable" "Disabled,Enabled" bitfld.long 0x00 09. " RWC ,Remote Wakeup Connected" "Not supported,Supported" bitfld.long 0x00 08. " IR ,Interrupt Routing" "Normal,SMI" bitfld.long 0x00 06.--07. " HCFS ,Host Controller Functional State" "Reset,Resume,Operation,Suspend" textline " " bitfld.long 0x00 05. " BLE ,Bulk List Enable" "Disabled,Enabled" bitfld.long 0x00 04. " CLE ,Control List Enable" "Disabled,Enabled" bitfld.long 0x00 03. " IE ,Isochronous Enable" "Disabled,Enabled" bitfld.long 0x00 02. " PLE ,Periodic List Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 00.--01. " CBSR[1:0] ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1" line.long 0x04 "HCCOMMANDSTATUS,Hc Command Status Register" hexmask.long.byte 0x04 16.--17. 1. " SOC[1:0] ,Scheduling Overrun Count" bitfld.long 0x04 03. " OCR ,Ownership Change Request" "Not requested,Requested" bitfld.long 0x04 02. " BLF ,Bulk List Filled" "Not processed,Processed" bitfld.long 0x04 01. " CLF ,Control List Filled" "Not processed,Processed" textline " " bitfld.long 0x04 00. " HCR ,Host Controller Reset" "No reset,Reset" line.long 0x08 "HCINTERRUPTSTATUS,Hc Interrupt Status Register" sif (cpu()!="RCARH2") bitfld.long 0x08 30. " OC ,Ownership Change" "Not changed,Changed" endif textline " " bitfld.long 0x08 06. " RHSC ,Root Hub Status Change" "Not changed,Changed" bitfld.long 0x08 05. " FNO ,Frame Number Overflow" "Not updated,Updated" bitfld.long 0x08 04. " UE ,Unrecoverable Error" "No error,Error" textline " " bitfld.long 0x08 03. " RD ,Resume Detected" "Not detected,Detected" bitfld.long 0x08 02. " SF ,Start Of Frame" "Not initiated,Initiated" bitfld.long 0x08 01. " WDH ,Writeback Done Head" "Not updated,Updated" bitfld.long 0x08 00. " SO ,Scheduling Overrun" "Not overrun,Overrun" line.long 0x0C "HCINTERRUPTENABLE,Hc Interrupt Enable Register" bitfld.long 0x0C 31. " MIE ,Master Interrupt Enable" "Not affected,Enabled" sif (cpu()!="RCARH2") bitfld.long 0x0C 30. " OC ,Ownership Change Enable" "Not affected,Enabled" endif textline " " bitfld.long 0x0C 06. " RHSC ,Root Hub Status Change Enable" "Not affected,Enabled" bitfld.long 0x0C 05. " FNO ,Frame Number Overflow Enable" "Not affected,Enabled" textline " " bitfld.long 0x0C 04. " UE ,Unrecoverable Error Enable" "Not affected,Enabled" bitfld.long 0x0C 03. " RD ,Resume Detected Enable" "Not affected,Enabled" bitfld.long 0x0C 02. " SF ,Start Of Frame Enable" "Not affected,Enabled" bitfld.long 0x0C 01. " WDH ,Writeback Done Head Enable" "Not affected,Enabled" textline " " bitfld.long 0x0C 00. " SO ,Scheduling Overrun Enable" "Not affected,Enabled" line.long 0x10 "HCINTERRUPTDISABLE,Hc Interrupt Disable Register" bitfld.long 0x10 31. " MID ,Master Interrupt Disable" "No,Yes" sif (cpu()!="RCARH2") bitfld.long 0x10 30. " OCD ,Ownership Change Disable" "No,Yes" endif textline " " bitfld.long 0x10 06. " RHSCD ,Root Hub Status Change Disable" "No,Yes" bitfld.long 0x10 05. " FNOD ,Frame Number Overflow Disable" "No,Yes" textline " " bitfld.long 0x10 04. " UED ,Unrecoverable Error Disable" "No,Yes" bitfld.long 0x10 03. " RDD ,Resume Detected Disable" "No,Yes" bitfld.long 0x10 02. " SFD ,Start Of Frame Disable" "No,Yes" bitfld.long 0x10 01. " WDHD ,Writeback Done Head Disable" "No,Yes" textline " " bitfld.long 0x10 00. " SOD ,Scheduling Overrun Disable" "No,Yes" line.long 0x14 "HCHCCA,HCCA Register" hexmask.long.tbyte 0x14 08.--31. 1. " HCCA ,Host Controller Communication Area" rgroup.long 0x1C++0x03 line.long 0x00 "HCPERIODCURRENTED,Hc Period Current ED Register" hexmask.long 0x00 04.--31. 1. " PCED ,Period Current ED" group.long 0x20++0x0F line.long 0x00 "HCCONTROLHEADED,Hc Control Head ED Register" hexmask.long 0x00 04.--31. 1. " CHED ,Control Head ED" line.long 0x04 "HCCONTROLCURRENTED,Hc Control Current ED Register" hexmask.long 0x04 04.--31. 1. " CCED ,Control Current ED" line.long 0x08 "HCBULKHEADED,Hc Bulk Head ED Register" hexmask.long 0x08 04.--31. 1. " BHED ,Bulk Head ED" line.long 0x0C "HCBULKCURRENTED,Hc Bulk Current ED Register" hexmask.long 0x0C 04.--31. 1. " BCED ,Bulk Current ED" rgroup.long 0x30++0x03 line.long 0x00 "HCDONEHEAD,Hc Done Head Register" hexmask.long 0x00 04.--31. 1. " DH ,Done Head" group.long 0x34++0x03 line.long 0x00 "HCFMINTERVAL,Hc Fm Interval Register" bitfld.long 0x00 31. " FIT ,Frame Interval Toggle" "Low,High" hexmask.long.word 0x00 16.--30. 1. " FSMPS ,FS Largest Data Packet" hexmask.long.word 0x00 00.--13. 1. " FI ,Frame Interval" rgroup.long 0x38++0x07 line.long 0x00 "HCFMREMAINING,Hc Fm Remaining Register" sif (cpu()=="RCARH2") bitfld.long 0x00 31. " FRT ,Frame Remaining Toggle" "Low,High" else bitfld.long 0x00 31. " FIT ,Frame Remaining Toggle" "Low,High" endif hexmask.long.word 0x00 00.--13. 1. " FR ,Frame Remaining" line.long 0x04 "HCFMNUMBER,Hc Fm Number Register" hexmask.long.word 0x04 00.--15. 1. " FN ,Frame Number" group.long 0x040++0x17 line.long 0x00 "HCPERIODICSTART,Hc Periodic Start Register" hexmask.long.word 0x00 00.--13. 1. " PS ,Periodic Start" line.long 0x04 "HCLSTHRESHOLD,Hc LS Threshold Register" hexmask.long.word 0x04 00.--11. 1. " LST ,LS Threshold" line.long 0x08 "HCRHDESCRIPTORA,Hc Rh Descriptor A Register" hexmask.long.byte 0x08 24.--31. 1. " POTPGT ,Power On To Power Good Time" bitfld.long 0x08 12. " NOCP ,No Over Current Protection" "Protected,Not protected" bitfld.long 0x08 11. " OCPM ,Over Current Protection Mode" "Reported for all,Not supported" bitfld.long 0x08 10. " DT ,Device Type" "Low,High" textline " " bitfld.long 0x08 09. " NPS ,No Power Switching" "Switched,Not switched" bitfld.long 0x08 08. " PSM ,Power Switching Mode" "Power supplied all,Power supplied each" hexmask.long.byte 0x08 00.--07. 1. " NDP ,Number Downstream Ports" line.long 0x0C "HCRHDESCRIPTORB,Hc Rh Descriptor B Register" hexmask.long.word 0x0C 16.--31. 1. " PPCM ,Port Power Control Mask" hexmask.long.word 0x0C 00.--15. 1. " DR ,Device Removable" line.long 0x10 "HCRHSTATUS,Hc Rh Status Register" bitfld.long 0x10 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared" eventfld.long 0x10 17. " OCIC ,Over Current Indicator Change" "Not changed,Changed" bitfld.long 0x10 16. " SGP ,Local Power Status Change" "Not changed,Changed" bitfld.long 0x10 15. " DRWE ,Device Remote Wakeup Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 01. " OCI ,Over Current Indicator" "Not ever-current,Over-current" bitfld.long 0x10 00. " CGP ,Local Power Status/ClearGlobalPower" "No effect,Cleared" line.long 0x14 "HCRHPORTSTATUS1,Hc Rh Port Status 1" sif (cpu()=="RCARH2") eventfld.long 0x14 20. " PRSC ,Port Reset Status Change" "Not completed,Completed" else bitfld.long 0x14 20. " PRSC ,Port Reset Status Change" "Not completed,Completed" endif eventfld.long 0x14 19. " POCIC ,Over Current Status Change" "Not changed,Changed" sif (cpu()=="RCARH2") eventfld.long 0x14 18. " PSSC ,Port Suspend Status Change" "Not completed,Completed" eventfld.long 0x14 17. " PESC ,Port Enable Status Change" "Not changed,Changed" else bitfld.long 0x14 18. " PSSC ,Port Suspend Status Change" "Not completed,Completed" bitfld.long 0x14 17. " PESC ,Port Enable Status Change" "Not changed,Changed" endif textline " " eventfld.long 0x14 16. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x14 09. " LSDA ,Low Speed Device Attached" "Full speed,Low speed" bitfld.long 0x14 08. " PPS ,Port Power Status" "Turned off,Turned On" bitfld.long 0x14 04. " PRS ,Port Reset Status" "No reset,Reset" textline " " bitfld.long 0x14 03. " POCI ,Port Over Current Indicator" "Not over-current,Over-current" bitfld.long 0x14 02. " PSS ,Port Suspend Status" "Not suspended,Suspended" bitfld.long 0x14 01. " PES ,Port Enable Status" "Disabled,Enabled" bitfld.long 0x14 00. " CCS ,Current Connect Status" "Not connected,Connected" width 0x0B tree.end tree "HS-USB (High Speed USB)" base ad:0xE6590000 width 11. group.word 0x00++0x03 line.word 0x00 "SYSCFG,System Configuration Control Register" sif (cpu()!="R8A77470")&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450")&&(cpu()!="R8A77440") bitfld.word 0x00 10. " SCKE ,USB module clock enable" "Disabled,Enabled" bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled" bitfld.word 0x00 4. " DPRPU ,D+ line resistor control (Pull-up is enabled)" "Disabled,Enabled" else bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled" bitfld.word 0x00 4. " DPRPU ,D+ line resistor control (Pull-up is enabled)" "Disabled,Enabled" endif textline " " bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled" line.word 0x02 "BUSWAIT,CPU Bus Wait Register" bitfld.word 0x02 0.--3. " BWAIT ,CPU bus wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits" rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS,System Configuration Status Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440") bitfld.word 0x00 0.--1. " LNST ,USB data line status (Full-speed|High-speed|Chirp))" "SE0|Squelch|Squelch,J-state|UnSquelch|Chirp-J,K-state|Invalid|Chirp K,SE1|Invalid|Invalid" else bitfld.word 0x00 0.--1. " LNST ,USB data line status (Full-speed|High-speed|Chirp))" "SE0|Squelch|Squelch,J-state|Squelch|Chirp-J,K-state|Invalid|Chirp K,SE1|Invalid|Invalid" endif textline " " group.word 0x08++0x01 line.word 0x00 "DVSTCTR,Device State Control Register" bitfld.word 0x00 8. " WKUP ,Wakeup output" "No signal,Wakeup" rbitfld.word 0x00 0.--2. " RHST ,Reset handshake" "Undefined,Reset handshake,Full-speed,High-speed,?..." if (((per.w(ad:0xE6590000))&0x80)==0x80) group.word 0x0C++0x01 line.word 0x00 "TESTMODE,Test Mode Register" bitfld.word 0x00 0.--3. " UTST ,Test mode" "Normal,Test_J,Test_K,Test_SE0_NAK,Test_Packet,?..." else hgroup.word 0x0C++0x01 hide.word 0x00 "TESTMODE,Test Mode Register" endif hgroup.long 0x14++0x03 hide.long 0x00 "CFIFO,FIFO Port Register" in group.word 0x20++0x03 line.word 0x00 "CFIFOSEL,FIFO Port C Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write" bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x02 "CFIFOCTR,FIFO Port C Control Register" bitfld.word 0x02 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x02 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x02 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x02 0.--11. 1. " DTLN ,Receive data length" group.word 0x28++0x07 line.word 0x00 "D0FIFOSEL,FIFO Port D0 Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x00 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x02 "D0FIFOCTR,FIFO Port D0 Control Register" bitfld.word 0x02 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x02 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x02 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x02 0.--11. 1. " DTLN ,Receive data length" line.word 0x04 "D1FIFOSEL,FIFO Port D1 Select Register" bitfld.word 0x04 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x04 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x04 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x04 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x04 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x04 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x04 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x06 "D1FIFOCTR,FIFO Port D1 Control Register" bitfld.word 0x06 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x06 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x06 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x06 0.--11. 1. " DTLN ,Receive data length" sif ((cpu()=="R8A77940")||cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||cpuis("R7S7210*")) group.word 0xF0++0x07 line.word 0x0 "D2FIFOSEL,FIFO Port D2 Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x00 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x02 "D2FIFOCTR,FIFO Port D2 Control Register" bitfld.word 0x02 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x02 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x02 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x02 0.--11. 1. " DTLN ,Receive data length" line.word 0x04 "D3FIFOSEL,FIFO Port D3 Select Register" bitfld.word 0x04 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x04 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x04 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x04 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x04 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x04 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x04 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x06 "D3FIFOCTR,FIFO Port D3 Control Register" bitfld.word 0x06 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x06 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x06 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x06 0.--11. 1. " DTLN ,Receive data length" endif group.word 0x30++0x01 line.word 0x00 "INTENB0,Interrupts Enable Register 0" bitfld.word 0x00 15. " VBSE ,VBUS interrupts enable" "Disabled,Enabled" bitfld.word 0x00 14. " RSME ,Resume interrupts enable" "Disabled,Enabled" bitfld.word 0x00 13. " SOFE ,Frame number update interrupts enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DVSE ,Device state transition interrupts enable" "Disabled,Enabled" bitfld.word 0x00 11. " CTRE ,Control transfer stage transition interrupts enable" "Disabled,Enabled" bitfld.word 0x00 10. " BEMPE ,Buffer empty interrupts enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " NRDYE ,Buffer not ready response interrupts enable" "Disabled,Enabled" bitfld.word 0x00 8. " BRDYE ,Buffer ready interrupts enable" "Disabled,Enabled" group.word 0x36++0x07 line.word 0x00 "BRDYENB,BRDY Interrupt Enable Register" bitfld.word 0x00 15. " PIPEFBRDYE ,BRDY interrupt enable for pipe F" "Disabled,Enabled" bitfld.word 0x00 14. " PIPEEBRDYE ,BRDY interrupt enable for pipe E" "Disabled,Enabled" bitfld.word 0x00 13. " PIPEDBRDYE ,BRDY interrupt enable for pipe D" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " PIPECBRDYE ,BRDY interrupt enable for pipe C" "Disabled,Enabled" bitfld.word 0x00 11. " PIPEBBRDYE ,BRDY interrupt enable for pipe B" "Disabled,Enabled" bitfld.word 0x00 10. " PIPEABRDYE ,BRDY interrupt enable for pipe A" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PIPE9BRDYE ,BRDY interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x00 8. " PIPE8BRDYE ,BRDY interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x00 7. " PIPE7BRDYE ,BRDY interrupt enable for pipe 7" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " PIPE6BRDYE ,BRDY interrupt enable for pipe 6" "Disabled,Enabled" bitfld.word 0x00 5. " PIPE5BRDYE ,BRDY interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x00 4. " PIPE4BRDYE ,BRDY interrupt enable for pipe 4" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PIPE3BRDYE ,BRDY interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x00 2. " PIPE2BRDYE ,BRDY interrupt enable for pipe 2" "Disabled,Enabled" bitfld.word 0x00 1. " PIPE1BRDYE ,BRDY interrupt enable for pipe 1" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " PIPE0BRDYE ,BRDY interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x02 "NRDYENB,NRDY Interrupt Enable Register" bitfld.word 0x02 15. " PIPEFNRDYE ,NRDY interrupt enable for pipe F" "Disabled,Enabled" bitfld.word 0x02 14. " PIPEENRDYE ,NRDY interrupt enable for pipe E" "Disabled,Enabled" bitfld.word 0x02 13. " PIPEDNRDYE ,NRDY interrupt enable for pipe D" "Disabled,Enabled" textline " " bitfld.word 0x02 12. " PIPECNRDYE ,NRDY interrupt enable for pipe C" "Disabled,Enabled" bitfld.word 0x02 11. " PIPEBNRDYE ,NRDY interrupt enable for pipe B" "Disabled,Enabled" bitfld.word 0x02 10. " PIPEANRDYE ,NRDY interrupt enable for pipe A" "Disabled,Enabled" textline " " bitfld.word 0x02 9. " PIPE9NRDYE ,NRDY interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x02 8. " PIPE8NRDYE ,NRDY interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x02 7. " PIPE7NRDYE ,NRDY interrupt enable for pipe 7" "Disabled,Enabled" textline " " bitfld.word 0x02 6. " PIPE6NRDYE ,NRDY interrupt enable for pipe 6" "Disabled,Enabled" bitfld.word 0x02 5. " PIPE5NRDYE ,NRDY interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x02 4. " PIPE4NRDYE ,NRDY interrupt enable for pipe 4" "Disabled,Enabled" textline " " bitfld.word 0x02 3. " PIPE3NRDYE ,NRDY interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x02 2. " PIPE2NRDYE ,NRDY interrupt enable for pipe 2" "Disabled,Enabled" bitfld.word 0x02 1. " PIPE1NRDYE ,NRDY interrupt enable for pipe 1" "Disabled,Enabled" textline " " bitfld.word 0x02 0. " PIPE0NRDYE ,NRDY interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x04 "BEMPENB,BEMP Interrupt Enable Register" bitfld.word 0x04 15. " PIPEFBEMPE ,BEMP interrupt enable for pipe F" "Disabled,Enabled" bitfld.word 0x04 14. " PIPEEBEMPE ,BEMP interrupt enable for pipe E" "Disabled,Enabled" bitfld.word 0x04 13. " PIPEDBEMPE ,BEMP interrupt enable for pipe D" "Disabled,Enabled" textline " " bitfld.word 0x04 12. " PIPECBEMPE ,BEMP interrupt enable for pipe C" "Disabled,Enabled" bitfld.word 0x04 11. " PIPEBBEMPE ,BEMP interrupt enable for pipe B" "Disabled,Enabled" bitfld.word 0x04 10. " PIPEABEMPE ,BEMP interrupt enable for pipe A" "Disabled,Enabled" textline " " bitfld.word 0x04 9. " PIPE9BEMPE ,BEMP interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x04 8. " PIPE8BEMPE ,BEMP interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x04 7. " PIPE7BEMPE ,BEMP interrupt enable for pipe 7" "Disabled,Enabled" textline " " bitfld.word 0x04 6. " PIPE6BEMPE ,BEMP interrupt enable for pipe 6" "Disabled,Enabled" bitfld.word 0x04 5. " PIPE5BEMPE ,BEMP interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x04 4. " PIPE4BEMPE ,BEMP interrupt enable for pipe 4" "Disabled,Enabled" textline " " bitfld.word 0x04 3. " PIPE3BEMPE ,BEMP interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x04 2. " PIPE2BEMPE ,BEMP interrupt enable for pipe 2" "Disabled,Enabled" bitfld.word 0x04 1. " PIPE1BEMPE ,BEMP interrupt enable for pipe 1" "Disabled,Enabled" textline " " bitfld.word 0x04 0. " PIPE0BEMPE ,BEMP interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x06 "SOFCFG,SOF Output Configuration Register" bitfld.word 0x06 6. " BRDYM ,Status clear timing of each pipe BRDY interrupt" "Cleared by SW,Cleared by reading" group.word 0x40++0x01 line.word 0x00 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x00 15. " VBINT ,VBUS interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 14. " RESM ,Resume interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 13. " SOFR ,Frame number refresh interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 12. " DVST ,Device state transition interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 11. " CTRT ,Control transfer stage transition interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 10. " BEMP ,Buffer empty interrupt status" "No interrupt,Interrupt" textline " " rbitfld.word 0x00 9. " NRDY ,Buffer not ready interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 8. " BRDY ,Buffer ready interrupt status" "No interrupt,Interrupt" textline " " rbitfld.word 0x00 7. " VBSTS ,VBUS input status" "Low,High" rbitfld.word 0x00 4.--6. " DVSQ ,Device state" "Powered,Default,Address,Configured,Suspended,Suspended,Suspended,Suspended" textline " " bitfld.word 0x00 3. " VALID ,Setup packet reception" "Not detected,Detected" rbitfld.word 0x00 0.--2. " CTSQ ,Control transfer stage" "Idle/Setup,Read data,Read status,Write Data,Write status,Write (no data) status,Sequence error,?..." group.word 0x46++0x07 line.word 0x00 "BRDYSTS,BRDY Interrupt Status Register" bitfld.word 0x00 15. " PIPEFBRDY ,BRDY interrupt status for pipe F" "No interrupt,Interrupt" bitfld.word 0x00 14. " PIPEEBRDY ,BRDY interrupt status for pipe E" "No interrupt,Interrupt" bitfld.word 0x00 13. " PIPEDBRDY ,BRDY interrupt status for pipe D" "No interrupt,Interrupt" textline " " bitfld.word 0x00 12. " PIPECBRDY ,BRDY interrupt status for pipe C" "No interrupt,Interrupt" bitfld.word 0x00 11. " PIPEBBRDY ,BRDY interrupt status for pipe B" "No interrupt,Interrupt" bitfld.word 0x00 10. " PIPEABRDY ,BRDY interrupt status for pipe A" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " PIPE9BRDY ,BRDY interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x00 8. " PIPE8BRDY ,BRDY interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x00 7. " PIPE7BRDY ,BRDY interrupt status for pipe 7" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " PIPE6BRDY ,BRDY interrupt status for pipe 6" "No interrupt,Interrupt" bitfld.word 0x00 5. " PIPE5BRDY ,BRDY interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x00 4. " PIPE4BRDY ,BRDY interrupt status for pipe 4" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " PIPE3BRDY ,BRDY interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x00 2. " PIPE2BRDY ,BRDY interrupt status for pipe 2" "No interrupt,Interrupt" bitfld.word 0x00 1. " PIPE1BRDY ,BRDY interrupt status for pipe 1" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " PIPE0BRDY ,BRDY interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x02 "NRDYSTS,NRDY Interrupt Status Register" bitfld.word 0x02 15. " PIPEFNRDY ,NRDY interrupt status for pipe F" "No interrupt,Interrupt" bitfld.word 0x02 14. " PIPEENRDY ,NRDY interrupt status for pipe E" "No interrupt,Interrupt" bitfld.word 0x02 13. " PIPEDNRDY ,NRDY interrupt status for pipe D" "No interrupt,Interrupt" textline " " bitfld.word 0x02 12. " PIPECNRDY ,NRDY interrupt status for pipe C" "No interrupt,Interrupt" bitfld.word 0x02 11. " PIPEBNRDY ,NRDY interrupt status for pipe B" "No interrupt,Interrupt" bitfld.word 0x02 10. " PIPEANRDY ,NRDY interrupt status for pipe A" "No interrupt,Interrupt" textline " " bitfld.word 0x02 9. " PIPE9NRDY ,NRDY interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x02 8. " PIPE8NRDY ,NRDY interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x02 7. " PIPE7NRDY ,NRDY interrupt status for pipe 7" "No interrupt,Interrupt" textline " " bitfld.word 0x02 6. " PIPE6NRDY ,NRDY interrupt status for pipe 6" "No interrupt,Interrupt" bitfld.word 0x02 5. " PIPE5NRDY ,NRDY interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x02 4. " PIPE4NRDY ,NRDY interrupt status for pipe 4" "No interrupt,Interrupt" textline " " bitfld.word 0x02 3. " PIPE3NRDY ,NRDY interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x02 2. " PIPE2NRDY ,NRDY interrupt status for pipe 2" "No interrupt,Interrupt" bitfld.word 0x02 1. " PIPE1NRDY ,NRDY interrupt status for pipe 1" "No interrupt,Interrupt" textline " " bitfld.word 0x02 0. " PIPE0NRDY ,NRDY interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x04 "BEMPSTS,BEMP Interrupt Status Register" bitfld.word 0x04 15. " PIPEFBEMP ,BEMP interrupt status for pipe F" "No interrupt,Interrupt" bitfld.word 0x04 14. " PIPEEBEMP ,BEMP interrupt status for pipe E" "No interrupt,Interrupt" bitfld.word 0x04 13. " PIPEDBEMP ,BEMP interrupt status for pipe D" "No interrupt,Interrupt" textline " " bitfld.word 0x04 12. " PIPECBEMP ,BEMP interrupt status for pipe C" "No interrupt,Interrupt" bitfld.word 0x04 11. " PIPEBBEMP ,BEMP interrupt status for pipe B" "No interrupt,Interrupt" bitfld.word 0x04 10. " PIPEABEMP ,BEMP interrupt status for pipe A" "No interrupt,Interrupt" textline " " bitfld.word 0x04 9. " PIPE9BEMP ,BEMP interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x04 8. " PIPE8BEMP ,BEMP interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x04 7. " PIPE7BEMP ,BEMP interrupt status for pipe 7" "No interrupt,Interrupt" textline " " bitfld.word 0x04 6. " PIPE6BEMP ,BEMP interrupt status for pipe 6" "No interrupt,Interrupt" bitfld.word 0x04 5. " PIPE5BEMP ,BEMP interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x04 4. " PIPE4BEMP ,BEMP interrupt status for pipe 4" "No interrupt,Interrupt" textline " " bitfld.word 0x04 3. " PIPE3BEMP ,BEMP interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x04 2. " PIPE2BEMP ,BEMP interrupt status for pipe 2" "No interrupt,Interrupt" bitfld.word 0x04 1. " PIPE1BEMP ,BEMP interrupt status for pipe 1" "No interrupt,Interrupt" textline " " bitfld.word 0x04 0. " PIPE0BEMP ,BEMP interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x06 "FRMNUM,Frame Number Register" bitfld.word 0x06 15. " OVRN ,Overrun/Underrun detect status" "No error,Error" bitfld.word 0x06 14. " CRCE ,Receive data error" "No error,Error" hexmask.word 0x06 0.--10. 1. " FRNM ,Frame number" rgroup.word 0x4E++0x03 line.word 0x00 "UFRMNUM,uFrame Number Register" bitfld.word 0x0 0.--2. " UFRNM ,uFrame" "0,1,2,3,4,5,6,7" line.word 0x02 "USBADDR,USB Address Register" hexmask.word.byte 0x02 0.--6. 0x01 " USBADDR ,USB address" rgroup.word 0x54++0x07 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.byte 0x00 8.--15. 1. " BREQUEST ,Store the value of USB request bRequest" hexmask.word.byte 0x00 0.--7. 1. " BMREQUESTTYPE ,Store the value of USB request bmRequestType" line.word 0x02 "USBVAL,USB Request Value Register" line.word 0x04 "USBINDX,USB Request Index Register" line.word 0x06 "USBLENG,USB Request Length Register" group.word 0x5E++0x03 line.word 0x00 "DCPMAXP,DCP Maximum Packet Size Register" hexmask.word.byte 0x00 0.--6. 1. " MXPS ,Maximum packet size" line.word 0x02 "DCPCTR,DCP Control Register" rbitfld.word 0x02 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x02 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x02 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x02 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x02 5. " PBUSY ,Pipe busy" "Not busy,Busy" bitfld.word 0x02 2. " CCPL ,Control transfer end enable" "Disabled,Enabled" textline " " bitfld.word 0x02 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" tree "PIPE Registers" group.word 0x64++0x01 line.word 0x00 "PIPESEL,Pipe Window Select Register" bitfld.word 0x0 0.--3. " PIPESEL ,Pipe window select" "Not selected,PIPE 1,PIPE 2,PIPE 3,PIPE 4,PIPE 5,PIPE 6,PIPE 7,PIPE 8,PIPE 9,PIPE A,PIPE B,PIPE C,PIPE D,PIPE E,PIPE F" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440") if (((per.w(ad:0xE6590000+0x64))&0xF)==(0x1||0x2)) group.word 0x68++0x1 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,Isochronous" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x3||0x4||0x5||0xB||0xC||0xD||0xE||0xF)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x9||0xA)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" sif cpu()=="R8A77420"||cpuis("R7S7210*")||cpuis("R8A77440") bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,Interrupt,?..." else bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,,Interrupt,?..." endif bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x6||0x7||0x8)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,,Interrupt,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else if (((per.w(ad:0xE6590000+0x64))&0xF)==(0x1||0x2)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,Isochronous" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x3||0x4||0x5||0x9||0xA||0xB||0xC||0xD||0xE||0xF)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x6||0x7||0x8)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,,Interrupt,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440") if (((per.w(ad:0xE6590000+0x64))&0xF)==(0x6||0x7||0x8)) group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Setting Register" bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,?..." hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number" else group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Setting Register" bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,128 bytes,196 bytes,256 bytes,320 bytes,384 bytes,448 bytes,512 bytes,576 bytes,640 bytes,704 bytes,768 bytes,832 bytes,896 bytes,960 bytes,1024 bytes,1088 bytes,1152 bytes,1216 bytes,1280 bytes,1344 bytes,1408 bytes,1472 bytes,1536 bytes,1600 bytes,1664 bytes,1728 bytes,1792 bytes,1856 bytes,1920 bytes,1984 bytes,2048 bytes" hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number" endif else group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Setting Register" bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,128 bytes,196 bytes,256 bytes,320 bytes,384 bytes,448 bytes,512 bytes,576 bytes,640 bytes,704 bytes,768 bytes,832 bytes,896 bytes,960 bytes,1024 bytes,1088 bytes,1152 bytes,1216 bytes,1280 bytes,1344 bytes,1408 bytes,1472 bytes,1536 bytes,1600 bytes,1664 bytes,1728 bytes,1792 bytes,1856 bytes,1920 bytes,1984 bytes,2048 bytes" hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number" endif group.word 0x6C++0x03 line.word 0x00 "PIPEMAXP,Pipe Maximum Packet Size Register" hexmask.word 0x00 0.--10. 1. " MXPS ,Maximum packet size" line.word 0x02 "PIPEPERI,Pipe Timing Control Register" bitfld.word 0x02 12. " IFIS ,Isochronous IN buffer flush" "Not flushed,Flushed" bitfld.word 0x02 0.--2. " IITV ,Interval error detection interval" "T,T/2,T/4,T/8,T/16,T/32,T/64,T/128" group.word 0x70++0x01 line.word 0x00 "PIPE1CTR,PIPE1 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x72++0x01 line.word 0x00 "PIPE2CTR,PIPE2 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x74++0x01 line.word 0x00 "PIPE3CTR,PIPE3 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x76++0x01 line.word 0x00 "PIPE4CTR,PIPE4 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x78++0x01 line.word 0x00 "PIPE5CTR,PIPE5 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7A++0x01 line.word 0x00 "PIPE6CTR,PIPE6 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" textline " " bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" textline " " bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7C++0x01 line.word 0x00 "PIPE7CTR,PIPE7 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" textline " " bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" textline " " bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7E++0x01 line.word 0x00 "PIPE8CTR,PIPE8 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" textline " " bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" textline " " bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x80++0x01 line.word 0x00 "PIPE9CTR,PIPE9 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x82++0x01 line.word 0x00 "PIPEACTR,PIPEA Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x84++0x01 line.word 0x00 "PIPEBCTR,PIPEB Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x86++0x01 line.word 0x00 "PIPECCTR,PIPEC Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x88++0x01 line.word 0x00 "PIPEDCTR,PIPED Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x8A++0x01 line.word 0x00 "PIPEECTR,PIPEE Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x8C++0x01 line.word 0x00 "PIPEFCTR,PIPEF Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x90++0x03 line.word 0x00 "PIP1TRE,Pipe 1 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE1TRN,Pipe 1 Transaction Counter Register" group.word 0x94++0x03 line.word 0x00 "PIP2TRE,Pipe 2 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE2TRN,Pipe 2 Transaction Counter Register" group.word 0x98++0x03 line.word 0x00 "PIP3TRE,Pipe 3 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE3TRN,Pipe 3 Transaction Counter Register" group.word 0x9C++0x03 line.word 0x00 "PIP4TRE,Pipe 4 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE4TRN,Pipe 4 Transaction Counter Register" group.word 0xA0++0x03 line.word 0x00 "PIP5TRE,Pipe 5 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE5TRN,Pipe 5 Transaction Counter Register" group.word 0xA4++0x03 line.word 0x00 "PIPBTRE,Pipe B Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEBTRN,Pipe B Transaction Counter Register" group.word 0xA8++0x03 line.word 0x00 "PIPCTRE,Pipe C Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPECTRN,Pipe C Transaction Counter Register" group.word 0xAC++0x03 line.word 0x00 "PIPDTRE,Pipe D Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEDTRN,Pipe D Transaction Counter Register" group.word 0xB0++0x03 line.word 0x00 "PIPETRE,Pipe E Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEETRN,Pipe E Transaction Counter Register" group.word 0xB4++0x03 line.word 0x00 "PIPFTRE,Pipe F Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEFTRN,Pipe F Transaction Counter Register" group.word 0xB8++0x03 line.word 0x00 "PIP9TRE,Pipe 9 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE9TRN,Pipe 9 Transaction Counter Register" group.word 0xBC++0x03 line.word 0x00 "PIPATRE,Pipe A Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEATRN,Pipe A Transaction Counter Register" tree.end textline " " group.word 0x102++0x01 line.word 0x00 "LPSTS,Low Power Status Register" bitfld.word 0x00 14. " SUSPM ,SuspendM control" "Suspend mode,Normal mode" sif (cpu()!="R8A77470")&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450")&&!cpuis("R7S7210*")&&!cpuis("R8A77440") group.word 0x140++0x01 line.word 0x00 "BCCTRL,Battery Charging Control Register" sif ((cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951")||cpuis("R8A77951-*"))) rbitfld.word 0x00 9. " PRTBLDET ,PRTBLDET status" "Low,High" rbitfld.word 0x00 8. " CHGDET ,CHGDET status" "Low,High" else bitfld.word 0x00 9. " PRTBLDET ,PRTBLDET status" "Low,High" bitfld.word 0x00 8. " CHGDET ,CHGDET status" "Low,High" endif bitfld.word 0x00 5. " DCPEN ,DCPEN control" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " VDMSRCEN ,VDM_SRC control" "Disabled,Enabled" bitfld.word 0x00 3. " PRTDETBLEN ,PRTBLDET control" "Disabled,Enabled" bitfld.word 0x00 2. " VDPSRCEN ,VDP_SRC control" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " CHGDETEN ,CHGDET control" "Enabled,Disabled" bitfld.word 0x00 0. " IDPSRCEN ,IDP_SRC control" "Disabled,Enabled" endif sif (cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))) group.long 0x184++0x03 line.long 0x00 "UGCTRL2,USB General Control Register 2" bitfld.long 0x00 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,HS USB,USB OTG" elif (cpuis("R8A77995*")||cpuis("R8A77990*")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440")) group.long 0x180++0x07 line.long 0x00 "UGCTRL,USB General Control Register" bitfld.long 0x00 2. " CONNECT ,USB connect control" "Disabled,Enabled" bitfld.long 0x00 0. " PLLRESET ,PLL reset" "Disabled,Enabled" line.long 0x04 "UGCTRL2,USB General Control Register 2" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x04 31. " USB2SEL ,USB2.0 Ch.2 selection" "EHCI/OHCI,USB3.0" bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,,HS USB" else bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,,HS USB" endif rgroup.long 0x188++0x03 line.long 0x00 "UGSTS,USB General Status Register" sif !cpuis("R7S7210*")&&!cpuis("R8A77440") bitfld.long 0x00 8. " LOCK ,Embedded USB PHY PLL lock status" "Completed,Halted" else bitfld.long 0x00 8. " LOCK ,Embedded USB PHY PLL lock status" "Halted,Completed" endif sif cpuis("R7S7210*") group.long 0x18C++0x03 line.long 0x00 "UPHYSET,USB PHY Setting Register" bitfld.long 0x00 4.--5. " CLKSEL ,USB reference clock selection" ",48 MHz,,24 MHz" endif elif cpu()=="R8A77470" group.long 0x180++0x07 line.long 0x00 "UGCTRL,USB General Control Register" bitfld.long 0x00 0. " PLLRESET ,PLL reset" "Disabled,Enabled" line.long 0x04 "UGCTRL2,USB General Control Register 2" bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,HS USB," else group.long 0x180++0x07 line.long 0x00 "UGCTRL,USB General Control Register" bitfld.long 0x00 2. " CONNECT ,USB connect control" "Disabled,Enabled" bitfld.long 0x00 0. " PLLRESET ,PLL reset" "Disabled,Enabled" line.long 0x04 "UGCTRL2,USB General Control Register 2" rbitfld.long 0x04 31. " USB2SEL ,USB2.0 Ch.2 selection" "EHCI/OHCI,USB3.0" bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,,HS USB" group.long 0x190++0x03 line.long 0x00 "UGSTS,USB General Status Register" bitfld.long 0x00 0.--1. " LOCK ,Embedded USB PHY PLL lock status" "Halted,Halted,Halted,Completed" endif width 0x0B tree.end tree.open "USBDMAC (USB High-Speed DMAC)" tree "USBDMAC 0" base ad:0xE65A0000 width 22. group.long 0x00++0x03 line.long 0x00 "USBDMA0_VCR,DMA 0 VCR Register" bitfld.long 0x00 1. " ERR_SNT ,Send error response" "No error,Error" bitfld.long 0x00 0. " ERR_RCV ,Receive error response" "No error,Error" group.long 0x08++0x03 line.long 0x00 "USBDMA0_SWR,DMA 0 Software Reset Register" bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" rgroup.long 0x10++0x03 line.long 0x00 "USBDMA0_DMICR,DMA 0 Interrupt Source Register" bitfld.long 0x00 31. " SHBSY1 ,CH1 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 23. " SHBSY0 ,CH0 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 16. " AE ,Address error interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " TR1 ,CH1 transaction end: receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 13. " BUF1 ,CH1 buffer end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 12. " RW1 ,CH1 final buffer access detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " NULL1 ,CH1 NULL packet receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 10. " TO1 ,CH1 timeout interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 9. " SP1 ,CH1 short packet receive interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " TE1 ,CH1 transfer end interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 6. " TR0 ,CH0 transaction end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 5. " BUF0 ,CH0 buffer end detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RW0 ,CH0 RWEND receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 3. " NULL0 ,CH0 NULL receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 2. " TO0 ,CH0 timeout interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SP0 ,CH0 short packet receive interrupt Source" "No interrupt,Interrupt" bitfld.long 0x00 0. " TE0 ,CH0 transfer end interrupt source" "No interrupt,Interrupt" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65A0000)+0x20+0x14)&0xC0)==0x00) group.long 0x20++0x07 line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "USBDMA0_TCR_0,DMA 0 Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x20++0x0B line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" line.long 0x08 "USBDMA0_TCR_0,DMA 0 Transfer Count Register 0" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x20+0x0C)++0x03 line.long 0x00 "USBDMA0_TOCNTR_0,DMA 0 Timeout Count Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x20+0x10)++0x0B line.long 0x00 "USBDMA0_TOCSTR_0,DMA 0 Timeout Constant Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA0_CHCR_0,DMA 0 Channel Control Register 0" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA0_TEND_0,DMA 0 Final Transaction Valid Data Transfer Enable Register 0" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65A0000)+0x40+0x14)&0xC0)==0x00) group.long 0x40++0x07 line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" endif group.long (0x40+0x08)++0x03 line.long 0x00 "USBDMA0_TCR_1,DMA 0 Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x40++0x0B line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" line.long 0x08 "USBDMA0_TCR_1,DMA 0 Transfer Count Register 1" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x40+0x0C)++0x03 line.long 0x00 "USBDMA0_TOCNTR_1,DMA 0 Timeout Count Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x40+0x10)++0x0B line.long 0x00 "USBDMA0_TOCSTR_1,DMA 0 Timeout Constant Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA0_CHCR_1,DMA 0 Channel Control Register 1" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA0_TEND_1,DMA 0 Final Transaction Valid Data Transfer Enable Register 1" group.long 0x60++0x03 line.long 0x00 "USBDMA0_DMAOR,DMA 0 Operation Register" bitfld.long 0x00 6. " TID1 ,Response error channel 1 identity information" "No error,Error" bitfld.long 0x00 5. " TID0 ,Response error channel 0 identity information" "No error,Error" bitfld.long 0x00 4. " RM ,Response error mask mode" "Not masked,Masked" textline " " bitfld.long 0x00 2.--3. " PR ,Priority mode" "CH0 > CH1,CH1 > CH0,?..." bitfld.long 0x00 1. " AE ,Address error flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" width 0x0B tree.end tree "USBDMAC 1" base ad:0xE65B0000 width 22. group.long 0x00++0x03 line.long 0x00 "USBDMA1_VCR,DMA 1 VCR Register" bitfld.long 0x00 1. " ERR_SNT ,Send error response" "No error,Error" bitfld.long 0x00 0. " ERR_RCV ,Receive error response" "No error,Error" group.long 0x08++0x03 line.long 0x00 "USBDMA1_SWR,DMA 1 Software Reset Register" bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" rgroup.long 0x10++0x03 line.long 0x00 "USBDMA1_DMICR,DMA 1 Interrupt Source Register" bitfld.long 0x00 31. " SHBSY1 ,CH1 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 23. " SHBSY0 ,CH0 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 16. " AE ,Address error interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " TR1 ,CH1 transaction end: receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 13. " BUF1 ,CH1 buffer end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 12. " RW1 ,CH1 final buffer access detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " NULL1 ,CH1 NULL packet receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 10. " TO1 ,CH1 timeout interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 9. " SP1 ,CH1 short packet receive interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " TE1 ,CH1 transfer end interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 6. " TR0 ,CH0 transaction end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 5. " BUF0 ,CH0 buffer end detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RW0 ,CH0 RWEND receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 3. " NULL0 ,CH0 NULL receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 2. " TO0 ,CH0 timeout interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SP0 ,CH0 short packet receive interrupt Source" "No interrupt,Interrupt" bitfld.long 0x00 0. " TE0 ,CH0 transfer end interrupt source" "No interrupt,Interrupt" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65B0000)+0x20+0x14)&0xC0)==0x00) group.long 0x20++0x07 line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "USBDMA1_TCR_0,DMA 1 Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x20++0x0B line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" line.long 0x08 "USBDMA1_TCR_0,DMA 1 Transfer Count Register 0" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x20+0x0C)++0x03 line.long 0x00 "USBDMA1_TOCNTR_0,DMA 1 Timeout Count Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x20+0x10)++0x0B line.long 0x00 "USBDMA1_TOCSTR_0,DMA 1 Timeout Constant Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA1_CHCR_0,DMA 1 Channel Control Register 0" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA1_TEND_0,DMA 1 Final Transaction Valid Data Transfer Enable Register 0" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65B0000)+0x40+0x14)&0xC0)==0x00) group.long 0x40++0x07 line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" endif group.long (0x40+0x08)++0x03 line.long 0x00 "USBDMA1_TCR_1,DMA 1 Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x40++0x0B line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" line.long 0x08 "USBDMA1_TCR_1,DMA 1 Transfer Count Register 1" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x40+0x0C)++0x03 line.long 0x00 "USBDMA1_TOCNTR_1,DMA 1 Timeout Count Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x40+0x10)++0x0B line.long 0x00 "USBDMA1_TOCSTR_1,DMA 1 Timeout Constant Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA1_CHCR_1,DMA 1 Channel Control Register 1" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA1_TEND_1,DMA 1 Final Transaction Valid Data Transfer Enable Register 1" group.long 0x60++0x03 line.long 0x00 "USBDMA1_DMAOR,DMA 1 Operation Register" bitfld.long 0x00 6. " TID1 ,Response error channel 1 identity information" "No error,Error" bitfld.long 0x00 5. " TID0 ,Response error channel 0 identity information" "No error,Error" bitfld.long 0x00 4. " RM ,Response error mask mode" "Not masked,Masked" textline " " bitfld.long 0x00 2.--3. " PR ,Priority mode" "CH0 > CH1,CH1 > CH0,?..." bitfld.long 0x00 1. " AE ,Address error flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" width 0x0B tree.end tree "DDM (Descriptor DMAC)" base ad:0xE65C0000 width 13. group.long 0x08++0x03 line.long 0x00 "DDIREQMSK,DDM Interrupt Source Mask Register" bitfld.long 0x00 23. " CM8 ,Interrupt output by CH8 counter consistent" "Masked,Not masked" bitfld.long 0x00 22. " CM7 ,Interrupt output by CH7 counter consistent" "Masked,Not masked" bitfld.long 0x00 21. " CM6 ,Interrupt output by CH6 counter consistent" "Masked,Not masked" textline " " bitfld.long 0x00 20. " CM5 ,Interrupt output by CH5 counter consistent" "Masked,Not masked" bitfld.long 0x00 19. " CM4 ,Interrupt output by CH4 counter consistent" "Masked,Not masked" bitfld.long 0x00 18. " CM3 ,Interrupt output by CH3 counter consistent" "Masked,Not masked" textline " " bitfld.long 0x00 17. " CM2 ,Interrupt output by CH2 counter consistent" "Masked,Not masked" bitfld.long 0x00 16. " CM1 ,Interrupt output by CH1 counter consistent" "Masked,Not masked" bitfld.long 0x00 15. " ERR8 ,Interrupt output by CH8 DDM_ERR" "Masked,Not masked" textline " " bitfld.long 0x00 14. " END8 ,Interrupt output by CH8 DDM_END" "Masked,Not masked" bitfld.long 0x00 13. " ERR7 ,Interrupt output by CH7 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 12. " END7 ,Interrupt output by CH7 DDM_END" "Masked,Not masked" textline " " bitfld.long 0x00 11. " ERR6 ,Interrupt output by CH6 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 10. " END6 ,Interrupt output by CH6 DDM_END" "Masked,Not masked" bitfld.long 0x00 9. " ERR5 ,Interrupt output by CH5 DDM_ERR" "Masked,Not masked" textline " " bitfld.long 0x00 8. " END5 ,Interrupt output by CH5 DDM_END" "Masked,Not masked" bitfld.long 0x00 7. " ERR4 ,Interrupt output by CH4 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 6. " END4 ,Interrupt output by CH4 DDM_END" "Masked,Not masked" textline " " bitfld.long 0x00 5. " ERR3 ,Interrupt output by CH3 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 4. " END3 ,Interrupt output by CH3 DDM_END" "Masked,Not masked" bitfld.long 0x00 3. " ERR2 ,Interrupt output by CH2 DDM_ERR" "Masked,Not masked" textline " " bitfld.long 0x00 2. " END2 ,Interrupt output by CH2 DDM_END" "Masked,Not masked" bitfld.long 0x00 1. " ERR1 ,Interrupt output by CH1 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 0. " END1 ,Interrupt output by CH1 DDM_END" "Masked,Not masked" rgroup.long 0x0C++0x03 line.long 0x00 "DDIREQSTA,DDM Interrupt Source Register" bitfld.long 0x00 23. " CM8 ,Interrupt output by CH8 counter consistent" "Not output,Output" bitfld.long 0x00 22. " CM7 ,Interrupt output by CH7 counter consistent" "Not output,Output" bitfld.long 0x00 21. " CM6 ,Interrupt output by CH6 counter consistent" "Not output,Output" textline " " bitfld.long 0x00 20. " CM5 ,Interrupt output by CH5 counter consistent" "Not output,Output" bitfld.long 0x00 19. " CM4 ,Interrupt output by CH4 counter consistent" "Not output,Output" bitfld.long 0x00 18. " CM3 ,Interrupt output by CH3 counter consistent" "Not output,Output" textline " " bitfld.long 0x00 17. " CM2 ,Interrupt output by CH2 counter consistent" "Not output,Output" bitfld.long 0x00 16. " CM1 ,Interrupt output by CH1 counter consistent" "Not output,Output" bitfld.long 0x00 15. " ERR8 ,Interrupt output by CH8 DDM_ERR" "Not output,Output" textline " " bitfld.long 0x00 14. " END8 ,Interrupt output by CH8 DDM_END" "Not output,Output" bitfld.long 0x00 13. " ERR7 ,Interrupt output by CH7 DDM_ERR" "Not output,Output" bitfld.long 0x00 12. " END7 ,Interrupt output by CH7 DDM_END" "Not output,Output" textline " " bitfld.long 0x00 11. " ERR6 ,Interrupt output by CH6 DDM_ERR" "Not output,Output" bitfld.long 0x00 10. " END6 ,Interrupt output by CH6 DDM_END" "Not output,Output" bitfld.long 0x00 9. " ERR5 ,Interrupt output by CH5 DDM_ERR" "Not output,Output" textline " " bitfld.long 0x00 8. " END5 ,Interrupt output by CH5 DDM_END" "Not output,Output" bitfld.long 0x00 7. " ERR4 ,Interrupt output by CH4 DDM_ERR" "Not output,Output" bitfld.long 0x00 6. " END4 ,Interrupt output by CH4 DDM_END" "Not output,Output" textline " " bitfld.long 0x00 5. " ERR3 ,Interrupt output by CH3 DDM_ERR" "Not output,Output" bitfld.long 0x00 4. " END3 ,Interrupt output by CH3 DDM_END" "Not output,Output" bitfld.long 0x00 3. " ERR2 ,Interrupt output by CH2 DDM_ERR" "Not output,Output" textline " " bitfld.long 0x00 2. " END2 ,Interrupt output by CH2 DDM_END" "Not output,Output" bitfld.long 0x00 1. " ERR1 ,Interrupt output by CH1 DDM_ERR" "Not output,Output" bitfld.long 0x00 0. " END1 ,Interrupt output by CH1 DDM_END" "Not output,Output" tree.open "Channel 1" group.long 0x38++0x07 line.long 0x00 "DDINTMSK11,DDM CH1 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK12,DDM CH1 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x38+0x18)++0x07 line.long 0x00 "DDPTR1,DDM CH1 Descriptor Pointer" line.long 0x04 "DDCTRL1,DDM CH1 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 2" group.long 0x68++0x07 line.long 0x00 "DDINTMSK21,DDM CH2 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK22,DDM CH2 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x68+0x18)++0x07 line.long 0x00 "DDPTR2,DDM CH2 Descriptor Pointer" line.long 0x04 "DDCTRL2,DDM CH2 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 3" group.long 0x98++0x07 line.long 0x00 "DDINTMSK31,DDM CH3 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK32,DDM CH3 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x98+0x18)++0x07 line.long 0x00 "DDPTR3,DDM CH3 Descriptor Pointer" line.long 0x04 "DDCTRL3,DDM CH3 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 4" group.long 0xC8++0x07 line.long 0x00 "DDINTMSK41,DDM CH4 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK42,DDM CH4 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0xC8+0x18)++0x07 line.long 0x00 "DDPTR4,DDM CH4 Descriptor Pointer" line.long 0x04 "DDCTRL4,DDM CH4 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 5" group.long 0xF8++0x07 line.long 0x00 "DDINTMSK51,DDM CH5 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK52,DDM CH5 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0xF8+0x18)++0x07 line.long 0x00 "DDPTR5,DDM CH5 Descriptor Pointer" line.long 0x04 "DDCTRL5,DDM CH5 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 6" group.long 0x128++0x07 line.long 0x00 "DDINTMSK61,DDM CH6 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK62,DDM CH6 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x128+0x18)++0x07 line.long 0x00 "DDPTR6,DDM CH6 Descriptor Pointer" line.long 0x04 "DDCTRL6,DDM CH6 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 7" group.long 0x158++0x07 line.long 0x00 "DDINTMSK71,DDM CH7 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK72,DDM CH7 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x158+0x18)++0x07 line.long 0x00 "DDPTR7,DDM CH7 Descriptor Pointer" line.long 0x04 "DDCTRL7,DDM CH7 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 8" group.long 0x188++0x07 line.long 0x00 "DDINTMSK81,DDM CH8 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK82,DDM CH8 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x188+0x18)++0x07 line.long 0x00 "DDPTR8,DDM CH8 Descriptor Pointer" line.long 0x04 "DDCTRL8,DDM CH8 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end width 0x0B tree.end tree.end tree "USB 3.0 Host Controller" base ad:0xEE000000 width 16. tree "AXI Registers" group.long 0x100++0x03 line.long 0x00 "CR,AXI Host Control Register" bitfld.long 0x00 16. " B3_PHYRST ,Bit for reset USB3.0 PHY" "Normal condition,Reset condition" bitfld.long 0x00 8. " SYS_SUSPEND ,Suspend USB2.0 PHY (PLL stops) by system" "Normal condition,Suspend condition" bitfld.long 0x00 0. " B2_PHYRST ,Bit for reset USB2.0 PHY" "Normal condition,Reset condition" rgroup.long 0x104++0x03 line.long 0x00 "CSR,AXI Host Control Status Register" bitfld.long 0x00 24. " SS_DISABLE ,SuperSpeed(SS) Port disable" "No,Yes" bitfld.long 0x00 16. " B3_PLL_ACTIVE ,USB3PHY PLL lock" "Not locked,Locked" bitfld.long 0x00 0. " B2_PLL_ACTIVE ,USB2PHY PLL lock" "Not locked,Locked" rgroup.byte 0x204++0x00 line.byte 0x00 "RID,Revision ID" rgroup.tbyte 0x205++0x02 line.tbyte 0x00 "CC,Pseudo PCI Class Code" group.byte 0x210++0x01 line.byte 0x00 "SBRN,Serial Bus Release Number Register" line.byte 0x01 "FLADJ,Frame Length Adjustment Register" bitfld.byte 0x01 0.--5. " FLADJ ,Adjust SOF counter clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x220++0x07 line.long 0x00 "HI,Host Interrupt Register" rbitfld.long 0x00 4. " SMI_STA ,SMI interrupt status bit" "Not occurred,Occurred" eventfld.long 0x00 3. " LTM_STA ,LTM interrupt status bit" "Not occurred,Occurred" rbitfld.long 0x00 2. " HSE_STA ,HSE interrupt status bit" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " PME_STA ,PME interrupt status bit" "Not occurred,Occurred" rbitfld.long 0x00 0. " XHC_STA ,xHCI interrupt status bit" "Not occurred,Occurred" line.long 0x04 "HIE,Host Interrupt Enable" bitfld.long 0x04 4. " SMI_ENA ,SMI interrupt status bit" "Disabled,Enabled" bitfld.long 0x04 3. " LTM_ENA ,LTM interrupt status bit" "Disabled,Enabled" bitfld.long 0x04 2. " HSE_ENA ,HSE interrupt Status bit" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " PME_ENA ,PME interrupt status bit" "Disabled,Enabled" bitfld.long 0x04 0. " XHC_ENA ,xHCI interrupt status bit" "Disabled,Enabled" rgroup.long 0x228++0x03 line.long 0x00 "LTR,LTR Register" bitfld.long 0x00 31. " NS_REQ ,Requirement (No-Snoop)" "0,1" bitfld.long 0x00 26.--28. " NS_LS ,Latency scale (No-Snoop)" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 16.--25. 1. " NS_LV ,Latency value (No-Snoop)" textline " " bitfld.long 0x00 15. " S_REQ ,Requirement (Snoop)" "0,1" bitfld.long 0x00 10.--12. " S_LS ,Latency scale (Snoop)" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " S_LV ,Latency value (Snoop)" group.long 0x230++0x03 line.long 0x00 "BC,Battery Charging Register" bitfld.long 0x00 24. " PTPWER_CTRL ,PortPowerControl(PPC) value" "Low,High" bitfld.long 0x00 16.--17. " RPF ,Renesas private bit" "0,?..." bitfld.long 0x00 8.--10. " LCLK_NONSTOP_FREQ ,NONSTOP_CLK frequency" "Default,12MHz,24MHz,30MHz,48MHz,?..." textline " " bitfld.long 0x00 0.--3. " BC_MODE ,Battery charge function mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x240++0x03 line.long 0x00 "FWV,FW Version Register" group.long 0x250++0x03 line.long 0x00 "FWDCS,FW Download Control & Status Register" bitfld.long 0x00 9. " SET_DATA1 ,Set data 1" "No effect,Set" bitfld.long 0x00 8. " SET_DATA0 ,Set data 0" "No effect,Set" rbitfld.long 0x00 4.--6. " RESULT_CODE ,Result code" "Invalid,Success,Error,?..." textline " " bitfld.long 0x00 1. " BIOS_DOWNLOAD_LOCK ,BIOS download lock" "No effect,Locked" bitfld.long 0x00 0. " BIOS_DOWNLOAD_ENABLE ,BIOS download enable" "Disabled,Enabled" group.long 0x258++0x07 line.long 0x00 "FWDATA0,FW Data Register 0" line.long 0x04 "FWDATA1,FW Data Register 1" sif (cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77965*"))||(cpuis("R8A77960*")))||(cpu()=="R8A77420")||(cpu()=="R8A77440")||(cpu()=="R8A77450") rgroup.long 0x288++0x07 line.long 0x00 "RP0,Renesas Private Register 0" line.long 0x04 "RP1,Renesas Private Register 1" else group.long 0x288++0x07 line.long 0x00 "RP0,Renesas Private Register 0" hexmask.long.byte 0x00 24.--31. 1. " RPF2 ,Renesas private field 2" bitfld.long 0x00 16.--18. " RPF1 ,Renesas private field 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. " RPF0 ,Renesas private field 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RP1,Renesas Private Register 1" hexmask.long.word 0x04 16.--27. 1. " RPF4 ,Renesas private field 4" bitfld.long 0x04 8.--11. " RPF3 ,Renesas private field 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x290++0x0B line.long 0x00 "CC3,Core Control 3 Register" bitfld.long 0x00 24. " RPB1 ,Renesas private bit 1" "0,1" rbitfld.long 0x00 16. " RPB0 ,Renesas private bit 0" "0,1" bitfld.long 0x00 1. " PMC_MODE1 ,PMC mode 1" "Not valid,Valid" textline " " bitfld.long 0x00 0. " PMC_MODE0 ,PMC mode 0" "Not valid,Valid" line.long 0x04 "RP2,Renesas Private Register 2" line.long 0x08 "VENDOR_CON_SET,UTMI Plus Vendor Control Interface Set Register" hexmask.long.byte 0x08 16.--23. 1. " VWDATA ,Vendor write data" bitfld.long 0x08 4.--7. " VCONTROL ,Vendor control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0. " VCWEN ,VWDATA enable" "Disabled,Enabled" rgroup.long 0x29C++0x03 line.long 0x00 "VENDOR_CON_STA,UTMI Plus Vendor Control Interface Status Register" hexmask.long.byte 0x00 0.--7. 1. " VSTATUS ,Vendor status" sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))) group.long 0xA44++0x07 line.long 0x00 "LCLKSEL,LCLK Select Register" bitfld.long 0x00 18. " LSEL ,LCLK selection" "Enabled,Disabled" line.long 0x04 "USBCONF1,USB3.0 Configuration Register 1" group.long 0xA5C++0x03 line.long 0x00 "USBCONF2,USB3.0 Configuration Register 2" group.long 0xAA8++0x03 line.long 0x00 "USBCONF3,USB3.0 Configuration Register 3" hexmask.long 0x00 4.--31. 1. " U3CFG3_HI ,U3CFG3_HI" bitfld.long 0x00 3. " COMTERM ,Internal reference clock terminate control" "Off,On" bitfld.long 0x00 0.--2. " U3CFG3_LO ,U3CFG3_LO" "0,1,2,3,4,5,6,7" group.long 0xAB0++0x03 line.long 0x00 "USBRXP,USB3.0 RX Polarity" bitfld.long 0x00 21. " RXPOL ,Polarity inversion setting of RX" "Disabled,Enabled" group.long 0xAB8++0x03 line.long 0x00 "USBTXP,USB3.0 TX Polarity" bitfld.long 0x00 4. " TXPOL ,Polarity inversion setting of TX" "Disabled,Enabled" endif tree.end width 14. tree "xHCI Registers" rgroup.byte 0x00++0x00 "Host Controller Capability Registers" line.byte 0x00 "CAPLENGTH,Capability Register Length" rgroup.word 0x02++0x01 line.word 0x00 "HCIVERSION,Host Controller Interface Version Number" hexmask.word.byte 0x00 8.--15. 1. " MAJV ,Major version" hexmask.word.byte 0x00 0.--7. 1. " MINV ,Minor version" rgroup.long 0x04++0x17 line.long 0x00 "HCSPARAMS1,Structural Parameters 1 Register" hexmask.long.byte 0x00 24.--31. 1. " MAXPORTS ,Number of ports" hexmask.long.word 0x00 8.--17. 1. " MAXINTERS ,Number of interrupters" hexmask.long.byte 0x00 0.--7. 1. " MAXSLOTS ,Number of device slots" line.long 0x04 "HCSPARAMS2,Structural Parameters 2 Register" bitfld.long 0x04 27.--31. " MSB ,Max scratchpad buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 26. " SPR ,Scratchpad restore" "Not used,Used" bitfld.long 0x04 4.--7. " ERSTMAX ,Event ring segment table max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " IST ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HCSPARAMS3,Structural Parameters 3 Register" hexmask.long.word 0x08 16.--31. 1. " U2DEL ,U2 device exit latency" hexmask.long.byte 0x08 0.--7. 1. " U1DEL ,U1 device exit latency" line.long 0x0C "HCCPARAMS,Capability Parameters Register" hexmask.long.word 0x0C 16.--31. 1. " XECP ,xHCI extended capabilities pointer" bitfld.long 0x0C 12.--15. " MAXPSASIZE ,Maximum primary stream array size" ",2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15,2^16" bitfld.long 0x0C 8. " PAE ,Parse all event data" "Just first,All" textline " " bitfld.long 0x0C 7. " NSS ,No secondary SID support" "Not supported,Supported" bitfld.long 0x0C 6. " LTC ,Latency tolerance messaging capability" "Not supported,Supported" bitfld.long 0x0C 5. " LHRC ,Light HC reset capability " "Not supported,Supported" textline " " bitfld.long 0x0C 4. " PIND ,Port indicators" "Not contained,Port status/control" bitfld.long 0x0C 3. " PPC ,Port power control" "Not contained,Contained" bitfld.long 0x0C 2. " CSZ ,Context size" "32-byte,64-byte" textline " " bitfld.long 0x0C 1. " BNC ,BW negotiation capability" "Not supported,Supported" bitfld.long 0x0C 0. " AC64 ,64-bit addressing capability" "32-bit,64-bit" line.long 0x10 "DBOFF,Doorbell Offset" hexmask.long 0x10 2.--31. 0x04 " DAOFF ,Doorbell array offset" line.long 0x14 "RSTOFF,Runtime Register Space Offset" hexmask.long 0x14 5.--31. 1. " RRSOFF ,Runtime register space offset" group.long 0x20++0x07 "Host Controller Operational Registers" line.long 0x00 "USBCMD,USB Command Register" bitfld.long 0x00 11. " EU3S ,Enable U3 MFINDEX stop" "Disabled,Enabled" bitfld.long 0x00 10. " EWE ,Enable wrap event" "Disabled,Enabled" bitfld.long 0x00 9. " CRS ,Controller restore state" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CSS ,Controller save state" "Disabled,Enabled" bitfld.long 0x00 7. " LHCRST ,Light host controller reset" "Completed,Ongoing" bitfld.long 0x00 3. " HSEE ,Host system error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " INTE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " HCRST ,Host controller reset" "No reset,Reset" bitfld.long 0x00 0. " R/S ,Run/Stop" "Stop,Run" line.long 0x04 "USBSTS,USB Status Register" rbitfld.long 0x04 12. " HCE ,Host controller error" "No error,Error" rbitfld.long 0x04 11. " CNR ,Controller not ready" "Ready,Not ready" eventfld.long 0x04 10. " SRE ,Save/Restore error" "No error,Error" textline " " rbitfld.long 0x04 9. " RSS ,Restore state status" "Not occurred,Occurred" rbitfld.long 0x04 8. " SSS ,Save state status" "Low,High" eventfld.long 0x04 4. " PCD ,Port change detect" "Not detected,Detected" textline " " eventfld.long 0x04 3. " EINT ,Event interrupt" "No interrupt,Interrupt" eventfld.long 0x04 2. " HSE ,Host system error" "No error,Error" rbitfld.long 0x04 0. " HCH ,HCHalted" "Not halted,Halted" rgroup.long 0x28++0x03 line.long 0x00 "PAGESIZE,Page Size Register" hexmask.long.word 0x00 0.--15. 1. " PAGESIZE ,xHCs system page size" group.long 0x34++0x03 line.long 0x00 "DNCTRL,Device Notification Control Register" bitfld.long 0x00 15. " N15 ,Notification enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " N14 ,Notification enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " N13 ,Notification enable 13" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " N12 ,Notification enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " N11 ,Notification enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " N10 ,Notification enable 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " N9 ,Notification enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " N8 ,Notification enable 8" "Disabled,Enabled" bitfld.long 0x00 7. " N7 ,Notification enable 7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " N6 ,Notification enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " N5 ,Notification enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " N4 ,Notification enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " N3 ,Notification enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " N2 ,Notification enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " N1 ,Notification enable 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " N0 ,Notification enable 0" "Disabled,Enabled" group.quad 0x38++0x07 line.quad 0x00 "CRCR,Command Ring Register" hexmask.quad 0x00 6.--63. 0x40 " CRP ,Command ring pointer" rbitfld.quad 0x00 3. " CRR ,Command ring running" "No,Yes" bitfld.quad 0x00 2. " CA ,Command abort" "Not aborted,Aborted" textline " " bitfld.quad 0x00 1. " CS ,Command stop" "Not stopped,Stopped" bitfld.quad 0x00 0. " RCS ,Ring cycle state" "Low,High" group.quad 0x50++0x07 line.quad 0x00 "DCBAPP,Device Context Bass Address Array Register" hexmask.quad 0x00 6.--63. 0x40 " DCBAP ,Device context base address array pointer" group.long 0x58++0x03 line.long 0x00 "CONFIG,xHC Configuration Register" hexmask.long.byte 0x00 0.--7. 1. " MAXSLOTSEN ,Max device slots enable" group.long 0x420++0x07 "Host Controller Port Register Set 1" line.long 0x00 "PORTSC1,USB 3.0 Port Status 1 Register" bitfld.long 0x00 31. " WPR ,Warm port reset" "No effect,Reset" rbitfld.long 0x00 30. " DR ,Device removable" "Removable,Non-removable" bitfld.long 0x00 27. " WOE ,Wake on over-current enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " WDE ,Wake on Disconnect enable" "Disabled,Enabled" bitfld.long 0x00 25. " WCE ,Wake on connect enable" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,Cold Attach Status" "Low,High" textline " " eventfld.long 0x00 23. " CEC ,Port Config Error change" "No error,Error" eventfld.long 0x00 22. " PLC ,Port link state change" "Not changed,Changed" eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" textline " " eventfld.long 0x00 20. " OCC ,Over-current change" "Not changed,Changed" eventfld.long 0x00 19. " WRC ,Warm port reset change" "Not changed,Changed" eventfld.long 0x00 18. " PEC ,Port Enable/Disable change" "Not changed,Changed" textline " " eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 16. " LWS ,Port link state write strobe" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" textline " " rbitfld.long 0x00 10.--13. " PS ,Port speed" "Undefined,Full-speed,Low-speed,High-speed,SuperSpeed,,,,,,,,,,,Unknown" bitfld.long 0x00 9. " PP ,Port power" "Off,On" bitfld.long 0x00 5.--8. " PLS ,Port link state (Write/Read)" "U0/U0,U1/U1,U2/U2,U3/U3,Ignored/Disabled,Ignored/RxDetect,Ignored/Inactive,Ignored/Polling,Ignored/Recovery,Ignored/Hot Reset,Ignored/Compliance,Ignored/Loopback,?..." textline " " bitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" rbitfld.long 0x00 3. " OCA ,Over-current active" "Activated,Not activated" eventfld.long 0x00 1. " PED ,Port Enable/Disable" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current connect status" "Not present,Present" line.long 0x04 "PORTMSC1,Port PM Status and Control 1 Register" bitfld.long 0x04 16. " FLA ,Force link PM accept" "Disabled,Enabled" hexmask.long.byte 0x04 8.--15. 1. " U2T ,U2 timeout" hexmask.long.byte 0x04 0.--7. 1. " U1T ,U1 timeout" rgroup.long 0x428++0x03 line.long 0x00 "PORTLI1,Port Link Info 1" hexmask.long.word 0x00 0.--15. 1. " LEC ,Link error count" group.long 0x430++0x07 "Host Controller Port Register Set 2" line.long 0x00 "PORTSC2,USB 3.0 Port Status 2 Register" rbitfld.long 0x00 30. " DR ,Device removable" "Removable,Non-removable" bitfld.long 0x00 27. " WOE ,Wake on over-current enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " WDE ,Wake on disconnect enable" "Disabled,Enabled" bitfld.long 0x00 25. " WCE ,Wake on connect enable" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,Cold attach status" "Low,High" textline " " eventfld.long 0x00 22. " PLC ,Port link state change" "Not changed,Changed" eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" textline " " eventfld.long 0x00 20. " OCC ,Over-current change" "Not changed,Changed" eventfld.long 0x00 18. " PEC ,Port Enable/Disable change" "Not changed,Changed" textline " " eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 16. " LWS ,Port link state write strobe" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" textline " " rbitfld.long 0x00 10.--13. " PS ,Port speed" "Undefined,Full-speed,Low-speed,High-speed,SuperSpeed,,,,,,,,,,,Unknown" bitfld.long 0x00 9. " PP ,Port power" "Off,On" bitfld.long 0x00 5.--8. " PLS ,Port link state (Write/Read)" "U0/U0,U1/U1,U2/U2,U3/U3,Ignored/Disabled,Ignored/RxDetect,Ignored/Inactive,Ignored/Polling,Ignored/Recovery,Ignored/Hot Reset,Ignored/Compliance,Ignored/Loopback,?..." textline " " bitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" rbitfld.long 0x00 3. " OCA ,Over-current active" "Activated,Not activated" eventfld.long 0x00 1. " PED ,Port Enable/Disable" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,Current connect status" "Not present,Present" line.long 0x04 "PORTMSC2,Port PM Status And Control 2 Register" bitfld.long 0x04 28.--31. " PTC ,Port test Control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,,,,,,,,,,Port Control Error" bitfld.long 0x04 16. " HLE ,Hardware LPM Enable" "Disabled,Enabled" hexmask.long.byte 0x04 8.--15. 1. " L1DS ,L1 Device Slot" textline " " bitfld.long 0x04 4.--7. " HIRD ,Host Initiated Resume Duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 3. " RWE ,Remote Wake Enable" "Disabled,Enabled" bitfld.long 0x04 0.--2. " L1S ,L1 Status" "Invalid,Success,Not yet,Not supported,Timeout/Error,?..." group.long 0x500++0x07 "USB Legacy Support Capability Registers" line.long 0x00 "USBLEGSUP,USB Legacy Support Capability Register" bitfld.long 0x00 24. " HCOSOS ,HC OS owned semaphore" "Disabled,Enabled" bitfld.long 0x00 16. " HCBOS ,HC BIOS owned semaphore" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "USBLEGCTLSTS,USB Legacy Support Control And Status Register" eventfld.long 0x04 31. " SB ,SMI on BAR" "Disabled,Enabled" eventfld.long 0x04 30. " SPC ,SMI on PCI command" "Disabled,Enabled" eventfld.long 0x04 29. " SOSOC ,SMI on OS ownership change" "Disabled,Enabled" textline " " rbitfld.long 0x04 20. " SHSE ,SMI on host system error" "Disabled,Enabled" rbitfld.long 0x04 16. " SEI ,SMI on event interrupt" "Disabled,Enabled" bitfld.long 0x04 15. " SBE ,SMI on BAR enable" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " SPCE ,SMI on PCI command enable" "Disabled,Enabled" bitfld.long 0x04 13. " SOSOCE ,SMI on OS ownership change enable" "Disabled,Enabled" bitfld.long 0x04 4. " SMIHSEE ,SMI on host system error enable " "Disabled,Enabled" textline " " bitfld.long 0x04 0. " USBSE ,USB SMI enable" "Disabled,Enabled" rgroup.long 0x510++0x0B "xHCI Supported Protocol Capability Register" line.long 0x00 "HCI3_SPC0,xHCI Supported Protocol Capability 0 Register (USB3.0)" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major revision" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor revision" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability location" textline " " hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "HCI3_SPC1,xHCI Supported Protocol Capability 1 Register (USB3.0)" line.long 0x08 "HCI3_SPC2,xHCI Supported Protocol Capability 2 Register (USB3.0)" bitfld.long 0x08 28.--31. " PSIC ,Product speed ID count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 8.--15. 1. " CPC ,Compatible port count" hexmask.long.byte 0x08 0.--7. 1. " CPO ,Compatible port offset" rgroup.long 0x520++0x03 line.long 0x00 "SUPERSPEED,PSI (SuperSpeed) Register" hexmask.long.word 0x00 16.--31. 1. " PSIM ,Product speed ID mantissa" bitfld.long 0x00 8. " PFD ,PSI full-duplex" "Half-duplex,Full-duplex" bitfld.long 0x00 6.--7. " PLT ,PSI type" "Symmetric,,Asymmetric Rx,Asymmetric Tx" textline " " bitfld.long 0x00 4.--5. " PSIE ,Protocol speed ID exponent" "b/s,Kb/s,Mb/s,Gb/s" bitfld.long 0x00 0.--3. " PSIV ,Protocol speed ID value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x528++0x0B line.long 0x00 "HCI2_SPC0,xHCI Supported Protocol Capability 0 Register (USB2.0)" hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major revision" hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor revision" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "HCI2_SPC1,xHCI Supported Protocol Capability 1 Register (USB2.0)" line.long 0x08 "HCI2_SPC2,xHCI Supported Protocol Capability 2 Register (USB2.0)" bitfld.long 0x08 28.--31. " PSIC ,Product speed ID count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 19. " HLC ,Hardware LPM capability" "Not supported,Supported" bitfld.long 0x08 18. " IHI ,Integrated hub implemented" "Not implemented,Implemented" textline " " bitfld.long 0x08 17. " HSO ,High-speed only" "Disabled,Enabled" hexmask.long.byte 0x08 8.--15. 1. " CPC ,Compatible port count" hexmask.long.byte 0x08 0.--7. 1. " CPO ,Compatible port offset" rgroup.long 0x538++0x0B line.long 0x00 "FULLSPEED,PSI Full Speed Register" hexmask.long.word 0x00 16.--31. 1. " PSIM ,Product speed ID mantissa" bitfld.long 0x00 8. " PFD ,PSI full-duplex" "Half-duplex,Full-duplex" bitfld.long 0x00 6.--7. " PLT ,PSI type" "Symmetric,,Asymmetric Rx,Asymmetric Tx" textline " " bitfld.long 0x00 4.--5. " PSIE ,Protocol speed ID exponent" "b/s,Kb/s,Mb/s,Gb/s" bitfld.long 0x00 0.--3. " PSIV ,Protocol speed ID value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "LOWSPEED,PSI Low Speed Register" hexmask.long.word 0x04 16.--31. 1. " PSIM ,Product speed ID mantissa" bitfld.long 0x04 8. " PFD ,PSI Full-duplex" "Half-duplex,Full-duplex" bitfld.long 0x04 6.--7. " PLT ,PSI type" "Symmetric,,Asymmetric Rx,Asymmetric Tx" textline " " bitfld.long 0x04 4.--5. " PSIE ,Protocol speed ID exponent" "b/s,Kb/s,Mb/s,Gb/s" bitfld.long 0x04 0.--3. " PSIV ,Protocol speed ID value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HIGHSPEED,PSI High Speed Register" hexmask.long.word 0x08 16.--31. 1. " PSIM ,Product Speed ID mantissa" bitfld.long 0x08 8. " PFD ,PSI Full-duplex" "Half-duplex,Full-duplex" bitfld.long 0x08 6.--7. " PLT ,PSI type" "Symmetric,,Asymmetric Rx,Asymmetric Tx" textline " " bitfld.long 0x08 4.--5. " PSIE ,Protocol speed ID exponent" "b/s,Kb/s,Mb/s,Gb/s" bitfld.long 0x08 0.--3. " PSIV ,Protocol speed ID value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x548++0x03 "xHCI Extended Power Management Capability Registers" line.long 0x00 "PMC0,Power Management Capability Register 0" bitfld.long 0x00 31. " PMESD3C ,PME support D3cold" "Disabled,Enabled" bitfld.long 0x00 30. " PMESD3H ,PME support D3hot" "Disabled,Enabled" bitfld.long 0x00 29. " PMESD2 ,PME support D2" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PMESD1 ,PME support D1" "Disabled,Enabled" bitfld.long 0x00 27. " PMESD0 ,PME support D0" "Disabled,Enabled" bitfld.long 0x00 26. " D2S ,D2 support" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " D1S ,D1 support" "Disabled,Enabled" bitfld.long 0x00 22.--24. " AUXC ,AUX current" "0,1,2,3,4,5,6,7" bitfld.long 0x00 21. " DSI ,DSI" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PMEC ,PME clock" "Disabled,Enabled" bitfld.long 0x00 16.--18. " VERSION ,Version" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" group.long 0x54C++0x03 line.long 0x00 "PMC1,Power Management Capability Register 1" eventfld.long 0x00 15. " PMES ,PME status" "Disabled,Enabled" rbitfld.long 0x00 13.--14. " DS ,Data scale" "0,1,2,3" rbitfld.long 0x00 9.--12. " DSEL ,Data select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " PMEE ,PME enable" "Disabled,Enabled" rbitfld.long 0x00 3. " NSR ,No soft reset" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PS ,Power state" "0,1,2,3" group.long 0x550++0x07 "xHCI Vender Defined Capability Register" line.long 0x00 "VDC,xHCI Vender Defined Capability Register" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" line.long 0x04 "CE,Command Enable Register" bitfld.long 0x04 0. " CE ,Command enable" "Disabled,Enabled" rgroup.long 0x560++0x03 "Debug Capability Registers" line.long 0x00 "DCID,Debug Capability Register" bitfld.long 0x00 16.--19. " DCERSTM ,DCERST max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. " NCP ,Next capability pointer" hexmask.long.byte 0x00 0.--7. 1. " CID ,Capability ID" group.long 0x564++0x07 line.long 0x00 "DCDB,Debug Capability Doorbell Register" hexmask.long.byte 0x00 8.--15. 1. " DT ,Doorbell target" line.long 0x04 "DCERSTSZ,Debug Capability Event Ring Segment Table Size Register" hexmask.long.word 0x04 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad 0x570++0x0F line.quad 0x00 "DCERSTBA,Debug Capability Event Ring Segment Table Base Address Register" hexmask.quad 0x00 4.--63. 0x10 " ERSTBA ,Event ring segment table base address" line.quad 0x08 "DCERDP,Debug Capability Event Ring Dequeue Pointer Register" hexmask.quad 0x08 4.--63. 0x10 " DP ,Dequeue pointer" bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x580++0x03 line.long 0x00 "DCCTRL,Debug Capability Control Register" bitfld.long 0x00 31. " DCE ,Debug capability enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 0x01 " DA ,Device address" hexmask.long.byte 0x00 16.--23. 1. " DMBS ,Debug max burst size" textline " " eventfld.long 0x00 4. " DRC ,DbC run change" "Not changed,Changed" bitfld.long 0x00 3. " HIT ,Halt IN TR" "No,Yes" bitfld.long 0x00 2. " HOT ,Halt OUT TR" "No,Yes" textline " " bitfld.long 0x00 1. " LSE ,Link status event enable" "Disabled,Enabled" rbitfld.long 0x00 0. " DCR ,DbC Run" "Disabled,Enabled" rgroup.long 0x584++0x03 line.long 0x00 "DCST,Debug Capability ST Register" hexmask.long.byte 0x00 24.--31. 1. " DPN ,Debug port number" bitfld.long 0x00 0. " ER ,Event ring not empty" "Empty,Not empty" group.long 0x588++0x03 line.long 0x00 "DCPORTSC,Debug Capability Port Status Change Register" eventfld.long 0x00 23. " CEC ,Port config error change" "No error,Error" eventfld.long 0x00 22. " PLC ,Port link status change" "Not changed,Changed" eventfld.long 0x00 21. " PRC ,Port reset change" "Not changed,Changed" textline " " eventfld.long 0x00 17. " CSC ,Connect status change" "Not changed,Changed" rbitfld.long 0x00 10.--13. " PS ,Port speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 5.--8. " PLS ,Port link state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 4. " PR ,Port reset" "No reset,Reset" bitfld.long 0x00 1. " PED ,Port enabled" "Disabled,Enabled" rbitfld.long 0x00 0. " CC ,Current connect status" "Low,High" group.quad 0x590++0x07 line.quad 0x00 "DCCP,Debug Capability Context Pointer Register" hexmask.quad 0x00 4.--63. 0x10 " DCCP ,Debug capability context pointer" sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77960*"))&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77440") group.long 0x598++0x7 line.long 0x00 "DCDDI1,Debug Capability Device Descriptor 1 Register" hexmask.long.word 0x00 16.--31. 1. " VID ,Vender ID" hexmask.long.byte 0x00 0.--7. 1. " DBCP ,DbC protocol" line.long 0x04 "DCDDI2,Debug Capability Device Descriptor 2 Register" hexmask.long.word 0x04 16.--31. 1. " DR ,Device revision" hexmask.long.word 0x04 0.--15. 1. " PID ,Product ID" endif rgroup.long 0x600++0x03 "Host Controller Runtime Register" line.long 0x00 "MFINDEX,Microframe Index Register" hexmask.long.word 0x00 0.--13. 1. " MI ,Microframe index" group.long 0x620++0x0B line.long 0x00 "IMAN,Interrupter Management Register" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,Interrupt pending" "No interrupt,Interrupt" line.long 0x04 "IMOD,Interrupter Moderation Register" hexmask.long.word 0x04 16.--31. 1. " IMODC ,Down counter" hexmask.long.word 0x04 0.--15. 1. " IMODI ,Minimum value for the inter-interrupt interval" line.long 0x08 "ERSTSZ,Event Ring Segment Table Size Register" hexmask.long.word 0x08 0.--15. 1. " ERSTSZ ,Event ring segment table size" group.quad 0x630++0x0F line.quad 0x00 "ERSTBA,Event Ring Segment Table Base Address Register" hexmask.quad.long 0x00 32.--63. 1. " ERSTBAH ,Event Ring segment table base address high" hexmask.quad.long 0x00 4.--31. 0x10 " ERSTBAL ,Event ring segment table base address low" line.quad 0x08 "ERDP,Event Ring Dequeue Pointer Register" hexmask.quad.long 0x08 32.--63. 1. " ERDPH ,Event ring dequeue pointer high" hexmask.quad.long 0x08 4.--31. 0x10 " ERDPL ,Event ring dequeue pointer low" eventfld.quad 0x08 3. " EHB ,Event handler busy" "Not busy,Busy" textline " " bitfld.quad 0x08 0.--2. " DESI ,Dequeue ERST segment index" "0,1,2,3,4,5,6,7" group.long 0x800++0x03 "Doorbell Register" line.long 0x00 "DOORBELL0,Doorbell 0 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x804++0x03 line.long 0x00 "DOORBELL1,Doorbell 1 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x808++0x03 line.long 0x00 "DOORBELL2,Doorbell 2 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x80C++0x03 line.long 0x00 "DOORBELL3,Doorbell 3 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x810++0x03 line.long 0x00 "DOORBELL4,Doorbell 4 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x814++0x03 line.long 0x00 "DOORBELL5,Doorbell 5 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x818++0x03 line.long 0x00 "DOORBELL6,Doorbell 6 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x81C++0x03 line.long 0x00 "DOORBELL7,Doorbell 7 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x820++0x03 line.long 0x00 "DOORBELL8,Doorbell 8 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x824++0x03 line.long 0x00 "DOORBELL9,Doorbell 9 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x828++0x03 line.long 0x00 "DOORBELL10,Doorbell 10 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x82C++0x03 line.long 0x00 "DOORBELL11,Doorbell 11 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x830++0x03 line.long 0x00 "DOORBELL12,Doorbell 12 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x834++0x03 line.long 0x00 "DOORBELL13,Doorbell 13 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x838++0x03 line.long 0x00 "DOORBELL14,Doorbell 14 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x83C++0x03 line.long 0x00 "DOORBELL15,Doorbell 15 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x840++0x03 line.long 0x00 "DOORBELL16,Doorbell 16 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x844++0x03 line.long 0x00 "DOORBELL17,Doorbell 17 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x848++0x03 line.long 0x00 "DOORBELL18,Doorbell 18 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x84C++0x03 line.long 0x00 "DOORBELL19,Doorbell 19 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x850++0x03 line.long 0x00 "DOORBELL20,Doorbell 20 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x854++0x03 line.long 0x00 "DOORBELL21,Doorbell 21 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x858++0x03 line.long 0x00 "DOORBELL22,Doorbell 22 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x85C++0x03 line.long 0x00 "DOORBELL23,Doorbell 23 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x860++0x03 line.long 0x00 "DOORBELL24,Doorbell 24 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x864++0x03 line.long 0x00 "DOORBELL25,Doorbell 25 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x868++0x03 line.long 0x00 "DOORBELL26,Doorbell 26 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x86C++0x03 line.long 0x00 "DOORBELL27,Doorbell 27 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x870++0x03 line.long 0x00 "DOORBELL28,Doorbell 28 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x874++0x03 line.long 0x00 "DOORBELL29,Doorbell 29 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x878++0x03 line.long 0x00 "DOORBELL30,Doorbell 30 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x87C++0x03 line.long 0x00 "DOORBELL31,Doorbell 31 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" group.long 0x880++0x03 line.long 0x00 "DOORBELL32,Doorbell 32 Register" hexmask.long.word 0x00 16.--31. 1. " DBSID ,Doorbell stream ID" hexmask.long.byte 0x00 0.--7. 1. " DBT ,Doorbell target" tree.end width 0x0B tree.end tree "RWDT (RCLK Watchdog Timer)" base ad:0xE6020000 width 9. if ((per.byte(ad:0xE6020000+0x04)&0x20)==0x20) rgroup.word 0x00++0x01 line.word 0x00 "RWTCNT,RCLK Watchdog Timer Counter" else group.word 0x00++0x01 line.word 0x00 "RWTCNT,RCLK Watchdog Timer Counter" endif group.byte 0x04++0x00 line.byte 0x00 "RWTCSRA,RCLK Watchdog Timer Control/Status Register A" bitfld.byte 0x00 7. " TME ,Timer operation enable" "Disabled,Enabled" rbitfld.byte 0x00 5. " WRFLG ,Write status flag" "Write access,No write access" bitfld.byte 0x00 4. " WOVF ,RWTCNT overflow status" "No overflow,Overflow" textline " " bitfld.byte 0x00 3. " WOVFE ,Overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " CKS0 ,RTC clock select" "/1,/4,/16,/32,/64,/128,/1024,Expanded mode" wgroup.long 0x08++0x03 line.long 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B (Use a word access to write to RWTCSRB, with H'A5 A5A5 in the upper byte)" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") group.byte 0x08++0x00 line.byte 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B" bitfld.byte 0x00 0.--5. " CKS1 ,RCLK select for RCLK select expanded mode" "33s,1.01s,2.02s,3.03s,4.04s,5.05s,6.06s,7.07s,8.08s,9.09s,10.1s,,,,,,33s,5.05s,10.1s,15.2s,20.2s,25.3s,30.3s,35.4s,40.4s,45.5s,50.5s,55.6s,60.6s,,,,33s,1.01min,2.02min,3.03min,4.04min,5.05min,6.06min,7.07min,8.08min,9.09min,10.1min,,,,,,33s,5.05min,10.1min,15.2min,20.2min,25.3min,30.3min,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B" bitfld.byte 0x00 0.--5. " CKS1 ,RCLK select for RCLK select expanded mode" "32s,1s,2s,3s,4s,5s,6s,7s,8s,9s,10s,,,,,,32s,5s,10s,15s,20s,25s,30s,35s,40s,45s,50s,55s,60s,,,,32s,1min,2min,3min,4min,5min,6min,7min,8min,9min,10min,,,,,,32s,5min,10min,15min,20min,25min,30min,?..." endif width 0xB tree.end tree.open "TPU (16-Bit Timer Pulse Unit)" tree "TPU-CPU" base ad:0xE60F0000 width 8. group.word 0x00++0x1 "Timer Start Register" line.word 0x00 "TSTR,Timer Start Register" bitfld.word 0x00 4. " TMST ,Motor Control Sequence Start" "Stopped,Started" bitfld.word 0x00 3. " CST3 ,Counter 3 Start" "Stopped,Started" bitfld.word 0x00 2. " CST2 ,Counter 2 Start" "Stopped,Started" textline " " bitfld.word 0x00 1. " CST1 ,Counter 1 Start" "Stopped,Started" bitfld.word 0x00 0. " CST0 ,Counter 0 Start" "Stopped,Started" group.word 0x10++0x1 "Channel 0" line.word 0x00 "TCR0,Timer Control Register 0" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x10+0x04)++0x1 line.word 0x00 "TMDR0,Timer Mode Register 0" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x10+0x08)++0x1 line.word 0x00 "TIOR0,Timer I/O Control Register 0" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x10+0x0C)++0x1 line.word 0x00 "TIER0,Timer Interrupt Enable Register 0" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x10+0x10)++0x1 line.word 0x00 "TSR0,Timer Status Registers 0" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x10+0x14)++0x1 line.word 0x00 "TCNT0,Timer Counter 0" group.word (0x10+0x18)++0x1 line.word 0x00 "TGRA0,Timer General Register A 0" group.word (0x10+0x1C)++0x1 line.word 0x00 "TGRB0,Timer General Register A 0" group.word (0x10+0x20)++0x1 line.word 0x00 "TGRC0,Timer General Register A 0" group.word (0x10+0x24)++0x1 line.word 0x00 "TGRD0,Timer General Register A 0" group.word 0x50++0x1 "Channel 1" line.word 0x00 "TCR1,Timer Control Register 1" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x50+0x04)++0x1 line.word 0x00 "TMDR1,Timer Mode Register 1" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x50+0x08)++0x1 line.word 0x00 "TIOR1,Timer I/O Control Register 1" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x50+0x0C)++0x1 line.word 0x00 "TIER1,Timer Interrupt Enable Register 1" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x50+0x10)++0x1 line.word 0x00 "TSR1,Timer Status Registers 1" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x50+0x14)++0x1 line.word 0x00 "TCNT1,Timer Counter 1" group.word (0x50+0x18)++0x1 line.word 0x00 "TGRA1,Timer General Register A 1" group.word (0x50+0x1C)++0x1 line.word 0x00 "TGRB1,Timer General Register A 1" group.word (0x50+0x20)++0x1 line.word 0x00 "TGRC1,Timer General Register A 1" group.word (0x50+0x24)++0x1 line.word 0x00 "TGRD1,Timer General Register A 1" group.word 0x90++0x1 "Channel 2" line.word 0x00 "TCR2,Timer Control Register 2" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x90+0x04)++0x1 line.word 0x00 "TMDR2,Timer Mode Register 2" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x90+0x08)++0x1 line.word 0x00 "TIOR2,Timer I/O Control Register 2" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x90+0x0C)++0x1 line.word 0x00 "TIER2,Timer Interrupt Enable Register 2" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x90+0x10)++0x1 line.word 0x00 "TSR2,Timer Status Registers 2" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x90+0x14)++0x1 line.word 0x00 "TCNT2,Timer Counter 2" group.word (0x90+0x18)++0x1 line.word 0x00 "TGRA2,Timer General Register A 2" group.word (0x90+0x1C)++0x1 line.word 0x00 "TGRB2,Timer General Register A 2" group.word (0x90+0x20)++0x1 line.word 0x00 "TGRC2,Timer General Register A 2" group.word (0x90+0x24)++0x1 line.word 0x00 "TGRD2,Timer General Register A 2" group.word 0xD0++0x1 "Channel 3" line.word 0x00 "TCR3,Timer Control Register 3" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0xD0+0x04)++0x1 line.word 0x00 "TMDR3,Timer Mode Register 3" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0xD0+0x08)++0x1 line.word 0x00 "TIOR3,Timer I/O Control Register 3" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0xD0+0x0C)++0x1 line.word 0x00 "TIER3,Timer Interrupt Enable Register 3" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0xD0+0x10)++0x1 line.word 0x00 "TSR3,Timer Status Registers 3" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0xD0+0x14)++0x1 line.word 0x00 "TCNT3,Timer Counter 3" group.word (0xD0+0x18)++0x1 line.word 0x00 "TGRA3,Timer General Register A 3" group.word (0xD0+0x1C)++0x1 line.word 0x00 "TGRB3,Timer General Register A 3" group.word (0xD0+0x20)++0x1 line.word 0x00 "TGRC3,Timer General Register A 3" group.word (0xD0+0x24)++0x1 line.word 0x00 "TGRD3,Timer General Register A 3" group.word 0x100++0x1 "Motor settings registers" line.word 0x00 "TMIR,Motor Control Setting Register" bitfld.word 0x00 4. " TDMAE ,DMA used/unused Bit" "Unused,Unused" bitfld.word 0x00 3. " MTRPATDOWN ,Start and Stop Pattern Transition Ascending/Descending Select Bit" "Ascending,Descending" bitfld.word 0x00 1.--2. " MTRPATKIND ,Start and Stop Pattern Type Select Bit" "4 types,8 types,?..." textline " " bitfld.word 0x00 0. " MTRON ,TPU mode/Stepping Motor Control Mode Select Bit" "TPU,Stepping motor control" group.word 0x104++0x1 line.word 0x00 "TMRR,Motor Deceleration (Stop) Transition Register" bitfld.word 0x00 1. " REDUON0 ,Compulsorily change from normal to deceleration" "No,Yes" bitfld.word 0x00 0. " REDUON ,Compulsorily change from normal to deceleration" "No effect,Decelerate/Stop" rgroup.word 0x108++0x1 line.word 0x00 "TMSR,Motor Control Status Register" bitfld.word 0x00 3. " SITR ,Sequence state in motor control mode" "Not decelerated,Decelerated" bitfld.word 0x00 2. " SITT ,Sequence state in motor control mode" "Not normal,Normal" bitfld.word 0x00 1. " SITA ,Sequence state in motor control mode" "Not accelerated,Accelerated" textline " " bitfld.word 0x00 0. " SITS ,Sequence state in motor control mode" "Not stopped,Stopped" group.word 0x110++0x1 line.word 0x00 "TMMPR0,Motor Operation Pattern Storing Register 0" bitfld.word 0x00 15. " MP33 ,TPU0TO3 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 14. " MP32 ,TPU0TO2 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 13. " MP31 ,TPU0TO1 output value in motor operation pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " MP30 ,TPU0TO0 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 11. " MP23 ,TPU0TO3 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 10. " MP22 ,TPU0TO2 output value in motor operation pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " MP21 ,TPU0TO1 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 8. " MP20 ,TPU0TO0 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 7. " MP13 ,TPU0TO3 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " MP12 ,TPU0TO2 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 5. " MP11 ,TPU0TO1 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 4. " MP10 ,TPU0TO0 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " MP03 ,TPU0TO3 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 2. " MP02 ,TPU0TO2 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 1. " MP01 ,TPU0TO1 output value in motor operation pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " MP00 ,TPU0TO0 output value in motor operation pattern [0]" "Low,High" group.word 0x114++0x1 line.word 0x00 "TMMPR1,Motor Operation Pattern Storing Register 1" bitfld.word 0x00 15. " MP73 ,TPU0TO3 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 14. " MP72 ,TPU0TO2 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 13. " MP71 ,TPU0TO1 output value in motor operation pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " MP70 ,TPU0TO0 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 11. " MP63 ,TPU0TO3 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 10. " MP62 ,TPU0TO2 output value in motor operation pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " MP61 ,TPU0TO1 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 8. " MP60 ,TPU0TO0 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 7. " MP53 ,TPU0TO3 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " MP52 ,TPU0TO2 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 5. " MP51 ,TPU0TO1 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 4. " MP50 ,TPU0TO0 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " MP43 ,TPU0TO3 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 2. " MP42 ,TPU0TO2 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 1. " MP41 ,TPU0TO1 output value in motor operation pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " MP40 ,TPU0TO0 output value in motor operation pattern [4]" "Low,High" group.word 0x118++0x1 line.word 0x00 "TMSPR0,Motor Stop Pattern Storing Register 0" bitfld.word 0x00 15. " SP33 ,TPU0TO3 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 14. " SP32 ,TPU0TO2 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 13. " SP31 ,TPU0TO1 output value in motor stop pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " SP30 ,TPU0TO0 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 11. " SP23 ,TPU0TO3 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 10. " SP22 ,TPU0TO2 output value in motor stop pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " SP21 ,TPU0TO1 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 8. " SP20 ,TPU0TO0 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 7. " SP13 ,TPU0TO3 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " SP12 ,TPU0TO2 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 5. " SP11 ,TPU0TO1 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 4. " SP10 ,TPU0TO0 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " SP03 ,TPU0TO3 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 2. " SP02 ,TPU0TO2 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 1. " SP01 ,TPU0TO1 output value in motor stop pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " SP00 ,TPU0TO0 output value in motor stop pattern [0]" "Low,High" group.word 0x11C++0x1 line.word 0x00 "TMSPR1,Motor Stop Pattern Storing Register 1" bitfld.word 0x00 15. " SP73 ,TPU0TO3 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 14. " SP72 ,TPU0TO2 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 13. " SP71 ,TPU0TO1 output value in motor stop pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " SP70 ,TPU0TO0 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 11. " SP63 ,TPU0TO3 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 10. " SP62 ,TPU0TO2 output value in motor stop pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " SP61 ,TPU0TO1 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 8. " SP60 ,TPU0TO0 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 7. " SP53 ,TPU0TO3 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " SP52 ,TPU0TO2 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 5. " SP51 ,TPU0TO1 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 4. " SP50 ,TPU0TO0 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " SP43 ,TPU0TO3 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 2. " SP42 ,TPU0TO2 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 1. " SP41 ,TPU0TO1 output value in motor stop pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " SP40 ,TPU0TO0 output value in motor stop pattern [4]" "Low,High" group.word 0x120++0x1 line.word 0x00 "TMOPR,Motor Output Pattern Storing Register" bitfld.word 0x00 0.--2. " NOWPAT ,Current Pattern Number" "0,1,2,3,4,5,6,7" group.word 0x130++0x1 line.word 0x00 "TMASR,Motor Acceleration the Number of Steps Register" group.word 0x134++0x1 line.word 0x00 "TMTSR,Motor Normal the Number of Steps Register" group.word 0x138++0x1 line.word 0x00 "TMRSR,Motor Deceleration the Number of Steps Register" group.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" rgroup.word 0x144++0x1 line.word 0x00 "TMTCR,Motor Control Normal Counter Register" width 0xB tree.end tree "TPU-DMAC" base ad:0xE70F0000 width 8. group.word 0x00++0x1 "Timer Start Register" line.word 0x00 "TSTR,Timer Start Register" bitfld.word 0x00 4. " TMST ,Motor Control Sequence Start" "Stopped,Started" bitfld.word 0x00 3. " CST3 ,Counter 3 Start" "Stopped,Started" bitfld.word 0x00 2. " CST2 ,Counter 2 Start" "Stopped,Started" textline " " bitfld.word 0x00 1. " CST1 ,Counter 1 Start" "Stopped,Started" bitfld.word 0x00 0. " CST0 ,Counter 0 Start" "Stopped,Started" group.word 0x10++0x1 "Channel 0" line.word 0x00 "TCR0,Timer Control Register 0" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x10+0x04)++0x1 line.word 0x00 "TMDR0,Timer Mode Register 0" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x10+0x08)++0x1 line.word 0x00 "TIOR0,Timer I/O Control Register 0" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x10+0x0C)++0x1 line.word 0x00 "TIER0,Timer Interrupt Enable Register 0" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x10+0x10)++0x1 line.word 0x00 "TSR0,Timer Status Registers 0" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x10+0x14)++0x1 line.word 0x00 "TCNT0,Timer Counter 0" group.word (0x10+0x18)++0x1 line.word 0x00 "TGRA0,Timer General Register A 0" group.word (0x10+0x1C)++0x1 line.word 0x00 "TGRB0,Timer General Register A 0" group.word (0x10+0x20)++0x1 line.word 0x00 "TGRC0,Timer General Register A 0" group.word (0x10+0x24)++0x1 line.word 0x00 "TGRD0,Timer General Register A 0" group.word 0x50++0x1 "Channel 1" line.word 0x00 "TCR1,Timer Control Register 1" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x50+0x04)++0x1 line.word 0x00 "TMDR1,Timer Mode Register 1" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x50+0x08)++0x1 line.word 0x00 "TIOR1,Timer I/O Control Register 1" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x50+0x0C)++0x1 line.word 0x00 "TIER1,Timer Interrupt Enable Register 1" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x50+0x10)++0x1 line.word 0x00 "TSR1,Timer Status Registers 1" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x50+0x14)++0x1 line.word 0x00 "TCNT1,Timer Counter 1" group.word (0x50+0x18)++0x1 line.word 0x00 "TGRA1,Timer General Register A 1" group.word (0x50+0x1C)++0x1 line.word 0x00 "TGRB1,Timer General Register A 1" group.word (0x50+0x20)++0x1 line.word 0x00 "TGRC1,Timer General Register A 1" group.word (0x50+0x24)++0x1 line.word 0x00 "TGRD1,Timer General Register A 1" group.word 0x90++0x1 "Channel 2" line.word 0x00 "TCR2,Timer Control Register 2" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x90+0x04)++0x1 line.word 0x00 "TMDR2,Timer Mode Register 2" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x90+0x08)++0x1 line.word 0x00 "TIOR2,Timer I/O Control Register 2" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0x90+0x0C)++0x1 line.word 0x00 "TIER2,Timer Interrupt Enable Register 2" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x90+0x10)++0x1 line.word 0x00 "TSR2,Timer Status Registers 2" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x90+0x14)++0x1 line.word 0x00 "TCNT2,Timer Counter 2" group.word (0x90+0x18)++0x1 line.word 0x00 "TGRA2,Timer General Register A 2" group.word (0x90+0x1C)++0x1 line.word 0x00 "TGRB2,Timer General Register A 2" group.word (0x90+0x20)++0x1 line.word 0x00 "TGRC2,Timer General Register A 2" group.word (0x90+0x24)++0x1 line.word 0x00 "TGRD2,Timer General Register A 2" group.word 0xD0++0x1 "Channel 3" line.word 0x00 "TCR3,Timer Control Register 3" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear" "Disabled,TPU0_TGRA compare match,TPU0_TGRB compare match,,Disabled,TPU0_TGRC compare match,TPU0_TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0xD0+0x04)++0x1 line.word 0x00 "TMDR3,Timer Mode Register 3" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0xD0+0x08)++0x1 line.word 0x00 "TIOR3,Timer I/O Control Register 3" bitfld.word 0x00 0.--2. " IOA ,I/O Control" "Always 0,0/0,0/1,0/Toggle,Always 1,1/0,1/1,1/Toggle" group.word (0xD0+0x0C)++0x1 line.word 0x00 "TIER3,Timer Interrupt Enable Register 3" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TPU0_TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TPU0_TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TPU0_TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TPU0_TGR Interrupt Enable A" "Disabled,Enabled" group.word (0xD0+0x10)++0x1 line.word 0x00 "TSR3,Timer Status Registers 3" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow" "Not occurred,Occurred" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request" "Not occurred,Occurred" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer" "Not occurred,Occurred" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer" "Not occurred,Occurred" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition" "Not occurred,Occurred" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition" "Not occurred,Occurred" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0xD0+0x14)++0x1 line.word 0x00 "TCNT3,Timer Counter 3" group.word (0xD0+0x18)++0x1 line.word 0x00 "TGRA3,Timer General Register A 3" group.word (0xD0+0x1C)++0x1 line.word 0x00 "TGRB3,Timer General Register A 3" group.word (0xD0+0x20)++0x1 line.word 0x00 "TGRC3,Timer General Register A 3" group.word (0xD0+0x24)++0x1 line.word 0x00 "TGRD3,Timer General Register A 3" group.word 0x100++0x1 "Motor settings registers" line.word 0x00 "TMIR,Motor Control Setting Register" bitfld.word 0x00 4. " TDMAE ,DMA used/unused Bit" "Unused,Unused" bitfld.word 0x00 3. " MTRPATDOWN ,Start and Stop Pattern Transition Ascending/Descending Select Bit" "Ascending,Descending" bitfld.word 0x00 1.--2. " MTRPATKIND ,Start and Stop Pattern Type Select Bit" "4 types,8 types,?..." textline " " bitfld.word 0x00 0. " MTRON ,TPU mode/Stepping Motor Control Mode Select Bit" "TPU,Stepping motor control" group.word 0x104++0x1 line.word 0x00 "TMRR,Motor Deceleration (Stop) Transition Register" bitfld.word 0x00 1. " REDUON0 ,Compulsorily change from normal to deceleration" "No,Yes" bitfld.word 0x00 0. " REDUON ,Compulsorily change from normal to deceleration" "No effect,Decelerate/Stop" rgroup.word 0x108++0x1 line.word 0x00 "TMSR,Motor Control Status Register" bitfld.word 0x00 3. " SITR ,Sequence state in motor control mode" "Not decelerated,Decelerated" bitfld.word 0x00 2. " SITT ,Sequence state in motor control mode" "Not normal,Normal" bitfld.word 0x00 1. " SITA ,Sequence state in motor control mode" "Not accelerated,Accelerated" textline " " bitfld.word 0x00 0. " SITS ,Sequence state in motor control mode" "Not stopped,Stopped" group.word 0x110++0x1 line.word 0x00 "TMMPR0,Motor Operation Pattern Storing Register 0" bitfld.word 0x00 15. " MP33 ,TPU0TO3 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 14. " MP32 ,TPU0TO2 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 13. " MP31 ,TPU0TO1 output value in motor operation pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " MP30 ,TPU0TO0 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 11. " MP23 ,TPU0TO3 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 10. " MP22 ,TPU0TO2 output value in motor operation pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " MP21 ,TPU0TO1 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 8. " MP20 ,TPU0TO0 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 7. " MP13 ,TPU0TO3 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " MP12 ,TPU0TO2 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 5. " MP11 ,TPU0TO1 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 4. " MP10 ,TPU0TO0 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " MP03 ,TPU0TO3 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 2. " MP02 ,TPU0TO2 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 1. " MP01 ,TPU0TO1 output value in motor operation pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " MP00 ,TPU0TO0 output value in motor operation pattern [0]" "Low,High" group.word 0x114++0x1 line.word 0x00 "TMMPR1,Motor Operation Pattern Storing Register 1" bitfld.word 0x00 15. " MP73 ,TPU0TO3 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 14. " MP72 ,TPU0TO2 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 13. " MP71 ,TPU0TO1 output value in motor operation pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " MP70 ,TPU0TO0 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 11. " MP63 ,TPU0TO3 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 10. " MP62 ,TPU0TO2 output value in motor operation pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " MP61 ,TPU0TO1 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 8. " MP60 ,TPU0TO0 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 7. " MP53 ,TPU0TO3 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " MP52 ,TPU0TO2 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 5. " MP51 ,TPU0TO1 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 4. " MP50 ,TPU0TO0 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " MP43 ,TPU0TO3 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 2. " MP42 ,TPU0TO2 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 1. " MP41 ,TPU0TO1 output value in motor operation pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " MP40 ,TPU0TO0 output value in motor operation pattern [4]" "Low,High" group.word 0x118++0x1 line.word 0x00 "TMSPR0,Motor Stop Pattern Storing Register 0" bitfld.word 0x00 15. " SP33 ,TPU0TO3 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 14. " SP32 ,TPU0TO2 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 13. " SP31 ,TPU0TO1 output value in motor stop pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " SP30 ,TPU0TO0 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 11. " SP23 ,TPU0TO3 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 10. " SP22 ,TPU0TO2 output value in motor stop pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " SP21 ,TPU0TO1 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 8. " SP20 ,TPU0TO0 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 7. " SP13 ,TPU0TO3 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " SP12 ,TPU0TO2 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 5. " SP11 ,TPU0TO1 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 4. " SP10 ,TPU0TO0 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " SP03 ,TPU0TO3 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 2. " SP02 ,TPU0TO2 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 1. " SP01 ,TPU0TO1 output value in motor stop pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " SP00 ,TPU0TO0 output value in motor stop pattern [0]" "Low,High" group.word 0x11C++0x1 line.word 0x00 "TMSPR1,Motor Stop Pattern Storing Register 1" bitfld.word 0x00 15. " SP73 ,TPU0TO3 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 14. " SP72 ,TPU0TO2 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 13. " SP71 ,TPU0TO1 output value in motor stop pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " SP70 ,TPU0TO0 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 11. " SP63 ,TPU0TO3 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 10. " SP62 ,TPU0TO2 output value in motor stop pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " SP61 ,TPU0TO1 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 8. " SP60 ,TPU0TO0 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 7. " SP53 ,TPU0TO3 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " SP52 ,TPU0TO2 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 5. " SP51 ,TPU0TO1 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 4. " SP50 ,TPU0TO0 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " SP43 ,TPU0TO3 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 2. " SP42 ,TPU0TO2 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 1. " SP41 ,TPU0TO1 output value in motor stop pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " SP40 ,TPU0TO0 output value in motor stop pattern [4]" "Low,High" group.word 0x120++0x1 line.word 0x00 "TMOPR,Motor Output Pattern Storing Register" bitfld.word 0x00 0.--2. " NOWPAT ,Current Pattern Number" "0,1,2,3,4,5,6,7" group.word 0x130++0x1 line.word 0x00 "TMASR,Motor Acceleration the Number of Steps Register" group.word 0x134++0x1 line.word 0x00 "TMTSR,Motor Normal the Number of Steps Register" group.word 0x138++0x1 line.word 0x00 "TMRSR,Motor Deceleration the Number of Steps Register" group.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" rgroup.word 0x144++0x1 line.word 0x00 "TMTCR,Motor Control Normal Counter Register" width 0xB tree.end tree.end tree.open "CMT (Compare Match Timer)" tree "CMT 0" base ad:0xFFCA0000 width 9. group.long 0x1000++0x3 line.long 0x00 "CMCLKE,CLK Enable Register" bitfld.long 0x00 6. " CH1CLKE ,Channel 1 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 5. " CH0CLKE ,Channel 0 clock supply status" "Not supplied,Supplied" group.long 0x500++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start" "Not started,Started" group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" if (((per.l(ad:0xFFCA0000+0x500+0x10))&0x200)==0x200) group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" hexmask.long.word 0x00 0.--15. 1. " CMCNT0 ,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" hexmask.long.word 0x04 0.--15. 1. " CMCOR0 ,Compare Match Timer Constant Register 0" else group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" endif group.long 0x600++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start" "Not started,Started" group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" if (((per.l(ad:0xFFCA0000+0x600+0x10))&0x200)==0x200) group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" hexmask.long.word 0x00 0.--15. 1. " CMCNT1 ,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" hexmask.long.word 0x04 0.--15. 1. " CMCOR1 ,Compare Match Timer Constant Register 1" else group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" endif width 0xB tree.end tree "CMT 1" base ad:0xE6130000 width 9. group.long 0x1000++0x3 line.long 0x00 "CMCLKE,CLK Enable Register" bitfld.long 0x00 7. " CH7CLKE ,Channel 7 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 6. " CH6CLKE ,Channel 6 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 5. " CH5CLKE ,Channel 5 clock supply status" "Not supplied,Supplied" textline " " bitfld.long 0x00 4. " CH4CLKE ,Channel 4 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 3. " CH3CLKE ,Channel 3 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 2. " CH2CLKE ,Channel 2 clock supply status" "Not supplied,Supplied" textline " " bitfld.long 0x00 1. " CH1CLKE ,Channel 1 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 0. " CH0CLKE ,Channel 0 clock supply status" "Not supplied,Supplied" if (0==0.) group.long 0x0++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==1.||0==2.||0==4.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==3.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==5.||0==6.||0==7.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (0==0.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==1.||0==2.||0==4.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==3.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==5.||0==6.||0==7.) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x0+0x10))&0x200)==0x200) group.long (0x0+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" hexmask.long.word 0x00 0.--15. 1. " CMCNT0 ,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" hexmask.long.word 0x04 0.--15. 1. " CMCOR0 ,Compare Match Timer Constant Register 0" else group.long (0x0+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" endif if (0==0.||0==1.||0==2.||0==3.||0==4.) group.long (0x0+0x20)++0x03 line.long 0x00 "CMCSRH0,Compare Match Timer Control/Status Register H0" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x0+0x24)++0x07 line.long 0x00 "CMCNTH0,Compare Match Timer Counter H 0" hexmask.long.word 0x00 0.--15. 1. " CMCNTH0 ,Compare Match Timer Counter H0" line.long 0x04 "CMCORH0,Compare Match Timer Constant Register H0" hexmask.long.word 0x04 0.--15. 1. " CMCORH0 ,Compare Match Timer Constant Register H0" endif if (0==0.||0==1.||0==2.||0==4.) group.long (0x0+0x40)++0x3 line.long 0x00 "CMCSRM0,Compare Match Timer Match Control/Status Register 0" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x0+0x44)++0x3 line.long 0x00 "CMCNTM0,Compare Match Timer Match Counter 0" endif if (0==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT0BK0,Compare Match Timer Counter 0 Backup 0" line.long 0x04 "CMCNT0BK1,Compare Match Timer Counter 0 Backup 1" width 9. endif if (1==0.) group.long 0x100++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==1.||1==2.||1==4.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==3.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==5.||1==6.||1==7.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (1==0.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==1.||1==2.||1==4.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==3.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==5.||1==6.||1==7.) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x100+0x10))&0x200)==0x200) group.long (0x100+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" hexmask.long.word 0x00 0.--15. 1. " CMCNT1 ,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" hexmask.long.word 0x04 0.--15. 1. " CMCOR1 ,Compare Match Timer Constant Register 1" else group.long (0x100+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" endif if (1==0.||1==1.||1==2.||1==3.||1==4.) group.long (0x100+0x20)++0x03 line.long 0x00 "CMCSRH1,Compare Match Timer Control/Status Register H1" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x100+0x24)++0x07 line.long 0x00 "CMCNTH1,Compare Match Timer Counter H 1" hexmask.long.word 0x00 0.--15. 1. " CMCNTH1 ,Compare Match Timer Counter H1" line.long 0x04 "CMCORH1,Compare Match Timer Constant Register H1" hexmask.long.word 0x04 0.--15. 1. " CMCORH1 ,Compare Match Timer Constant Register H1" endif if (1==0.||1==1.||1==2.||1==4.) group.long (0x100+0x40)++0x3 line.long 0x00 "CMCSRM1,Compare Match Timer Match Control/Status Register 1" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x100+0x44)++0x3 line.long 0x00 "CMCNTM1,Compare Match Timer Match Counter 1" endif if (1==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT1BK0,Compare Match Timer Counter 1 Backup 0" line.long 0x04 "CMCNT1BK1,Compare Match Timer Counter 1 Backup 1" width 9. endif if (2==0.) group.long 0x200++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==1.||2==2.||2==4.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==3.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==5.||2==6.||2==7.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (2==0.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==1.||2==2.||2==4.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==3.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==5.||2==6.||2==7.) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x200+0x10))&0x200)==0x200) group.long (0x200+0x14)++0x7 line.long 0x00 "CMCNT2,Compare Match Timer Counter 2" hexmask.long.word 0x00 0.--15. 1. " CMCNT2 ,Compare Match Timer Counter 2" line.long 0x04 "CMCOR2,Compare Match Timer Constant Register 2" hexmask.long.word 0x04 0.--15. 1. " CMCOR2 ,Compare Match Timer Constant Register 2" else group.long (0x200+0x14)++0x7 line.long 0x00 "CMCNT2,Compare Match Timer Counter 2" line.long 0x04 "CMCOR2,Compare Match Timer Constant Register 2" endif if (2==0.||2==1.||2==2.||2==3.||2==4.) group.long (0x200+0x20)++0x03 line.long 0x00 "CMCSRH2,Compare Match Timer Control/Status Register H2" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x200+0x24)++0x07 line.long 0x00 "CMCNTH2,Compare Match Timer Counter H 2" hexmask.long.word 0x00 0.--15. 1. " CMCNTH2 ,Compare Match Timer Counter H2" line.long 0x04 "CMCORH2,Compare Match Timer Constant Register H2" hexmask.long.word 0x04 0.--15. 1. " CMCORH2 ,Compare Match Timer Constant Register H2" endif if (2==0.||2==1.||2==2.||2==4.) group.long (0x200+0x40)++0x3 line.long 0x00 "CMCSRM2,Compare Match Timer Match Control/Status Register 2" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x200+0x44)++0x3 line.long 0x00 "CMCNTM2,Compare Match Timer Match Counter 2" endif if (2==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT2BK0,Compare Match Timer Counter 2 Backup 0" line.long 0x04 "CMCNT2BK1,Compare Match Timer Counter 2 Backup 1" width 9. endif if (3==0.) group.long 0x300++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==1.||3==2.||3==4.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==3.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==5.||3==6.||3==7.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (3==0.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==1.||3==2.||3==4.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==3.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==5.||3==6.||3==7.) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x300+0x10))&0x200)==0x200) group.long (0x300+0x14)++0x7 line.long 0x00 "CMCNT3,Compare Match Timer Counter 3" hexmask.long.word 0x00 0.--15. 1. " CMCNT3 ,Compare Match Timer Counter 3" line.long 0x04 "CMCOR3,Compare Match Timer Constant Register 3" hexmask.long.word 0x04 0.--15. 1. " CMCOR3 ,Compare Match Timer Constant Register 3" else group.long (0x300+0x14)++0x7 line.long 0x00 "CMCNT3,Compare Match Timer Counter 3" line.long 0x04 "CMCOR3,Compare Match Timer Constant Register 3" endif if (3==0.||3==1.||3==2.||3==3.||3==4.) group.long (0x300+0x20)++0x03 line.long 0x00 "CMCSRH3,Compare Match Timer Control/Status Register H3" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x300+0x24)++0x07 line.long 0x00 "CMCNTH3,Compare Match Timer Counter H 3" hexmask.long.word 0x00 0.--15. 1. " CMCNTH3 ,Compare Match Timer Counter H3" line.long 0x04 "CMCORH3,Compare Match Timer Constant Register H3" hexmask.long.word 0x04 0.--15. 1. " CMCORH3 ,Compare Match Timer Constant Register H3" endif if (3==0.||3==1.||3==2.||3==4.) group.long (0x300+0x40)++0x3 line.long 0x00 "CMCSRM3,Compare Match Timer Match Control/Status Register 3" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x300+0x44)++0x3 line.long 0x00 "CMCNTM3,Compare Match Timer Match Counter 3" endif if (3==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT3BK0,Compare Match Timer Counter 3 Backup 0" line.long 0x04 "CMCNT3BK1,Compare Match Timer Counter 3 Backup 1" width 9. endif if (4==0.) group.long 0x400++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==1.||4==2.||4==4.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==3.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==5.||4==6.||4==7.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (4==0.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==1.||4==2.||4==4.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==3.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==5.||4==6.||4==7.) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x400+0x10))&0x200)==0x200) group.long (0x400+0x14)++0x7 line.long 0x00 "CMCNT4,Compare Match Timer Counter 4" hexmask.long.word 0x00 0.--15. 1. " CMCNT4 ,Compare Match Timer Counter 4" line.long 0x04 "CMCOR4,Compare Match Timer Constant Register 4" hexmask.long.word 0x04 0.--15. 1. " CMCOR4 ,Compare Match Timer Constant Register 4" else group.long (0x400+0x14)++0x7 line.long 0x00 "CMCNT4,Compare Match Timer Counter 4" line.long 0x04 "CMCOR4,Compare Match Timer Constant Register 4" endif if (4==0.||4==1.||4==2.||4==3.||4==4.) group.long (0x400+0x20)++0x03 line.long 0x00 "CMCSRH4,Compare Match Timer Control/Status Register H4" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x400+0x24)++0x07 line.long 0x00 "CMCNTH4,Compare Match Timer Counter H 4" hexmask.long.word 0x00 0.--15. 1. " CMCNTH4 ,Compare Match Timer Counter H4" line.long 0x04 "CMCORH4,Compare Match Timer Constant Register H4" hexmask.long.word 0x04 0.--15. 1. " CMCORH4 ,Compare Match Timer Constant Register H4" endif if (4==0.||4==1.||4==2.||4==4.) group.long (0x400+0x40)++0x3 line.long 0x00 "CMCSRM4,Compare Match Timer Match Control/Status Register 4" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x400+0x44)++0x3 line.long 0x00 "CMCNTM4,Compare Match Timer Match Counter 4" endif if (4==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT4BK0,Compare Match Timer Counter 4 Backup 0" line.long 0x04 "CMCNT4BK1,Compare Match Timer Counter 4 Backup 1" width 9. endif if (5==0.) group.long 0x500++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==1.||5==2.||5==4.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==3.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==5.||5==6.||5==7.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (5==0.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==1.||5==2.||5==4.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==3.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==5.||5==6.||5==7.) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x500+0x10))&0x200)==0x200) group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT5,Compare Match Timer Counter 5" hexmask.long.word 0x00 0.--15. 1. " CMCNT5 ,Compare Match Timer Counter 5" line.long 0x04 "CMCOR5,Compare Match Timer Constant Register 5" hexmask.long.word 0x04 0.--15. 1. " CMCOR5 ,Compare Match Timer Constant Register 5" else group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT5,Compare Match Timer Counter 5" line.long 0x04 "CMCOR5,Compare Match Timer Constant Register 5" endif if (5==0.||5==1.||5==2.||5==3.||5==4.) group.long (0x500+0x20)++0x03 line.long 0x00 "CMCSRH5,Compare Match Timer Control/Status Register H5" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x500+0x24)++0x07 line.long 0x00 "CMCNTH5,Compare Match Timer Counter H 5" hexmask.long.word 0x00 0.--15. 1. " CMCNTH5 ,Compare Match Timer Counter H5" line.long 0x04 "CMCORH5,Compare Match Timer Constant Register H5" hexmask.long.word 0x04 0.--15. 1. " CMCORH5 ,Compare Match Timer Constant Register H5" endif if (5==0.||5==1.||5==2.||5==4.) group.long (0x500+0x40)++0x3 line.long 0x00 "CMCSRM5,Compare Match Timer Match Control/Status Register 5" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x500+0x44)++0x3 line.long 0x00 "CMCNTM5,Compare Match Timer Match Counter 5" endif if (5==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT5BK0,Compare Match Timer Counter 5 Backup 0" line.long 0x04 "CMCNT5BK1,Compare Match Timer Counter 5 Backup 1" width 9. endif if (6==0.) group.long 0x600++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==1.||6==2.||6==4.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==3.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==5.||6==6.||6==7.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (6==0.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==1.||6==2.||6==4.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==3.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==5.||6==6.||6==7.) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x600+0x10))&0x200)==0x200) group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT6,Compare Match Timer Counter 6" hexmask.long.word 0x00 0.--15. 1. " CMCNT6 ,Compare Match Timer Counter 6" line.long 0x04 "CMCOR6,Compare Match Timer Constant Register 6" hexmask.long.word 0x04 0.--15. 1. " CMCOR6 ,Compare Match Timer Constant Register 6" else group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT6,Compare Match Timer Counter 6" line.long 0x04 "CMCOR6,Compare Match Timer Constant Register 6" endif if (6==0.||6==1.||6==2.||6==3.||6==4.) group.long (0x600+0x20)++0x03 line.long 0x00 "CMCSRH6,Compare Match Timer Control/Status Register H6" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x600+0x24)++0x07 line.long 0x00 "CMCNTH6,Compare Match Timer Counter H 6" hexmask.long.word 0x00 0.--15. 1. " CMCNTH6 ,Compare Match Timer Counter H6" line.long 0x04 "CMCORH6,Compare Match Timer Constant Register H6" hexmask.long.word 0x04 0.--15. 1. " CMCORH6 ,Compare Match Timer Constant Register H6" endif if (6==0.||6==1.||6==2.||6==4.) group.long (0x600+0x40)++0x3 line.long 0x00 "CMCSRM6,Compare Match Timer Match Control/Status Register 6" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x600+0x44)++0x3 line.long 0x00 "CMCNTM6,Compare Match Timer Match Counter 6" endif if (6==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT6BK0,Compare Match Timer Counter 6 Backup 0" line.long 0x04 "CMCNT6BK1,Compare Match Timer Counter 6 Backup 1" width 9. endif if (7==0.) group.long 0x700++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==1.||7==2.||7==4.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==3.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==5.||7==6.||7==7.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (7==0.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==1.||7==2.||7==4.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==3.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==5.||7==6.||7==7.) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x700+0x10))&0x200)==0x200) group.long (0x700+0x14)++0x7 line.long 0x00 "CMCNT7,Compare Match Timer Counter 7" hexmask.long.word 0x00 0.--15. 1. " CMCNT7 ,Compare Match Timer Counter 7" line.long 0x04 "CMCOR7,Compare Match Timer Constant Register 7" hexmask.long.word 0x04 0.--15. 1. " CMCOR7 ,Compare Match Timer Constant Register 7" else group.long (0x700+0x14)++0x7 line.long 0x00 "CMCNT7,Compare Match Timer Counter 7" line.long 0x04 "CMCOR7,Compare Match Timer Constant Register 7" endif if (7==0.||7==1.||7==2.||7==3.||7==4.) group.long (0x700+0x20)++0x03 line.long 0x00 "CMCSRH7,Compare Match Timer Control/Status Register H7" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x700+0x24)++0x07 line.long 0x00 "CMCNTH7,Compare Match Timer Counter H 7" hexmask.long.word 0x00 0.--15. 1. " CMCNTH7 ,Compare Match Timer Counter H7" line.long 0x04 "CMCORH7,Compare Match Timer Constant Register H7" hexmask.long.word 0x04 0.--15. 1. " CMCORH7 ,Compare Match Timer Constant Register H7" endif if (7==0.||7==1.||7==2.||7==4.) group.long (0x700+0x40)++0x3 line.long 0x00 "CMCSRM7,Compare Match Timer Match Control/Status Register 7" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x700+0x44)++0x3 line.long 0x00 "CMCNTM7,Compare Match Timer Match Counter 7" endif if (7==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT7BK0,Compare Match Timer Counter 7 Backup 0" line.long 0x04 "CMCNT7BK1,Compare Match Timer Counter 7 Backup 1" width 9. endif width 0xB tree.end tree.end tree.open "TMU (Timer Unit)" tree "Timer 0" base ad:0xE61E0004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR0,Timer Start Register 0" bitfld.byte 0x00 2. " STR2 , Counter Start 2" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR1 , Counter Start 1" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR0 , Counter Start 0" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR0,Timer Constant Register 0" line.long 0x04 "TCNT0,Timer Counter 0" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR0,Timer Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR1,Timer Constant Register 1" line.long 0x04 "TCNT1,Timer Counter 1" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR1,Timer Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR2,Timer Constant Register 2" line.long 0x04 "TCNT2,Timer Counter 2" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR2,Timer Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR2,Input Capture Register 2" endif width 0xb tree.end tree "Timer 1" base ad:0xFFF60004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR1,Timer Start Register 1" bitfld.byte 0x00 2. " STR5 , Counter Start 5" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR4 , Counter Start 4" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR3 , Counter Start 3" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR3,Timer Constant Register 3" line.long 0x04 "TCNT3,Timer Counter 3" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR3,Timer Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR4,Timer Constant Register 4" line.long 0x04 "TCNT4,Timer Counter 4" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR4,Timer Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR5,Timer Constant Register 5" line.long 0x04 "TCNT5,Timer Counter 5" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR5,Timer Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" elif (cpu()=="RCARM2") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" else bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" endif width 0xb tree.end tree "Timer 2" base ad:0xFFF70004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR2,Timer Start Register 2" bitfld.byte 0x00 2. " STR8 , Counter Start 8" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR7 , Counter Start 7" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR6 , Counter Start 6" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR6,Timer Constant Register 6" line.long 0x04 "TCNT6,Timer Counter 6" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR6,Timer Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR7,Timer Constant Register 7" line.long 0x04 "TCNT7,Timer Counter 7" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR7,Timer Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR8,Timer Constant Register 8" line.long 0x04 "TCNT8,Timer Counter 8" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR8,Timer Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR8,Input Capture Register 8" elif (cpu()=="RCARM2") bitfld.word 0x00 9. " ICPF ,Input Capture Interrupt Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR8,Input Capture Register 8" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif width 0xb tree.end tree "Timer 3" base ad:0xFFF80004 width 7. group.byte 0x00++0x00 line.byte 0x00 "TSTR3,Timer Start Register 3" bitfld.byte 0x00 2. " STR11 , Counter Start 11" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR10 , Counter Start 10" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR9 , Counter Start 9" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR9,Timer Constant Register 9" line.long 0x04 "TCNT9,Timer Counter 9" group.word (0x4+0x08)++0x01 line.word 0x00 "TCR9,Timer Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x10++0x07 line.long 0x00 "TCOR10,Timer Constant Register 10" line.long 0x04 "TCNT10,Timer Counter 10" group.word (0x10+0x08)++0x01 line.word 0x00 "TCR10,Timer Control Register 10" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif group.long 0x1C++0x07 line.long 0x00 "TCOR11,Timer Constant Register 11" line.long 0x04 "TCNT11,Timer Counter 11" group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR11,Timer Control Register 11" sif (cpu()=="RCARH2")||(cpu()=="R8A7792X") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " sif (cpu()=="R8A7792X") bitfld.word 0x00 6.--7. " ICPE ,Input Capture Control" "Disabled,,No interrupt,Interrupt" textline " " endif bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." sif (cpu()=="R8A7792X") rgroup.long (0x1C+0x0c)++0x03 line.long 0x00 "TCPR11,Input Capture Register 11" endif elif (cpu()=="RCARM2") bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" else bitfld.word 0x00 8. " UNF ,Underflow Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow Interrupt Control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " CKEG ,Timer Prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif width 0xb tree.end tree.end tree.open "PWM Timer" tree "Channel 0" base ad:0x1FE50000 width 8. if (((per.l(ad:0x1FE50000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 1" base ad:0x1FE51000 width 8. if (((per.l(ad:0x1FE51000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 2" base ad:0x1FE52000 width 8. if (((per.l(ad:0x1FE52000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 3" base ad:0x1FE53000 width 8. if (((per.l(ad:0x1FE53000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 4" base ad:0x1FE54000 width 8. if (((per.l(ad:0x1FE54000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 5" base ad:0x1FE55000 width 8. if (((per.l(ad:0x1FE55000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 6" base ad:0x1FE56000 width 8. if (((per.l(ad:0x1FE56000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree.end tree "GPS" base ad:0xFFD00000 width 14. group.long 0x00++0x17 line.long 0x00 "HSTR,Host status" line.long 0x04 "HCMR,Host command" line.long 0x08 "HINTR,Host interrupt source" line.long 0x0c "GSTR,GPS status" line.long 0x10 "GCMR,GPS command" line.long 0x14 "GINTR,GPS interrupt source" rgroup.long 0x24++0x07 line.long 0x00 "TIM_LATCH_H,Timer latch" line.long 0x04 "TIM_DATA_H,Timer count" wgroup.long 0x400++0x03 line.long 0x00 "H_DATA_RAM,Host data RAM" button "RAM" "d (ad:0xE6680000+0x400)--(ad:0xE6680000+0x7FF) /long" rgroup.long 0xc00++0x03 line.long 0x00 "GPS_DATA_RAM,GPS data RAM" button "RAM" "d (ad:0xE6680000+0x0C00)--(ad:0xE6680000+0x17FF) /long" group.long 0x3000++0x33 line.long 0x00 "ENW00,Galileo interrupt enable A" line.long 0x04 "ENW01,Galileo interrupt enable B" line.long 0x08 "ENS00,Galileo interrupt enable C" line.long 0x0c "ENS01,Galileo interrupt enable D" line.long 0x10 "EIRR00,Galileo interrupt source A" line.long 0x14 "EIRR01,Galileo interrupt source B" line.long 0x18 "HSDR00,Galileo select A" line.long 0x1c "HSDR01,Galileo select B" line.long 0x20 "SAT00,Galileo select C" line.long 0x24 "SAT01,Galileo select D" line.long 0x28 "DSR00,Galileo flag A" line.long 0x2c "DSR01,Galileo flag B" line.long 0x30 "VRESET,Galileo software reset" group.long 0x3100++0x03 line.long 0x00 "G_DATA_RAM,Galileo data RAM" button "RAM" "d (ad:0xE6680000+0x3100)--(ad:0xE6680000+0x333F) /long" sif (cpu()=="RCARH2"||cpu()=="RCARM2") base ad:0xE6680000 group.long 0x4004++0x3 line.long 0x00 "SPI_INI1,GLONASS set 1" group.long 0x4024++0x3 line.long 0x00 "SPI_ICYC1,GLONASS set 2" group.long 0x4044++0x3 line.long 0x00 "SPI_DCYC1,GLONASS set 3" group.long 0x4060++0x7 line.long 0x00 "SPI_SEL,GLONASS set 4" line.long 0x04 "SPI_START,GLONASS set 5" rgroup.long 0x4068++0x3 line.long 0x00 "SPI_FLG,GLONASS operation flag" group.long 0x406C++0xB line.long 0x00 "SPI_INTMAS,GLONASS interrupt mask" line.long 0x04 "SPI_INTFACT,GLONASS interrupt source" line.long 0x08 "SPI_INST,GLONASS set 6" group.long 0x4080++0x3 line.long 0x00 "SPI_WDATA0,GLONASS set 7" endif width 0xb tree.end tree "IR (IR Receiver)" base ad:0xE6E50000 width 9. group.long 0x00++0x2B line.long 0x00 "IRMODE,IR Mode Register" bitfld.long 0x00 7. " RCDENDE ,Receive code end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " RFRENDE ,Receive frame end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RBUFM ,Receive register mode" "Double buffer mode,Single buffer mode" bitfld.long 0x00 4. " INVERT ,Receive signal polarity inversion" "Inverted,Not inverted" textline " " bitfld.long 0x00 1.--3. " RMODE ,Receive operating mode" "Leader code,No leader code,?..." bitfld.long 0x00 0. " RECON ,IR receiver start" "Not started,Started" line.long 0x04 "IRCOMM,IR Command Register" hexmask.long.byte 0x04 8.--15. 1. " XCM ,Specified compo code" bitfld.long 0x04 5.--7. " ARC ,Acknowledge receive code" "Any code,Lower four bits match,Upper four bits match,Compo code match,,Lower four bits not match,Upper four bits not match,Compo code not match" textline " " bitfld.long 0x04 3. " ICC ,Instruction/compo code check" "Any compo/instruction code,Compo/instruction code inverted match" bitfld.long 0x04 0. " RCDM ,Receive code buffer mode" "RCODE11/RCODE21,RCODE11-12/RCODE21-22" line.long 0x08 "IRST,IR Status Register" bitfld.long 0x08 7. " RCDEND ,Frame receive code end status" "Not completed,Completed" bitfld.long 0x08 6. " RFREND ,Frame receive end status" "Not completed,Completed" textline " " rbitfld.long 0x08 0. " RSEL12 ,Receive code buffer specification status" "RCODE11-12,RCODE21-22" line.long 0x0C "CPD,CLKP Division Ratio Register" hexmask.long.word 0x0C 0.--12. 1. " CPD ,CLKP division ratio" line.long 0x10 "LDHL,Leader High Period Register" hexmask.long.word 0x10 16.--27. 1. " LDHU ,Leader high period upper limit" hexmask.long.word 0x10 0.--11. 1. " LDHL ,Leader high period lower limit" line.long 0x14 "LDLL,Leader Low Period Register" hexmask.long.word 0x14 16.--27. 1. " LDLU ,Leader low period upper limit" hexmask.long.word 0x14 0.--11. 1. " LDLL ,Leader low period lower limit" line.long 0x18 "BS0L,0 Bit Period Register" hexmask.long.word 0x18 16.--27. 1. " BS0U ,0 bit period upper limit" hexmask.long.word 0x18 0.--11. 1. " BS0L ,0 bit period lower limit" line.long 0x1C "BS1L,1 Bit Period Register" hexmask.long.word 0x1C 16.--27. 1. " BS1U ,1 bit period upper limit" hexmask.long.word 0x1C 0.--11. 1. " BS1L ,1 bit period lower limit" line.long 0x20 "BSHL,0 Or 1 Bit High Period Register" hexmask.long.word 0x20 16.--27. 1. " BSHU ,0 or 1 bit high period upper limit" hexmask.long.word 0x20 0.--11. 1. " BSHL ,0 or 1 bit high period lower limit" line.long 0x24 "TWP,Trailer Wait Time Register" hexmask.long.word 0x24 0.--15. 1. " TWP ,Trailer wait time" line.long 0x28 "RNOFBS,Receive Frame Total Bit Number Register" bitfld.long 0x28 11.--13. " TN ,Maximum number of times the receiver should attempt to receive a low or high level signal at the reception sampling frequency during leader code reception" "3,4,5,6,7,8,9,10" bitfld.long 0x28 8.--10. " DN ,Number of times the receiver should detect a low or high level signal consecutively to determine the pulse level (low or high) during leader code reception" "3,4,5,6,7,8,9,10" textline " " hexmask.long.byte 0x28 0.--6. 1. " RNOFBS ,Sets the total number of bits in a frame" rgroup.long 0x2C++0x0F line.long 0x00 "RCODE11,Receive Code 1-1" line.long 0x04 "RCODE12,Receive Code 1-2" line.long 0x08 "RCODE21,Receive Code 2-1" line.long 0x0C "RCODE22,Receive Code 2-2" width 0x0B tree.end tree "FM Multiplex Demodulator" base ad:0xFFC55000 width 13. group.word 0x00++0x1 line.word 0x00 "INTSTS,Interrupt Status" group.word 0x04++0x1 line.word 0x00 "INTENB,Interrupt Enable" group.word 0x08++0x1 line.word 0x00 "Y1RAMAC,Horizontal 1 Reception RAM Address Control" rgroup.word 0x0C++0x1 line.word 0x00 "Y1DPM,Horizontal 1 Reception Main Data Port" rgroup.word 0x10++0x1 line.word 0x00 "Y1DPS,Horizontal 1 Reception Sub Data Port" group.word 0x14++0x1 line.word 0x00 "RECCONM,Main Channel Reception Control" group.word 0x18++0x1 line.word 0x00 "SUBMODE,Sub Channel Mode" group.word 0x40++0x1 line.word 0x00 "BICERRPRM,No. Of Tolerable BIC Errors" group.word 0x44++0x1 line.word 0x00 "BSYNCPT,No. Of Protective Steps At (Rear Of) Block Synchronization" rgroup.word 0x48++0x1 line.word 0x00 "BSYNCMONM,Block Synchronization Monitor Main" rgroup.word 0x4C++0x1 line.word 0x00 "BSYNCMONS,Block Synchronization Monitor Sub" rgroup.word 0x50++0x1 line.word 0x00 "BITMONM,Bit Number Monitor Main" group.word 0x58++0x1 line.word 0x00 "FSYNCPT,No. Of Protective Steps At (Rear Of) Frame Synchronization" rgroup.word 0x5C++0x1 line.word 0x00 "FSYNCMON,Frame Synchronization Monitor" rgroup.word 0x60++0x1 line.word 0x00 "PKTNOMON,Packet Number Monitor" group.word 0x68++0x1 line.word 0x00 "TINTBNOM,Timing Interrupt Bit Number Main" group.word 0x6C++0x1 line.word 0x00 "TINTBNOS,Timing Interrupt Bit Number Sub" group.word 0x70++0x1 line.word 0x00 "FRECIVS,Sub Channel Frame Reception Interval Setting" group.word 0x74++0x1 line.word 0x00 "CONCUTIM,Main Channel/Sub Channel Connection/Disconnection Timing Setting" group.word 0x7C++0x1 line.word 0x00 "FRMFMT,Frame Format Setting" group.word 0xA0++0x1 line.word 0x00 "VICSMODE,VICS Mode" group.word 0xA4++0x1 line.word 0x00 "L4CRCDP,Layer 4 CRC Data Port" group.word 0xA8++0x1 line.word 0x00 "L4CRCREZ,Layer 4 CRC Result And Layer 4 CRC Data Port Clear" group.word 0xC0++0x1 line.word 0x00 "ACCONF,Input Switch" group.word 0xC4++0x1 line.word 0x00 "VCLKCTL,Clock Control" group.word 0xD0++0x1 line.word 0x00 "Y1INTSEL,Horizontal 1 Receive Interrupt Condition" group.word 0xD4++0x1 line.word 0x00 "SISEL,Service Identification (SI) Setting" rgroup.word 0xE0++0x1 line.word 0x00 "Y2RECDP,Horizontal 2 Receive Data Port" group.word 0xF8++0x1 line.word 0x00 "MEMCHCLR,Main Channel Clear" group.word 0x1E8++0x1 line.word 0x00 "TINTPNOSETM,Timing Interrupt Packet Number Main" group.word 0x1EC++0x1 line.word 0x00 "TINTPNOSETS,Timing Interrupt Packet Number Sub" rgroup.word 0x1FC++0x1 line.word 0x00 "REVID,Revision ID" width 0xB tree.end tree "Gyro-ADC IF" base ad:0xE6E54000 width 18. group.long 0x00++0x0f line.long 0x00 "MSR,Mode Select Register" bitfld.long 0x00 0.--1. " MODE_SEL ,These bits select the mode to match the ADC in use" "Mode 1 (MB88101A),Mode 2 (ADCS7476),,Mode 3 (MAX1162)" line.long 0x04 "SSSR,Start/Stop Setting Register" bitfld.long 0x04 0. " STAT ,Starts or stops operation of the Gyro-ADC IF and speed-pulse IF" "Stopped,Started" line.long 0x08 "ADCACLSR,ADC Access Clock Length Setting Register" hexmask.long.word 0x08 0.--9. 1. " ADC_CLOCK_LENGTH ,Set the count value to create the clock length per one clock cycle for accessing an ADC device" line.long 0x0c "125TLSR,1.25-ms Time Length Setting Register" hexmask.long.tbyte 0x0c 0.--16. 1. " 1.25MS ,Set the count value for creating a period of 1.25 ms" if (((per.l(ad:0xE6E54000))&0x3)==0x0) rgroup.long 0x10++0x0f line.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hexmask.long.word 0x0 0.--11. 1. " AD_CH0_DATA ,Realtime data (12 bits) of ch[0] is indicated in the AD_ch[0]_data[11:0] bits" line.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hexmask.long.word 0x4 0.--11. 1. " AD_CH1_DATA ,Realtime data (12 bits) of ch[1] is indicated in the AD_ch[1]_data[11:0] bits" line.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hexmask.long.word 0x8 0.--11. 1. " AD_CH2_DATA ,Realtime data (12 bits) of ch[2] is indicated in the AD_ch[2]_data[11:0] bits" line.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hexmask.long.word 0xC 0.--11. 1. " AD_CH3_DATA ,Realtime data (12 bits) of ch[3] is indicated in the AD_ch[3]_data[11:0] bits" elif (((per.l(ad:0xE6E54000))&0x3)==0x1) rgroup.long 0x10++0x1f line.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hexmask.long.word 0x0 0.--14. 1. " AD_CH0_DATA ,Realtime data (15 bits) of ch[0] is indicated in the AD_ch[0]_data[14:0] bits" line.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hexmask.long.word 0x4 0.--14. 1. " AD_CH1_DATA ,Realtime data (15 bits) of ch[1] is indicated in the AD_ch[1]_data[14:0] bits" line.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hexmask.long.word 0x8 0.--14. 1. " AD_CH2_DATA ,Realtime data (15 bits) of ch[2] is indicated in the AD_ch[2]_data[14:0] bits" line.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hexmask.long.word 0xC 0.--14. 1. " AD_CH3_DATA ,Realtime data (15 bits) of ch[3] is indicated in the AD_ch[3]_data[14:0] bits" line.long 0x10 "RDAR_4,Realtime Data Acquisition Register 4" hexmask.long.word 0x10 0.--14. 1. " AD_CH4_DATA ,Realtime data (15 bits) of ch[4] is indicated in the AD_ch[4]_data[14:0] bits" line.long 0x14 "RDAR_5,Realtime Data Acquisition Register 5" hexmask.long.word 0x14 0.--14. 1. " AD_CH5_DATA ,Realtime data (15 bits) of ch[5] is indicated in the AD_ch[5]_data[14:0] bits" line.long 0x18 "RDAR_6,Realtime Data Acquisition Register 6" hexmask.long.word 0x18 0.--14. 1. " AD_CH6_DATA ,Realtime data (15 bits) of ch[6] is indicated in the AD_ch[6]_data[14:0] bits" line.long 0x1C "RDAR_7,Realtime Data Acquisition Register 7" hexmask.long.word 0x1C 0.--14. 1. " AD_CH7_DATA ,Realtime data (15 bits) of ch[7] is indicated in the AD_ch[7]_data[14:0] bits" elif (((per.l(ad:0xE6E54000))&0x3)==0x3) rgroup.long 0x10++0x1f line.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hexmask.long.tbyte 0x0 0.--23. 1. " AD_CH0_DATA ,Realtime data (24 bits) of ch[0] is indicated in the AD_ch[0]_data[23:0] bits" line.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hexmask.long.tbyte 0x4 0.--23. 1. " AD_CH1_DATA ,Realtime data (24 bits) of ch[1] is indicated in the AD_ch[1]_data[23:0] bits" line.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hexmask.long.tbyte 0x8 0.--23. 1. " AD_CH2_DATA ,Realtime data (24 bits) of ch[2] is indicated in the AD_ch[2]_data[23:0] bits" line.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hexmask.long.tbyte 0xC 0.--23. 1. " AD_CH3_DATA ,Realtime data (24 bits) of ch[3] is indicated in the AD_ch[3]_data[23:0] bits" line.long 0x10 "RDAR_4,Realtime Data Acquisition Register 4" hexmask.long.tbyte 0x10 0.--23. 1. " AD_CH4_DATA ,Realtime data (24 bits) of ch[4] is indicated in the AD_ch[4]_data[23:0] bits" line.long 0x14 "RDAR_5,Realtime Data Acquisition Register 5" hexmask.long.tbyte 0x14 0.--23. 1. " AD_CH5_DATA ,Realtime data (24 bits) of ch[5] is indicated in the AD_ch[5]_data[23:0] bits" line.long 0x18 "RDAR_6,Realtime Data Acquisition Register 6" hexmask.long.tbyte 0x18 0.--23. 1. " AD_CH6_DATA ,Realtime data (24 bits) of ch[6] is indicated in the AD_ch[6]_data[23:0] bits" line.long 0x1C "RDAR_7,Realtime Data Acquisition Register 7" hexmask.long.tbyte 0x1C 0.--23. 1. " AD_CH7_DATA ,Realtime data (24 bits) of ch[7] is indicated in the AD_ch[7]_data[23:0] bits" else hgroup.long 0x10++0x1f hide.long 0x0 "RDAR_0,Realtime Data Acquisition Register 0" hide.long 0x4 "RDAR_1,Realtime Data Acquisition Register 1" hide.long 0x8 "RDAR_2,Realtime Data Acquisition Register 2" hide.long 0xC "RDAR_3,Realtime Data Acquisition Register 3" hide.long 0x10 "RDAR_4,Realtime Data Acquisition Register 4" hide.long 0x14 "RDAR_5,Realtime Data Acquisition Register 5" hide.long 0x18 "RDAR_6,Realtime Data Acquisition Register 6" hide.long 0x1C "RDAR_7,Realtime Data Acquisition Register 7" endif if (((per.l(ad:0xE6E54000))&0x3)==0x0) rgroup.long 0x30++0x0f line.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hexmask.long.word 0x0 0.--15. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[0] data items" line.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hexmask.long.word 0x4 0.--15. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[1] data items" line.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hexmask.long.word 0x8 0.--15. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[2] data items" line.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hexmask.long.word 0xC 0.--15. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 12bit ch[3] data items" elif (((per.l(ad:0xE6E54000))&0x3)==0x1) rgroup.long 0x30++0x1f line.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hexmask.long.tbyte 0x0 0.--18. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[0] data items" line.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hexmask.long.tbyte 0x4 0.--18. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[1] data items" line.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hexmask.long.tbyte 0x8 0.--18. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[2] data items" line.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hexmask.long.tbyte 0xC 0.--18. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[3] data items" line.long 0x10 "100ADAR_4,100-ms Added Data Acquisition Register 4" hexmask.long.tbyte 0x10 0.--18. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[4] data items" line.long 0x14 "100ADAR_5,100-ms Added Data Acquisition Register 5" hexmask.long.tbyte 0x14 0.--18. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[5] data items" line.long 0x18 "100ADAR_6,100-ms Added Data Acquisition Register 6" hexmask.long.tbyte 0x18 0.--18. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[6] data items" line.long 0x1C "100ADAR_7,100-ms Added Data Acquisition Register 7" hexmask.long.tbyte 0x1C 0.--18. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[7] data items" elif (((per.l(ad:0xE6E54000))&0x3)==0x3) rgroup.long 0x30++0x1f line.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hexmask.long 0x0 0.--27. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[0] data items" line.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hexmask.long 0x4 0.--27. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[1] data items" line.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hexmask.long 0x8 0.--27. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[2] data items" line.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hexmask.long 0xC 0.--27. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[3] data items" line.long 0x10 "100ADAR_4,100-ms Added Data Acquisition Register 4" hexmask.long 0x10 0.--27. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[4] data items" line.long 0x14 "100ADAR_5,100-ms Added Data Acquisition Register 5" hexmask.long 0x14 0.--27. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[5] data items" line.long 0x18 "100ADAR_6,100-ms Added Data Acquisition Register 6" hexmask.long 0x18 0.--27. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[6] data items" line.long 0x1C "100ADAR_7,100-ms Added Data Acquisition Register 7" hexmask.long 0x1C 0.--27. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 24bit ch[7] data items" else hgroup.long 0x30++0x1f hide.long 0x0 "100ADAR_0,100-ms Added Data Acquisition Register 0" hide.long 0x4 "100ADAR_1,100-ms Added Data Acquisition Register 1" hide.long 0x8 "100ADAR_2,100-ms Added Data Acquisition Register 2" hide.long 0xC "100ADAR_3,100-ms Added Data Acquisition Register 3" hide.long 0x10 "100ADAR_4,100-ms Added Data Acquisition Register 4" hide.long 0x14 "100ADAR_5,100-ms Added Data Acquisition Register 5" hide.long 0x18 "100ADAR_6,100-ms Added Data Acquisition Register 6" hide.long 0x1C "100ADAR_7,100-ms Added Data Acquisition Register 7" endif if (((per.l(ad:0xE6E54000))&0x3)==(0x1||0x3)) rgroup.long 0x50++0x1f line.long 0x0 "32WFIFOR8TAV_0,AD ch[0] 10ms data FIFO" hexmask.long.word 0x0 0.--15. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[0] data items" line.long 0x4 "32WFIFOR8TAV_1,AD ch[1] 10ms data FIFO" hexmask.long.word 0x4 0.--15. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[1] data items" line.long 0x8 "32WFIFOR8TAV_2,AD ch[2] 10ms data FIFO" hexmask.long.word 0x8 0.--15. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[2] data items" line.long 0xC "32WFIFOR8TAV_3,AD ch[3] 10ms data FIFO" hexmask.long.word 0xC 0.--15. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[3] data items" line.long 0x10 "32WFIFOR8TAV_4,AD ch[4] 10ms data FIFO" hexmask.long.word 0x10 0.--15. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[4] data items" line.long 0x14 "32WFIFOR8TAV_5,AD ch[5] 10ms data FIFO" hexmask.long.word 0x14 0.--15. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[5] data items" line.long 0x18 "32WFIFOR8TAV_6,AD ch[6] 10ms data FIFO" hexmask.long.word 0x18 0.--15. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[6] data items" line.long 0x1C "32WFIFOR8TAV_7,AD ch[7] 10ms data FIFO" hexmask.long.word 0x1C 0.--15. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[7] data items" elif (((per.l(ad:0xE6E54000))&0x3)==0x3) rgroup.long 0x50++0x1f line.long 0x0 "32WFIFOR8TAV_0,AD ch[0] 10ms data FIFO" hexmask.long.word 0x0 0.--14. 1. " AD_CH0_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[0] data items" line.long 0x4 "32WFIFOR8TAV_1,AD ch[1] 10ms data FIFO" hexmask.long.word 0x4 0.--14. 1. " AD_CH1_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[1] data items" line.long 0x8 "32WFIFOR8TAV_2,AD ch[2] 10ms data FIFO" hexmask.long.word 0x8 0.--14. 1. " AD_CH2_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[2] data items" line.long 0xC "32WFIFOR8TAV_3,AD ch[3] 10ms data FIFO" hexmask.long.word 0xC 0.--14. 1. " AD_CH3_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[3] data items" line.long 0x10 "32WFIFOR8TAV_4,AD ch[4] 10ms data FIFO" hexmask.long.word 0x10 0.--14. 1. " AD_CH4_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[4] data items" line.long 0x14 "32WFIFOR8TAV_5,AD ch[5] 10ms data FIFO" hexmask.long.word 0x14 0.--14. 1. " AD_CH5_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[5] data items" line.long 0x18 "32WFIFOR8TAV_6,AD ch[6] 10ms data FIFO" hexmask.long.word 0x18 0.--14. 1. " AD_CH6_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[6] data items" line.long 0x1C "32WFIFOR8TAV_7,AD ch[7] 10ms data FIFO" hexmask.long.word 0x1C 0.--14. 1. " AD_CH7_ADD_DATA ,Data obtained by adding average value of eight 15bit ch[7] data items" else hgroup.long 0x50++0x1f hide.long 0x0 "32WFIFOR8TAV_0,AD ch[0] 10ms data FIFO" hide.long 0x4 "32WFIFOR8TAV_1,AD ch[1] 10ms data FIFO" hide.long 0x8 "32WFIFOR8TAV_2,AD ch[2] 10ms data FIFO" hide.long 0xC "32WFIFOR8TAV_3,AD ch[3] 10ms data FIFO" hide.long 0x10 "32WFIFOR8TAV_4,AD ch[4] 10ms data FIFO" hide.long 0x14 "32WFIFOR8TAV_5,AD ch[5] 10ms data FIFO" hide.long 0x18 "32WFIFOR8TAV_6,AD ch[6] 10ms data FIFO" hide.long 0x1C "32WFIFOR8TAV_7,AD ch[7] 10ms data FIFO" endif sif (cpu()=="RCARM2")||(cpu()=="R8A7792X") group.long 0x70++0x03 line.long 0x00 "FIFOSR,FIFO Status Register" eventfld.long 0x00 30. " CH[7]_ERROR ,Channel 7 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 29. " CH[7]_FULL ,Channel 7 FIFO full" "Not full,Full" rbitfld.long 0x00 28. " CH[7]_EMPTY ,Channel 7 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 26. " CH[6]_ERROR ,Channel 6 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 25. " CH[6]_FULL ,Channel 6 FIFO full" "Not full,Full" rbitfld.long 0x00 24. " CH[6]_EMPTY ,Channel 6 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 22. " CH[5]_ERROR ,Channel 5 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 21. " CH[5]_FULL ,Channel 5 FIFO full" "Not full,Full" rbitfld.long 0x00 20. " CH[5]_EMPTY ,Channel 5 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 18. " CH[4]_ERROR ,Channel 4 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 17. " CH[4]_FULL ,Channel 4 FIFO full" "Not full,Full" rbitfld.long 0x00 16. " CH[4]_EMPTY ,Channel 4 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 14. " CH[3]_ERROR ,Channel 3 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 13. " CH[3]_FULL ,Channel 3 FIFO full" "Not full,Full" rbitfld.long 0x00 12. " CH[3]_EMPTY ,Channel 3 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 10. " CH[2]_ERROR ,Channel 2 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 9. " CH[2]_FULL ,Channel 2 FIFO full" "Not full,Full" rbitfld.long 0x00 8. " CH[2]_EMPTY ,Channel 2 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 6. " CH[1]_ERROR ,Channel 1 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 5. " CH[1]_FULL ,Channel 1 FIFO full" "Not full,Full" rbitfld.long 0x00 4. " CH[1]_EMPTY ,Channel 1 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 2. " CH[0]_ERROR ,Channel 0 error [read/write]" "No error/No effect,Error/Cleared" rbitfld.long 0x00 1. " CH[0]_FULL ,Channel 0 FIFO full" "Not full,Full" rbitfld.long 0x00 0. " CH[0]_EMPTY ,Channel 0 FIFO empty" "Not empty,Empty" else group.long 0x70++0x03 line.long 0x00 "FIFOSR,FIFO Status Register" eventfld.long 0x00 30. " CH[7]_ERROR ,Channel 7 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 29. " CH[7]_FULL ,Channel 7 FIFO full" "Not full,Full" bitfld.long 0x00 28. " CH[7]_EMPTY ,Channel 7 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 26. " CH[6]_ERROR ,Channel 6 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 25. " CH[6]_FULL ,Channel 6 FIFO full" "Not full,Full" bitfld.long 0x00 24. " CH[6]_EMPTY ,Channel 6 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 22. " CH[5]_ERROR ,Channel 5 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 21. " CH[5]_FULL ,Channel 5 FIFO full" "Not full,Full" bitfld.long 0x00 20. " CH[5]_EMPTY ,Channel 5 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 18. " CH[4]_ERROR ,Channel 4 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 17. " CH[4]_FULL ,Channel 4 FIFO full" "Not full,Full" bitfld.long 0x00 16. " CH[4]_EMPTY ,Channel 4 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 14. " CH[3]_ERROR ,Channel 3 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 13. " CH[3]_FULL ,Channel 3 FIFO full" "Not full,Full" bitfld.long 0x00 12. " CH[3]_EMPTY ,Channel 3 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 10. " CH[2]_ERROR ,Channel 2 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 9. " CH[2]_FULL ,Channel 2 FIFO full" "Not full,Full" bitfld.long 0x00 8. " CH[2]_EMPTY ,Channel 2 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 6. " CH[1]_ERROR ,Channel 1 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 5. " CH[1]_FULL ,Channel 1 FIFO full" "Not full,Full" bitfld.long 0x00 4. " CH[1]_EMPTY ,Channel 1 FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 2. " CH[0]_ERROR ,Channel 0 error [read/write]" "No error/No effect,Error/Cleared" bitfld.long 0x00 1. " CH[0]_FULL ,Channel 0 FIFO full" "Not full,Full" bitfld.long 0x00 0. " CH[0]_EMPTY ,Channel 0 FIFO empty" "Not empty,Empty" endif sif (cpu()=="R8A7792X") group.long 0x74++0x03 line.long 0x00 "INTR,Interrupt Register" bitfld.long 0x00 0. " INT ,Interrupt signal assertion" "Not asserted,Asserted" group.long 0x78++0x03 line.long 0x00 "INTENR,Interrupt Enable Register" bitfld.long 0x00 0. " INTEN ,Interrupt request enable" "Disabled,Enabled" endif textline " " width 0xb tree.end tree "Speed-Pulse IF" base ad:0xE6E55000 width 12. group.long 0x00++0x0b line.long 0x00 "SPCDR,Speed Pulse Count Data Register" hexmask.long.word 0x00 0.--15. 1. " SPEED_DATA ,Indicate the speed pulse count in realtime" line.long 0x04 "SPFSR,Speed Pulse Filter Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " NF_SET ,Specify the value to count (nf_clk) for obtaining the time constant for the filter" line.long 0x08 "SPCCR,Speed Pulse Count Clearing Register" bitfld.long 0x08 0. " CCLR ,Restarts the speed pulse counters" "No restart,Restart" rgroup.long 0x0c++0x07 line.long 0x00 "SP100LDR,Speed Pulse 100-ms Latch Data Register" hexmask.long.word 0x00 0.--15. 1. " SPEED_100MS ,Indicate the value obtained by latching the speed pulse count data every 100 ms" line.long 0x04 "100INTCR,100-ms INT Count Register" bitfld.long 0x04 0.--3. " INT_COUNT ,Indicate the count incremented in synchronization with the INT_100ms interrupt signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x18++0x03 line.long 0x00 "INTSCR,INT Status and Clear Register" eventfld.long 0x00 0. " INT ,Indicates whether an interrupt by a 100-ms-cycle trigger has occurred [read/write]" "No interrupt/No effect,Interupt/Cleared" rgroup.long 0x100++0x13 line.long 0x00 "SPOFAR,Speed Pulse Offset A Register" hexmask.long.tbyte 0x00 0.--23. 1. " SPEED_OFFSET_DATA_A ,Indicate the time elapsed since the latest rising edge of the speed pulse signal until the speed pulse count data register is read" line.long 0x04 "SPOFBR,Speed Pulse Offset B Register" hexmask.long.tbyte 0x04 0.--23. 1. " SPEED_OFFSET_DATA_B ,Indicate the time elapsed since the latest rising edge of the speed pulse signal until a 100-ms-cycle trigger" line.long 0x08 "SPWR,Speed Pulse Width Register" hexmask.long.tbyte 0x08 0.--23. 1. " SPEED_WIDTH_DATA ,Indicate the width of the latest speed pulse" line.long 0x0c "SPOBAR,Speed Pulse Observe A Register" hexmask.long.tbyte 0x0c 0.--23. 1. " SPEED_OBSERVE_DATA_A ,Indicate the time between the rising edges of the speed pulse signal immediately before the speed pulse count data register is read" line.long 0x10 "SPOBBR,Speed Pulse Observe B Register" hexmask.long.tbyte 0x10 0.--23. 1. " SPEED_OBSERVE_DATA_B ,Indicate the time between the rising edges of the speed pulse signal immediately before a 100-ms-cycle trigger" group.long 0x114++0x0b line.long 0x00 "SPWCR,Speed Pulse Width Clearing Register" bitfld.long 0x00 0. " WCLR ,The following counter register values are reset through manipulation of this bit [elapsed time, pulse width, and observation period register]" "Counting is started,Values are kept at 0" line.long 0x04 "SPWTR,Speed Pulse Width Test Register" line.long 0x08 "500KHZFCSR,500-kHz Freq. Count Setting Register" hexmask.long.byte 0x08 0.--7. 1. " 2US ,Specify the count value for creating 2 us" width 0xb tree.end tree "THS/TSC (Thermal Sensor)" base ad:0xE61F0000 width 10. rgroup.long 0x10++0x3 line.long 0x00 "STR,Interrupt status register" bitfld.long 0x00 30. " PRTFLG ,Interrupt Temperature Status Flag" "Normal,Exceed" bitfld.long 0x00 3. " TJ03ST ,TJ03ST Detection Status" "Not detected,Detected" bitfld.long 0x00 2. " TJ02ST ,TJ02ST Detection Status" "Not detected,Detected" textline " " bitfld.long 0x00 1. " TJ01ST ,TJ01ST Detection Status" "Not detected,Detected" bitfld.long 0x00 0. " TJ00ST ,TJ00ST Detection Status" "Not detected,Detected" group.long 0x14++0x7 line.long 0x00 "ENR,Interrupt Enable Register" bitfld.long 0x00 3. " TJ03_EN ,Tj03 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TJ02_EN ,Tj02 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " TJ01_EN ,Tj01 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " TJ00_EN ,Tj00 interrupt enable" "Disabled,Enabled" line.long 0x04 "INT_MSK,Interrupt Mask Register" bitfld.long 0x04 3. " TJ03INT_MSK ,Tj03 interrupt request masked" "Not masked,Masked" bitfld.long 0x04 2. " TJ02INT_MSK ,Tj02 interrupt request masked" "Not masked,Masked" bitfld.long 0x04 1. " TJ01INT_MSK ,Tj01 interrupt request masked" "Not masked,Masked" bitfld.long 0x04 0. " TJ00INT_MSK ,Tj00 interrupt request masked" "Not masked,Masked" group.long 0x20++0xF line.long 0x00 "POSNEG,Positive/Negative Logic Select Register" bitfld.long 0x00 3. " POSNEG3 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 2. " POSNEG2 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 1. " POSNEG1 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 0. " POSNEG0 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" line.long 0x04 "EDGLEVEL,Edge/Level Sensing Select Register" bitfld.long 0x04 3. " EDGLEVEL3 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 2. " EDGLEVEL2 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 1. " EDGLEVEL1 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 0. " EDGLEVEL0 ,Specifies the method to detect interrupt signal input" ",Edge" line.long 0x08 "FILONOFF,Chattering Prevention ON/OFF Setting Register" bitfld.long 0x08 3. " FILONOFF3 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 2. " FILONOFF2 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 1. " FILONOFF1 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 0. " FILONOFF0 ,Turns on or off the chattering prevention circuit" "Off,On" line.long 0x0C "THSCR,THS Control Register" bitfld.long 0x0C 12. " CPCTL ,Specifies the method to set the offset (CPTAP) of the comparator in the THS" "CPTAP3-0 bits,Automatically by hardware" bitfld.long 0x0C 8.--9. " THIDLE ,Selects either the normal operating state or the idle state of the THS" "Normal,,Normal/output stopped,Idle" bitfld.long 0x0C 4.--7. " RFTAP[3:0] ,Sets an offset value (RFTAP) of the op amp in the THS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " CPTAP[3:0] ,Sets the offset value (CPTAP) of the comparator in the THS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x30++0x3 line.long 0x00 "THSSR,THS Status Register" bitfld.long 0x00 0.--5. " CTEMP[5:0] ,Indicates the current temperature" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x34++0x3 line.long 0x00 "INTCTLR,Interrupt Control Register " bitfld.long 0x00 24.--29. " CTEMP3 ,Indicates the temperature that causes an INTDT3 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CTEMP2 ,Indicates the temperature that causes an INTDT2 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CTEMP1 ,Indicates the temperature that causes an INTDT1 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CTEMP0 ,Indicates the temperature that causes an INTDT0 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0xb tree.end tree "SYSC (System Controller)" base ad:0xE6180000 width 14. tree "Common Registers" rgroup.long 0x00++0x7 line.long 0x00 "SYSCSR,SYSC Status Register" bitfld.long 0x00 1. " PONENB ,SYSC is ready to accept power resume requests" "Not ready,Ready" bitfld.long 0x00 0. " POFFENB ,SYSC is ready to accept power shutoff requests" "Not ready,Ready" line.long 0x04 "SYSCISR,Interrupt Status Register" sif cpu()!="R8A77420" bitfld.long 0x04 24. " IMP ,Completion of the IMP-X3 power shutoff or power resume processing" "Not completed,Completed" endif bitfld.long 0x04 21. " CA7_SCU ,Completion of the CA7-SCU power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 20. " RGX ,Completion of the RGX power shutoff or power resume processing" "Not completed,Completed" textline " " bitfld.long 0x04 12. " CA15_SCU ,Completion of the CA15-SCU power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 8. " CA7_CPU3 ,Completion of the CA7-CPU3 power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 7. " CA7_CPU2 ,Completion of the CA7-CPU2 power shutoff or power resume processing" "Not completed,Completed" textline " " bitfld.long 0x04 6. " CA7_CPU1 ,Completion of the CA7-CPU1 power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 5. " CA7_CPU0 ,Completion of the CA7-CPU0 power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 3. " CA15_CPU3 ,Completion of the CA15-CPU3 power shutoff or power resume processing" "Not completed,Completed" textline " " bitfld.long 0x04 2. " CA15_CPU2 ,Completion of the CA15-CPU2 power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 1. " CA15_CPU1 ,Completion of the CA15-CPU1 power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 0. " CA15_CPU0 ,Completion of the CA15-CPU0 power shutoff or power resume processing" "Not completed,Completed" wgroup.long 0x08++0x3 line.long 0x00 "SYSCISCR,Interrupt Status Clear Register" sif cpu()!="R8A77420" bitfld.long 0x00 24. " IMP ,Clears the IMP bit in the interrupt status register" "No effect,Clear" endif bitfld.long 0x00 21. " CA7_SCU ,Clears the CA7-SCU bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 20. " RGX ,Clears the RGX bit in the interrupt status register" "No effect,Clear" textline " " bitfld.long 0x00 12. " CA15_SCU ,Clears the CA15-SCU bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 8. " CA7_CPU3 ,Clears the CA7-CPU3 bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 7. " CA7_CPU2 ,Clears the CA7-CPU2 bit in the interrupt status register" "No effect,Clear" textline " " bitfld.long 0x00 6. " CA7_CPU1 ,Clears the CA7-CPU1 bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 5. " CA7_CPU0 ,Clears the CA7-CPU0 bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 3. " CA15_CPU3 ,Clears the CA15-CPU3 bit in the interrupt status register" "No effect,Clear" textline " " bitfld.long 0x00 2. " CA15_CPU2 ,Clears the CA15-CPU2 bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 1. " CA15_CPU1 ,Clears the CA15-CPU1 bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 0. " CA15_CPU0 ,Clears the CA15-CPU0 bit in the interrupt status register" "No effect,Clear" group.long 0x0C++0x7 line.long 0x00 "SYSCIER,Interrupt Enable Register" sif cpu()!="R8A77420" bitfld.long 0x00 24. " IMP ,IMP-X3 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" endif bitfld.long 0x00 21. " CA7_SCU ,CA7-SCU power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " RGX ,RGX power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " CA15_SCU ,CA15-SCU power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " CA7_CPU3 ,CA7-CPU3 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " CA7_CPU2 ,CA7-CPU2 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CA7_CPU1 ,CA7-CPU1 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " CA7_CPU0 ,CA7-CPU0 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " CA15_CPU3 ,CA15-CPU3 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CA15_CPU2 ,CA15-CPU2 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " CA15_CPU1 ,CA15-CPU1 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " CA15_CPU0 ,CA15-CPU0 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" line.long 0x04 "SYSCIMR,Interrupt Mask Register" sif cpu()!="R8A77420" bitfld.long 0x04 24. " IMP ,IMP-X3 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" endif bitfld.long 0x04 21. " CA7_SCU ,CA7-SCU power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 20. " RGX ,RGX power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " CA15_SCU ,CA15-SCU power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 8. " CA7_CPU3 ,CA7-CPU3 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 7. " CA7_CPU2 ,CA7-CPU2 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x04 6. " CA7_CPU1 ,CA7-CPU1 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 5. " CA7_CPU0 ,CA7-CPU0 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 3. " CA15_CPU3 ,CA15-CPU3 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x04 2. " CA15_CPU2 ,CA15-CPU2 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 1. " CA15_CPU1 ,CA15-CPU1 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 0. " CA15_CPU0 ,CA15-CPU0 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" if (((per.l(ad:0xE6180000+0x04))&0x1000)==0x1000) group.long 0x14++0x3 line.long 0x00 "WUPMSKCA15,CA15 Wake Up Mask Register" sif cpu()=="R8A77420" bitfld.long 0x00 19. " CSD3 ,Wake up CA15 CPU3 + SCU area when receiving CSD3 factor enable" "Enabled,Disabled" bitfld.long 0x00 18. " CSD2 ,Wake up CA15 CPU2 + SCU area when receiving CSD2 factor enable" "Enabled,Disabled" bitfld.long 0x00 17. " CSD1 ,Wake up CA15 CPU1 + SCU area when receiving CSD1 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 16. " CSD0 ,Wake up CA15 CPU0 + SCU area when receiving CSD0 factor enable" "Enabled,Disabled" bitfld.long 0x00 11. " FIQ3 ,Wake up CA15 CPU3 + SCU area when receiving FIQ3 factor enable" "Enabled,Disabled" bitfld.long 0x00 10. " FIQ2 ,Wake up CA15 CPU2 + SCU area when receiving FIQ2 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 9. " FIQ1 ,Wake up CA15 CPU1 + SCU area when receiving FIQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 8. " FIQ0 ,Wake up CA15 CPU0 + SCU area when receiving FIQ0 factor enable" "Enabled,Disabled" else bitfld.long 0x00 11. " CSD3 ,Wake up CA15 CPU3 + SCU area when receiving CSD3 factor enable" "Enabled,Disabled" bitfld.long 0x00 10. " CSD2 ,Wake up CA15 CPU2 + SCU area when receiving CSD2 factor enable" "Enabled,Disabled" bitfld.long 0x00 9. " CSD1 ,Wake up CA15 CPU1 + SCU area when receiving CSD1 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " CSD0 ,Wake up CA15 CPU0 + SCU area when receiving CSD0 factor enable" "Enabled,Disabled" bitfld.long 0x00 7. " FIQ3 ,Wake up CA15 CPU3 + SCU area when receiving FIQ3 factor enable" "Enabled,Disabled" bitfld.long 0x00 6. " FIQ2 ,Wake up CA15 CPU2 + SCU area when receiving FIQ2 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 5. " FIQ1 ,Wake up CA15 CPU1 + SCU area when receiving FIQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 4. " FIQ0 ,Wake up CA15 CPU0 + SCU area when receiving FIQ0 factor enable" "Enabled,Disabled" endif bitfld.long 0x00 3. " IRQ3 ,Wake up CA15 CPU3 + SCU area when receiving IRQ3 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " IRQ2 ,Wake up CA15 CPU2 + SCU area when receiving IRQ2 factor enable" "Enabled,Disabled" bitfld.long 0x00 1. " IRQ1 ,Wake up CA15 CPU1 + SCU area when receiving IRQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 0. " IRQ0 ,Wake up CA15 CPU0 + SCU area when receiving IRQ0 factor enable" "Enabled,Disabled" else hgroup.long 0x14++0x3 hide.long 0x00 "WUPMSKCA15,CA15 Wake Up Mask Register" endif if (((per.l(ad:0xE6180000+0x04))&0x200000)==0x200000) group.long 0x18++0x3 line.long 0x00 "WUPMSKCA7,CA7 Wake Up Mask Register" sif cpu()=="R8A77420" bitfld.long 0x00 19. " CSD3 ,Wake up CA7 CPU3 + SCU area when receiving CSD3 factor enable" "Enabled,Disabled" bitfld.long 0x00 18. " CSD2 ,Wake up CA7 CPU2 + SCU area when receiving CSD2 factor enable" "Enabled,Disabled" bitfld.long 0x00 17. " CSD1 ,Wake up CA7 CPU1 + SCU area when receiving CSD1 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 16. " CSD0 ,Wake up CA7 CPU0 + SCU area when receiving CSD0 factor enable" "Enabled,Disabled" bitfld.long 0x00 11. " FIQ3 ,Wake up CA7 CPU3 + SCU area when receiving FIQ3 factor enable" "Enabled,Disabled" bitfld.long 0x00 10. " FIQ2 ,Wake up CA7 CPU2 + SCU area when receiving FIQ2 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 9. " FIQ1 ,Wake up CA7 CPU1 + SCU area when receiving FIQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 8. " FIQ0 ,Wake up CA7 CPU0 + SCU area when receiving FIQ0 factor enable" "Enabled,Disabled" else bitfld.long 0x00 11. " CSD3 ,Wake up CA7 CPU3 + SCU area when receiving CSD3 factor enable" "Enabled,Disabled" bitfld.long 0x00 10. " CSD2 ,Wake up CA7 CPU2 + SCU area when receiving CSD2 factor enable" "Enabled,Disabled" bitfld.long 0x00 9. " CSD1 ,Wake up CA7 CPU1 + SCU area when receiving CSD1 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " CSD0 ,Wake up CA7 CPU0 + SCU area when receiving CSD0 factor enable" "Enabled,Disabled" bitfld.long 0x00 7. " FIQ3 ,Wake up CA7 CPU3 + SCU area when receiving FIQ3 factor enable" "Enabled,Disabled" bitfld.long 0x00 6. " FIQ2 ,Wake up CA7 CPU2 + SCU area when receiving FIQ2 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 5. " FIQ1 ,Wake up CA7 CPU1 + SCU area when receiving FIQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 4. " FIQ0 ,Wake up CA7 CPU0 + SCU area when receiving FIQ0 factor enable" "Enabled,Disabled" endif bitfld.long 0x00 3. " IRQ3 ,Wake up CA7 CPU3 + SCU area when receiving IRQ3 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " IRQ2 ,Wake up CA7 CPU2 + SCU area when receiving IRQ2 factor enable" "Enabled,Disabled" bitfld.long 0x00 1. " IRQ1 ,Wake up CA7 CPU1 + SCU area when receiving IRQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 0. " IRQ0 ,Wake up CA7 CPU0 + SCU area when receiving IRQ0 factor enable" "Enabled,Disabled" else hgroup.long 0x18++0x3 hide.long 0x00 "WUPMSKCA7,CA7 Wake Up Mask Register" endif rgroup.long 0x20++0x3 line.long 0x00 "SYSCEERSR,External Event Request Status Register" bitfld.long 0x00 11. " FIQ_CA15[3] ,Power resume request due to an FIQ interrupt accepted by the CA15 CPU3" "Not accepted,Accepted" bitfld.long 0x00 10. " FIQ_CA15[2] ,Power resume request due to an FIQ interrupt accepted by the CA15 CPU2" "Not accepted,Accepted" bitfld.long 0x00 9. " FIQ_CA15[1] ,Power resume request due to an FIQ interrupt accepted by the CA15 CPU1" "Not accepted,Accepted" textline " " bitfld.long 0x00 8. " FIQ_CA15[0] ,Power resume request due to an FIQ interrupt accepted by the CA15 CPU0" "Not accepted,Accepted" bitfld.long 0x00 7. " IRQ_CA15[3] ,Power resume request due to an IRQ interrupt accepted by the CA15 CPU3" "Not accepted,Accepted" bitfld.long 0x00 6. " IRQ_CA15[2] ,Power resume request due to an IRQ interrupt accepted by the CA15 CPU2" "Not accepted,Accepted" textline " " bitfld.long 0x00 5. " IRQ_CA15[1] ,Power resume request due to an IRQ interrupt accepted by the CA15 CPU1" "Not accepted,Accepted" bitfld.long 0x00 4. " IRQ_CA15[0] ,Power resume request due to an IRQ interrupt accepted by the CA15 CPU0" "Not accepted,Accepted" sif cpu()!="R8A77420" bitfld.long 0x00 3. " WFI_CA15[3] ,Power resume request due to an WFI instruction execution accepted by the CA15 CPU3" "Not accepted,Accepted" textline " " bitfld.long 0x00 2. " WFI_CA15[2] ,Power resume request due to an WFI instruction execution accepted by the CA15 CPU2" "Not accepted,Accepted" bitfld.long 0x00 1. " WFI_CA15[1] ,Power resume request due to an WFI instruction execution accepted by the CA15 CPU1" "Not accepted,Accepted" bitfld.long 0x00 0. " WFI_CA15[0] ,Power resume request due to an WFI instruction execution accepted by the CA15 CPU0" "Not accepted,Accepted" endif wgroup.long 0x24++0x3 line.long 0x00 "SYSCEERSCR,External Event Request Status Clear Register" bitfld.long 0x00 11. " FIQ_CA15[3] ,Clears the FIQ_CA15[3] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 10. " FIQ_CA15[2] ,Clears the FIQ_CA15[2] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 9. " FIQ_CA15[1] ,Clears the FIQ_CA15[1] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 8. " FIQ_CA15[0] ,Clears the FIQ_CA15[0] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 7. " IRQ_CA15[3] ,Clears the IRQ_CA15[3] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 6. " IRQ_CA15[2] ,Clears the IRQ_CA15[2] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 5. " IRQ_CA15[1] ,Clears the IRQ_CA15[1] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 4. " IRQ_CA15[0] ,Clears the IRQ_CA15[0] bit in the external event request status register" "No effect,Clear" sif cpu()!="R8A77420" bitfld.long 0x00 3. " WFI_CA15[3] ,Clears the WFI_CA15[3] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 2. " WFI_CA15[2] ,Clears the WFI_CA15[2] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 1. " WFI_CA15[1] ,Clears the WFI_CA15[1] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 0. " WFI_CA15[0] ,Clears the WFI_CA15[0] bit in the external event request status register" "No effect,Clear" endif group.long 0x28++0x3 line.long 0x00 "SYSCEERSER,External Event Request Status Enable Register" bitfld.long 0x00 11. " FIQ_CA15[3] ,CA15 CPU3 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " FIQ_CA15[2] ,CA15 CPU2 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " FIQ_CA15[1] ,CA15 CPU1 FIQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " FIQ_CA15[0] ,CA15 CPU0 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " IRQ_CA15[3] ,CA15 CPU3 IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " IRQ_CA15[2] ,CA15 CPU2 IRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " IRQ_CA15[1] ,CA15 CPU1 IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " IRQ_CA15[0] ,CA15 CPU0 IRQ interrupt enable" "Disabled,Enabled" sif cpu()!="R8A77420" bitfld.long 0x00 3. " WFI_CA15[3] ,CA15 CPU3 WFI external event interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " WFI_CA15[2] ,CA15 CPU2 WFI external event interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " WFI_CA15[1] ,CA15 CPU1 WFI external event interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " WFI_CA15[0] ,CA15 CPU0 WFI external event interrupt enable" "Disabled,Enabled" endif rgroup.long 0x2C++0x3 line.long 0x00 "SYSCEERSR2,External Event Request Status Register 2" bitfld.long 0x00 11. " FIQ_CA7[3] ,Power resume request due to an FIQ interrupt accepted by the CA7 CPU3" "Not accepted,Accepted" bitfld.long 0x00 10. " FIQ_CA7[2] ,Power resume request due to an FIQ interrupt accepted by the CA7 CPU2" "Not accepted,Accepted" bitfld.long 0x00 9. " FIQ_CA7[1] ,Power resume request due to an FIQ interrupt accepted by the CA7 CPU1" "Not accepted,Accepted" textline " " bitfld.long 0x00 8. " FIQ_CA7[0] ,Power resume request due to an FIQ interrupt accepted by the CA7 CPU0" "Not accepted,Accepted" bitfld.long 0x00 7. " IRQ_CA7[3] ,Power resume request due to an IRQ interrupt accepted by the CA7 CPU3" "Not accepted,Accepted" bitfld.long 0x00 6. " IRQ_CA7[2] ,Power resume request due to an IRQ interrupt accepted by the CA7 CPU2" "Not accepted,Accepted" textline " " bitfld.long 0x00 5. " IRQ_CA7[1] ,Power resume request due to an IRQ interrupt accepted by the CA7 CPU1" "Not accepted,Accepted" bitfld.long 0x00 4. " IRQ_CA7[0] ,Power resume request due to an IRQ interrupt accepted by the CA7 CPU0" "Not accepted,Accepted" sif cpu()!="R8A77420" bitfld.long 0x00 3. " WFI_CA7[3] ,Power resume request due to an WFI instruction execution accepted by the CA7 CPU3" "Not accepted,Accepted" textline " " bitfld.long 0x00 2. " WFI_CA7[2] ,Power resume request due to an WFI instruction execution accepted by the CA7 CPU2" "Not accepted,Accepted" bitfld.long 0x00 1. " WFI_CA7[1] ,Power resume request due to an WFI instruction execution accepted by the CA7 CPU1" "Not accepted,Accepted" bitfld.long 0x00 0. " WFI_CA7[0] ,Power resume request due to an WFI instruction execution accepted by the CA7 CPU0" "Not accepted,Accepted" endif wgroup.long 0x30++0x3 line.long 0x00 "SYSCOFSCR2,External Event Request Status Clear Register 2" bitfld.long 0x00 11. " FIQ_CA7[3] ,Clears the FIQ_CA7[3] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 10. " FIQ_CA7[2] ,Clears the FIQ_CA7[2] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 9. " FIQ_CA7[1] ,Clears the FIQ_CA7[1] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 8. " FIQ_CA7[0] ,Clears the FIQ_CA7[0] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 7. " IRQ_CA7[3] ,Clears the IRQ_CA7[3] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 6. " IRQ_CA7[2] ,Clears the IRQ_CA7[2] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 5. " IRQ_CA7[1] ,Clears the IRQ_CA7[1] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 4. " IRQ_CA7[0] ,Clears the IRQ_CA7[0] bit in the external event request status register" "No effect,Clear" sif cpu()!="R8A77420" bitfld.long 0x00 3. " WFI_CA7[3] ,Clears the WFI_CA7[3] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 2. " WFI_CA7[2] ,Clears the WFI_CA7[2] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 1. " WFI_CA7[1] ,Clears the WFI_CA7[1] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 0. " WFI_CA7[0] ,Clears the WFI_CA7[0] bit in the external event request status register" "No effect,Clear" endif group.long 0x34++0x3 line.long 0x00 "SYSCEERSER2,External Event Request Status Enable Register 2" bitfld.long 0x00 11. " FIQ_CA7[3] ,CA7 CPU3 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " FIQ_CA7[2] ,CA7 CPU2 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " FIQ_CA7[1] ,CA7 CPU1 FIQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " FIQ_CA7[0] ,CA7 CPU0 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " IRQ_CA7[3] ,CA7 CPU3 IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " IRQ_CA7[2] ,CA7 CPU2 IRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " IRQ_CA7[1] ,CA7 CPU1 IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " IRQ_CA7[0] ,CA7 CPU0 IRQ interrupt enable" "Disabled,Enabled" sif cpu()!="R8A77420" bitfld.long 0x00 3. " WFI_CA7[3] ,CA7 CPU3 WFI external event interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " WFI_CA7[2] ,CA7 CPU2 WFI external event interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " WFI_CA7[1] ,CA7 CPU1 WFI external event interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " WFI_CA7[0] ,CA7 CPU0 WFI external event interrupt enable" "Disabled,Enabled" endif tree.end tree "Power control Registers for CA15" rgroup.long 0x40++0x3 line.long 0x00 "PWRSRCA15,Power Status Register CA15" bitfld.long 0x00 7. " PWRUP_CPU3 ,Indicates the non-power-shutoff state of the CPU3" "No,Yes" bitfld.long 0x00 6. " PWRUP_CPU2 ,Indicates the non-power-shutoff state of the CPU2" "No,Yes" bitfld.long 0x00 5. " PWRUP_CPU1 ,Indicates the non-power-shutoff state of the CPU1" "No,Yes" textline " " bitfld.long 0x00 4. " PWRUP_CPU0 ,Indicates the non-power-shutoff state of the CPU0" "No,Yes" bitfld.long 0x00 3. " PWRDWN_CPU3 ,Indicates the power-shutoff state of the CPU3" "No,Yes" bitfld.long 0x00 2. " PWRDWN_CPU2 ,Indicates the power-shutoff state of the CPU2" "No,Yes" textline " " bitfld.long 0x00 1. " PWRDWN_CPU1 ,Indicates the power-shutoff state of the CPU1" "No,Yes" bitfld.long 0x00 0. " PWRDWN_CPU0 ,Indicates the power-shutoff state of the CPU0" "No,Yes" rgroup.long 0x48++0x3 line.long 0x00 "PWROFFSRCA15,Power Shutoff Status Register CA15" bitfld.long 0x00 3. " CPU3 ,Indicates the power shutoff sequence execution status for the CPU3" "Not executed,Executed" bitfld.long 0x00 2. " CPU2 ,Indicates the power shutoff sequence execution status for the CPU2" "Not executed,Executed" bitfld.long 0x00 1. " CPU1 ,Indicates the power shutoff sequence execution status for the CPU1" "Not executed,Executed" textline " " bitfld.long 0x00 0. " CPU0 ,Indicates the power shutoff sequence execution status for the CPU0" "Not executed,Executed" rgroup.long 0x50++0x7 line.long 0x00 "PWRONSRCA15,Power Resume Status Register CA15" bitfld.long 0x00 3. " CPU3 ,Indicates the power resume sequence execution status for the CPU3" "Not executed,Executed" bitfld.long 0x00 2. " CPU2 ,Indicates the power resume sequence execution status for the CPU2" "Not executed,Executed" bitfld.long 0x00 1. " CPU1 ,Indicates the power resume sequence execution status for the CPU1" "Not executed,Executed" textline " " bitfld.long 0x00 0. " CPU0 ,Indicates the power resume sequence execution status for the CPU0" "Not executed,Executed" line.long 0x04 "PWRERCA15,Power Shutoff/Resume Error Register CA15" bitfld.long 0x04 3. " CPU3 ,Indicates whether a power shutoff or power resume request to the CPU3 was not accepted" "Accepted,Not accepted" bitfld.long 0x04 2. " CPU2 ,Indicates whether a power shutoff or power resume request to the CPU2 was not accepted" "Accepted,Not accepted" bitfld.long 0x04 1. " CPU1 ,Indicates whether a power shutoff or power resume request to the CPU1 was not accepted" "Accepted,Not accepted" textline " " bitfld.long 0x04 0. " CPU0 ,Indicates whether a power shutoff or power resume request to the CPU0 was not accepted" "Accepted,Not accepted" tree.end tree "Power control Registers for CA7" rgroup.long 0x1C0++0x3 line.long 0x00 "PWRSRCA7,Power Status Register CA7" bitfld.long 0x00 7. " PWRUP_CPU3 ,Indicates the non-power-shutoff state of the CPU3" "No,Yes" bitfld.long 0x00 6. " PWRUP_CPU2 ,Indicates the non-power-shutoff state of the CPU2" "No,Yes" bitfld.long 0x00 5. " PWRUP_CPU1 ,Indicates the non-power-shutoff state of the CPU1" "No,Yes" textline " " bitfld.long 0x00 4. " PWRUP_CPU0 ,Indicates the non-power-shutoff state of the CPU0" "No,Yes" bitfld.long 0x00 3. " PWRDWN_CPU3 ,Indicates the power-shutoff state of the CPU3" "No,Yes" bitfld.long 0x00 2. " PWRDWN_CPU2 ,Indicates the power-shutoff state of the CPU2" "No,Yes" textline " " bitfld.long 0x00 1. " PWRDWN_CPU1 ,Indicates the power-shutoff state of the CPU1" "No,Yes" bitfld.long 0x00 0. " PWRDWN_CPU0 ,Indicates the power-shutoff state of the CPU0" "No,Yes" rgroup.long 0x1C8++0x3 line.long 0x00 "PWROFFSRCA7,Power Shutoff Status Register CA7" bitfld.long 0x00 3. " CPU3 ,Indicates the power shutoff sequence execution status for the CPU3" "Not executed,Executed" bitfld.long 0x00 2. " CPU2 ,Indicates the power shutoff sequence execution status for the CPU2" "Not executed,Executed" bitfld.long 0x00 1. " CPU1 ,Indicates the power shutoff sequence execution status for the CPU1" "Not executed,Executed" textline " " bitfld.long 0x00 0. " CPU0 ,Indicates the power shutoff sequence execution status for the CPU0" "Not executed,Executed" rgroup.long 0x1D0++0x7 line.long 0x00 "PWRONSRCA7,Power Resume Status Register CA7" bitfld.long 0x00 3. " CPU3 ,Indicates the power resume sequence execution status for the CPU3" "Not executed,Executed" bitfld.long 0x00 2. " CPU2 ,Indicates the power resume sequence execution status for the CPU2" "Not executed,Executed" bitfld.long 0x00 1. " CPU1 ,Indicates the power resume sequence execution status for the CPU1" "Not executed,Executed" textline " " bitfld.long 0x00 0. " CPU0 ,Indicates the power resume sequence execution status for the CPU0" "Not executed,Executed" line.long 0x04 "PWRERCA7,Power Shutoff/Resume Error Register CA7" bitfld.long 0x04 3. " CPU3 ,Indicates whether a power shutoff or power resume request to the CPU3 was not accepted" "Accepted,Not accepted" bitfld.long 0x04 2. " CPU2 ,Indicates whether a power shutoff or power resume request to the CPU2 was not accepted" "Accepted,Not accepted" bitfld.long 0x04 1. " CPU1 ,Indicates whether a power shutoff or power resume request to the CPU1 was not accepted" "Accepted,Not accepted" textline " " bitfld.long 0x04 0. " CPU0 ,Indicates whether a power shutoff or power resume request to the CPU0 was not accepted" "Accepted,Not accepted" tree.end tree.open "Power control Registers for other modules" sif cpu()=="R8A77420" tree "RGX power control registers" rgroup.long 0xC0++0x03 line.long 0x00 "PWRSR2,Power Status Register 2" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of RGX" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0xC0+0x04)++0x03 line.long 0x00 "PWROFFCR2,Power Shutoff Control Register 2" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the RGX" "Not started,Started" rgroup.long (0xC0+0x08)++0x03 line.long 0x00 "PWROFFSR2,Power Shutoff Status Register 2" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the RGX" "Not executed,Executed" wgroup.long (0xC0+0x0c)++0x03 line.long 0x00 "PWRONCR2,Power Resume Control Register 2" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0xC0+0x10)++0x07 line.long 0x00 "PWRONSR2,Power Resume Status Register 2" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the RGX" "Not executed,Executed" line.long 0x04 "PWRER2,Power Shutoff/Resume Error Register 2" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the RGX was not accepted" "Accepted,Not accepted" tree.end else tree "RGX power control registers" rgroup.long 0xC0++0x03 line.long 0x00 "PWRSR2,Power Status Register 2" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of RGX" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0xC0+0x04)++0x03 line.long 0x00 "PWROFFCR2,Power Shutoff Control Register 2" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the RGX" "Not started,Started" rgroup.long (0xC0+0x08)++0x03 line.long 0x00 "PWROFFSR2,Power Shutoff Status Register 2" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the RGX" "Not executed,Executed" wgroup.long (0xC0+0x0c)++0x03 line.long 0x00 "PWRONCR2,Power Resume Control Register 2" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0xC0+0x10)++0x07 line.long 0x00 "PWRONSR2,Power Resume Status Register 2" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the RGX" "Not executed,Executed" line.long 0x04 "PWRER2,Power Shutoff/Resume Error Register 2" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the RGX was not accepted" "Accepted,Not accepted" tree.end endif sif cpu()=="R8A77420" tree "CA7-SCU power control registers" rgroup.long 0x100++0x03 line.long 0x00 "PWRSR3,Power Status Register 3" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of CA7-SCU" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x100+0x04)++0x03 line.long 0x00 "PWROFFCR3,Power Shutoff Control Register 3" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the CA7-SCU" "Not started,Started" rgroup.long (0x100+0x08)++0x03 line.long 0x00 "PWROFFSR3,Power Shutoff Status Register 3" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the CA7-SCU" "Not executed,Executed" wgroup.long (0x100+0x0c)++0x03 line.long 0x00 "PWRONCR3,Power Resume Control Register 3" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x100+0x10)++0x07 line.long 0x00 "PWRONSR3,Power Resume Status Register 3" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the CA7-SCU" "Not executed,Executed" line.long 0x04 "PWRER3,Power Shutoff/Resume Error Register 3" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the CA7-SCU was not accepted" "Accepted,Not accepted" tree.end else tree "CA7-SCU power control registers" rgroup.long 0x100++0x03 line.long 0x00 "PWRSR3,Power Status Register 3" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of CA7-SCU" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x100+0x04)++0x03 line.long 0x00 "PWROFFCR3,Power Shutoff Control Register 3" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the CA7-SCU" "Not started,Started" rgroup.long (0x100+0x08)++0x03 line.long 0x00 "PWROFFSR3,Power Shutoff Status Register 3" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the CA7-SCU" "Not executed,Executed" wgroup.long (0x100+0x0c)++0x03 line.long 0x00 "PWRONCR3,Power Resume Control Register 3" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x100+0x10)++0x07 line.long 0x00 "PWRONSR3,Power Resume Status Register 3" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the CA7-SCU" "Not executed,Executed" line.long 0x04 "PWRER3,Power Shutoff/Resume Error Register 3" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the CA7-SCU was not accepted" "Accepted,Not accepted" tree.end endif sif cpu()=="R8A77420" else tree "IMP-X4 power control registers" rgroup.long 0x140++0x03 line.long 0x00 "PWRSR4,Power Status Register 4" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of IMP-X4" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x140+0x04)++0x03 line.long 0x00 "PWROFFCR4,Power Shutoff Control Register 4" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the IMP-X4" "Not started,Started" rgroup.long (0x140+0x08)++0x03 line.long 0x00 "PWROFFSR4,Power Shutoff Status Register 4" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the IMP-X4" "Not executed,Executed" wgroup.long (0x140+0x0c)++0x03 line.long 0x00 "PWRONCR4,Power Resume Control Register 4" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x140+0x10)++0x07 line.long 0x00 "PWRONSR4,Power Resume Status Register 4" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the IMP-X4" "Not executed,Executed" line.long 0x04 "PWRER4,Power Shutoff/Resume Error Register 4" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the IMP-X4 was not accepted" "Accepted,Not accepted" tree.end endif sif cpu()=="R8A77420" tree "CA15-SCU power control registers" rgroup.long 0x180++0x03 line.long 0x00 "PWRSR5,Power Status Register 5" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of CA15-SCU" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x180+0x04)++0x03 line.long 0x00 "PWROFFCR5,Power Shutoff Control Register 5" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the CA15-SCU" "Not started,Started" rgroup.long (0x180+0x08)++0x03 line.long 0x00 "PWROFFSR5,Power Shutoff Status Register 5" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the CA15-SCU" "Not executed,Executed" wgroup.long (0x180+0x0c)++0x03 line.long 0x00 "PWRONCR5,Power Resume Control Register 5" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x180+0x10)++0x07 line.long 0x00 "PWRONSR5,Power Resume Status Register 5" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the CA15-SCU" "Not executed,Executed" line.long 0x04 "PWRER5,Power Shutoff/Resume Error Register 5" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the CA15-SCU was not accepted" "Accepted,Not accepted" tree.end else tree "CA15-SCU power control registers" rgroup.long 0x180++0x03 line.long 0x00 "PWRSR5,Power Status Register 5" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of CA15-SCU" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x180+0x04)++0x03 line.long 0x00 "PWROFFCR5,Power Shutoff Control Register 5" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the CA15-SCU" "Not started,Started" rgroup.long (0x180+0x08)++0x03 line.long 0x00 "PWROFFSR5,Power Shutoff Status Register 5" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the CA15-SCU" "Not executed,Executed" wgroup.long (0x180+0x0c)++0x03 line.long 0x00 "PWRONCR5,Power Resume Control Register 5" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x180+0x10)++0x07 line.long 0x00 "PWRONSR5,Power Resume Status Register 5" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the CA15-SCU" "Not executed,Executed" line.long 0x04 "PWRER5,Power Shutoff/Resume Error Register 5" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the CA15-SCU was not accepted" "Accepted,Not accepted" tree.end endif tree.end width 0xB tree.end tree "H-UDI (User Debugging Interface)" base ad:0xFC110000 width 7. rgroup.word 0x00++0x1 line.word 0x00 "SDIR,Instruction Register" hexmask.word.byte 0x00 8.--15. 1. " TI ,Test instruction" group.word 0x18++0x1 line.word 0x00 "SDINT,Interrupt Source Register" bitfld.word 0x00 0. " INTREQ ,Interrupt Request" "Not requested,Requested" width 0xB tree.end textline ""